Replace kcq queue reset with existing function amdgpu_mes_reset_legacy_queue.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 22 +++---
1 file changed, 3 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/dr
sdmv7 queue reset already supports by mmio, add its sys file.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
index 62
Reset gfx/compute queue through mmio based on me_id and queue_id.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.h | 2 +
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 88 +-
2 files changed, 89 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/a
Reset sdma queue through mmio based on me_id and queue_id.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 46 ++
1 file changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index
Implement sdma queue reset callback by mes_reset_queue_mmio.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
inde
Extracts the resume sequence for per sdma instance from sdma_v7_0_gfx_resume.
This function can be used in start or restart scenarios of specific instances.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 259 ++---
1 file changed, 141 insertions(+), 1
sdmv7 queue reset already supports by mmio, add its sys file.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
index 62
Reset gfx/compute queue through mmio based on me_id and queue_id.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.h | 2 +
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 88 +-
2 files changed, 89 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/a
Reset sdma queue through mmio based on me_id and queue_id.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 46 ++
1 file changed, 46 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
index
Implement sdma queue reset callback by mes_reset_queue_mmio.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
b/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
inde
Extracts the resume sequence for per sdma instance from sdma_v7_0_gfx_resume.
This function can be used in start or restart scenarios of specific instances.
Signed-off-by: Jesse Zhang
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 259 ++---
1 file changed, 141 insertions(+), 1
From: yfeng1
Users might switch to ROCM build does not include MEC SJT FW and driver
needs to consider this case.
Signed-of-yfeng1
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
b/dr
On 09/12/2024 22:51, Harry Wentland wrote:
Looks good now.
Series is
Reviewed-by: Harry Wentland
Haven't followed the whole panic support closely. Is there a
way to trigger a panic for testing, or is there any other
recommended way to test this?
The easiest way is to trigger a kernel panic w
[AMD Official Use Only - AMD Internal Distribution Only]
Greetings Harish, sending peace
Thank you for the tutor ledge, acknowledge below!
> -Original Message-
> From: Kasiviswanathan, Harish
> Sent: Monday, December 9, 2024 1:51 PM
> To: Martin, Andrew ; amd-
> g...@lists.freedesktop.or
Looks good now.
Series is
Reviewed-by: Harry Wentland
Haven't followed the whole panic support closely. Is there a
way to trigger a panic for testing, or is there any other
recommended way to test this?
Harry
On 2024-12-09 12:00, Alex Deucher wrote:
> + Harry
>
> Ping on this series.
>
> On
On Thu, Dec 5, 2024 at 9:35 PM Dr. David Alan Gilbert wrote:
>
> * li...@treblig.org (li...@treblig.org) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > Hi,
> > This removes a bunch more functions (and a field) from
> > drm/amd/display that are unused.
> >
> > Signed-off-by: Dr. David Alan Gi
On 2024-12-09 10:44, Aurabindo Pillai wrote:
> From: Leo Li
>
> They were named with the incorrect dcn version.
>
> Signed-off-by: Aurabindo Pillai
Reviewed-by: Harry Wentland
Harry
> ---
> .../gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c| 4 ++--
> .../gpu/drm/amd/display/dc
[Public]
Hi all,
This week this patchset was tested on 4 systems, two dGPU and two APU based,
and tested across multiple display and connection types.
APU
* Single Display eDP -> 1080p 60hz, 2560x1600 120hz, 1920x1200 165hz
* Single Display DP -> 4k144hz, 4k240hz
* Multi
[Public]
Reviewed-by: Harish Kasiviswanathan
-Original Message-
From: amd-gfx On Behalf Of Andrew Martin
Sent: Friday, December 6, 2024 3:07 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix ; Tudor, Alexandru
; Martin, Andrew ; Martin,
Andrew
Subject: [PATCH] drm/amdkfd: Uni
[AMD Official Use Only - AMD Internal Distribution Only]
Minor comment below.
-Original Message-
From: amd-gfx On Behalf Of Andrew Martin
Sent: Friday, December 6, 2024 5:11 PM
To: amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix ; Tudor, Alexandru
; Martin, Andrew ; Martin,
Andrew
S
On Mon, Dec 9, 2024 at 10:44 AM Aurabindo Pillai
wrote:
>
> From: Leo Li
>
> They were named with the incorrect dcn version.
>
> Signed-off-by: Aurabindo Pillai
+ Tom for awareness for umr.
Acked-by: Alex Deucher
> ---
> .../gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c| 4 ++--
+ Harry
Ping on this series.
On Tue, Nov 12, 2024 at 4:37 PM Alex Deucher wrote:
>
> This builds on the patches from Lu and Jocelyn to fill in
> panic support for all DCE/DCN variants and code pathes.
>
> v2: refactor to provide cleaner history and share more
> code to provide a more consistent
On 04/12/24 - 16:31, Jani Nikula wrote:
> We stopped using the driver initialized date in commit 7fb8af6798e8
> ("drm: deprecate driver date") and (eventually) started returning "0"
> for drm_version ioctl instead.
>
> Finish the job, and remove the unused date member from struct
> drm_driver, its
VF device sets the RAS flag when mailbox data can't be read properly.
There is no conclusive way to tell if the real source is RAS error.
Therefore VF schedules a KFD based reset which doesn't set RAS source.
SKip checking RAS source for any VF scheduled recovery.
Signed-off-by: Lijo Lazar
Report
From: Leo Li
They were named with the incorrect dcn version.
Signed-off-by: Aurabindo Pillai
---
.../gpu/drm/amd/display/dc/clk_mgr/dcn201/dcn201_clk_mgr.c| 4 ++--
.../gpu/drm/amd/display/dc/irq/dcn201/irq_service_dcn201.c| 4 ++--
.../gpu/drm/amd/display/dc/resource/dcn201/dcn201_res
Since 6.6.57 there'se a new warning here which is still in 6.6.64.
Is this a known issue?
On 10/17/24 17:05, Toralf Förster wrote:
[ 22.120385] [ cut here ]
[ 22.120389] WARNING: CPU: 13 PID: 11 at drivers/gpu/drm/amd/
amdgpu/../display/dc/dcn30/dcn30_dpp.c:501
dpp3
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Tao Zhou
> -Original Message-
> From: Wang, Yang(Kevin)
> Sent: Monday, December 9, 2024 5:01 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhang, Hawking ; Zhou1, Tao
>
> Subject: [PATCH] drm/amdgpu: improve RAS ACA
Improve RAS ACA code to avoid binding unsupported RAS blocks,
thus avoiding invalid ACA Bank to ACA Bank cache,
and also reduce system memory consumption.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/dr
From: Wayne Lin
[ Upstream commit fcf6a49d79923a234844b8efe830a61f3f0584e4 ]
[Why]
When unplug one of monitors connected after mst hub, encounter null pointer
dereference.
It's due to dc_sink get released immediately in early_unregister() or
detect_ctx(). When
commit new state which directly
From: Nikita Zhandarovich
[ Upstream commit 2a3cfb9a24a28da9cc13d2c525a76548865e182c ]
Since 'adev->dm.dc' in amdgpu_dm_fini() might turn out to be NULL
before the call to dc_enable_dmub_notifications(), check
beforehand to ensure there will not be a possible NULL-ptr-deref
there.
Also, since c
Hi Jianqi,
On 09/12/24 12:06, jianqi.ren...@windriver.com wrote:
From: Wayne Lin
[ Upstream commit fcf6a49d79923a234844b8efe830a61f3f0584e4 ]
[Why]
When unplug one of monitors connected after mst hub, encounter null pointer
dereference.
It's due to dc_sink get released immediately in early_
From: Sohaib Nadeem
[ Upstream commit 0484e05d048b66d01d1f3c1d2306010bb57d8738 ]
[why]:
issues fixed:
- comparison with wider integer type in loop condition which can cause
infinite loops
- pointer dereference before null check
Cc: Mario Limonciello
Cc: Alex Deucher
Cc: sta...@vger.kernel.org
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