From: Boyuan Zhang
For vcn 3_0, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_blo
Hi Jani,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on next-20241024]
[cannot apply to drm-exynos/exynos-drm-next shawnguo/for-next
drm-xe/drm-xe-next linus/master v6.12-rc4]
[If your patch is applied to the
From: Qiang Yu
This is used when radeonsi export small texture's modifier
to user with eglExportDMABUFImageQueryMESA().
mesa changes is available here:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31658
Signed-off-by: Qiang Yu
---
include/uapi/drm/drm_fourcc.h | 1 +
1 file chang
Currently, the shadow FW space size and alignment information is
protected under a flag (adev->gfx.cp_gfx_shadow) which gets set
only in case of SRIOV setups.
if (amdgpu_sriov_vf(adev))
adev->gfx.cp_gfx_shadow = true;
But we need this information for GFX Userqueues, so that user can
create
Hi Jani,
kernel test robot noticed the following build errors:
[auto build test ERROR on drm-misc/drm-misc-next]
[also build test ERROR on next-20241024]
[cannot apply to drm-exynos/exynos-drm-next shawnguo/for-next
drm-xe/drm-xe-next linus/master v6.12-rc4]
[If your patch is applied to the
Hi Jani,
kernel test robot noticed the following build warnings:
[auto build test WARNING on drm-misc/drm-misc-next]
[also build test WARNING on next-20241024]
[cannot apply to drm-exynos/exynos-drm-next shawnguo/for-next
drm-xe/drm-xe-next linus/master v6.12-rc4]
[If your patch is applied to
On 10/25/2024 8:54 AM, Liang, Prike wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
>> From: Lazar, Lijo
>> Sent: Thursday, October 24, 2024 4:40 PM
>> To: Liang, Prike ; amd-gfx@lists.freedesktop.org
>> Cc: Deucher, Alexander
>> Subject: Re: [PATCH v3 2/2] drm/amdgpu: cle
[AMD Official Use Only - AMD Internal Distribution Only]
> From: Lazar, Lijo
> Sent: Thursday, October 24, 2024 4:40 PM
> To: Liang, Prike ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: Re: [PATCH v3 2/2] drm/amdgpu: clean up the suspend_complete
>
>
>
> On 10/24/2024 1:51 P
From: Boyuan Zhang
Pass ip_block instead of adev in set_clockgating_state() callback
functions. Modify set_clockgating_state()for all correspoding ip blocks.
v2: remove all changes for is_idle(), remove type casting
Signed-off-by: Boyuan Zhang
Acked-by: Christian König
---
drivers/gpu/drm/am
On 2024-10-22 02:25, Christian König wrote:
Patches #1-#5, #7, #8, #32 are Acked-by: Christian König
Added Acked-by, and ready to be submitted.
Patches #9 - #19, #27 are Reviewed-by: Christian König
Added Reviewed-by, and ready to be submitted.
Patch #6 the drm/amdgpu prefix is
From: Boyuan Zhang
v5:
revise patch #6, #28 based on Christian's comments.
revise patch #7, #8 based on Sunil's comments.
revise patch #24 due to Lijo's recent commit.
remove patch #28, #29, #31 in v4 based on comments.
add reviewed-by/acked-by to patch #1-#19, #27, #29
v4:
code polishing and
On 2024-10-22 03:58, Khatri, Sunil wrote:
On 10/17/2024 6:50 PM, boyuan.zh...@amd.com wrote:
From: Boyuan Zhang
Pass ip_block instead of adev in set_clockgating_state() and is_idle()
callback functions. Modify set_clockgating_state() and is_idle() ip
functions for all correspoding ip blocks
From: Boyuan Zhang
Add an instance parameter to the existing function dpm_set_vcn_enable()
for future implementation. Re-write all pptable functions accordingly.
v2: Remove duplicated dpm_set_vcn_enable() functions in v1. Instead,
adding instance parameter to existing functions.
Signed-off-by:
On 2024-10-22 03:42, Khatri, Sunil wrote:
On 10/17/2024 6:50 PM, boyuan.zh...@amd.com wrote:
From: Boyuan Zhang
Pass ip_block instead of adev in set_powergating_state callback
function.
Modify set_powergating_state ip functions for all correspoding ip
blocks.
v2: fix a ip block index er
The `kfd_get_cu_occupancy` function previously declared a large
`cu_occupancy` array as a local variable, which could lead to stack
overflows due to excessive stack usage. This commit replaces the static
array allocation with dynamic memory allocation using `kcalloc`,
thereby reducing the stack siz
From: Boyuan Zhang
Move all per instance variables from amdgpu_vcn to amdgpu_vcn_inst.
Move adev->vcn.fw[i] from amdgpu_vcn to amdgpu_vcn_inst.
Move adev->vcn.vcn_config[i] from amdgpu_vcn to amdgpu_vcn_inst.
Move adev->vcn.vcn_codec_disable_mask[i] from amdgpu_vcn to amdgpu_vcn_inst.
Signed-of
From: Boyuan Zhang
For vcn 4_0, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_blo
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_setup_ucode(), and perform
setup ucode ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 37 --
From: Boyuan Zhang
For vcn 5_0_0, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_b
From: Boyuan Zhang
Set powergating state by vcn instance in idle_work_handler() and
ring_begin_use() functions for vcn with multiple instances.
v2: Add instance parameter to amdgpu_device_ip_set_powergating_state(),
instead of creating new function.
Signed-off-by: Boyuan Zhang
Reviewed-by: Chr
From: Boyuan Zhang
For vcn 2_5, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_blo
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_hw_init(), and perform
hw init ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 39 +++--
drivers
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_suspend(), and perform
suspend ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
v2: add vcn instance to amdgpu_vcn_save_vcpu_bo()
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/
From: Boyuan Zhang
Pass instance parameter to set_dec_ring_funcs(), set_enc_ring_funcs(),
and set_irq_funcs(), and perform function setup ONLY for the given vcn
instance, instead of for all vcn instances. Modify each vcn generation
accordingly.
Signed-off-by: Boyuan Zhang
Reviewed-by: Christian
From: Boyuan Zhang
Perform set_powergating_state only for the instance of the current vcn
IP block, instead of perform it for all vcn instances.
Signed-off-by: Boyuan Zhang
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 313
drivers/gpu/drm/am
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_resume(), and perform
resume ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 60
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_sw_fini(), and perform
sw fini ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 36 --
From: Boyuan Zhang
Perform wait_for_idle only for the instance of the current vcn IP block,
instead of perform it for all vcn instances.
v2: remove unneeded local variable initialization.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 16 +++-
drivers/gp
From: Boyuan Zhang
First, add an instance parameter to smu_dpm_set_vcn_enable() function,
and calling dpm_set_vcn_enable() with this given instance.
Second, modify vcn_gated to be an array, to track the gating status
for each vcn instance separately.
With these 2 changes, smu_dpm_set_vcn_enable
From: Boyuan Zhang
vcn gating state should now be based on instance. For example, instance 0
can be gated while instance 1 is ungated, or vice versa.
Therefore, change the cur_state to be an array, so that it can track the
gating status for each vcn instance now.
v2: remove redundant codes in v
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_early_init(), and perform
early init ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 23
From: Boyuan Zhang
For vcn 4_0_3, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_b
From: Boyuan Zhang
For vcn 4_0_5, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_b
From: Boyuan Zhang
Previously idle working handling is for all VCN instances. As a result, when one
of the instance finishes its job, the idle work can't be triggered if the other
instance is still busy.
Now, move the idle_work from amdgpu_vcn to amdgpu_vcn_inst, in order to
track work by vcn in
From: Boyuan Zhang
Add a new function to count the number of instance of the same IP block
in the current ip_block list, then use the returned count value to set
the newly defined instance variable in ip_block, to track the instance
number of each ip_block.
Signed-off-by: Boyuan Zhang
Signed-of
From: Boyuan Zhang
Add an instance parameter to amdgpu_dpm_enable_vcn() function, and change
all calls from vcn ip functions to add instance argument. vcn generations
with only one instance (v1.0, v2.0) always use 0 as instance number. vcn
generations with multiple instances (v2.5, v3.0, v4.0, v4
From: Boyuan Zhang
Pass ip_block instead of adev in set_powergating_state callback function.
Modify set_powergating_state ip functions for all correspoding ip blocks.
v2: fix a ip block index error.
v3: remove type casting
Signed-off-by: Boyuan Zhang
Suggested-by: Christian König
Acked-by: C
From: Boyuan Zhang
Add an instance parameter to amdgpu_dpm_set_powergating_by_smu() function,
and use the instance to call set_powergating_by_smu().
v2: remove duplicated functions.
remove for-loop in amdgpu_dpm_set_powergating_by_smu(), and temporarily
move it to amdgpu_dpm_enable_vcn(), in or
From: Boyuan Zhang
For smu ip with multiple vcn instances (smu 11/13/14), remove all the
for loop in dpm_set_vcn_enable() functions. And use the instance
argument to power up/down vcn for the given instance only, instead
of powering up/down for all vcn instances.
v2: remove all duplicated functi
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Kenneth Feng kenneth.f...@amd.com
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Friday, October 25, 2024 6:10 AM
To: Deucher, Alexander
Cc: amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/am
Ping?
On Wed, Oct 23, 2024 at 9:23 AM Alex Deucher wrote:
>
> The following 3 commits landed in parallel:
> commit d7d2688bf4ea ("drm/amd/pm: update workload mask after the setting")
> commit 7a1613e47e65 ("drm/amdgpu/smu13: always apply the powersave
> optimization")
> commit 7c210ca5a2d7 ("drm
On Thu, Oct 24, 2024 at 12:33 PM Jani Nikula wrote:
>
> We stopped using the driver initialized date in commit 7fb8af6798e8
> ("drm: deprecate driver date") and (eventually) started returning "0"
> for drm_version ioctl instead.
>
> Finish the job, and remove the unused date member from struct
> d
This callback gets the size and alignment requirements
for the gfx shadow buffer for preemption.
Cc: Alex Deucher
Cc: Christian Koenig
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 29 ++
1 file changed, 29 insertions(+)
diff --git a/drive
Jani Nikula writes:
Hello Jani,
> We stopped using the driver initialized date in commit 7fb8af6798e8
> ("drm: deprecate driver date") and (eventually) started returning "0"
> for drm_version ioctl instead.
>
> Finish the job, and remove the unused date member from struct
> drm_driver, its initi
On 10/24/2024 03:17, Dan Carpenter wrote:
This NULL check is reversed so the function doesn't work.
Fixes: dad01f93f432 ("drm/amdgpu: validate hw_fini before function call")
Signed-off-by: Dan Carpenter
Thanks!
Reviewed-by: Mario Limonciello
Also applied to amd-staging-drm-next.
---
dr
[AMD Official Use Only - AMD Internal Distribution Only]
If the old FW doesn't support the isolation feature, it won't check that bit,
the setting there will be ignored , so it won't cause the problem .
Regards
Shaoyun.liu
-Original Message-
From: Alex Deucher
Sent: Thursday, Octob
On Thu, Oct 24, 2024 at 9:31 AM Alex Deucher wrote:
>
> On Mon, Oct 21, 2024 at 10:11 PM Shaoyun Liu wrote:
> >
> > New features require the new fields defines
> >
> > Signed-off-by: Shaoyun Liu
> > ---
> > drivers/gpu/drm/amd/include/mes_v11_api_def.h | 32 -
> > drivers/gpu/dr
On Mon, Oct 21, 2024 at 10:11 PM Shaoyun Liu wrote:
>
> New features require the new fields defines
>
> Signed-off-by: Shaoyun Liu
> ---
> drivers/gpu/drm/amd/include/mes_v11_api_def.h | 32 -
> drivers/gpu/drm/amd/include/mes_v12_api_def.h | 34 ++-
> 2 files cha
On Wed, Oct 23, 2024 at 8:48 PM Shaoyun Liu wrote:
>
> This is for MES to limit only one process for the user queues
>
> Signed-off-by: Shaoyun Liu
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 2 ++
> drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 24
> drivers/gpu/drm/
From: Tvrtko Ursulin
I included two Teddy's patches which have been reviewed and acked and IMO makes
sense to pull them in straight away.
Then patch three does what Christian suggested - stops reporting GWS, GDS, OA
and DOORBELL TTM regions as 'CPU' memory.
Last patch is RFC in case there is va
From: Tvrtko Ursulin
So far these specialized on chip memory pools were reported as system
memory (aka 'cpu') which is not correct and misleading. Lets remove that
and consider later making them visible as their own thing.
Signed-off-by: Tvrtko Ursulin
Suggested-by: Christian König
Cc: Yunxian
Since 040fdcde288a2830edc31dd507963d6aadf990d2 ("drm/amdgpu: respect the
abmlevel module parameter value if it is set"), the default value for
amdgpu.abmlevel was set to -1, or auto. However, the comment explaining
the default value was not updated to reflect the change (-1, or auto;
not
-1, or
Add two sysfs interfaces for gfx and compute:
gfx_reset_mask
compute_reset_mask
These interfaces are read-only and show the resets supported by the IP.
For example, full adapter reset (mode1/mode2/BACO/etc),
soft reset, queue reset, and pipe reset.
V2: the sysfs node returns a text string instead
Add gpu address support to seq64 alloc function.
v1:(Christian)
- Add the user of this new interface change to the same
patch.
Signed-off-by: Arunpravin Paneer Selvam
---
drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c | 10 --
drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.h | 3
From: "jesse.zh...@amd.com"
Add the sysfs interface for jpeg:
jpeg_reset_mask
The interface is read-only and show the resets supported by the IP.
For example, full adapter reset (mode1/mode2/BACO/etc),
soft reset, queue reset, and pipe reset.
V2: the sysfs node returns a text string instead of
[AMD Official Use Only - AMD Internal Distribution Only]
> From: Lazar, Lijo
> Sent: Thursday, October 24, 2024 3:30 PM
> To: Liang, Prike ; amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: Re: [PATCH v2 2/2] drm/amdgpu: clean up the suspend_complete
>
>
>
> On 10/24/2024 12:49
From: Tvrtko Ursulin
In the past these specialized on chip memory pools were reported as system
memory (aka 'cpu') which was not correct and misleading. That has since
been removed so lets make them visible as their own respective memory
regions.
Signed-off-by: Tvrtko Ursulin
Cc: Christian Köni
Correct the workload setting in order not to mix the setting
with the end user. Update the workload mask accordingly.
v2: changes as below:
1. the end user can not erase the workload from driver except default workload.
2. always shows the real highest priority workoad to the end user.
3. the real
In the normal S3 entry, the TOS cycle counter is not
reset during BIOS execution the _S3 method, so it doesn't
determine whether the _S3 method is executed exactly.
Howerver, the PM core performs the S3 suspend will set the
PM_SUSPEND_FLAG_FW_RESUME bit if all the devices suspend
successfully. Ther
On 10/24/2024 12:49 PM, Lazar, Lijo wrote:
>
>
> On 10/24/2024 12:23 PM, Liang, Prike wrote:
>> [AMD Official Use Only - AMD Internal Distribution Only]
>>
>>> From: Lazar, Lijo
>>> Sent: Thursday, October 24, 2024 11:39 AM
>>> To: Liang, Prike ; amd-gfx@lists.freedesktop.org
>>> Cc: Deucher,
From: "jesse.zh...@amd.com"
Add the sysfs interface for vpe:
vpe_reset_mask
The interface is read-only and show the resets supported by the IP.
For example, full adapter reset (mode1/mode2/BACO/etc),
soft reset, queue reset, and pipe reset.
V2: the sysfs node returns a text string instead o
From: "jesse.zh...@amd.com"
Add the sysfs interface for vcn:
vcn_reset_mask
The interface is read-only and show the resets supported by the IP.
For example, full adapter reset (mode1/mode2/BACO/etc),
soft reset, queue reset, and pipe reset.
V2: the sysfs node returns a text string instead of so
On 10/24/2024 12:23 PM, Liang, Prike wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
>
>> From: Lazar, Lijo
>> Sent: Thursday, October 24, 2024 11:39 AM
>> To: Liang, Prike ; amd-gfx@lists.freedesktop.org
>> Cc: Deucher, Alexander
>> Subject: Re: [PATCH v2 2/2] drm/amdgpu: c
On 10/24/2024 11:19 AM, Victor Zhao wrote:
> during device init, under sriov, pci_restore_state happens after
> fullaccess released, and it can have race condition with mmio protection
> enable from host side.
>
> Since msix was toggled during pci_restore_state, if mmio protection
> happens dur
64 matches
Mail list logo
