Am 08.10.24 um 20:43 schrieb Khatri, Sunil:
On 10/8/2024 11:41 PM, Christian König wrote:
Stop masking the wptr and decrementing the count_dw while writing into
the ring buffer. We can do that all at once while pushing the changes to
the HW.
Signed-off-by: Christian König
---
drivers/gpu/dr
[AMD Official Use Only - AMD Internal Distribution Only]
Reviewed-by: Jack Xiao
Regards,
Jack
-Original Message-
From: SHANMUGAM, SRINIVASAN
Sent: Tuesday, October 8, 2024 9:34 PM
To: Koenig, Christian ; Deucher, Alexander
Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
; Z
On 10/9/2024 9:15 AM, jiadong@amd.com wrote:
> From: Jiadong Zhu
>
> Implement sdma queue reset callback via SMU interface.
>
> v2: Leverage inst_stop/start functions in reset sequence.
> Use GET_INST for physical SDMA instance.
> Disable apu for sdma reset.
>
> Signed-off-by: Ji
On 10/9/2024 9:15 AM, jiadong@amd.com wrote:
> From: Jiadong Zhu
>
> Implement sdma soft reset by sending MSG_ResetSDMA on smu 13.0.6.
>
> v2: add firmware version for the reset message.
>
> Signed-off-by: Jiadong Zhu
> ---
> drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 15 +
On 10/4/2024 8:31 PM, Asad Kamal wrote:
> Fill pcie other end recovery counter to metrics 1.6
>
> Signed-off-by: Asad Kamal
> ---
> .../gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c| 13 -
> 1 file changed, 12 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/amd/p
[AMD Official Use Only - AMD Internal Distribution Only]
Ping
-Original Message-
From: Kamal, Asad
Sent: Friday, October 4, 2024 8:31 PM
To: amd-gfx@lists.freedesktop.org; Lazar, Lijo
Cc: Ma, Le ; Zhang, Hawking ; Zhang,
Morris ; Kamal, Asad ; Poag, Charis
; Cheung, Donald ; Khatir, S
[AMD Official Use Only - AMD Internal Distribution Only]
Pmfw internally can clamp to its min frequency and max frequency.
So this approach is good.
Series is Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Friday, October 4, 2024 11:58 PM
To:
From: Jiadong Zhu
Implement sdma queue reset callback via SMU interface.
v2: Leverage inst_stop/start functions in reset sequence.
Use GET_INST for physical SDMA instance.
Disable apu for sdma reset.
Signed-off-by: Jiadong Zhu
---
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 97
From: Jiadong Zhu
Implement sdma soft reset by sending MSG_ResetSDMA on smu 13.0.6.
v2: add firmware version for the reset message.
Signed-off-by: Jiadong Zhu
---
drivers/gpu/drm/amd/pm/amdgpu_dpm.c | 15 +
drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 1 +
drivers/gp
From: Jiadong Zhu
update smu header for sdma soft reset.
Signed-off-by: Jiadong Zhu
---
drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h
b/drivers/gpu
The `kfd_get_cu_occupancy` function previously declared a large
`cu_occupancy` array as a local variable, which could lead to stack
overflows due to excessive stack usage. This commit replaces the static
array allocation with dynamic memory allocation using `kcalloc`,
thereby reducing the stack siz
On 10/9/2024 3:34 AM, Boyuan Zhang wrote:
>
> On 2024-10-08 03:03, Lazar, Lijo wrote:
>>
>> On 10/7/2024 8:54 PM, Alex Deucher wrote:
>>> On Mon, Oct 7, 2024 at 10:32 AM Lazar, Lijo wrote:
On 10/7/2024 7:47 PM, Alex Deucher wrote:
> On Mon, Oct 7, 2024 at 9:58 AM Lazar, Lijo
On 2024-10-04 15:52, Alex Deucher wrote:
On Fri, Oct 4, 2024 at 2:53 PM wrote:
From: Boyuan Zhang
For vcn 2_5, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off
On 2024-10-04 15:40, Alex Deucher wrote:
On Fri, Oct 4, 2024 at 2:45 PM wrote:
From: Boyuan Zhang
Add a new function to allow setting requested powergating state for the
given instance. If the instance value doesn't match with the one inside
ip_block, then do nothing since this request is f
On 2024-10-04 15:14, Alex Deucher wrote:
On Fri, Oct 4, 2024 at 2:45 PM wrote:
From: Boyuan Zhang
Add an instance parameter to set_powergating_by_smu() function, and
re-write all amd_pm functions accordingly. Then use the instance to
call smu_dpm_set_vcn_enable().
v2: remove duplicated fun
On 2024-10-08 03:03, Lazar, Lijo wrote:
On 10/7/2024 8:54 PM, Alex Deucher wrote:
On Mon, Oct 7, 2024 at 10:32 AM Lazar, Lijo wrote:
On 10/7/2024 7:47 PM, Alex Deucher wrote:
On Mon, Oct 7, 2024 at 9:58 AM Lazar, Lijo wrote:
On 10/7/2024 7:03 PM, Boyuan Zhang wrote:
On 2024-10-07 01
From: Boyuan Zhang
Pass instance parameter to set_dec_ring_funcs(), set_enc_ring_funcs(),
and set_irq_funcs(), and perform function setup ONLY for the given vcn
instance, instead of for all vcn instances. Modify each vcn generation
accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/a
From: Boyuan Zhang
Perform set_powergating_state only for the instance of the current vcn
IP block, instead of perform it for all vcn instances.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 313
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 20
From: Boyuan Zhang
Set powergating state by vcn instance in idle_work_handler() and
ring_begin_use() functions for vcn with multiple instances.
v2: Add instance parameter to amdgpu_device_ip_set_powergating_state(),
instead of creating new function.
Signed-off-by: Boyuan Zhang
---
drivers/gpu
From: Boyuan Zhang
Perform is_idle only for the instance of the current vcn IP block,
instead of perform it for all vcn instances.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 11 +--
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 11 +--
drivers/gpu/drm
From: Boyuan Zhang
Perform print_ip_state only for the instance of the current vcn IP block,
instead of perform it for all vcn instances.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 33 -
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 33 +++
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_hw_init(), and perform
hw init ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 39 +++--
drivers
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_sw_fini(), and perform
sw fini ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 36 --
From: Boyuan Zhang
Perform dump_ip_state only for the instance of the current vcn IP block,
instead of perform it for all vcn instances.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c | 27 +--
drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c | 27 +-
From: Boyuan Zhang
Perform wait_for_idle only for the instance of the current vcn IP block,
instead of perform it for all vcn instances.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 18 +-
drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 17 ---
From: Boyuan Zhang
Previously idle working handling is for all VCN instances. As a result, when one
of the instance finishes its job, the idle work can't be triggered if the other
instance is still busy.
Now, move the idle_work from amdgpu_vcn to amdgpu_vcn_inst, in order to
track work by vcn in
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_early_init(), and perform
early init ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 23
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_setup_ucode(), and perform
setup ucode ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 37 --
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_resume(), and perform
resume ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 60
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_sw_init(), and perform
sw init ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 83 --
From: Boyuan Zhang
Pass instance parameter to amdgpu_vcn_suspend(), and perform
suspend ONLY for the given vcn instance, instead of for all
vcn instances. Modify each vcn generation accordingly.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 35 --
From: Boyuan Zhang
For vcn 2_5, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_blo
From: Boyuan Zhang
Add a new function to count the number of instance of the same IP block
in the current ip_block list, then use the returned count value to set
the newly defined instance variable in ip_block, to track the instance
number of each ip_block.
Signed-off-by: Boyuan Zhang
Signed-of
From: Boyuan Zhang
For vcn 5_0_0, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_b
From: Boyuan Zhang
For vcn 4_0_5, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_b
From: Boyuan Zhang
For vcn 4_0_3, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_b
From: Boyuan Zhang
Move all per instance variables from amdgpu_vcn to amdgpu_vcn_inst.
Move adev->vcn.fw[i] from amdgpu_vcn to amdgpu_vcn_inst.
Move adev->vcn.vcn_config[i] from amdgpu_vcn to amdgpu_vcn_inst.
Move adev->vcn.vcn_codec_disable_mask[i] from amdgpu_vcn to amdgpu_vcn_inst.
Signed-of
From: Boyuan Zhang
For vcn 4_0, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_blo
From: Boyuan Zhang
For vcn 3_0, add ip_block for each vcn instance during discovery stage.
And only powering on/off one of the vcn instance using the
instance value stored in ip_block, instead of powering on/off all
vcn instances. Modify the existing functions to use the instance value
in ip_blo
From: Boyuan Zhang
Pass ip_block instead of adev in set_powergating_state callback function.
Modify set_powergating_state ip functions for all correspoding ip blocks.
v2: fix a ip block index error.
Signed-off-by: Boyuan Zhang
Suggested-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdg
From: Boyuan Zhang
vcn gating state should now be based on instance. For example, instance 0
can be gated while instance 1 is ungated, or vice versa.
Therefore, change the cur_state to be an array, so that it can track the
gating status for each vcn instance now.
v2: remove redundant codes in v
From: Boyuan Zhang
Add an instance parameter to amdgpu_dpm_enable_vcn() function, and change
all calls from vcn ip functions to add instance argument. vcn generations
with only one instance (v1.0, v2.0) always use 0 as instance number. vcn
generations with multiple instances (v2.5, v3.0, v4.0, v4
From: Boyuan Zhang
Add an instance parameter to amdgpu_dpm_set_powergating_by_smu() function,
and use the instance to call set_powergating_by_smu().
v2: remove duplicated functions.
remove for-loop in amdgpu_dpm_set_powergating_by_smu(), and temporarily
move it to amdgpu_dpm_enable_vcn(), in or
From: Boyuan Zhang
Pass ip_block instead of adev in set_clockgating_state() and is_idle()
callback functions. Modify set_clockgating_state() and is_idle() ip
functions for all correspoding ip blocks.
Signed-off-by: Boyuan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_acp.c | 4 ++--
drive
From: Boyuan Zhang
Add an instance parameter to set_powergating_by_smu() function, and
re-write all amd_pm functions accordingly. Then use the instance to
call smu_dpm_set_vcn_enable().
v2: remove duplicated functions.
remove for-loop in smu_dpm_set_power_gate(), and temporarily move it to
to a
From: Boyuan Zhang
For smu ip with multiple vcn instances (smu 11/13/14), remove all the
for loop in dpm_set_vcn_enable() functions. And use the instance
argument to power up/down vcn for the given instance only, instead
of powering up/down for all vcn instances.
v2: remove all duplicated functi
From: Boyuan Zhang
First, add an instance parameter to smu_dpm_set_vcn_enable() function,
and calling dpm_set_vcn_enable() with this given instance.
Second, modify vcn_gated to be an array, to track the gating status
for each vcn instance separately.
With these 2 changes, smu_dpm_set_vcn_enable
From: Boyuan Zhang
Add an instance parameter to the existing function dpm_set_vcn_enable()
for future implementation. Re-write all pptable functions accordingly.
v2: Remove duplicated dpm_set_vcn_enable() functions in v1. Instead,
adding instance parameter to existing functions.
Signed-off-by:
From: Boyuan Zhang
Previously, all vcn instance will be powered on/off at the same time
even only one of the instance requests power status change. This patch set
enables vcn to ONLY power on/off the instance that requires power status
change. Other vcn instances will remain the original power st
With Unified MES enabled in gfx12, need separate event log buffer for the
2 MES pipes to avoid data overwrite.
Signed-off-by: Michael Chen
---
drivers/gpu/drm/amd/amdgpu/mes_v12_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v12_0.c
b/
It should be enabled on both bare metal and VFs.
Fixes: e189be9b2e38 ("drm/amdgpu: Add enforce_isolation sysfs attribute")
Signed-off-by: Alex Deucher
Cc: Srinivasan Shanmugam
Cc: Amber Lin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 11 ---
1 file changed, 4 insertions(+), 7 deletio
[Public]
> -Original Message-
> From: Koenig, Christian
> Sent: Tuesday, October 8, 2024 4:27 AM
> To: Deucher, Alexander
> Cc: robdcl...@gmail.com; amd-gfx@lists.freedesktop.org; Pelloux-Prayer,
> Pierre-
> Eric ; dri-de...@lists.freedesktop.org;
> dmitry.osipe...@collabora.com; jani.n
On 10/8/2024 11:41 PM, Christian König wrote:
Stop masking the wptr and decrementing the count_dw while writing into
the ring buffer. We can do that all at once while pushing the changes to
the HW.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 11 +--
Reviewed-by: Sunil Khatri
On 10/8/2024 11:41 PM, Christian König wrote:
Volatile only prevents the compiler from re-ordering reads and writes.
Since we always only modify the ring buffer from one CPU thread and have
an explicit barrier before signaling the HW this should have no effect at
all a
On Tue, Oct 8, 2024 at 12:35 AM Ulf Hansson wrote:
>
> On Tue, 8 Oct 2024 at 00:25, Laurent Pinchart
> wrote:
> >
> > Hi Ulf,
> >
> > On Tue, Oct 08, 2024 at 12:08:24AM +0200, Ulf Hansson wrote:
> > > On Mon, 7 Oct 2024 at 20:49, Laurent Pinchart wrote:
> > > > On Fri, Oct 04, 2024 at 04:38:36PM
Stop masking the wptr and decrementing the count_dw while writing into
the ring buffer. We can do that all at once while pushing the changes to
the HW.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 11 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 4
Volatile only prevents the compiler from re-ordering reads and writes.
Since we always only modify the ring buffer from one CPU thread and have
an explicit barrier before signaling the HW this should have no effect at
all and just prevents compiler optimisations.
Signed-off-by: Christian König
--
Am 08.10.24 um 17:05 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
I've noticed the hardware ring padding optimisations have landed so I decided
to respin the CPU side optimisations.
First two patches are simply adding ring fill helpers which deal with reducing
the CPU cost of emitting hundreds
On Tue, Oct 8, 2024 at 11:30 AM Shashank Sharma wrote:
>
> Currently, the shadow FW space size and alignment information is
> protected under a flag (adev->gfx.cp_gfx_shadow) which gets set
> only in case of SRIOV setups.
> if (amdgpu_sriov_vf(adev))
> adev->gfx.cp_gfx_shadow = true;
>
> B
On 10/8/2024 11:05, Mark Pearson wrote:
For the series, we tested at Lenovo and it fixed a couple of different issues
we had seen and reported on different HW models.
- issue with setting 1600 x 1200 on Z16 G2
- issue with frequency setting being incorrect on T14 G4 AMD with OLED panels
I d
On Tue, Oct 8, 2024 at 11:18 AM Tvrtko Ursulin wrote:
>
> From: Tvrtko Ursulin
>
> I've noticed there is really a lot of places which write addresses into
> the ring as two writes of lower_32_bits() followed by upper_32_bits().
>
> Is it worth adding a helper to do those in one go?
>
> It shrinks
On Tue, Oct 8, 2024 at 11:10 AM Christian König
wrote:
>
> Am 08.10.24 um 17:05 schrieb Tvrtko Ursulin:
> > From: Tvrtko Ursulin
> >
> > Similar to the previous patch but with the addition of a magic bit1 set on
> > big endian platforms. No idea what it is but maybe adding a helper and
> > giving
[AMD Official Use Only - AMD Internal Distribution Only]
> -Original Message-
> From: SHANMUGAM, SRINIVASAN
> Sent: Tuesday, October 8, 2024 9:51 AM
> To: Koenig, Christian ; Deucher, Alexander
>
> Cc: amd-gfx@lists.freedesktop.org; SHANMUGAM, SRINIVASAN
> ; Joshi, Mukul ;
> Kasiviswanat
Currently, the shadow FW space size and alignment information is
protected under a flag (adev->gfx.cp_gfx_shadow) which gets set
only in case of SRIOV setups.
if (amdgpu_sriov_vf(adev))
adev->gfx.cp_gfx_shadow = true;
But we need this information for GFX Userqueues, so that user can
create
Reviewed-by: Christian König for the entire
series.
Am 08.10.24 um 15:34 schrieb Sunil Khatri:
*** BLURB HERE ***
Sunil Khatri (6):
drm/amdgpu: optimize insert_nop using multi dwords
drm/amdgpu: optimize fn gfx_v9_4_3_ring_insert_nop
drm/amdgpu: optimize fn gfx_v9_ring_insert_nop
Am 08.10.24 um 17:05 schrieb Tvrtko Ursulin:
From: Tvrtko Ursulin
Similar to the previous patch but with the addition of a magic bit1 set on
big endian platforms. No idea what it is but maybe adding a helper and
giving both it and the magic bit a proper name would be worth it.
As far as I kno
From: Tvrtko Ursulin
I've noticed there is really a lot of places which write addresses into
the ring as two writes of lower_32_bits() followed by upper_32_bits().
Is it worth adding a helper to do those in one go?
It shrinks the source and binary a bit but is the readability better, or
worse?
From: Tvrtko Ursulin
Similarly as in the previous patch, we add a new amdgpu_ring_fill2x32()
helper which can write out the nops more efficiently using memset64().
This should have a lesser effect than the previous patch, given how the
affected rings have at most 64 dword alignment restriction,
From: Tvrtko Ursulin
Similar to the previous patch but with the addition of a magic bit1 set on
big endian platforms. No idea what it is but maybe adding a helper and
giving both it and the magic bit a proper name would be worth it.
Signed-off-by: Tvrtko Ursulin
Cc: Christian König
Cc: Sunil K
From: Tvrtko Ursulin
Having noticed that typically 200+ nops per submission are written into
the ring, using a rather verbose one-nop-at-a-time-plus-ring-buffer-
arithmetic as done in amdgpu_ring_write(), the obvious idea was to
improve it by filling those nops in blocks.
This patch therefore ad
From: Tvrtko Ursulin
I've noticed the hardware ring padding optimisations have landed so I decided
to respin the CPU side optimisations.
First two patches are simply adding ring fill helpers which deal with reducing
the CPU cost of emitting hundreds of nops from the for-amdgpu_ring_write loops.
Hi Dave, Simona,
Fixes for 6.12.
The following changes since commit 5b272bf7dcf969eb4f19ef994b6e60458ee6300f:
Merge tag 'drm-xe-fixes-2024-10-03' of
https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes (2024-10-04
11:00:39 +1000)
are available in the Git repository at:
https://git
Add dynamic NPS switch support for GC 9.4.3 variants. Only GC v9.4.3 and
GC v9.4.4 currently support this. NPS switch is only supported if an SOC
supports multiple NPS modes.
Signed-off-by: Lijo Lazar
Signed-off-by: Rajneesh Bhardwaj
Reviewed-by: Feifei Xu
---
v2: Add NULL check for is_nps_swit
The `kfd_get_cu_occupancy` function previously declared a large
`cu_occupancy` array as a local variable, which could lead to stack
overflows due to excessive stack usage. This commit replaces the static
array allocation with dynamic memory allocation using `kcalloc`,
thereby reducing the stack siz
On Tue, Oct 8, 2024 at 4:20 AM Tvrtko Ursulin wrote:
>
>
> On 07/10/2024 15:39, Alex Deucher wrote:
> > On Mon, Oct 7, 2024 at 8:52 AM Tvrtko Ursulin
> > wrote:
> >>
> >>
> >> On 04/10/2024 15:15, Alex Deucher wrote:
> >>> Applied. Thanks!
> >>
> >> Thanks Alex!
> >>
> >> Could you perhaps also
Optimize gfx_v11_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/driv
Optimize gfx_v12_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/driv
Optimize the ring_insert_nop fn for n dwords in one
step rather then call to amdgpu_ring_write for each
nop packet. This avoid function call for each nop
packet and also wptr is updated once only.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 22 +++--
Optimize gfx_v9_4_3_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/
Optimize gfx_v9_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/driver
*** BLURB HERE ***
Sunil Khatri (6):
drm/amdgpu: optimize insert_nop using multi dwords
drm/amdgpu: optimize fn gfx_v9_4_3_ring_insert_nop
drm/amdgpu: optimize fn gfx_v9_ring_insert_nop
drm/amdgpu: optimize fn gfx_v10_ring_insert_nop
drm/amdgpu: optimize fn gfx_v11_ring_insert_nop
drm/
Optimize gfx_v10_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/driv
This patch addresses a double unlock issue in the amdgpu_mes_add_ring
function. The mutex was being unlocked twice under certain error
conditions, which could lead to undefined behavior.
The fix ensures that the mutex is unlocked only once before jumping to
the clean_up_memory label. The unlock op
Optimize gfx_v12_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/driv
Optimize gfx_v10_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/driv
Optimize the ring_insert_nop fn for n dwords in one
step rather then call to amdgpu_ring_write for each
nop packet. This avoid function call for each nop
packet and also wptr is updated once only.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c | 22 +++--
Optimize gfx_v9_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/driver
Optimize gfx_v9_4_3_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/
Optimize gfx_v11_ring_insert_nop() to call
optimized version of amdgpu_ring_insert_nop
instead of calling amdgpu_ring_write for number
of nop times.
Signed-off-by: Sunil Khatri
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/driv
On Mon, 7 Oct 2024 at 20:49, Laurent Pinchart
wrote:
>
> Hi Ulf,
>
> On Fri, Oct 04, 2024 at 04:38:36PM +0200, Ulf Hansson wrote:
> > On Fri, 4 Oct 2024 at 11:41, Sakari Ailus
> > wrote:
> > >
> > > Hello everyone,
> > >
> > > This set will switch the users of pm_runtime_put_autosuspend() to
> >
On 07/10/2024 15:39, Alex Deucher wrote:
On Mon, Oct 7, 2024 at 8:52 AM Tvrtko Ursulin wrote:
On 04/10/2024 15:15, Alex Deucher wrote:
Applied. Thanks!
Thanks Alex!
Could you perhaps also merge
https://lore.kernel.org/amd-gfx/20240813135712.82611-1-tursu...@igalia.com/
via your tree? I
Hi All,
I have released the RC2 of kernel 6.12 with Christian Koenig’s patch for the
X1000 and X5000.
Download and further information:
https://github.com/chzigotzky/kernels/releases/tag/v6.12.0-rc2
Please test the kernels because of the second Radeon DRM driver issue.
Thanks,
Christian
> Am
Hi Christian,
I am not sure if I correctly understood what you meant, just to clarify
When you say this
>No, all of this are numerical problems where not taken into account the
>size of the destination type.
>Saying that all of that are basically just style cleanups which doesn't
>need to be ba
Hi,
On 7-Oct-24 8:36 PM, Alex Deucher wrote:
> Add a few people.
Thank you.
> This should fix the radeon ttm gem conversion.
>
> On Mon, Oct 7, 2024 at 2:33 PM Christian König
> wrote:
>>
>> Make sure to always set the GEM function pointer even for in kernel
>> allocations. This fixes a NULL po
On Tue, 8 Oct 2024 at 00:25, Laurent Pinchart
wrote:
>
> Hi Ulf,
>
> On Tue, Oct 08, 2024 at 12:08:24AM +0200, Ulf Hansson wrote:
> > On Mon, 7 Oct 2024 at 20:49, Laurent Pinchart wrote:
> > > On Fri, Oct 04, 2024 at 04:38:36PM +0200, Ulf Hansson wrote:
> > > > On Fri, 4 Oct 2024 at 11:41, Sakari
On Tue, Oct 8, 2024 at 12:00 AM Sunil Khatri wrote:
>
> "build failure after merge of the amdgpu tree"
> dm_suspend/dm_resume functions argument mismatch
> not caught in validation as it was under config
> CONFIG_DEBUG_KERNEL_DC which wasnt enabled by
> default.
>
> Change argument from adev to ip
On Tue, Oct 08, 2024 at 08:46:01AM +0200, Christian König wrote:
Hi Sasha,
Am 04.10.24 um 20:17 schrieb Sasha Levin:
From: Christian König
[ Upstream commit 7181faaa4703705939580abffaf9cb5d6b50dbb7 ]
This was only used as workaround for recovering the page tables after
VRAM was lost and is n
Add support for the drm_panic module, which displays a pretty user
friendly message on the screen when a Linux kernel panic occurs.
It should work on all readeon using amdgpu_dm_plane.c, when the
framebuffer is linear (like when in a VT). For tiled framebuffer, it
will only work on radeon with dcn
Only build client code if DRM_CLIENT has been selected. Automatially
do so if one of the default clients has been enabled. If client support
has been disabled, the helpers for client-related events are empty and
the regular client functions are not present.
Amdgpu has an internal DRM client, so it
Fbdev emulation for SHMEM and TTM requires helpers from the fbdev
subsystem. Select them from the modules that use them instead of the
core DRM module.
Signed-off-by: Thomas Zimmermann
---
drivers/gpu/drm/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/d
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