RE: [PATCH] drm/amdgpu: keep init xcc0 for all xccs under sriov

[AMD Official Use Only - AMD Internal Distribution Only] Hi Lijo, Yes, you're right. The WREG32_SOC15_RLC/WREG32_SOC15 implementation are not correct. Actually even didn't select right xcc_id for KIQ access. In amdgpu_sriov_wreg/rreg function, we should add normalization handling for GC_HWIP

Re: [PATCH] drm/amdgpu: keep init xcc0 for all xccs under sriov

On 6/17/2024 8:58 AM, Chang, HaiJun wrote: > [AMD Official Use Only - AMD Internal Distribution Only] > > > Hi Lijo, > >   > > Right, 18bits are byte aligned range of local XCC register, 16bites are > dword aligned offset range > >   > > We find the normalization needs to be applied to man

RE: [PATCH] drm/amdgpu: keep init xcc0 for all xccs under sriov

[AMD Official Use Only - AMD Internal Distribution Only] Hi Lijo, Right, 18bits are byte aligned range of local XCC register, 16bites are dword aligned offset range We find the normalization needs to be applied to many functions, like * KIQ: amdgpu_kiq_r/wreg/ * RLC: amdgpu_virt_rlcg_r

Re: [PATCH v3] drm/fb-helper: Detect when lid is closed during initialization

m-misc drm-misc-next patch link: https://lore.kernel.org/r/20240613051700.1112-1-mario.limonciello%40amd.com patch subject: [PATCH v3] drm/fb-helper: Detect when lid is closed during initialization config: x86_64-buildonly-randconfig-003-20240614 (https://download.01.org/0day-ci/archiv