Replace kzalloc(n * sizeof(...), ...) with kcalloc(n, sizeof(...), ...)
since kcalloc is the preferred API in case of allocating with multiply.
Fixes the below:
WARNING: Prefer kcalloc over kzalloc with multiply
Cc: Guchun Chen
Cc: Christian König
Cc: Alex Deucher
Cc: "Pan, Xinhui"
Signed-of
On Thursday, August 17th, 2023 at 21:33, Dmitry Baryshkov
wrote:
> We have been looking for a way to document that the corresponding DP
> port is represented by the USB connector on the device.
>
> Consequently, I believe the best way to document it, would be to use
> DisplayPort / USB, when th
Fulfill the SMU13.0.7 support for Wifi RFI mitigation feature.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
---
.../drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 59 +++
1 file changed, 59 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
Fulfill the SMU13.0.0 support for Wifi RFI mitigation feature.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
---
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 3 +
drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 +-
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 3 +
.../gpu/d
To protect PMFW from being overloaded.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 31 +++
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 7 +
2 files changed, 32 insertions(+), 6 deletions(-)
diff --git a/dr
Add those data structures to support Wifi RFI mitigation feature.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
---
.../pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_0.h | 14 +-
.../pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h | 14 +-
.../amd/pm/swsmu/inc/pmfw
With WBRF feature supported, as a driver responding to the frequencies,
amdgpu driver is able to do shadow pstate switching to mitigate possible
interference(between its (G-)DDR memory clocks and local radio module
frequency bands used by Wifi 6/6e/7).
Signed-off-by: Evan Quan
Reviewed-by: Mario
To support the WBRF mechanism, Wifi adapters utilized in the system must
register the frequencies in use(or unregister those frequencies no longer
used) via the dedicated calls. So that, other drivers responding to the
frequencies can take proper actions to mitigate possible interference.
Co-devel
The newly added WBRF feature needs this interface for channel
width calculation.
Signed-off-by: Evan Quan
--
v8->v9:
- correct typo(Mhz -> MHz) (Johnson)
---
include/net/cfg80211.h | 8
net/wireless/chan.c| 3 ++-
2 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/incl
AMD has introduced an ACPI based mechanism to support WBRF for some
platforms with AMD dGPU + WLAN. This needs support from BIOS equipped
with necessary AML implementations and dGPU firmwares.
For those systems without the ACPI mechanism and developing solutions,
user can use/fall-back the generic
Due to electrical and mechanical constraints in certain platform designs
there may be likely interference of relatively high-powered harmonics of
the (G-)DDR memory clocks with local radio module frequency bands used
by Wifi 6/6e/7.
To mitigate this, AMD has introduced a mechanism that devices can
Due to electrical and mechanical constraints in certain platform designs there
may be likely interference of relatively high-powered harmonics of the (G-)DDR
memory clocks with local radio module frequency bands used by Wifi 6/6e/7. To
mitigate possible RFI interference producers can advertise the
Two small comments:
On Mon, 2023-08-07 at 10:56 +0800, Wayne Lin wrote:
> [Why]
> Today, the allocation/deallocation steps and status is a bit unclear.
>
> For instance, payload->vc_start_slot = -1 stands for "the failure of
> updating DPCD payload ID table" and can also represent as "payload is
On Mon, 2023-08-07 at 18:59 +0300, Imre Deak wrote:
> On Mon, Aug 07, 2023 at 02:43:02AM +, Lin, Wayne wrote:
> > [AMD Official Use Only - General]
> >
> > > -Original Message-
> > > From: Imre Deak
> > > Sent: Friday, August 4, 2023 11:32 PM
> > > To: Lin, Wayne
> > > Cc: dri-de...@
On 2023-08-17 07:08, Horace Chen wrote:
[What]
Current SRIOV still using adev->clock.default_XX which gets from
atomfirmware. But these fields are abandoned in atomfirmware long ago.
Which may cause function to return a 0 value.
[How]
We don't need to check whether SR-IOV. For SR-IOV one-vf-mode
On 2023-08-16 14:44, Alex Sierra wrote:
if hmm_range_get_pages returns EBUSY error during
svm_range_validate_and_map, within the context of a page fault
interrupt. This should retry through svm_range_restore_pages
callback. Therefore we treat this as EAGAIN error instead, and defer
it to restore
The argument passed to _insert_nop is a uint32_t, and the loop
counts to a regular integer. In the event of the argument being
larger than the maximum integer size, the regular integer would
become negative, and never reach the count number.
So, match the type to prevent an infinite loop.
Signed-
Simon, Laurent,
On 03/08/2023 23:46, Simon Ser wrote:
On Thursday, August 3rd, 2023 at 22:44, Laurent Pinchart
wrote:
On Thu, Aug 03, 2023 at 03:31:16PM +, Simon Ser wrote:
On Thursday, August 3rd, 2023 at 17:22, Simon Ser cont...@emersion.fr wrote:
The KMS docs describe "subconnecto
Even if there's nothing currently parsing amdgpu's coredump files, if
we eventually have such tools they will be glad to find a version field
to properly read the file.
Create a version number to be displayed on top of coredump file, to be
incremented when the file format or content get changed.
Giving that we use codedump just for device resets, move it's functions
and structs to a more semantic file, the amdgpu_reset.{c, h}.
Signed-off-by: André Almeida
---
v5: no change
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 9 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 78 --
To better organize struct amdgpu_device, keep all reset information
related fields together in a separated struct.
Signed-off-by: André Almeida
---
v5: new patch, as requested by Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 34 +
drivers/gpu/drm/amd/amdgp
Instead of storing coredump information inside amdgpu_device struct,
move if to a proper separated struct and allocate it dynamically. This
will make it easier to further expand the logged information.
Signed-off-by: André Almeida
---
v5: no change
v4: change kmalloc to kzalloc
---
drivers/gpu/d
Hi,
The patches of this set are a rework to alloc devcoredump dynamically and to
move it to a better source file.
Thanks,
André
Changelog:
v4:
https://lore.kernel.org/dri-devel/20230815195100.294458-1-andrealm...@igalia.com/
- New patch to encapsulate all reset info in a struct
v3:
h
During a GPU reset, a normal memory reclaim could block to reclaim
memory. Giving that coredump is a best effort mechanism, it shouldn't
disturb the reset path. Change its memory allocation flag to a
nonblocking one.
Signed-off-by: André Almeida
Reviewed-by: Christian König
---
v5: no change
---
From: benl
Add initial gfxhub 11.5 support.
Signed-off-by: benl
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 3 +-
drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c | 517
drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.h | 29 ++
drivers/gpu/drm/a
From: Prike Liang
Add to IP discovery table.
Signed-off-by: Prike Liang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discover
From: Lang Yu
Add initial implementation for mmhub 3.3.0.
v2: squash in client id fix (Alex)
Signed-off-by: Lang Yu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 4 +
drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c | 590
Add support for gfxhub 11.5 and mmhub 3.3
support to the GMC (Graphics Memory Controller)
11 code.
The register headers in patch 1 are too
big for the mailing list.
Lang Yu (2):
drm/amdgpu: add mmhub 3.3.0 headers
drm/amdgpu: add mmhub 3.3.0 support
Prike Liang (1):
drm/amdgpu: enable gmc1
From: Prike Liang
Initalize gfx 11.5.0 and set gfx hw configuration.
Signed-off-by: Prike Liang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/
From: Prike Liang
Add to IP discovery table.
Signed-off-by: Prike Liang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discover
From: Aaron Liu
Add imu firmware support for gc_11_5_0.
Signed-off-by: Aaron Liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/imu_v11_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/imu_v11_0.c
index 4a
From: Aaron Liu
Add scheduler and kiq firmware support for gc_11_5_0.
Signed-off-by: Aaron Liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mes_v11_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/mes
From: Lang Yu
Add to IP discovery table.
Signed-off-by: Lang Yu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
inde
From: Lang Yu
Enable KFD for GC 11.5.0.
Signed-off-by: Lang Yu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 1 +
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 7 +++
2 files changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
b/drivers/gp
From: Aaron Liu
Initialize golden setting for gc_11_5_0.
v2: squash in latest golden updates (Alex)
Signed-off-by: Aaron Liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/a
Add support for GFX 11.5. Add the relevant
changes to the existing GFX 11 code.
The register headers in patch 1 are too large
for the mailing list.
Aaron Liu (3):
drm/amdgpu: add golden setting for gc_11_5_0
drm/amdgpu: add imu firmware support for gc_11_5_0
drm/amdgpu: add mes firmware su
From: Prike Liang
Initialize vram attribute and VMHUB for GC 11.5.0.
Signed-off-by: Prike Liang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 47762f08697484cf0c2f2904b8c52375ed26c8cb Add linux-next specific
files for 20230817
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202307281049.40t8s0uv-...@intel.com
https
On 17/08/2023 17:38, André Almeida wrote:
Em 17/08/2023 12:26, Shashank Sharma escreveu:
On 17/08/2023 17:17, André Almeida wrote:
Em 17/08/2023 12:04, Shashank Sharma escreveu:
On 17/08/2023 15:45, André Almeida wrote:
Hi Shashank,
Em 17/08/2023 03:41, Shashank Sharma escreveu:
Hel
Em 17/08/2023 12:26, Shashank Sharma escreveu:
On 17/08/2023 17:17, André Almeida wrote:
Em 17/08/2023 12:04, Shashank Sharma escreveu:
On 17/08/2023 15:45, André Almeida wrote:
Hi Shashank,
Em 17/08/2023 03:41, Shashank Sharma escreveu:
Hello Andre,
On 15/08/2023 21:50, André Almeid
On 8/17/23 15:46, Harry Wentland wrote:
> On 2023-08-17 09:44, Harry Wentland wrote:
>> On 2023-08-17 06:53, Simon Ser wrote:
>>> The commit 1347385fe187 ("drm/amd/display: don't expose rotation
>>> prop for cursor plane") removed the rotation property for the
>>> cursor plane, assuming the cursor
On Thursday, August 17th, 2023 at 15:46, Harry Wentland
wrote:
> On 2023-08-17 09:44, Harry Wentland wrote:
>
> > On 2023-08-17 06:53, Simon Ser wrote:
> >
> > > The commit 1347385fe187 ("drm/amd/display: don't expose rotation
> > > prop for cursor plane") removed the rotation property for the
On 17/08/2023 17:17, André Almeida wrote:
Em 17/08/2023 12:04, Shashank Sharma escreveu:
On 17/08/2023 15:45, André Almeida wrote:
Hi Shashank,
Em 17/08/2023 03:41, Shashank Sharma escreveu:
Hello Andre,
On 15/08/2023 21:50, André Almeida wrote:
Instead of storing coredump information
Em 17/08/2023 12:04, Shashank Sharma escreveu:
On 17/08/2023 15:45, André Almeida wrote:
Hi Shashank,
Em 17/08/2023 03:41, Shashank Sharma escreveu:
Hello Andre,
On 15/08/2023 21:50, André Almeida wrote:
Instead of storing coredump information inside amdgpu_device struct,
move if to a pr
On 17/08/2023 15:45, André Almeida wrote:
Hi Shashank,
Em 17/08/2023 03:41, Shashank Sharma escreveu:
Hello Andre,
On 15/08/2023 21:50, André Almeida wrote:
Instead of storing coredump information inside amdgpu_device struct,
move if to a proper separated struct and allocate it dynamically.
[AMD Official Use Only - General]
Reviewed-by: Zhigang Luo
-Original Message-
From: Dhume, Samir
Sent: Wednesday, August 16, 2023 9:20 PM
To: amd-gfx@lists.freedesktop.org
Cc: Luo, Zhigang ; Liu, Leo ; Deucher,
Alexander ; Dhume, Samir
Subject: [PATCH] drm/amdgpu/jpeg - skip change of
On 2023-08-17 09:58, Alex Deucher wrote:
> On Thu, Aug 17, 2023 at 8:45 AM Alex Hung wrote:
>>
>> From: Harry Wentland
>>
>> [WHAT]
>> Prepare a virtual connector for writeback.
>
> I presume the main point of virtual connectors in DC is for writeback?
> Would there be a case where the virtu
On Thu, Aug 17, 2023 at 8:45 AM Alex Hung wrote:
>
> From: Harry Wentland
>
> [WHAT]
> Prepare a virtual connector for writeback.
I presume the main point of virtual connectors in DC is for writeback?
Would there be a case where the virtual type would be mis-interpreted
in DC as something else?
On 2023-08-17 09:44, Harry Wentland wrote:
> On 2023-08-17 06:53, Simon Ser wrote:
>> The commit 1347385fe187 ("drm/amd/display: don't expose rotation
>> prop for cursor plane") removed the rotation property for the
>> cursor plane, assuming the cursor would always be displayed without
>> any ro
Hi Shashank,
Em 17/08/2023 03:41, Shashank Sharma escreveu:
Hello Andre,
On 15/08/2023 21:50, André Almeida wrote:
Instead of storing coredump information inside amdgpu_device struct,
move if to a proper separated struct and allocate it dynamically. This
will make it easier to further expand t
On 2023-08-17 06:53, Simon Ser wrote:
> The commit 1347385fe187 ("drm/amd/display: don't expose rotation
> prop for cursor plane") removed the rotation property for the
> cursor plane, assuming the cursor would always be displayed without
> any rotation. However the rotation is inherited from the u
Don't assume that only the driver would be accessing LNKCTL2. In the
case of upstream (parent), the driver does not even own the device it's
changing the registers for.
Use RMW capability accessors which do proper locking to avoid losing
concurrent updates to the register value. This change is als
Buffer 'afmt_status' of size 6 could overflow, since index 'afmt_idx' is
checked after access.
Fixes: 5cc4e5fc293b ("drm/radeon: Cleanup HDMI audio interrupt handling for
evergreen")
Co-developed-by: Ivanov Mikhail
Signed-off-by: Konstantin Meskhidze
---
drivers/gpu/drm/radeon/evergreen.c | 7
Don't assume that only the driver would be accessing LNKCTL2. In the
case of upstream (parent), the driver does not even own the device it's
changing the registers for.
Use RMW capability accessors which do proper locking to avoid losing
concurrent updates to the register value. This change is als
[What]
Current SRIOV still using adev->clock.default_XX which gets from
atomfirmware. But these fields are abandoned in atomfirmware long ago.
Which may cause function to return a 0 value.
[How]
We don't need to check whether SR-IOV. For SR-IOV one-vf-mode,
pm is enabled and VF is able to read dpm
Allow user-space to use the cursor plane with a rotated underlying
plane under the condition that both planes have the same rotation.
Signed-off-by: Simon Ser
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Nicholas Kazlauskas
Cc: Michel Dänzer
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
We don't want a semi-transparent overlay to make the cursor plane
semi-transparent as well. Same for the pixel blend mode.
Signed-off-by: Simon Ser
Cc: Alex Deucher
Cc: Harry Wentland
Cc: Nicholas Kazlauskas
Cc: Michel Dänzer
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +++
The commit 1347385fe187 ("drm/amd/display: don't expose rotation
prop for cursor plane") removed the rotation property for the
cursor plane, assuming the cursor would always be displayed without
any rotation. However the rotation is inherited from the underlying
plane.
As a result, if the primary
The cursor plane can't be displayed if the underlying pipe isn't
using an RGB format. Reject such atomic commits so that user-space
can have a fallback instead of an invisible cursor.
In theory we could support YUV if the cursor is also YUV, but at the
moment only ARGB cursors are supported.
Changes in v3: rebase, split cursor rotation patch into 2.
Simon Ser (4):
amd/display: add cursor check for YUV underlying pipe
amd/display: add cursor alpha and blend mode checks
amd/display: add cursor rotation check
amd/display: re-introduce cursor plane rotation prop
.../gpu/drm/amd/
On 8/17/23 12:37, Michel Dänzer wrote:
> On 8/15/23 20:57, André Almeida wrote:
>> From: Pekka Paalanen
>>
>> Specify how the atomic state is maintained between userspace and
>> kernel, plus the special case for async flips.
>>
>> Signed-off-by: Pekka Paalanen
>> Signed-off-by: André Almeida
>
On 8/15/23 20:57, André Almeida wrote:
> From: Pekka Paalanen
>
> Specify how the atomic state is maintained between userspace and
> kernel, plus the special case for async flips.
>
> Signed-off-by: Pekka Paalanen
> Signed-off-by: André Almeida
[...]
> +An atomic commit with the flag DRM_MOD
Why is this patch marked as rejected in patchwork? Something like this seems
required for a Wayland compositor to use the HW cursor with rotated
primary/overlay planes.
On 3/10/21 15:50, Simon Ser wrote:
> The commit 1347385fe187 ("drm/amd/display: don't expose rotation
> prop for cursor plan
for older BIOS, smu won't fill average field of gpu_metrics_table, so we acquire
average_* from current field. but now average value is available in
gpu_metrics_v2_4
Signed-off-by: Kun Liu
---
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c | 24 +--
1 file changed, 12 insertions(
[AMD Official Use Only - General]
Series is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Kamal, Asad
Sent: Wednesday, August 16, 2023 20:32
To: amd-gfx@lists.freedesktop.org
Cc: Lazar, Lijo ; Zhang, Morris ;
Kamal, Asad ; Ma, Le ; Zhang, Hawking
; Lazar, Lijo
[AMD Official Use Only - General]
Hi, @Christian König
Any updates for the fix?
Recently we found that there will be a page fault after FLR, since an SDMA job
in the pending list was dropped without forwarding fence errors.
Best,
Zhenguo
Cloud-GPU Core team, SRDC
-Original Message-
Fr
On 8/14/2023 8:28 PM, Shashank Sharma wrote:
Hey Arvind,
On 14/08/2023 09:34, Arvind Yadav wrote:
This patch adds a function which will allow to
change the GPU power profile based on a submitted job.
This can optimize the power performance when the
workload is on.
Cc: Shashank Sharma
Cc: Ch
On 8/14/2023 9:35 PM, Shashank Sharma wrote:
Ah, Thanks for pointing that out Alex.
@Arvind, please refer to the patch
(https://patchwork.freedesktop.org/patch/504854/?series=109060&rev=4)
in previous series of SMU workload hints with UAPI (here:
https://patchwork.freedesktop.org/series/109
On 8/14/2023 8:03 PM, Alex Deucher wrote:
On Mon, Aug 14, 2023 at 3:35 AM Arvind Yadav wrote:
This patch adds a function which will allow to
change the GPU power profile based on a submitted job.
This can optimize the power performance when the
workload is on.
A few minor comments inline bel
The val is defined as unsigned int type, if(val<0) is invalid, modify
to int type.
drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_pm.c:2813
amdgpu_hwmon_show_power_input() warn: unsigned 'val' is never less than zero.
drivers/gpu/drm/amd/amdgpu/../pm/amdgpu_pm.c:2800 amdgpu_hwmon_show_power_avg()
warn:
amdgpu_vm is not used in amdgpu_vmid_grab_idle.
Signed-off-by: Yifan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
index ff1ea99292fb..
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