[PATCH] drm/amd/display: Fix useless else if in display_mode_vba_util_32.c

The assignment of the else if and else branches is the same, so the else if here is redundant, hence removed it. Fixes the below: drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c:4664:8-10: WARNING: possible condition with no effect (if == else) Cc: Hamza Mahfooz Cc: Harry W

[PATCH 3/3] drm/amdgpu: Update ternary operator with min() in 'amdgpu_ras_eeprom_init'

Fixes the following coccicheck: drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c:1412:12-13: WARNING opportunity for min() Cc: Christian König Cc: Alex Deucher Signed-off-by: Srinivasan Shanmugam --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras_eeprom.c | 2 +- 1 file changed, 1 insertion(+), 1 delet

[PATCH 2/3] drm/amdgpu: Update ternary operator with max() in 'amdgpu_fence_wait_polling'

Fixes the following coccicheck: drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c:384:16-17: WARNING opportunity for max() Cc: Christian König Cc: Alex Deucher Signed-off-by: Srinivasan Shanmugam --- drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) dif

[PATCH 1/3] drm/amd/display: Update ternary operator with min() in 'do_aquire_global_lock'

Fixes the following coccicheck: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:9079:12-13: WARNING opportunity for min() Cc: Hamza Mahfooz Cc: Harry Wentland Cc: Rodrigo Siqueira Cc: Aurabindo Pillai Cc: Alex Deucher Cc: Christian König Signed-off-by: Srinivasan Shanmugam --- drivers/

[PATCH 0/3] Fixup some coccicheck warnings

Srinivasan Shanmugam (3): drm/amd/display: Update ternary operator with min() in 'do_aquire_global_lock' drm/amdgpu: Update ternary operator with max() in 'amdgpu_fence_wait_polling' drm/amdgpu: Update ternary operator with min() in 'amdgpu_ras_eeprom_init' drivers/gpu/drm/amd

[PATCH 16/16] drm/amd/display: 3.2.248

From: Aric Cyr This version brings along following fixes: - Ensure FS is enabled before sending request to DMUB for FS changes - Add check for PMFW hard min request complete - Save addr update in scratch before flip - Fix static screen detection setting - Write flip addr to scratch reg for subvp

[PATCH 15/16] drm/amd/display: [FW Promotion] Release 0.0.180.0

From: Anthony Koo - Remove unused flag otg_powered_down Acked-by: Wayne Lin Signed-off-by: Anthony Koo --- drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 5 - 1 file changed, 5 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dm

[PATCH 14/16] drm/amd/display: ensure FS is enabled before sending request to DMUB for FS changes

From: Samson Tam [Why] ignore_msa_timing_param indicates FS is capable but not necessarily enabled [How] add check for either allow_freesync or vrr_active_variable to confirm FS is enabled Reviewed-by: Alvin Lee Acked-by: Wayne Lin Signed-off-by: Samson Tam --- drivers/gpu/drm/amd/display/

[PATCH 13/16] drm/amd/display: add check for PMFW hard min request complete

From: Samson Tam [Why] When we issue hard min request to PMFW, the ack back does not guarantee the request has been fulfilled. [How] Add new PMFW message to check if the hard min request has been completed. Returned bit mask indicates which clock requests are completed. Check PMFW version before

[PATCH 12/16] drm/amd/display: Save addr update in scratch before flip

From: Alvin Lee [Why & How] Fix a minor sequencing issue where the address update for a subvp flip should be saved in scratch registers before the actual flip Reviewed-by: Austin Zheng Acked-by: Wayne Lin Signed-off-by: Alvin Lee --- drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c | 10

[PATCH 11/16] drm/amd/display: fix static screen detection setting

From: SungHuai Wang [WHY] OTG_STATIC_SCREEN_EVENT_MASK is changed in DCN3, but we still follow DCN2 to apply setting for OTG_STATIC_SCREEN_EVENT_MASK. [How] Add new function to apply correct settings for DCN3 series. Reviewed-by: Anthony Koo Acked-by: Wayne Lin Signed-off-by: SungHuai Wang -

[PATCH 10/16] drm/amd/display: Write flip addr to scratch reg for subvp

From: Alvin Lee [Description] SubVP needs to "calculate" the earliest in use META address by using the current primary / meta addresses, but this leads to a race condition where FW and driver can read/write the address at the same time and intermittently produce inconsistent address offsets. To m

[PATCH 09/16] drm/amd/display: set minimum of VBlank_nom

From: ChunTao Tso [Why] If VBlank_nom is too small, it will cause VStartUP_Start smaller than VBackPorch + VSync width which is an invalid case for VStartUP_Start and where to send AS-SDP. [How] Setup a minimum value to VBlank_nom Reviewed-by: Reza Amini Acked-by: Wayne Lin Signed-off-by: Chu

[PATCH 08/16] drm/amd/display: Correct unit conversion for vstartup

From: Reza Amini [why] vstartup is calculated to be a large number. it works because it is within vertical blank, but it reduces region of blank that can be used for power gating. [how] Calculation needs to convert micro seconds to number of vertical lines. Reviewed-by: Kazlauskas Nicholas Ack

[PATCH 07/16] drm/amd/display: Roll back unit correction

From: Ovidiu Bunea [why] This Unit correction exposes a Replay corruption. [how] This reverts commit: commit 7d3cedf18068 ("drm/amd/display: Correct unit conversion for vstartup") Roll back unit conversion until Replay can fix their corruption. Fixes: 7d3cedf18068 ("drm/amd/display: Correct un

[PATCH 06/16] drm/amd/display: Enable runtime register offset init for DCN32 DMUB

From: Aurabindo Pillai [Why&How] DMUB subsystem was continuing to use compile time offset calculation for register access. Switch this to runtime calculation to stay consistent with rest of DC code. To enable this, an additional interface init_reg_offsets() are added to DMUB's hw_funcs struct. A

[PATCH 05/16] drm/amd/display: Refactor edp power control

From: Ian Chen [Why & How] To organize the edp power control a bit: 1. add flag in dc_link to indicate dc to skip all implicit eDP power control. 2. add edp_set_panel_power link service for DM to call. Reviewed-by: Aric Cyr Reviewed-by: Jun Lei Acked-by: Wayne Lin Signed-off-by: Ian Chen --

[PATCH 04/16] drm/amd/display: PQ regamma end point

From: Krunoslav Kovac [WHY & HOW] PQ has a fixed range of 0-10,000 nits. Using 1=80 nits normalization, PQ should map to 1.0 for X=125.0 HW LUT used for interpolation does not have X=125 so it's interpolated. However, we cap Y to 1 for all X>=125. The closest larger HW point is 128. What we want

[PATCH 03/16] drm/amd/display: PQ tail accuracy

From: Krunoslav Kovac [WHY & HOW] HW LUTs changed slightly in DCN3: 256 base+slope pairs were replaced by 257 bases. Code was still calculating all 256 base+slope and then creating 257th pt as last base + last slope. This was done in wrong format, and then "fixed" it by making the last two points

[PATCH 02/16] drm/amd/display: Blank phantom OTG before enabling

From: Alvin Lee [Why & How] Before enabling the phantom OTG for an update we must enable DPG to avoid underflow. Reviewed-by: Samson Tam Acked-by: Wayne Lin Signed-off-by: Alvin Lee --- drivers/gpu/drm/amd/display/dc/core/dc.c | 50 +-- .../drm/amd/display/dc/dcn20/dcn20

[PATCH 01/16] drm/amd/display: Expose mall capability

From: Aurabindo Pillai [Why&How] Export a debugfs file to report whether MALL cache is supported by the asic or not. Reviewed-by: Hersen Wu Acked-by: Wayne Lin Signed-off-by: Aurabindo Pillai --- .../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 19 +++ 1 file changed, 19 inser

[PATCH 00/16] DC Patches August 18, 2023

This DC patchset brings improvements in multiple areas. In summary, we have: - Ensure FS is enabled before sending request to DMUB for FS changes - Add check for PMFW hard min request complete - Save addr update in scratch before flip - Fix static screen detection setting - Write flip addr to scra

Re: [PATCH v2] drm/amdgpu: register a dirty framebuffer callback for fbcon

Am 15.08.23 um 19:26 schrieb Hamza Mahfooz: fbcon requires that we implement &drm_framebuffer_funcs.dirty. Otherwise, the framebuffer might take a while to flush (which would manifest as noticeable lag). However, we can't enable this callback for non-fbcon cases since it might cause too many a

Re: [PATCH] drm/amdgpu: register a dirty framebuffer callback for fbcon

Am 15.08.23 um 19:10 schrieb Hamza Mahfooz: fbcon requires that we implement &drm_framebuffer_funcs.dirty. Otherwise, the framebuffer might take awhile to flush (which would manifest as noticeable lag). However, we can't enable this callback for non-fbcon cases since it might cause too many atomi

RE: [PATCH] drm/amdgpu: Keep reset handlers shared

[AMD Official Use Only - General] Thanks, Lijo -Original Message- From: amd-gfx On Behalf Of Lijo Lazar Sent: Thursday, August 10, 2023 5:14 PM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; Kamal, Asad ; Zhang, Hawking Subject: [PATCH] drm/amdgpu: Keep reset handlers sha

RE: [PATCH] drm/amdgpu: Remove gfxoff check in GFX v9.4.3

[AMD Official Use Only - General] Sorry, for the spam. Please ignore this. Thanks, Lijo -Original Message- From: amd-gfx On Behalf Of Lijo Lazar Sent: Wednesday, August 16, 2023 9:37 AM To: amd-gfx@lists.freedesktop.org Cc: Deucher, Alexander ; s...@canb.auug.org.au; airl...@redhat.com

RE: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC support

[Public] Hi Bokun, Originally the call back is meant to enable fast UCLK switching based on display configuration. We can reuse the same interface to notify PMFW for any display related configuration. smu_v13_0_notify_display_change looks to be copied from smuv11, but not really used now. I th

[PATCH] drm/amdgpu: Remove gfxoff check in GFX v9.4.3

GFXOFF feature is not there for GFX 9.4.3 ASICs. Signed-off-by: Lijo Lazar Reviewed-by: Hawking Zhang --- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index d8d6807

[PATCH] Documentation/gpu: Update amdgpu documentation

7957ec80ef97 ("drm/amdgpu: Add FRU sysfs nodes only if needed") moved the documentation for some of the sysfs nodes to amdgpu_fru_eeprom.c. Update the documentation accordingly. Signed-off-by: Lijo Lazar --- Documentation/gpu/amdgpu/driver-misc.rst | 6 +++--- 1 file changed, 3 insertions(+), 3

RE: [PATCH] drm/amdgpu: Enable ras for mp0 v13_0_6 sriov

[AMD Official Use Only - General] Reviewed-by: Stanley.Yang Regards, Stanley > -Original Message- > From: Chai, Thomas > Sent: Wednesday, August 16, 2023 10:26 AM > To: amd-gfx@lists.freedesktop.org > Cc: Chai, Thomas ; Zhang, Hawking > ; Zhou1, Tao ; Li, > Candice ; Yang, Stanley ; > C

[PATCH] drm/amdgpu: Enable ras for mp0 v13_0_6 sriov

Enable ras for mp0 v13_0_6 sriov Signed-off-by: YiPeng Chai --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index 7689395e44fd..378478cf9c21 100644 --- a/drivers/gpu

[linux-next:master] BUILD REGRESSION 98297fc6ecafc0c7eabc5d869279fb27609fcdc1

tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master branch HEAD: 98297fc6ecafc0c7eabc5d869279fb27609fcdc1 Add linux-next specific files for 20230815 Error/Warning reports: https://lore.kernel.org/oe-kbuild-all/202308081459.us5rlyay-...@intel.com https

RE: [PATCH] drm/amd/pm: allow the user to force BACO on smu v13.0.0/7

[AMD Official Use Only - General] Hi Alex, Right, just BAMACO has its advantage for the fast resume. Maybe later we can further identify which sku needs to save more power vs faster resume time. For example, mobile device can by default use BACO and desktop/workstation device can by default use

[PATCH] Revert "Revert "drm/amdgpu/display: change pipe policy for DCN 2.0""

This reverts commit 27dd79c00aeab36cd7542c7a4481a32549038659. It appears MPC_SPLIT_DYNAMIC still causes problems with multiple displays on DCN2.0 hardware. Switch back to MPC_SPLIT_AVOID_MULT_DISP. This increases power usage with multiple displays, but avoids hangs. Link: https://gitlab.freedesk

[PATCH v4 4/4] drm/amdgpu: Create version number for coredumps

Even if there's nothing currently parsing amdgpu's coredump files, if we eventually have such tools they will be glad to find a version field to properly read the file. Create a version number to be displayed on top of coredump file, to be incremented when the file format or content get changed.

[PATCH v4 3/4] drm/amdgpu: Move coredump code to amdgpu_reset file

Giving that we use codedump just for device resets, move it's functions and structs to a more semantic file, the amdgpu_reset.{c, h}. Signed-off-by: André Almeida --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 9 --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 78 -- driv

[PATCH v4 2/4] drm/amdgpu: Rework coredump to use memory dynamically

Instead of storing coredump information inside amdgpu_device struct, move if to a proper separated struct and allocate it dynamically. This will make it easier to further expand the logged information. Signed-off-by: André Almeida --- v4: change kmalloc to kzalloc --- drivers/gpu/drm/amd/amdgpu/

[PATCH v4 1/4] drm/amdgpu: Allocate coredump memory in a nonblocking way

During a GPU reset, a normal memory reclaim could block to reclaim memory. Giving that coredump is a best effort mechanism, it shouldn't disturb the reset path. Change its memory allocation flag to a nonblocking one. Signed-off-by: André Almeida Reviewed-by: Christian König --- drivers/gpu/drm/

[PATCH v4 0/4] drm/amdgpu: Rework coredump memory allocation

Hi, The patches of this set are a rework to alloc devcoredump dynamically and to move it to a better source file. Thanks, André Changelog: v3: https://lore.kernel.org/dri-devel/20230810192330.198326-1-andrealm...@igalia.com/ - Changed from kmalloc to kzalloc - Dropped "Create a module

[PATCH v6 6/6] drm/doc: Define KMS atomic state set

From: Pekka Paalanen Specify how the atomic state is maintained between userspace and kernel, plus the special case for async flips. Signed-off-by: Pekka Paalanen Signed-off-by: André Almeida --- v5: Add note that not every redundant attribute will result in no-op v4: total rework by Pekka ---

[PATCH v6 5/6] drm: Refuse to async flip with atomic prop changes

Given that prop changes may lead to modesetting, which would defeat the fast path of the async flip, refuse any atomic prop change for async flips in atomic API. The only exceptions are the framebuffer ID to flip to and the mode ID, that could be referring to an identical mode. Signed-off-by: Andr

[PATCH v6 4/6] amd/display: indicate support for atomic async page-flips on DC

From: Simon Ser amdgpu_dm_commit_planes() already sets the flip_immediate flag for async page-flips. This flag is used to set the UNP_FLIP_CONTROL register. Thus, no additional change is required to handle async page-flips with the atomic uAPI. Signed-off-by: Simon Ser Reviewed-by: André Almeid

[PATCH v6 3/6] drm: introduce drm_mode_config.atomic_async_page_flip_not_supported

From: Simon Ser This new field indicates whether the driver has the necessary logic to support async page-flips via the atomic uAPI. This is leveraged by the next commit to allow user-space to use this functionality. All atomic drivers setting drm_mode_config.async_page_flip are updated to also

[PATCH v6 2/6] drm: introduce DRM_CAP_ATOMIC_ASYNC_PAGE_FLIP

From: Simon Ser This new kernel capability indicates whether async page-flips are supported via the atomic uAPI. DRM clients can use it to check for support before feeding DRM_MODE_PAGE_FLIP_ASYNC to the kernel. Make it clear that DRM_CAP_ASYNC_PAGE_FLIP is for legacy uAPI only. Signed-off-by:

[PATCH v6 1/6] drm: allow DRM_MODE_PAGE_FLIP_ASYNC for atomic commits

From: Simon Ser If the driver supports it, allow user-space to supply the DRM_MODE_PAGE_FLIP_ASYNC flag to request an async page-flip. Set drm_crtc_state.async_flip accordingly. Document that drivers will reject atomic commits if an async flip isn't possible. This allows user-space to fall back

[PATCH v6 0/6] drm: Add support for atomic async page-flip

Hi, This work from me and Simon adds support for DRM_MODE_PAGE_FLIP_ASYNC through the atomic API. This feature is already available via the legacy API. The use case is to be able to present a new frame immediately (or as soon as possible), even if after missing a vblank. This might result in teari

Re: [PATCH v2] drm/amdgpu: register a dirty framebuffer callback for fbcon

On 8/15/2023 12:26, Hamza Mahfooz wrote: fbcon requires that we implement &drm_framebuffer_funcs.dirty. Otherwise, the framebuffer might take a while to flush (which would manifest as noticeable lag). However, we can't enable this callback for non-fbcon cases since it might cause too many atomic

RE: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC support

[Public] Hey Lijo, I have considered to combine the function. However notify_display_change() may serve for another purpose as mentioned in the comment: /** * @notify_display_change: Enable fast memory clock switching. * * Allows fo

Re: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC support

[Public] There's already another smu callback - notify_display. This can be accommodated there, no need to add another callback. Thanks, Lijo From: amd-gfx on behalf of Deucher, Alexander Sent: Tuesday, August 15, 2023 11:13:14 PM To: Zhang, Bokun ; amd-gfx@li

RE: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC support

[Public] > -Original Message- > From: amd-gfx On Behalf Of Bokun > Zhang > Sent: Tuesday, August 15, 2023 11:50 AM > To: amd-gfx@lists.freedesktop.org > Cc: Zhang, Bokun ; Quan, Evan > > Subject: [PATCH v2] drm/amdgpu/pm: Add notification function for no DC > support > > - There is a DPM

[PATCH v2] drm/amdgpu: register a dirty framebuffer callback for fbcon

fbcon requires that we implement &drm_framebuffer_funcs.dirty. Otherwise, the framebuffer might take a while to flush (which would manifest as noticeable lag). However, we can't enable this callback for non-fbcon cases since it might cause too many atomic commits to be made at once. So, implement a

[PATCH] drm/amdgpu: register a dirty framebuffer callback for fbcon

fbcon requires that we implement &drm_framebuffer_funcs.dirty. Otherwise, the framebuffer might take awhile to flush (which would manifest as noticeable lag). However, we can't enable this callback for non-fbcon cases since it might cause too many atomic commits to be made at once. So, implement am

Re: [PATCH] drm/amd/pm: allow the user to force BACO on smu v13.0.0/7

On Tue, Aug 15, 2023 at 5:05 AM Kenneth Feng wrote: > > allow the user to force BACO on smu v13.0.0/7 > > Signed-off-by: Kenneth Feng Acked-by: Alex Deucher Would it be better to default to BACO? It would save more power at the expense of resume latency. Alex > --- > drivers/gpu/drm/amd/pm

[PATCH v2] drm/amdgpu/pm: Add notification function for no DC support

- There is a DPM issue where if DC is not present, FCLK will stay at low level. We need to send a SMU message to configure the DPM Reviewed-by: Evan Quan Signed-off-by: Bokun Zhang --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 6 ++ drivers/gpu/drm/amd/pm/swsmu/inc/am

Re: [PATCH] drm/amdgpu/gmc6: fix in case the PCI BAR is larger than the actual amount of vram

Applied. Thanks! On Tue, Aug 15, 2023 at 3:13 AM hongao wrote: > > [why] > limit visible_vram_size to real_vram_size in case > the PCI BAR is larger than the actual amount of vram. > > Signed-off-by: hongao > --- > drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 ++ > 1 file changed, 2 insertions(+)

Re: [PATCH] drm/amdgpu/pm: Add notification function for no DC support

Hi Bokun, On 8/15/23 10:29, Bokun Zhang wrote: - There is a DPM issue where if DC is not present, FCLK will stay at low level. We need to send a SMU message to configure the DPM Signed-off-by: Bokun Zhang Reviewed-by: Evan Quan --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

[PATCH] drm/amdgpu/pm: Add notification function for no DC support

- There is a DPM issue where if DC is not present, FCLK will stay at low level. We need to send a SMU message to configure the DPM Signed-off-by: Bokun Zhang Reviewed-by: Evan Quan --- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 6 ++ drivers/gpu/drm/amd/pm/swsmu/inc/am

[PATCH] drm/amdgpu/gmc6: fix in case the PCI BAR is larger than the actual amount of vram

[why] limit visible_vram_size to real_vram_size in case the PCI BAR is larger than the actual amount of vram. Signed-off-by: hongao --- drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/

[PATCH] drm/amd/pm: allow the user to force BACO on smu v13.0.0/7

allow the user to force BACO on smu v13.0.0/7 Signed-off-by: Kenneth Feng --- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 2 +- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 3 ++- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 3 ++- 3 files changed, 5 insertions(+),

[PATCH 7/8] drm/amd/pm: add fan target temperature OD setting support for SMU13

Add SMU13 fan target temperature OD setting support. Signed-off-by: Evan Quan --- .../gpu/drm/amd/include/kgd_pp_interface.h| 2 + drivers/gpu/drm/amd/pm/amdgpu_pm.c| 45 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 2 + drivers/gpu/drm/amd/pm/swsmu/amdgpu_s

[PATCH 8/8] drm/amd/pm: add fan minimum pwm OD setting support for SMU13

Add SMU13 fan minimum pwm OD setting support. Signed-off-by: Evan Quan --- .../gpu/drm/amd/include/kgd_pp_interface.h| 2 + drivers/gpu/drm/amd/pm/amdgpu_pm.c| 45 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 2 + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

[PATCH 5/8] drm/amd/pm: add fan acoustic limit OD setting support for SMU13

Add SMU13 fan acoustic limit OD setting support. Signed-off-by: Evan Quan --- .../gpu/drm/amd/include/kgd_pp_interface.h| 2 + drivers/gpu/drm/amd/pm/amdgpu_pm.c| 45 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 2 + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

[PATCH 4/8] drm/amd/pm: add fan temperature/pwm curve OD setting support for SMU13

Add SMU13 fan temperature/pwm curve OD setting support. Signed-off-by: Evan Quan --- .../gpu/drm/amd/include/kgd_pp_interface.h| 2 + drivers/gpu/drm/amd/pm/amdgpu_pm.c| 45 ++ drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 2 + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.

[PATCH 6/8] drm/amd/pm: add fan acoustic target OD setting support for SMU13

Add SMU13 fan acoustic target OD setting support. Signed-off-by: Evan Quan --- .../gpu/drm/amd/include/kgd_pp_interface.h| 2 + drivers/gpu/drm/amd/pm/amdgpu_pm.c| 45 drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 2 + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.

[PATCH 0/8] A new set of Linux OD interfaces

The existing OD interface `pp_od_clk_voltage` is unable to meet the growing demands for more OD functionalities. Since the buf used within it comes with size limit as one page. With more OD functionalities added, we will hit that limit soon. To better meet the growing demainds, a new set of OD int

[PATCH 3/8] drm/amd/pm: add fan mode OD setting support for SMU13

Add SMU13 fan mode OD setting support. Signed-off-by: Evan Quan --- .../gpu/drm/amd/include/kgd_pp_interface.h| 4 +- drivers/gpu/drm/amd/pm/amdgpu_pm.c| 189 +- drivers/gpu/drm/amd/pm/inc/amdgpu_dpm.h | 4 + drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

[PATCH 2/8] drm/amdgpu: revise the device initialization sequences

By placing the sysfs interfaces creation after `.late_int`. Since some operations performed during `.late_init` may affect how the sysfs interfaces should be created. Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 37 -- 1 file changed, 21 insertion

[PATCH 1/8] drm/amd/pm: introduce a new set of OD interfaces

There will be multiple interfaces(sysfs files) exposed with each representing a single OD functionality. And all those interface will be arranged in a tree liked hierarchy with the top dir as "gpu_od". Meanwhile all functionalities for the same component will be arranged under the same directory.