[AMD Official Use Only - General]
reset_context is a local variable in amdgpu_ras_do_recovery, if gpu_reset_flag
is not used, read regRLC_RLCS_FED_STATUS_0 register and check sdma fed error
field may move into amdgpu_ras_do_recovery, which may corrupt the code
structure of amdgpu_ras.c.
amdgpu
[AMD Official Use Only - General]
Hi Alex,
Can you help review this patch?
Currently on passthrough, GPU is also on the root bus but it is not APU.
Current driver regard it as APU and limit the PCIE link speed to gen2. It
causes some failure on some OCL benchmark.
Thanks & Regards,
Horace.
--
I think we replaced this with golden timestamp value which doesn't
require GFX register access.
Ah yes; through
5591a051b86b ("drm/amdgpu: refine get gpu clock counter method")
This wasn't part of the kernel this was originally reported on.
I suspect this would significantly decrease the l
On 5/17/2023 12:26 AM, Lazar, Lijo wrote:
On 5/17/2023 10:46 AM, Limonciello, Mario wrote:
On 5/17/2023 12:07 AM, Lazar, Lijo wrote:
On 5/17/2023 10:25 AM, Limonciello, Mario wrote:
On 5/16/2023 11:43 PM, Lazar, Lijo wrote:
On 5/17/2023 5:04 AM, Mario Limonciello wrote:
DCN 3.1.4 s
On 5/17/2023 10:46 AM, Limonciello, Mario wrote:
On 5/17/2023 12:07 AM, Lazar, Lijo wrote:
On 5/17/2023 10:25 AM, Limonciello, Mario wrote:
On 5/16/2023 11:43 PM, Lazar, Lijo wrote:
On 5/17/2023 5:04 AM, Mario Limonciello wrote:
DCN 3.1.4 s2idle entry will hang
occasionally on s2idle
On 5/17/2023 12:07 AM, Lazar, Lijo wrote:
On 5/17/2023 10:25 AM, Limonciello, Mario wrote:
On 5/16/2023 11:43 PM, Lazar, Lijo wrote:
On 5/17/2023 5:04 AM, Mario Limonciello wrote:
DCN 3.1.4 s2idle entry will hang
occasionally on s2idle entry, but only if running Wayland and only
when us
On 5/17/2023 10:25 AM, Limonciello, Mario wrote:
On 5/16/2023 11:43 PM, Lazar, Lijo wrote:
On 5/17/2023 5:04 AM, Mario Limonciello wrote:
DCN 3.1.4 s2idle entry will hang
occasionally on s2idle entry, but only if running Wayland and only
when using `systemctl suspend`, not `echo mem | tee
On 5/16/2023 11:43 PM, Lazar, Lijo wrote:
On 5/17/2023 5:04 AM, Mario Limonciello wrote:
DCN 3.1.4 s2idle entry will hang
occasionally on s2idle entry, but only if running Wayland and only
when using `systemctl suspend`, not `echo mem | tee /sys/power/state`.
This happens because using `syst
On 5/17/2023 5:04 AM, Mario Limonciello wrote:
DCN 3.1.4 s2idle entry will hang
occasionally on s2idle entry, but only if running Wayland and only
when using `systemctl suspend`, not `echo mem | tee /sys/power/state`.
This happens because using `systemctl suspend` will cause the screen
to loc
DCN 3.1.4 is reported to hang on s2idle entry if graphics activity
is happening during entry. This is because GFXOFF was scheduled as
delayed but RLC gets disabled in s2idle entry sequence which will
hang GFX IP if not already in GFXOFF.
To help this problem, flush any delayed work for GFXOFF ear
RLC suspend in s0ix is unncessary as the SMU and IMU jointly
manages graphics power state.
Suggested-by: Alexander Deucher
Signed-off-by: Mario Limonciello
---
v1->v2:
* Skip RLC all the time instead of adding safety to it
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 4 ++--
1 file changed,
DCN 3.1.4 s2idle entry will hang
occasionally on s2idle entry, but only if running Wayland and only
when using `systemctl suspend`, not `echo mem | tee /sys/power/state`.
This happens because using `systemctl suspend` will cause the screen
to lock right before writing mem into /sys/power/state.
T
If GFXOFF was flushed during suspend entry it may take some time
for GFX core to be powered down. Ensure that it's powered off
before continuing any operations that may try to utilize related
IP. This avoids hangs from stopping RLC as well as problems with
fence interrupts timing out during s2idle
[AMD Official Use Only - General]
Hi Lijo,
Yes, the GFX_IMU_MSG_FLAGS is outside of GFXOFF domain. It can be accessed when
GFXOFF is entry.
Best Regards,
Tim Huang
-Original Message-
From: Lazar, Lijo
Sent: Wednesday, May 17, 2023 10:48 AM
To: Limonciello, Mario ;
amd-gfx@lists.fre
[AMD Official Use Only - General]
Shall we just force the mode-2 reset if it is non-fatal error mode? Is the
gpu_reset_flag really necessary in such case?
reset_context.method = AMD_RESET_METHOD_MODE2;
Ideally, driver decides either perform reset or other error handling approach
(i.e. unmap qu
[AMD Official Use Only - General]
Is this register GFX_IMU_MSG_FLAGS outside of GFXOFF domain?
Thanks,
Lijo
-Original Message-
From: amd-gfx On Behalf Of Mario
Limonciello
Sent: Tuesday, May 16, 2023 11:22 PM
To: amd-gfx@lists.freedesktop.org
Cc: Tsao, Anson ; Huang, Tim ; Martinez,
J
On 5/16/2023 4:57 PM, Alex Deucher wrote:
On Tue, May 16, 2023 at 5:50 PM Limonciello, Mario wrote:
On 5/16/2023 4:39 PM, Alex Deucher wrote:
On Tue, May 16, 2023 at 2:15 PM Mario Limonciello
wrote:
On GFX11 if RLC is stopped when not in GFXOFF the system will hang.
Prevent this case from
perform mode2 reset for sdma fed error on gfx v11_0_3.
Signed-off-by: YiPeng Chai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 8 +++-
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.h | 5 +
drivers/gpu/drm/amd/amdgpu/gfx_v11_0_3.c | 14 +-
3 files changed, 25 insertions(+), 2 de
Hi, Thomas
After apply your patch set, the kernel with
arch/loongarch/configs/loongson3_defconfig
can not finish compile anymore. gcc complains:
AR drivers/gpu/built-in.a
AR drivers/built-in.a
AR built-in.a
AR vmlinux.a
LD vmlinux.o
OBJCOPY modules.buil
Acked-by: Guchun Chen for this series.
Regards,
Guchun
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: Wednesday, May 17, 2023 5:18 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH 1/2] drm/amdgpu/vcn4: fix endian conversion
>
[AMD Official Use Only - General]
Do we really need this delay on all the ASICs?
Maybe set the default value to 0 is more reasonable?
Thanks.
-Original Message-
From: amd-gfx On Behalf Of Evan Quan
Sent: Tuesday, May 16, 2023 10:51 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexa
On Tue, May 16, 2023 at 5:50 PM Limonciello, Mario wrote:
>
>
> On 5/16/2023 4:39 PM, Alex Deucher wrote:
> > On Tue, May 16, 2023 at 2:15 PM Mario Limonciello
> > wrote:
> >> On GFX11 if RLC is stopped when not in GFXOFF the system will hang.
> >> Prevent this case from ever happening.
> >>
> >>
On 5/16/2023 4:39 PM, Alex Deucher wrote:
On Tue, May 16, 2023 at 2:15 PM Mario Limonciello
wrote:
On GFX11 if RLC is stopped when not in GFXOFF the system will hang.
Prevent this case from ever happening.
Tested-by: Juan Martinez
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/
On Tue, May 16, 2023 at 2:15 PM Mario Limonciello
wrote:
>
> On GFX11 if RLC is stopped when not in GFXOFF the system will hang.
> Prevent this case from ever happening.
>
> Tested-by: Juan Martinez
> Signed-off-by: Mario Limonciello
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 4
> 1
Rework logic or use do_div() to avoid problems on 32 bit.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 5 -
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 11 ++-
2 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgp
sq.is_enabled is a byte so there is no need to endian swap it.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c
index c77c
If GFXOFF was flushed during suspend entry it may take some time
for GFX core to be powered down. Ensure that it's powered off
before continuing any operations that may try to utilize related
IP. This avoids hangs from stopping RLC as well as problems with
fence interrupts timing out during s2idle
On GFX11 if RLC is stopped when not in GFXOFF the system will hang.
Prevent this case from ever happening.
Tested-by: Juan Martinez
Signed-off-by: Mario Limonciello
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_
DCN 3.1.4 is reported to hang on s2idle entry if graphics activity
is happening during entry. This is because GFXOFF was scheduled as
delayed but RLC gets disabled in s2idle entry sequence which will
hang GFX IP if not already in GFXOFF.
To help this problem, flush any delayed work for GFXOFF ear
It's been observed that with DCN 3.1.4 s2idle entry will hang
occasionally on s2idle entry, but only if running Wayland and only
when using `systemctl suspend`, not `echo mem | tee /sys/power/state`.
This happens because using `systemctl suspend` will cause the screen
to lock right before writing
tree/branch: INFO setup_repo_specs:
/db/releases/20230516180935/lkp-src/repo/*/linux-next
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 885df05bf634d589fbf030c3751614eaa453fb5d Add linux-next specific
files for 20230516
Warning reports:
https
On 5/16/23 07:35, David Hildenbrand wrote:
...
>>> When passing NULL as "pages" to get_user_pages(), __get_user_pages_locked()
>>> won't set FOLL_GET. As FOLL_PIN is also not set, we won't be messing with
>>> the mapcount of the page.
>
> For completeness: s/mapcount/refcount/ :)
whew, you had me
>> The address of a data structure member was determined before
>> a corresponding null pointer check in the implementation of
>> the function “trigger_hotplug”.
>>
>> Thus avoid the risk for undefined behaviour by moving the assignment
>> for three local variables behind some condition checks.
>
>
On 16.05.23 16:30, Sean Christopherson wrote:
On Tue, May 16, 2023, David Hildenbrand wrote:
On 15.05.23 21:07, Sean Christopherson wrote:
On Sun, May 14, 2023, Lorenzo Stoakes wrote:
diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
index cb5c13eee193..eaa5bb8dbadc 100644
--- a/virt/kvm/
On Tue, May 16, 2023, David Hildenbrand wrote:
> On 15.05.23 21:07, Sean Christopherson wrote:
> > On Sun, May 14, 2023, Lorenzo Stoakes wrote:
> > > diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
> > > index cb5c13eee193..eaa5bb8dbadc 100644
> > > --- a/virt/kvm/kvm_main.c
> > > +++ b/virt
Applied. Thanks!
Alex
On Mon, May 15, 2023 at 6:27 PM Sukrut Bellary wrote:
>
>
> On 5/3/23 16:15, Sukrut Bellary wrote:
> > smatch warning -
> > 1) drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c:3615 gfx_v9_0_kiq_resume()
> > warn: inconsistent returns 'ring->mqd_obj->tbo.base.resv'.
> >
> > 2) drivers
Hi Sam
Am 15.05.23 um 19:43 schrieb Sam Ravnborg:
Hi Thomas,
On Mon, May 15, 2023 at 11:40:24AM +0200, Thomas Zimmermann wrote:
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Exynos does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the f
On 15.05.23 21:07, Sean Christopherson wrote:
On Sun, May 14, 2023, Lorenzo Stoakes wrote:
No invocation of get_user_pages() use the vmas parameter, so remove it.
The GUP API is confusing and caveated. Recent changes have done much to
improve that, however there is more we can do. Exporting vma
On Thu, 27 Apr 2023, Wayne Lin wrote:
> [Why]
> The sequence for collecting down_reply from source perspective should
> be:
>
> Request_n->repeat (get partial reply of Request_n->clear message ready
> flag to ack DPRX that the message is received) till all partial
> replies for Request_n are recei
Hi
Am 15.05.23 um 20:04 schrieb Russell King (Oracle):
On Mon, May 15, 2023 at 07:55:44PM +0200, Sam Ravnborg wrote:
Hi Thomas,
On Mon, May 15, 2023 at 11:40:23AM +0200, Thomas Zimmermann wrote:
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Armada does not use da
On Mon, May 15, 2023 at 10:52 PM Evan Quan wrote:
>
> There will be a double check for the hotspot temperature on delay
> expired. This can avoid unintended shutdown due to hotspot temperature
> spark.
>
> Signed-off-by: Evan Quan
> --
> v1->v2:
> - add the proper millidegree Celsius to degree
Hi
Am 15.05.23 um 19:55 schrieb Sam Ravnborg:
Hi Thomas,
On Mon, May 15, 2023 at 11:40:23AM +0200, Thomas Zimmermann wrote:
Use the regular fbdev helpers for framebuffer I/O instead of DRM's
helpers. Armada does not use damage handling, so DRM's fbdev helpers
are mere wrappers around the fbdev
[why]
Passthrough case is treated as root bus and pcie_gen_mask is set as
default value that does not support GEN 3 and GEN 4 for PCIe link
speed. So PCIe link speed will be downgraded at smu hw init in
passthrough condition
[how]
Move detect virtualization before get pcie info and check if it is
[Public]
Hi,
Ping again for code review. Much appreciated!
Regards,
Wayne
> -Original Message-
> From: Lin, Wayne
> Sent: Monday, May 8, 2023 5:49 PM
> To: ly...@redhat.com; jani.nik...@intel.com; dri-
> de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org
> Cc: ville.syrj...@linu
On Thu, May 11, 2023 at 04:25:28PM +0200, Christian Göttsche wrote:
> Use the new added capable_any function in appropriate cases, where a
> task is required to have any of two capabilities.
>
> Reorder CAP_SYS_ADMIN last.
>
> Signed-off-by: Christian Göttsche
> ---
> v4:
>Additional usage i
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