[AMD Official Use Only - General]
Hi Luben
Please let us know if you don't have bandwidth to review and we can require
other people to review, please be understand that we are in an urgent situation
and need this change to go to mainline this week.
Thanks
-
On 2023-03-08 21:27, YuBiao Wang wrote:
> v2: Add comments to clarify in the code.
>
> [Why]
> For engines not supporting soft reset, i.e. VCN, there will be a failed
> ib test before mode 1 reset during asic reset. The fences in this case
> are never signaled and next time when we try to free the
[Public]
-Original Message-
From: Alex Deucher
Sent: Wednesday, March 15, 2023 10:36 PM
To: Huang, Tim
Cc: amd-gfx@lists.freedesktop.org; Deucher, Alexander
; Zhang, Yifan ; Limonciello,
Mario
Subject: Re: [PATCH 1/2] drm/amdgpu: reposition the gpu reset checking for reuse
On Wed, Ma
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: amd-gfx On Behalf Of Alex Deucher
Sent: Thursday, March 16, 2023 1:53 AM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander
Subject: [PATCH] drm/amdgpu: drop the extra sign exte
On Tue, Mar 7, 2023 at 4:12 PM Harry Wentland wrote:
>
> We want compositors to be able to set the output
> colorspace on DP and HDMI outputs, based on the
> caps reported from the receiver via EDID.
About that... The documentation says that user space has to check the
EDID for what the sink actu
On Wed, 15 Mar 2023, Jan Beulich wrote:
> On 15.03.2023 01:52, Stefano Stabellini wrote:
> > On Mon, 13 Mar 2023, Jan Beulich wrote:
> >> On 12.03.2023 13:01, Huang Rui wrote:
> >>> Xen PVH is the paravirtualized mode and takes advantage of hardware
> >>> virtualization support when possible. It wi
Hi Dave, Daniel,
Fixes for 6.3.
The following changes since commit eeac8ede17557680855031c6f305ece2378af326:
Linux 6.3-rc2 (2023-03-12 16:36:44 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5f/linux.git
tags/amd-drm-fixes-6.3-2023-03-15
for you to fetch
On Wed, 15 Mar 2023 11:57:12 -0400
Steven Rostedt wrote:
So I'm looking at the backtraces.
> The WARN_ON triggered:
>
> [ 21.481449] mpls_gso: MPLS GSO support
> [ 21.488795] IPI shorthand broadcast: enabled
> [ 21.488873] [ cut here ]
> [ 21.490101]
On Wed, 15 Mar 2023 20:51:49 +0100
Christian König wrote:
> Steven please try the attached patch.
I applied it, but as it's not always reproducible, I'll have to give it
several runs before I give you my "tested-by" tag.
-- Steve
On Wed, 15 Mar 2023 16:25:11 +0100
Christian König wrote:
> >>
> >> Thanks for the notice,
> > I'm still getting this on Linus's latest tree.
>
> This must be some reference counting issue which only happens in your
> particular use case. We have tested this quite extensively and couldn't
>
On Wed, 15 Mar 2023 11:57:12 -0400
Steven Rostedt wrote:
> The WARN_ON triggered:
>
> [ 21.481449] mpls_gso: MPLS GSO support
> [ 21.488795] IPI shorthand broadcast: enabled
> [ 21.488873] [ cut here ]
> [ 21.490101] [ cut here ]
>
> [ 2
Am 15.03.23 um 20:15 schrieb Matthew Auld:
On Wed, 15 Mar 2023 at 18:41, Christian König
wrote:
Am 08.03.23 um 13:43 schrieb Steven Rostedt:
On Wed, 8 Mar 2023 07:17:38 +0100
Christian König wrote:
What test case/environment do you run to trigger this?
I'm running a 32bit x86 qemu instan
On Wed, 15 Mar 2023 at 18:41, Christian König
wrote:
>
> Am 08.03.23 um 13:43 schrieb Steven Rostedt:
> > On Wed, 8 Mar 2023 07:17:38 +0100
> > Christian König wrote:
> >
> >> What test case/environment do you run to trigger this?
> > I'm running a 32bit x86 qemu instance. Attached is the config.
Am 15.03.23 um 18:53 schrieb Alex Deucher:
amdgpu_bo_gpu_offset_no_check() already calls
amdgpu_gmc_sign_extend() so no need to call it twice.
Signed-off-by: Alex Deucher
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 4 ++--
1 file changed, 2 insertions(
Am 08.03.23 um 13:43 schrieb Steven Rostedt:
On Wed, 8 Mar 2023 07:17:38 +0100
Christian König wrote:
What test case/environment do you run to trigger this?
I'm running a 32bit x86 qemu instance. Attached is the config.
The libvirt xml file is here: https://rostedt.org/vm-images/tracetest-32
Am 15.03.23 um 18:31 schrieb Steven Rostedt:
On Wed, 15 Mar 2023 11:57:12 -0400
Steven Rostedt wrote:
So I'm looking at the backtraces.
The WARN_ON triggered:
[ 21.481449] mpls_gso: MPLS GSO support
[ 21.488795] IPI shorthand broadcast: enabled
[ 21.488873] [ cut here ]
Am 15.03.23 um 18:54 schrieb Steven Rostedt:
On Wed, 15 Mar 2023 11:57:12 -0400
Steven Rostedt wrote:
The WARN_ON triggered:
[ 21.481449] mpls_gso: MPLS GSO support
[ 21.488795] IPI shorthand broadcast: enabled
[ 21.488873] [ cut here ]
[ 21.490101] ---
amdgpu_bo_gpu_offset_no_check() already calls
amdgpu_gmc_sign_extend() so no need to call it twice.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm_sdma.c
b/d
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 225b6b81afe63b3850b7cee0a3590f51144f2a75 Add linux-next specific
files for 20230315
Warning reports:
https://lore.kernel.org/oe-kbuild-all/202303081807.lblwkmpx-...@intel.com
https
Am 15.03.23 um 16:09 schrieb Steven Rostedt:
On Wed, 8 Mar 2023 07:17:38 +0100
Christian König wrote:
Am 08.03.23 um 03:26 schrieb Steven Rostedt:
On Tue, 7 Mar 2023 21:22:23 -0500
Steven Rostedt wrote:
Looks like there was a lock possibly used after free. But as commit
9bff18d13473a9fdf
On Sun, Mar 12, 2023 at 08:01:57PM +0800, Huang Rui wrote:
> From: Chen Jiqian
>
> When hypervisor get an interrupt, it needs interrupt's
> gsi number instead of irq number. Gsi number is unique
> in xen, but irq number is only unique in one domain.
> So, we need to record the relationship betwee
On Wed, Mar 15, 2023 at 7:05 AM Tim Huang wrote:
>
> Move the amdgpu_acpi_should_gpu_reset out of
> CONFIG_SUSPEND to share it with hibernate case.
>
> Signed-off-by: Tim Huang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +--
> drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 40
On Sun, Mar 12, 2023 at 08:01:56PM +0800, Huang Rui wrote:
> From: Chen Jiqian
>
> Add acpi_register_gsi_xen_pvh() to register gsi for PVH mode.
> In addition to call acpi_register_gsi_ioapic(), it also setup
> a map between gsi and vector in hypervisor side. So that,
> when dgpu create an interr
On Wed, Mar 15, 2023 at 4:13 AM Tong Liu01 wrote:
>
> [why]
> when gfx do soft reset, mes will also do reset, if mes is not
> resumed when do recover from soft reset, mes is unable to respond
> in later sequence
>
> [how]
> resume mes when do gfx post soft reset
>
> Signed-off-by: Tong Liu01
Ack
On Sun, Mar 12, 2023 at 08:01:55PM +0800, Huang Rui wrote:
> There is an second stage translation between the guest machine address
> and host machine address in Xen PVH/HVM. The PCI bar address in the xen
> guest kernel are not translated at the second stage on Xen PVH/HVM, so
I'm confused by the
I'll give it a try this weekend.
Luís
On Fri, Mar 10, 2023 at 1:15 PM Arunpravin Paneer Selvam
wrote:
>
>
>
> On 3/9/2023 3:42 PM, Luís Mendes wrote:
> > Hi,
> >
> > Ping? This is actually a regression.
> > If there is no one available to work this, maybe I can have a look in
> > my spare time,
On Sun, Mar 12, 2023 at 08:01:54PM +0800, Huang Rui wrote:
> The xen grant table will be initialied before parsing the PCI resources,
> so xen_alloc_unpopulated_pages() ends up using a range from the PCI
> window because Linux hasn't parsed the PCI information yet.
>
> So modify the initialization
From: Harry Wentland
commit e5eef23e267c72521d81f23f7f82d1f523d4a253 upstream.
The EDID of an HDR display defines EOTFs that are supported
by the display and can be set in the HDR metadata infoframe.
Userspace is expected to read the EDID and set an appropriate
HDR_OUTPUT_METADATA.
In drm_parse
From: Harry Wentland
commit 7d386975f6a495902e679a3a250a7456d7e54765 upstream.
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua
S2idle resume freeze can be observed on Intel ADL + AMD WX5500. This is
caused by commit 0064b0ce85bb ("drm/amd/pm: enable ASPM by default").
The root cause is still not clear for now.
So extend and apply the ASPM quirk from commit e02fe3bc7aba
("drm/amdgpu: vi: disable ASPM on Intel Alder Lake b
From: Harry Wentland
commit e5eef23e267c72521d81f23f7f82d1f523d4a253 upstream.
The EDID of an HDR display defines EOTFs that are supported
by the display and can be set in the HDR metadata infoframe.
Userspace is expected to read the EDID and set an appropriate
HDR_OUTPUT_METADATA.
In drm_parse
From: Harry Wentland
commit 7d386975f6a495902e679a3a250a7456d7e54765 upstream.
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua
From: Harry Wentland
commit 7d386975f6a495902e679a3a250a7456d7e54765 upstream.
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua
From: Harry Wentland
commit 7d386975f6a495902e679a3a250a7456d7e54765 upstream.
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua
From: Harry Wentland
commit 7d386975f6a495902e679a3a250a7456d7e54765 upstream.
This is useful to understand the bpc defaults and
support of a driver.
Signed-off-by: Harry Wentland
Cc: Pekka Paalanen
Cc: Sebastian Wick
Cc: vitaly.pros...@amd.com
Cc: Uma Shankar
Cc: Ville Syrjälä
Cc: Joshua
For GC IP v11.0.4/11, PSP TMR need to be reserved
for ASIC mode2 reset. But for S4, when psp suspend,
it will destroy the TMR that fails the ASIC reset.
[ 96.006101] amdgpu :62:00.0: amdgpu: MODE2 reset
[ 100.409717] amdgpu :62:00.0: amdgpu: SMU: I'm not done with your
previous command:
Move the amdgpu_acpi_should_gpu_reset out of
CONFIG_SUSPEND to share it with hibernate case.
Signed-off-by: Tim Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 4 +--
drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c | 40 +---
2 files changed, 24 insertions(+), 20 deletions(-)
On 15.03.2023 01:52, Stefano Stabellini wrote:
> On Mon, 13 Mar 2023, Jan Beulich wrote:
>> On 12.03.2023 13:01, Huang Rui wrote:
>>> Xen PVH is the paravirtualized mode and takes advantage of hardware
>>> virtualization support when possible. It will using the hardware IOMMU
>>> support instead of
On 15.03.2023 05:14, Huang Rui wrote:
> On Wed, Mar 15, 2023 at 08:52:30AM +0800, Stefano Stabellini wrote:
>> On Mon, 13 Mar 2023, Jan Beulich wrote:
>>> On 12.03.2023 13:01, Huang Rui wrote:
Xen PVH is the paravirtualized mode and takes advantage of hardware
virtualization support when
On 2023/3/14 下午5:27, Chen, Guchun wrote:
[AMD Official Use Only - General]
-Original Message-
From: Lazar, Lijo
Sent: Tuesday, March 14, 2023 5:07 PM
To: Chen, Guchun ; Zhenneng Li
Cc: David Airlie ; Pan, Xinhui ;
amd-gfx@lists.freedesktop.org; Daniel Vetter ; Deucher,
Alexander ; K
[why]
when gfx do soft reset, mes will also do reset, if mes is not
resumed when do recover from soft reset, mes is unable to respond
in later sequence
[how]
resume mes when do gfx post soft reset
Signed-off-by: Tong Liu01
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 9 +
1 file changed
Reviewed-by: Guchun Chen
> -Original Message-
> From: bobzhou
> Sent: Wednesday, March 15, 2023 3:29 PM
> To: amd-gfx@lists.freedesktop.org; Chen, Guchun
> ; Cui, Flora ; Shi, Leslie
> ; Ma, Jun
> Cc: Zhou, Bob
> Subject: [PATCH] drm/amd: fix compilation issue with legacy gcc
>
> This
This patch is used to fix following compilation issue with legacy gcc
error: ‘for’ loop initial declarations are only allowed in C99 mode
Signed-off-by: bobzhou
---
.../drm/amd/display/dc/link/protocols/link_dp_dpia_bw.c | 9 ++---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c |
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