Am 02.11.22 um 22:10 schrieb Philip Yang:
Re-take the eviction lock immediately again after the allocation is
completed, to fix circular locking warning with drm_buddy allocator.
Move amdgpu_vm_eviction_lock/unlock/trylock to amdgpu_vm.h as they are
called from multiple files.
Signed-off-by:
[AMD Official Use Only - General]
Btw, if the concern is the gfx_late_init failure caused by incorrect setting in
IFWI. @Feng, Kenneth already have a workaround.
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Zhang,
Hawking
Sent: Thursday, November 3, 2022 14:46
To: Wa
[AMD Official Use Only - General]
amdgpu_ras_feature_enable won't send RAS command to firmware if it is invoked
from guest side. The change seems unnecessary.
Regards,
Hawking
-Original Message-
From: Wang, YuBiao
Sent: Thursday, November 3, 2022 14:39
To: Wang, YuBiao ; amd-gfx@lists
Hi Hawking,
This patch is to skip ras init in sriov case. Please help review.
Thanks,
Yubiao
-Original Message-
From: YuBiao Wang
Sent: Thursday, November 3, 2022 11:12 AM
To: amd-gfx@lists.freedesktop.org
Cc: Andrey Grodzovsky ; Quan, Evan
; Chen, Horace ; Tuikov, Luben
; Koenig, Ch
[AMD Official Use Only - General]
Hi Alex.
> -Original Message-
> From: Alex Deucher
> Sent: Thursday, November 3, 2022 1:14 AM
> To: Yuan, Perry
> Cc: Deucher, Alexander ; Liang, Richard qi
> ; Huang, Shimmer
> ; amd-gfx@lists.freedesktop.org; Liu, Kun
>
> Subject: Re: [PATCH v2 2/3]
Use ip versions (10,3,1) to match the GPU after Vangogh switched to use IP
discovery path.
Signed-off-by: Perry Yuan
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/
change the vangogh family to use IP discovery path to initialize IP
list, this needs to remove the DID from the PCI ID list to allow the IP
discovery path to set all the IP versions correctly.
Signed-off-by: Perry Yuan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ---
1 file changed, 3 deleti
Add the missing apu flag for Vangogh when using IP discovery code path
to initialize IPs
Signed-off-by: Perry Yuan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amd
On Thu, Nov 3, 2022 at 12:06 AM Victor Zhao wrote:
>
> - clear kiq ring after suspend/resume under sriov to aviod kiq ring
> test failure
> - update irq after resume to fix kiq interrput loss
>
> Signed-off-by: Victor Zhao
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
> drivers/gpu/
[AMD Official Use Only - General]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: amd-gfx On Behalf Of Kenneth Feng
Sent: Thursday, November 3, 2022 11:39
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth
Subject: [PATCH] drm/amd/amdgpu: temporary workaround to s
[AMD Official Use Only - General]
Hi Alex,
This is a patch fixing the sriov suspend/resume sequence. Please help review.
Thanks,
Victor
-Original Message-
From: Victor Zhao
Sent: Thursday, November 3, 2022 12:06 PM
To: amd-gfx@lists.freedesktop.org; Deucher, Alexander
Cc: Zhao, V
- clear kiq ring after suspend/resume under sriov to aviod kiq ring
test failure
- update irq after resume to fix kiq interrput loss
Signed-off-by: Victor Zhao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 ++
2 files changed, 4 insertions(
temporary workaround to skip ras error for gc_v11_0_3 until IFWI release later
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v
In sriov guest side doesn't need init ras feature, so skip it.
Signed-off-by: YuBiao Wang
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 84a76c36
[AMD Official Use Only - General]
>The bad news is that this series still makes some things very slow. The most
>extreme examples so far are glxgears (runs at ~400 fps now, ~7000 fps before,
>i.e. almost 20x slowdown) and hexchat (scrolling one page now takes ~1 second,
>I can see it drawing li
Hi Dave, Daniel,
Fixes for 6.1. The big change here is the hang fix for the GC11 trap handler.
The following changes since commit 30a0b95b1335e12efef89dd78518ed3e4a71a763:
Linux 6.1-rc3 (2022-10-30 15:19:28 -0700)
are available in the Git repository at:
https://gitlab.freedesktop.org/agd5
Add a per-process MMU notifier lock for processing notifiers from
userptrs. Use that lock to properly synchronize page table updates with
MMU notifiers.
Signed-off-by: Felix Kuehling
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h| 12 +-
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 202 +
Checkpoint BOs last. That way we don't need to close dmabuf FDs if
something else fails later. This avoids problematic access to user mode
memory in the error handling code path.
criu_checkpoint_bos has its own error handling and cleanup that does not
depend on access to user memory.
criu_restore
Re-take the eviction lock immediately again after the allocation is
completed, to fix circular locking warning with drm_buddy allocator.
Move amdgpu_vm_eviction_lock/unlock/trylock to amdgpu_vm.h as they are
called from multiple files.
Signed-off-by: Philip Yang
---
drivers/gpu/drm/amd/amdgpu/a
On Tue, Nov 1, 2022 at 3:27 PM Limonciello, Mario
wrote:
>
> On 10/20/2022 10:46, Rodrigo Siqueira wrote:
> > From: Max Tseng
> >
> > Missing send cursor_rect width & Height into DMUB. PSR-SU would use
> > these information. But missing these assignment in last refactor commit
> >
> > Reviewed-by
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 61c3426aca2c71052ddcd06c32e29d92304990fd Add linux-next specific
files for 20221102
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202210271517.snuenhd0-...@intel.com
https
On Wed, Nov 2, 2022 at 1:00 PM Perry Yuan wrote:
>
> Use ip versions (10,3,1) to match the GPU after Vangogh switched to use IP
> discovery path.
>
> Signed-off-by: Perry Yuan
> ---
> drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
change the vangogh family to use IP discovery path to initialize IP
list, this needs to remove the DID from the PCI ID list to allow the IP
discovery path to set all the IP versions correctly.
Signed-off-by: Perry Yuan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ---
1 file changed, 3 deleti
Use ip versions (10,3,1) to match the GPU after Vangogh switched to use IP
discovery path.
Signed-off-by: Perry Yuan
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/
Add the missing apu flag for Vangogh when using IP discovery code path
to initialize IPs
Signed-off-by: Perry Yuan
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amd
Applied the series. Thanks!
Alex
On Wed, Nov 2, 2022 at 11:43 AM Kees Cook wrote:
>
> On Wed, Nov 02, 2022 at 08:25:40AM -0700, Nathan Chancellor wrote:
> > With clang's kernel control flow integrity (kCFI, CONFIG_CFI_CLANG),
> > indirect call targets are validated against the expected function
Applied. Thanks!
Alex
On Fri, Oct 28, 2022 at 9:31 PM Paulo Miguel Almeida
wrote:
>
> One-element arrays are deprecated, and we are replacing them with
> flexible array members instead. So, replace one-element array with
> flexible-array member in struct _ATOM_FAKE_EDID_PATCH_RECORD and
> refac
On Tue, Nov 1, 2022 at 6:41 PM Kees Cook wrote:
>
> On Tue, Nov 01, 2022 at 06:09:16PM -0400, Alex Deucher wrote:
> > On Tue, Nov 1, 2022 at 5:54 PM Kees Cook wrote:
> > > Does the ROM always only have a single byte there? This seems unlikely
> > > given the member "ucFakeEDIDLength" (and the cod
On Wed, Nov 2, 2022 at 10:58 AM Christian König
wrote:
>
> It can happen that we query the sequence value before the callback
> had a chance to run.
>
> Work around that by grabbing the fence lock and releasing it again.
workaround
> Should be replaced by hw handling soon.
>
> Signed-off-by: Chr
On Wed, Nov 02, 2022 at 08:25:40AM -0700, Nathan Chancellor wrote:
> With clang's kernel control flow integrity (kCFI, CONFIG_CFI_CLANG),
> indirect call targets are validated against the expected function
> pointer prototype to make sure the call target is valid to help mitigate
> ROP attacks. If
On Wed, Nov 02, 2022 at 08:25:39AM -0700, Nathan Chancellor wrote:
> With clang's kernel control flow integrity (kCFI, CONFIG_CFI_CLANG),
> indirect call targets are validated against the expected function
> pointer prototype to make sure the call target is valid to help mitigate
> ROP attacks. If
From: Alvin Lee
[Description]
- Incorporate FW delays as port of max VTOTAL calculated for
SubVP + DRR cases (since it is part of the microschedule).
- Also add margin for the max VTOTAL possible for SubVP + DRR cases.
- Due to rounding errors in FW (integer arithmetic), the microschedule
cal
From: Aric Cyr
DC version 3.2.211 brings along the following fixes:
- Wait for VBLANK during pipe programming
- Adding HDMI SCDC DEVICE_ID define
- Cursor update refactor: PSR-SU support condition
- Update 709 gamma to 2.222 as stated in the standerd
- Consider dp cable id only when data is non
From: George Shen
[Why]
DCN3.2 DML logic uses a new output type for DP2.0,
which will enable validation to pass for higher BW
timings that require DP2.0 link rates.
[How]
Populate the DML pipe with DP2.0 output type if
the signal type of the pipe_ctx is 128b/132b.
Reviewed-by: Alvin Lee
Acked-
From: Dillon Varone
[WHY?]
Data return times when using lowest memclk can be <= 60us, which can cause
underflow on high bandwidth displays with a workload.
[HOW?]
Enforce a minimum prefetch time during validation for low memclk modes.
Reviewed-by: Jun Lei
Acked-by: Alan Liu
Signed-off-by: Dil
From: Mike Hsieh
[Why] FreeSync always use G2.2 EOTF and Native gamut
[How] Set EOTF and Gamut flags accordingly
Reviewed-by: Krunoslav Kovac
Acked-by: Alan Liu
Signed-off-by: Mike Hsieh
---
drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 8
1 file changed, 4 insertions(+)
From: Michael Strauss
[WHY]
Currently driver reduces verified link caps on DPIA devices if a link is
trained at a link rate below the max rate verified during link detection.
This blocks high bandwidth modes after setting a low bandwidth mode.
[HOW]
Only update link rate after a successful link
From: Steve Su
[Why]
1. Port of gpio has different mapping.
[How]
1. Add a dummy entry in mapping table.
2. Fix incorrect mask bit field access.
Reviewed-by: Alvin Lee
Acked-by: Alan Liu
Signed-off-by: Steve Su
---
.../amd/display/dc/gpio/dcn32/hw_factory_dcn32.c | 14 ++
driv
From: Mustapha Ghaddar
[WHY]
Unlike DP or USBC, the USB4 link does not get its own encoder and
has to share therefore verify_caps is skipped.
[HOW]
Fix the fallback logic for automated tests and take that
into consideration for LT and LS.
Reviewed-by: Jun Lei
Acked-by: Alan Liu
Signed-off-by:
From: Wesley Chalmers
[WHY]
Committing a state while performing DRR actions can cause underflow.
[HOW]
Disabled features performing DRR actions during state commit.
Need to follow-up on why DRR actions affect state commit.
Reviewed-by: Jun Lei
Acked-by: Alan Liu
Signed-off-by: Wesley Chalmers
From: Nicholas Kazlauskas
[Why]
The link enablement sequence can end up resetting the encoder while
the PHY symclk isn't yet on.
This means that waiting for symclk on will timeout, along with the reset
bit never asserting high.
This causes unnecessary delay when enabling the link and produces a
From: Alvin Lee
[Description]
- Need to disable phantom OTG after it's enabled
in order to restore it to it's original state.
- If it's enabled and then an MCLK switch comes in
we may not prefetch the correct data since the phantom
OTG could already be in the middle of the frame.
Reviewed-
From: Chaitanya Dhere
[Why]
Recent backports from open source do not have header inclusion pattern
that is consistent with inclusion style in the rest of the file. This
breaks the internal tool builds as well. A recent commit erronously
modified the original DML formula for calculating
ActiveCloc
From: Alvin Lee
[Description]
- For SubVP transitioning into MPO, we want to
use a minimal transition to prevent transient
underflow
- Transitioning a phantom pipe directly into a
"real" pipe can result in underflow due to the
HUBP still having it's "phantom" programming
when HUBP is un
From: Aurabindo Pillai
[Why&How]
Bug was caused when moving variable from stack to heap because it was reusable
and garbage was left over, so we need to zero mem.
Reviewed-by: Martin Leung
Acked-by: Alan Liu
Signed-off-by: Aurabindo Pillai
Signed-off-by: Martin Leung
---
drivers/gpu/drm/amd
From: Wenjing Liu
Cable ID is a DP2 feature to identify max certified link rate that
a cable can carry. The cable identification method requires both
cable and display hardware support. Since the specs comes late, it is
anticipated that the first round of DP2 cables and displays may not
be fully
From: Nawwar Ali
[WHY]
Previously driver use gamma 2.2 for 709 color space,
but the standard is to use gamma of 2.222
[HOW]
Change it gamma to 2.222
Reviewed-by: Krunoslav Kovac
Acked-by: Alan Liu
Signed-off-by: Nawwar Ali
---
drivers/gpu/drm/amd/display/modules/color/color_gamm
From: Nicholas Kazlauskas
[Why]
We're missing the helpers from dcn20 that would allow
overriding these with DC debug options.
[How]
Use dcn20_patch_bounding_box to support overriding all the
relevant values.
Reviewed-by: Jun Lei
Acked-by: Alan Liu
Signed-off-by: Nicholas Kazlauskas
---
driv
From: Max Tseng
[Why]
PSR-SU requires extra conditions while cursor update.
Reviewed-by: Robin Chen
Acked-by: Alan Liu
Signed-off-by: Max Tseng
---
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 48
1 file changed, 48 insertions(+)
diff --git a/drivers/gpu/drm/amd/displ
From: Nicholas Kazlauskas
[Why & How]
New values requested by hardware after fine-tuning.
Update for all memory types.
Reviewed-by: Jun Lei
Acked-by: Alan Liu
Signed-off-by: Nicholas Kazlauskas
---
.../dc/clk_mgr/dcn314/dcn314_clk_mgr.c| 32 +--
.../amd/display/dc/dml
From: Ryan Lin
[Why]
Needs more frames waiting before the PSR_Exit sending for the specific
TCON.
[How]
Add relock_delay_frame_cnt to control how many frames waiting are needed
before the PSR_Exit sending. The default value is 0. The Driver side can
set this variable for specific TCONs.
Reviewe
From: Leo Ma
[Why && How]
We will need to differentiate vendor behavior in the future.
Reviewed-by: Chris Park
Acked-by: Alan Liu
Signed-off-by: Leo Ma
---
drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/cor
From: Alvin Lee
[Description]
- Wait for vblank during front end programming
for global sync to ensure all double buffer
updates take.
- This prevents underflow in some cases.
Reviewed-by: Martin Leung
Acked-by: Alan Liu
Signed-off-by: Alvin Lee
---
drivers/gpu/drm/amd/display/dc/dcn20/d
This DC patchset brings improvements in multiple areas. In summary, we have:
- Wait for VBLANK during pipe programming
- Adding HDMI SCDC DEVICE_ID define
- Cursor update refactor: PSR-SU support condition
- Update 709 gamma to 2.222 as stated in the standerd
- Consider dp cabl
Am 02.11.22 um 16:23 schrieb Alex Deucher:
So the callbacks are set before we use them.
Fixes: 0c9646e1a043 ("drm/amdgpu: switch to select_se_sh wrapper for gfx v9_0")
Signed-off-by: Alex Deucher
Reviewed-by: Christian König for the series.
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 +
With clang's kernel control flow integrity (kCFI, CONFIG_CFI_CLANG),
indirect call targets are validated against the expected function
pointer prototype to make sure the call target is valid to help mitigate
ROP attacks. If they are not identical, there is a failure at run time,
which manifests as
With clang's kernel control flow integrity (kCFI, CONFIG_CFI_CLANG),
indirect call targets are validated against the expected function
pointer prototype to make sure the call target is valid to help mitigate
ROP attacks. If they are not identical, there is a failure at run time,
which manifests as
So the callbacks are set early in case we need them.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index af94ac580d3e.
So the callbacks are set early in case we need them.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index f68e13b6282c..4
So the callbacks are set before we use them.
Fixes: 0c9646e1a043 ("drm/amdgpu: switch to select_se_sh wrapper for gfx v9_0")
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gf
[Public]
Acked-by: Alex Deucher
From: amd-gfx on behalf of Kenneth Feng
Sent: Wednesday, November 2, 2022 6:14 AM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth
Subject: [PATCH] drm/amd/amdgpu: skip ras late init if it is not supported
skip ras late ini
It can happen that we query the sequence value before the callback
had a chance to run.
Work around that by grabbing the fence lock and releasing it again.
Should be replaced by hw handling soon.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 15 +++
1 f
On 2022-11-01 11:33, Filip Moc wrote:
> Hello Harry,
>
> thank you for your response.
>
>> amdgpu.backlight_min=2:-1
>
> almost :-)
>
> Array elements in module parameters are separated by commas not colons.
> So for cmdline it should look like this:
> amdgpu.backlight_min=2,-1
>
> Though y
Am 2022-11-01 um 22:19 schrieb Bhardwaj, Rajneesh:
On 11/1/2022 3:15 PM, Felix Kuehling wrote:
Checkpoint BOs last. That way we don't need to close dmabuf FDs if
something else fails later. This avoids problematic access to user mode
memory in the error handling code path.
criu_checkpoint_bos
Am 02.11.22 um 14:36 schrieb Mikhail Gavrilov:
On Tue, Nov 1, 2022 at 10:52 PM Christian König
wrote:
Let's focus on one problem at a time.
The issue here is that somehow userptr handling became racy after we
removed the lock, but I don't see why.
We need to fix this ASAP since it is probably
On Tue, Nov 1, 2022 at 10:52 PM Christian König
wrote:
>
> Let's focus on one problem at a time.
>
> The issue here is that somehow userptr handling became racy after we
> removed the lock, but I don't see why.
>
> We need to fix this ASAP since it is probably a much wider problem and
> the additi
On Tue, Nov 1, 2022 at 7:21 PM Fabio M. De Francesco
wrote:
>
> On lunedì 17 ottobre 2022 18:53:24 CET Alex Deucher wrote:
> > Applied. Thanks!
> >
>
> The same report about which I just wrote in my previous email to you is also
> referring to this patch which later changed status to "Not Applica
[ Dropping Andrey's no longer working address from Cc ]
On 2022-11-01 11:09, Michel Dänzer wrote:
> On 2022-11-01 10:58, Zhu, Jiadong wrote:
>>
>>> Patch 3 assigns preempt_ib in gfx_v9_0_sw_ring_funcs_gfx, but not in
>>> gfx_v9_0_ring_funcs_gfx. mux->real_ring in amdgpu_mcbp_trigger_preempt
>>
On 11/2/22 11:33, Thomas Zimmermann wrote:
[...]
>>
>>> +static ssize_t __drm_fb_helper_write(struct fb_info *info, const char
>>> __user *buf, size_t count,
>>> +loff_t *ppos, drm_fb_helper_write_screen
>>> write_screen)
>>> +{
>>
>> [...]
>>
>>> + /*
>>> +
Hi
Am 02.11.22 um 10:32 schrieb Javier Martinez Canillas:
On 10/24/22 13:19, Thomas Zimmermann wrote:
Implement the fbdev's read/write helpers with the same functions. Use
the generic fbdev's code as template. Convert all drivers.
DRM's fb helpers must implement regular I/O functionality in st
skip ras late init on gc_11_0_3 if it is not supported,
in order to prevent the hardware init exception.
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
b/drivers/gp
On 10/24/22 13:19, Thomas Zimmermann wrote:
> Remove include statements for where it is not
> required (i.e., most of them). In a few places include other header
> files that are required by the source code.
>
> Signed-off-by: Thomas Zimmermann
> ---
Reviewed-by: Javier Martinez Canillas
--
On 10/24/22 13:19, Thomas Zimmermann wrote:
> Move the generic fbdev implementation into its own source and header
> file. Adapt drivers. No functonal changes, but some of the internal
> helpers have been renamed to fit into the drm_fbdev_ naming scheme.
>
> Signed-off-by: Thomas Zimmermann
> ---
On 10/24/22 13:19, Thomas Zimmermann wrote:
> Initialize the generic fbdev emulation even if it has been disabled
> on the kernel command line. The hotplug and mode initialization will
> fail accordingly.
>
> The kernel parameter can still be changed at runtime and the emulation
> will initialize
On 10/24/22 13:19, Thomas Zimmermann wrote:
> Pull the test for fb_dirty into the caller to avoid extra work
> if no callback has been set. In this case no damage handling is
> required and no damage area needs to be computed. Print a warning
> if the damage worker runs without getting an fb_dirty
On 10/24/22 13:19, Thomas Zimmermann wrote:
> Implement the fbdev's read/write helpers with the same functions. Use
> the generic fbdev's code as template. Convert all drivers.
>
> DRM's fb helpers must implement regular I/O functionality in struct
> fb_ops and possibly perform a damage update. Ha
On 10/24/22 13:19, Thomas Zimmermann wrote:
> Call struct fb_ops.fb_sync in drm_fbdev_{read,write}() to mimic the
> behavior of fbdev. Fbdev implementations of fb_read and fb_write in
> struct fb_ops invoke fb_sync to synchronize with outstanding operations
> before I/O. Doing the same in DRM imple
On 10/24/22 13:19, Thomas Zimmermann wrote:
> The fbdev helpers implement a damage worker that forwards fbdev
> updates to the DRM driver. The worker's update logic depends on
> the generic fbdev emulation. Separate the two via function pointer.
>
> The generic fbdev emulation sets struct drm_fb_h
On Tue, Nov 01, 2022 at 06:09:16PM -0400, Alex Deucher wrote:
> On Tue, Nov 1, 2022 at 5:54 PM Kees Cook wrote:
> > Does the ROM always only have a single byte there? This seems unlikely
> > given the member "ucFakeEDIDLength" (and the code below).
>
> I'm not sure. I'm mostly concerned about th
On Wed, Nov 02, 2022 at 12:11:53AM +0100, Fabio M. De Francesco wrote:
> On lunedì 17 ottobre 2022 18:52:10 CET Alex Deucher wrote:
> > Applied. Thanks!
>
> Many thanks to you!
>
> However, about a week ago, I received a report saying that this patch is "Not
> Applicable".
>
> That email was
On lunedì 17 ottobre 2022 18:53:24 CET Alex Deucher wrote:
> Applied. Thanks!
>
The same report about which I just wrote in my previous email to you is also
referring to this patch which later changed status to "Not Applicable".
It points to https://patchwork.linuxtv.org/project/linux-media/pa
On lunedì 17 ottobre 2022 18:52:10 CET Alex Deucher wrote:
> Applied. Thanks!
Many thanks to you!
However, about a week ago, I received a report saying that this patch is "Not
Applicable".
That email was also referring to another patch, for which I'll reply in its
own thread.
That report ha
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