On Fri, Mar 11, 2022 at 12:06 PM Jason Baron wrote:
>
>
>
> On 3/10/22 23:47, Jim Cromie wrote:
> > DRM defines/uses 10 enum drm_debug_category's to create exclusive
> > classes of debug messages. To support this directly in dynamic-debug,
> > add the following:
> >
> > - struct _ddebug.class_id:
Add a default case in the switch, instead of the last unhandled value,
FAMILY_CONFIGURE. This solves the case when in the future other families
are not handled--they'll all fall into the default case.
Also, in the diagnostic print, print the value of the unhandled
enumeration--this could help debu
A mix of multiple spaces and TAB char was being used in this switch. This
commit makes the usage of indent chars consistent, i.e. leading-TAB only.
Cc: Alex Deucher
Cc: Tom StDenis
Signed-off-by: Luben Tuikov
Reviewed-by: Tom StDenis
---
src/lib/ih_decode_vectors.c | 80 ++
Print the following error message,
Invalid gca config data header
to stderr, since printing it to stdout,
confuses parser scripts.
Also modify this message to be clearer. For instance,
Invalid or unknown GCA config data header version:4
Cc: Alex Deucher
Cc: Tom StDenis
Signed-off-by: Lube
Fix a segmentation fault when running --ring-stream for a ring and no
bounds are specified. For instance "umr --ring-stream sdma0" on Sienna
Cichlid, generates the following segmentation fault:
Core was generated by `umr --ring-stream sdma0'.
Program terminated with signal SIGSEGV, Segmentation fa
[AMD Official Use Only]
Hi Mario,
amdgpu_device_supports_smart_shift() is to check if the device is dGPU and
platform supports smartshift.
which would fail for iGPU and so the attr_update() will return unsupported, due
to this on SS1.0 platform the entries won't be created.
Regards,
Sathish
On 2022-03-11 11:32, Christian König wrote:
> Am 11.03.22 um 11:24 schrieb Michel Dänzer:
>> On 2022-03-10 19:06, Alex Deucher wrote:
>>> If the GPU is passed through to a guest VM, use the PCI
>>> BAR for CPU FB access rather than the physical address of
>>> carve out. The physical address is not
On 2022-03-11 04:16, David Hildenbrand wrote:
On 10.03.22 18:26, Alex Sierra wrote:
DEVICE_COHERENT pages introduce a subtle distinction in the way
"normal" pages can be used by various callers throughout the kernel.
They behave like normal pages for purposes of mapping in CPU page
tables, and f
Reviewed-by: Andrey Grodzovsky
Andrey
On 2022-03-11 10:15, Philip Yang wrote:
amdgpu_detect_virtualization reads register, amdgpu_device_rreg access
adev->reset_domain->sem if kernel defined CONFIG_LOCKDEP, below is the
random boot hang backtrace on Vega10. It may get random NULL pointer
acces
On 3/11/22 10:33, Shirish S wrote:
> [Why]
> comparing pwm bl values (coverted) with user brightness(converted)
> levels in commit_tail leads to continuous setting of backlight via dmub
> as they don't to match.
Why do the values not match? It looks like the value mismatch
is our root cause. I
[Why]
comparing pwm bl values (coverted) with user brightness(converted)
levels in commit_tail leads to continuous setting of backlight via dmub
as they don't to match.
This leads overdrive in queuing of commands to DMCU that sometimes lead
to depending on load on DMCU fw:
"[drm:dc_dmub_srv_wait_i
[Why]
comparing pwm bl values (coverted) with user brightness(converted)
levels in commit_tail leads to continuous setting of backlight via dmub
as they don't to match.
This leads overdrive in queuing of commands to DMCU that sometimes lead
to depending on load on DMCU fw:
"[drm:dc_dmub_srv_wait_i
amdgpu_detect_virtualization reads register, amdgpu_device_rreg access
adev->reset_domain->sem if kernel defined CONFIG_LOCKDEP, below is the
random boot hang backtrace on Vega10. It may get random NULL pointer
access backtrace if amdgpu_sriov_runtime is true too.
Move amdgpu_reset_create_reset_do
Am 10.03.22 um 19:06 schrieb Alex Deucher:
If the GPU is passed through to a guest VM, use the PCI
BAR for CPU FB access rather than the physical address of
carve out. The physical address is not valid in a guest.
Signed-off-by: Alex Deucher
Reviewed-by: Christian König
---
drivers/gpu/
Am 11.03.22 um 11:24 schrieb Michel Dänzer:
On 2022-03-10 19:06, Alex Deucher wrote:
If the GPU is passed through to a guest VM, use the PCI
BAR for CPU FB access rather than the physical address of
carve out. The physical address is not valid in a guest.
I think amdgpu_device_flush_hdp & amdg
On 2022-03-10 19:06, Alex Deucher wrote:
> If the GPU is passed through to a guest VM, use the PCI
> BAR for CPU FB access rather than the physical address of
> carve out. The physical address is not valid in a guest.
I think amdgpu_device_flush_hdp & amdgpu_device_invalidate_hdp need to be
modi
On Thu, Mar 10, 2022 at 11:26:31AM -0600, Alex Sierra wrote:
> @@ -606,7 +606,7 @@ static void print_bad_pte(struct vm_area_struct *vma,
> unsigned long addr,
> * PFNMAP mappings in order to support COWable mappings.
> *
> */
> -struct page *vm_normal_page(struct vm_area_struct *vma, unsigne
Eliminate the follow smatch warning:
drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu_cmn.c:174
__smu_cmn_reg_print_error() warn: inconsistent indenting
Reported-by: Abaci Robot
Signed-off-by: Yang Li
---
drivers/gpu/drm/amd/pm/swsmu/smu_cmn.c | 22 +++---
1 file changed, 11 insertion
On Thu, 10 Mar 2022 11:56:41 -0800
Rob Clark wrote:
> For something like just notifying a compositor that a gpu crash
> happened, perhaps drm_event is more suitable. See
> virtio_gpu_fence_event_create() for an example of adding new event
> types. Although maybe you want it to be an event which
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