Am 19.01.22 um 07:42 schrieb mziya:
Remove set but unused variable.
warning: variable 'umc_reg_offset' set but not used
Signed-off-by: mziya
You should use your full written name here.
Apart from that nit the patch looks good to me.
Christian.
Reported-by: kernel test robot
Reviewed-by:
Am 18.01.22 um 21:13 schrieb Eric Huang:
I understand Alex's concern. I think usually we only check the version
when a feature is only available in a specific version, and other
version or newer version doesn't have.
In case of FW fix, we assume the driver and FWs have to be
synchronous. If w
linux/string_helpers.h provides a helper to return "yes"/"no"
strings. Replace the open coded versions with yesno(). The places were
identified with the following semantic patch:
@@
expression b;
@@
- b ? "yes" : "no"
+ yesno(b)
Then the includes were adde
Follow the yes/no logic and add helpers for enabled/disabled and
enable/disable - those are not so common throughout the kernel,
but they give a nice way to reuse the strings to log things as
enabled/disabled or enable/disable.
Signed-off-by: Lucas De Marchi
---
drivers/gpu/drm/i915/i915_utils.h
There are a few implementations of yesno() in the tree. Consolidate them
in include/linux/string_helpers.h. Quite a few users of open coded
yesno() could later be converted to the new function:
$ git grep '?\s*"yes"\s*' | wc -l
286
$ git grep '?\s*"no"\s*' | wc -l
20
The inlined function should
Add some helpers under lib/string_helpers.h so they can be used
throughout the kernel. When I started doing this there were 2 other
previous attempts I know of, not counting the iterations each of them
had:
1) https://lore.kernel.org/all/20191023131308.9420-1-jani.nik...@intel.com/
2)
https://lor
Am 18.01.22 um 11:44 schrieb Arunpravin:
Move the base i915 buddy allocator code into drm
- Move i915_buddy.h to include/drm
- Move i915_buddy.c to drm root folder
- Rename "i915" string with "drm" string wherever applicable
- Rename "I915" string with "DRM" string wherever applicable
- Fix heade
-Original Message-
From: Zhou1, Tao
Sent: Wednesday, January 19, 2022 2:11 PM
To: Chai, Thomas ; amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Clements, John
Subject: RE: [PATCH 2/3] drm/amdgpu: Move xgmi ras initialization from
.late_init to .early_init
[AMD Official Use Only
Remove set but unused variable.
warning: variable 'umc_reg_offset' set but not used
Signed-off-by: mziya
Reported-by: kernel test robot
Reviewed-by: Hawking Zhang
---
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v8_
[AMD Official Use Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Ziya, Mohammad zafar
Sent: Wednesday, January 19, 2022 14:23
To: Zhang, Hawking ; Lazar, Lijo ;
Clements, John
Cc: amd-gfx@lists.freedesktop.org; Ziya, Mohammad zafar
; kernel test robot
Su
[AMD Official Use Only]
Patch is
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Chai, Thomas
Sent: Wednesday, January 19, 2022 10:56
To: amd-gfx@lists.freedesktop.org
Cc: Chai, Thomas ; Zhang, Hawking ;
Zhou1, Tao ; Clements, John ; Chai,
Thomas
Subject: [PATCH
Remove set but unused variable.
warning: variable 'umc_reg_offset' set but not used
Signed-off-by: mziya
Reported-by: kernel test robot
---
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v8_7.c
b/drivers/gpu/drm/amd/a
[AMD Official Use Only]
Reviewed-by: Tao Zhou
> -Original Message-
> From: Chai, Thomas
> Sent: Wednesday, January 19, 2022 10:56 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Clements,
> John ; Chai, Thomas
> Subject: [PATCH 1/3] drm/amdgp
[AMD Official Use Only]
> -Original Message-
> From: Chai, Thomas
> Sent: Wednesday, January 19, 2022 10:56 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Chai, Thomas ; Zhang, Hawking
> ; Zhou1, Tao ; Clements,
> John ; Chai, Thomas
> Subject: [PATCH 2/3] drm/amdgpu: Move xgmi ras initi
[AMD Official Use Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Chai, Thomas
Sent: Wednesday, January 19, 2022 10:56
To: amd-gfx@lists.freedesktop.org
Cc: Chai, Thomas ; Zhang, Hawking ;
Zhou1, Tao ; Clements, John ; Chai,
Thomas
Subject: [PATCH 1/3] drm
On some OEM setups users can configure the BIOS for S3 or S2idle.
When configured to S3 users can still choose 's2idle' in the kernel by
using `/sys/power/mem_sleep`. Before commit 6dc8265f9803 ("drm/amdgpu:
always reset the asic in suspend (v2)"), the GPU would crash. Now when
configured this wa
when mmio protection feature is enabled in hypervisor,
it will cause guest OS can't R/W HDP regiters,
and using cpu to update page table is not working well.
force using sdma to update page table when mmio is blocked.
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 7 +
Yellow carp has been outputting versions like `1093.24.0`, but this
is supposed to be 69.24.0. That is the MSB is being interpreted
incorrectly.
The MSB is not part of the major version, but has generally been
treated that way thus far. It's actually the program, and used to
distinguish between t
Move xgmi ras initialization from .late_init to .early_init, which let
xgmi ras be initialized only once.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c | 5 -
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 -
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 9 +
3 files c
Gmc v10 doesn't support ras function, remove redundant code in it.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 19 ---
1 file changed, 19 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 5f9
Remove repeated calls.
Signed-off-by: yipechai
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 7a1d2bac698e..4992bc554c0c 100644
--- a/drive
On 2022/01/18 18:53, Andy Shevchenko wrote:
On Mon, Jan 17, 2022 at 02:15:48PM +0900, Esaki Tomohito wrote:
On 2022/01/14 23:16, Andy Shevchenko wrote:
On Fri, Jan 14, 2022 at 07:17:52PM +0900, Tomohito Esaki wrote:
The LINEAR modifier is advertised as default if a driver doesn't specify
modif
[Public]
IS_ENABLED(CONFIG_SUSPEND) will be required for using pm_suspend_target_state.
Thanks,
Lijo
Am 2022-01-18 um 7:08 p.m. schrieb Russell, Kent:
> One question inline
>
>
> *KENT RUSSELL***
>
> Sr. Software Engineer | Linux Compute Kernel
>
> 1 Commerce Valley Drive East
>
> Markham, ON L3T 7X6
>
> *O*+(1) 289-695-2122**| Ext 72122
>
>
>
One question inline
KENT RUSSELL
Sr. Software Engineer | Linux Compute Kernel
1 Commerce Valley Drive East
Markham, ON L3T 7X6
O +(1) 289-695-2122 | Ext 72122
From: amd-gfx on behalf of Felix
Kuehling
Sent: Tuesday, January 18, 2022 6:36 PM
To: Huang, JinHuiEr
Am 2022-01-18 um 5:45 p.m. schrieb Eric Huang:
> SDMA FW fixes the hang issue for adding heavy-weight TLB
> flush on Arcturus, so we can enable it.
>
> Signed-off-by: Eric Huang
Reviewed-by: Felix Kuehling
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 6 --
> drivers/gpu/drm
SDMA FW fixes the hang issue for adding heavy-weight TLB
flush on Arcturus, so we can enable it.
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 6 --
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 10 --
2 files changed, 8 insertions(+), 8 delet
Am 2022-01-18 um 4:28 p.m. schrieb Eric Huang:
> SDMA FW fixes the hang issue for adding heavy-weight TLB
> flush on Arcturus, so we can enable it.
>
> Signed-off-by: Eric Huang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 ++---
> drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
On Tue, Jan 18, 2022 at 4:28 PM Eric Huang wrote:
>
> SDMA FW fixes the hang issue for adding heavy-weight TLB
> flush on Arcturus, so we can enable it.
>
> Signed-off-by: Eric Huang
Acked-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 ++---
> drivers/gpu/d
SDMA FW fixes the hang issue for adding heavy-weight TLB
flush on Arcturus, so we can enable it.
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 9 ++---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 4 +++-
2 files changed, 9 insertions(+), 4 deletions(
On Wed, 19 Jan 2022 at 06:14, Eric Huang wrote:
>
> I understand Alex's concern. I think usually we only check the version
> when a feature is only available in a specific version, and other
> version or newer version doesn't have.
>
> In case of FW fix, we assume the driver and FWs have to be syn
Applied. Thanks!
Alex
On Tue, Jan 18, 2022 at 2:57 AM wrote:
>
> From: Minghao Chi
>
> Return value from amdgpu_bo_create_kernel() directly instead
> of taking this in another redundant variable.
>
> Reported-by: Zeal Robot
> Signed-off-by: Minghao Chi
> Signed-off-by: CGEL ZTE
> ---
> dri
Applied. Thanks!
On Mon, Jan 17, 2022 at 3:05 PM Leo Liu wrote:
>
>
> On 2022-01-17 2:47 a.m., Qiang Ma wrote:
> > I met a bug recently and the kernel log:
> >
> > [ 330.171875] radeon :03:00.0: couldn't schedule ib
> > [ 330.175781] [drm:radeon_uvd_suspend [radeon]] *ERROR* Error destroyi
On Tue, Jan 18, 2022 at 3:13 PM Eric Huang wrote:
>
> I understand Alex's concern. I think usually we only check the version
> when a feature is only available in a specific version, and other
> version or newer version doesn't have.
>
> In case of FW fix, we assume the driver and FWs have to be s
I understand Alex's concern. I think usually we only check the version
when a feature is only available in a specific version, and other
version or newer version doesn't have.
In case of FW fix, we assume the driver and FWs have to be synchronous.
If we have driver backward compatibility for F
Applied. Strangely I can't seem to find this patch in my inbox or in
the dri-devel or amd-gfx archives.
Alex
On Tue, Jan 18, 2022 at 9:03 AM Lazar, Lijo wrote:
>
>
>
> On 1/18/2022 5:31 PM, Yongzhi Liu wrote:
> > pm_runtime_get_sync() increments the runtime PM usage counter even
> > when it ret
On Tue, Jan 18, 2022 at 2:27 PM Russell, Kent wrote:
>
> [AMD Official Use Only]
>
> I think what he means is that if we are using SDMA v17, this will cause
> issues, won't it? Should we check that SDMA version is >=18 before enabling
> it? Or am I misunderstanding the fix?
Yes, that was my con
[AMD Official Use Only]
I think what he means is that if we are using SDMA v17, this will cause issues,
won't it? Should we check that SDMA version is >=18 before enabling it? Or am I
misunderstanding the fix?
Kent
> -Original Message-
> From: amd-gfx On Behalf Of Eric Huang
> Sent:
On Fri, Jan 14, 2022 at 4:46 AM Vincent Whitchurch
wrote:
>
> On Fri, Jan 07, 2022 at 06:29:26AM +0100, Jim Cromie wrote:
> >
> > Enabling debug-to-tracefs is 2 steps:
> >
> > # event enable
> > echo 1 > /sys/kernel/tracing/events/dyndbg/enable
> > # callsite enable
> > echo module foo +T
The SDMA fix is generic and not in a specific version of FW, so we don't
have to check.
Thanks,
Eric
On 2022-01-18 11:35, Alex Deucher wrote:
On Tue, Jan 18, 2022 at 11:16 AM Eric Huang wrote:
SDMA FW fixes the hang issue for adding heavy-weight TLB
flush on Arcturus, so we can enable it.
D
On 2022-01-18 11:49 a.m., Kazlauskas, Nicholas wrote:
On 1/18/2022 11:40 AM, Rodrigo Siqueira wrote:
From: Leo Li
[Why]
crc_skip_count is used to track how many frames to skip to allow the OTG
CRC engine to "warm up" before it outputs correct CRC values.
Experimentally, this seems to be 2 f
On 2022-01-07 4:33 p.m., Isabella Basso wrote:
The calcs folder has FPU code on it, which should be isolated inside the
DML folder as per https://patchwork.freedesktop.org/series/93042/.
This commit aims single-handedly to correct the location of such FPU
code and does not refactor any functi
On some OEM setups users can configure the BIOS for S3 or S2idle.
When configured to S3 users can still choose 's2idle' in the kernel by
using `/sys/power/mem_sleep`. Before commit 6dc8265f9803 ("drm/amdgpu:
always reset the asic in suspend (v2)"), the GPU would crash. Now when
configured this wa
[Public]
That is what I was hoping to convey with the warning messages. I'll take a
stab at rewording them and send out an updated revision.
From: Liang, Prike
Sent: Tuesday, January 18, 2022 02:28
To: Limonciello, Mario ; Lazar, Lijo
; amd-gfx@lists.freedesktop.org
Cc: Bjoren Dasse
Subject:
On 1/18/2022 11:40 AM, Rodrigo Siqueira wrote:
From: Leo Li
[Why]
crc_skip_count is used to track how many frames to skip to allow the OTG
CRC engine to "warm up" before it outputs correct CRC values.
Experimentally, this seems to be 2 frames.
When duplicating CRTC states, this value was not c
From: Leo Li
[Why]
crc_skip_count is used to track how many frames to skip to allow the OTG
CRC engine to "warm up" before it outputs correct CRC values.
Experimentally, this seems to be 2 frames.
When duplicating CRTC states, this value was not copied to the
duplicated state. Therefore, when th
On Tue, Jan 18, 2022 at 11:16 AM Eric Huang wrote:
>
> SDMA FW fixes the hang issue for adding heavy-weight TLB
> flush on Arcturus, so we can enable it.
Do we need to check for a specific fw version?
Alex
>
> Signed-off-by: Eric Huang
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
SDMA FW fixes the hang issue for adding heavy-weight TLB
flush on Arcturus, so we can enable it.
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 8 +---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 3 ++-
2 files changed, 7 insertions(+), 4 deletions(-)
SDMA FW fixes the hang issue for adding heavy-weight TLB
flush on Arcturus, so we can enable it.
Signed-off-by: Eric Huang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 8 +---
drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 3 ++-
2 files changed, 7 insertions(+), 4 deletions(-)
On Tue, Jan 18, 2022 at 07:26:18PM +0800, Du, Xiaojian wrote:
> This patch will modify a pair of functions for pcie port wreg/rreg.
> AMD GPU have had an independent NBIO block from SOC15 arch.
> If the dirver wants to read/write the address space of the pcie devices,
> it has to go through the NBI
[Public]
Thanks for the clarification. The patch is:
Reviewed-by: Guchun Chen
Regards,
Guchun
-Original Message-
From: Christian König
Sent: Tuesday, January 18, 2022 10:10 PM
To: Chen, Guchun ; Kim, Jonathan ;
amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amdgpu: remove gar
On Mon, Jan 17, 2022 at 02:15:48PM +0900, Esaki Tomohito wrote:
> On 2022/01/14 23:16, Andy Shevchenko wrote:
> > On Fri, Jan 14, 2022 at 07:17:52PM +0900, Tomohito Esaki wrote:
> > > The LINEAR modifier is advertised as default if a driver doesn't specify
> > > modifiers.
> >
> > ...
> >
> > > +
From: Minghao Chi
Return value from amdgpu_bo_create_kernel() directly instead
of taking this in another redundant variable.
Reported-by: Zeal Robot
Signed-off-by: Minghao Chi
Signed-off-by: CGEL ZTE
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 6 +-
1 file changed, 1 insertion(+), 5 de
On Tue, Jan 18, 2022 at 05:36:49PM +0900, Tomohito Esaki wrote:
> Some drivers whose planes only support linear layout fb do not support format
> modifiers.
> These drivers should support modifiers, however the DRM core should handle
> this
> rather than open-coding in every driver.
>
> In this p
Am 18.01.22 um 14:28 schrieb Chen, Guchun:
[Public]
- if (amdgpu_sriov_vf(adev) && amdgpu_in_reset(adev))
- goto skip_pin_bo;
-
- r = amdgpu_gtt_mgr_recover(&adev->mman.gtt_mgr);
- if (r)
- return r;
-
-skip_pin_bo:
Does deleting skip_pin_bo path ca
On 1/18/2022 5:31 PM, Yongzhi Liu wrote:
pm_runtime_get_sync() increments the runtime PM usage counter even
when it returns an error code, thus a matching decrement is needed
on the error handling path to keep the counter balanced.
Signed-off-by: Yongzhi Liu
Thanks!
Reviewed-by: Lijo Laza
On 1/18/2022 4:56 PM, Xiaojian Du wrote:
This patch will modify a pair of functions for pcie port wreg/rreg.
AMD GPU have had an independent NBIO block from SOC15 arch.
If the dirver wants to read/write the address space of the pcie devices,
it has to go through the NBIO block.
This patch will
[Public]
- if (amdgpu_sriov_vf(adev) && amdgpu_in_reset(adev))
- goto skip_pin_bo;
-
- r = amdgpu_gtt_mgr_recover(&adev->mman.gtt_mgr);
- if (r)
- return r;
-
-skip_pin_bo:
Does deleting skip_pin_bo path cause bo redundant pin in SRIOV case?
Regards,
That's just a leftover from old radeon days and was preventing CS and GART
bindings before the hardware was initialized. But nowdays that is
perfectly valid.
The only thing we need to warn about are GART binding before the table
is even allocated.
Signed-off-by: Christian König
---
drivers/gpu/
This patch will modify a pair of functions for pcie port wreg/rreg.
AMD GPU have had an independent NBIO block from SOC15 arch.
If the dirver wants to read/write the address space of the pcie devices,
it has to go through the NBIO block.
This patch will move the pcie port wreg/rreg functions to
"am
Am 18.01.22 um 11:40 schrieb S, Shirish:
Hi Shashank,
On 1/12/2022 6:30 PM, Sharma, Shashank wrote:
On 1/11/2022 12:26 PM, Christian König wrote:
Am 11.01.22 um 08:12 schrieb Somalapuram Amaranath:
AMDGPURESET uevent added to notify userspace,
collect dump_stack and amdgpu_reset_reg_dumps
- Remove drm_mm references and replace with drm buddy functionalities
- Add res cursor support for drm buddy
v2(Matthew Auld):
- replace spinlock with mutex as we call kmem_cache_zalloc
(..., GFP_KERNEL) in drm_buddy_alloc() function
- lock drm_buddy_block_trim() function as it calls
On contiguous allocation, we round up the size
to the *next* power of 2, implement a function
to free the unused pages after the newly allocate block.
v2(Matthew Auld):
- replace function name 'drm_buddy_free_unused_pages' with
drm_buddy_block_trim
- replace input argument name 'actual_siz
Move shared vram inline functions and structs
into a header file
Signed-off-by: Arunpravin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h | 51
1 file changed, 51 insertions(+)
create mode 100644 drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.h
diff --git a/drivers/gpu/drm/a
Implemented a function which walk through the order list,
compares the offset and returns the maximum offset block,
this method is unpredictable in obtaining the high range
address blocks which depends on allocation and deallocation.
for instance, if driver requests address at a low specific
range,
- Make drm_buddy_alloc a single function to handle
range allocation and non-range allocation demands
- Implemented a new function alloc_range() which allocates
the requested power-of-two block comply with range limitations
- Moved order computation and memory alignment logic from
i915 drive
Move the base i915 buddy allocator code into drm
- Move i915_buddy.h to include/drm
- Move i915_buddy.c to drm root folder
- Rename "i915" string with "drm" string wherever applicable
- Rename "I915" string with "DRM" string wherever applicable
- Fix header file dependencies
- Fix alignment issues
Hi Shashank,
On 1/12/2022 6:30 PM, Sharma, Shashank wrote:
On 1/11/2022 12:26 PM, Christian König wrote:
Am 11.01.22 um 08:12 schrieb Somalapuram Amaranath:
AMDGPURESET uevent added to notify userspace,
collect dump_stack and amdgpu_reset_reg_dumps
Signed-off-by: Somalapuram Amaranath
---
The allow_fb_modifiers flag is unnecessary since it has been replaced
with cannot_support_modifiers flag.
Signed-off-by: Tomohito Esaki
---
drivers/gpu/drm/drm_plane.c | 9 -
drivers/gpu/drm/selftests/test-drm_framebuffer.c | 1 -
include/drm/drm_mode_config.h
The LINEAR modifier is advertised as default if a driver doesn't specify
modifiers.
Signed-off-by: Tomohito Esaki
---
drivers/gpu/drm/drm_plane.c | 15 ---
include/drm/drm_plane.h | 3 +++
2 files changed, 15 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/drm_plane.
If only linear modifier is advertised, since there are many drivers that
only linear supported, the DRM core should handle this rather than
open-coding in every driver. However, there are legacy drivers such as
radeon that do not support modifiers but infer the actual layout of the
underlying buffe
Some drivers whose planes only support linear layout fb do not support format
modifiers.
These drivers should support modifiers, however the DRM core should handle this
rather than open-coding in every driver.
In this patch series, these drivers expose format modifiers based on the
following sugge
If the flag ACPI_FADT_LOW_POWER_S0 not set or AMDPMC driver not build, then
that seems will mess up the suspend entry and unable to enter either S3 nor
S2idle properly. In this S2idle configuration issue case, how about add some
message to notify end user how to configure S2idle correctly?
Than
[Public]
Okay... in amdgpu_gart_bind, the check of gart.ptr is also present, so it's
safe.
Regards,
Guchun
-Original Message-
From: Koenig, Christian
Sent: Tuesday, January 18, 2022 4:14 PM
To: Chen, Guchun ; Kim, Jonathan ;
amd-gfx@lists.freedesktop.org
Cc: Kuehling, Felix
Subject:
That check is utterly nonsense and should probably be removed.
What needs to be checked is if the GART ptr is available and that should
certainly be the case at this point.
Christian.
Am 18.01.22 um 09:09 schrieb Chen, Guchun:
[Public]
Hi Christian,
Re: Well that doesn't seem to make sense
[Public]
Hi Christian,
Re: Well that doesn't seem to make sense the GART is initialized by the code
around the allocation so that should work fine.
Below is the calltrace during driver probe. When binding the page(SDMA bo) into
gart table, there is a check by gart.ready, that will be set to be
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