Display support for cyan skillfish is ready now. Enable it!
Signed-off-by: Lang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.
[AMD Official Use Only]
The patch looks good for me, but it's better to add comment in
amdgpu_register_bad_pages_mca_notifier to explain why we need to reserve GPU
info instead of using mgpu_info list, with this addressed, the patch is:
Reviewed-by: Tao Zhou mailto:tao.zh...@amd.com>>
[AMD Official Use Only]
Reviewed-by: Tao Zhou mailto:tao.zh...@amd.com>>
From: Joshi, Mukul
Sent: Tuesday, October 12, 2021 10:33 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhou1, Tao ; Clements, John ;
Joshi, Mukul
Subject: [PATCH 1/2] drm/amdgpu: Enable RAS err
During mode2 reset, the GPU is temporarily removed from the
mgpu_info list. As a result, page retirement fails because it
cannot find the GPU in the GPU list.
To fix this, create our own list of GPUs that support MCE notifier
based page retirement and use that list to check if the UMC error
occurre
Add the missing call to re-enable RAS error injections on the Aldebaran
mode2 reset code path.
Signed-off-by: Mukul Joshi
---
drivers/gpu/drm/amd/amdgpu/aldebaran.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/aldebaran.c
b/drivers/gpu/drm/amd/amdgpu/aldebara
[Public]
>-Original Message-
>From: Chen, Guchun
>Sent: Monday, October 11, 2021 10:27 PM
>To: Lazar, Lijo ; Yu, Lang ; amd-
>g...@lists.freedesktop.org
>Cc: Deucher, Alexander ; Huang, Ray
>
>Subject: RE: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish
>
>[Public]
>
[AMD Official Use Only]
Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx On Behalf Of Alex
> Deucher
> Sent: Monday, October 11, 2021 11:04 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Deucher, Alexander
> Subject: [PATCH] drm/amdgpu/pm: properly handle sclk for profiling mo
I've raised a bug with hopefully everything you need
https://gitlab.freedesktop.org/drm/amd/-/issues/1743
On Mon, 11 Oct 2021 at 18:35, Alex Deucher wrote:
>
> On Mon, Oct 11, 2021 at 1:20 PM Mike Lothian wrote:
> >
> > Hi
> >
> > This patch breaks things for me on my Green Sardine & Navy Floun
-- Forwarded message -
From: docfate111
Date: Mon, Oct 11, 2021 at 4:22 PM
Subject: [PATCH] Size can be any value and is user controlled resulting in
overwriting the 40 byte array wr_buf with an arbitrary length of data from
buf.
To:
Cc: ,
Signed-off-by: docfate111
---
driver
On Mon, Oct 11, 2021 at 1:20 PM Mike Lothian wrote:
>
> Hi
>
> This patch breaks things for me on my Green Sardine & Navy Flounder
> system (Asus ROG G513QY)
>
> It doesn't get past post with amdgpu built in, will try as a module
Can you provide the dmesg output in that case?
Alex
>
> Cheers
>
On Mon, Oct 11, 2021 at 08:03:51AM +, Quan, Evan wrote:
> OK... Then forget about previous patches. Let's try to narrow down the
> issue first. Please try the attached patch1 first. If it works,
It does.
> please undo the changes of patch1 and try patch2 to narrow down further.
It does too.
Hi
This patch breaks things for me on my Green Sardine & Navy Flounder
system (Asus ROG G513QY)
It doesn't get past post with amdgpu built in, will try as a module
Cheers
Mike
On Tue, 28 Sept 2021 at 17:44, Alex Deucher wrote:
>
> Rather than hardcoding based on asic_type, use the IP
> discov
On 10/11/21 11:03 AM, Borislav Petkov wrote:
Ok,
here's v2, I've added "however" number 3 below which should summarize
Christian's note about coherent and concurrent use of memory by the GPU
and CPU, which obviously cannot work with bounce buffers.
I'll send it to Linus next week if there are n
On Mon, Oct 11, 2021 at 12:03 PM Borislav Petkov wrote:
>
> Ok,
>
> here's v2, I've added "however" number 3 below which should summarize
> Christian's note about coherent and concurrent use of memory by the GPU
> and CPU, which obviously cannot work with bounce buffers.
>
> I'll send it to Linus
Ok,
here's v2, I've added "however" number 3 below which should summarize
Christian's note about coherent and concurrent use of memory by the GPU
and CPU, which obviously cannot work with bounce buffers.
I'll send it to Linus next week if there are no more complaints.
Thx.
---
From: Borislav Pe
Commit ddab8bd788f5 ("drm/amd/display: Fix two cursor duplication when
using overlay") changed the atomic validation code to forbid the
overlay plane from being used if it doesn't cover the whole CRTC. The
motivation is that ChromeOS uses the atomic API for everything except
the cursor plane (which
When selecting between levels in the force performance levels interface
sclk (gfxclk) was not set correctly for all levels. Select the proper
sclk settings for all levels.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1726
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/pm/swsmu/smu11/va
raven_device_info is not used when KFD_SUPPORT_IOMMU_V2 is not
set.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index
No longer used since IP enumeration is driven by the IP
discovery table now.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile | 6 +-
.../gpu/drm/amd/amdgpu/beige_goby_reg_init.c | 54 --
.../drm/amd/amdgpu/cyan_skillfish_reg_init.c | 51 --
No longer used since IP enumeration is now driven by
amdgpu IP discovery code.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 179 -
drivers/gpu/drm/amd/amdgpu/soc15.h | 1 -
2 files changed, 180 deletions(-)
diff --git a/drivers/gpu/drm/amd/a
No longer used since IP enumeration is now driven by
amdgpu IP discovery code.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 293
drivers/gpu/drm/amd/amdgpu/nv.h | 1 -
2 files changed, 294 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdg
hawaii_device_info is not used when CONFIG_DRM_AMDGPU_CIK is not
set.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index 064d42acd54
On Mon, Oct 11, 2021 at 10:21 AM Paul Menzel wrote:
>
> Dear Tom,
>
>
> Am 11.10.21 um 15:58 schrieb Tom Lendacky:
> > On 10/11/21 8:52 AM, Paul Menzel wrote:
>
> >> Am 11.10.21 um 15:27 schrieb Tom Lendacky:
> >>> On 10/11/21 8:11 AM, Borislav Petkov wrote:
> On Mon, Oct 11, 2021 at 03:05:33
On 10/11/21 9:21 AM, Paul Menzel wrote:
Dear Tom,
Am 11.10.21 um 15:58 schrieb Tom Lendacky:
On 10/11/21 8:52 AM, Paul Menzel wrote:
Am 11.10.21 um 15:27 schrieb Tom Lendacky:
On 10/11/21 8:11 AM, Borislav Petkov wrote:
On Mon, Oct 11, 2021 at 03:05:33PM +0200, Paul Menzel wrote:
I think,
[Public]
Global variable to carry the sclk value looks a bit over-killed. Is it possible
that move all into cyan_skillfish_od_edit_dpm_table, like querying sclk first
and setting it to cyan_skillfish_user_settings.sclk?
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Laz
Dear Tom,
Am 11.10.21 um 15:58 schrieb Tom Lendacky:
On 10/11/21 8:52 AM, Paul Menzel wrote:
Am 11.10.21 um 15:27 schrieb Tom Lendacky:
On 10/11/21 8:11 AM, Borislav Petkov wrote:
On Mon, Oct 11, 2021 at 03:05:33PM +0200, Paul Menzel wrote:
I think, the IOMMU is enabled on the MSI B350M MO
[Public]
Hi youling,
Would you pls try this patch ?
BRs,
Yifan
-Original Message-
From: youling 257
Sent: Monday, October 11, 2021 2:18 PM
To: Zhang, Yifan
Cc: Kuehling, Felix ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/amdgpu: init iommu after amdkfd device init
d
On 10/11/21 8:52 AM, Paul Menzel wrote:
Dear Tom,
Am 11.10.21 um 15:27 schrieb Tom Lendacky:
On 10/11/21 8:11 AM, Borislav Petkov wrote:
On Mon, Oct 11, 2021 at 03:05:33PM +0200, Paul Menzel wrote:
I think, the IOMMU is enabled on the MSI B350M MORTAR, but otherwise, yes
this looks fine. The
Dear Tom,
Am 11.10.21 um 15:27 schrieb Tom Lendacky:
On 10/11/21 8:11 AM, Borislav Petkov wrote:
On Mon, Oct 11, 2021 at 03:05:33PM +0200, Paul Menzel wrote:
I think, the IOMMU is enabled on the MSI B350M MORTAR, but otherwise,
yes
this looks fine. The help text could also be updated to ment
On 10/11/21 8:11 AM, Borislav Petkov wrote:
On Mon, Oct 11, 2021 at 03:05:33PM +0200, Paul Menzel wrote:
I think, the IOMMU is enabled on the MSI B350M MORTAR, but otherwise, yes
this looks fine. The help text could also be updated to mention problems
with AMD Raven devices.
This is not only a
Acked-by: Alex Deucher
On Fri, Oct 8, 2021 at 5:21 PM Harry Wentland wrote:
>
> He's been helping maintain it for quite a while now. Make
> it official.
>
> Signed-off-by: Harry Wentland
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> in
On Mon, Oct 11, 2021 at 03:05:33PM +0200, Paul Menzel wrote:
> I think, the IOMMU is enabled on the MSI B350M MORTAR, but otherwise, yes
> this looks fine. The help text could also be updated to mention problems
> with AMD Raven devices.
This is not only about Raven GPUs but, as Alex explained, pr
Dear Borislav,
Am 06.10.21 um 19:48 schrieb Borislav Petkov:
Ok,
so I sat down and wrote something and tried to capture all the stuff we
so talked about that it is clear in the future why we did it.
Thoughts?
---
From: Borislav Petkov
Date: Wed, 6 Oct 2021 19:34:55 +0200
Subject: [PATCH] x8
test this patch can fix my boot and suspend problem.
2021-10-11 18:03 GMT+08:00, Zhang, Yifan :
> [Public]
>
> Hi youling,
>
> Would you pls try this patch ?
>
> BRs,
> Yifan
>
> -Original Message-
> From: youling 257
> Sent: Monday, October 11, 2021 2:18 PM
> To: Zhang, Yifan
> Cc: Kueh
When IOMMU disabled in sbios and kfd in iommuv2 path,
IOMMU resume failure blocks system resume. Don't allow kfd to
use iommu v2 when iommu is disabled.
Reported-by: youling
Tested-by: youling
Signed-off-by: Yifan Zhang
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 1 +
1 file changed, 1 inser
When IOMMU disabled in sbios and kfd in iommuv2 path, iommuv2
init will fail. But this failure should not block amdgpu driver init.
Reported-by: youling
Tested-by: youling
Signed-off-by: Yifan Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4
drivers/gpu/drm/amd/amdkfd/kfd_device.
[AMD Official Use Only]
Great. Thanks for testing.
-Original Message-
From: youling 257
Sent: Monday, October 11, 2021 6:20 PM
To: Zhang, Yifan
Cc: Kuehling, Felix ; amd-gfx@lists.freedesktop.org;
Zhu, James
Subject: Re: [PATCH 2/2] drm/amdgpu: init iommu after amdkfd device init
te
[AMD Official Use Only]
OK... Then forget about previous patches. Let's try to narrow down the issue
first.
Please try the attached patch1 first. If it works, please undo the changes of
patch1 and try patch2 to narrow down further.
BR
Evan
> -Original Message-
> From: Borislav Petkov
>
[AMD Official Use Only]
>-Original Message-
>From: Lazar, Lijo
>Sent: Monday, October 11, 2021 4:54 PM
>To: Yu, Lang ; amd-gfx@lists.freedesktop.org
>Cc: Deucher, Alexander ; Huang, Ray
>
>Subject: Re: [PATCH] drm/amdgpu: query default sclk from smu for cyan_skillfish
>
>
>
>On 10/11/20
Currently, all kfd BOs use same destruction routine. But pinned
BOs are not unpinned properly. Separate them from general routine.
Signed-off-by: Lang Yu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h| 2 +
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c | 10 ++
drivers/gpu/drm/amd/amdkfd/
On 10/11/2021 2:01 PM, Lang Yu wrote:
Query default sclk instead of hard code.
Signed-off-by: Lang Yu
---
.../gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish
[AMD Official Use Only]
Acked-by: Huang Rui
-Original Message-
From: amd-gfx On Behalf Of Lang Yu
Sent: Monday, October 11, 2021 4:32 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Huang, Ray
; Yu, Lang
Subject: [PATCH] drm/amdgpu: query default sclk from smu for cyan_s
Am 08.10.21 um 23:21 schrieb Harry Wentland:
He's been helping maintain it for quite a while now. Make
it official.
Signed-off-by: Harry Wentland
Acked-by: Christian König
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 24d520c4b157..b
Query default sclk instead of hard code.
Signed-off-by: Lang Yu
---
.../gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/cyan_skillfish_ppt.c
b/drivers/gpu/drm/amd/pm/swsmu/smu11/
This is a supplement for the change below:
cdccf1ffe1a3 drm/amdgpu: Fix crash on device remove/driver unload
Signed-off-by: Evan Quan
Change-Id: Iedc25e2f572f04772511d56781b01b481e22fd00
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 24 +---
1 file changed, 13 insertions(+), 11
On Sat, Oct 09, 2021 at 09:54:13AM +, Quan, Evan wrote:
> Oops, I just found some necessary changes are missing from the patch of the
> link below.
> https://lists.freedesktop.org/archives/amd-gfx/2021-September/069006.html
>
> Could you try the patch from the link above + the attached patch?
drm/amdgpu: init iommu after amdkfd device init
but CONFIG_AMD_IOMMU=y CONFIG_AMD_IOMMU_V2=y
[0.203386] AMD-Vi: AMD IOMMUv2 driver by Joerg Roedel
[0.203387] AMD-Vi: AMD IOMMUv2 functionality not available on this system
[7.622052] kfd kfd: amdgpu: Allocated 3969056 bytes on gart
[
my kernel config CONFIG_AMD_IOMMU=y CONFIG_AMD_IOMMU_V2=y.
linux kernel 5.15rc2 "drm/amdgpu: move iommu_resume before ip init/resume"
cause my amd 3400g suspend to disk resume failed, have to press power button to
force shutdown.
linux kernel 5.15rc5 "drm/amdgpu: init iommu after amdkfd device in
On Sat, Oct 09, 2021 at 01:20:39AM +, Quan, Evan wrote:
> Maybe the change below can address your issue.
> https://lists.freedesktop.org/archives/amd-gfx/2021-September/069006.html
Nope, that one doesn't change anything.
Thx.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/note
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