Hi Evan,
Bit of a drive by comment but I think that maybe all the
*_fan_speed_percent() function names are a bit confusing if they no longer
operate on percents but on a duty cycle unit of 0-255. No good idea what to
call them though :-\
Also max() could be used in a bunch of places instead of
These registers have different address from other SMU V11 ASICs.
Change-Id: Iaeb0438331eed9b0313933da25622f8e4c048fab
Signed-off-by: Evan Quan
---
.../gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c| 104 +-
1 file changed, 78 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/d
The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed PWM.
Change-Id: Idfe0276d7113b9c921b88fa08085a33fd971d621
Signed-off-by: Evan Quan
---
.../include/asic_reg/thm/thm_11_0_2_offset.h | 3 +
As the relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, both the RPM and PWM
settings need to be saved.
Change-Id: I318c134d442273d518b805339cdf383e151b935d
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 8 +
As the fan control was guarded under manual mode before fan speed
RPM/PWM setting. Thus the extra check is totally redundant.
Change-Id: Ia9d776141ec4aa39255accbf00d7e7ed81c8424d
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 12 +---
1 file changed, 1 inse
The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
retrieving the fan speed RPM.
Change-Id: Ife4298c8b7ec93ef023a7da27d59654e0444e044
Signed-off-by: Evan Quan
---
.../include/asic_reg/thm/thm_11_0_2_offset.h | 3 +
Currently, the readout of fan speed pwm is transited into percent-based
and then pwm-based. However, the transition into percent-based is totally
unnecessary and make the final output less accurate.
Change-Id: Ib99e088cda1875b4e2601f7077a178af6fe8a6cb
Signed-off-by: Evan Quan
---
drivers/gpu/drm
The relationship "PWM = RPM / smu->fan_max_rpm" between fan speed
PWM and RPM is not true for SMU11 ASICs. So, we need a new way to
perform the fan speed RPM setting.
Change-Id: I1afe8102f02ead9a8a07c7105f689ac60a85b0d8
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h |
Am 2021-07-06 um 11:36 a.m. schrieb Colin Ian King:
> Hi,
>
> Static analysis with Coverity on linux-next has found a potential null
> pointer dereference in function svm_range_restore_pages in
> drivers/gpu/drm/amd/amdkfd/kfd_svm.c from the following commit:
>
> commit d4ebc2007040a0aff01bfe1b194
Am 2021-07-06 um 5:44 p.m. schrieb Alex Deucher:
> On Tue, Jul 6, 2021 at 7:16 AM Sasha Levin wrote:
>> From: Yifan Zhang
>>
>> [ Upstream commit 631003101c516ea29a74aee59666708857b9a805 ]
>>
>> If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC.
>> Enlarge CP_MEC_DOORBELL_RA
On Tue, Jul 6, 2021 at 7:16 AM Sasha Levin wrote:
>
> From: Yifan Zhang
>
> [ Upstream commit 631003101c516ea29a74aee59666708857b9a805 ]
>
> If GC has entered CGPG, ringing doorbell > first page doesn't wakeup GC.
> Enlarge CP_MEC_DOORBELL_RANGE_UPPER to workaround this issue.
>
> Signed-off-by:
Happy to help, Christian :)
Nirmoy
On 7/6/2021 5:33 PM, Christian Zigotzky wrote:
Hi Nirmoy,
This patch works! Thanks a lot! We tested it on an A-EON AmigaOne
X5000/20 today.
Screenshot:
https://nam11.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.skateman.nl%2Fwp-content%2Fupload
On 2021-07-06 11:25 a.m., Alex Deucher wrote:
> On Fri, Jul 2, 2021 at 7:05 PM Luben Tuikov wrote:
>> In amdgpu_ras_query_error_count() return an error
>> if the device doesn't support RAS. This prevents
>> that function from having to always set the values
>> of the integer pointers (if set), and
On Tue, Jul 6, 2021 at 2:31 PM Jason Gunthorpe wrote:
>
> On Tue, Jul 06, 2021 at 07:35:55PM +0200, Daniel Vetter wrote:
>
> > Yup. We dont care about any of the fancy pieces you build on top, nor
> > does the compiler need to be the optimizing one. Just something that's
> > good enough to drive t
On Tue, Jul 6, 2021 at 8:31 PM Jason Gunthorpe wrote:
> On Tue, Jul 06, 2021 at 07:35:55PM +0200, Daniel Vetter wrote:
> > Yup. We dont care about any of the fancy pieces you build on top, nor
> > does the compiler need to be the optimizing one. Just something that's
> > good enough to drive the h
On Tue, Jul 06, 2021 at 02:28:28PM -0300, Jason Gunthorpe wrote:
> > Also on your claim that drivers/gpu is a non-upstream disaster: I've
> > also learned that that for drivers/rdma there's the upstream driver,
> > and then there's the out-of-tree hackjob the vendor actually
> > supports.
>
> In t
On Tue, Jul 06, 2021 at 07:35:55PM +0200, Daniel Vetter wrote:
> Yup. We dont care about any of the fancy pieces you build on top, nor
> does the compiler need to be the optimizing one. Just something that's
> good enough to drive the hw in some demons to see how it works and all
> that. Generally
On Tue, Jul 06, 2021 at 07:31:37PM +0200, Christoph Hellwig wrote:
> On Tue, Jul 06, 2021 at 02:28:28PM -0300, Jason Gunthorpe wrote:
> > > Also on your claim that drivers/gpu is a non-upstream disaster: I've
> > > also learned that that for drivers/rdma there's the upstream driver,
> > > and then
Thanks, corrected.
Best wishes
Emily Deng
>-Original Message-
>From: Chen, Guchun
>Sent: Tuesday, July 6, 2021 9:52 PM
>To: Deng, Emily ; amd-gfx@lists.freedesktop.org
>Cc: Deng, Emily
>Subject: RE: [PATCH] drm/amdgpu: Correct the irq numbers for virtual ctrc
>
>[Public]
>
>A spelling
The irq number should be decided by num_crtc, and the num_crtc could change
by parameter.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
b/drivers/gpu/drm/amd/amd
I should stop typing and prep dinner, but I found some too hilarious
typos below.
On Tue, Jul 6, 2021 at 7:35 PM Daniel Vetter wrote:
>
> On Tue, Jul 6, 2021 at 6:29 PM Jason Gunthorpe wrote:
> >
> > On Tue, Jul 06, 2021 at 05:49:01PM +0200, Daniel Vetter wrote:
> >
> > > The other thing to keep
[Public]
A spelling typo in subject.
s/ctrc/crtc
Regards,
Guchun
-Original Message-
From: amd-gfx On Behalf Of Emily Deng
Sent: Tuesday, July 6, 2021 4:23 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deng, Emily
Subject: [PATCH] drm/amdgpu: Correct the irq numbers for virtual ctrc
The ir
On Tue, Jul 6, 2021 at 6:29 PM Jason Gunthorpe wrote:
>
> On Tue, Jul 06, 2021 at 05:49:01PM +0200, Daniel Vetter wrote:
>
> > The other thing to keep in mind is that one of these drivers supports
> > 25 years of product generations, and the other one doesn't.
>
> Sure, but that is the point, isn'
On Tue, Jul 06, 2021 at 06:07:17PM +0200, Daniel Vetter wrote:
> Also on your claim that drivers/gpu is a non-upstream disaster: I've
> also learned that that for drivers/rdma there's the upstream driver,
> and then there's the out-of-tree hackjob the vendor actually
> supports.
In the enterprise
On Tue, Jul 06, 2021 at 04:09:25PM +0200, Daniel Vetter wrote:
> Anyway, for anything that works like a gpu accelerator, like 3d accel,
> or parallel compute accel (aka gpgpu) or spatial compute accel (aka
> NN/AI) or maybe even fpga accel most of the magic to use the hardware
> is in this backend
On Tue, Jul 06, 2021 at 12:36:51PM +0200, Daniel Vetter wrote:
> If that means AI companies don't want to open our their hw specs
> enough to allow that, so be it - all you get in that case is
> offloading the kernel side of the stack for convenience, with zero
> long term prospects to ever make
On Tue, Jul 06, 2021 at 04:39:19PM +0200, Daniel Vetter wrote:
> On Tue, Jul 6, 2021 at 4:23 PM Jason Gunthorpe wrote:
> >
> > On Tue, Jul 06, 2021 at 12:36:51PM +0200, Daniel Vetter wrote:
> >
> > > If that means AI companies don't want to open our their hw specs
> > > enough to allow that, so be
Hi,
Static analysis with Coverity on linux-next has found a potential null
pointer dereference in function svm_range_restore_pages in
drivers/gpu/drm/amd/amdkfd/kfd_svm.c from the following commit:
commit d4ebc2007040a0aff01bfe1b194085d3867328fd
Author: Philip Yang
Date: Tue Jun 22 00:12:32 20
On Tue, Jul 06, 2021 at 05:49:01PM +0200, Daniel Vetter wrote:
> The other thing to keep in mind is that one of these drivers supports
> 25 years of product generations, and the other one doesn't.
Sure, but that is the point, isn't it? To have an actually useful
thing you need all of this mess
Hi Nirmoy,
This patch works! Thanks a lot! We tested it on an A-EON AmigaOne
X5000/20 today.
Screenshot:
http://www.skateman.nl/wp-content/uploads/2021/07/Screenshot-at-2021-07-06-113237.png
Cheers,
Christian
On 05 July 2021 at 06:48 pm, Christian Zigotzky wrote:
Hi Nirmoy,
Many thanks f
On Tue, Jul 6, 2021 at 5:49 PM Daniel Vetter wrote:
> On Tue, Jul 6, 2021 at 5:25 PM Jason Gunthorpe wrote:
> > I'm not sure about this all or nothing approach. AFAIK DRM has the
> > worst problems with out of tree drivers right now.
>
> Well I guess someone could stand up a drivers/totally-not-g
On Tue, Jul 6, 2021 at 4:56 PM Jason Gunthorpe wrote:
> On Tue, Jul 06, 2021 at 04:09:25PM +0200, Daniel Vetter wrote:
> > Anyway, for anything that works like a gpu accelerator, like 3d accel,
> > or parallel compute accel (aka gpgpu) or spatial compute accel (aka
> > NN/AI) or maybe even fpga ac
On Tue, Jul 6, 2021 at 5:25 PM Jason Gunthorpe wrote:
> On Tue, Jul 06, 2021 at 04:39:19PM +0200, Daniel Vetter wrote:
> > On Tue, Jul 6, 2021 at 4:23 PM Jason Gunthorpe wrote:
> > >
> > > On Tue, Jul 06, 2021 at 12:36:51PM +0200, Daniel Vetter wrote:
> > >
> > > > If that means AI companies don'
[Public]
Reviewed-by: Lijo Lazar
-Original Message-
From: Hou, Xiaomeng (Matthew)
Sent: Tuesday, July 6, 2021 4:24 PM
To: amd-gfx@lists.freedesktop.org
Cc: Lazar, Lijo ; Wang, Kevin(Yang) ;
Liu, Aaron ; Hou, Xiaomeng (Matthew)
Subject: [PATCH v2] drm/amd/pm: drop smu_v13_0_1.c|h file
On Fri, Jul 2, 2021 at 7:05 PM Luben Tuikov wrote:
>
> In amdgpu_ras_query_error_count() return an error
> if the device doesn't support RAS. This prevents
> that function from having to always set the values
> of the integer pointers (if set), and thus
> prevents function side effects--always to
[Public]
Series is
Reviewed-by: Lijo Lazar
-Original Message-
From: Quan, Evan
Sent: Tuesday, July 6, 2021 12:16 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Lazar, Lijo
; Quan, Evan
Subject: [PATCH V2 1/3] drm/amd/pm: new SmuMetrics data structure for Sienn
Since there's nothing special in smu implementation for yellow carp,
it's better to reuse the common smu_v13_0 interfaces and drop the
specific smu_v13_0_1.c|h files.
v2: remove the duplicate register offset and shift mask header files as
well.
Signed-off-by: Xiaomeng Hou
---
.../include/asic_r
On Tue, Jul 6, 2021 at 4:23 PM Jason Gunthorpe wrote:
>
> On Tue, Jul 06, 2021 at 12:36:51PM +0200, Daniel Vetter wrote:
>
> > If that means AI companies don't want to open our their hw specs
> > enough to allow that, so be it - all you get in that case is
> > offloading the kernel side of the st
On Tue, Jul 6, 2021 at 3:44 PM Jason Gunthorpe wrote:
>
> On Tue, Jul 06, 2021 at 02:07:16PM +0200, Daniel Vetter wrote:
>
> > On the "rdma-core" idea, afaik rdma NIC do not have fully programmable
> > cores in their hw, for which you'd need some kind of compiler to make
> > use of the hardware an
On Tue, Jul 6, 2021, 16:54 Jason Gunthorpe wrote:
> On Tue, Jul 06, 2021 at 12:44:49PM +0300, Oded Gabbay wrote:
>
> > > > + /* In case we got a large memory area to export, we need to
> divide it
> > > > + * to smaller areas because each entry in the dmabuf sgt can
> only
> > > > +
On Tue, Jul 06, 2021 at 12:44:49PM +0300, Oded Gabbay wrote:
> > > + /* In case we got a large memory area to export, we need to divide
> > > it
> > > + * to smaller areas because each entry in the dmabuf sgt can only
> > > + * describe unsigned int.
> > > + */
> >
> > Huh? Thi
On Tue, Jul 06, 2021 at 02:07:16PM +0200, Daniel Vetter wrote:
> On the "rdma-core" idea, afaik rdma NIC do not have fully programmable
> cores in their hw, for which you'd need some kind of compiler to make
> use of the hardware and the interfaces the kernel provides? So not
> really compareable,
On Tue, Jul 6, 2021 at 4:17 PM Daniel Vetter wrote:
>
> On Tue, Jul 6, 2021 at 2:46 PM Oded Gabbay wrote:
> >
> > On Tue, Jul 6, 2021 at 3:23 PM Daniel Vetter wrote:
> > >
> > > On Tue, Jul 06, 2021 at 02:21:10PM +0200, Christoph Hellwig wrote:
> > > > On Tue, Jul 06, 2021 at 10:40:37AM +0200, D
On Tue, 2021-07-06 at 09:38 +0200, Samuel Iglesias Gonsálvez wrote:
> Hi!
>
> We have decided to extend the Call for Proposals until September 1st
> or
> until we will all the available talk slots, whichever occurs first.
>
> Remember that talks will get accepted by order of submission. If you
>
On Tue, Jul 06, 2021 at 10:40:37AM +0200, Daniel Vetter wrote:
> > Greg, I hope this will be good enough for you to merge this code.
>
> So we're officially going to use dri-devel for technical details review
> and then Greg for merging so we don't have to deal with other merge
> criteria dri-deve
Hi!
We have decided to extend the Call for Proposals until September 1st or
until we will all the available talk slots, whichever occurs first.
Remember that talks will get accepted by order of submission. If you
are thinking on proposing a talk for XDC, do it as soon as possible.
Thanks,
Sam
On Tue, Jul 06, 2021 at 12:36:51PM +0200, Daniel Vetter wrote:
> Afaik linux cpu arch ports are also not accepted if there's no open
> gcc or llvm port around, because without that the overall stack just
> becomes useless.
Yes. And the one architecture that has an open but not upstream
compiler a
On Tue, Jul 6, 2021 at 2:46 PM Oded Gabbay wrote:
>
> On Tue, Jul 6, 2021 at 3:23 PM Daniel Vetter wrote:
> >
> > On Tue, Jul 06, 2021 at 02:21:10PM +0200, Christoph Hellwig wrote:
> > > On Tue, Jul 06, 2021 at 10:40:37AM +0200, Daniel Vetter wrote:
> > > > > Greg, I hope this will be good enough
On Tue, Jul 6, 2021 at 3:23 PM Daniel Vetter wrote:
>
> On Tue, Jul 06, 2021 at 02:21:10PM +0200, Christoph Hellwig wrote:
> > On Tue, Jul 06, 2021 at 10:40:37AM +0200, Daniel Vetter wrote:
> > > > Greg, I hope this will be good enough for you to merge this code.
> > >
> > > So we're officially go
[AMD Official Use Only]
Hi Nirmoy,
Thanks, already send out another patch with updating the commit.
Best wishes
Emily Deng
>-Original Message-
>From: Das, Nirmoy
>Sent: Friday, July 2, 2021 5:03 PM
>To: Deng, Emily ; amd-gfx@lists.freedesktop.org
>Cc: Zhao, Victor
>Subject: Re: [PA
On Tue, Jul 06, 2021 at 02:21:10PM +0200, Christoph Hellwig wrote:
> On Tue, Jul 06, 2021 at 10:40:37AM +0200, Daniel Vetter wrote:
> > > Greg, I hope this will be good enough for you to merge this code.
> >
> > So we're officially going to use dri-devel for technical details review
> > and then G
The irq number should be decided by num_crtc, and the num_crtc could change
by parameter.
Signed-off-by: Emily Deng
---
drivers/gpu/drm/amd/amdgpu/dce_virtual.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_virtual.c
b/drivers/gpu/drm/amd/amd
On Tue, Jul 6, 2021 at 12:47 PM Daniel Vetter wrote:
> On Tue, Jul 6, 2021 at 12:36 PM Daniel Vetter wrote:
> > On Tue, Jul 6, 2021 at 12:03 PM Oded Gabbay wrote:
> > >
> > > On Tue, Jul 6, 2021 at 11:40 AM Daniel Vetter wrote:
> > > >
> > > > On Mon, Jul 05, 2021 at 04:03:12PM +0300, Oded Gabb
[AMD Official Use Only]
Reviewed-by: Mon Liu
Thanks
--
Monk Liu | Cloud-GPU Core team
--
-Original Message-
From: Jingwen Chen
Sent: Thursday, July 1, 2021 6:13 PM
To: amd-gfx@lists.freedesktop.org
Cc: L
From: Jack Zhang
[ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ]
Disable all ip's hw status to false before any hw_init.
Only set it to true until its hw_init is executed.
The old 5.9 branch has this change but somehow the 5.11 kernrel does
not have this fix.
Without this change,
From: Dmytro Laktyushkin
[ Upstream commit 8809a7a4afe90ad9ffb42f72154d27e7c47551ae ]
Right now the flag simply selects memory config 0 when flag is true
however 420 modes benefit more from memory config 3.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Aric Cyr
Acked-by: Stylon Wang
Tested-
From: Jack Zhang
[ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ]
Disable all ip's hw status to false before any hw_init.
Only set it to true until its hw_init is executed.
The old 5.9 branch has this change but somehow the 5.11 kernrel does
not have this fix.
Without this change,
From: xinhui pan
[ Upstream commit 56f221b6389e7ab99c30bbf01c71998ae92fc584 ]
To avoid any list corruption.
Signed-off-by: xinhui pan
Reviewed-by: Felix Kuehling
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 22 ++
From: Mark Yacoub
[ Upstream commit 03fc4cf45d30533d54f0f4ebc02aacfa12f52ce2 ]
For each CRTC state, check the size of Gamma and Degamma LUTs so
unexpected and larger sizes wouldn't slip through.
TEST: IGT:kms_color::pipe-invalid-gamma-lut-sizes
v2: fix assignments in if clauses, Mark's email.
From: Nirmoy Das
[ Upstream commit bc05716d4fdd065013633602c5960a2bf1511b9c ]
Fixes handling when page tables are in system memory.
v3: remove struct amdgpu_vm_parser.
v2: remove unwanted variable.
change amdgpu_amdkfd_validate instead of amdgpu_amdkfd_bo_validate.
Signed-off-by: Nirmoy Da
From: Wesley Chalmers
[ Upstream commit 3577e1678772ce3ede92af3a75b44a4b76f9b4ad ]
[WHY]
DISPCLK_MAX_ERRDET_CYCLES must be 7 to prevent connection loss when
changing DENTIST_DISPCLK_WDIVIDER from 126 to 127 and back.
Signed-off-by: Wesley Chalmers
Reviewed-by: Dmytro Laktyushkin
Acked-by: Sty
From: Vladimir Stempen
[ Upstream commit 3f8518b60c10aa96f3efa38a967a0b4eb9211ac0 ]
[why]
When OS overrides training link training parameters
for MST device to SST mode, MST resources are not
released and leak of the resource may result crash and
incorrect MST discovery during following hot plug
From: Roman Li
[ Upstream commit c521fc316d12fb9ea7b7680e301d673bceda922e ]
[Why]
We update scaling settings when scaling mode has been changed.
However when changing mode from native resolution the scaling mode previously
set gets ignored.
[How]
Perform scaling settings update on modeset.
Sig
From: Dmytro Laktyushkin
[ Upstream commit 8809a7a4afe90ad9ffb42f72154d27e7c47551ae ]
Right now the flag simply selects memory config 0 when flag is true
however 420 modes benefit more from memory config 3.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Aric Cyr
Acked-by: Stylon Wang
Tested-
From: Jack Zhang
[ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ]
Disable all ip's hw status to false before any hw_init.
Only set it to true until its hw_init is executed.
The old 5.9 branch has this change but somehow the 5.11 kernrel does
not have this fix.
Without this change,
From: xinhui pan
[ Upstream commit 56f221b6389e7ab99c30bbf01c71998ae92fc584 ]
To avoid any list corruption.
Signed-off-by: xinhui pan
Reviewed-by: Felix Kuehling
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 22 ++
From: "Stanley.Yang"
[ Upstream commit 6ec598cc9dfbf40433e94a2ed1a622e3ef80268b ]
Signed-off-by: Stanley.Yang
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 5 +
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c | 2
From: Amber Lin
[ Upstream commit a7b2451d31cfa2e8aeccf3b35612ce33f02371fc ]
Calling free_mqd inside of destroy_queue_nocpsch_locked can cause a
circular lock. destroy_queue_nocpsch_locked is called under a DQM lock,
which is taken in MMU notifiers, potentially in FS reclaim context.
Taking anot
From: Jonathan Kim
[ Upstream commit 63f6e01237257e7226efc5087f3f0b525d320f54 ]
get_wave_state acquires the mmap_lock on copy_to_user but so do
mmu_notifiers. mmu_notifiers allows dqm locking so do get_wave_state
outside the dqm_lock to prevent circular locking.
v2: squash in unused variable r
From: Mark Yacoub
[ Upstream commit 03fc4cf45d30533d54f0f4ebc02aacfa12f52ce2 ]
For each CRTC state, check the size of Gamma and Degamma LUTs so
unexpected and larger sizes wouldn't slip through.
TEST: IGT:kms_color::pipe-invalid-gamma-lut-sizes
v2: fix assignments in if clauses, Mark's email.
From: Nirmoy Das
[ Upstream commit bc05716d4fdd065013633602c5960a2bf1511b9c ]
Fixes handling when page tables are in system memory.
v3: remove struct amdgpu_vm_parser.
v2: remove unwanted variable.
change amdgpu_amdkfd_validate instead of amdgpu_amdkfd_bo_validate.
Signed-off-by: Nirmoy Da
From: Wesley Chalmers
[ Upstream commit 3577e1678772ce3ede92af3a75b44a4b76f9b4ad ]
[WHY]
DISPCLK_MAX_ERRDET_CYCLES must be 7 to prevent connection loss when
changing DENTIST_DISPCLK_WDIVIDER from 126 to 127 and back.
Signed-off-by: Wesley Chalmers
Reviewed-by: Dmytro Laktyushkin
Acked-by: Sty
From: Wesley Chalmers
[ Upstream commit e4e3678260e9734f6f41b4325aac0b171833a618 ]
[WHY]
For DCN30 and later, there is no data in DML arrays indexed by state at
index num_states.
Signed-off-by: Wesley Chalmers
Reviewed-by: Dmytro Laktyushkin
Acked-by: Stylon Wang
Tested-by: Daniel Wheeler
S
From: Vladimir Stempen
[ Upstream commit 3f8518b60c10aa96f3efa38a967a0b4eb9211ac0 ]
[why]
When OS overrides training link training parameters
for MST device to SST mode, MST resources are not
released and leak of the resource may result crash and
incorrect MST discovery during following hot plug
From: Roman Li
[ Upstream commit c521fc316d12fb9ea7b7680e301d673bceda922e ]
[Why]
We update scaling settings when scaling mode has been changed.
However when changing mode from native resolution the scaling mode previously
set gets ignored.
[How]
Perform scaling settings update on modeset.
Sig
From: Nikola Cornij
[ Upstream commit 346cf627fb27c0fea63a041cedbaa4f31784e504 ]
[why]
DSCCLK validation is not necessary because DSCCLK is derrived from
DISPCLK, therefore if DISPCLK validation passes, DSCCLK is valid, too.
Doing DSCLK validation in addition to DISPCLK leads to modes being
wron
From: Jiansong Chen
[ Upstream commit 7d9c70d23550eb86a1bec1954ccaa8d6ec3a3328 ]
Take the situation with gfxoff, the optimization may cause
corrupt CE ram contents. In addition emit_cntxcntl callback
has similar optimization which firmware can handle properly
even for power feature.
Signed-off-
From: Kees Cook
[ Upstream commit 06888d571b513cbfc0b41949948def6cb81021b2 ]
Instead of reading the desired 5 bytes of the actual target field,
the code was reading 8. This could result in a corrupted value if the
trailing 3 bytes were non-zero, so instead use an appropriately sized
and zero-ini
From: Dmytro Laktyushkin
[ Upstream commit 8809a7a4afe90ad9ffb42f72154d27e7c47551ae ]
Right now the flag simply selects memory config 0 when flag is true
however 420 modes benefit more from memory config 3.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Aric Cyr
Acked-by: Stylon Wang
Tested-
From: Jack Zhang
[ Upstream commit 95ea3dbc4e9548d35ab6fbf67675cef8c293e2f5 ]
Disable all ip's hw status to false before any hw_init.
Only set it to true until its hw_init is executed.
The old 5.9 branch has this change but somehow the 5.11 kernrel does
not have this fix.
Without this change,
From: Brandon Syu
[ Upstream commit 99c248c41c2199bd34232ce8e729d18c4b343b64 ]
[why]
When setup is called after hdcp has already setup,
it would cause to disable HDCP flow won’t execute.
[how]
Don't clean up hdcp content to be 0.
Signed-off-by: Brandon Syu
Reviewed-by: Wenjing Liu
Acked-by:
From: Logush Oliver
[ Upstream commit eeb90e26ed05dd44553d557057bf35f08f853af8 ]
[why]
Updating the file to fix the missing line
Signed-off-by: Logush Oliver
Reviewed-by: Charlene Liu
Acked-by: Bindu Ramamurthy
Tested-by: Daniel Wheeler
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levi
From: xinhui pan
[ Upstream commit 56f221b6389e7ab99c30bbf01c71998ae92fc584 ]
To avoid any list corruption.
Signed-off-by: xinhui pan
Reviewed-by: Felix Kuehling
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
.../drm/amd/amdkfd/kfd_device_queue_manager.c | 22 ++
From: "Stanley.Yang"
[ Upstream commit 6ec598cc9dfbf40433e94a2ed1a622e3ef80268b ]
Signed-off-by: Stanley.Yang
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
Signed-off-by: Sasha Levin
---
drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h | 5 +
drivers/gpu/drm/amd/amdgpu/umc_v8_7.c | 2
From: Amber Lin
[ Upstream commit a7b2451d31cfa2e8aeccf3b35612ce33f02371fc ]
Calling free_mqd inside of destroy_queue_nocpsch_locked can cause a
circular lock. destroy_queue_nocpsch_locked is called under a DQM lock,
which is taken in MMU notifiers, potentially in FS reclaim context.
Taking anot
From: Jonathan Kim
[ Upstream commit 63f6e01237257e7226efc5087f3f0b525d320f54 ]
get_wave_state acquires the mmap_lock on copy_to_user but so do
mmu_notifiers. mmu_notifiers allows dqm locking so do get_wave_state
outside the dqm_lock to prevent circular locking.
v2: squash in unused variable r
From: Mark Yacoub
[ Upstream commit 03fc4cf45d30533d54f0f4ebc02aacfa12f52ce2 ]
For each CRTC state, check the size of Gamma and Degamma LUTs so
unexpected and larger sizes wouldn't slip through.
TEST: IGT:kms_color::pipe-invalid-gamma-lut-sizes
v2: fix assignments in if clauses, Mark's email.
From: Nirmoy Das
[ Upstream commit bc05716d4fdd065013633602c5960a2bf1511b9c ]
Fixes handling when page tables are in system memory.
v3: remove struct amdgpu_vm_parser.
v2: remove unwanted variable.
change amdgpu_amdkfd_validate instead of amdgpu_amdkfd_bo_validate.
Signed-off-by: Nirmoy Da
From: Wesley Chalmers
[ Upstream commit e4e3678260e9734f6f41b4325aac0b171833a618 ]
[WHY]
For DCN30 and later, there is no data in DML arrays indexed by state at
index num_states.
Signed-off-by: Wesley Chalmers
Reviewed-by: Dmytro Laktyushkin
Acked-by: Stylon Wang
Tested-by: Daniel Wheeler
S
From: Aric Cyr
[ Upstream commit 665f28507a2a3d8d72ed9afa9a2b9b17fd43add1 ]
[Why]
When calculating recout width for an MPO plane on a mode that's using
ODM combine, driver can calculate a negative value, resulting in a
crash.
[How]
For negative widths, use zero such that validation will prune t
From: Wesley Chalmers
[ Upstream commit 3577e1678772ce3ede92af3a75b44a4b76f9b4ad ]
[WHY]
DISPCLK_MAX_ERRDET_CYCLES must be 7 to prevent connection loss when
changing DENTIST_DISPCLK_WDIVIDER from 126 to 127 and back.
Signed-off-by: Wesley Chalmers
Reviewed-by: Dmytro Laktyushkin
Acked-by: Sty
From: Vladimir Stempen
[ Upstream commit 3f8518b60c10aa96f3efa38a967a0b4eb9211ac0 ]
[why]
When OS overrides training link training parameters
for MST device to SST mode, MST resources are not
released and leak of the resource may result crash and
incorrect MST discovery during following hot plug
From: Roman Li
[ Upstream commit c521fc316d12fb9ea7b7680e301d673bceda922e ]
[Why]
We update scaling settings when scaling mode has been changed.
However when changing mode from native resolution the scaling mode previously
set gets ignored.
[How]
Perform scaling settings update on modeset.
Sig
From: Nikola Cornij
[ Upstream commit 346cf627fb27c0fea63a041cedbaa4f31784e504 ]
[why]
DSCCLK validation is not necessary because DSCCLK is derrived from
DISPCLK, therefore if DISPCLK validation passes, DSCCLK is valid, too.
Doing DSCLK validation in addition to DISPCLK leads to modes being
wron
From: Kees Cook
[ Upstream commit 06888d571b513cbfc0b41949948def6cb81021b2 ]
Instead of reading the desired 5 bytes of the actual target field,
the code was reading 8. This could result in a corrupted value if the
trailing 3 bytes were non-zero, so instead use an appropriately sized
and zero-ini
From: Jiansong Chen
[ Upstream commit 7d9c70d23550eb86a1bec1954ccaa8d6ec3a3328 ]
Take the situation with gfxoff, the optimization may cause
corrupt CE ram contents. In addition emit_cntxcntl callback
has similar optimization which firmware can handle properly
even for power feature.
Signed-off-
From: Kevin Wang
[ Upstream commit 2b8f731849800e3948763ccaff31cceac526789b ]
Re-adjust the function return order to avoid empty sdma version in the
sriov environment. (read amdgpu_firmware_info)
Signed-off-by: Kevin Wang
Reviewed-by: Stanley.Yang
Signed-off-by: Alex Deucher
Signed-off-by: S
From: Dmytro Laktyushkin
[ Upstream commit 6566cae7aef30da8833f1fa0eb854baf33b96676 ]
There are two issues with scaling calculations, odm recout
calculation and matching viewport to actual recout.
This change fixes both issues. Odm recout calculation via
special casing and viewport matching iss
From: Dmytro Laktyushkin
[ Upstream commit 8809a7a4afe90ad9ffb42f72154d27e7c47551ae ]
Right now the flag simply selects memory config 0 when flag is true
however 420 modes benefit more from memory config 3.
Signed-off-by: Dmytro Laktyushkin
Reviewed-by: Aric Cyr
Acked-by: Stylon Wang
Tested-
From: Alex Deucher
[ Upstream commit 67387dfe0f6630f2d4f412ce77debec23a49db7a ]
Change to 60s. This matches what we already do in virtualization.
Infinite timeout can lead to deadlocks in the kernel.
Reviewed-by: Christian König
Acked-by: Daniel Vetter
Signed-off-by: Alex Deucher
Signed-off
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