Initialize unique_id from PF2VF under virtualization.
Signed-off-by: Jiawei Gu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
index a57842689d42..96e269cbe326
On QUERY2 IOCTL don't query counts of correctable
and uncorrectable errors, since when RAS is
enabled and supported on Vega20 server boards,
this takes insurmountably long time, in O(n^3),
which slows the system down to the point of it
being unusable when we have GUI up.
Fixes: ae363a212b14 ("drm/
When using Vega 20 with RAS support and RAS is
enabled, the system interactivity is extremely
slow, to the point of being unusable. After
debugging, it was determined that this is due to
the polling loop performed for
AMDGPU_CTX_OP_QUERY_STATE2 under
amdgpu_ctx_ioctl(), which seems to be executed o
- Update SRIOV PF2VF header with latest revision
- Extend existing function in amdgpu_virt.c to read MM bandwidth config
from PF2VF message
- Add SRIOV Sienna Cichlid codec array and update the bandwidth with
PF2VF message
Change-Id: Id0cfa2e1adb7a097997d53b34d41a6d36a390c00
Signed-off-by: B
Fix needs_pci_atomics setting.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
b/drivers/gpu/drm/amd/amdkfd/kfd_device.c
index d925e5ffa41b..80015e866498 100644
--
[AMD Public Use]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Jiansong Chen
Sent: Thursday, May 13, 2021 11:22
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Koenig, Christian
; Chen, Jiansong (Simon)
Subject: [PATCH] drm/amdgpu: remove unsafe optimiza
Take the situation with gfxoff, the optimization may cause
corrupt CE ram contents. In addition emit_cntxcntl callback
has similar optimization which firmware can handle properly
even for power feature.
Signed-off-by: Jiansong Chen
Change-Id: I962946557108bb0575f8b2afc25b18a6dcf0d838
---
drivers
[AMD Official Use Only - Internal Distribution Only]
> -Original Message-
> From: Borislav Petkov
> Sent: Wednesday, May 12, 2021 5:06 PM
> To: Joshi, Mukul
> Cc: amd-gfx@lists.freedesktop.org; Kasiviswanathan, Harish
> ; x86-ml ; lkml ker...@vger.kernel.org>
> Subject: Re: [PATCH] dr
On Wed, May 12, 2021 at 07:00:58PM +, Joshi, Mukul wrote:
> SMCA UMCv2 corresponds to GPU's UMC MCA bank and the GPU driver is
> only interested in errors on GPU UMC.
So that thing should be called SMCA_GPU_UMC not SMCA_UMC_V2.
> We cannot know this without is_smca_umc_v2.
You don't need it
Am 2021-05-12 um 2:40 p.m. schrieb philip yang:
>
>
> On 2021-05-12 11:54 a.m., Felix Kuehling wrote:
>> Am 2021-05-12 um 8:38 a.m. schrieb Christian König:
>>> Am 12.05.21 um 14:34 schrieb Philip Yang:
Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
If previously
[why]
Link rate in kHz is what is eventually required to calculate the link
bandwidth, which makes kHz a more generic unit. This should also make
forward-compatibility with new DP standards easier.
[how]
- Replace 'link rate DPCD code' with 'link rate in kHz' when used with
drm_dp_mst_topology_mgr
Change log:
v2:
- Added 'Acked-by' to comment
v1:
- Initial
Nikola Cornij (1):
drm/dp_mst: Use kHz as link rate units when settig source max link
caps at init
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c | 4 ++--
drivers/gpu/drm/drm_dp_mst_topology.c
On Wed, May 12, 2021 at 4:30 PM Andrey Grodzovsky
wrote:
>
>
>
> On 2021-05-12 4:17 p.m., Alex Deucher wrote:
> > On Wed, May 12, 2021 at 10:27 AM Andrey Grodzovsky
> > wrote:
> >>
> >> This should prevent writing to memory or IO ranges possibly
> >> already allocated for other uses after our dev
On 2021-05-12 4:33 p.m., Felix Kuehling wrote:
Am 2021-05-12 um 10:26 a.m. schrieb Andrey Grodzovsky:
Helps to expdite HW related stuff to amdgpu_pci_remove
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h |
Am 2021-05-12 um 10:26 a.m. schrieb Andrey Grodzovsky:
> Helps to expdite HW related stuff to amdgpu_pci_remove
>
> Signed-off-by: Andrey Grodzovsky
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h | 2 +-
> drivers/gpu/drm/amd/amdkfd/kfd_dev
On 2021-05-12 4:17 p.m., Alex Deucher wrote:
On Wed, May 12, 2021 at 10:27 AM Andrey Grodzovsky
wrote:
This should prevent writing to memory or IO ranges possibly
already allocated for other uses after our device is removed.
v5:
Protect more places wher memcopy_to/form_io takes place
whe
On Wed, May 12, 2021 at 10:27 AM Andrey Grodzovsky
wrote:
>
> This should prevent writing to memory or IO ranges possibly
> already allocated for other uses after our device is removed.
>
> v5:
> Protect more places wher memcopy_to/form_io takes place
where
> Protect IB submissions
>
> v6: Switc
[AMD Public Use]
> -Original Message-
> From: Tuikov, Luben
> Sent: Wednesday, May 12, 2021 1:03 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Tuikov, Luben ; Deucher, Alexander
> ; sta...@vger.kernel.org
> Subject: [PATCH 1/2] drm/amdgpu: Don't query CE and UE errors
>
> On QUERY2 IOCTL
The proper metric for fence utilization over several
contexts is an harmonic mean, but such calculation is
prohibitive in kernel space, so the code approximates it.
Because the approximation diverges when one context has a
very small ratio compared with the other context, this change
filter out ra
Free the resources if the fence needs to be ignored
during the ratio calculation
Signed-off-by: David M Nieto
Change-Id: Ibfc55a94c53d4b3a1dba8fff4c53fd893195bb96
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/d
[AMD Official Use Only - Internal Distribution Only]
yep, you are right...
I'll make those changes.
David
From: Christian König
Sent: Tuesday, May 11, 2021 11:56 PM
To: Nieto, David M ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/amdgpu: fix fen
Am 2021-05-12 um 2:43 p.m. schrieb Philip Yang:
> Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
> If previously valid PDE0, PDE0.V=1 and PDE0.P=0 turns into PTE, this
> requires TLB flush, otherwise page table walker will not read updated
> PDE0.
>
> Change page table upda
Hi Dave, Daniel,
First set of new changes for 5.14.
The following changes since commit af8352f1ff54c4fecf84e36315fd1928809a580b:
Merge tag 'drm-msm-next-2021-04-11' of https://gitlab.freedesktop.org/drm/msm
into drm-next (2021-04-13 23:35:54 +0200)
are available in the Git repository at:
[AMD Official Use Only - Internal Distribution Only]
> -Original Message-
> From: Borislav Petkov
> Sent: Wednesday, May 12, 2021 5:37 AM
> To: Joshi, Mukul
> Cc: amd-gfx@lists.freedesktop.org; Kasiviswanathan, Harish
> ; x86-ml ; lkml ker...@vger.kernel.org>
> Subject: Re: [PATCH] drm
Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
If previously valid PDE0, PDE0.V=1 and PDE0.P=0 turns into PTE, this
requires TLB flush, otherwise page table walker will not read updated
PDE0.
Change page table update mapping to return free_table flag to indicate
the previo
On 2021-05-12 11:54 a.m., Felix
Kuehling wrote:
Am 2021-05-12 um 8:38 a.m. schrieb Christian König:
Am 12.05.21 um 14:34 schrieb Philip Yang:
Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
If prev
On Wed, May 12, 2021 at 6:18 AM Christian König
wrote:
>
> Imported BOs don't have a pagelist any more.
>
> Signed-off-by: Christian König
> Fixes: 0575ff3d33cd ("drm/radeon: stop using pages with
> drm_prime_sg_to_page_addr_arrays v2")
> CC: sta...@vger.kernel.org # 5.12
Reviewed-by: Alex Deuc
From: Rodrigo Siqueira
[ Upstream commit 16e9b3e58bc3fce7391539e0eb3fd167cbf9951f ]
Our driver supports overlay planes, and as expected, some userspace
compositor takes advantage of these features. If the userspace is not
enabling the cursor, they can use multiple planes as they please.
Neverthe
From: Rodrigo Siqueira
[ Upstream commit 16e9b3e58bc3fce7391539e0eb3fd167cbf9951f ]
Our driver supports overlay planes, and as expected, some userspace
compositor takes advantage of these features. If the userspace is not
enabling the cursor, they can use multiple planes as they please.
Neverthe
From: Darren Powell
[ Upstream commit b117b3964f38a988cb79825950dbd607c02237f3 ]
Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot.
Patch ignores a .force_clk_levels(SMU_DCEFCLK) call and issues an
info message.
Signed-off-by: Darren Powell
Reviewed-by: Kenneth Fe
From: Rodrigo Siqueira
[ Upstream commit 16e9b3e58bc3fce7391539e0eb3fd167cbf9951f ]
Our driver supports overlay planes, and as expected, some userspace
compositor takes advantage of these features. If the userspace is not
enabling the cursor, they can use multiple planes as they please.
Neverthe
From: Darren Powell
[ Upstream commit b117b3964f38a988cb79825950dbd607c02237f3 ]
Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot.
Patch ignores a .force_clk_levels(SMU_DCEFCLK) call and issues an
info message.
Signed-off-by: Darren Powell
Reviewed-by: Kenneth Fe
From: Rodrigo Siqueira
[ Upstream commit 16e9b3e58bc3fce7391539e0eb3fd167cbf9951f ]
Our driver supports overlay planes, and as expected, some userspace
compositor takes advantage of these features. If the userspace is not
enabling the cursor, they can use multiple planes as they please.
Neverthe
From: Darren Powell
[ Upstream commit b117b3964f38a988cb79825950dbd607c02237f3 ]
Writing to dcefclk causes the gpu to become unresponsive, and requires a reboot.
Patch ignores a .force_clk_levels(SMU_DCEFCLK) call and issues an
info message.
Signed-off-by: Darren Powell
Reviewed-by: Kenneth Fe
On Wed, May 12, 2021 at 9:04 AM Ville Syrjälä
wrote:
>
> On Wed, May 12, 2021 at 02:06:56PM +0200, Werner Sembach wrote:
> > Hello,
> >
> > In addition to the existing "max bpc", and "Broadcast RGB/output_csc" drm
> > properties I propose 4 new properties:
> > "preferred pixel encoding", "active
Invalid pages can be the result of pages that have been migrated
already due to copy-on-write procedure or pages that were never
migrated to VRAM in first place. This is not an issue anymore,
as pranges now support mixed memory domains (CPU/GPU).
Signed-off-by: Alex Sierra
---
drivers/gpu/drm/am
This is for debug purposes only.
It conditionally generates partial migrations to test mixed
CPU/GPU memory domain pages in a prange easily.
Signed-off-by: Alex Sierra
---
drivers/gpu/drm/amd/amdkfd/kfd_migrate.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm
[Why]
svm ranges can have mixed pages from device or system memory.
A good example is, after a prange has been allocated in VRAM and a
copy-on-write is triggered by a fork. This invalidates some pages
inside the prange. Endding up in mixed pages.
[How]
By classifying each page inside a prange, bas
From: Chengming Gui
Enable ih block for beige_goby, same as dimgrey_cavefish
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/navi10_ih.c | 1 +
drivers/gpu/drm/amd/amdgpu/nv.c| 1 +
2 files chan
From: Chengming Gui
The gfx version of beige_goby is 10.3,
identical to sienna_cichlid,
follow the way of sienna_cichlid
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 9 +
1 file
From: Aurabindo Pillai
[Why&How]
Add Beige Goby (DCN303) resource, irq service, & dmub loader.
v2: fix nbio include (Alex)
Signed-off-by: Chris Park
Signed-off-by: Aurabindo Pillai
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/Makefile |1 +
From: Chengming Gui
Same as dimgrey_cavefish
v2: fix comments typo
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/
From: Joshua Aberback
[Why]
This update was made for DCN30, but it is needed for DCN303 as well
Signed-off-by: Joshua Aberback
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gp
From: Chengming Gui
Add ip offset definition for beige_goby and initialize it
v2: squash in fixes (Alex)
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/Makefile |3 +-
.../gpu/drm/amd/am
From: Aurabindo Pillai
[How]
* Add MIT license to all new files as SPDX tag.
* Fix copyright year
Signed-off-by: Aurabindo Pillai
Signed-off-by: Alex Deucher
---
.../gpu/drm/amd/display/dc/dcn303/Makefile| 8 ++-
.../drm/amd/display/dc/dcn303/dcn303_dccg.h | 22 ++-
From: Aurabindo Pillai
[Why&How]
MALL requires idle optimizations to be enabled. This enables MALL
feature on dcn303
Signed-off-by: Aurabindo Pillai
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c | 1 +
1 file changed, 1 insertio
From: Aurabindo Pillai
[Why&How]
Absense of this callback causes null pointer dereference.
Add the corresponding callback in dcn303 resources.
Fixes: 8ea9608379 ("drm/amd/display: fix dcn3+ bw validation soc param update
sequence")
Signed-off-by: Aurabindo Pillai
Signed-off-by: Alex Deucher
-
From: Aurabindo Pillai
[Why&How]
Add beige_goby_ta.bin to module firmware table and call psp init for TA
Signed-off-by: Aurabindo Pillai
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 4
1 file changed, 4 insertions(+)
diff --git a/drive
From: Tao Zhou
Enable athub/mmhub power gating for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/g
From: Aurabindo Pillai
[Why&How]
Adds DCN IP block initialization for Beige Goby
Signed-off-by: Aurabindo Pillai
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
drivers/gpu/drm/amd/amdgpu/nv.c| 4
2 files changed, 5 in
From: Aurabindo Pillai
[Why&How]
Adds the firmware definition and missing cases statement
hooks for Beige Goby support in AMDGPU DM.
Signed-off-by: Aurabindo Pillai
Acked-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 ++
From: Chengming Gui
Enable memory training on newer hw revisions.
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirm
From: Jiansong Chen
beige_goby has similar gc_10_3 ip with sienna_cichlid,
so follow its registers offset setting.
Signed-off-by: Jiansong Chen
Reviewed-by: Jack Gui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
From: Chengming Gui
Switch from softPPTable to VBIOS PPTable.
v2: drop extra parens (Alex)
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/
From: Tao Zhou
Enable athub cg for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/athub_v2_1.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/athub_v2_1.c
b/drivers/gpu/drm/amd/amdgpu/
From: Veerabadhran Gopalakrishnan
Enable VCN CG for BEIGE GOBY
Signed-off-by: Veerabadhran Gopalakrishnan
Reviewed-by: Leo Liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c
From: Chengming Gui
Enable gfxoff in driver side based on SMC#73.3
v2: fix typo 'Eanble' --> 'Enable'
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
drivers/gpu/drm/amd/pm/swsmu/smu11/smu_v11_0.c | 1 +
From: Chengming Gui
Enable sdma block for beige_goby, same as sienna_cichlid
v2: share the same setting of sdma instance num with vangogh
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Suggested-by: Alexander Deucher
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/g
From: Tao Zhou
Enable ih clock gating for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd
From: Chengming Gui
Add external id and set clock gating for beige_goby
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd
From: Tao Zhou
Enable hdp MGCG and LS for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/am
From: Tao Zhou
Enable cgls to improve the runtime power efficiency.
Signed-off-by: Tao Zhou
Reviewed-by: Jack Gui
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/n
From: Chengming Gui
Same as dimgrey_cavefish
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
b/
From: Chengming Gui
Same as dimgrey_cavefish
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.
From: Tao Zhou
Enable mc CG and LS for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/a
From: Chengming Gui
Use macro to get the pptable members for different pptable structures.
v2: abstract the table operations especially get the table members
to simplify cover the two different pptable structures.
v3: move pptable operations related structures and functions into ppt.c
v4
From: Chengming Gui
Add support for beige_goby cp/rlc firmware
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm
From: Chengming Gui
Use direct load for beige_goby
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_
From: Chengming Gui
Same as navi series
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/
From: Chengming Gui
Enable gmc block for beige_goby, same as sienna_cichlid
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/nv.c| 1 +
2 files chang
From: Tao Zhou
Enable GFX MGCG, CGCG and 3DCG for beige_goby.
Signed-off-by: Tao Zhou
Reviewed-by: Jiansong Chen
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gp
From: Chengming Gui
Add chip type for beige_goby
v2: fix enum count (Alex)
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
include/drm/amd_asic_type.h| 1 +
2 fil
From: Hawking Zhang
execute gc_10_3_5 golden registers one-time initialization
Signed-off-by: Hawking Zhang
Reviewed-by: Jiansong Chen
Reviewed-by: Guchun Chen
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/drivers/g
These patches enable initial support for Beige Goby, a new GPU from
AMD. This includes support for GFX, compute, multimedia, display,
and power management.
Due to the size of the new register headers (patch 41), I didn't send them out,
but you can view the entire patch set in my git tree here:
ht
From: Chengming Gui
add mmCGTT_SPI_{RA0/RA1}_CLK_CTRL setting
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers/gpu/
From: Chengming Gui
Add virtual ip block for beige_goby
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drive
For decoding GPUVM page faults.
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c | 27 +
1 file changed, 27 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
b/drivers/gpu/drm/amd/amdgpu/mmhub_v2_0.c
in
From: Chengming Gui
Add mode1 reset as the default reset method for beige_goby
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/
From: Chengming Gui
Same as dimgrey_cavefish to support WAIT_REG_MEM packet.
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/d
From: Veerabadhran Gopalakrishnan
Enabled VCN support for Beige Goby chip
Signed-off-by: Veerabadhran Gopalakrishnan
Reviewed-by: Leo Liu
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.c | 8 ++
drivers/gpu/drm/amd/amdgpu/nv.c | 4 +-
drivers/gpu/drm/amd/am
From: Chengming Gui
Add KFD support for beige_goby
v2: fix asic name typo
v3: squash in updates (Alex)
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_crat.c | 61 +++
driver
From: Chengming Gui
Use new struct name to identify beige_goby pptable
due to extra added fields.
v2: squash in updates (Alex)
Signed-off-by: Chengming Gui
Reviewed-by: Jiansong Chen
Reviewed-by: Evan Quan
Signed-off-by: Alex Deucher
---
.../pm/inc/smu11_driver_if_sienna_cichlid.h | 366
From: Chengming Gui
add general PSP support for beige_goby
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.c | 3 +--
drivers/gpu/drm/amd/am
From: Chengming Gui
Use soft-pptable for beige_goby
v2: fix format
Signed-off-by: Chengming Gui
Reviewed-by: Tao Zhou
Reviewed-by: Hawking Zhang
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/nv.c| 3 +++
drivers/gpu/drm/amd/pm/inc/smu_v11_0.h | 1 +
d
From: Chengming Gui
Rather than gpu info firmware.
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_d
From: Chengming Gui
Add the function pointer.
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdkfd/kfd_device.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device.c
b/
From: Chengming Gui
Enable gfx block for beige_goby, same as dimgrey_cavefish
Signed-off-by: Chengming Gui
Reviewed-by: Hawking Zhang
Reviewed-by: Tao Zhou
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 5 +
drivers/gpu/drm/amd/amdgpu/nv.c| 1 +
2 files
From: Harry Wentland
commit d89f6048bdcb6a56abb396c584747d5eeae650db upstream.
[Why]
This hasn't been well tested and leads to complete system hangs on DCN1
based systems, possibly others.
The system hang can be reproduced by gesturing the video on the YouTube
Android app on ChromeOS into full
On QUERY2 IOCTL don't query counts of correctable
and uncorrectable errors, since when RAS is
enabled and supported on Vega20 server boards,
this takes insurmountably long time, in O(n^3),
which slows the system down to the point of it
being unusable when we have GUI up.
Fixes: ae363a212b14 ("drm/
When using Vega 20 with RAS support and RAS is
enabled, the system interactivity is extremely
slow, to the point of being unusable. After
debugging, it was determined that this is due to
the polling loop performed for
AMDGPU_CTX_OP_QUERY_STATE2 under
amdgpu_ctx_ioctl(), which seems to be executed o
Am 2021-05-12 um 8:38 a.m. schrieb Christian König:
>
>
> Am 12.05.21 um 14:34 schrieb Philip Yang:
>> Mapping huge page, 2MB aligned address with 2MB size, uses PDE0 as PTE.
>> If previously valid PDE0, PDE0.V=1 and PDE0.P=0 turns into PTE, this
>> requires TLB flush, otherwise page table walker w
From: Harry Wentland
commit d89f6048bdcb6a56abb396c584747d5eeae650db upstream.
[Why]
This hasn't been well tested and leads to complete system hangs on DCN1
based systems, possibly others.
The system hang can be reproduced by gesturing the video on the YouTube
Android app on ChromeOS into full
From: Harry Wentland
commit d89f6048bdcb6a56abb396c584747d5eeae650db upstream.
[Why]
This hasn't been well tested and leads to complete system hangs on DCN1
based systems, possibly others.
The system hang can be reproduced by gesturing the video on the YouTube
Android app on ChromeOS into full
From: Harry Wentland
commit d89f6048bdcb6a56abb396c584747d5eeae650db upstream.
[Why]
This hasn't been well tested and leads to complete system hangs on DCN1
based systems, possibly others.
The system hang can be reproduced by gesturing the video on the YouTube
Android app on ChromeOS into full
Am 12.05.21 um 14:06 schrieb Werner Sembach:
> Hello,
>
> In addition to the existing "max bpc", and "Broadcast RGB/output_csc" drm
> properties I propose 4 new properties:
> "preferred pixel encoding", "active color depth", "active color range", and
> "active pixel encoding"
>
>
> Motivation:
>
Access to those must be prevented post pci_remove
v6: Drop BOs list, unampping VRAM BAR is enough.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 24 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_tt
In case device remove is just simualted by sysfs then verify
device doesn't keep doing DMA to the released memory after
pci_remove is done.
Signed-off-by: Andrey Grodzovsky
Acked-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 6 ++
1 file changed, 6 insertions(+)
diff --
It's already being released by DRM core through devm
Signed-off-by: Andrey Grodzovsky
Reviewed-by: Rodrigo Siqueira
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
b/drivers/gpu/drm/amd/d
Problem: If scheduler is already stopped by the time sched_entity
is released and entity's job_queue not empty I encountred
a hang in drm_sched_entity_flush. This is because drm_sched_entity_is_idle
never becomes false.
Fix: In drm_sched_fini detach all sched_entities from the
scheduler's run queu
If removing while commands in flight you cannot wait to flush the
HW fences on a ring since the device is gone.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd
1 - 100 of 129 matches
Mail list logo
