RE: [PATCH v2 0/8] Add mode2 reset support for aldebaran

[AMD Public Use] Series is Reviewed-by: Hawking Zhang Regards, Hawking From: Lazar, Lijo Sent: Monday, March 22, 2021 13:57 To: amd-gfx@lists.freedesktop.org Cc: Zhang, Hawking ; Deucher, Alexander Subject: [PATCH v2 0/8] Add mode2 reset support for aldebaran [AMD Public Use] This patch s

RE: [PATCH 1/2] drm/amd/pm: drop redundant and unneeded BACO APIs

[AMD Public Use] Thanks Dennis. Please check V2 with that updated. BR Evan -Original Message- From: Li, Dennis Sent: Friday, March 19, 2021 7:24 PM To: Quan, Evan ; amd-gfx@lists.freedesktop.org Cc: Quan, Evan Subject: RE: [PATCH 1/2] drm/amd/pm: drop redundant and unneeded BACO APIs

[PATCH] drm/amd/pm: drop redundant and unneeded BACO APIs V2

Use other APIs which are with the same functionality but much more clean. V2: drop mediate unneeded interface Change-Id: I5e9e0ab5d39b49b02434f18e12392b13931396be Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/amdgpu/nv.c | 25 +- drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 9 -

RE: [PATCH 2/2] drm/amdgpu: disable runpm if other reset method not runpm capable is chosen

[AMD Public Use] Thanks Alex. Yes, you are right. BACO is used as a power saving feature for runpm. I missed that. I wrongly treated BACO as a reset method only which cannot be used with mode1 reset at the same time. Please ignore this patch. BR Evan From: Deucher, Alexander Sent: Saturday, Ma

[PATCH v2 8/8] drm/amdgpu: Add mode2 reset support for aldebaran

[AMD Public Use] v1: Aldebaran uses reset control to support mode2 reset. The sequences to reset and restore hardware context are specific to a particular configuration. v2: Clear bus mastering before reset. Fix coding style issues, drop unwanted variables and info log. Signed-off-by: Lijo Lazar

[PATCH v2 6/8] drm/amdgpu: Add PSP public function to load a list of FWs

[AMD Public Use] v1: Adds a function to load a list of FWs as passed by the caller. This is needed as only a select need to loaded for some use cases. v2: Omit unrelated change, remove info log, fix return value when count is 0 Signed-off-by: Lijo Lazar lijo.la...@amd.com

[PATCH v2 7/8] drm/amdgpu: Make set PG/CG state functions public

[AMD Public Use] Expose PG/CG set states functions for other clients Signed-off-by: Lijo Lazar lijo.la...@amd.com --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 5 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 --- 2 files changed, 9 insertions(+), 3 deletion

[PATCH v2 5/8] drm/amdgpu: Add reset control handling to reset workflow

[AMD Public Use] This prefers reset control based handling if it's implemented for a particular ASIC. If not, it takes the legacy path. It uses the legacy method of preparing environment (job, scheduler tasks) and restoring environment. Signed-off-by: Lijo Lazar lijo.la...@amd.com

[PATCH v2 4/8] drm/amdgpu: Add reset control to amdgpu_device

[AMD Public Use] v1: Add generic amdgpu_reset_control to handle different types of resets. It may be added at device, hive or ip level. Each reset control has a list of handlers associated with it to handle different types of reset. Reset control is responsible for choosing the right handler given

[PATCH v2 3/8] drm/amd/pm: Add support for reset completion on aldebaran

[AMD Public Use] v1: On aldebaran, after hardware context restore, another handshake needs to happen with PMFW so that reset recovery is complete from PMFW side. Treat this as RESET_COMPLETE event for aldebaran. v2: Cleanup coding style, info logs Signed-off-by: Lijo Lazar lijo.la...@amd.com

[PATCH v2 2/8] drm/amd/pm: Add function to wait for smu events

[AMD Public Use] v1: Add function to wait for specific event/states from PMFW v2: Add mutex lock, simplify sequence Signed-off-by: Lijo Lazar lijo.la...@amd.com --- drivers/gpu/drm/amd/pm/inc/amdgpu_smu.h | 15 ++- drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

[PATCH v2 1/8] drm/amd/pm: Modify mode2 msg sequence on aldebaran

[AMD Public Use] v1: During mode2 reset, PCI space is lost after message is sent. Restore PCI space before waiting for response from firmware. v2: Move mode2 sequence to aldebaran and update PMFW version. Handle generic sequence in smu13 without PMFW version check. Signed-off-by: Lijo Lazar lijo

[PATCH v2 0/8] Add mode2 reset support for aldebaran

[AMD Public Use] This patch series adds support for mode2 reset for aldebaran. Since the reset sequence is completely different from existing ones, it adds supports using a new reset control method. The reset control and handlers can be installed and handle specific types of resets. v1: 1. Change

[PATCH 6/7] drm/amdkfd: Add fence tracking

From: David M Nieto Add fence tracking for amdgpu resources on gpuvm creation Signed-off-by: David M Nieto --- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c| 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

[PATCH 5/7] drm/amdgpu: Track fences on KMS

From: David M Nieto Create SMI fence tracking structures of KMS open Signed-off-by: David M Nieto Signed-off-by: Roy Sun --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 10 ++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git

[PATCH 4/7] drm/amdgpu: SMI debugfs tracking

From: David M Nieto Add folder in debugfs structure for tracking of per pid fences Signed-off-by: David M Nieto Signed-off-by: Roy Sun --- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/driver

[PATCH 3/7] drm/amdgpu: SMI-LIB handlers

From: David M Nieto Add fence tracking interfaces and core structures for SMI ioctl management Signed-off-by: David M Nieto Signed-off-by: Roy Sun --- drivers/gpu/drm/amd/amdgpu/Makefile | 10 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12 + drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c | 4

[PATCH 2/7] drm: Change scheduled fence track

From: David M Nieto Update the timestamp of the scheduled fence on HW completion of the previous fence. This allows more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto Signed-off-by: Roy Sun --- drivers/gpu/drm/scheduler/sched_main.c | 9 - 1 file changed

[PATCH 1/7] drm/amdgpu: Add SMI-LIB ioctl

From: David M Nieto Add definition for the SMI ioctl Signed-off-by: David M Nieto Signed-off-by: Roy Sun --- include/uapi/drm/amdgpu_drm.h | 20 1 file changed, 20 insertions(+) diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index 8b832f7458f2

[PATCH 5/7] SWDEV-275015 - drm/amdgpu: Track fences on KMS

From: David M Nieto Create SMI fence tracking structures of KMS open Signed-off-by: David M Nieto Signed-off-by: Roy Sun --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 10 ++ 2 files changed, 12 insertions(+), 1 deletion(-) diff --git

[PATCH 6/7] SWDEV-275015 - drm/amdkfd: Add fence tracking

From: David M Nieto Add fence tracking for amdgpu resources on gpuvm creation Signed-off-by: David M Nieto --- .../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c| 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c

[PATCH 4/7] SWDEV-275015 - drm/amdgpu: SMI debugfs tracking

From: David M Nieto Add folder in debugfs structure for tracking of per pid fences Signed-off-by: David M Nieto Signed-off-by: Roy Sun --- drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 5 + 1 file changed, 5 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/driver

[PATCH 3/7] SWDEV-275015 - drm/amdgpu: SMI-LIB handlers

From: David M Nieto Add fence tracking interfaces and core structures for SMI ioctl management Signed-off-by: David M Nieto Signed-off-by: Roy Sun --- drivers/gpu/drm/amd/amdgpu/Makefile | 10 +- drivers/gpu/drm/amd/amdgpu/amdgpu.h | 12 + drivers/gpu/drm/amd/amdgpu/amdgpu_smi.c | 4

[PATCH 2/7] SWDEV-275015 - drm: Change scheduled fence track

From: David M Nieto Update the timestamp of the scheduled fence on HW completion of the previous fence. This allows more accurate tracking of the fence execution in HW Signed-off-by: David M Nieto Signed-off-by: Roy Sun --- drivers/gpu/drm/scheduler/sched_main.c | 9 - 1 file changed

[PATCH 1/7] SWDEV-275015 - drm/amdgpu: Add SMI-LIB ioctl

From: David M Nieto Add definition for the SMI ioctl Signed-off-by: David M Nieto Signed-off-by: Roy Sun --- include/uapi/drm/amdgpu_drm.h | 20 1 file changed, 20 insertions(+) diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h index 8b832f7458f2

RE: [PATCH 5/8] drm/amdgpu: use the new cursor in amdgpu_ttm_access_memory

[AMD Official Use Only - Internal Distribution Only] Because this is not a deadlock of lock itself. Just because something like while(true) { LOCKIRQ ... UNLOCKIRQ ... } I think scheduler policy is voluntary. So it never schedule out if there is no sleep function and then soft lockup showed

[PATCH] drm/amdgpu: Use correct size when access vram

To make size is 4 byte aligned. Use &~0x3ULL instead of &3ULL. Signed-off-by: xinhui pan --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 6d5cf0

RE: [PATCH 5/8] drm/amdgpu: use the new cursor in amdgpu_ttm_access_memory

[AMD Official Use Only - Internal Distribution Only] No, the patch from Nirmoy did not fully fix this issue. I will send another fix patch later. -Original Message- From: amd-gfx On Behalf Of Christian K?nig Sent: 2021年3月20日 17:08 To: Kuehling, Felix ; Paneer Selvam, Arunpravin ; amd

Re: [PATCH] drm/ttm: stop warning on TT shrinker failure

Am 20.03.21 um 14:17 schrieb Daniel Vetter: On Sat, Mar 20, 2021 at 10:04 AM Christian König wrote: Am 19.03.21 um 20:06 schrieb Daniel Vetter: On Fri, Mar 19, 2021 at 07:53:48PM +0100, Christian König wrote: Am 19.03.21 um 18:52 schrieb Daniel Vetter: On Fri, Mar 19, 2021 at 03:08:57PM +010

Re: [PATCH] drm/radeon: don't evict if not initialized

Am 20.03.21 um 21:10 schrieb Tong Zhang: TTM_PL_VRAM may not initialized at all when calling radeon_bo_evict_vram(). We need to check before doing eviction. [2.160837] BUG: kernel NULL pointer dereference, address: 0020 [2.161212] #PF: supervisor read access in kernel mode