On Fri, Apr 03, 2020 at 02:03:32PM +0800, Liang, Prike wrote:
> As the pmfw hasn't exported the interface of SMU feature
> mask to APU SKU so just force on all the features to driver
> inquired interface at early initial stage.
>
> Signed-off-by: Prike Liang
Reviewed-by: Huang Rui
> ---
> dri
(+ Felix)
On Fri, Apr 03, 2020 at 12:07:53PM +0800, Liang, Prike wrote:
> The system will be hang up during S3 as SMU is pending at GC not
> respose the register CP_HQD_ACTIVE access request and this issue
> can be fixed by adding RLC safe mode guard before each HQD
> map/unmap retrive opt.
We ne
As the pmfw hasn't exported the interface of SMU feature
mask to APU SKU so just force on all the features to driver
inquired interface at early initial stage.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/powerplay/renoir_ppt.c | 12
1 file changed, 12 insertions(+)
diff --gi
From: "Tianci.Yin"
Add RLC_SPM golden settings
Change-Id: I616e127171293d915cb3a05dee02f51cec8d8f6f
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c|9 +
.../gpu/drm/amd/amdgpu/golden_gc_spm_10_1_0.h | 1058 +
2 files changed, 1067 insertions(+)
On Thu, 2 Apr 2020 16:13:08 +0200
Peter Zijlstra wrote:
> On Thu, Apr 02, 2020 at 09:33:54AM +0200, Christian König wrote:
> > Hi Jann,
> >
> > Am 02.04.20 um 04:34 schrieb Jann Horn:
> > > [x86 folks in CC so that they can chime in on the precise rules for this
> > > stuff]
> > >
> > > Hi!
>
Thanks Monk,
I just updated the patch and it could passed 1000 rounds TDR test.
Sent out an review email.
Regards,
Jack
-Original Message-
From: Liu, Monk
Sent: Friday, April 3, 2020 11:38 AM
To: Kuehling, Felix ; Zhang, Jack (Jian)
; amd-gfx@lists.freedesktop.org
Subject: RE: [PATCH]
kfd_pre_reset will free mem_objs allocated by kfd_gtt_sa_allocate
Without this change, sriov tdr code path will never free those allocated
memories and get memory leak.
v2:add a bugfix for kiq ring test fail
Signed-off-by: Jack Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c | 3 +
[AMD Official Use Only - Internal Distribution Only]
Ping...
-Original Message-
From: Tiecheng Zhou
Sent: Thursday, April 2, 2020 5:29 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhou, Tiecheng ; Tao, Yintian
Subject: [PATCH] drm/amd/powerplay: avoid using pm_en before it is initialized
The system will be hang up during S3 as SMU is pending at GC not
respose the register CP_HQD_ACTIVE access request and this issue
can be fixed by adding RLC safe mode guard before each HQD
map/unmap retrive opt.
Signed-off-by: Prike Liang
Tested-by: Mengbing Wang
---
drivers/gpu/drm/amd/amdgpu/
Thanks Felix
Hi Jack
I think below changes can resolve your problem , we had this on our customer
branch already, it fix the memory leak, and also fix my previous bug .
Can you make this change applied to gfx_v10/v9 ? thanks !
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c
b/d
Reviewed-by: Evan Quan
-Original Message-
From: amd-gfx On Behalf Of Tiecheng Zhou
Sent: Thursday, April 2, 2020 1:40 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhou, Tiecheng
Subject: [PATCH] drm/amd/powerplay: determine pm_en at amd_powerplay_create
Need to determine pm_en at amd_power
On 2020-04-02 4:46 p.m., Amber Lin wrote:
When the compute is malfunctioning or performance drops, the system admin
will use SMI (System Management Interface) tool to monitor/diagnostic what
went wrong. This patch provides an event watch interface for the user
space to register events they are in
When the compute is malfunctioning or performance drops, the system admin
will use SMI (System Management Interface) tool to monitor/diagnostic what
went wrong. This patch provides an event watch interface for the user
space to register events they are interested. After the event is
registered, the
[AMD Official Use Only - Internal Distribution Only]
From: amd-gfx on behalf of Shirish S
Sent: Thursday, April 2, 2020 5:15 AM
To: Deucher, Alexander ; Wentland, Harry
; Li, Sun peng (Leo)
Cc: amd-gfx@lists.freedesktop.org ; S, Shirish
Subject: [PATCH] drm/amd/display: re-order asic de
[+Monk]
This looks reasonable to me. However, you're effectively reverting this
commit by Monk:
a03eb637d2a5 drm/amdgpu: fix KIQ ring test fail in TDR of SRIOV
In hind-sight, Monk's commit was broken. Removing the call to pre_reset
has other consequences, such as breaking notifications about res
On Thu, Apr 2, 2020 at 11:36 AM Thomas Gleixner wrote:
> Jann Horn writes:
> > On Thu, Apr 2, 2020 at 9:34 AM Christian König
> > wrote:
> >> Am 02.04.20 um 04:34 schrieb Jann Horn:
> >> > [x86 folks in CC so that they can chime in on the precise rules for
> >> > this stuff]
>
> They are pretty
On Thu, Apr 02, 2020 at 09:33:54AM +0200, Christian König wrote:
> Hi Jann,
>
> Am 02.04.20 um 04:34 schrieb Jann Horn:
> > [x86 folks in CC so that they can chime in on the precise rules for this
> > stuff]
> >
> > Hi!
> >
> > I noticed that several makefiles under drivers/gpu/drm/amd/display/
Hi Someguy,
Your findings sound very familiar, my machine is also rock-solid
running Windows-10 - most of the MCEs happened for me with low-load
situations but firefox playing youtube in background.
First I didn't care that much - but now having experienced corrupted
firefox profiles and lost spre
On Thu, Apr 2, 2020 at 9:34 AM Christian König wrote:
> Am 02.04.20 um 04:34 schrieb Jann Horn:
> > [x86 folks in CC so that they can chime in on the precise rules for this
> > stuff]
> > I noticed that several makefiles under drivers/gpu/drm/amd/display/dc/
> > turn on floating-point instruction
Hello! I saw Clemens Eisserer email regarding MCE errors with his RX 570
and 3700x, and I like to add to that list of MCE spontaneous reboots as
well.
This is my configuration:
-Ryzen 3900x + Noctua D15
-MSI X570 Unify (latest agesa as of writing)
-DDR4 3200mhz 32GB kit
-Sapphire Pulse 5700 XT
-Cor
Jann Horn writes:
> On Thu, Apr 2, 2020 at 9:34 AM Christian König
> wrote:
>> Am 02.04.20 um 04:34 schrieb Jann Horn:
>> > [x86 folks in CC so that they can chime in on the precise rules for
>> > this stuff]
They are pretty simple.
Any code using FPU needs to be completely isolated from regul
hwmgr->pm_en is initialized at hwmgr_hw_init.
during amdgpu_device_init, there is amdgpu_asic_reset that calls to
pp_get_asic_baco_capability, while hwmgr->pm_en has not yet been initialized.
so avoid using pm_en in pp_get_asic_baco_capability.
Signed-off-by: Tiecheng Zhou
Signed-off-by: Yintian
"1382d6409891 drm/amd/display: Fix RV2 Variant Detection"
introduces build error of:
"use of undeclared identifier 'RENOIR_A0'"
To fix the same, this patch re-orders the
ASIC declarations accordingly.
Signed-off-by: Shirish S
---
drivers/gpu/drm/amd/display/include/dal_asic_id.h | 6 --
1 f
Hi Jann,
Am 02.04.20 um 04:34 schrieb Jann Horn:
[x86 folks in CC so that they can chime in on the precise rules for this stuff]
Hi!
I noticed that several makefiles under drivers/gpu/drm/amd/display/dc/
turn on floating-point instructions in the compiler flags
(-mhard-float, -msse and -msse2)
-Original Message-
From: Jack Zhang
Sent: Thursday, April 2, 2020 3:20 PM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Jack (Jian)
Subject: [PATCH] drm/amdgpu/sriov add amdgpu_amdkfd_pre_reset in gpu reset
kfd_pre_reset will free mem_objs allocated by kfd_gtt_sa_allocate
Without this
kfd_pre_reset will free mem_objs allocated by kfd_gtt_sa_allocate
Without this change, sriov tdr code path will never free those allocated
memories and get memory leak.
Signed-off-by: Jack Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a
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