Re: [PATCH] drm/dp_mst: correct the shifting in DP_REMOTE_I2C_READ

[AMD Official Use Only - Internal Distribution Only] > > From: Wentland, Harry > Sent: Monday, December 30, 2019 23:26 > To: Lin, Wayne; dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org > Cc: ly...@redhat.com; Zuo, Jerry; Kazlauskas, Nicholas

Re: [PATCH] drm/dp_mst: correct the shifting in DP_REMOTE_I2C_READ

[AMD Official Use Only - Internal Distribution Only] > > From: Jani Nikula > Sent: Monday, December 30, 2019 19:15 > To: Lin, Wayne; dri-de...@lists.freedesktop.org; amd-gfx@lists.freedesktop.org > Cc: Zuo, Jerry; Kazlauskas, Nicholas; Lin, Wayne > Subject

RE: [PATCH 2/2] drm/amd/powerplay: allocate one piece of VRAM for all tables transferring

Hi Alex, Please check the new patch sets. https://lists.freedesktop.org/archives/amd-gfx/2019-December/044352.html https://lists.freedesktop.org/archives/amd-gfx/2019-December/044353.html Regards, Evan > -Original Message- > From: Alex Deucher > Sent: Monday, December 30, 2019 11:22 PM >

[PATCH 1/2] drm/amd/powerplay: cache the watermark settings on system memory

So that we do not need to allocate a piece of VRAM for it. This is a preparation for coming change which unifies the VRAM address for all driver tables interaction with SMU. Change-Id: I967f960a10a19957ea7301aa40a8ced0c036ad68 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu

[PATCH 2/2] drm/amd/powerplay: unified VRAM address for driver table interaction with SMU

By this, we can avoid to pass in the VRAM address on every table transferring. That puts extra unnecessary traffics on SMU on some cases(e.g. polling the amdgpu_pm_info sysfs interface). Change-Id: Ifb74d9cd89790b301e88d472b29cdb9b0365b65a Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerpl

[PATCH] drm/amdgpu: update UMC 6.1 RAS error counter register access path

[AMD Official Use Only - Internal Distribution Only] Submitting patch to access UMC Status register on Arcturus/Vega20 via SMN Thank you, John Clements 0001-drm-amdgpu-update-UMC-6.1-RAS-error-counter-register.patch Description: 0001-drm-amdgpu-update-UMC-6.1-RAS-error-counter-register.patc

Re: [PATCH] drm/dp_mst: correct the shifting in DP_REMOTE_I2C_READ

On 2019-12-30 2:05 a.m., Wayne Lin wrote: > [Why] > According to DP spec, it should shift left 4 digits for NO_STOP_BIT > in REMOTE_I2C_READ message. Not 5 digits. > > [How] > Correct the shifting value of NO_STOP_BIT for DP_REMOTE_I2C_READ case in > drm_dp_encode_sideband_req(). > > Signed-off-b

Re: [PATCH 2/2] drm/amd/powerplay: allocate one piece of VRAM for all tables transferring

On Mon, Dec 30, 2019 at 5:50 AM Evan Quan wrote: > > Simplify the table transferring between driver and SMU and use less > VRAM. > > Change-Id: I3f9b54fd9b8c0bcaeb533fc1a07bb06050fefbd8 > Signed-off-by: Evan Quan > --- > drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 101 ++ > d

Re: [PATCH 1/2] drm/amd/powerplay: using fixed vram address for table transferring

On Mon, Dec 30, 2019 at 5:50 AM Evan Quan wrote: > > By this, we can avoid to pass in the vram address on every table > transferring. > > Change-Id: Ia8a3dbe923bc562286ab102a5830392a95dcf28c > Signed-off-by: Evan Quan > --- > drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 42 ---

Re: [PATCH] drm/amd/powerplay: retrieve the enabled feature mask from cache

On Mon, Dec 30, 2019 at 5:41 AM Evan Quan wrote: > > This is why those feature mask members designed for. And this > can reduce the SMU workload. > > Change-Id: I2c6e12e945508f7b2fd79bc172efa68bc6150d05 > Signed-off-by: Evan Quan Acked-by: Alex Deucher > --- > drivers/gpu/drm/amd/powerplay/am

AMDGPU - DisplayPort audio at rate 44100 does not play

First off, thank you for all your hard work in making Linux a better choice for the desktop and gaming! Having said that, I've been having a strange problem since the AMDGPU drivers were first included in the Fedora distribution of the Linux kernel. I have no display related issues, but I have a s

Re: [PATCH] drm/dp_mst: correct the shifting in DP_REMOTE_I2C_READ

On Mon, 30 Dec 2019, Wayne Lin wrote: > [Why] > According to DP spec, it should shift left 4 digits for NO_STOP_BIT > in REMOTE_I2C_READ message. Not 5 digits. > > [How] > Correct the shifting value of NO_STOP_BIT for DP_REMOTE_I2C_READ case in > drm_dp_encode_sideband_req(). Which commit introdu

RE: [PATCH] drm/amd/powerplay: avoid deadlock on Vega20 swSMU routine

Reviewed-by: Feifei Xu -Original Message- From: amd-gfx On Behalf Of Evan Quan Sent: Monday, December 30, 2019 6:40 PM To: amd-gfx@lists.freedesktop.org Cc: Quan, Evan Subject: [PATCH] drm/amd/powerplay: avoid deadlock on Vega20 swSMU routine The lock required was already hold by its

[PATCH 2/2] drm/amd/powerplay: allocate one piece of VRAM for all tables transferring

Simplify the table transferring between driver and SMU and use less VRAM. Change-Id: I3f9b54fd9b8c0bcaeb533fc1a07bb06050fefbd8 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 101 ++ drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 2 +- .../gpu/drm/

[PATCH 1/2] drm/amd/powerplay: using fixed vram address for table transferring

By this, we can avoid to pass in the vram address on every table transferring. Change-Id: Ia8a3dbe923bc562286ab102a5830392a95dcf28c Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c| 42 --- drivers/gpu/drm/amd/powerplay/arcturus_ppt.c | 1 + .../gpu/d

[PATCH] drm/amd/powerplay: retrieve the enabled feature mask from cache

This is why those feature mask members designed for. And this can reduce the SMU workload. Change-Id: I2c6e12e945508f7b2fd79bc172efa68bc6150d05 Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 2 +- drivers/gpu/drm/amd/powerplay/smu_v11_0.c | 61 +-

[PATCH] drm/amd/powerplay: avoid deadlock on Vega20 swSMU routine

The lock required was already hold by its parent API. Change-Id: I2ffe63d2016a2e274d54634cd8f8c51cca8b3a1c Signed-off-by: Evan Quan --- drivers/gpu/drm/amd/powerplay/amdgpu_smu.c | 4 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/