[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Hawking Zhang
Regards,
Hawking
-Original Message-
From: Quan, Evan
Sent: Wednesday, December 25, 2019 14:23
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Hawking ; Quan, Evan
Subject: [PATCH] drm/amdgpu: correct RLC firm
> -Original Message-
> From: Lyude Paul
> Sent: Saturday, December 21, 2019 8:12 AM
> To: Lin, Wayne ; dri-de...@lists.freedesktop.org;
> amd-gfx@lists.freedesktop.org
> Cc: Kazlauskas, Nicholas ; Wentland, Harry
> ; Zuo, Jerry ;
> sta...@vger.kernel.org
> Subject: Re: [PATCH] drm/dp_ms
Per confirmation with RLC firmware team, the RLC should
be unhalted after all RLC related firmwares uploaded.
However, in fact the RLC is unhalted immediately after
RLCG firmware uploaded. And that may causes unexpected
PSP hang on loading the succeeding RLC save restore
list related firmwares.
So,
[AMD Official Use Only - Internal Distribution Only]
In patch 3,
1. psp_ta_invoke should be one static function?
2. The indentation in each "return" line looks not correct.
With above fixed, series is:
Reviewed-by: Guchun Chen .
From: amd-gfx On Behalf Of Clements,
John
Sent: Tuesday, December
On Tue, Dec 24, 2019 at 1:36 PM Yusuf Altıparmak
wrote:
>
> Hello Alex,
>
> Is this firmware differs on kernel version ? I am using linux kernel for
> embedded device. If not, can I use the ones I found with google ?
The kernel version doesn't matter. The firmware can be found here:
https://git
Hello Alex,
Is this firmware differs on kernel version ? I am using linux kernel for
embedded device. If not, can I use the ones I found with google ?
Thanks.
Alex Deucher , 24 Ara 2019 Sal, 21:00 tarihinde şunu
yazdı:
> On Tue, Dec 24, 2019 at 1:38 AM Yusuf Altıparmak
> wrote:
> >
> > Hello,
On Tue, Dec 24, 2019 at 9:30 AM zhengbin wrote:
>
> zhengbin (8):
> drm/amd/display: use true,false for bool variable in dc_link_ddc.c
> drm/amd/display: use true,false for bool variable in
> dcn10_hw_sequencer.c
> drm/amd/display: use true,false for bool variable in dcn20_hwseq.c
> dr
On Tue, Dec 24, 2019 at 9:30 AM zhengbin wrote:
>
> Fixes coccicheck warning:
>
> drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c:875:1-31: WARNING:
> Assignment of 0/1 to bool variable
>
> Reported-by: Hulk Robot
> Signed-off-by: zhengbin
Applied. thanks!
Alex
> ---
> drivers/gpu/drm/a
zhengbin (8):
drm/amd/display: use true,false for bool variable in dc_link_ddc.c
drm/amd/display: use true,false for bool variable in
dcn10_hw_sequencer.c
drm/amd/display: use true,false for bool variable in dcn20_hwseq.c
drm/amd/display: use true,false for bool variable in
display_
Fixes coccicheck warning:
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:157:46-64: WARNING: Assignment
of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:159:2-20: WARNING: Assignment
of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/calcs/dce_calcs.c:161:46-64: WAR
Fixes coccicheck warning:
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c:110:6-13:
WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20.c:113:2-9:
WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/
Fixes coccicheck warning:
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c:482:6-14: WARNING:
Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c:485:2-10: WARNING:
Assignment of 0/1 to bool variable
Reported-by: Hulk Robot
Signed-off-by: zheng
Fixes coccicheck warning:
drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c:593:6-9: WARNING: Assignment
of 0/1 to bool variable
Reported-by: Hulk Robot
Signed-off-by: zhengbin
---
drivers/gpu/drm/amd/display/dc/core/dc_link_ddc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
Fixes coccicheck warning:
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c:85:6-13:
WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_rq_dlg_calc_21.c:88:2-9:
WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/dm
Fixes coccicheck warning:
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c:110:6-13:
WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/dml/dcn20/display_rq_dlg_calc_20v2.c:113:2-9:
WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display
Fixes coccicheck warning:
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c:4124:3-28:
WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c:4128:5-30:
WARNING: Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/dml
Fixes coccicheck warning:
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c:875:1-31: WARNING:
Assignment of 0/1 to bool variable
Reported-by: Hulk Robot
Signed-off-by: zhengbin
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Fixes coccicheck warning:
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c:186:6-14: WARNING:
Assignment of 0/1 to bool variable
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c:189:2-10: WARNING:
Assignment of 0/1 to bool variable
Reported-by: Hulk Robot
Signed-off-by: zhengbin
---
driv
On Tue, Dec 24, 2019 at 4:29 AM Evan Quan wrote:
>
> This is used to determine whether runtime pm can be
> supported or not.
>
> Change-Id: I0b6452ae56094d768ece23ba62476f410f19e57b
> Signed-off-by: Evan Quan
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/soc15.c | 1 +
> 1 file
On Tue, Dec 24, 2019 at 1:38 AM Yusuf Altıparmak
wrote:
>
> Hello, I just compiled my 4.19 kernel with amdgpu driver (amdgpu as builtin).
> The driver is giving me -2 error because of polaris12_mc.bin did not found.
> I couldn't find that file anywhere. How can i get polaris12_mc.bin and where
[AMD Official Use Only - Internal Distribution Only]
Patch 1:
* Update PSP command submission to output failure to dmesg by default
* Removed masking of response status (as requested by PSP team)
Patch 2:
* Unify TA function to prepare load/unload commands
Patch 3:
* Unify TA
[AMD Official Use Only - Internal Distribution Only]
Reviewed-by: Huang Rui
-Original Message-
From: Wang, Kevin(Yang)
Sent: Monday, December 23, 2019 6:28 PM
To: amd-gfx-boun...@lists.freedesktop.org
Cc: Feng, Kenneth ; Huang, Ray ;
Liang, Prike ; Deucher, Alexander
; Wang, Kevin(Ya
This is used to determine whether runtime pm can be
supported or not.
Change-Id: I0b6452ae56094d768ece23ba62476f410f19e57b
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/amdgpu/soc15.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c
b/drivers/gpu/drm/amd
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