From: "Tianci.Yin"
add memory training implementation code to save resume time.
Change-Id: I625794a780b11d824ab57ef39cc33b872c6dc6c9
Reviewed-by: Alex Deucher
Signed-off-by: Tianci.Yin
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 9 ++
drive
the trace event print string format error.
(use integer type to handle string)
before:
amdgpu_test_kev-1556 [002] 138.508781: amdgpu_cs_ioctl:
sched_job=8, timeline=gfx_0.0.0, context=177, seqno=1,
ring_name=94d01c207bf0, num_ibs=2
after:
amdgpu_test_kev-1506 [004] 370.703783: amdgpu_cs
Add PSP TA firmware declaration for raven raven2 picasso
Signed-off-by: chen gong
---
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
index b96484a..b345e69 100644
--- a
Ok, see you newly patch DCFCLK_DPM_LEVELS has been aligned well.
Thanks,
Prike
> -Original Message-
> From: amd-gfx On Behalf Of Liang,
> Prike
> Sent: Wednesday, October 16, 2019 10:22 AM
> To: Wu, Hersen ; amd-gfx@lists.freedesktop.org
> Cc: Wentland, Harry ; Wang, Kevin(Yang)
> ; Wu,
Thanks Luben!
Patch 8 v2 has sent out, please review again.
From: Tuikov, Luben
Sent: Wednesday, October 16, 2019 2:01
To: Yin, Tianci (Rico) ; amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Koenig, Christian
Subject: Re: [PATCH 1/8] drm/amdgpu: update
Regards the comment inline, saw you have fixed the not enable
CONFIG_DRM_AMD_DC_DCN2_1 potential compile issue.
BTW, would you help clarify why PP_SMU_NUM_DCFCLK_DPM_LEVELS is different from
the smu12_driver_if.h define NUM_DCFCLK_DPM_LEVELS .
Is there can track the macro definition update ?
Th
Thanks very much! Please review again.
Rico
From: Tuikov, Luben
Sent: Wednesday, October 16, 2019 1:59
To: Yin, Tianci (Rico) ; amd-gfx@lists.freedesktop.org
Cc: Koenig, Christian ; Deucher, Alexander
Subject: Re: [PATCH 8/8] drm/amdgpu/psp: add psp memory tra
Reviewed-by: Prike Liang
BTW, would you help clarify why PP_SMU_NUM_DCFCLK_DPM_LEVELS is different from
the smu12_driver_if.h define
NUM_DCFCLK_DPM_LEVELS in you other patch about drm/amdgpu/powerplay: add renoir
funcs to support dc.
Is there can track the macro definition update ?
Thanks,
P
On Tue, Oct 15, 2019 at 1:26 PM Arvind Sankar wrote:
>
> On Tue, Oct 15, 2019 at 11:05:56AM -0700, Nick Desaulniers wrote:
> > Hmmm...I would have liked to remove it outright, as it is an ABI
> > mismatch that is likely to result in instability and non-fun-to-debug
> > runtime issues in the future
On Tue, Oct 15, 2019 at 6:08 PM Zhu, James wrote:
>
> Allocate 256K enc session bo for uvd6.0 ring IB test to fix S3 resume
> corruption issue.
>
> Signed-off-by: James Zhu
> ---
> drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 16 ++--
> 1 file changed, 14 insertions(+), 2 deletions(-)
>
>
We need to allocate a large enough buffer for the
session info, otherwise the IB test can overwrite
other memory.
- Session info is 128K according to mesa
- Use the same session info for create and destroy
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241
Signed-off-by: Alex Deucher
---
d
We need to allocate a large enough buffer for the
session info, otherwise the IB test can overwrite
other memory.
v2: - session info is 128K according to mesa
- use the same session info for create and destroy
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241
Signed-off-by: Alex Deucher
We need to allocate a large enough buffer for the
session info, otherwise the IB test can overwrite
other memory.
v2: - session info is 128K according to mesa
- use the same session info for create and destroy
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241
Signed-off-by: Alex Deucher
Allocate 256K enc session bo for uvd6.0 ring IB test to fix S3 resume
corruption issue.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
b/drivers/gpu/dr
UVD session info size can be upto 128K, we need to allocate a large
enough buffer for the session info, otherwise the IB test can overwrite
other's memory.
Bug: https://bugzilla.kernel.org/show_bug.cgi?id=204241
James Zhu (3):
drm/amdgpu/uvd:Add uvd enc session bo
drm/amdgpu/uvd:Allocate enc
Add uvd enc session bo for uvd encode IB test.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
index 5eb6328..1e39c8a 100644
--- a/drive
Allocate 256K enc session bo for uvd6.0 ring IB test to fix S3 resume
corruption issue.
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
b/drivers/gpu/dr
Hi,
Gentle ping ?
Thx
Julien
On Fri, Oct 11, 2019 at 12:31 PM Julien Isorce
wrote:
> Hi Harry,
>
> Do you need more information ?
>
> Thx
> Julien
>
> On Tue, Oct 8, 2019 at 11:15 AM Julien Isorce
> wrote:
>
>> Hi Harry,
>>
>> I can reproduce on LG, Samsung and NEC monitors.
>>
>> "Have you c
On Tue, Oct 15, 2019 at 11:05:56AM -0700, Nick Desaulniers wrote:
> Hmmm...I would have liked to remove it outright, as it is an ABI
> mismatch that is likely to result in instability and non-fun-to-debug
> runtime issues in the future. I suspect my patch does work for GCC
> 7.1+. The question is
On Tue, Oct 15, 2019 at 11:30 AM Alex Deucher wrote:
>
> On Tue, Oct 15, 2019 at 2:07 PM Nick Desaulniers
> wrote:
> >
> > On Tue, Oct 15, 2019 at 12:19 AM Arnd Bergmann wrote:
> > >
> > > On Tue, Oct 15, 2019 at 9:08 AM S, Shirish wrote:
> > > > On 10/15/2019 3:52 AM, Nick Desaulniers wrote:
>
[Why]
Having the rounding of the backlight value restored to the way it was
seemingly gets rid of backlight flickering on certain Stoney Ridge
laptops.
[How]
Rescale the backlight level between min and max input signal value and
round it to a number between 0x0 and 0xFF. Then, use the rounding mod
On Tue, Oct 15, 2019 at 2:50 AM Daniel Drake wrote:
>
> On Asus UX434DA (Ryzen7 3700U), upon resume from s2idle, the screen
> turns on again and shows the pre-suspend image, but the display remains
> frozen from that point onwards.
>
> The kernel logs show errors:
>
> [drm] psp command failed and
On Tue, Oct 15, 2019 at 2:07 PM Nick Desaulniers
wrote:
>
> On Tue, Oct 15, 2019 at 12:19 AM Arnd Bergmann wrote:
> >
> > On Tue, Oct 15, 2019 at 9:08 AM S, Shirish wrote:
> > > On 10/15/2019 3:52 AM, Nick Desaulniers wrote:
> >
> > > My gcc build fails with below errors:
> > >
> > > dcn_calcs.c
From: Jason Gunthorpe
The new API is an exact match for the needs of radeon.
For some reason radeon tries to remove overlapping ranges from the
interval tree, but interval trees (and mmu_range_notifier_insert)
support overlapping ranges directly. Simply delete all this code.
Since this driver i
From: Jason Gunthorpe
The only two users of this are now converted to use mmu_range_notifier,
delete all the code and update hmm.rst.
Signed-off-by: Jason Gunthorpe
---
Documentation/vm/hmm.rst | 105 ---
include/linux/hmm.h | 183 +
mm/Kconfig
From: Jason Gunthorpe
Remove the interval tree in the driver and rely on the tree maintained by
the mmu_notifier for delivering mmu_notifier invalidation callbacks.
For some reason amdgpu has a very complicated arrangement where it tries
to prevent duplicate entries in the interval_tree, this is
From: Jason Gunthorpe
Convert the collision-retry lock around hmm_range_fault to use the one now
provided by the mmu_range notifier.
Although this driver does not seem to use the collision retry lock that
hmm provides correctly, it can still be converted over to use the
mmu_range_notifier api in
From: Jason Gunthorpe
This converts one of the two users of mmu_notifiers to use the new API.
The conversion is fairly straightforward, however the existing use of
notifiers here seems to be racey.
Cc: Mike Marciniszyn
Cc: Dennis Dalessandro
Signed-off-by: Jason Gunthorpe
---
drivers/infinib
From: Jason Gunthorpe
find_vma() must be called under the mmap_sem, reorganize this code to
do the vma check after entering the lock.
Further, fix the unlocked use of struct task_struct's mm, instead use
the mm from hmm_mirror which has an active mm_grab. Also the mm_grab
must be converted to a
From: Jason Gunthorpe
Now that we have KERNEL_HEADER_TEST all headers are generally compile
tested, so relying on makefile tricks to avoid compiling code that depends
on CONFIG_MMU_NOTIFIER is more annoying.
Instead follow the usual pattern and provide most of the header with only
the functions
From: Jason Gunthorpe
Remove the hmm_mirror object and use the mmu_range_notifier API instead
for the range, and use the normal mmu_notifier API for the general
invalidation callback.
While here re-organize the pagefault path so the locking pattern is clear.
nouveau is the only driver that uses
From: Jason Gunthorpe
gntdev simply wants to monitor a specific VMA for any notifier events,
this can be done straightforwardly using mmu_range_notifier_insert() over
the VMA's VA range.
The notifier should be attached until the original VMA is destroyed.
It is unclear if any of this is even sa
From: Jason Gunthorpe
8 of the mmu_notifier using drivers (i915_gem, radeon_mn, umem_odp, hfi1,
scif_dma, vhost, gntdev, hmm) drivers are using a common pattern where
they only use invalidate_range_start/end and immediately check the
invalidating range against some driver data structure to tell i
From: Jason Gunthorpe
Only the function calls are stubbed out with static inlines that always
fail. This is the standard way to write a header for an optional component
and makes it easier for drivers that only optionally need HMM_MIRROR.
Signed-off-by: Jason Gunthorpe
---
include/linux/hmm.h
From: Jason Gunthorpe
There is no reason to get the invalidate_range_start() callback via an
indirection through hmm_mirror, just register a normal notifier directly.
Cc: Ben Skeggs
Cc: dri-de...@lists.freedesktop.org
Cc: nouv...@lists.freedesktop.org
Cc: Ralph Campbell
Signed-off-by: Jason Gu
From: Jason Gunthorpe
Of the 13 users of mmu_notifiers, 8 of them use only
invalidate_range_start/end() and immediately intersect the
mmu_notifier_range with some kind of internal list of VAs. 4 use an
interval tree (i915_gem, radeon_mn, umem_odp, hfi1). 4 use a linked list
of some kind (scif_dm
From: Jason Gunthorpe
DMA_SHARED_BUFFER can not be enabled by the user (it represents a library
set in the kernel). The kconfig convention is to use select for such
symbols so they are turned on implicitly when the user enables a kconfig
that needs them.
Otherwise the XEN_GNTDEV_DMABUF kconfig i
From: Jason Gunthorpe
Replace the internal interval tree based mmu notifier with the new common
mmu_range_notifier_insert() API. This removes a lot of code and fixes a
deadlock that can be triggered in ODP:
zap_page_range()
mmu_notifier_invalidate_range_start()
[..]
ib_umem_notifier_in
From: Jason Gunthorpe
hmm_mirror's handling of ranges does not use a sequence count which
results in this bug:
CPU0 CPU1
hmm_range_wait_until_valid(range)
valid == true
On Tue, Oct 15, 2019 at 11:05 AM Nick Desaulniers
wrote:
>
> On Tue, Oct 15, 2019 at 12:19 AM Arnd Bergmann wrote:
> >
> > On Tue, Oct 15, 2019 at 9:08 AM S, Shirish wrote:
> > > On 10/15/2019 3:52 AM, Nick Desaulniers wrote:
> >
> > > My gcc build fails with below errors:
> > >
> > > dcn_calcs.
On Tue, Oct 15, 2019 at 12:19 AM Arnd Bergmann wrote:
>
> On Tue, Oct 15, 2019 at 9:08 AM S, Shirish wrote:
> > On 10/15/2019 3:52 AM, Nick Desaulniers wrote:
>
> > My gcc build fails with below errors:
> >
> > dcn_calcs.c:1:0: error: -mpreferred-stack-boundary=3 is not between 4 and 12
> >
> > d
Patches 1-7: Looks good.
Reviewed-by: Luben Tuikov
Patch 8: NAK! for the same exact reason as the previous review. No changes to
NAK reasoning from previous review.
Regards,
Luben
On 2019-10-13 11:21 p.m., Tianci Yin wrote:
> From: "Tianci.Yin"
>
> update amdgpu_discovery to get IP revision.
On 2019-10-13 11:21 p.m., Tianci Yin wrote:
> From: "Tianci.Yin"
>
> add memory training implementation code to save resume time.
>
> Change-Id: I625794a780b11d824ab57ef39cc33b872c6dc6c9
> Reviewed-by: Alex Deucher
> Signed-off-by: Tianci.Yin
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu.h |
Reviewed-by: Bhawanpreet Lakha
On 2019-10-15 12:51 p.m., Hersen Wu wrote:
> when CONFIG_DRM_AMD_DC_DCN2_1 is not enable in .config,
> there is build error. struct dpm_clocks shoud not be
> guarded.
>
> Signed-off-by: Hersen Wu
> ---
> drivers/gpu/drm/amd/display/dc/dm_pp_smu.h | 3 ---
> 1 fi
when CONFIG_DRM_AMD_DC_DCN2_1 is not enable in .config,
there is build error. struct dpm_clocks shoud not be
guarded.
Signed-off-by: Hersen Wu
---
drivers/gpu/drm/amd/display/dc/dm_pp_smu.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dm_pp_smu.h
b/driver
I'm pleased to announce the 19.1.0 release of xf86-video-ati, the Xorg
driver for ATI/AMD Radeon GPUs supported by the radeon kernel driver.
This release supports xserver versions 1.13-1.20.
There are no big changes in this release, just fixes and other minor
improvements.
Thanks to everybody wh
Reviewed-by: Bhawanpreet Lakha
On 2019-10-15 11:04 a.m., Hersen Wu wrote:
> enable dc get dmp clock table and set dcn watermarks
> via pplib.
>
> Signed-off-by: Hersen Wu
> ---
> .../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 93 +++
> drivers/gpu/drm/amd/display/dc/dm_pp_smu
Hersen - the change 002c988 'drm/amdgpu/powerplay: add renoir funcs to
support dc' seeems to break compilation on drm-next because
renoir_get_dpm_clock_table uses defines and structs from
amd/display/dc/dm_pp_smu.h which are under CONFIG_DRM_AMD_DC_DCN2_1
Andrey
___
enable dc get dmp clock table and set dcn watermarks
via pplib.
Signed-off-by: Hersen Wu
---
.../amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 93 +++
drivers/gpu/drm/amd/display/dc/dm_pp_smu.h| 2 +-
2 files changed, 94 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/d
On Tue, Oct 15, 2019 at 10:27 AM Andrey Grodzovsky
wrote:
>
> Ignre the ERREVENT_ATHUB_INTERRUPT for systems without RAS.
>
> Signed-off-by: Andrey Grodzovsky
> Reviewed-and-tested-by: Jack Zhang
Acked-by: Alex Deucher
>
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 6 ++
> 1 file ch
Ignre the ERREVENT_ATHUB_INTERRUPT for systems without RAS.
Signed-off-by: Andrey Grodzovsky
Reviewed-and-tested-by: Jack Zhang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
b/drivers/gpu/drm/amd/a
On 2019-10-14 9:04 a.m., Koenig, Christian wrote:
> Am 14.10.19 um 15:01 schrieb Alex Deucher:
>> On Mon, Oct 14, 2019 at 5:06 AM Christian König
>> wrote:
>>> Am 11.10.19 um 22:50 schrieb Alex Deucher:
We need to allocate a large enough buffer for the
session info, otherwise the IB tes
On 2019-10-11 4:51 p.m., Alex Deucher wrote:
> From: Ahzo
>
> This fixes kernel NULL pointer dereferences on shutdown:
> RIP: 0010:build_audio_output.isra.0+0x97/0x110 [amdgpu]
> RIP: 0010:enable_link_dp+0x186/0x300 [amdgpu]
>
> Signed-off-by: Ahzo
> Signed-off-by: Alex Deucher
Reviewed-by: H
From: Arnd Bergmann
> Sent: 15 October 2019 08:19
>
> On Tue, Oct 15, 2019 at 9:08 AM S, Shirish wrote:
> > On 10/15/2019 3:52 AM, Nick Desaulniers wrote:
>
> > My gcc build fails with below errors:
> >
> > dcn_calcs.c:1:0: error: -mpreferred-stack-boundary=3 is not between 4 and 12
> >
> > dcn_
Series are Reviewed-by: Huang Rui
-Original Message-
From: Liang, Prike
Sent: Tuesday, October 15, 2019 5:50 PM
To: amd-gfx@lists.freedesktop.org
Cc: Quan, Evan ; Feng, Kenneth ;
Huang, Ray ; Liang, Prike
Subject: [PATCH 1/2] drm/amdgpu: add GFX_PIPELINE capacity check for updating
g
Fix gfx cgpg setting sequence for RLC deadlock at safe mode entry in polling
gfx response.
The patch can fix VCN IB test failed and DAL get dispaly count failed issue.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 5 -
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
Before disable gfx pipeline power gating need check the flag
AMD_PG_SUPPORT_GFX_PIPELINE.
Signed-off-by: Prike Liang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgp
comment inline.
From: amd-gfx on behalf of chen gong
Sent: Monday, October 14, 2019 10:57 AM
To: amd-gfx@lists.freedesktop.org
Cc: Gong, Curry
Subject: [PATCH] drm/amdgpu: No need to check gfxoff status after enable gfxoff
feature
smu_send_smc_msg(smu, SMU_MS
On Tue, Oct 15, 2019 at 9:08 AM S, Shirish wrote:
> On 10/15/2019 3:52 AM, Nick Desaulniers wrote:
> My gcc build fails with below errors:
>
> dcn_calcs.c:1:0: error: -mpreferred-stack-boundary=3 is not between 4 and 12
>
> dcn_calc_math.c:1:0: error: -mpreferred-stack-boundary=3 is not between 4
Hi Nick,
On 10/15/2019 3:52 AM, Nick Desaulniers wrote:
Hello!
The x86 kernel is compiled with an 8B stack alignment via
`-mpreferred-stack-boundary=3` for GCC since 3.6-rc1 via
commit d9b0cde91c60 ("x86-64, gcc: Use
-mpreferred-stack-boundary=3 if supported")
or `-mstack-alignment=8
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