Enable SOCclk and DCEFclk dpm level retrieving and setting on Vega10.
Change-Id: I5bcd2e9984b5b7fdb991718d8384d65290672df6
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/hwmgr/vega10_hwmgr.c| 83 +++
.../drm/amd/powerplay/hwmgr/vega10_hwmgr.h| 1 +
2 files changed, 8
Enable retrieving and setting ppfeatures on Vega10.
Change-Id: I44ea8789ad3c59cfb40a367665a6190f4405610e
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/hwmgr/vega10_hwmgr.c| 101 ++
1 file changed, 101 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10
Enable SOCclk and DCEFclk dpm level retrieving and setting on Vega12.
Change-Id: Ieb3e06dcdfe5dd67c3f27f6fdb9a6bb408034faf
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/hwmgr/vega12_hwmgr.c| 98 ++-
1 file changed, 97 insertions(+), 1 deletion(-)
diff --git a/drivers/gp
Enable retrieving and setting ppfeatures on Vega12.
Change-Id: Idad5eaadbb9e7ea73edd9e9d4fe4e1a5b17fb7a6
Signed-off-by: Evan Quan
---
.../drm/amd/powerplay/hwmgr/vega12_hwmgr.c| 100 ++
1 file changed, 100 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega12
++Monk
Yes amdgpu_lockup_timeout was forced to 1 in current code, that means
amdgpu_device_gpu_recover was not triggered inside xgpu_ai_mailbox_flr_work.
For sriov, amdgpu_device_gpu_recover was already called by amdgpu_job_timedout,
unexpected amdgpu_device_gpu_recover called by xgpu_ai_mai
sriov need to restrict max_pfn below AMDGPU_GMC_HOLE.
access the hole results in a range fault interrupt IIRC.
Change-Id: I0add197a24a54388a128a545056e9a9f0330abfb
Signed-off-by: Wentao Lou
---
drivers/gpu/drm/amd/amdgpu/amdgpu_csa.c | 3 +--
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 6 +-
2
Hi Dave, Daniel,
Just a couple of fixes for 5.0:
- Overclock fix for vega10
- Hybrid gfx laptop fix
The following changes since commit 35dad45d5cad3c9ca8d6a338cbf668cd7ea86469:
drm/amd/display: Detach backlight from stream (2019-01-16 17:11:47 -0500)
are available in the Git repository at:
On 1/23/19 11:08 AM, Grodzovsky, Andrey wrote:
>
>
> On 01/22/2019 01:28 PM, sunpeng...@amd.com wrote:
>> From: David Francis
>>
>> [Why]
>> We were assuming that any commit with allow_modeset == false
>> was a pageflip. This was against drm intention and only
>> worked by sheer luck
>>
>> [How
I think we just want a driver-local check for those combinations
where we know this hack actually works, which really just seems
to be x86-64 with PAT. Something like the patch below, but maybe with
even more strong warnings to not do something like this elsewhere:
diff --git a/drivers/gpu/drm/amd
On Wed, 23 Jan 2019 at 17:44, Christoph Hellwig wrote:
>
> I think we just want a driver-local check for those combinations
> where we know this hack actually works, which really just seems
> to be x86-64 with PAT. Something like the patch below, but maybe with
> even more strong warnings to not d
Hi Daniel.
On Thu, Jan 17, 2019 at 10:03:34PM +0100, Daniel Vetter wrote:
> Having the probe helper stuff (which pretty much everyone needs) in
> the drm_crtc_helper.h file (which atomic drivers should never need) is
> confusing. Split them out.
>
> To make sure I actually achieved the goal here
On 01/23/2019 04:50 AM, wentalou wrote:
> sriov's gpu_recover inside xgpu_ai_mailbox_flr_work would cause duplicate
> recover in TDR.
> TDR's gpu_recover would be triggered by amdgpu_job_timedout,
> that could avoid vk-cts failure by unexpected recover.
>
> Change-Id: Ifcba4ac43a0229ae19061aad3b
On 01/22/2019 01:28 PM, sunpeng...@amd.com wrote:
> From: David Francis
>
> [Why]
> We were assuming that any commit with allow_modeset == false
> was a pageflip. This was against drm intention and only
> worked by sheer luck
>
> [How]
> A pageflip is the change from one framebuffer to another
On Wed, 23 Jan 2019 at 08:15, Christoph Hellwig wrote:
>
> On Tue, Jan 22, 2019 at 10:07:07PM +0100, Ard Biesheuvel wrote:
> > Yes, so much was clear. And the reason this breaks on some arm64
> > systems is because
> > a) non-snooped PCIe TLP attributes may be ignored, and
> > b) non-x86 CPUs do n
On Wed, Jan 09, 2019 at 10:20:49AM +0100, Michel Dänzer wrote:
On 2019-01-08 8:25 p.m., Sasha Levin wrote:
From: Nicholas Kazlauskas
[ Upstream commit 520f08df45fbe300ed650da786a74093d658b7e1 ]
When variable refresh rate is active [...]
Variable refresh rate (FreeSync) support is only landi
This feature is only seen on the latest vbios. No requirement for SMU fw.
Regards,
Evan
> -Original Message-
> From: Alex Deucher
> Sent: 2019年1月23日 12:54
> To: Quan, Evan
> Cc: amd-gfx list
> Subject: Re: [PATCH 2/2] drm/amd/powerplay: enable MGPU fan boost
> feature on Vega10
>
> On
I think it would be better to restrict max_pfn in general under SRIOV.
When the higher address space doesn't work for the CSA it will probably
cause problems elsewhere as well.
Christian.
Am 22.01.19 um 11:49 schrieb wentalou:
since vm_size enlarged to 0x4 GB,
sriov need to put csa below
sriov's gpu_recover inside xgpu_ai_mailbox_flr_work would cause duplicate
recover in TDR.
TDR's gpu_recover would be triggered by amdgpu_job_timedout,
that could avoid vk-cts failure by unexpected recover.
Change-Id: Ifcba4ac43a0229ae19061aad3b0ddc96957ff9c6
Signed-off-by: wentalou
---
drivers/
On 2019-01-22 7:28 p.m., sunpeng...@amd.com wrote:
> From: David Francis
>
> [Why]
> We were assuming that any commit with allow_modeset == false
> was a pageflip. This was against drm intention and only
> worked by sheer luck
>
> [How]
> A pageflip is the change from one framebuffer to another
On Tue, Jan 22, 2019 at 10:07:07PM +0100, Ard Biesheuvel wrote:
> Yes, so much was clear. And the reason this breaks on some arm64
> systems is because
> a) non-snooped PCIe TLP attributes may be ignored, and
> b) non-x86 CPUs do not snoop the caches when accessing uncached mappings.
>
> I don't t
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