Add/update function level documentation and add reference to amdgpu_irq.c
in amdgpu.rst
v2:
Added DOC comment
Added more explanations for amdgpu_hotplug_work_func
Properly formatted unused parameters
Properly formatted return values
Fixed usage of acronyms
More consistent styling
Signed-off-by: S
> "DS" == Daniel Stone writes:
DS> No need to test; it's guaranteed to fail since we require Recaptcha
DS> for login due to massive spam issues.
Which is of course grossly unethical and malicious and should never be
used by any site, under any circumstances.
If some sort of captcha is ever
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Harry
Wentland
Sent: Tuesday, June 12, 2018 1:53 PM
To: amd-gfx@lists.freedesktop.org
Cc: Wentland, Harry
Subject: [PATCH] drm/amdgpu: Add BRACKET_LAYOUT_ENUMs to ObjectID.h
DC has an upcoming change that r
Acked-by: Alex Deucher
From: amd-gfx on behalf of Shaoyun Liu
Sent: Tuesday, June 12, 2018 1:38 PM
To: amd-gfx@lists.freedesktop.org
Cc: Liu, Shaoyun
Subject: [PATCH] drm/amd/include: Update df 3.6 mask and shift definition
The register field hsas been changed
Acked-by: Alex Deucher
From: amd-gfx on behalf of Zhu, Rex
Sent: Tuesday, June 12, 2018 11:01:46 AM
To: Feng, Kenneth; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/amd/powerplay: Set higher SCLK&MCLK frequency than
dpm7 in OD
Acked-by: Rex Zhu
Be
Move all instnaces of this check into a function in amdgpu_gmc.h
Rename the original function to a more proper name.
Signed-off-by: Andrey Grodzovsky
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 11 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h | 15 +++
drivers/gpu/drm/amd/am
DC has an upcoming change that requires these to read the board layout.
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/amd/amdgpu/ObjectID.h | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/ObjectID.h
b/drivers/gpu/drm/amd/amdgpu/ObjectID.h
index 0619269
The register field hsas been changed in df 3.6, update to correct setting
Change-Id: Id625d7698b610c07081f421537964686f8f0b67c
Signed-off-by: Shaoyun Liu
---
drivers/gpu/drm/amd/include/asic_reg/df/df_3_6_sh_mask.h | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drive
On 06/12/2018 11:46 AM, James Zhu wrote:
Vega20 UVD Firmware has a new version naming convention:
[31, 30] for encode interface major
[29, 24] for encode interface minor
[15, 8] for decode interface minor
[7, 0] for hardware family id
Signed-off-by: James Zhu
Reviewed-by: Leo Li
Daniel Stone :
>
> Hi Sylvain,
>
> On 12 June 2018 at 13:38, wrote:
> > On Tue, Jun 12, 2018 at 12:34:31PM +0100, Daniel Stone wrote:
> >> GitLab has a pretty comprehensive and well-documented API which might
> >> help if you don't want to use a web browser. There are also clients
> >> like 'lab'
Vega20 UVD Firmware has a new version naming convention:
[31, 30] for encode interface major
[29, 24] for encode interface minor
[15, 8] for decode interface minor
[7, 0] for hardware family id
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 21
Daniel Stone :
>
> Hi Alexander,
>
> On 12 June 2018 at 14:53, Alexander E. Patrakov wrote:
> > Daniel Stone :
> >> > That said, I could not even create an account with a noscript/xhtml basic
> >> > browser (if you want to test that, install the famous noscript module
> >> > with an
> >> > empty
There are multiple occasions of "adev->gmc.visible_vram_size <
adev->gmc.real_vram_size" in amdgpu_cs.c.
It's basically the same check as in amdgpu_vm_is_large_bar().
I suggest to name it something like amdgpu_gmc_vram_full_visible() or
similar since the BAR actually doesn't needs to be large
Hi Michel,
Thanks for your reply.
Michel Dänzer writes:
> Not sure what kind of compatibility you mean.
I was referring to the gfx_v6 driver, which I believed was already BE
compatiple (although this may have been a misunderstanding), using a
different mechanism, which would then clash with
I didn't find that check in amdgpu_cs.c, can you clarify please ?
Andrey
On 06/12/2018 10:41 AM, Christian König wrote:
Unrelated to this patch, but we should probably move that function
into amdgpu_gmc.h.
There are a couple of more occasions of that check waiting for cleanup
in amdgpu_c
Acked-by: Rex Zhu
Best Regards
Rex
From: amd-gfx on behalf of Kenneth Feng
Sent: Tuesday, June 12, 2018 10:54 PM
To: amd-gfx@lists.freedesktop.org
Cc: Feng, Kenneth
Subject: [PATCH] drm/amd/powerplay: Set higher SCLK&MCLK frequency than dpm7 in
OD
Fix the is
On 2018-06-12 01:35 PM, Daniel Stone wrote:
> On 11 June 2018 at 11:33, Michel Dänzer wrote:
>> On 2018-06-08 08:08 PM, Adam Jackson wrote:
>>> I'd like us to start moving repos and bug tracking into gitlab.
>>> Hopefully everyone's aware that gitlab exists and why fdo projects are
>>> migrating t
On 2018-06-12 04:25 PM, Marcus Comstedt wrote:
>
> Hi.
>
> I have an RX 550 (Polaris 12) card which works fine on my Talos II
> (POWER9) in little endian mode, but not in big endian mode. So I wanted
> to try and help out to make the driver work in BE mode as well (comments
> in the driver code
Fix the issue that SCLK&MCLK can't be set higher than dpm7 when
OD is enabled in SMU7.
Change-Id: If8249795739e29a063154cffce693b3c77cca151
Signed-off-by: Kenneth Feng
---
drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/dri
Please update the subject line and add a "drm/amdgpu: " prefix.
Am 12.06.2018 um 16:05 schrieb Andrey Grodzovsky:
Add/update function level documentation and add reference to amdgpu_vm.c
in amdgpu.rst
v2:
Fix reference in rst file.
Fix compilation warnings.
Add space between function names and
Hi.
I have an RX 550 (Polaris 12) card which works fine on my Talos II
(POWER9) in little endian mode, but not in big endian mode. So I wanted
to try and help out to make the driver work in BE mode as well (comments
in the driver code seem to suggest the author did not have a BE system
to test o
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Rex Zhu
Sent: Monday, June 4, 2018 6:32:14 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH] drm/amdgpu: Get real power source to initizlize ac_power
driver need to know the real power sourc
Series is:
Reviewed-by: Alex Deucher
From: amd-gfx on behalf of Rex Zhu
Sent: Monday, June 4, 2018 6:18:03 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhu, Rex
Subject: [PATCH 1/2] drm/amd/pp: Make sure clock_voltage_limit_table on dc is
valid
if vbios not set
Add/update function level documentation and add reference to amdgpu_vm.c
in amdgpu.rst
v2:
Fix reference in rst file.
Fix compilation warnings.
Add space between function names and params list where
it's missing.
Signed-off-by: Andrey Grodzovsky
---
Documentation/gpu/amdgpu.rst | 9
Hi Alexander,
On 12 June 2018 at 14:53, Alexander E. Patrakov wrote:
> Daniel Stone :
>> > That said, I could not even create an account with a noscript/xhtml basic
>> > browser (if you want to test that, install the famous noscript module with
>> > an
>> > empty "white list" in firefox or chrom
On Tue, Jun 12, 2018 at 01:41:55PM +0100, Daniel Stone wrote:
> Hi Sylvain,
>
> On 12 June 2018 at 13:38, wrote:
> > On Tue, Jun 12, 2018 at 12:34:31PM +0100, Daniel Stone wrote:
> >> GitLab has a pretty comprehensive and well-documented API which might
> >> help if you don't want to use a web b
Hi Sylvain,
On 12 June 2018 at 13:38, wrote:
> On Tue, Jun 12, 2018 at 12:34:31PM +0100, Daniel Stone wrote:
>> GitLab has a pretty comprehensive and well-documented API which might
>> help if you don't want to use a web browser. There are also clients
>> like 'lab': https://gitlab.com/zaquestio
On Tue, Jun 12, 2018 at 12:34:31PM +0100, Daniel Stone wrote:
> Hi Sylvain,
> It looks like Mutt is mangling email addresses - I've fixed Michel's.
>
> On 11 June 2018 at 14:30, wrote:
> > On Mon, Jun 11, 2018 at 12:33:52PM +0200, Michel Dänzer wrote:
> >> Adding the amd-gfx list, in cases someb
On Tue, Jun 12, 2018 at 05:07:44PM +0800, Evan Quan wrote:
> Gfxoff is already enabled in amdgpu_device_ip_set_powergating_state.
> So, no need to enable it again in pp_late_init.
>
> Change-Id: Id33d2dac192645fc9dcdfaf5825420093a87f814
> Signed-off-by: Evan Quan
Reviewed-by: Huang Rui
> ---
>
Hi Michel,
On 11 June 2018 at 11:33, Michel Dänzer wrote:
> On 2018-06-08 08:08 PM, Adam Jackson wrote:
>> I'd like us to start moving repos and bug tracking into gitlab.
>> Hopefully everyone's aware that gitlab exists and why fdo projects are
>> migrating to it. If not, the thread about Mesa's
Hi Sylvain,
It looks like Mutt is mangling email addresses - I've fixed Michel's.
On 11 June 2018 at 14:30, wrote:
> On Mon, Jun 11, 2018 at 12:33:52PM +0200, Michel Dänzer wrote:
>> Adding the amd-gfx list, in cases somebody there has concerns or other
>> feedback.
>
> For feedback:
> I attempt
On Tue, Jun 12, 2018 at 05:07:44PM +0800, Evan Quan wrote:
> Gfxoff is already enabled in amdgpu_device_ip_set_powergating_state.
> So, no need to enable it again in pp_late_init.
>
> Change-Id: Id33d2dac192645fc9dcdfaf5825420093a87f814
> Signed-off-by: Evan Quan
Reviewed-by: Huang Rui
> ---
>
On 2018-06-11 05:33 PM, Michel Dänzer wrote:
> On 2018-06-11 05:14 PM, Andrey Grodzovsky wrote:
>> @@ -94,6 +96,15 @@ struct amdgpu_prt_cb {
>> struct dma_fence_cb cb;
>> };
>>
>> +/**
>> + * amdgpu_vm_bo_base_init - Adds bo to the list of bos associated with the
>> vm
>> + * @base: base s
> But on workstation, vbios do not support OD featur, the OD max memory
With typo "featur" fixed, Reviewed-by: Evan Quan
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Tuesday, June 12, 2018 3:09 PM
> To: amd-gfx@lists.fr
Gfxoff is already enabled in amdgpu_device_ip_set_powergating_state.
So, no need to enable it again in pp_late_init.
Change-Id: Id33d2dac192645fc9dcdfaf5825420093a87f814
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/powerplay/amd_powerplay.c | 8
1 file changed, 8 deletions(-)
diff
WARN_ON possible buffer overflow and avoid unnecessary dereference.
v2: change BUG_ON to WARN_ON
Change-Id: Id7dcf60acf524f290460d2ffe3f1f5f46354
Signed-off-by: Evan Quan
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 15 +--
1 file changed, 9 insertions(+), 6 deletions(-)
diff --
As hw required, soc clock must large than mclk, So we set max soc
clock to OD Max Memory clk.
But on workstation, vbios do not support OD featur, the OD max memory
clock is equal to 0. In this case, driver can support underclocking.
and set od max memory clock to the value in highest memory dpm lev
Vega20 UVD Firmware has a new version naming convention:
[31, 30] for encode interface major
[29, 24] for encode interface minor
[15, 8] for decode interface minor
[7, 0] for hardware family id
Signed-off-by: James Zhu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c | 15 +--
1 f
Am 12.06.2018 um 08:38 schrieb zhoucm1:
On 2018年06月12日 14:01, Junwei Zhang wrote:
Don't need validation list any more
Signed-off-by: Junwei Zhang
Reviewed-by: Chunming Zhou
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | 4 +---
1 file changed, 1 insert
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