On 26/06/17 03:12 PM, Flora Cui wrote:
> keep cu_ao_mask unchanged for backward compatibility.
>
> Change-Id: I9f497aadd309977468e246fea333b392c0150276
> Signed-off-by: Flora Cui
> ---
> This patch should be landed after the kmd patch upsteam. right?
Right. Also, include/drm/amdgpu_drm.h should
keep cu_ao_mask unchanged for backward compatibility.
Change-Id: I9f497aadd309977468e246fea333b392c0150276
Signed-off-by: Flora Cui
---
This patch should be landed after the kmd patch upsteam. right?
amdgpu/amdgpu.h | 2 ++
amdgpu/amdgpu_gpu_info.c | 1 +
include/drm/amdgpu_drm.h | 3 ++
This feature works for SRIOV enviroment. For non-SRIOV enviroment, the
trans_error function does nothing.
The error information includes error_code (16bit), error_flags(16bit)
and error_data(64bit). Since there are not many errors, we keep the
errors in an array and transfer all errors to Host bef
This feature works for SRIOV enviroment. For non-SRIOV enviroment, the
trans_error function does nothing.
The error information includes error_code (16bit), error_flags(16bit)
and error_data(64bit). Since there are not many errors, we keep the
errors in an array and transfer all errors to Host bef
> Do you not use bo list at all in mesa? radv as well?
Currently radv is creating a bo list per command submission. radv does
not use an offload thread to do command submission, as it seems pretty
un-vulkan to use a thread for the queue submission thread the game
uses.
I have considered investiga
Am 24.06.2017 um 23:50 schrieb John Brooks:
On Sat, Jun 24, 2017 at 08:20:22PM +0200, Christian König wrote:
Am 24.06.2017 um 01:16 schrieb John Brooks:
On Fri, Jun 23, 2017 at 05:02:58PM -0400, Felix Kuehling wrote:
Hi John,
I haven't read your patches. Just a question based on the cover let
Am 24.06.2017 um 20:36 schrieb John Brooks:
On Sat, Jun 24, 2017 at 08:07:15PM +0200, Christian König wrote:
Am 23.06.2017 um 19:39 schrieb John Brooks:
This patch series is intended to improve performance when limited CPU-visible
VRAM is under pressure.
Moving BOs into visible VRAM is essenti
