[PATCH 04/11] drm/amdgpu/vce4: fix a PSP loading VCE issue

From: Daniel Wang Fixed PSP loading issue for sriov. Signed-off-by: Daniel Wang Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/d

[PATCH 10/11] drm/amdgpu/uvd7: add uvd doorbell initialization for sriov

From: Frank Min Add UVD doorbell for SRIOV. Signed-off-by: Frank Min Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c i

[PATCH 06/11] drm/amdgpu/soc15: enable UVD code path for sriov

From: Frank Min Enable UVD block for SRIOV. Signed-off-by: Frank Min Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/soc15.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/soc15.c b/drivers/gpu/drm/amd/amdgpu/soc15.c index 6999ac3

[PATCH 08/11] drm/amdgpu/vce4: replaced with virt_alloc_mm_table

Used virt_alloc_mm_table function to allocate MM table memory. Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 20 +++- 1 file changed, 3 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v4_0.c b/drivers/gpu/drm/amd/amdgpu/vce_

[PATCH 07/11] drm/amdgpu/virt: add two functions for MM table

Add two functions to allocate & free MM table memory. Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 46 drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++ 2 files changed, 48 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdg

[PATCH 09/11] drm/amdgpu/uvd7: add sriov uvd initialization sequences

From: Frank Min Add UVD initialization for SRIOV. Signed-off-by: Frank Min Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c | 246 ++ 1 file changed, 246 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c b/drivers/gpu/drm/

[PATCH 05/11] drm/amdgpu/vce4: move mm table constructions functions into mmsch header file

From: Frank Min Move mm table construction functions into mmsch header file so that UVD can reuse it. Signed-off-by: Frank Min Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/mmsch_v1_0.h | 57 + drivers/gpu/drm/amd/amdgpu/vce_v4_0.c | 57

[PATCH 00/11] Enable UVD and PSP loading for SRIOV

This series will enable UVD and PSP firmware loading for SRIOV. Daniel Wang (2): drm/amdgpu/psp: skip loading SDMA/RLCG under SRIOV VF drm/amdgpu/vce4: fix a PSP loading VCE issue Frank Min (5): drm/amdgpu/vce4: move mm table constructions functions into mmsch header file drm/amdgpu/s

[PATCH 01/11] drm/amdgpu/virt: bypass cg and pg setting for SRIOV

GPU hypervisor cover all settings of CG and PG, so guest doesn't need to do anything. Bypass it. Signed-off-by: Frank Min Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c b/d

[PATCH 02/11] drm/amdgpu/virt: change the place of virt_init_setting

Change place of virt_init_setting function so that can cover the cg and pg flags configuration. Signed-off-by: Xiangliang Yu --- drivers/gpu/drm/amd/amdgpu/soc15.c | 10 +- drivers/gpu/drm/amd/amdgpu/vi.c| 10 +- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git

Re: [PATCH] drm: fourcc byteorder: brings header file comments in line with reality.

On 22/04/17 07:05 PM, Ville Syrjälä wrote: > On Fri, Apr 21, 2017 at 06:14:31PM +0200, Gerd Hoffmann wrote: >> Hi, >> My personal opinion is that formats in drm_fourcc.h should be independent of the CPU byte order and the function drm_mode_legacy_fb_format() and drivers depending

[PATCH] drm/amdgpu: extend vm flags to 64-bit in tracepoint

Signed-off-by: Junwei Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h index 8676eff..998ff4d 100644 --- a/drivers/gpu/d

Re: [PATCH] drm: fourcc byteorder: brings header file comments in line with reality.

On 23/04/17 04:24 AM, Ilia Mirkin wrote: > > fbdev also creates fb's that expect cpu endianness, as disabling the > byteswap logic caused a green fbcon terminal to show up. (So at least > something somewhere in the fbcon -> nouveau's fbdev emulation pipeline > is expecting cpu endianness. This hap

[PATCH 4/6] drm: fourcc byteorder: adapt bochs-drm to drm_mode_legacy_fb_format update

Signed-off-by: Gerd Hoffmann --- drivers/gpu/drm/bochs/bochs_mm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/bochs/bochs_mm.c b/drivers/gpu/drm/bochs/bochs_mm.c index 857755ac2d..781d35bdff 100644 --- a/drivers/gpu/drm/bochs/bochs_mm.c +++ b/drivers/gpu/dr

[PATCH 5/6] drm: fourcc byteorder: adapt virtio to drm_mode_legacy_fb_format update

Signed-off-by: Gerd Hoffmann --- drivers/gpu/drm/virtio/virtgpu_gem.c | 2 +- drivers/gpu/drm/virtio/virtgpu_plane.c | 31 --- 2 files changed, 1 insertion(+), 32 deletions(-) diff --git a/drivers/gpu/drm/virtio/virtgpu_gem.c b/drivers/gpu/drm/virtio/virtgpu_gem.c

[PATCH 0/6] drm: tackle byteorder issues, take two

Hi, Ok, different approach up for discussion. Given that userspace didn't made the transition from ADDFB to ADDFB2 yet it seems we still can muck with the fourcc codes without breaking everything, as long as we maintain ADDFB and fbdev behavior (use cpu byte order format) so nothing changes for

[PATCH 3/6] drm: fourcc byteorder: add bigendian support to drm_mode_legacy_fb_format

Return correct fourcc codes on bigendian. Drivers must be adapted to this change. Signed-off-by: Gerd Hoffmann --- drivers/gpu/drm/drm_fourcc.c | 24 1 file changed, 24 insertions(+) diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c index adb3ff5

[PATCH 6/6] drm: fourcc byteorder: virtio restrict to XRGB8888

While wading through the code I've noticed we have a little issue in virtio: We attach a format to the bo when it is created (DRM_IOCTL_MODE_CREATE_DUMB), not when we map it as framebuffer (DRM_IOCTL_MODE_ADDFB). Easy way out: support a single format only. Signed-off-by: Gerd Hoffmann --- dri

[PATCH 2/6] drm: fourcc byteorder: add DRM_FORMAT_CPU_*

Add fourcc variants in cpu byte order. With these at hand we don't need #ifdefs in drivers want support framebuffers in cpu endianess. Signed-off-by: Gerd Hoffmann --- include/drm/drm_fourcc.h | 12 1 file changed, 12 insertions(+) diff --git a/include/drm/drm_fourcc.h b/include/d

[PATCH 1/6] drm: fourcc byteorder: drop DRM_FORMAT_BIG_ENDIAN

It's unused. Suggested-by: Daniel Vetter Signed-off-by: Gerd Hoffmann --- include/uapi/drm/drm_fourcc.h | 2 -- drivers/gpu/drm/drm_fourcc.c | 3 +-- drivers/gpu/drm/drm_framebuffer.c | 2 +- 3 files changed, 2 insertions(+), 5 deletions(-) diff --git a/include/uapi/drm/drm_fourcc.h b

[PATCH] drm/amdgpu: fix trace error for amdgpu_vm_bo_unmap

Signed-off-by: Junwei Zhang --- drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_trace.h index f38e5e2..8676eff 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgp

[PATCH 0/6] *** Dedicated vmid per process v2 ***

The current kernel implementation, which grabs the idle VMID from pool when emitting the job may: The back-to-back submission from one process could use different VMID. The submission to different queues from single process could use different VMID It works well in most case but cannot

[PATCH 2/6] drm/amdgpu: add dedicated vmid field in vm struct

Change-Id: Id728e20366c8a1ae90d4e901dc80e136e2a613bb Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 17 - drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 ++ 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.

[PATCH 4/6] drm/amdgpu: add limitation for dedicated vm number v2

v2: move #define to amdgpu_vm.h Change-Id: Ie5958cf6dbdc1c8278e61d9158483472d6f5c6e3 Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu.h| 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 9 + drivers/gpu/drm/amd/

[PATCH 6/6] drm/amdgpu: bump module verion for reserved vmid

Change-Id: I1065e0430ed44f7ee6c29214b72e35a7343ea02b Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c index 55322b4..679

[PATCH 3/6] drm/amdgpu: reserve vmid by vm ioctl

Change-Id: I5f80dc39dc9d44660a96a2b710b0dbb4d3b9039d Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 56 ++ 1 file changed, 56 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c ind

[PATCH 5/6] drm/amdgpu: implement grab dedicated vmid V2

v2: move sync waiting only when flush needs Change-Id: I64da2701c9fdcf986afb90ba1492a78d5bef1b6c Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 61 ++ 1 file changed, 61 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c

[PATCH 1/6] drm/amdgpu: add vm ioctl

It will be used for reserving vmid. Change-Id: Ib7169ea999690c8e82d0dcbccdd2d97760c0270a Signed-off-by: Chunming Zhou --- drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 1 + drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 16 drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 1 + include/uapi/dr

[PATCH 1/1] drm/radeon: check return vlaue of radeon_fence_emit

From: Pan Bian Function radeon_fence_emit() returns -ENOMEM if there is no enough memory. And in this case, function radeon_ring_unlock_undo() rather than function radeon_ring_unlock_commit() should be called. However, in function radeon_test_create_and_emit_fence(), the return value of radeon_fe

[PATCH 1/1] drm/radeon: check return value of radeon_ring_lock

From: Pan Bian Function radeon_ring_lock() returns an errno on failure, and its return value should be validated. However, in functions r420_cp_errata_init() and r420_cp_errata_fini(), its return value is not checked. This patch adds the checks. Signed-off-by: Pan Bian --- drivers/gpu/drm/rade

Port of amdgpu watermark improvements to radeon-kms.

Hi, a direct port of the patches we already have in amdgpu, for completeness. These are tested on an old HD-5770, DCE4 only. -mario ___ amd-gfx mailing list amd-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/amd-gfx

[PATCH 1/2] drm/radeon: Avoid overflows/divide-by-zero in latency_watermark calculations.

At dot clocks > approx. 250 Mhz, some of these calcs will overflow and cause miscalculation of latency watermarks, and for some overflows also divide-by-zero driver crash. Make calcs more overflow resistant. This is a direct port of the corresponding patch from amdgpu-kms, copy-paste for cik from

[PATCH 2/2] drm/radeon: Make display watermark calculations more accurate

Avoid big roundoff errors in scanline/hactive durations for high pixel clocks, especially for >= 500 Mhz, and thereby program more accurate display fifo watermarks. This is a port of the corresponding amdgpu patch. Implemented for DCE 4,6,8. Tested on Evergreen/DCE-4 with Radeon HD-5770. Signed-

[PATCH 1/2] drm/amdgpu: Add missing lb_vblank_lead_lines setup to DCE-6 path.

This apparently got lost when implementing the new DCE-6 support and would cause failures in pageflip scheduling and timestamping. Signed-off-by: Mario Kleiner Cc: Alex Deucher Cc: sta...@vger.kernel.org --- drivers/gpu/drm/amd/amdgpu/dce_v6_0.c | 7 ++- 1 file changed, 6 insertions(+), 1 d