Hi Monk, a comment below.
Den 9 jan. 2017 9:07 fm skrev "Monk Liu" :
Change-Id: I110af93c4f17ab18d1be199c6ebe9ee965483a66
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
> +};
> +
> +struct amdgpu_vm_virt {
> + /* each VM will map on CSA */
> + struct ttm_validate_buffer csa_tv;
> + struct amdgpu_bo_va *csa_bo_va;
Please put that directly into the amdgpu_vm structure.
[ML] they are not a tiny used by bare-metal case so I don't think they should
be
> + /* virtual MC address of CSA & GDS for each VM */
> + uint64_t vm_csa_addr;
> + uint64_t vm_gds_addr;
That should be constant, shouldn't it?
[ML] do you mean "const uint64_t vm_csa_addr" ? of cause not if that's your
point ... compiling error on that
and strictly speaking that
why you want to drop that "adev->virt.map_csa()" calling ? without that
calling you don't have CSA's initialized bo_va and mappings as well, and
without bo_va and mappings how you can make "amdgpu_vm_bo_update()" invoke work
?
Monk
发件人: Christian König
发送时间
Reviewed-by: Edward O'Callaghan
On 01/10/2017 09:35 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> These aren't needed, and aren't really used in too many places.
>
> Signed-off-by: Dave Airlie
> ---
> drivers/gpu/drm/amd/display/dc/core/dc.c| 2 +-
> drivers/gpu/drm/amd/display/dc/d
Reviewed-by: Edward O'Callaghan
On 01/10/2017 10:33 AM, Dave Airlie wrote:
> From: Dave Airlie
>
> DAL has defines for things, and it doesn't even use them itself.
>
> Signed-off-by: Dave Airlie
> ---
> drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 18 --
> .../gpu/drm
From: Dave Airlie
DAL has defines for things, and it doesn't even use them itself.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/amd/display/dc/core/dc_resource.c | 18 --
.../gpu/drm/amd/display/include/set_mode_types.h | 22 +-
2 files changed, 9 inser
From: Dave Airlie
These aren't needed, and aren't really used in too many places.
Signed-off-by: Dave Airlie
---
drivers/gpu/drm/amd/display/dc/core/dc.c| 2 +-
drivers/gpu/drm/amd/display/dc/dce/dce_clocks.c | 4 ++--
drivers/gpu/drm/amd/display/dc/os_types.h | 2 --
3 files cha
Added missing defines to the kernel tree in order to make future header
syncs easier.
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx
Add the missing definition of RADEON_TILING_R600_NO_SCANOUT.
This define currently exists in the libdrm radeon_drm.h, but missing
from from the kernel radeon_drm.h. This makes the header update process
inconvenient.
To solve the problem, add the define on the kernel side.
RADEON_TILING_R600_NO_S
Generated using make headers_install from:
airlied/drm-next 3806a27 Merge tag 'drm-misc-next-2016-12-30' ...
+
drm/radeon: define RADEON_TILING_R600_NO_SCANOUT
By adding RADEON_TILING_R600_NO_SCANOUT to the kernel tree we no longer
need to maintain this define on radeon_drm.h manually.
v2: Add RA
On 2017-01-09 01:00 PM, Deucher, Alexander wrote:
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
Of Andres Rodriguez
Sent: Monday, January 09, 2017 12:01 PM
To: Emil Velikov
Cc: amd-gfx mailing list
Subject: Re: [PATCH 1/3] headers: Sync {amdgpu,
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Andres Rodriguez
> Sent: Monday, January 09, 2017 12:01 PM
> To: Emil Velikov
> Cc: amd-gfx mailing list
> Subject: Re: [PATCH 1/3] headers: Sync {amdgpu,radeon}_drm.h with the
> kernel
>
>
>-Original Message-
>From: Emil Velikov [mailto:emil.l.veli...@gmail.com]
>Sent: Monday, January 09, 2017 10:51 PM
>To: Koenig, Christian
>Cc: Nath, Arindam; amd-gfx mailing list
>Subject: Re: [PATCH v2] amdgpu: sync amdgpu_drm.h with the kernel
>
>On 9 January 2017 at 16:44, Christian Köni
I suspect the patch I NAK'ed on 4.9 "worked but with odd clocks" because it
never engaged PG properly. I'm finding on 4.9 and 4.7 if PG is enabled VCE
doesn't wake properly.
I've found a "good commit" on 4.7 so I'll continue bisecting.
Tom
From: amd-gfx on
On 9 January 2017 at 16:44, Christian König wrote:
> Am 09.01.2017 um 17:39 schrieb Emil Velikov:
>>
>> On 9 January 2017 at 11:18, Arindam Nath wrote:
>>
>>> v2:
>>> * Generated using make headers_install.
>>> * Generated from linux-stable/master commit
>>>a121103c922847ba5010819a3f250f1f7fc
On 2017-01-09 11:28 AM, Emil Velikov wrote:
On 5 January 2017 at 00:29, Andres Rodriguez wrote:
This patch is for reference only, as the corresponding kernel change is
still under review.
Obviously one would sync this in a similar fashion to 1/3 but as-is
this is pretty good.
Signed-off-b
On 2017-01-09 11:23 AM, Emil Velikov wrote:
Thank you Andres. There's a small nit below.
On 5 January 2017 at 00:29, Andres Rodriguez wrote:
Generated using make headers_install from:
airlied/drm-next 2cf026a Merge branch 'linux-4.10' ...
Manually re-added missing RADEON_TILING_R600_NO_SCAN
Just a heads up there is a CG/PG regression. On the tip of 4.7 I can encode
with cg/pg disabled but with it enabled it locks up.
I'll try to bisect.
Tom
From: amd-gfx on behalf of Deucher,
Alexander
Sent: Monday, January 9, 2017 09:34
To: Zhu, Rex; amd-gf
Am 09.01.2017 um 17:39 schrieb Emil Velikov:
On 9 January 2017 at 11:18, Arindam Nath wrote:
v2:
* Generated using make headers_install.
* Generated from linux-stable/master commit
a121103c922847ba5010819a3f250f1f7fc84ab8
The above is either wrong or you've done manual changes. Both of wh
On 9 January 2017 at 11:18, Arindam Nath wrote:
> v2:
> * Generated using make headers_install.
> * Generated from linux-stable/master commit
> a121103c922847ba5010819a3f250f1f7fc84ab8
>
The above is either wrong or you've done manual changes. Both of which
are _not_ cool.
Please be more caref
On 5 January 2017 at 00:29, Andres Rodriguez wrote:
> This patch is for reference only, as the corresponding kernel change is
> still under review.
>
Obviously one would sync this in a similar fashion to 1/3 but as-is
this is pretty good.
> Signed-off-by: Andres Rodriguez
> ---
> include/drm/am
Thank you Andres. There's a small nit below.
On 5 January 2017 at 00:29, Andres Rodriguez wrote:
> Generated using make headers_install from:
> airlied/drm-next 2cf026a Merge branch 'linux-4.10' ...
>
> Manually re-added missing RADEON_TILING_R600_NO_SCANOUT as documented on
> README
>
"Thou Shal
Am 09.01.2017 um 17:04 schrieb Huang Rui:
Signed-off-by: Huang Rui
For this one and the VCE equivalent are Reviewed-by: Christian König
.
Regards,
Christian.
---
Changes from V4 -> V5:
- remove pm mutex from set clock gating function
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
Signed-off-by: Huang Rui
---
Changes from V4 -> V5:
- Remove pm mutex from set clock gating function.
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 40 +++
2 files changed, 37 insertions(+), 4 deletions(-)
diff --git a
Signed-off-by: Huang Rui
---
Changes from V4 -> V5:
- remove pm mutex from set clock gating function
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 33 +++--
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 33 +++
Yes, holding pm.mutex will prevent PP/DPM from entering/leaving PG states and
is used as a means to probe power/clock related signals reliably (except for
VCE clock signals which aren't part of an AON tile).
You just can't take it from a "set" state function since the higher up API will
take i
Am 09.01.2017 um 15:46 schrieb Huang Rui:
On Mon, Jan 09, 2017 at 07:29:00PM +0800, StDenis, Tom wrote:
Yup it's held by both amdgpu_dpm_enable_uvd() and amdgpu_dpm_enable_vce()
Tom
diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/
amdgpu/uvd_v5_0.c
index 03a35d9.
On Mon, Jan 09, 2017 at 07:29:00PM +0800, StDenis, Tom wrote:
> Yup it's held by both amdgpu_dpm_enable_uvd() and amdgpu_dpm_enable_vce()
>
> Tom
>
> > diff --git a/drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c b/drivers/gpu/drm/amd/
> amdgpu/uvd_v5_0.c
> > index 03a35d9..e647d3e 100644
> > --- a/driv
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Monday, January 09, 2017 8:35 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH] drm/amdgpu: refine vce3.0 initialize.
>
> 1. disable vce cg when vce hw
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Zhu, Rex
> Sent: Monday, January 09, 2017 2:46 AM
> To: Andy Furniss; Alex Deucher
> Cc: amd-gfx list
> Subject: RE: [PATCH 4/4] drm/amd/powerplay: add profiling mode in dpm
> level
>
> Thank
> -Original Message-
> From: Huang Rui [mailto:ray.hu...@amd.com]
> Sent: Sunday, January 08, 2017 10:00 PM
> To: Deucher, Alexander; amd-gfx@lists.freedesktop.org; Koenig, Christian;
> StDenis, Tom
> Cc: Zhu, Rex; Mao, David; Fu, Ping; Zhang, Hawking; Kuehling, Felix; Huang,
> Ray; William
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Monday, January 09, 2017 1:52 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 2/4] drm/amd/powerplay: add new smu message.
>
> Change-Id: I17f02555fbc7
On my Carrizo, I have to NAK since monitoring the clocks I see GFX and VCE
pegged high on a setup with a staging kernel .
Doing a test signal encode I see 1000 fences/sec being handled and GFX_POWER
throttles (not idle or full) . I don't see VCE load from SRBM_STATUS2 though
...
Something i
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Rex Zhu
> Sent: Monday, January 09, 2017 1:52 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Zhu, Rex
> Subject: [PATCH 1/4] drm/amd/powerplay: Configuring DIDT blocks only SQ
> enabled on Polar
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Xiangliang Yu
> Sent: Monday, January 09, 2017 12:06 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Yu, Xiangliang
> Subject: [V2 2/2] drm/amdgpu: remove detect_hw_virtualization interface
>
>
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Andres Rodriguez
> Sent: Saturday, January 07, 2017 6:31 PM
> To: Yurii Kolesnykov; amd-gfx@lists.freedesktop.org
> Subject: Re: Is there any public git repo with DAL?
>
> You can check out A
1. disable vce cg when vce hw initialize.
2. initizlize vce clock to 10KHz.
3: no need to set bypass clock to vce.
Change-Id: I18d5c2debc6688be201af8bb85022ac25020bd8f
Signed-off-by: Rex Zhu
---
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 18 +++---
drivers/gpu/drm/amd/amdgpu/vi.c
Am 09.01.2017 um 04:00 schrieb Huang Rui:
Signed-off-by: Huang Rui
---
Changes from V3 -> V4:
- use pm mutex to protect UVD clock gating status
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c | 37 +--
drivers/gpu/drm/
Yup it's held by both amdgpu_dpm_enable_uvd() and amdgpu_dpm_enable_vce()
Tom
From: Koenig, Christian
Sent: Monday, January 9, 2017 05:32
To: Huang, Ray; Deucher, Alexander; amd-gfx@lists.freedesktop.org; StDenis, Tom
Cc: Zhu, Rex; Mao, David; Fu, Ping; Zhang, H
v1:
* User might want to query the maximum number of UVD
instances supported by firmware. In addition to that,
if there are multiple applications using UVD handles
at the same time, he might also want to query the
currently used number of handles.
For this we add a new query AMDGPU_INFO_
Am 09.01.2017 um 09:03 schrieb Monk Liu:
and update CSA bo_va in each submit
Change-Id: I5ed73e1b7f89743d90298bc814a42a91e166be3b
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 11 +++
2 files changed,
Am 09.01.2017 um 09:03 schrieb Monk Liu:
Change-Id: Ib59c9e7f37a10ef1d6335d400ab41fe3cc9e2fb6
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 8
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++
drivers/gpu/drm/amd/amdgpu/vi.c | 3 +++
3 files changed
Am 09.01.2017 um 09:02 schrieb Monk Liu:
Change-Id: I76ddeb3212c96d87a2d15a608ae8c0771e2d94ed
Signed-off-by: Monk Liu
As discussed before that approach won't work.
Just add the call I suggest to amdgpu_bo_vm_update_pte() in amdgpu_cs.c.
Christian.
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vi
Am 09.01.2017 um 09:02 schrieb Monk Liu:
for SRIOV usage, CSA is only used per device and each
VM will map on it.
Change-Id: I0736b6e51329d643343e26968a47a81c3a27035f
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 23 ++-
1 file changed, 22 inserti
Am 09.01.2017 um 09:02 schrieb Monk Liu:
Change-Id: I7e21c52e5b0c7ef39a706a3191293f3d7b5a7e08
Signed-off-by: Monk Liu
Just adding the file without any functionality doesn't make much sense,
please squash into the other commits.
Christian.
---
drivers/gpu/drm/amd/amdgpu/Makefile |
Am 09.01.2017 um 09:02 schrieb Monk Liu:
Change-Id: Ife0eff7b13b8b5946f005a39f6ecb8db1cb72c38
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 19 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 ++
2 files changed, 21 insertions(+)
diff --git a/drive
Zhu, Rex wrote:
Thanks for quick response.
The patch doesn't apply directly to drm-next-4.10-wip, here's what I tested -
Sorry, it is because code base has been changed in my local.
Please review the attached patch.
The patch applies OK and produces an identical diff to the one I tested.
Thanks for quick response.
>>>The patch doesn't apply directly to drm-next-4.10-wip, here's what I tested -
Sorry, it is because code base has been changed in my local.
Please review the attached patch.
Best Regards
Rex
-Original Message-
From: Andy Furniss [mailto:adf.li...@gmail.com
Hi, that change does fix it for me.
The patch doesn't apply directly to drm-next-4.10-wip, here's what I
tested -
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 0345fbb..ac2e5f4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
+++ b/driv
and update CSA bo_va in each submit
Change-Id: I5ed73e1b7f89743d90298bc814a42a91e166be3b
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 14 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 11 +++
2 files changed, 25 insertions(+)
diff --git a/drivers/gpu/dr
Change-Id: Ib59c9e7f37a10ef1d6335d400ab41fe3cc9e2fb6
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 8
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++
drivers/gpu/drm/amd/amdgpu/vi.c | 3 +++
3 files changed, 13 insertions(+)
diff --git a/drivers/gpu/dr
for SRIOV usage, CSA is only used per device and each
VM will map on it.
Change-Id: I0736b6e51329d643343e26968a47a81c3a27035f
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/drivers/g
Change-Id: I76ddeb3212c96d87a2d15a608ae8c0771e2d94ed
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 90
1 file changed, 90 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
inde
Change-Id: I110af93c4f17ab18d1be199c6ebe9ee965483a66
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index f82919d..5253aa2 10
per device CSA is needed by world switch preemption for SRIOV virtualization
we create CSA per device, and map it on each VM in vm_init, and update CSA BO
bo_va in each submission.
*** BLURB HERE ***
Monk Liu (7):
drm/amdgpu:add new file for SRIOV
drm/amdgpu:new field members for SRIOV
drm/
Change-Id: I7e21c52e5b0c7ef39a706a3191293f3d7b5a7e08
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/Makefile | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 23 +++
2 files changed, 24 insertions(+), 1 deletion(-)
create mode 100644 drivers/gpu/drm/amd/amdgpu
Change-Id: Ife0eff7b13b8b5946f005a39f6ecb8db1cb72c38
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 19 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h | 2 ++
2 files changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
b/drivers
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