On Mon, Aug 29, 2016 at 9:21 PM, jimqu wrote:
> unhalt F32`s Instrction Fetch Unit after all rings are inited.
>
> Change-Id: Ib27e4e02e7e2782a9ab528f5358dce5ff2501e17
> Signed-off-by: JimQu
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 12 +---
> 1 file ch
On Mon, Aug 29, 2016 at 9:21 PM, jimqu wrote:
> SDMA could be fail in the thaw() and restore() processes, do software reset
> if each SDMA engine is busy.
>
> Change-Id: Iaff231330c256fbd297f2a98edb2d956bd0d78f8
> Signed-off-by: JimQu
Reviewed-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdg
On Tue, Aug 30, 2016 at 09:57:56AM +0900, Michel Dänzer wrote:
> On 29/08/16 10:47 PM, Deucher, Alexander wrote:
> >> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> >> Of Christian König
> >> Sent: Monday, August 29, 2016 5:20 AM
> >
> > I still think this should be renam
unhalt F32`s Instrction Fetch Unit after all rings are inited.
Change-Id: Ib27e4e02e7e2782a9ab528f5358dce5ff2501e17
Signed-off-by: JimQu
---
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.
These series patches are used for fixing S4 issue on CI
jimqu (3):
drm/amd/amdgpu: VCE ring test fail during S4 on CI
drm/amd/amdgpu: sdma resume fail during S4 on CI
drm/amd/amdgpu: compute ring test fail during S4 on CI
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 7 ++-
drivers/gpu/dr
SDMA could be fail in the thaw() and restore() processes, do software reset
if each SDMA engine is busy.
Change-Id: Iaff231330c256fbd297f2a98edb2d956bd0d78f8
Signed-off-by: JimQu
---
drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/
Set up the VCE clock no matter dpm is enabled or not.
Change-Id: I68e315f8b62c6e3a8636bc5e14036ecc11d980b4
Signed-off-by: JimQu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
b/drivers
On 29/08/16 10:47 PM, Deucher, Alexander wrote:
>> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
>> Of Christian König
>> Sent: Monday, August 29, 2016 5:20 AM
>
> I still think this should be renamed AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS
> or the anti-flag AMDGPU_GEM_CREATE_V
This requires an assumption that there is no partial overlap between the
the mm_nodes in the old and new memory. As long as BOs are always split
into fixed size portions that should work OK for copying between linear
and split BOs. But it can fail if you copy between split BOs that are
split in dif
I looked really hard and couldn't find anything obviously broken. It
makes me a bit nervous that there is no bounds checking on the nodes
array, though.
Just one minor nit pick.
With that fixed, Reviewed-by: Felix Kuehling
On 16-08-29 05:20 AM, Christian König wrote:
> From: Christian König
>
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Tom St Denis
> Sent: Monday, August 29, 2016 9:06 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: StDenis, Tom
> Subject: [PATCH] drm/amd/amdgpu: debugfs SMC addresses are byte
> addresses
>
> S
Am 29.08.2016 um 15:06 schrieb Tom St Denis:
Signed-off-by: Tom St Denis
Reviewed-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/a
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Monday, August 29, 2016 5:20 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 1/5] drm/amdgpu: add
> AMDGPU_GEM_CREATE_VRAM_LINEAR flag v2
I still think this s
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Monday, August 29, 2016 4:25 AM
> To: Liu, Monk; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 2/4] drm/amdgpu:new method to sync ce&de
>
> Hui what?
>
> It fee
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Monday, August 29, 2016 3:56 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH v3 xf86-video-amdgpu] Only list each unique chipset family
> once in the log file
>
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Monday, August 29, 2016 3:53 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH v2 xf86-video-amdgpu] Only list each unique chipset family
> once in the log file
>
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Monday, August 29, 2016 3:46 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH xf86-video-amdgpu] Only list each unique chipset family
> once in the log file
>
>
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Monday, August 29, 2016 3:15 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH xf86-video-amdgpu] Add missing Kaveri PCI ID (1318)
>
> From: Michel Dänzer
>
> F
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Monday, August 29, 2016 2:58 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH xf86-video-amdgpu] Add Mullins PCI IDs
>
> From: Michel Dänzer
>
> Bugzilla: http
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Monk Liu
> Sent: Sunday, August 28, 2016 10:56 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, Monk
> Subject: [PATCH 2/4] drm/amdgpu:new method to sync ce&de
>
> CE & DE can have most up t
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 1b31a7c1d217..288cfb4fa2ba 100644
--- a/drivers/gpu/drm
On 08/29/2016 07:20 PM, Christian König wrote:
> From: Christian König
>
> Add a flag noting that a BO must be created using linear VRAM
> and set this flag on all in kernel users where appropriate.
>
> Hopefully I haven't missed anything.
>
> v2: add it in a few more places, fix CPU mapping.
On 08/29/2016 07:20 PM, Christian König wrote:
> From: Christian König
>
> Split VRAM won't have a valid offset, so just set an explicit limit
> when the flag is given to trigger reallocation if necessary.
>
> Signed-off-by: Christian König
Reviewed-by: Edward O'Callaghan
> ---
> drivers/g
Hi,
I hope the following nitpicks are helpful.
Kind Regards,
Edward.
On 08/29/2016 07:20 PM, Christian König wrote:
> From: Christian König
>
> Split VRAM allocations into 4MB blocks.
>
> Signed-off-by: Christian König
> ---
> drivers/gpu/drm/amd/amdgpu/Makefile | 3 +-
> drivers
From: Christian König
Split VRAM allocations into 4MB blocks.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/Makefile | 3 +-
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +
drivers/gpu/drm/amd/amdgpu/amdgpu_
From: Christian König
Add a flag noting that a BO must be created using linear VRAM
and set this flag on all in kernel users where appropriate.
Hopefully I haven't missed anything.
v2: add it in a few more places, fix CPU mapping.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu
From: Christian König
This allows us to move scattered buffers around.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 96 ++---
1 file changed, 64 insertions(+), 32 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
b/d
This is still not working 100% reliable, but I thought that maybe some more
eyes on it could help find the remaining bug(s).
Valley under memory pressure (limit VRAM to only 256MB) easily shows the
problem. You get texture corruptions and lockups after a while.
Any idea what is still wrong here?
From: Christian König
Split VRAM won't have a valid offset, so just set an explicit limit
when the flag is given to trigger reallocation if necessary.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
d
From: Christian König
This allows us to map scattered VRAM BOs to the VMs.
Signed-off-by: Christian König
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 79 +++---
1 file changed, 44 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
Patch #1-#3 are Reviewed-by: Christian König .
For patch #4 I still need to take a closer look, but it look good in
general as well.
Regards,
Christian.
Am 29.08.2016 um 10:55 schrieb Monk Liu:
rebase patches on latest staging04.6
Monk Liu (4):
drm/amdgpu:add switch buffer to end of CS (
use CONTEXT_CONTROL package to dynamically skip
preamble IB and other load_xxx command in sequence.
Change-Id: I4b87ca84ea8c11ba4f7fb4c0e8a5be537ccde851
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 12
dr
sync switch buffer scheme with windows kmd for gfx v8,
step2:
Insert 128NOP after&before VM flush to prevent CE vm fault.
Change-Id: Ibec954ce4c817ad7d3bce89c2bcb95b6c6bb5411
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 24 ++--
1 file changed, 6 insert
job->ctx actually is a fence_context of the entity
it belongs to, naming it as ctx is too vague, and
we'll need add amdgpu_ctx into the job structure
later.
Change-Id: I71e73912e26372639ea44a18d9e36d58d936f19a
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
drivers/g
sync switch buffer scheme with windows kmd for gfx v8,
step1: append a switch_buffer to the end of CS
v2:rebase on latest staging
Change-Id: Ief8539b2ad91ccb38b9adbfb54e27d8282f3a3bd
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.
rebase patches on latest staging04.6
Monk Liu (4):
drm/amdgpu:add switch buffer to end of CS (v2)
drm/amdgpu:new method to sync ce&de
drm/amdgpu:change job->ctx field name
drm/amdgpu:implement CONTEXT_CONTROL
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 13 ++-
drivers/gpu/drm/amd/amdgp
Well a perfect example of why we shouldn't take a look at what userspace
does, but rather what the hardware can do when we design the IOCTLs.
I'm trying to raise awareness for this for quite a while now, but a lot
of people seem to think when the UMD doesn't do something the kernel
doesn't nee
But speaking with practice attitude: at least close source UMD OCL doesn't use
CE at all, and I guess MESA either ...
BR Monk
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Monday, August 29, 2016 4:25 PM
To: Liu, Monk ; amd-gfx@lists.freedesktop.org
Sub
Hui what?
It feels like a hundred times I asked if the compute engine has a CE as
well, but so far the answer was always No. That would explain a whole
bunch of problems we had with the compute rings as well.
In this case the patch is good as it is, please just rebase it.
Christian.
Am 29.0
Am 29.08.2016 um 09:55 schrieb Michel Dänzer:
From: Michel Dänzer
Signed-off-by: Michel Dänzer
Yes, please the output was a bit annoying.
Since I'm normally not working on the DDX the patch is only Acked-by:
Christian König .
Regards,
Christian.
---
v3: Simplify slightly by just setti
Oh, sorry for the trouble,
I resent the patch serials, the previous one have wrong comment and lack of
patch3 , although patch 3 is already reviewed-by (rename job->ctx)
BR Monk
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of
Christian K?nig
No, compute ring also can leverage constant engines, that's depend on OCL umd
behavior
I just make sure KMD do nothing wrong
BR Monk
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Monday, August 29, 2016 4:06 PM
To: Liu, Monk ; amd-gfx@lists.freedesktop
Am 29.08.2016 um 04:55 schrieb Monk Liu:
use CONTEXT_CONTROL package to dynamically skip
preamble IB and other load_xxx command in sequence.
Change-Id: I4b87ca84ea8c11ba4f7fb4c0e8a5be537ccde851
Signed-off-by: Monk Liu
Again, please rebase on top of amd-staging-4.6. Apart from that I need
to
Am 29.08.2016 um 04:55 schrieb Monk Liu:
CE & DE can have most up to 128dw as the gap between them
so to sync CE nad DE we don't need double SWITCH_BUFFERs any
more, which is urgly and harm performance, we only need
insert 128NOP after VM flush to prevent CE vm fault.
Change-Id: Ibec954ce4c817ad
Am 29.08.2016 um 04:55 schrieb Monk Liu:
sync switch buffer scheme with windows kmd for gfx v8,
Now always and only insert one switch buffer to the
end of CS.
Change-Id: Ief8539b2ad91ccb38b9adbfb54e27d8282f3a3bd
Signed-off-by: Monk Liu
This patch doesn't seem to apply on any of the public bra
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
v3: Simplify slightly by just setting all hash values to 1.
src/amdgpu_chipset_gen.h | 21 +
src/amdgpu_probe.c | 2 +-
src/pcidb/parse_pci_ids.pl | 7 +++
3 files changed, 29 insertions(+), 1 deletion(-)
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
v2: Don't bother making up PCI IDs for the AMDGPUUniqueChipsets array,
they're not used anyway.
src/amdgpu_chipset_gen.h | 21 +
src/amdgpu_probe.c | 2 +-
src/pcidb/parse_pci_ids.pl | 9 +
3 file
From: Michel Dänzer
Signed-off-by: Michel Dänzer
---
src/amdgpu_chipset_gen.h | 21 +
src/amdgpu_probe.c | 2 +-
src/pcidb/parse_pci_ids.pl | 9 +
3 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/src/amdgpu_chipset_gen.h b/src/amdgpu_chipset
From: Michel Dänzer
Found by comparing src/pcidb/ati_pciids.csv with xf86-video-ati.
Signed-off-by: Michel Dänzer
---
src/amdgpu_chipinfo_gen.h | 1 +
src/amdgpu_chipset_gen.h | 1 +
src/amdgpu_pci_chipset_gen.h | 1 +
src/amdgpu_pci_device_match_gen.h | 1 +
src/ati_pcii
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