> problem found. patch appled. if a ehci controller is 64-bit capable,
> one must turn off 64-bit capabilities on all controllers before initializing
> any of them.
Well done, Erik! Keep the posts coming, even if no one provides any
feedback; your efforts are appreciated, even if I speak only
> So, if you had a temptation to to give a try to a native Inferno OS for
> experiments, it is now a simple way with cheap and easy-to-get raspberry pi.
Fabulous!
++L
> I am happy to announce the beta release of Inferno OS port to Raspberry Pi.
excellent.
- erik
Hi Plan9/Inferno folks!
I am happy to announce the beta release of Inferno OS port to Raspberry Pi.
Finally it is the state when wm/wm can be executed.
There are some important points reached for this stage:
1. Mouse driver
2. Working wm/wm
3. Default memory split 240/16
4. A lot of small fixes an
On Fri May 2 11:28:41 EDT 2014, quans...@quanstro.net wrote:
> it appears that uhci is causing spurious ehci interrupts, or at least
> ehci/uhci are causing each other to ring. i haven't tracked down
> the fundamental issue yet. but this appears to be related to the
> ehci/uhci subordinate issue
it appears that uhci is causing spurious ehci interrupts, or at least
ehci/uhci are causing each other to ring. i haven't tracked down
the fundamental issue yet. but this appears to be related to the
ehci/uhci subordinate issue, and the Callmine setting.
hacking details for the interested:
when
http://comments.gmane.org/gmane.os.plan9.general/71902
-Steve
Hello all,
I have a Rasclock sitting on my Raspberry Pi. According to spec it
uses the pins 3.3V, GND SDA and SCL.
The Rasclock itself consists basically of a PCF2127AT chip.
My question: What is the best way to access these I/O pins?
My goal would be to write some sort of driver for this devi
