Re: [USRP-users] [UHD] Announcing 3.14.0.0 Release Candidate 1

2019-02-11 Thread Robert via USRP-users
Hi Nate,

I'm using the integrated GPU from the Intel CPU. Here is the output:

/sys/kernel/iommu_groups/
├── 0
│   ├── devices
│   │   └── :00:00.0 -> ../../../../devices/pci:00/:00:00.0
│   └── reserved_regions
├── 1
│   ├── devices
│   │   ├── :00:01.0 -> ../../../../devices/pci:00/:00:01.0
│   │   ├── :01:00.0 -> 
../../../../devices/pci:00/:00:01.0/:01:00.0
│   │   └── :01:00.1 -> 
../../../../devices/pci:00/:00:01.0/:01:00.1
│   └── reserved_regions
├── 10
│   ├── devices
│   │   └── :00:1d.0 -> ../../../../devices/pci:00/:00:1d.0
│   └── reserved_regions
├── 11
│   ├── devices
│   │   ├── :00:1f.0 -> ../../../../devices/pci:00/:00:1f.0
│   │   ├── :00:1f.2 -> ../../../../devices/pci:00/:00:1f.2
│   │   ├── :00:1f.3 -> ../../../../devices/pci:00/:00:1f.3
│   │   └── :00:1f.4 -> ../../../../devices/pci:00/:00:1f.4
│   └── reserved_regions
├── 12
│   ├── devices
│   │   └── :00:1f.6 -> ../../../../devices/pci:00/:00:1f.6
│   └── reserved_regions
├── 13
│   ├── devices
│   │   └── :04:00.0 -> 
../../../../devices/pci:00/:00:1c.2/:04:00.0
│   └── reserved_regions
├── 14
│   ├── devices
│   │   └── :3e:00.0 -> 
../../../../devices/pci:00/:00:1d.0/:3e:00.0
│   └── reserved_regions
├── 2
│   ├── devices
│   │   └── :00:02.0 -> ../../../../devices/pci:00/:00:02.0
│   └── reserved_regions
├── 3
│   ├── devices
│   │   ├── :00:14.0 -> ../../../../devices/pci:00/:00:14.0
│   │   └── :00:14.2 -> ../../../../devices/pci:00/:00:14.2
│   └── reserved_regions
├── 4
│   ├── devices
│   │   └── :00:16.0 -> ../../../../devices/pci:00/:00:16.0
│   └── reserved_regions
├── 5
│   ├── devices
│   │   └── :00:17.0 -> ../../../../devices/pci:00/:00:17.0
│   └── reserved_regions
├── 6
│   ├── devices
│   │   └── :00:1b.0 -> ../../../../devices/pci:00/:00:1b.0
│   └── reserved_regions
├── 7
│   ├── devices
│   │   └── :00:1c.0 -> ../../../../devices/pci:00/:00:1c.0
│   └── reserved_regions
├── 8
│   ├── devices
│   │   └── :00:1c.2 -> ../../../../devices/pci:00/:00:1c.2
│   └── reserved_regions
└── 9
├── devices
│   └── :00:1c.4 -> ../../../../devices/pci:00/:00:1c.4
└── reserved_regions

51 directories, 15 files


Robert


Von: Nate Temple [nate.tem...@ettus.com]
Gesendet: Freitag, 8. Februar 2019 18:26
An: Pöhlmann, Robert
Cc: Nick Foster; Michael West; USRP-users@lists.ettus.com
Betreff: Re: [USRP-users] [UHD] Announcing 3.14.0.0 Release Candidate 1

Hi Robert,

Can you send the output of:

tree /sys/kernel/iommu_groups/

Do you have an external GPU installed on your system?

Regards,
Nate Temple



On Fri, Feb 8, 2019 at 9:13 AM 
mailto:robert.poehlm...@dlr.de>> wrote:
Hi Nate,

thanks for the quick reply. I changed the dpdk-driver and copied the config 
file to /root/.uhd/uhd.conf. MAC addresses are correct. Started benchmark_rate 
as root this time, without using sudo. Still get the same error.

Robert

From: Nate Temple [mailto:nate.tem...@ettus.com]
Sent: Friday, February 08, 2019 5:58 PM
To: Pöhlmann, Robert
Cc: Nick Foster; Michael West; 
USRP-users@lists.ettus.com
Subject: Re: [USRP-users] [UHD] Announcing 3.14.0.0 Release Candidate 1

Hi Robert,

Can you try adding the NIC configuration to /root/.uhd/uhd.conf instead of 
/etc/uhd/uhd.conf ? You'll need to run your UHD applications as root as well.

You will also need to change the line:

dpdk-driver=/usr/local/lib/dpdk-pmds/

to be:

dpdk-driver=/usr/lib/x86_64-linux-gnu/

You'll also need to update the MAC addresses for your NICs.


With the config setup, you'll see the NICs come up like this when running a UHD 
application:

...
PMD: ixgbe_dev_link_status_print():  Port 0: Link Down
EAL: Port 0 MAC: xx xx xx xx xx xx
EAL: Port 0 UP: 1
PMD: ixgbe_dev_link_status_print():  Port 1: Link Down
EAL: Port 1 MAC: xx xx xx xx xx xx
EAL: Port 1 UP: 1
EAL: Init DONE!
EAL: Starting I/O threads!
USER2: Thread 1 started
[00:00:00.03] Creating the usrp device with:
...

We'll be updating the DPDK docs to reflect a few of these changes before the 
final 3.14 release.

Regards,
Nate Temple

On Fri, Feb 8, 2019 at 6:40 AM Robert via USRP-users 
mailto:usrp-users@lists.ettus.com>> wrote:
I found this wiki page on DPDK: https://files.ettus.com/manual/page_dpdk.html

Tried to follow the described steps on Xubuntu 18.04 with UHD v3.14.0.0-rc1 
(also updated SD and FPGA image) and Intel X520DA, but no success so far.


-  IOMMU is enabled for NIC, checked with short bash script:
#!/bin/bash
shopt -s nullglob
for d in /sys/kernel/iommu_groups/*/devices/*; do
n=${d#*/iommu_groups/*}; n=${n%%/*}
printf 'IOMMU Group %s ' "$n"
lspci -nns "${d##*/}"
done;

shows:

IOMMU Group 0 00:00.0 Host bridge 

Re: [USRP-users] Phase Synchronization of two usrp b210's

2019-02-11 Thread Aravind Dhulipalla via USRP-users
Hi Marcus,

Yes, I am following the link and using an external 10MHz and 1pps reference
signals. The way I am trying to synchronize is to have two usrp's transmit
different sine waves one with constant phase and the other with a varying
phase from 0 to 360degrees. I am calculating the sum of amplitudes of the
received signals and the phase at which the amplitude sum is maximum will
be the phase offset. By following this approach I am getting a phase offset
between 0 to 3 degrees. But when I issue the next stream command with sine
wave of calculated phase offset I am seeing a huge phase difference between
them anywhere between 0 to 180 degrees for each run. I am not sure if my
approach is a correct one.

Thanks
Aravind.

On Sun, Feb 10, 2019 at 12:59 AM Marcus Müller 
wrote:

> Hi Aravind,
>
> first of all, have you seen
> http://files.ettus.com/manual/page_sync.html ?
>
> You'll find in the last paragraph that after each tuning, your phase
> relationship between different B210s will be random, but constant for
> the run (aside from minor PLL drift).
>
> So, you need to tune, and then calibrate; how that can be done depends
> on the system you're building.
>
> Best regards,
> Marcus
>
> On Fri, 2019-02-08 at 17:03 -0800, Aravind Dhulipalla via USRP-users
> wrote:
> > Hi,
> >
> > Has anyone achieved phase synchronizing between two usrp b210's using
> > external reference and pps? If yes I would appreciate any help that I
> > can get.
> >
> > Thanks
> > Aravind.
> >
> > The contents of this transmission are Ethertronics Inc. Confidential
> > and may contain proprietary or legally privileged information which
> > may not be disclosed, copied or distributed without the express
> > written consent of Ethertronics Inc. The information is intended to
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> >
> >
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Re: [USRP-users] Phase Synchronization of two usrp b210's

2019-02-11 Thread Marcus D. Leech via USRP-users

On 02/11/2019 06:34 PM, Aravind Dhulipalla via USRP-users wrote:

Hi Marcus,

Yes, I am following the link and using an external 10MHz and 1pps 
reference signals. The way I am trying to synchronize is to have two 
usrp's transmit different sine waves one with constant phase and the 
other with a varying phase from 0 to 360degrees. I am calculating the 
sum of amplitudes of the received signals and the phase at which the 
amplitude sum is maximum will be the phase offset. By following this 
approach I am getting a phase offset between 0 to 3 degrees. But when 
I issue the next stream command with sine wave of calculated phase 
offset I am seeing a huge phase difference between them anywhere 
between 0 to 180 degrees for each run. I am not sure if my approach is 
a correct one.


Thanks
Aravind.

I cannot quite parse what you're doing.

Are you saying the *mutual phase* offset changes between runs, or that 
the phase measured *between runs* changes?


I would totally expect some phase-offset unpredictability between two 
B210s.  They aren't designed to have a predictable phase in that sense, 
because
  of the way the synthesizers work.  They have no phase-resynch, and 
since a fractional-N PLL synthesizer "naturally" doesn't lock at any 
particular phase-angle relative to the reference, no two PLL 
synthesizers, even if seeing EXACTLY THE SAME REFERENCE FREQUENCY, can 
be guaranteed to have a predictable-and-low phase-offset after tuning, 
even if tuned at "exactly" the same time.





On Sun, Feb 10, 2019 at 12:59 AM Marcus Müller 
mailto:marcus.muel...@ettus.com>> wrote:


Hi Aravind,

first of all, have you seen
http://files.ettus.com/manual/page_sync.html ?

You'll find in the last paragraph that after each tuning, your phase
relationship between different B210s will be random, but constant for
the run (aside from minor PLL drift).

So, you need to tune, and then calibrate; how that can be done depends
on the system you're building.

Best regards,
Marcus

On Fri, 2019-02-08 at 17:03 -0800, Aravind Dhulipalla via USRP-users
wrote:
> Hi,
>
> Has anyone achieved phase synchronizing between two usrp b210's
using
> external reference and pps? If yes I would appreciate any help
that I
> can get.
>
> Thanks
> Aravind.
>
> The contents of this transmission are Ethertronics Inc. Confidential
> and may contain proprietary or legally privileged information which
> may not be disclosed, copied or distributed without the express
> written consent of Ethertronics Inc. The information is intended to
> be for the use of the individual or entity named on this
> transmission. If you are not the intended recipient, be aware that
> any disclosure, copying, distribution or use of the contents of this
> information is prohibited. If you have received this transmission in
> error, please notify us by telephone immediately so that we can
> arrange for the retrieval of the original documents at no cost to
> you. Alternatively, notify the sender by replying to this
> transmission and delete the message without disclosing it. Thank
you
>
>
>
> AVX_BSID: 99762491J
> ___
> USRP-users mailing list
> USRP-users@lists.ettus.com 
> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com


The contents of this transmission are Ethertronics Inc. Confidential 
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may not be disclosed, copied or distributed without the express 
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