[USRP-users] problems with recording of baseband complex GPS samples
Hi, I'm pretty much new to USRP. For a research project we are trying to record baseband in-phase and quadrature GPS samples with USRP device, here's our experimental set up: - Motherboard: USRP N210 - Daughterboard: WBX (40 MHz) - active GPS antenna Ublox ANN-MS powered through biasT (providing around 27 dB gain) - flowchart to receive and save samples on file via GNU Radio - GPS SDR in the host computer to process the data and get position information Here's the configuration of the GNU Radio: USRP Source: - output type = complex int16 - wire format = complex int8 - clock rate = default - clock and time source = default - samp rate = 10 MHz - center freq = 157542 Hz - gain value = 31.5 dB - antenna= RX2 - ch bandwidth = 0 Hz File Sink - input type = short - vec length =2 We operate minutes long acquisitions in clear sky conditions (rooftop of the building). At the moment we are able to record a signal, and process it up to the acquisition stage of the SDR (satellites ID in view are correctly extracted). The problem is we are not able to track the code and extract the navigational message except for few seconds along the acquisition (not enough for a fix). I point out that the SDR processing part should be ok since we tested it against several example signals. By looking more closely at the real (or imaginary) part of the acquired raw signal we expected it to be a representation of noise with values spanning through the range allowed using signed int16. But, in reality, samples seem to acquire just one among five values (symmetrically around 0). Any idea why? Furthermore we are now using the USRP internal oscillator, I heard that it may be lacking the needed frequency accuracy for this application, do we really need an external oscillator with much higher frequency stability? Thanks in advance. Fabrizio -- The information contained in this e-mail is intended only for the individual or entity to whom it is addressed. Its contents (including any attachments) are confidential and privileged: if you are not an intended recipient you must not use, disclose, disseminate, copy or print its contents. If you have received this email by mistake please notify us by emailing the sender, and then delete and/or destroy the e-mail and any copies from your system -- ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] B205mini: 0-value Samples When Switching Center Frequency
So, I wrote the following script for testing this morning: http://www.ccera.ca/files/tuning_test.grc It does random frequency hopping with 1MHz offsets, with a base frequency of 2.4GHz. It runs for 60 seconds and then just dumps complex I/Q data to a file. I then wrote a quick C program to do run-length analysis, and indeed, there are long runs of exact zeros after a tuning event, averaging about 4.2ms with the above parameters. I made no attempt to use any of the fancy-tuning options available via a "tune_request_t". What I do know is that the AD9361 isn't ideal for frequency-hopping applications. A lot of "stuff" needs to happen every time it is tuned. My recollection is that tune times used to be in the range of 50-100msec for this part, but that an optimization was put in place to reduce this for "short hops". On 2017-10-27 01:23, Marcus D. Leech via USRP-users wrote: > On 10/27/2017 12:44 AM, Gilad Beeri (ApolloShield) wrote: > >> Thanks Marcus. >> >> I was told by Ettus in the past that nearby hops (X00's of MHz) should take >> some tens of microseconds to settle (for the AD936x chip), while I see 3 >> milliseconds. >> Can you reconfirm the former saying, or confirm that you also experience ~3 >> milliseconds of 0's when you change frequency with a delta of tens of MHz? >> >> In addition, I would expect that during the settling time, I will get >> garbage data / noise, and not 0 samples. Do you know the reason I get 0's? > My *guess* is that this is the AD9361 doing a "mute during tuning" thing. I > don't know whether that's a feature that can be disabled, and whether at > some point in the code history, it was enabled. A cursory inspection of the > code doesn't reveal anything obvious. > > When you experience your zero-valued samples, is it a sharp cutoff, or is > there a ramp into, and out-of the zero-valued-samples state? > > Are you using manual or automatic gain control? > > On Thu, Oct 26, 2017 at 5:27 PM Marcus D. Leech via USRP-users > wrote: > > On 10/26/2017 06:43 AM, Gilad Beeri (ApolloShield) via USRP-users wrote: > Hi, > Whenever I switch center frequency with a USRP B205mini (changing to a nearby > frequency), I get 3 milliseconds of 0 samples. > > * What's the reason behind that? > * Can I make some changes that will reduce that timespan without data? > > The analog hardware takes a finite amount of time to switch frequencies. > During that time, there will inevitably be *some* type of glitch. > > A PLL synthesizer will take some amount of time to change frequency. Every > time you change frequency, you take it out of its converged state, and > it has to re-converge. > > https://electronics.stackexchange.com/questions/76197/pll-loop-bandwidth-lock-time-and-jitter > > ___ > USRP-users mailing list > USRP-users@lists.ettus.com > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
[USRP-users] time/phase synchronization of 2 X300
Hi, is it possible to phase synchronize 2 X300 as follows: - X300#1: equipped with GPSDO. Generate Ref and PPS signal for the X300#2 via PPS out and Ref out connectors. - X300#2: take PPS and Ref Signal from X300#1 (daisy chain) Target daughterboard is TwinRx. Phase offset will be corrected by my application. If possibile to use this scheme, should exist any degradation with respect a configuration with the octoclock ? If it is necessary to provide to both the X300 the same singlas (pps, ref) should be possible to replace the octoclock with 2 way splitters ? Thanks in advance, Luca ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
Re: [USRP-users] time/phase synchronization of 2 X300
On 10/27/2017 06:22 PM, Luca Pascale via USRP-users wrote: Hi, is it possible to phase synchronize 2 X300 as follows: - X300#1: equipped with GPSDO. Generate Ref and PPS signal for the X300#2 via PPS out and Ref out connectors. - X300#2: take PPS and Ref Signal from X300#1 (daisy chain) Target daughterboard is TwinRx. Phase offset will be corrected by my application. If possibile to use this scheme, should exist any degradation with respect a configuration with the octoclock ? If it is necessary to provide to both the X300 the same singlas (pps, ref) should be possible to replace the octoclock with 2 way splitters ? Thanks in advance, Luca There has never been really-good support for REF OUT and 1PPS out on the X3xx series. Partially because making it "work right" with the hardware that is in there is more-or-less impossible (length compensation, etc). ___ USRP-users mailing list USRP-users@lists.ettus.com http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
