Re: [U-Boot] [PATCH] fsl_i2c: Add write-then-read transaction interface for I2C slave
-Original Message-
From: Sun York-R58495
Sent: Saturday, March 08, 2014 3:10 AM
To: Leekha Shaveta-B20052; u-boot@lists.denx.de
Cc: Aggrwal Poonam-B10812; Aggrwal Poonam-B10812
Subject: Re: [PATCH] fsl_i2c: Add write-then-read transaction interface for I2C
slave
On 03/03/2014 12:58 AM, Shaveta Leekha wrote:
> Most of the I2C slaves support accesses in the typical style
> viz.read/write series of bytes at particular address offset.
> These transactions are currently supportd in the i2c driver using
> i2c_read and i2c_write APIs. I2C EEPROMs, RTC, etc fall in this
> category.
> The transactions look like:"
> START:Address:Tx:Offset:RESTART:Address[0..4]:Tx/Rx:data[0..n]:STOP"
>
> However there are certain devices which support accesses in terms of
> the transactions as follows:
> "START:Address:Tx:Txdata[0..n1]:Clock_stretching:
> RESTART:Address:Rx:data[0..n2]"
>
> The Txdata is typically a command and some associated data, similarly
> Rxdata could be command status plus some data received as a response
> to the command sent.
> i2c_write_read() function provides support for such transactions
> (multiple bytes write followed by read)
>
> Signed-off-by: Poonam Aggrwal
> Signed-off-by: Shaveta Leekha
> ---
> drivers/i2c/fsl_i2c.c | 64 ++-
> drivers/i2c/i2c_core.c |7 +
> include/i2c.h | 19 ++---
> 3 files changed, 78 insertions(+), 12 deletions(-)
> diff --git a/include/i2c.h b/include/i2c.h index 1b4078e..7bac20a
> 100644
> --- a/include/i2c.h
> +++ b/include/i2c.h
> @@ -65,6 +65,9 @@ struct i2c_adapter {
> int (*write)(struct i2c_adapter *adap, uint8_t chip,
> uint addr, int alen, uint8_t *buffer,
> int len);
> + int (*write_read)(struct i2c_adapter *adap, uint8_t chip,
> + uint8_t *wbuffer, int wlength, uint8_t *rbuffer,
> + int rlength);
> uint(*set_bus_speed)(struct i2c_adapter *adap,
> uint speed);
> int speed;
> @@ -75,13 +78,14 @@ struct i2c_adapter {
> char*name;
> };
>
> -#define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
> +#define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write,
> +_write_read, \
> _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
> { \
> .init = _init, \
> .probe = _probe, \
> .read = _read, \
> .write = _write, \
> + .write_read = _write_read, \
> .set_bus_speed = _set_speed, \
> .speed = _speed, \
> .slaveaddr = _slaveaddr, \
> @@ -90,10 +94,11 @@ struct i2c_adapter {
> .name = #_name \
> };
>
> -#define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
> - _set_speed, _speed, _slaveaddr, _hwadapnr) \
> - ll_entry_declare(struct i2c_adapter, _name, i2c) = \
> - U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
> +#define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write,
> \
> + _write_read, _set_speed, _speed, _slaveaddr,\
> + _hwadapnr) \
> + ll_entry_declare(struct i2c_adapter, _name, i2c) = \
> + U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write,
> +_write_read, \
>_set_speed, _speed, _slaveaddr, _hwadapnr, _name);
>
> struct i2c_adapter *i2c_get_adapter(int index); @@ -237,6 +242,8 @@
> int i2c_read(uint8_t chip, unsigned int addr, int alen,
>
> int i2c_write(uint8_t chip, unsigned int addr, int alen,
> uint8_t *buffer, int len);
> +int i2c_write_read(uint8_t chip, uchar *wbuffer, int wlen, uchar *rbuffer,
> + int rlen);
>
> /*
> * Utility routines to read/write registers.
> @@ -302,6 +309,8 @@ int i2c_probe(uchar chip);
> */
> int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int
> len); int i2c_write(uchar chip, uint addr, int alen, uchar *buffer,
> int len);
> +int i2c_write_read(uchar chip, uchar *wbuffer, int wlen, uchar *rbuffer,
> + int rlen);
You need to be careful when changing the header file. If you compile other
platforms, you will see the error. Try ./MAKEALL -a powerpc. I don't know how
bad you broke other architectures.
[Leekha Shaveta-B20052] Agree. This may break i2c driver code for other
architectures.
For one of the I2C device for B4 platform, the read/write transaction cycle is
little different from
Other conventional I2C devices like EEPROM, PCA etc
Re: [U-Boot] [PATCH] powerpc/mpc85xx: Enabling CPC conditionally based on hwconfig options
Hi York, This change was required to provide the flexibility of enabling DDRC1/CPC1 by SC3900/DSP core as DDRC1 is used by Starcore. SC enables CPC1 as per their requirement. PPC core use DDRC2, so it enables DDRC2/CPC2. Do you suggest mentioning it in the commit message also? Thanks and Regards, Shaveta -Original Message- From: Sun York-R58495 Sent: Wednesday, August 06, 2014 11:04 PM To: Leekha Shaveta-B20052; u-boot@lists.denx.de Cc: Wood Scott-B07421; Singh Sandeep-B37400 Subject: Re: [PATCH] powerpc/mpc85xx: Enabling CPC conditionally based on hwconfig options On 07/01/2014 11:14 PM, Shaveta Leekha wrote: > If hwconfig does not contains "en_cpc" then by default all cpcs are > enabled If this config is defined then only those individual cpcs > which are defined in the subargument of "en_cpc" will be enabled e.g > en_cpc:cpc1,cpc2; (this will enable cpc1 and cpc2) or en_cpc:cpc2; > (this enables just cpc2) > What's the user's case for enabling selected CPC? York ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] powerpc/mpc85xx: Add DSP side awareness for Freescale Heterogeneous SoCs
nctions Declaration
+
+- include/e500.h
+
+Global structure updated for dsp cores and other components
+
+2. CONFIGs ADDED
+
+
+CONFIG_HETROGENOUS_CLUSTERS- Define for checking the presence of
+ DSP/SC3900 core clusters
+
+CONFIG_SYS_FSL_NUM_CC_PLLS - Define for number of PLLs
+
+Though there are only 4 PLLs in B4, but in sequence of PLLs from PLL1 -
+PLL5, PLL3 is Reserved(as mentioned in RM), so this define contains the
+value as 5 not 4, to iterate over all PLLs while coding
+
+CONFIG_SYS_MAPLE - Define for MAPLE Baseband Accelerator
+CONFIG_SYS_CPRI- Define for CPRI Interface
+CONFIG_PPC_CLUSTER_START - Start index of ppc clusters
+CONFIG_DSP_CLUSTER_START - Start index of dsp clusters
+
+Following are the defines for PLL's index that provide the Clocking to
+CPRI, ULB and ETVE components
+
+CONFIG_SYS_CPRI_CLK- Define PLL index for CPRI clock
+CONFIG_SYS_ULB_CLK - Define PLL index for ULB clock
+CONFIG_SYS_ETVPE_CLK - Define PLL index for ETVPE clock
+
+3. Changes in MPC85xx_SYS_INFO Global structure
+===
+
+DSP cores and other device's components have been added in this structure.
+
+freq_processor_dsp[CONFIG_MAX_DSP_CPUS]- Array to contain the DSP
core's frequencies
+freq_cpri - To store CPRI frequency
+freq_maple - To store MAPLE frequency
+freq_maple_ulb - To store MAPLE-ULB frequency
+freq_maple_etvpe - To store MAPLE-eTVPE frequency
+
+4. U-BOOT LOGS
+==
+4.1 B4860QDS board
+Boot from NOR flash
+
+U-Boot 2014.07-00222-g70587a8-dirty (Aug 07 2014 - 13:15:47)
+
+CPU0: B4860E, Version: 2.0, (0x86880020)
+Core: e6500, Version: 2.0, (0x80400020) Clock Configuration:
+ CPU0:1600 MHz, CPU1:1600 MHz, CPU2:1600 MHz, CPU3:1600 MHz,
+ DSP CPU0:1200 MHz, DSP CPU1:1200 MHz, DSP CPU2:1200 MHz, DSP CPU3:1200
MHz,
+ DSP CPU4:1200 MHz, DSP CPU5:1200 MHz,
+ CCB:666.667 MHz,
+ DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous), IFC:166.667
MHz
+ CPRI:600 MHz
+ MAPLE:600 MHz, MAPLE-ULB:800 MHz, MAPLE-eTVPE:1000 MHz
+ FMAN1: 666.667 MHz
+ QMAN: 333.333 MHz
+
+CPUn- PowerPC core
+DSP CPUn - SC3900 core
+
+Shaveta Leekha(shav...@freescale.com)
+Created August 7, 2014
+===
diff --git a/include/common.h b/include/common.h index 4b3e0d3..1c2f2f7 100644
--- a/include/common.h
+++ b/include/common.h
@@ -533,7 +533,9 @@ static inline int cpumask_next(int cpu, unsigned int mask)
iter++, cpu = cpumask_next(cpu, mask)) \
intcpu_numcores (void);
+intcpu_num_dspcores(void);
u32cpu_mask (void);
+u32cpu_dsp_mask(void);
intis_core_valid (unsigned int);
intprobecpu (void);
intcheckcpu (void);
diff --git a/include/e500.h b/include/e500.h index 5884a22..255f46b 100644
--- a/include/e500.h
+++ b/include/e500.h
@@ -11,6 +11,9 @@
typedef struct
{
unsigned long freq_processor[CONFIG_MAX_CPUS];
+#ifdef CONFIG_HETROGENOUS_CLUSTERS
+ unsigned long freq_processor_dsp[CONFIG_MAX_DSP_CPUS];
+#endif
unsigned long freq_systembus;
unsigned long freq_ddrbus;
unsigned long freq_localbus;
@@ -24,6 +27,14 @@ typedef struct
#ifdef CONFIG_SYS_DPAA_PME
unsigned long freq_pme;
#endif
+#ifdef CONFIG_SYS_CPRI
+ unsigned long freq_cpri;
+#endif
+#ifdef CONFIG_SYS_MAPLE
+ unsigned long freq_maple;
+ unsigned long freq_maple_ulb;
+ unsigned long freq_maple_etvpe;
+#endif
#ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
unsigned char diff_sysclk;
#endif
--
1.7.6.GIT
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