Re: [PATCH u-boot v2019.04-aspeed-openbmc] ARM: dts: aspeed: Add Ampere's BMC platform (AST2600)
Dear maintainers,
Just a gentle ping on the patch.
I’m eagerly awaiting your response. Please share with me your comments
if you need to update anything.
Best Regards,
Chanh Nguyen
On 10/12/2023 11:25, Chanh Nguyen wrote:
Add the initial version of the device tree for the Ampere BMC
platform, which is equipped with the Aspeed AST2600 BMC SoC.
Signed-off-by: Chanh Nguyen
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/ast2600-ampere.dts | 113
2 files changed, 114 insertions(+)
create mode 100644 arch/arm/dts/ast2600-ampere.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 37675a3277..3642d59c89 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -691,6 +691,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
ast2600-greatlakes.dtb \
ast2600-intel.dtb \
ast2600-ncsi.dtb \
+ ast2600-ampere.dtb \
ast2600-p10bmc.dtb \
ast2600-pfr.dtb \
ast2600-qcom-dc-scm-v1.dtb \
diff --git a/arch/arm/dts/ast2600-ampere.dts b/arch/arm/dts/ast2600-ampere.dts
new file mode 100644
index 00..63088703a7
--- /dev/null
+++ b/arch/arm/dts/ast2600-ampere.dts
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2022, Ampere Computing LLC
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+ model = "AST2600 Ampere BMC";
+ compatible = "aspeed,ast2600-ampere", "aspeed,ast2600";
+
+ memory {
+ device_type = "memory";
+ reg = <0x8000 0x4000>;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ };
+
+ aliases {
+ spi0 = &fmc;
+ ethernet0 = &mac0;
+ };
+
+ cpus {
+ cpu@0 {
+ clock-frequency = <8>;
+ };
+ cpu@1 {
+ clock-frequency = <8>;
+ };
+ };
+};
+
+&uart5 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&sdrammc {
+ clock-frequency = <4>;
+};
+
+&wdt1 {
+ status = "okay";
+};
+
+&wdt2 {
+ status = "okay";
+};
+
+&wdt3 {
+ status = "okay";
+};
+
+&mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio1_default>;
+
+};
+
+&mac0 {
+ status = "okay";
+ phy-mode = "rgmii-rxid";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii1_default>;
+};
+
+&fmc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fmcquad_default>;
+
+ flash@0 {
+ status = "okay";
+ spi-max-frequency = <5000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+
+ flash@1 {
+ status = "okay";
+ spi-max-frequency = <5000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&scu {
+ mac0-clk-delay = <0x10 0x0a
+ 0x10 0x10
+ 0x10 0x10>;
+};
+
+&hace {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&acry {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c14 {
+ status = "okay";
+};
Re: [PATCH u-boot v2019.04-aspeed-openbmc] ARM: dts: aspeed: Add Ampere's BMC platform (AST2600)
Dear all,
I'm looking forward to seeing your feedback on my patch. Please share
your comments with me!
Thank you very much,
Chanh Ng
On 04/01/2024 11:19, Chanh Nguyen wrote:
Dear maintainers,
Just a gentle ping on the patch.
I’m eagerly awaiting your response. Please share with me your comments
if you need to update anything.
Best Regards,
Chanh Nguyen
On 10/12/2023 11:25, Chanh Nguyen wrote:
Add the initial version of the device tree for the Ampere BMC
platform, which is equipped with the Aspeed AST2600 BMC SoC.
Signed-off-by: Chanh Nguyen
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/ast2600-ampere.dts | 113
2 files changed, 114 insertions(+)
create mode 100644 arch/arm/dts/ast2600-ampere.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 37675a3277..3642d59c89 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -691,6 +691,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
ast2600-greatlakes.dtb \
ast2600-intel.dtb \
ast2600-ncsi.dtb \
+ ast2600-ampere.dtb \
ast2600-p10bmc.dtb \
ast2600-pfr.dtb \
ast2600-qcom-dc-scm-v1.dtb \
diff --git a/arch/arm/dts/ast2600-ampere.dts
b/arch/arm/dts/ast2600-ampere.dts
new file mode 100644
index 00..63088703a7
--- /dev/null
+++ b/arch/arm/dts/ast2600-ampere.dts
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2022, Ampere Computing LLC
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+ model = "AST2600 Ampere BMC";
+ compatible = "aspeed,ast2600-ampere", "aspeed,ast2600";
+
+ memory {
+ device_type = "memory";
+ reg = <0x8000 0x4000>;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ };
+
+ aliases {
+ spi0 = &fmc;
+ ethernet0 = &mac0;
+ };
+
+ cpus {
+ cpu@0 {
+ clock-frequency = <8>;
+ };
+ cpu@1 {
+ clock-frequency = <8>;
+ };
+ };
+};
+
+&uart5 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&sdrammc {
+ clock-frequency = <4>;
+};
+
+&wdt1 {
+ status = "okay";
+};
+
+&wdt2 {
+ status = "okay";
+};
+
+&wdt3 {
+ status = "okay";
+};
+
+&mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio1_default>;
+
+};
+
+&mac0 {
+ status = "okay";
+ phy-mode = "rgmii-rxid";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii1_default>;
+};
+
+&fmc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fmcquad_default>;
+
+ flash@0 {
+ status = "okay";
+ spi-max-frequency = <5000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+
+ flash@1 {
+ status = "okay";
+ spi-max-frequency = <5000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&scu {
+ mac0-clk-delay = <0x10 0x0a
+ 0x10 0x10
+ 0x10 0x10>;
+};
+
+&hace {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&acry {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c14 {
+ status = "okay";
+};
[PATCH u-boot v2019.04-aspeed-openbmc] ARM: dts: aspeed: Add Ampere's BMC platform (AST2600)
Add the initial version of the device tree for the Ampere BMC
platform, which is equipped with the Aspeed AST2600 BMC SoC.
Signed-off-by: Chanh Nguyen
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/ast2600-ampere.dts | 113
2 files changed, 114 insertions(+)
create mode 100644 arch/arm/dts/ast2600-ampere.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 37675a3277..3642d59c89 100755
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -691,6 +691,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
ast2600-greatlakes.dtb \
ast2600-intel.dtb \
ast2600-ncsi.dtb \
+ ast2600-ampere.dtb \
ast2600-p10bmc.dtb \
ast2600-pfr.dtb \
ast2600-qcom-dc-scm-v1.dtb \
diff --git a/arch/arm/dts/ast2600-ampere.dts b/arch/arm/dts/ast2600-ampere.dts
new file mode 100644
index 00..63088703a7
--- /dev/null
+++ b/arch/arm/dts/ast2600-ampere.dts
@@ -0,0 +1,113 @@
+// SPDX-License-Identifier: GPL-2.0+
+// Copyright (c) 2022, Ampere Computing LLC
+/dts-v1/;
+
+#include "ast2600-u-boot.dtsi"
+
+/ {
+ model = "AST2600 Ampere BMC";
+ compatible = "aspeed,ast2600-ampere", "aspeed,ast2600";
+
+ memory {
+ device_type = "memory";
+ reg = <0x8000 0x4000>;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ };
+
+ aliases {
+ spi0 = &fmc;
+ ethernet0 = &mac0;
+ };
+
+ cpus {
+ cpu@0 {
+ clock-frequency = <8>;
+ };
+ cpu@1 {
+ clock-frequency = <8>;
+ };
+ };
+};
+
+&uart5 {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&sdrammc {
+ clock-frequency = <4>;
+};
+
+&wdt1 {
+ status = "okay";
+};
+
+&wdt2 {
+ status = "okay";
+};
+
+&wdt3 {
+ status = "okay";
+};
+
+&mdio {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_mdio1_default>;
+
+};
+
+&mac0 {
+ status = "okay";
+ phy-mode = "rgmii-rxid";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii1_default>;
+};
+
+&fmc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_fmcquad_default>;
+
+ flash@0 {
+ status = "okay";
+ spi-max-frequency = <5000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+
+ flash@1 {
+ status = "okay";
+ spi-max-frequency = <5000>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&scu {
+ mac0-clk-delay = <0x10 0x0a
+ 0x10 0x10
+ 0x10 0x10>;
+};
+
+&hace {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&acry {
+ u-boot,dm-pre-reloc;
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c14 {
+ status = "okay";
+};
--
2.17.1
Re: [PATCH u-boot v2019.04-aspeed-openbmc] ARM: dts: aspeed: Add Ampere's BMC platform (AST2600)
On 25/03/2024 12:32, Andrew Jeffery wrote: Hi Chanh, On Tue, 2024-03-19 at 14:21 +0700, Chanh Nguyen wrote: Add the initial version of the device tree for the Ampere BMC platform, which is equipped with the Aspeed AST2600 BMC SoC. Signed-off-by: Chanh Nguyen --- arch/arm/dts/Makefile | 1 + arch/arm/dts/ast2600-ampere.dts | 113 2 files changed, 114 insertions(+) create mode 100644 arch/arm/dts/ast2600-ampere.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 37675a3277..3642d59c89 100755 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -691,6 +691,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ ast2600-greatlakes.dtb \ ast2600-intel.dtb \ ast2600-ncsi.dtb \ + ast2600-ampere.dtb \ ast2600-p10bmc.dtb \ ast2600-pfr.dtb \ ast2600-qcom-dc-scm-v1.dtb \ Given this hunk and the tags in the `[PATCH]` prefix of the mail subject you've based this change on OpenBMC's fork of u-boot, which is heavily (out of date, and) inspired by Aspeed's SDK tree. I've applied this to OpenBMC's fork for now. Thank Andrew! I saw my patch on the OpenBMC's fork. However, you've sent this to the upstream list. You will need to rework your patch on top of mainline u-boot if you want it accepted there, and follow all the usual documentation on how to submit patches to the u- boot project (e.g. you should not be including `u-boot v2019.04-aspeed- openbmc` in the patch subject prefix in upstream submissions). Andrew Sorry all! It is my mistake. I just want to send this to OpenBMC's fork, but I used the upstream mail list.
