Re: [PATCH] patch: SPI NOR: versal_net_virt: Enabling gigadevice parts

[Michal Simek]

On 12/11/22 04:16, Victor Lim wrote:

CAUTION: This message has originated from an External Source. Please use proper 
judgment and caution when opening attachments, clicking links, or responding to 
this email.


Enabling gigadevice parts in the config file.

Signed-off-by: Victor Lim 
---
  configs/xilinx_versal_net_virt_defconfig | 1 +
  1 file changed, 1 insertion(+)

diff --git a/configs/xilinx_versal_net_virt_defconfig 
b/configs/xilinx_versal_net_virt_defconfig
index 6339b17d20..86e18807c3 100644
--- a/configs/xilinx_versal_net_virt_defconfig
+++ b/configs/xilinx_versal_net_virt_defconfig
@@ -119,5 +119,6 @@ CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
  CONFIG_USB_GADGET_VENDOR_NUM=0x03FD
  CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
  CONFIG_USB_GADGET_DOWNLOAD=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
  CONFIG_USB_FUNCTION_THOR=y
  CONFIG_OF_LIBFDT_OVERLAY=y
--
2.25.1



Please send it as series with all issues I reported fixed.

M

Re: [PATCH] SPI NOR: versal_virt: enabling gigadevice part #s

[Michal Simek]

On 12/11/22 04:07, Victor Lim wrote:

CAUTION: This message has originated from an External Source. Please use proper 
judgment and caution when opening attachments, clicking links, or responding to 
this email.


Enabling gigadevice part # in this config file

Signed-off-by: Victor Lim 
---
  configs/xilinx_versal_virt_defconfig | 1 +
  1 file changed, 1 insertion(+)

diff --git a/configs/xilinx_versal_virt_defconfig 
b/configs/xilinx_versal_virt_defconfig
index 49cf7c30a8..732806559e 100644
--- a/configs/xilinx_versal_virt_defconfig
+++ b/configs/xilinx_versal_virt_defconfig
@@ -134,3 +134,4 @@ CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
  CONFIG_USB_GADGET_DOWNLOAD=y
  CONFIG_USB_FUNCTION_THOR=y
  CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
--
2.25.1



The same issues as with other your patches. Please send it in series and fix all 
issues.


M

Re: [PATCH] patch V2: SPI: NOR: ZynqMp: enabling gigadevice part #

[Michal Simek]

On 12/10/22 05:01, Victor Lim wrote:


Enabling Gigadevice in the config file

Signed-off-by: Victor Lim 
---
  configs/xilinx_zynqmp_mini_qspi_defconfig | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig 
b/configs/xilinx_zynqmp_mini_qspi_defconfig
index 75014117f1..5e81dc193a 100644
--- a/configs/xilinx_zynqmp_mini_qspi_defconfig
+++ b/configs/xilinx_zynqmp_mini_qspi_defconfig
@@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
  CONFIG_SPI_FLASH_SPANSION=y
  CONFIG_SPI_FLASH_STMICRO=y
  CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
  # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
  # CONFIG_POWER is not set
  CONFIG_ARM_DCC=y
@@ -78,4 +79,4 @@ CONFIG_ZYNQMP_GQSPI=y
  CONFIG_PANIC_HANG=y
  # CONFIG_GZIP is not set
  # CONFIG_LMB is not set
-CONFIG_SPI_FLASH_GIGADEVICE=y
+
--
2.25.1



Please look at other patches and look at docs how to contribute this probject.

Thanks,
Michal

[PATCH] common: spl: ram: fix return code

[Nikita Shubin]

From: Nikita Shubin 

Instead of always retuning success, return actual result of
load_simple_fit_image or spl_parse_image_header, otherwise we
might end up jumping on uninitialized spl_image->entry_point.

Signed-off-by: Nikita Shubin 
---
 common/spl/spl_ram.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index d64710878c..56c7598c4b 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -42,12 +42,13 @@ static int spl_ram_load_image(struct spl_image_info 
*spl_image,
  struct spl_boot_device *bootdev)
 {
struct image_header *header;
+   int ret;
 
header = (struct image_header *)CONFIG_SPL_LOAD_FIT_ADDRESS;
 
if (CONFIG_IS_ENABLED(IMAGE_PRE_LOAD)) {
unsigned long addr = (unsigned long)header;
-   int ret = image_pre_load(addr);
+   ret = image_pre_load(addr);
 
if (ret)
return ret;
@@ -68,7 +69,7 @@ static int spl_ram_load_image(struct spl_image_info 
*spl_image,
debug("Found FIT\n");
load.bl_len = 1;
load.read = spl_ram_load_read;
-   spl_load_simple_fit(spl_image, &load, 0, header);
+   ret = spl_load_simple_fit(spl_image, &load, 0, header);
} else {
ulong u_boot_pos = spl_get_image_pos();
 
@@ -89,10 +90,10 @@ static int spl_ram_load_image(struct spl_image_info 
*spl_image,
}
header = (struct image_header *)map_sysmem(u_boot_pos, 0);
 
-   spl_parse_image_header(spl_image, bootdev, header);
+   ret = spl_parse_image_header(spl_image, bootdev, header);
}
 
-   return 0;
+   return ret;
 }
 #if CONFIG_IS_ENABLED(RAM_DEVICE)
 SPL_LOAD_IMAGE_METHOD("RAM", 0, BOOT_DEVICE_RAM, spl_ram_load_image);
-- 
2.37.4

Re: [PATCH] common: spl: ram: fix return code

[Stefan Roese]

On 12/12/22 09:03, Nikita Shubin wrote:

From: Nikita Shubin 

Instead of always retuning success, return actual result of
load_simple_fit_image or spl_parse_image_header, otherwise we
might end up jumping on uninitialized spl_image->entry_point.

Signed-off-by: Nikita Shubin 
---
  common/spl/spl_ram.c | 9 +
  1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index d64710878c..56c7598c4b 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -42,12 +42,13 @@ static int spl_ram_load_image(struct spl_image_info 
*spl_image,
  struct spl_boot_device *bootdev)
  {
struct image_header *header;
+   int ret;
  
  	header = (struct image_header *)CONFIG_SPL_LOAD_FIT_ADDRESS;
  
  	if (CONFIG_IS_ENABLED(IMAGE_PRE_LOAD)) {

unsigned long addr = (unsigned long)header;
-   int ret = image_pre_load(addr);
+   ret = image_pre_load(addr);
  
  		if (ret)

return ret;
@@ -68,7 +69,7 @@ static int spl_ram_load_image(struct spl_image_info 
*spl_image,
debug("Found FIT\n");
load.bl_len = 1;
load.read = spl_ram_load_read;
-   spl_load_simple_fit(spl_image, &load, 0, header);
+   ret = spl_load_simple_fit(spl_image, &load, 0, header);
} else {
ulong u_boot_pos = spl_get_image_pos();
  
@@ -89,10 +90,10 @@ static int spl_ram_load_image(struct spl_image_info *spl_image,

}
header = (struct image_header *)map_sysmem(u_boot_pos, 0);
  
-		spl_parse_image_header(spl_image, bootdev, header);

+   ret = spl_parse_image_header(spl_image, bootdev, header);
}
  
-	return 0;

+   return ret;
  }
  #if CONFIG_IS_ENABLED(RAM_DEVICE)
  SPL_LOAD_IMAGE_METHOD("RAM", 0, BOOT_DEVICE_RAM, spl_ram_load_image);


Reviewed-by: Stefan Roese 

Thanks,
Stefan

Re: [PATCH] patch V2: SPI NOR: ZynqMP: Zynq: GD25Q512: adding part # to the list

[Michal Simek]

Hi,

subject: It has nothing to do with zynq/zynqmp that's why you shouldn't add it 
to subject.


On 12/11/22 05:32, Victor Lim wrote:

Adding GD25Q512 to the part # list.

Signed-off-by: Victor Lim 
---
  drivers/mtd/spi/spi-nor-ids.c | 2 ++
  1 file changed, 2 insertions(+)

diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
index 92d3a4aa5d..fa8320eac2 100644
--- a/drivers/mtd/spi/spi-nor-ids.c
+++ b/drivers/mtd/spi/spi-nor-ids.c
@@ -120,6 +120,8 @@ const struct flash_info spi_nor_ids[] = {
},
{INFO("gd25b256", 0xc84019, 0, 64 * 1024, 512,SECT_4K |
SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | 
SPI_NOR_4B_OPCODES)  },
+   {INFO("gd25b512", 0xc8471A, 0, 64 * 1024, 1024,   SECT_4K |
+   SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK | SPI_NOR_4B_OPCODES)},
{
INFO("gd25lq128", 0xc86018, 0, 64 * 1024, 256,
SECT_4K | SPI_NOR_DUAL_READ |



I see you have sent a lot of patches. Please send them in series.

Thanks,
Michal

--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs

Re: [PATCH v3 1/1] arm: mvebu: Espressobin: Fix default env variables

[Stefan Roese]

Hi Derek,

On 12/9/22 23:04, Derek LaHousse wrote:

Default env variables on Espressobin boards are broken since commit c4df0f6f315c
("arm: mvebu: Espressobin: Set default value for $fdtfile env variable") as well
as the 'env default -a' command.

The algorithm to find free space in the default_environment[] array returns
after the first env variable instead of the correct position of the last
variable, where there is allocated free space.

This causes that U-Boot board_late_init() function to overwrite a portion of the
default environment with $ethXaddr and $fdtfile variables immediately after the
first env variable and so it is overwriting other variables.

This patch also adds an additional null byte to terminate the environment array.

But U-Boot board_late_init() function do not fill this nul byte explicitly. And
because of that, U-Boot is later trying to interpret remaining buffer as a
continuation of variable list. Normally buffer should be empty but due to the
above issue, it contains garbage from remaining env variables.

For example 'env default -a' command results in damaging variable names. It was
observed that scritaddr variable name was changed to criptaddr (without leading
's').

This bug was reported and discussed on the Armbian forum:
https://forum.armbian.com/topic/19564-making-espressobin-v7-work-in-2022/?do=findComment&comment=138136

Fix these issues in two steps:

1) Change code which finds free space for dynamic env variables in
default_environment[] array by jumping to the end of the variable list instead
of jumping after the first defined variable. [By Derek]

2) Add code which appends terminating nul byte as indication of the end of the
env list, after the last nul term env string. [By Pali]

Fixes: c4df0f6f315c ("arm: mvebu: Espressobin: Set default value for $fdtfile
env variable")
Signed-off-by: Derek LaHousse 
Signed-off-by: Pali Rohár 
---
Changes in v3:
- End of line wrap fix

Changes in v2:
- Include Pali's end-of-array null
- Better tags
- More documentation of what is fixed

diff --git a/board/Marvell/mvebu_armada-37xx/board.c
b/board/Marvell/mvebu_armada-37xx/board.c
index c6ecc323bb99..44c72344e8be 100644
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -99,9 +99,16 @@ int board_late_init(void)
if (!of_machine_is_compatible("globalscale,espressobin"))
return 0;
  
-	/* Find free buffer in default_environment[] for new variables */

-   while (*ptr != '\0' && *(ptr+1) != '\0') ptr++;
-   ptr += 2;
+   /*
+* Find free space for new variables in default_environment[] array.
+* Free space is after the last variable, each variable is termined
+* by nul byte and after the last variable is additional nul byte.
+* Move ptr to the position where new variable can be filled.
+*/
+   while (*ptr != '\0') {
+   do { ptr++; } while (*ptr != '\0');
+   ptr++;
+   }
  
  	/*

 * Ensure that 'env default -a' does not erase permanent MAC addresses
@@ -145,6 +152,13 @@ int board_late_init(void)
strcpy(ptr, "fdtfile=marvell/armada-3720-espressobin-
emmc.dtb");
else
strcpy(ptr, "fdtfile=marvell/armada-3720-espressobin.dtb");
+   ptr += strlen(ptr) + 1;
+
+   /*
+* After the last variable (which is nul term string) append another
nul
+* byte which terminates the list. So everything after ptr is ignored.
+*/
+   *ptr = '\0';


Still line-wrapped. I've fixed this by manually applying the changes.

Applied to u-boot-marvell/master

Thanks,
Stefan

Please pull u-boot-marvell/master

[Stefan Roese]

Hi Tom,

please pull this late Marvell related fix:


- mvebu: Espressobin: Fix default env variables (Derek)


Here the Azure build, without any issues:

https://dev.azure.com/sr0718/u-boot/_build/results?buildId=278&view=results

Thanks,
Stefan

The following changes since commit 7a7b0856ca01f0dadc940f6f1bc6df44129ad9d0:

  Merge tag 'u-boot-nand-20221211' of 
https://source.denx.de/u-boot/custodians/u-boot-nand-flash (2022-12-11 
09:40:25 -0500)


are available in the Git repository at:

  g...@source.denx.de:u-boot/custodians/u-boot-marvell.git

for you to fetch changes up to 3a68fda33fe5b53be7e15099de856acb1f41097e:

  arm: mvebu: Espressobin: Fix default env variables (2022-12-12 
07:36:04 +0100)



Derek LaHousse (1):
  arm: mvebu: Espressobin: Fix default env variables

 board/Marvell/mvebu_armada-37xx/board.c | 20 +---
 1 file changed, 17 insertions(+), 3 deletions(-)

Re: Converting to DM SERIAL for Kirkwood boards

[Michael Walle]

>> On 12/9/22 04:55, Tony Dinh wrote:
>> > Hi Simon et al,
>> >
>> > (Resend to include u-boot mailing list)
>> >
>> > I'm in the process of converting Kirkwood boards to use DM SERIAL. I
>> > could not seem to get it to work, having tried adding
>> > CONFIG_DM_SERIAL, and also playing with various  related CONFIG
>> > options  (CONFIG_SPECIFY_CONSOLE_INDEX and CONFIG_CONS_INDEX ). From
>> > my reading various board configurations that were already converted to
>> > DM_SERIAL, I'm under the impression that just turning on
>> > CONFIG_DM_SERIAL would work without any other addition.
>> >
>> > The board I'm testing is Zyxel NSA310S Kirkwood 6702 (6192) SoC.
>> >
>> > diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig
>> > index afa0cad041..e81d1495bd 100644
>> > --- a/configs/nsa310s_defconfig
>> > +++ b/configs/nsa310s_defconfig
>> > @@ -41,7 +41,6 @@ CONFIG_ENV_OVERWRITE=y
>> >   CONFIG_ENV_IS_IN_NAND=y
>> >   CONFIG_SYS_RELOC_GD_ENV_ADDR=y
>> >   CONFIG_NET_RANDOM_ETHADDR=y
>> > -CONFIG_NETCONSOLE=y
>> >   CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
>> >   CONFIG_SATA_MV=y
>> >   CONFIG_SYS_SATA_MAX_DEVICE=1
>> > @@ -53,6 +52,7 @@ CONFIG_MTD_RAW_NAND=y
>> >   CONFIG_PHY_MARVELL=y
>> >   CONFIG_MVGBE=y
>> >   CONFIG_MII=y
>> > +CONFIG_DM_SERIAL=y
>> >   CONFIG_SYS_NS16550=y
>> >   CONFIG_USB=y
>> >   CONFIG_USB_EHCI_HCD=y
>> >
>> > I also added kirkwood-nsa310s-u-boot.dtsi to help in running kwboot.
>> >
>> > &uart0 {
>> > u-boot,dm-pre-reloc;
>> > };
>> >
>> > I've tried kwboot the new u-boot image, and also flashed this image to
>> > NAND, and in both cases, I got a silent serial console. It seems to
>> > hang up right off the bat. Hope you can help by giving me some
>> > pointers on how to debug this.
>>
>> Might be that the alias is missing and / or that the uart DT node is
>> not enabled. Please give this test-only patch a try:
>>
>> diff --git a/arch/arm/dts/kirkwood-nsa310s.dts
>> b/arch/arm/dts/kirkwood-nsa310s.dts
>> index 09ee76c2a2e0..ca7a49af9ba4 100644
>> --- a/arch/arm/dts/kirkwood-nsa310s.dts
>> +++ b/arch/arm/dts/kirkwood-nsa310s.dts
>> @@ -17,6 +17,10 @@
>>  model = "Zyxel NSA310S";
>>  compatible = "zyxel,nsa320s", "marvell,kirkwood-88f6702",
>> "marvell,kirkwood";
>>
>> +   aliases {
>> +   serial0 = &uart0;
>> +   };
>> +
>>  memory {
>>  device_type = "memory";
>>  reg = <0x 0x1000>;
>> @@ -317,3 +321,8 @@
>>   &pcie0 {
>>  status = "okay";
>>   };
>> +
>> +&uart0 {
>> +   status = "okay";
>> +   u-boot,dm-pre-reloc;
>> +};
>
> Thanks for the patch! but the behavior is still the same (silent
> serial console and hung the board).
> 
> Thanks,
> Tony

Maybe this will help:
https://lore.kernel.org/u-boot/20220817193809.1059688-20-mich...@walle.cc/

The lsxl is also a kirkwood based board.

-michael

Re: [u-boot][PATCH 00/14] rawnand: omap_gpmc: driver model support

[Roger Quadros]

Hi Dario,

On 11/12/2022 15:56, Dario Binacchi wrote:
> Hi Roger,
> 
> On Fri, Nov 25, 2022 at 1:38 PM Roger Quadros  wrote:
>>
>> Hi Michael,
>>
>> On 08/11/2022 11:26, Michael Nazzareno Trimarchi wrote:
>>> Hi Roger
>>>
>>> On Fri, Nov 4, 2022 at 2:27 PM Roger Quadros  wrote:

 Hi,

 On 11/10/2022 14:49, Roger Quadros wrote:
> Hi,
>
> This series adds driver model support for rawnand: omap_gpmc
> and omap_elm drivers.
>
> This will enable the driver to be used on K2/K3 platforms as well.

 Any comments on patches 5 and later? Thanks

>>>
>>> We will try to close this week.
>>
>> Could you please give your comments on the last few patches. Thanks!
>>
>> cheers,
>> -roger
>>
>>>
>>> Michael
>>>

 cheers,
 -roger

>
> cheers,
> -roger
>
> Roger Quadros (14):
>   mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h
>   mtd: rawnand: omap_gpmc: Enable build for K2/K3 platforms
>   mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms
>   mtd: rawnand: omap_gpmc: Optimize NAND reads
>   mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction
>   mtd: rawnand: nand_base: Allow base driver to be used in SPL without
> nand_bbt
>   mtd: rawnand: nand_spl_loaders: Fix cast type build warning
>   mtd: rawnand: omap_gpmc: Reduce .bss usage
>   dt-bindings: mtd: Add ti,gpmc-nand DT binding documentation
>   mtd: rawnand: omap_gpmc: support u-boot driver model
>   mtd: rawnand: omap_gpmc: Add SPL NAND support
>   mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMC
>   dt-bindings: mtd: Add ti,elm DT binding documentation
>   mtd: rawnand: omap_elm: u-boot driver model support
>
>  doc/device-tree-bindings/mtd/ti,elm.yaml  |  72 +++
>  .../mtd/ti,gpmc-nand.yaml | 129 +
>  drivers/mtd/nand/raw/Kconfig  |  11 +-
>  drivers/mtd/nand/raw/Makefile |   2 +-
>  drivers/mtd/nand/raw/nand_base.c  |  18 +-
>  drivers/mtd/nand/raw/nand_spl_loaders.c   |   2 +-
>  drivers/mtd/nand/raw/omap_elm.c   |  33 +-
>  .../mtd => drivers/mtd/nand/raw}/omap_elm.h   |   6 +
>  drivers/mtd/nand/raw/omap_gpmc.c  | 500 +-
>  9 files changed, 637 insertions(+), 136 deletions(-)
>  create mode 100644 doc/device-tree-bindings/mtd/ti,elm.yaml
>  create mode 100644 doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
>  rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%)
>
>>>
>>>
>>>
> 
> I tried to merge your whole series but after the second fix and the
> third time the CI/CD pipeline failed

Do you have the link to the failure?

> I thought it's better you fix the problems. So, I only accepted some
> of the first few patches in the series:
> 01/14 mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h
> 02/14 mtd: rawnand: omap_gpmc: Enable build for K2/K3 platforms
> 03/14 mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms
> 04/14 mtd: rawnand: omap_gpmc: Optimize NAND reads
> 07/14 mtd: rawnand: nand_spl_loaders: Fix cast type build warning
> 08/14 mtd: rawnand: omap_gpmc: Reduce .bss usage
> 
> For the others, please fix them to run the tests successfully.

No problem. I will try to fix and run them through the CI testing myself
before re-posting.

cheers,
-roger

Re: [PATCH v3 1/4] ARM: stm32: Fix ECDSA authentication with Dcache enabled

[Patrick DELAUNAY]

Hi,

On 12/7/22 20:24, Marek Vasut wrote:

In case Dcache is enabled while the ECDSA authentication function is
called via BootROM ROM API, the MMU tables are set up and the BootROM
region is not marked as executable, so an attempt to run code from it
results in a hang. Mark the BootROM region as executable as suggested
by Patrick to prevent the hang.

Signed-off-by: Marek Vasut 
---
Cc: Alexandru Gagniuc 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
V2: - Initialize reenable_dcache variable
V3: - Mark BootROM as executable instead
---
  arch/arm/mach-stm32mp/ecdsa_romapi.c | 4 
  1 file changed, 4 insertions(+)

diff --git a/arch/arm/mach-stm32mp/ecdsa_romapi.c 
b/arch/arm/mach-stm32mp/ecdsa_romapi.c
index a2f63ff879f..6156526253c 100644
--- a/arch/arm/mach-stm32mp/ecdsa_romapi.c
+++ b/arch/arm/mach-stm32mp/ecdsa_romapi.c
@@ -81,6 +81,10 @@ static int romapi_ecdsa_verify(struct udevice *dev,
memcpy(raw_key + 32, pubkey->y, 32);
  
  	stm32mp_rom_get_ecdsa_functions(&rom);

+
+   /* Mark BootROM region as executable. */
+   mmu_set_region_dcache_behaviour(0, SZ_2M, DCACHE_DEFAULT_OPTION);
+
rom_ret = rom.ecdsa_verify_signature(hash, raw_key, signature, algo);
  
  	return rom_ret == ROM_API_SUCCESS ? 0 : -EPERM;



Reviewed-by: Patrick Delaunay 

Thanks
Patrick

Re: [PATCH v3 2/4] ARM: stm32: Factor out save_boot_params

[Patrick DELAUNAY]

Hi,

On 12/7/22 20:24, Marek Vasut wrote:

The STM32MP15xx platform currently comes with two incompatible
implementations of save_boot_params() weak function override.
Factor the save_boot_params() implementation into common cpu.c
code and provide accessors to read out both ROM API table address
and DT address from any place in the code instead.

Signed-off-by: Marek Vasut 
---
Cc: Alexandru Gagniuc 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
V2: Avoid #if CONFIG... , use if (CONFIG... instead
V3: No change
---
  arch/arm/mach-stm32mp/boot_params.c   | 20 ++-
  arch/arm/mach-stm32mp/cpu.c   | 35 +++
  arch/arm/mach-stm32mp/ecdsa_romapi.c  | 20 ++-
  .../arm/mach-stm32mp/include/mach/sys_proto.h |  3 ++
  4 files changed, 42 insertions(+), 36 deletions(-)




Reviewed-by: Patrick Delaunay 

Thanks
Patrick

Re: [PATCH v3 3/4] ARM: stm32: Pass ROM API table pointer to U-Boot proper

[Patrick DELAUNAY]

Hi,

On 12/7/22 20:24, Marek Vasut wrote:

The ROM API table pointer is no longer accessible from U-Boot, fix
this by passing the ROM API pointer through. This makes it possible
for U-Boot to call ROM API functions to authenticate payload like
signed fitImages.

Signed-off-by: Marek Vasut 
---
Cc: Alexandru Gagniuc 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
V2: - Rename image_entry_noargs_t to image_entry_stm32_t
 - Add missing __noreturn
V3: No change
---
  arch/arm/mach-stm32mp/cpu.c | 15 +++
  1 file changed, 15 insertions(+)

diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index ee59866bb73..dc4112d5e6c 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -22,6 +22,7 @@
  #include 
  #include 
  #include 
+#include 
  
  /*

   * early TLB into the .data section so that it not get cleared
@@ -413,3 +414,17 @@ uintptr_t get_stm32mp_bl2_dtb(void)
  {
return nt_fw_dtb;
  }
+
+#ifdef CONFIG_SPL_BUILD
+void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
+{
+   typedef void __noreturn (*image_entry_stm32_t)(u32 romapi);
+   uintptr_t romapi = get_stm32mp_rom_api_table();
+
+   image_entry_stm32_t image_entry =
+   (image_entry_stm32_t)spl_image->entry_point;
+
+   printf("image entry point: 0x%lx\n", spl_image->entry_point);
+   image_entry(romapi);
+}
+#endif



Reviewed-by: Patrick Delaunay 

Thanks
Patrick

Re: [u-boot][PATCH 00/14] rawnand: omap_gpmc: driver model support

[Dario Binacchi]

Hi Roger,

On Mon, Dec 12, 2022 at 10:12 AM Roger Quadros  wrote:
>
> Hi Dario,
>
> On 11/12/2022 15:56, Dario Binacchi wrote:
> > Hi Roger,
> >
> > On Fri, Nov 25, 2022 at 1:38 PM Roger Quadros  wrote:
> >>
> >> Hi Michael,
> >>
> >> On 08/11/2022 11:26, Michael Nazzareno Trimarchi wrote:
> >>> Hi Roger
> >>>
> >>> On Fri, Nov 4, 2022 at 2:27 PM Roger Quadros  wrote:
> 
>  Hi,
> 
>  On 11/10/2022 14:49, Roger Quadros wrote:
> > Hi,
> >
> > This series adds driver model support for rawnand: omap_gpmc
> > and omap_elm drivers.
> >
> > This will enable the driver to be used on K2/K3 platforms as well.
> 
>  Any comments on patches 5 and later? Thanks
> 
> >>>
> >>> We will try to close this week.
> >>
> >> Could you please give your comments on the last few patches. Thanks!
> >>
> >> cheers,
> >> -roger
> >>
> >>>
> >>> Michael
> >>>
> 
>  cheers,
>  -roger
> 
> >
> > cheers,
> > -roger
> >
> > Roger Quadros (14):
> >   mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h
> >   mtd: rawnand: omap_gpmc: Enable build for K2/K3 platforms
> >   mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms
> >   mtd: rawnand: omap_gpmc: Optimize NAND reads
> >   mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction
> >   mtd: rawnand: nand_base: Allow base driver to be used in SPL without
> > nand_bbt
> >   mtd: rawnand: nand_spl_loaders: Fix cast type build warning
> >   mtd: rawnand: omap_gpmc: Reduce .bss usage
> >   dt-bindings: mtd: Add ti,gpmc-nand DT binding documentation
> >   mtd: rawnand: omap_gpmc: support u-boot driver model
> >   mtd: rawnand: omap_gpmc: Add SPL NAND support
> >   mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMC
> >   dt-bindings: mtd: Add ti,elm DT binding documentation
> >   mtd: rawnand: omap_elm: u-boot driver model support
> >
> >  doc/device-tree-bindings/mtd/ti,elm.yaml  |  72 +++
> >  .../mtd/ti,gpmc-nand.yaml | 129 +
> >  drivers/mtd/nand/raw/Kconfig  |  11 +-
> >  drivers/mtd/nand/raw/Makefile |   2 +-
> >  drivers/mtd/nand/raw/nand_base.c  |  18 +-
> >  drivers/mtd/nand/raw/nand_spl_loaders.c   |   2 +-
> >  drivers/mtd/nand/raw/omap_elm.c   |  33 +-
> >  .../mtd => drivers/mtd/nand/raw}/omap_elm.h   |   6 +
> >  drivers/mtd/nand/raw/omap_gpmc.c  | 500 +-
> >  9 files changed, 637 insertions(+), 136 deletions(-)
> >  create mode 100644 doc/device-tree-bindings/mtd/ti,elm.yaml
> >  create mode 100644 doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
> >  rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%)
> >
> >>>
> >>>
> >>>
> >
> > I tried to merge your whole series but after the second fix and the
> > third time the CI/CD pipeline failed
>
> Do you have the link to the failure?

These are the CI/CD pipelines links:
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/jobs/540827
https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/jobs/540876
but I think you don't have permission to access them.

Anyway:

for https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/jobs/540827:
+
345 arm: + am335x_guardian
346+drivers/mtd/nand/raw/omap_gpmc.c:1208:26: error: 'nand_chip'
defined but not used [-Werror=unused-variable]
347+ 1208 | static struct nand_chip *nand_chip; /* First NAND chip for
SPL use only */
348+ | ^
349+cc1: all warnings being treated as errors
350+make[5]: *** [scripts/Makefile.build:258:
drivers/mtd/nand/raw/omap_gpmc.o] Error 1
351+make[4]: *** [scripts/Makefile.build:398: drivers/mtd/nand/raw] Error 2
352+make[3]: *** [scripts/Makefile.build:398: drivers/mtd/nand] Error 2
353+make[2]: *** [scripts/Makefile.build:398: drivers/mtd] Error 2
354+make[1]: *** [Makefile:1871: drivers] Error 2
355+make: *** [Makefile:177: sub-make] Error 2

for https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/jobs/540876:
+
498 arm: + chiliboard
499+arm-linux-gnueabi-ld.bfd: drivers/mtd/nand/raw/nand.o: in function
`nand_init_chip':
500+drivers/mtd/nand/raw/nand.c:92: undefined reference to `board_nand_init'
501+make[1]: *** [Makefile:1778: u-boot] Error 1
502+make: *** [Makefile:177: sub-make] Error 2
503 arm: w+ am335x_shc_netboot
504+= WARNING ==
505+This board does not use CONFIG_DM_I2C (Driver Model
506+for I2C drivers). Please update the board to use
507+CONFIG_DM_I2C before the v2022.04 release. Failure to
508+update by the deadline may result in board removal.
509+See doc/develop/driver-model/migration.rst for more info.
510+
511 arm: + cm_t43
512+arm-linux-gnueabi-ld.bfd: drivers/mtd/na

Re: [PATCH v5 0/3] Support UEFI SPI I/O protocol

[Paul Barker]

On 23/11/2022 17:50, Paul Barker wrote:
> These patches add support for the UEFI SPI I/O protocol defined in the
> UEFI Platform Initialization (PI) Specification, Version 1.7 Errata A
> (April 2020). This allows a UEFI application to interact with devices
> on the SPI bus.
> 
> This support is initially intended to be used to communicate with SPI
> devices from "pre-boot" UEFI applications which perform setup before
> the main OS is loaded. Other use cases may also be supported, however
> this is not intended to be a replacement for UEFI capsule updates.
> 
> The "pre-boot" UEFI application which we are currently developing will
> interact with a Micron Authenta[1] flash device, sending vendor-specific
> commands over the SPI bus to make use of Authenta security features, to
> verify flash integrity and to generate ephemeral keys based on the flash
> contents.
> 
> The code here is self-contained and easy to enable/disable at compile
> time. Compilation testing with am335x_evm_defconfig shows that the size
> of u-boot.img increases by less than 2kB when CONFIG_EFI_SPI_PROTOCOL
> is enabled.
> 
> [1]: 
> https://www.micron.com/-/media/client/global/documents/products/product-flyer/authenta_technology_solutions_brief.pdf
> 
> Changes since v4:
> 
> * Dropped patches which have already been merged.
> 
> * Re-based on top of my other patch series [2] to avoid conflicts in
>   am335x-sancloud-bbe-lite-u-boot.dtsi.
> 
> * Dropped `am335x_evm_defconfig: Enable Micron SPI flash support` as
>   this was moved to my other patch series [3].
> 
> * Reformat code to fit in 80 chars per line where possible.
> 
> * Use efi_install_multiple_protocol_interfaces() instead of
>   efi_create_handle() & efi_add_protocol().
> 
> * Rename dtb properties to start with 'u-boot,'.
> 
> * Move SanCloud BBE Lite dtb changes to
>   am335x-sancloud-bbe-lite-u-boot.dtsi.
> 
> * Convert remaining printf() calls to debug() calls.
> 
> [2]: 
> https://lore.kernel.org/u-boot/20221114124243.3719037-1-paul.bar...@sancloud.com/
> [3]: 
> https://lore.kernel.org/u-boot/20221114124243.3719037-7-paul.bar...@sancloud.com/
> 
> Changes since v3:
> 
> * Add implementation of spi_set_speed() so we can use this in
>   efi_spi_io_transaction().
> 
> * Rename convert_efi_string() to efi_convert_string() and move to
>   efi_string.c as a common helper function.
> 
> * Call spi_set_speed() instead of manually de-referencing the function
>   pointer in struct dm_spi_ops.
> 
> * Don't call efi_delete_handle() in destroy_efi_spi_peripheral().
> 
> * Use '%pUl' to print guid string.
> 
> * Split efi_selftest changes into a separate patch.
> 
> Changes since v2:
> 
> * Added description to efi_spi_protocol.h.
> 
> * Moved definition of EFI_SPI_CONFIGURATION_GUID to efi_api.h and
>   added it to the list in lib/uuid.c.
> 
> * Fixed UEFI GUID byte order in test.dts and in debug output.
> 
> * Use log_debug() instead of printf() for debug output.
> 
> * Add test cases to confirm that efi_legacy_spi_controller_protocol
>   functions return EFI_UNSUPPORTED (as they are not currently
>   implemented)
> 
> Changes since v1:
> 
> * Skip emulated SPI peripherals. These appear as duplicates within the
>   list of devices on the bus when using the sandbox SPI drivers.
> 
> * Make most printf statements debug only.
> 
> * Add efi_seltest unit test.
> 
> * Do not enable config EFI_SPI_PROTOCOL by default.
> 
> * Mark functions with EFIAPI where necessary.
> 
> * Handle debug_transaction argument to efi_spi_io_transaction().
> 
> * Handle a value of zero for target->max_read_size &
>   target->max_write_size.
> 
> * Probe inactive SPI devices when initializing the EFI SPI protocol to
>   ensure that dev_get_parent_priv() returns valid data and the exported
>   devices are ready to use.
> 
> Paul Barker (3):
>   efi_loader: Add SPI I/O protocol support
>   efi_selftest: Add tests for SPI protocol support
>   arm: dts: am335x-sancloud-bbe-lite: UEFI SPI export
> 
>  MAINTAINERS   |   7 +
>  .../dts/am335x-sancloud-bbe-lite-u-boot.dtsi  |  13 +-
>  arch/arm/dts/am335x-sancloud-bbe-lite.dts |   2 +-
>  arch/sandbox/dts/test.dts |  13 +
>  configs/am335x_evm_defconfig  |   1 +
>  include/efi_api.h |   4 +
>  include/efi_loader.h  |   4 +
>  include/efi_spi_protocol.h| 166 +
>  lib/efi_loader/Kconfig|   8 +
>  lib/efi_loader/Makefile   |   1 +
>  lib/efi_loader/efi_setup.c|   6 +
>  lib/efi_loader/efi_spi_protocol.c | 576 ++
>  lib/efi_selftest/Makefile |   1 +
>  lib/efi_selftest/efi_selftest_spi_protocol.c  | 284 +
>  lib/uuid.c|   4 +
>  15 files changed, 1086 insertions(+), 4 deletions(-)
>  create mode 100644 include/efi_spi_protocol.h
>  create mode 100644 lib/efi_loader/efi

Re: [u-boot][PATCH 00/14] rawnand: omap_gpmc: driver model support

[Michael Nazzareno Trimarchi]

Hi Roger

Most of the building problem can be tested with this configuration

make ARCH=arm chiliboard_defconfig

Michael

On Mon, Dec 12, 2022 at 10:27 AM Dario Binacchi
 wrote:
>
> Hi Roger,
>
> On Mon, Dec 12, 2022 at 10:12 AM Roger Quadros  wrote:
> >
> > Hi Dario,
> >
> > On 11/12/2022 15:56, Dario Binacchi wrote:
> > > Hi Roger,
> > >
> > > On Fri, Nov 25, 2022 at 1:38 PM Roger Quadros  wrote:
> > >>
> > >> Hi Michael,
> > >>
> > >> On 08/11/2022 11:26, Michael Nazzareno Trimarchi wrote:
> > >>> Hi Roger
> > >>>
> > >>> On Fri, Nov 4, 2022 at 2:27 PM Roger Quadros  wrote:
> > 
> >  Hi,
> > 
> >  On 11/10/2022 14:49, Roger Quadros wrote:
> > > Hi,
> > >
> > > This series adds driver model support for rawnand: omap_gpmc
> > > and omap_elm drivers.
> > >
> > > This will enable the driver to be used on K2/K3 platforms as well.
> > 
> >  Any comments on patches 5 and later? Thanks
> > 
> > >>>
> > >>> We will try to close this week.
> > >>
> > >> Could you please give your comments on the last few patches. Thanks!
> > >>
> > >> cheers,
> > >> -roger
> > >>
> > >>>
> > >>> Michael
> > >>>
> > 
> >  cheers,
> >  -roger
> > 
> > >
> > > cheers,
> > > -roger
> > >
> > > Roger Quadros (14):
> > >   mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h
> > >   mtd: rawnand: omap_gpmc: Enable build for K2/K3 platforms
> > >   mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms
> > >   mtd: rawnand: omap_gpmc: Optimize NAND reads
> > >   mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction
> > >   mtd: rawnand: nand_base: Allow base driver to be used in SPL without
> > > nand_bbt
> > >   mtd: rawnand: nand_spl_loaders: Fix cast type build warning
> > >   mtd: rawnand: omap_gpmc: Reduce .bss usage
> > >   dt-bindings: mtd: Add ti,gpmc-nand DT binding documentation
> > >   mtd: rawnand: omap_gpmc: support u-boot driver model
> > >   mtd: rawnand: omap_gpmc: Add SPL NAND support
> > >   mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMC
> > >   dt-bindings: mtd: Add ti,elm DT binding documentation
> > >   mtd: rawnand: omap_elm: u-boot driver model support
> > >
> > >  doc/device-tree-bindings/mtd/ti,elm.yaml  |  72 +++
> > >  .../mtd/ti,gpmc-nand.yaml | 129 +
> > >  drivers/mtd/nand/raw/Kconfig  |  11 +-
> > >  drivers/mtd/nand/raw/Makefile |   2 +-
> > >  drivers/mtd/nand/raw/nand_base.c  |  18 +-
> > >  drivers/mtd/nand/raw/nand_spl_loaders.c   |   2 +-
> > >  drivers/mtd/nand/raw/omap_elm.c   |  33 +-
> > >  .../mtd => drivers/mtd/nand/raw}/omap_elm.h   |   6 +
> > >  drivers/mtd/nand/raw/omap_gpmc.c  | 500 
> > > +-
> > >  9 files changed, 637 insertions(+), 136 deletions(-)
> > >  create mode 100644 doc/device-tree-bindings/mtd/ti,elm.yaml
> > >  create mode 100644 doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
> > >  rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%)
> > >
> > >>>
> > >>>
> > >>>
> > >
> > > I tried to merge your whole series but after the second fix and the
> > > third time the CI/CD pipeline failed
> >
> > Do you have the link to the failure?
>
> These are the CI/CD pipelines links:
> https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/jobs/540827
> https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/jobs/540876
> but I think you don't have permission to access them.
>
> Anyway:
>
> for https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/jobs/540827:
> +
> 345 arm: + am335x_guardian
> 346+drivers/mtd/nand/raw/omap_gpmc.c:1208:26: error: 'nand_chip'
> defined but not used [-Werror=unused-variable]
> 347+ 1208 | static struct nand_chip *nand_chip; /* First NAND chip for
> SPL use only */
> 348+ | ^
> 349+cc1: all warnings being treated as errors
> 350+make[5]: *** [scripts/Makefile.build:258:
> drivers/mtd/nand/raw/omap_gpmc.o] Error 1
> 351+make[4]: *** [scripts/Makefile.build:398: drivers/mtd/nand/raw] Error 2
> 352+make[3]: *** [scripts/Makefile.build:398: drivers/mtd/nand] Error 2
> 353+make[2]: *** [scripts/Makefile.build:398: drivers/mtd] Error 2
> 354+make[1]: *** [Makefile:1871: drivers] Error 2
> 355+make: *** [Makefile:177: sub-make] Error 2
>
> for https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/jobs/540876:
> +
> 498 arm: + chiliboard
> 499+arm-linux-gnueabi-ld.bfd: drivers/mtd/nand/raw/nand.o: in function
> `nand_init_chip':
> 500+drivers/mtd/nand/raw/nand.c:92: undefined reference to `board_nand_init'
> 501+make[1]: *** [Makefile:1778: u-boot] Error 1
> 502+make: *** [Makefile:177: sub-make] Error 2
> 503 arm: w+ am335x_shc_netboot
> 504+= WA

Re: [PATCH v2 1/4] ARM: stm32: Fix ECDSA authentication with Dcache enabled

[Patrick DELAUNAY]

Hi,

On 12/7/22 20:32, Marek Vasut wrote:

On 12/7/22 11:08, Patrick DELAUNAY wrote:

Hi Marek,


Hello Patrick,


Sorry for the delay.


No worries.


I cross-check with ROM code team to understood this API limitation.


Thank you!


On 12/6/22 23:49, Marek Vasut wrote:

In case Dcache is enabled while the ECDSA authentication function is
called via BootROM ROM API, the CRYP DMA might pick stale version of
data from DRAM. Disable Dcache around the BootROM call to avoid this
issue.

Signed-off-by: Marek Vasut 
---
Cc: Alexandru Gagniuc 
Cc: Patrice Chotard 
Cc: Patrick Delaunay 
---
V2: - Initialize reenable_dcache variable
---
  arch/arm/mach-stm32mp/ecdsa_romapi.c | 14 ++
  1 file changed, 14 insertions(+)

diff --git a/arch/arm/mach-stm32mp/ecdsa_romapi.c 
b/arch/arm/mach-stm32mp/ecdsa_romapi.c

index a2f63ff879f..082178ce83f 100644
--- a/arch/arm/mach-stm32mp/ecdsa_romapi.c
+++ b/arch/arm/mach-stm32mp/ecdsa_romapi.c
@@ -63,6 +63,7 @@ static int romapi_ecdsa_verify(struct udevice *dev,
 const void *hash, size_t hash_len,
 const void *signature, size_t sig_len)
  {
+    bool reenable_dcache = false;
  struct ecdsa_rom_api rom;
  uint8_t raw_key[64];
  uint32_t rom_ret;
@@ -81,8 +82,21 @@ static int romapi_ecdsa_verify(struct udevice *dev,
  memcpy(raw_key + 32, pubkey->y, 32);
  stm32mp_rom_get_ecdsa_functions(&rom);
+
+    /*
+ * Disable D-cache before calling into BootROM, else CRYP DMA
+ * may fail to pick up the correct data.
+ */
+    if (dcache_status()) {
+    dcache_disable();
+    reenable_dcache = true;
+    }
+
  rom_ret = rom.ecdsa_verify_signature(hash, raw_key, signature, 
algo);

+    if (reenable_dcache)
+    dcache_enable();
+
  return rom_ret == ROM_API_SUCCESS ? 0 : -EPERM;
  }



In fact, the ecdsa_verify_signature() don't use the HW (no DMA and no 
use of CRYP IP )


Hmmm, what does the BootROM use CRYP for then ?



used for SSP = Secure Secret Provisioning

https://wiki.st.com/stm32mpu/wiki/Secure_Secret_Provisioning_(SSP)


It is necessary to have MP15xC/F for the authenticated boot to work, 
but it seems the only difference there is the presence of CRYP. Or is 
there some BootROM fuse too ?



Yes,  the secure boot feature availability is indicated in the security 
field of the chip part number, for STM32MP13 and STM32MP15.


- SSP is not supported

- the associated authentication feature for secure boot is deactivated 
in ROM code



=> the key is burned/locked in OTP on these chips

      and checked by ROM code before to authenticate the FSBL



...




This indeed works, tested and sent V3.


Sorry again for the first review, not complete...


Thank you for checking !



Regards

Patrick

Re: [PATCH v5 0/3] Support UEFI SPI I/O protocol

[Ilias Apalodimas]

Hi Paul

[...]

> >
>
> Sending a gentle ping on this series... is there any further feedback?
> Are there any outstanding issues to resolve?
>

Thanks for the patience and apologies for the slow review.  I didn't
have any serious objections apart from the DT stuff on the previous
version.  I'll go through this during the week and let you know

Thanks
/Ilias
> Thanks,
>
> --
> Paul Barker
> Principal Software Engineer
> SanCloud Ltd
>
> e: paul.bar...@sancloud.com
> w: https://sancloud.com/
>

Re: [PATCH] Prevent buffer overflow on USB control endpoint

[Szymon Heidrich]

On 28/11/2022 10:27, Marek Vasut wrote:
> On 11/28/22 10:21, Szymon Heidrich wrote:
>> On 20/11/2022 16:29, Szymon Heidrich wrote:
>>> On 20/11/2022 15:43, Marek Vasut wrote:
 On 11/17/22 12:50, Fabio Estevam wrote:
> [Adding Lukasz and Marek]
>
> On Thu, Nov 17, 2022 at 6:50 AM Szymon Heidrich
>  wrote:
>>
>> Assure that the control endpoint buffer of size USB_BUFSIZ (4096)
>> can not be overflown during handling of USB control transfer
>> requests with wLength greater than USB_BUFSIZ.
>>
>> Signed-off-by: Szymon Heidrich 
>> ---
>>    drivers/usb/gadget/composite.c | 11 +++
>>    1 file changed, 11 insertions(+)
>>
>> diff --git a/drivers/usb/gadget/composite.c 
>> b/drivers/usb/gadget/composite.c
>> index 2a309e624e..cb89f6dca9 100644
>> --- a/drivers/usb/gadget/composite.c
>> +++ b/drivers/usb/gadget/composite.c
>> @@ -1019,6 +1019,17 @@ composite_setup(struct usb_gadget *gadget, const 
>> struct usb_ctrlrequest *ctrl)
>>   u8  endp;
>>   struct usb_configuration    *c;
>>
>> +   if (w_length > USB_BUFSIZ) {
>> +   if (ctrl->bRequestType & USB_DIR_IN) {
>> +   /* Cast away the const, we are going to 
>> overwrite on purpose. */
>> +   __le16 *temp = (__le16 *)&ctrl->wLength;
>> +   *temp = cpu_to_le16(USB_BUFSIZ);
>> +   w_length = USB_BUFSIZ;

 Won't this end up sending corrupted packets in case they are longer than 
 USB_BUFSIZ ?

 Where do such long packets come from ?

 What is the test-case ?
>>>
>>> The USB host will not attempt to retrieve more than wLenght bytes during 
>>> transfer phase.
>>> If the device would erroneously attempt to provide more data it would 
>>> result in an unexpected state.
>>> In case of most implementations the buffer for endpoint 0 along with max 
>>> control transfer is limited to 4096 bytes (USB_BUFSIZ for U-Boot and Linux 
>>> kernel).
>>> Still according to the USB specification wLength is two bytes an the device 
>>> may receive requests with wLength larger than 4096 bytes e.g. in case of a 
>>> custom/malicious USB host.
>>> For example one may build libusb with MAX_CTRL_BUFFER_LENGTH altered to 
>>> 0x and this will allow the host to send requests with wLength up to 
>>> 0x.
>>> In this case the original implementation may result in buffer overflows as 
>>> in multiple locations a value directly derived from wLength is set as the 
>>> transfer phase length.
>>> With the change applied IN requests with wLength larger than USB_BUFSIZ 
>>> will be trimmed to USB_BUFSIZ, otherwise the host would read 
>>> wLength-USB_BUFSIZ past cdev->req->buf.
>>> I am not aware of any cases where more than USB_BUFSIZ would be provided 
>>> from a buffer other than cdev->req->buf. In case I missed such case please 
>>> let me know.
>>
>> Is there anything additional required from my side?
> 
> Sorry for the delay, I am still processing outstanding email.

Could you please review this patch?

[PATCH] ARM: dts: at91: sama5d2: fix wrong interrupt-cells property

[Eugen Hristev]

The PMC node is not an interrupt provider, so it must not have
interrupt-cells.

This fixes the warning (on newer DTC):
arch/arm/dts/sama5d2.dtsi:82.22-602.6: Warning (interrupt_provider): 
/ahb/apb/pmc@f0014000: '#interrupt-cells' found, but node is not an interrupt 
provider

Fixes: 2c4b2dd289 ("ARM: at91/dt: Add device tree for SAMA5D2 Xplained")
Signed-off-by: Eugen Hristev 
---
 arch/arm/dts/sama5d2.dtsi | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
index 790b746ed1..187c2ff2fb 100644
--- a/arch/arm/dts/sama5d2.dtsi
+++ b/arch/arm/dts/sama5d2.dtsi
@@ -84,7 +84,6 @@
reg = <0xf0014000 0x160>;
#address-cells = <1>;
#size-cells = <0>;
-   #interrupt-cells = <1>;
u-boot,dm-pre-reloc;
 
main: mainck {
-- 
2.25.1

Re: [PATCH] ARM: dts: at91: sama5d2: fix wrong interrupt-cells property

[Claudiu.Beznea]

On 12.12.2022 11:59, Eugen Hristev wrote:
> The PMC node is not an interrupt provider, so it must not have
> interrupt-cells.
> 
> This fixes the warning (on newer DTC):
> arch/arm/dts/sama5d2.dtsi:82.22-602.6: Warning (interrupt_provider): 
> /ahb/apb/pmc@f0014000: '#interrupt-cells' found, but node is not an interrupt 
> provider
> 
> Fixes: 2c4b2dd289 ("ARM: at91/dt: Add device tree for SAMA5D2 Xplained")
> Signed-off-by: Eugen Hristev 

Reviewed-by: Claudiu Beznea 


> ---
>  arch/arm/dts/sama5d2.dtsi | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
> index 790b746ed1..187c2ff2fb 100644
> --- a/arch/arm/dts/sama5d2.dtsi
> +++ b/arch/arm/dts/sama5d2.dtsi
> @@ -84,7 +84,6 @@
>   reg = <0xf0014000 0x160>;
>   #address-cells = <1>;
>   #size-cells = <0>;
> - #interrupt-cells = <1>;
>   u-boot,dm-pre-reloc;
>  
>   main: mainck {

Re: [Uboot-stm32] [PATCH] cmd: mtdparts: add SYS_MTDPARTS_RUNTIME dependency on CONFIG_MTDIDS/MTDPARTS_DEFAULT

[Patrice CHOTARD]

Hi Patrick

On 12/8/22 09:10, Patrick Delaunay wrote:
> The two configuration CONFIG_MTDIDS_DEFAULT and CONFIG_MTDPARTS_DEFAULT
> are not needed with mtd configuration CONFIG_SYS_MTDPARTS_RUNTIME which
> allows the MTDIDS and MTDPARTS to be configured at runtime.
> 
> This patch has no defconfig impacts because CONFIG_SYS_MTDPARTS_RUNTIME
> is only used by two platforms (stm32mp and igep00x0) which don't define
> CONFIG_MTDIDS_DEFAULT or CONFIG_MTDPARTS_DEFAULT.
> 
> This patch solves an UBI environment load issue for NAND boot for
> stm32mp15 platform. In mtd_uboot.c, when GD_FLG_ENV_READY is not set,
> env_get_f() return a EMPTY string, define in default_environment[]
> because CONFIG_MTDIDS_DEFAULT="" and CONFIG_MTDPARTS_DEFAULT="",
> but a NULL pointer is expected to allow call of board_mtdparts_default.
> Without mtdparts, the env partition [CONFIG_ENV_UBI_PART="UBI"] is not
> found in env/ubi.c [CONFIG_ENV_IS_IN_UBI].
> 
> It is not a problem when env becomes ready, as these empty variables are
> removed form U-Boot environment in env_import() / himport_r().
> 
> Fixes: a331017c237c ("Complete migration of MTDPARTS_DEFAULT / 
> MTDIDS_DEFAULT, include in environment")
> Signed-off-by: Patrick Delaunay 
> ---
> 
>  cmd/Kconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/cmd/Kconfig b/cmd/Kconfig
> index d93731f2af68..cae6ed22fcd1 100644
> --- a/cmd/Kconfig
> +++ b/cmd/Kconfig
> @@ -2535,6 +2535,7 @@ config CMD_MTDPARTS_SHOW_NET_SIZES
>  config MTDIDS_DEFAULT
>   string "Default MTD IDs"
>   depends on MTD || SPI_FLASH
> + depends on !SYS_MTDPARTS_RUNTIME
>   help
> Defines a default MTD IDs list for use with MTD partitions in the
> Linux MTD command line partitions format.
> @@ -2542,6 +2543,7 @@ config MTDIDS_DEFAULT
>  config MTDPARTS_DEFAULT
>   string "Default MTD partition scheme"
>   depends on MTD || SPI_FLASH
> + depends on !SYS_MTDPARTS_RUNTIME
>   help
> Defines a default MTD partitioning scheme in the Linux MTD command
> line partitions format
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH v2 02/19] clk: at91: Add support for sam9x60 USB clock

[Claudiu.Beznea]

On 08.12.2022 11:47, Sergiu Moga wrote:
> Implement sam9x60 USB clock driver. This clock has
> three parents: PLLA, UPLL and MAINXTAL. The driver is
> aware of the three possible parents with the help of the
> two mux tables provied to the driver during the registration
> of the clock.
> 
> Signed-off-by: Sergiu Moga 
> ---
> 
> 
> 
> v1 -> v2:
> - No change
> 
> 
> 
>  drivers/clk/at91/Kconfig   |   7 ++
>  drivers/clk/at91/Makefile  |   1 +
>  drivers/clk/at91/clk-sam9x60-usb.c | 156 +
>  drivers/clk/at91/pmc.h |  11 ++
>  4 files changed, 175 insertions(+)
>  create mode 100644 drivers/clk/at91/clk-sam9x60-usb.c
> 
> diff --git a/drivers/clk/at91/Kconfig b/drivers/clk/at91/Kconfig
> index 4abc8026b4..4563892647 100644
> --- a/drivers/clk/at91/Kconfig
> +++ b/drivers/clk/at91/Kconfig
> @@ -61,3 +61,10 @@ config AT91_SAM9X60_PLL
>   help
> This option is used to enable the AT91 SAM9X60's PLL clock
> driver.
> +
> +config AT91_SAM9X60_USB
> + bool "USB Clock support for SAM9X60 SoCs"
> + depends on CLK_AT91
> + help
> +   This option is used to enable the AT91 SAM9X60's USB clock
> +   driver.
> diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
> index 580b406d7b..e53dcb4ca7 100644
> --- a/drivers/clk/at91/Makefile
> +++ b/drivers/clk/at91/Makefile
> @@ -9,6 +9,7 @@ obj-y += clk-peripheral.o
>  obj-$(CONFIG_AT91_GENERIC_CLK)   += clk-generic.o
>  obj-$(CONFIG_AT91_UTMI)  += clk-utmi.o
>  obj-$(CONFIG_AT91_SAM9X60_PLL)   += clk-sam9x60-pll.o
> +obj-$(CONFIG_AT91_SAM9X60_USB)   += clk-sam9x60-usb.o
>  obj-$(CONFIG_SAMA7G5)+= sama7g5.o
>  obj-$(CONFIG_SAM9X60)+= sam9x60.o
>  else
> diff --git a/drivers/clk/at91/clk-sam9x60-usb.c 
> b/drivers/clk/at91/clk-sam9x60-usb.c
> new file mode 100644
> index 00..0ccdc1494d
> --- /dev/null
> +++ b/drivers/clk/at91/clk-sam9x60-usb.c
> @@ -0,0 +1,156 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * SAM9X60's USB Clock support.
> + *
> + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
> + *
> + * Author: Sergiu Moga 
> + */
> +
> +#include 
> +#include 
> +#include 
> +
> +#include "pmc.h"
> +
> +#define UBOOT_DM_CLK_AT91_SAM9X60_USB"at91-sam9x60-usb-clk"
> +
> +struct sam9x60_usb {
> + const struct clk_usbck_layout   *layout;
> + void__iomem *base;
> + struct clk  clk;
> + const u32   *clk_mux_table;
> + const u32   *mux_table;
> + const char * const  *parent_names;
> + u32 num_parents;
> + u8  id;
> +};
> +
> +#define to_sam9x60_usb(_clk) container_of(_clk, struct sam9x60_usb, clk)
> +#define USB_MAX_DIV  15
> +
> +static int sam9x60_usb_clk_set_parent(struct clk *clk, struct clk *parent)
> +{
> + struct sam9x60_usb *usb = to_sam9x60_usb(clk);
> + u32 val, index;
> +
> + index = at91_clk_mux_val_to_index(usb->clk_mux_table, usb->num_parents,
> +   parent->id);
> + if (index < 0)
> + return index;
> +
> + index = at91_clk_mux_index_to_val(usb->mux_table, usb->num_parents,
> +   index);
> + if (index < 0)
> + return index;
> +
> + pmc_read(usb->base, usb->layout->offset, &val);
> + val &= ~usb->layout->usbs_mask;
> + val |= index << (ffs(usb->layout->usbs_mask - 1));

You can use FIELD_PREP() here.

> + pmc_write(usb->base, usb->layout->offset, val);
> +
> + return 0;
> +}
> +
> +static ulong sam9x60_usb_clk_get_rate(struct clk *clk)
> +{
> + struct sam9x60_usb *usb = to_sam9x60_usb(clk);
> + ulong parent_rate = clk_get_parent_rate(clk);
> + u32 val, usbdiv;
> +
> + if (!parent_rate)
> + return 0;
> +
> + pmc_read(usb->base, usb->layout->offset, &val);
> + usbdiv = (val & usb->layout->usbdiv_mask) >>
> + (ffs(usb->layout->usbdiv_mask) - 1);

And FIELD_GET() here.

> + return parent_rate / (usbdiv + 1);
> +}
> +
> +static ulong sam9x60_usb_clk_set_rate(struct clk *clk, ulong rate)
> +{
> + struct sam9x60_usb *usb = to_sam9x60_usb(clk);
> + ulong parent_rate = clk_get_parent_rate(clk);
> + u32 usbdiv, val;
> +
> + if (!parent_rate)
> + return 0;
> +
> + usbdiv = DIV_ROUND_CLOSEST(parent_rate, rate);
> + if (usbdiv > USB_MAX_DIV + 1 || !usbdiv)
> + return 0;
> +
> + pmc_read(usb->base, usb->layout->offset, &val);
> + val &= usb->layout->usbdiv_mask;
> + val |= (usbdiv - 1) << (ffs(usb->layout->usbdiv_mask) - 1);

FIELD_PREP()

> + pmc_write(usb->base, usb->layout->offset, val);
> +
> + return parent_rate / usbdiv;
> +}
> +
> +static const struct clk_o

Re: [PATCH v2 12/19] reset: at91: Add reset driver for basic assert/deassert operations

[Claudiu.Beznea]

On 08.12.2022 11:47, Sergiu Moga wrote:
> Add support for at91 reset controller's basic assert/deassert
> operations. Since this driver conflicts with the
> SYSRESET driver because they both bind to the same RSTC node,
> implement a custom bind hook that would manually bind the
> sysreset driver, if enabled, to the same RSTC DT node.
> Furthermore, delete the no longer needed compatibles from the
> SYSRESET driver and rename it to make sure than any possible
> conflicts are avoided.
> 
> Signed-off-by: Sergiu Moga 
> Tested-by: Mihai Sain 

Reviewed-by: Claudiu Beznea 


> ---
> 
> v1 -> v2:
> - No change
> 
>  drivers/reset/Kconfig|   8 ++
>  drivers/reset/Makefile   |   1 +
>  drivers/reset/reset-at91.c   | 141 +++
>  drivers/sysreset/sysreset_at91.c |  10 +--
>  4 files changed, 151 insertions(+), 9 deletions(-)
>  create mode 100644 drivers/reset/reset-at91.c
> 
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 4cb0ba0850..e4039d7474 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -211,4 +211,12 @@ config RESET_DRA7
>   help
> Support for TI DRA7-RESET subsystem. Basic Assert/Deassert
> is supported.
> +
> +config RESET_AT91
> + bool "Enable support for Microchip/Atmel Reset Controller driver"
> + depends on DM_RESET && ARCH_AT91
> + help
> +   This enables the Reset Controller driver support for Microchip/Atmel
> +   SoCs. Mainly used to expose assert/deassert methods to other drivers
> +   that require it.
>  endmenu
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 0620b62809..6c8b45ecba 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -31,3 +31,4 @@ obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
>  obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
>  obj-$(CONFIG_RESET_ZYNQMP) += reset-zynqmp.o
>  obj-$(CONFIG_RESET_DRA7) += reset-dra7.o
> +obj-$(CONFIG_RESET_AT91) += reset-at91.o
> diff --git a/drivers/reset/reset-at91.c b/drivers/reset/reset-at91.c
> new file mode 100644
> index 00..165c87acdc
> --- /dev/null
> +++ b/drivers/reset/reset-at91.c
> @@ -0,0 +1,141 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Support for Atmel/Microchip Reset Controller.
> + *
> + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
> + *
> + * Author: Sergiu Moga 
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +struct at91_reset {
> + void __iomem *dev_base;
> + struct at91_reset_data *data;
> +};
> +
> +struct at91_reset_data {
> + u32 n_device_reset;
> + u8 device_reset_min_id;
> + u8 device_reset_max_id;
> +};
> +
> +static const struct at91_reset_data sama7g5_data = {
> + .n_device_reset = 3,
> + .device_reset_min_id = SAMA7G5_RESET_USB_PHY1,
> + .device_reset_max_id = SAMA7G5_RESET_USB_PHY3,
> +};
> +
> +static int at91_rst_update(struct at91_reset *reset, unsigned long id,
> +bool assert)
> +{
> + u32 val;
> +
> + if (!reset->dev_base)
> + return 0;
> +
> + val = readl(reset->dev_base);
> + if (assert)
> + val |= BIT(id);
> + else
> + val &= ~BIT(id);
> + writel(val, reset->dev_base);
> +
> + return 0;
> +}
> +
> +static int at91_reset_of_xlate(struct reset_ctl *reset_ctl,
> +struct ofnode_phandle_args *args)
> +{
> + struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
> +
> + if (!reset->data->n_device_reset ||
> + args->args[0] < reset->data->device_reset_min_id ||
> + args->args[0] > reset->data->device_reset_max_id)
> + return -EINVAL;
> +
> + reset_ctl->id = args->args[0];
> +
> + return 0;
> +}
> +
> +static int at91_rst_assert(struct reset_ctl *reset_ctl)
> +{
> + struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
> +
> + return at91_rst_update(reset, reset_ctl->id, true);
> +}
> +
> +static int at91_rst_deassert(struct reset_ctl *reset_ctl)
> +{
> + struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
> +
> + return at91_rst_update(reset, reset_ctl->id, false);
> +}
> +
> +struct reset_ops at91_reset_ops = {
> + .of_xlate = at91_reset_of_xlate,
> + .rst_assert = at91_rst_assert,
> + .rst_deassert = at91_rst_deassert,
> +};
> +
> +static int at91_reset_probe(struct udevice *dev)
> +{
> + struct at91_reset *reset = dev_get_priv(dev);
> + struct clk sclk;
> + int ret;
> +
> + reset->data = (struct at91_reset_data *)dev_get_driver_data(dev);
> + reset->dev_base = dev_remap_addr_index(dev, 1);
> + if (reset->data && reset->data->n_device_reset && !reset->dev_base)
> + return -EINVAL;
> +
> + ret = clk_get_by_index(dev, 0, &sclk);
> + if (ret)
> + return ret;
> +
> + return clk_prepare_enable(&sclk);
> +}
> +
> +static int at91_reset_bind(struct u

Re: [PATCH] ARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1

[Patrice CHOTARD]

Hi Fabrice

On 12/12/22 11:32, Fabrice Gasnier wrote:
> phy-stm32-usbphyc bindings uses a connector node with vbus-supply
> property.
> 
> [backport from linux 43e55d778a6b]
> Signed-off-by: Fabrice Gasnier 
> ---
> 
>  arch/arm/dts/stm32mp157c-ev1.dts | 4 
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp157c-ev1.dts 
> b/arch/arm/dts/stm32mp157c-ev1.dts
> index 07bcd7c50672..2d5db41ed67b 100644
> --- a/arch/arm/dts/stm32mp157c-ev1.dts
> +++ b/arch/arm/dts/stm32mp157c-ev1.dts
> @@ -393,6 +393,10 @@
>   st,tune-squelch-level = <3>;
>   st,tune-hs-rx-offset = <2>;
>   st,no-lsfs-sc;
> + connector {
> + compatible = "usb-a-connector";
> + vbus-supply = <&vbus_sw>;
> + };
>  };
>  
>  &usbphyc_port1 {

Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [Uboot-stm32] [PATCH] dm: pmic: ignore disabled node in pmic_bind_children

[Patrice CHOTARD]

Hi Patrick

On 10/27/22 17:22, Simon Glass wrote:
> On Wed, 26 Oct 2022 at 07:05, Patrick Delaunay
>  wrote:
>>
>> Ignore the disabled children node in pmic_bind_children() so the
>> disabled regulators in device tree are not registered.
>>
>> This patch is based on the dm_scan_fdt_node() code - only the
>> activated nodes are bound -  and it solves possible issue when a
>> deactivated regulator is bound, error for duplicated regulator name
>> for example.
>>
>> Signed-off-by: Patrick Delaunay 
>> ---
>> This patch solves the errors for duplicated regulator names on STM32MP15x
>> boards since the alignment with Linux device tree with the commit
>> 9157a4ce36b18 ("ARM: dts: stm32: update SCMI dedicated file").
>>
>> When SCMI is activated in "-scmi.dts" device tree, the 3 regulators
>> reg11, reg18, usb33 are duplicated (children of scmi_reguls and of
>> pwr_regulators) even if the children of pwr_regulators are deactivated in
>> the file arch/arm/dts/stm32mp15-scmi.dtsi.
>>
>>  drivers/power/pmic/pmic-uclass.c | 4 
>>  1 file changed, 4 insertions(+)
> 
> Reviewed-by: Simon Glass 
> ___
> Uboot-stm32 mailing list
> uboot-st...@st-md-mailman.stormreply.com
> https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32

Applied to u-boot-stm/master

Thanks
Patrice

Re: [Uboot-stm32] [PATCH] phy: usbphyc: use regulator_set_enable_if_allowed for disabling vbus supply

[Patrice CHOTARD]

Hi Patrick

On 9/26/22 09:07, Patrice CHOTARD wrote:
> Hi Patrick
> 
> On 9/20/22 13:39, Patrick Delaunay wrote:
>> Use regulator_set_enable_if_allowed() api instead of regulator_set_enable()
>> while disabling vbus supply. This way the driver doesn't see an error
>> when it disable an always-on regulator for VBUS.
>>
>> This patch is needed for STM32MP157C-DK2 board when the regulator
>> v3v3: buck4 used as the phy vbus supply in kernel device tree
>> is always on with the next hack for low power use-case:
>>
>> &usbphyc_port0 {
>> ...
>>  /*
>>   * Hack to keep hub active until all connected devices are suspended
>>   * otherwise the hub will be powered off as soon as the v3v3 is disabled
>>   * and it can disturb connected devices.
>>   */
>>  connector {
>>  compatible = "usb-a-connector";
>>  vbus-supply = <&v3v3>;
>>  };
>> };
>>
>> Without this patch and the previous update in DT the command
>> "usb stop" failed and the next command "usb start" cause a crash.
>>
>> Signed-off-by: Patrick Delaunay 
>> ---
>>
>>  drivers/phy/phy-stm32-usbphyc.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/phy/phy-stm32-usbphyc.c 
>> b/drivers/phy/phy-stm32-usbphyc.c
>> index 9f0b7d71187..dcf2194e9a7 100644
>> --- a/drivers/phy/phy-stm32-usbphyc.c
>> +++ b/drivers/phy/phy-stm32-usbphyc.c
>> @@ -375,7 +375,7 @@ static int stm32_usbphyc_phy_power_off(struct phy *phy)
>>  return 0;
>>  
>>  if (usbphyc_phy->vbus) {
>> -ret = regulator_set_enable(usbphyc_phy->vbus, false);
>> +ret = regulator_set_enable_if_allowed(usbphyc_phy->vbus, false);
>>  if (ret)
>>  return ret;
>>  }
> Reviewed-by: Patrice Chotard 
> 
> Thanks
> Patrice
> ___
> Uboot-stm32 mailing list
> uboot-st...@st-md-mailman.stormreply.com
> https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32

Applied to u-boot-stm/master

Thanks
Patrice

[PULL] Pull request for u-boot master / v2023.01-rc4 = u-boot-stm32-20221212

[Patrice CHOTARD]

Hi Tom

Please pull these 2 patches for v2023.01-rc4

CI status: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/14403

The following changes since commit 7a7b0856ca01f0dadc940f6f1bc6df44129ad9d0:

  Merge tag 'u-boot-nand-20221211' of 
https://source.denx.de/u-boot/custodians/u-boot-nand-flash (2022-12-11 09:40:25 
-0500)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-stm.git 
tags/u-boot-stm32-20221212

for you to fetch changes up to 30257f4699e0e58818f6e6f86021a994f485ee58:

  dm: pmic: ignore disabled node in pmic_bind_children (2022-12-12 11:25:28 
+0100)


phy: usbphyc: use regulator_set_enable_if_allowed for disabling vbus supply
dm: pmic: ignore disabled node in pmic_bind_children


Patrick Delaunay (2):
  phy: usbphyc: use regulator_set_enable_if_allowed for disabling vbus 
supply
  dm: pmic: ignore disabled node in pmic_bind_children

 drivers/phy/phy-stm32-usbphyc.c  | 2 +-
 drivers/power/pmic/pmic-uclass.c | 4 
 2 files changed, 5 insertions(+), 1 deletion(-)

Re: [PATCH 1/3] usb: onboard-hub: add driver to manage onboard hub supplies

[Patrice CHOTARD]

HI Fabrice

On 12/12/22 11:44, Fabrice Gasnier wrote:
> The main issue the driver addresses is that a USB hub needs to be
> powered before it can be discovered. This is often solved by using
> "regulator-always-on".
> 
> This driver is inspired by the Linux v6.1 driver. It only enables (or
> disables) the hub vdd (3v3) supply, so it can be enumerated.
> Scanning of the device tree is done in a similar manner to the sandbox,
> by the usb-uclass. DT part looks like:
> 
> &usbh_ehci {
>   ...
>   #address-cells = <1>;
>   #size-cells = <0>;
>   hub@1 {
>   compatible = "usb424,2514";
>   reg = <1>;
>   vdd-supply = <&v3v3>;
>   };
> };
> 
> When the bus gets probed, the driver is automatically probed/removed from
> the bus tree, as an example on stm32:
> STM32MP> usb start
> starting USB...
> STM32MP> dm tree
>  Class Index  Probed  DriverName
> ---
>  usb   0  [ + ]   ehci_generic  |   |-- usb@5800d000
>  usb_hub   0  [ + ]   usb_onboard_hub   |   |   `-- hub@1
>  usb_hub   1  [ + ]   usb_hub   |   |   `-- usb_hub
> 
> STM32MP> usb tree
> USB device tree:
>   1  Hub (480 Mb/s, 0mA)
>   |  u-boot EHCI Host Controller
>   |
>   +-2  Hub (480 Mb/s, 2mA)
> 
> Signed-off-by: Fabrice Gasnier 
> ---
> 
>  common/Makefile   |  1 +
>  common/usb_onboard_hub.c  | 62 +++
>  drivers/usb/Kconfig   | 10 ++
>  drivers/usb/host/usb-uclass.c | 16 +
>  4 files changed, 83 insertions(+), 6 deletions(-)
>  create mode 100644 common/usb_onboard_hub.c
> 
> diff --git a/common/Makefile b/common/Makefile
> index 20addfb244c2..7789aab484fd 100644
> --- a/common/Makefile
> +++ b/common/Makefile
> @@ -26,6 +26,7 @@ obj-$(CONFIG_PHYLIB) += miiphyutil.o
>  obj-$(CONFIG_USB_HOST) += usb.o usb_hub.o
>  obj-$(CONFIG_USB_GADGET) += usb.o usb_hub.o
>  obj-$(CONFIG_USB_STORAGE) += usb_storage.o
> +obj-$(CONFIG_USB_ONBOARD_HUB) += usb_onboard_hub.o
>  
>  # others
>  obj-$(CONFIG_CONSOLE_MUX) += iomux.o
> diff --git a/common/usb_onboard_hub.c b/common/usb_onboard_hub.c
> new file mode 100644
> index ..89e18a2ddad6
> --- /dev/null
> +++ b/common/usb_onboard_hub.c
> @@ -0,0 +1,62 @@
> +// SPDX-License-Identifier: GPL-2.0-only
> +/*
> + * Driver for onboard USB hubs
> + *
> + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
> + *
> + * Mostly inspired by Linux kernel v6.1 onboard_usb_hub driver
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +struct onboard_hub {
> + struct udevice *vdd;
> +};
> +
> +static int usb_onboard_hub_probe(struct udevice *dev)
> +{
> + struct onboard_hub *hub = dev_get_priv(dev);
> + int ret;
> +
> + ret = device_get_supply_regulator(dev, "vdd-supply", &hub->vdd);
> + if (ret) {
> + dev_err(dev, "can't get vdd-supply: %d\n", ret);
> + return ret;
> + }
> +
> + ret = regulator_set_enable_if_allowed(hub->vdd, true);
> + if (ret)
> + dev_err(dev, "can't enable vdd-supply: %d\n", ret);
> +
> + return ret;
> +}
> +
> +static int usb_onboard_hub_remove(struct udevice *dev)
> +{
> + struct onboard_hub *hub = dev_get_priv(dev);
> + int ret;
> +
> + ret = regulator_set_enable_if_allowed(hub->vdd, false);
> + if (ret)
> + dev_err(dev, "can't disable vdd-supply: %d\n", ret);
> +
> + return ret;
> +}
> +
> +static const struct udevice_id usb_onboard_hub_ids[] = {
> + /* Use generic usbVID,PID dt-bindings (usb-device.yaml) */
> + { .compatible = "usb424,2514" }, /* USB2514B USB 2.0 */
> + { }
> +};
> +
> +U_BOOT_DRIVER(usb_onboard_hub) = {
> + .name   = "usb_onboard_hub",
> + .id = UCLASS_USB_HUB,
> + .probe = usb_onboard_hub_probe,
> + .remove = usb_onboard_hub_remove,
> + .of_match = usb_onboard_hub_ids,
> + .priv_auto = sizeof(struct onboard_hub),
> +};
> diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
> index 3afb45d5ccb2..d10ee6853d40 100644
> --- a/drivers/usb/Kconfig
> +++ b/drivers/usb/Kconfig
> @@ -106,6 +106,16 @@ config USB_KEYBOARD
> Say Y here if you want to use a USB keyboard for U-Boot command line
> input.
>  
> +config USB_ONBOARD_HUB
> + bool "Onboard USB hub support"
> + depends on DM_USB
> + ---help---
> +   Say Y here if you want to support discrete onboard USB hubs that
> +   don't require an additional control bus for initialization, but
> +   need some non-trivial form of initialization, such as enabling a
> +   power regulator. An example for such a hub is the Microchip
> +   USB2514B.
> +
>  if USB_KEYBOARD
>  
>  config USB_KEYBOARD_FN_KEYS
> diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
> index 060f3441df0c..f5dc93ffee39 100644
> --- a/drivers/usb/host/usb-uclass.c
> +++ b/drivers/usb/host/usb-uc

Re: [PATCH 2/3] configs: stm32: enable USB onboard HUB driver

[Patrice CHOTARD]

Hi Fabrice

On 12/12/22 11:44, Fabrice Gasnier wrote:
> Activate the USB onboard HUB driver, that is used to enable the HUB supply
> on STM32MP15 EVAL, DK1 and DK2 boards.
> This avoids marking the 3v3 corresponding regulator as always-on.
> 
> Signed-off-by: Fabrice Gasnier 
> ---
> 
>  configs/stm32mp15_basic_defconfig   | 1 +
>  configs/stm32mp15_defconfig | 1 +
>  configs/stm32mp15_trusted_defconfig | 1 +
>  3 files changed, 3 insertions(+)
> 
> diff --git a/configs/stm32mp15_basic_defconfig 
> b/configs/stm32mp15_basic_defconfig
> index 86ebbef0a6c8..4d2ac589931a 100644
> --- a/configs/stm32mp15_basic_defconfig
> +++ b/configs/stm32mp15_basic_defconfig
> @@ -164,6 +164,7 @@ CONFIG_USB=y
>  CONFIG_DM_USB_GADGET=y
>  CONFIG_USB_EHCI_HCD=y
>  CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_ONBOARD_HUB=y
>  CONFIG_USB_GADGET=y
>  CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x0483
> diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
> index caa79e68834f..ccf65dd12223 100644
> --- a/configs/stm32mp15_defconfig
> +++ b/configs/stm32mp15_defconfig
> @@ -140,6 +140,7 @@ CONFIG_USB=y
>  CONFIG_DM_USB_GADGET=y
>  CONFIG_USB_EHCI_HCD=y
>  CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_ONBOARD_HUB=y
>  CONFIG_USB_GADGET=y
>  CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x0483
> diff --git a/configs/stm32mp15_trusted_defconfig 
> b/configs/stm32mp15_trusted_defconfig
> index 3309c2e79246..a553038a42c5 100644
> --- a/configs/stm32mp15_trusted_defconfig
> +++ b/configs/stm32mp15_trusted_defconfig
> @@ -140,6 +140,7 @@ CONFIG_USB=y
>  CONFIG_DM_USB_GADGET=y
>  CONFIG_USB_EHCI_HCD=y
>  CONFIG_USB_EHCI_GENERIC=y
> +CONFIG_USB_ONBOARD_HUB=y
>  CONFIG_USB_GADGET=y
>  CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
>  CONFIG_USB_GADGET_VENDOR_NUM=0x0483
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH 3/3] ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp157c-ev1

[Patrice CHOTARD]

Hi Fabrice

On 12/12/22 11:44, Fabrice Gasnier wrote:
> Add support for USB2514B onboard hub on stm32mp157c EV1 board. The HUB
> is supplied by a 3v3 PMIC regulator.
> 
> [backport from linux ad9591b01d24]
> Signed-off-by: Fabrice Gasnier 
> ---
> 
>  arch/arm/dts/stm32mp157c-ev1.dts | 8 
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm/dts/stm32mp157c-ev1.dts 
> b/arch/arm/dts/stm32mp157c-ev1.dts
> index d142dd30e16b..07bcd7c50672 100644
> --- a/arch/arm/dts/stm32mp157c-ev1.dts
> +++ b/arch/arm/dts/stm32mp157c-ev1.dts
> @@ -362,6 +362,14 @@
>  &usbh_ehci {
>   phys = <&usbphyc_port0>;
>   status = "okay";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + /* onboard HUB */
> + hub@1 {
> + compatible = "usb424,2514";
> + reg = <1>;
> + vdd-supply = <&v3v3>;
> + };
>  };
>  
>  &usbotg_hs {
Reviewed-by: Patrice Chotard 

Thanks
Patrice

Re: [PATCH 0/3] Add support for USB onboard HUB, used on stm32 boards

[Marek Vasut]

On 12/12/22 11:44, Fabrice Gasnier wrote:

This series adds a driver to support USB onboard HUB, inspired by Linux
onboard hub driver.

Purpose is to manage the power supply regulator on STM32 boards, for
low power use case in Linux. U-boot driver allows to benefit of the
device tree part to supply the HUB when need, instead using an
always-on regulator.

It aligns the relevant DT part from emerging Linux v6.2. It also adds the
relevant default configuration on stm32mp15.


Fabrice Gasnier (3):
   usb: onboard-hub: add driver to manage onboard hub supplies
   configs: stm32: enable USB onboard HUB driver
   ARM: dts: stm32: add support for USB2514B onboard hub on
 stm32mp157c-ev1

  arch/arm/dts/stm32mp157c-ev1.dts|  8 
  common/Makefile |  1 +
  common/usb_onboard_hub.c| 62 +
  configs/stm32mp15_basic_defconfig   |  1 +
  configs/stm32mp15_defconfig |  1 +
  configs/stm32mp15_trusted_defconfig |  1 +
  drivers/usb/Kconfig | 10 +
  drivers/usb/host/usb-uclass.c   | 16 +---
  8 files changed, 94 insertions(+), 6 deletions(-)
  create mode 100644 common/usb_onboard_hub.c


+CC Michal

Re: [PATCH] Prevent buffer overflow on USB control endpoint

[Marek Vasut]

On 12/12/22 10:55, Szymon Heidrich wrote:

On 28/11/2022 10:27, Marek Vasut wrote:

On 11/28/22 10:21, Szymon Heidrich wrote:

On 20/11/2022 16:29, Szymon Heidrich wrote:

On 20/11/2022 15:43, Marek Vasut wrote:

On 11/17/22 12:50, Fabio Estevam wrote:

[Adding Lukasz and Marek]

On Thu, Nov 17, 2022 at 6:50 AM Szymon Heidrich
 wrote:


Assure that the control endpoint buffer of size USB_BUFSIZ (4096)
can not be overflown during handling of USB control transfer
requests with wLength greater than USB_BUFSIZ.

Signed-off-by: Szymon Heidrich 
---
    drivers/usb/gadget/composite.c | 11 +++
    1 file changed, 11 insertions(+)

diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 2a309e624e..cb89f6dca9 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -1019,6 +1019,17 @@ composite_setup(struct usb_gadget *gadget, const struct 
usb_ctrlrequest *ctrl)
   u8  endp;
   struct usb_configuration    *c;

+   if (w_length > USB_BUFSIZ) {
+   if (ctrl->bRequestType & USB_DIR_IN) {
+   /* Cast away the const, we are going to overwrite on 
purpose. */
+   __le16 *temp = (__le16 *)&ctrl->wLength;
+   *temp = cpu_to_le16(USB_BUFSIZ);
+   w_length = USB_BUFSIZ;


Won't this end up sending corrupted packets in case they are longer than 
USB_BUFSIZ ?

Where do such long packets come from ?

What is the test-case ?


The USB host will not attempt to retrieve more than wLenght bytes during 
transfer phase.
If the device would erroneously attempt to provide more data it would result in 
an unexpected state.
In case of most implementations the buffer for endpoint 0 along with max 
control transfer is limited to 4096 bytes (USB_BUFSIZ for U-Boot and Linux 
kernel).
Still according to the USB specification wLength is two bytes an the device may 
receive requests with wLength larger than 4096 bytes e.g. in case of a 
custom/malicious USB host.
For example one may build libusb with MAX_CTRL_BUFFER_LENGTH altered to 0x 
and this will allow the host to send requests with wLength up to 0x.
In this case the original implementation may result in buffer overflows as in 
multiple locations a value directly derived from wLength is set as the transfer 
phase length.
With the change applied IN requests with wLength larger than USB_BUFSIZ will be 
trimmed to USB_BUFSIZ, otherwise the host would read wLength-USB_BUFSIZ past 
cdev->req->buf.
I am not aware of any cases where more than USB_BUFSIZ would be provided from a 
buffer other than cdev->req->buf. In case I missed such case please let me know.


Is there anything additional required from my side?


Sorry for the delay, I am still processing outstanding email.


Could you please review this patch?


I have it (or rather, one outstanding reply) in the pipeline, sorry for 
the delay.

Re: [PATCH v5 1/1] u-boot-initial-env: rework make target

[Max Krummenacher]

Hi Tom

On Thu, Dec 8, 2022 at 9:24 PM Tom Rini  wrote:
>
> On Mon, Nov 28, 2022 at 09:41:22AM +0100, Max Krummenacher wrote:
>
> > From: Max Krummenacher 
> >
> > With LTO enabled the U-Boot initial environment is no longer stored
> > in an easy accessible section in env/common.o. I.e. the section name
> > changes from build to build, its content maybe compressed and it is
> > annotated with additional data.
> >
> > Drop trying to read the initial env with elf tools from the compiler
> > specific object file in favour of adding and using a host tool with
> > the only functionality of printing the initial env to stdout.
> >
> > See also:
> > https://lore.kernel.org/all/927b122e-1f62-e790-f5ca-30bae4332...@foss.st.com/
> >
> > Signed-off-by: Max Krummenacher 
> > Acked-by: Pali Rohár 
> > Reviewed-by: Simon Glass 
>
> Applied to u-boot/next, thanks!

The commit not only fixes the use case on arm64 with LTO enabled, it also
fixes sandbox for x86-64. For me on Fedora with a `gcc (GCC) 11.3.1 20220421`
both `make sandbox_defconfig; make u-boot-initial-env` and
`make sandbox_defconfig; ; make u-boot-initial-env` fail with
```
  GENENV  u-boot-initial-env
objcopy: env/common.o: can't dump section
'.rodata.default_environment' - it does not exist: file format not
recognized
sed: can't read u-boot-initial-env: No such file or directory
```

Wouldn't that merit applying the commit to master, i.e. include it in v2023.01?

Regards
Max

P.S.:
The test in [1] catches this failure, so [1] should go in after this commit
to have CI tests not failing.
[1] https://lore.kernel.org/all/20221209120956.2286619-1-max.oss...@gmail.com/

>
> --
> Tom

[PATCH v3 00/19] Add USB on SAM9X60, SAMA7G5 and SAMA5D2 boards

[Sergiu Moga]

This series of patches is meant to add support for USB Mass Storage
on SAM9X60, SAMA7G5 and SAMA5D2 boards and register ohci-at91 driver into
Driver Model. In order for this to be achieved, the respective
DT nodes have been added, the USB clock has been registered into CCF
and the required defconfigs have been added to the boards' defconfig.
What is more, in order for the VBUS to stay enabled, a `child_pre_probe`
method has been added to overcome the DM core disabling it in
`usb_scan_device`: when the generic `device_probe` method is called,
the pinctrl is processed once again, undoing whatever changes have
been made in our driver's probe method.
In order to enable USB on SAMA7G5 the addition of RSTC and USB 2.0 PHY
drivers were required.



v1 -> v2:
- Additional patch included:
[PATCH v2 04/19] clk: at91: pmc: export clock setup to pmc
- Updated
[PATCH v2 05/19] clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates
in concordance with the previously mentioned additional patch
- Move ` #include ` below `#if !(CONFIG_IS_ENABLED(DM_USB))` to
avoid implicit declarations warnings/errors in the OHCI driver


v2 ->  v3:
- Also add USB pinctrl nodes and USB Mass Storage for SAM9X60 Curiosity and
remove no longer necessary ifdef in sam9x60 clk driver
- Remove no longer required CONFIG_SYS_USB_* configs from the defconfigs
and add CONFIG_RESET_AT91 to all defconfigs


Claudiu Beznea (1):
  clk: at91: pmc: export clock setup to pmc

Cristian Birsan (2):
  ARM: at91: add sama7 SFR definitions
  usb: ohci-at91: Add `ohci_t` field in `ohci_at91_priv`

Sergiu Moga (16):
  ARM: dts: sam9x60: Add OHCI and EHCI DT nodes
  clk: at91: Add support for sam9x60 USB clock
  clk: at91: sam9x60: Register the required clocks for USB
  clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates
  usb: ohci-at91: Enable OHCI functionality and register into DM
  dt-bindings: reset: add sama7g5 definitions
  dt-bindings: clk: at91: Define additional UTMI related clocks
  ARM: dts: at91: sama7: Add USB related DT nodes
  reset: at91: Add reset driver for basic assert/deassert operations
  phy: at91: Add support for the USB 2.0 PHY's of SAMA7
  usb: ohci-at91: Add USB PHY functionality
  ARM: dts: at91: sama5d2_icp: Add pinctrl nodes for USB related DT
nodes
  ARM: dts: at91: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes
  configs: at91: sam9x60ek: Add required configs for the USB command
  configs: at91: sama5d2: Enable OHCI/EHCI related configs
  configs: at91: sama7: Enable USB and RESET functionality

 arch/arm/dts/at91-sam9x60_curiosity.dts   |  21 ++
 arch/arm/dts/at91-sama5d27_wlsom1_ek.dts  |  25 ++
 arch/arm/dts/at91-sama5d2_icp.dts |  22 ++
 arch/arm/dts/at91-sama7g5ek.dts   |  34 +++
 arch/arm/dts/sam9x60.dtsi |  18 ++
 arch/arm/dts/sam9x60ek.dts|  21 ++
 arch/arm/dts/sama7g5.dtsi |  73 ++
 arch/arm/mach-at91/include/mach/sama7-sfr.h   |  59 +
 configs/sam9x60_curiosity_mmc_defconfig   |   8 +
 configs/sam9x60ek_mmc_defconfig   |   9 +
 configs/sam9x60ek_nandflash_defconfig |   9 +
 configs/sam9x60ek_qspiflash_defconfig |   9 +
 configs/sama5d27_giantboard_defconfig |   4 +
 configs/sama5d27_som1_ek_mmc1_defconfig   |   4 +
 configs/sama5d27_som1_ek_mmc_defconfig|   4 +
 configs/sama5d27_som1_ek_qspiflash_defconfig  |   4 +
 configs/sama5d27_wlsom1_ek_mmc_defconfig  |   5 +
 .../sama5d27_wlsom1_ek_qspiflash_defconfig|   4 +
 configs/sama5d2_icp_mmc_defconfig |   8 +
 configs/sama5d2_icp_qspiflash_defconfig   |   4 +
 configs/sama5d2_ptc_ek_mmc_defconfig  |   4 +
 configs/sama5d2_ptc_ek_nandflash_defconfig|   4 +
 configs/sama5d2_xplained_emmc_defconfig   |   4 +
 configs/sama5d2_xplained_mmc_defconfig|   4 +
 configs/sama5d2_xplained_qspiflash_defconfig  |   4 +
 configs/sama5d2_xplained_spiflash_defconfig   |   4 +
 configs/sama7g5ek_mmc1_defconfig  |  10 +
 configs/sama7g5ek_mmc_defconfig   |  10 +
 drivers/clk/at91/Kconfig  |   7 +
 drivers/clk/at91/Makefile |   1 +
 drivers/clk/at91/clk-sam9x60-usb.c| 156 +
 drivers/clk/at91/pmc.c|  42 
 drivers/clk/at91/pmc.h|  27 +++
 drivers/clk/at91/sam9x60.c|  63 +
 drivers/clk/at91/sama7g5.c|  48 +---
 drivers/phy/Kconfig   |  10 +
 drivers/phy/Makefile  |   1 +
 drivers/phy/phy-sama7-usb.c   |  92 
 drivers/phy/phy-sama7-utmi-clk.c  | 202 
 drivers/reset/Kconfig |   8 +
 drivers/reset/Makefile|   1 +
 drivers/reset/reset-at91.c| 141 
 drivers/sysreset/sysreset_at91.c  |  10 +-
 drivers/usb/host

[PATCH v3 01/19] ARM: dts: sam9x60: Add OHCI and EHCI DT nodes

[Sergiu Moga]

Add the OHCI and EHCI DT nodes for the sam9x60 boards.

Signed-off-by: Sergiu Moga 
---


v1 -> v2:
- No change


v2 -> v3:
- Also add pinctrl nodes to sam9x60 curiosity



 arch/arm/dts/at91-sam9x60_curiosity.dts | 21 +
 arch/arm/dts/sam9x60.dtsi   | 18 ++
 arch/arm/dts/sam9x60ek.dts  | 21 +
 3 files changed, 60 insertions(+)

diff --git a/arch/arm/dts/at91-sam9x60_curiosity.dts 
b/arch/arm/dts/at91-sam9x60_curiosity.dts
index 7c5b6ae2b8..d6ae3d648d 100644
--- a/arch/arm/dts/at91-sam9x60_curiosity.dts
+++ b/arch/arm/dts/at91-sam9x60_curiosity.dts
@@ -49,6 +49,13 @@
atmel,pins =
;
};
+
+   usb1 {
+   pinctrl_usb_default: 
usb_default {
+   atmel,pins = ;
+   };
+   };
};
};
};
@@ -89,3 +96,17 @@
phy-mode = "rmii";
status = "okay";
 };
+
+&usb1 {
+   num-ports = <3>;
+   atmel,vbus-gpio = <0
+  &pioD 15 GPIO_ACTIVE_HIGH
+  &pioD 18 GPIO_ACTIVE_HIGH>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_usb_default>;
+   status = "okay";
+};
+
+&usb2 {
+   status = "okay";
+};
diff --git a/arch/arm/dts/sam9x60.dtsi b/arch/arm/dts/sam9x60.dtsi
index 17224ef771..e36a540f78 100644
--- a/arch/arm/dts/sam9x60.dtsi
+++ b/arch/arm/dts/sam9x60.dtsi
@@ -69,6 +69,24 @@
#size-cells = <1>;
ranges;
 
+   usb1: ohci@60 {
+   compatible = "atmel,at91rm9200-ohci", "usb-ohci";
+   reg = <0x0060 0x10>;
+   clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc 
PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 21>;
+   clock-names = "ohci_clk", "hclk", "uhpck";
+   status = "disabled";
+   };
+
+   usb2: ehci@70 {
+   compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
+   reg = <0x0070 0x10>;
+   clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc 
PMC_TYPE_PERIPHERAL 22>;
+   clock-names = "usb_clk", "ehci_clk";
+   assigned-clocks = <&pmc PMC_TYPE_CORE 8>;
+   assigned-clock-rates = <48000>;
+   status = "disabled";
+   };
+
ebi: ebi@1000 {
compatible = "microchip,sam9x60-ebi";
#address-cells = <2>;
diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts
index 1a02e2cb79..45e2f4cc40 100644
--- a/arch/arm/dts/sam9x60ek.dts
+++ b/arch/arm/dts/sam9x60ek.dts
@@ -139,6 +139,13 @@
;
};
 
+   usb1 {
+   pinctrl_usb_default: usb_default {
+   atmel,pins = ;
+   };
+   };
+
};
};
};
@@ -213,3 +220,17 @@
phy-mode = "rmii";
status = "okay";
 };
+
+&usb1 {
+   num-ports = <3>;
+   atmel,vbus-gpio = <0
+  &pioD 15 GPIO_ACTIVE_HIGH
+  &pioD 16 GPIO_ACTIVE_HIGH>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_usb_default>;
+   status = "okay";
+};
+
+&usb2 {
+   status = "okay";
+};
-- 
2.34.1

[PATCH v3 02/19] clk: at91: Add support for sam9x60 USB clock

[Sergiu Moga]

Implement sam9x60 USB clock driver. This clock has
three parents: PLLA, UPLL and MAINXTAL. The driver is
aware of the three possible parents with the help of the
two mux tables provied to the driver during the registration
of the clock.

Signed-off-by: Sergiu Moga 
---


v1 -> v3:
- No change



 drivers/clk/at91/Kconfig   |   7 ++
 drivers/clk/at91/Makefile  |   1 +
 drivers/clk/at91/clk-sam9x60-usb.c | 156 +
 drivers/clk/at91/pmc.h |  11 ++
 4 files changed, 175 insertions(+)
 create mode 100644 drivers/clk/at91/clk-sam9x60-usb.c

diff --git a/drivers/clk/at91/Kconfig b/drivers/clk/at91/Kconfig
index 4abc8026b4..4563892647 100644
--- a/drivers/clk/at91/Kconfig
+++ b/drivers/clk/at91/Kconfig
@@ -61,3 +61,10 @@ config AT91_SAM9X60_PLL
help
  This option is used to enable the AT91 SAM9X60's PLL clock
  driver.
+
+config AT91_SAM9X60_USB
+   bool "USB Clock support for SAM9X60 SoCs"
+   depends on CLK_AT91
+   help
+ This option is used to enable the AT91 SAM9X60's USB clock
+ driver.
diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile
index 580b406d7b..e53dcb4ca7 100644
--- a/drivers/clk/at91/Makefile
+++ b/drivers/clk/at91/Makefile
@@ -9,6 +9,7 @@ obj-y += clk-peripheral.o
 obj-$(CONFIG_AT91_GENERIC_CLK) += clk-generic.o
 obj-$(CONFIG_AT91_UTMI)+= clk-utmi.o
 obj-$(CONFIG_AT91_SAM9X60_PLL) += clk-sam9x60-pll.o
+obj-$(CONFIG_AT91_SAM9X60_USB) += clk-sam9x60-usb.o
 obj-$(CONFIG_SAMA7G5)  += sama7g5.o
 obj-$(CONFIG_SAM9X60)  += sam9x60.o
 else
diff --git a/drivers/clk/at91/clk-sam9x60-usb.c 
b/drivers/clk/at91/clk-sam9x60-usb.c
new file mode 100644
index 00..0ccdc1494d
--- /dev/null
+++ b/drivers/clk/at91/clk-sam9x60-usb.c
@@ -0,0 +1,156 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * SAM9X60's USB Clock support.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sergiu Moga 
+ */
+
+#include 
+#include 
+#include 
+
+#include "pmc.h"
+
+#define UBOOT_DM_CLK_AT91_SAM9X60_USB  "at91-sam9x60-usb-clk"
+
+struct sam9x60_usb {
+   const struct clk_usbck_layout   *layout;
+   void__iomem *base;
+   struct clk  clk;
+   const u32   *clk_mux_table;
+   const u32   *mux_table;
+   const char * const  *parent_names;
+   u32 num_parents;
+   u8  id;
+};
+
+#define to_sam9x60_usb(_clk)   container_of(_clk, struct sam9x60_usb, clk)
+#define USB_MAX_DIV15
+
+static int sam9x60_usb_clk_set_parent(struct clk *clk, struct clk *parent)
+{
+   struct sam9x60_usb *usb = to_sam9x60_usb(clk);
+   u32 val, index;
+
+   index = at91_clk_mux_val_to_index(usb->clk_mux_table, usb->num_parents,
+ parent->id);
+   if (index < 0)
+   return index;
+
+   index = at91_clk_mux_index_to_val(usb->mux_table, usb->num_parents,
+ index);
+   if (index < 0)
+   return index;
+
+   pmc_read(usb->base, usb->layout->offset, &val);
+   val &= ~usb->layout->usbs_mask;
+   val |= index << (ffs(usb->layout->usbs_mask - 1));
+   pmc_write(usb->base, usb->layout->offset, val);
+
+   return 0;
+}
+
+static ulong sam9x60_usb_clk_get_rate(struct clk *clk)
+{
+   struct sam9x60_usb *usb = to_sam9x60_usb(clk);
+   ulong parent_rate = clk_get_parent_rate(clk);
+   u32 val, usbdiv;
+
+   if (!parent_rate)
+   return 0;
+
+   pmc_read(usb->base, usb->layout->offset, &val);
+   usbdiv = (val & usb->layout->usbdiv_mask) >>
+   (ffs(usb->layout->usbdiv_mask) - 1);
+   return parent_rate / (usbdiv + 1);
+}
+
+static ulong sam9x60_usb_clk_set_rate(struct clk *clk, ulong rate)
+{
+   struct sam9x60_usb *usb = to_sam9x60_usb(clk);
+   ulong parent_rate = clk_get_parent_rate(clk);
+   u32 usbdiv, val;
+
+   if (!parent_rate)
+   return 0;
+
+   usbdiv = DIV_ROUND_CLOSEST(parent_rate, rate);
+   if (usbdiv > USB_MAX_DIV + 1 || !usbdiv)
+   return 0;
+
+   pmc_read(usb->base, usb->layout->offset, &val);
+   val &= usb->layout->usbdiv_mask;
+   val |= (usbdiv - 1) << (ffs(usb->layout->usbdiv_mask) - 1);
+   pmc_write(usb->base, usb->layout->offset, val);
+
+   return parent_rate / usbdiv;
+}
+
+static const struct clk_ops sam9x60_usb_ops = {
+   .set_parent = sam9x60_usb_clk_set_parent,
+   .set_rate = sam9x60_usb_clk_set_rate,
+   .get_rate = sam9x60_usb_clk_get_rate,
+};
+
+struct clk *
+sam9x60_clk_register_usb(void __iomem *base,  const char *name,
+const char * const *parent_names, u8 num_parents,
+   

[PATCH v3 03/19] clk: at91: sam9x60: Register the required clocks for USB

[Sergiu Moga]

Register into DM the clocks required to properly enable USB functionality
within the bootloader.

Signed-off-by: Sergiu Moga 
---



v1 -> v2:
- No change


v2 -> v3:
- Remove the no longer required #if CONFIG_IS_ENABLED(AT91_SAM9X60_USB)




 drivers/clk/at91/sam9x60.c | 33 +
 1 file changed, 33 insertions(+)

diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 6b5486c6c9..14c2ffcac1 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -76,6 +76,8 @@ enum pmc_clk_ids {
ID_QSPI = 18,
 
ID_MCK_PRES = 19,
+   ID_USBCK= 20,
+   ID_UHPCK= 21,
 
ID_MAX,
 };
@@ -99,6 +101,7 @@ static const char *clk_names[] = {
[ID_PLL_A_DIV]  = "plla_divpmcck",
[ID_MCK_PRES]   = "mck_pres",
[ID_MCK_DIV]= "mck_div",
+   [ID_USBCK]  = "usbck",
 };
 
 /* Fractional PLL output range. */
@@ -171,6 +174,13 @@ static const struct clk_pcr_layout pcr_layout = {
.pid_mask = GENMASK(6, 0),
 };
 
+/* USB clock layout */
+static const struct clk_usbck_layout usbck_layout = {
+   .offset = 0x38,
+   .usbs_mask = GENMASK(1, 0),
+   .usbdiv_mask = GENMASK(11, 8),
+};
+
 /**
  * PLL clocks description
  * @n: clock name
@@ -266,6 +276,7 @@ static const struct {
u8 cid;
 } sam9x60_systemck[] = {
{ .n = "ddrck", .p = "mck_div",  .id = 2, .cid = ID_DDR, },
+   { .n = "uhpck", .p = "usbck",.id = 6, .cid = ID_UHPCK },
{ .n = "pck0",  .p = "prog0",.id = 8, .cid = ID_PCK0, },
{ .n = "pck1",  .p = "prog1",.id = 9, .cid = ID_PCK1, },
{ .n = "qspick",.p = "mck_div",  .id = 19, .cid = ID_QSPI, },
@@ -543,6 +554,28 @@ static int sam9x60_clk_probe(struct udevice *dev)
}
clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MCK_DIV), c);
 
+   /* Register usbck. */
+   p[0] = clk_names[ID_PLL_A_DIV];
+   p[1] = clk_names[ID_PLL_U_DIV];
+   p[2] = clk_names[ID_MAIN_XTAL];
+   m[0] = 0;
+   m[1] = 1;
+   m[2] = 2;
+   cm[0] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_A_DIV);
+   cm[1] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV);
+   cm[2] = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_MAIN_XTAL);
+   prepare_mux_table(clkmuxallocs, clkmuxallocindex, tmpclkmux, cm,
+ 3, fail);
+   prepare_mux_table(muxallocs, muxallocindex, tmpmux, m, 3, fail);
+   c = sam9x60_clk_register_usb(base, clk_names[ID_USBCK], p, 3,
+&usbck_layout, tmpclkmux, tmpmux,
+ID_USBCK);
+   if (IS_ERR(c)) {
+   ret = PTR_ERR(c);
+   goto fail;
+   }
+   clk_dm(AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_USBCK), c);
+
/* Register programmable clocks. */
p[0] = clk_names[ID_MD_SLCK];
p[1] = clk_names[ID_TD_SLCK];
-- 
2.34.1

[PATCH v3 04/19] clk: at91: pmc: export clock setup to pmc

[Sergiu Moga]

From: Claudiu Beznea 

Clock setup was intended for setting clocks at boot time on SAMA7G5,
e.g. for root clocks like PLLs, that were used to feed IPs needed alive
in u-boot (e.g. Ethernet clock feed by a PLL). Export this functionality
to all at91 clocks as it may be necessary on other SoCs.

Signed-off-by: Claudiu Beznea 
Signed-off-by: Sergiu Moga 
---



v1 -> v2:
- Additional patch, this was not here in v1


v2 -> v3:
- Nothing



 drivers/clk/at91/pmc.c | 42 +
 drivers/clk/at91/pmc.h | 16 +
 drivers/clk/at91/sama7g5.c | 48 +-
 3 files changed, 64 insertions(+), 42 deletions(-)

diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
index 270892517a..87d2069d89 100644
--- a/drivers/clk/at91/pmc.c
+++ b/drivers/clk/at91/pmc.c
@@ -120,3 +120,45 @@ int at91_clk_mux_index_to_val(const u32 *table, u32 
num_parents, u32 index)
 
return table[index];
 }
+
+int at91_clk_setup(const struct pmc_clk_setup *setup, int size)
+{
+   struct clk *c, *parent;
+   int i, ret;
+
+   if (!size)
+   return 0;
+
+   if (!setup)
+   return -EINVAL;
+
+   for (i = 0; i < size; i++) {
+   ret = clk_get_by_id(setup[i].cid, &c);
+   if (ret)
+   return ret;
+
+   if (setup[i].pid) {
+   ret = clk_get_by_id(setup[i].pid, &parent);
+   if (ret)
+   return ret;
+
+   ret = clk_set_parent(c, parent);
+   if (ret)
+   return ret;
+
+   if (setup[i].prate) {
+   ret = clk_set_rate(parent, setup[i].prate);
+   if (ret < 0)
+   return ret;
+   }
+   }
+
+   if (setup[i].rate) {
+   ret = clk_set_rate(c, setup[i].rate);
+   if (ret < 0)
+   return ret;
+   }
+   }
+
+   return 0;
+}
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 17793b8802..ff464522aa 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -77,6 +77,20 @@ struct clk_usbck_layout {
u32 usbdiv_mask;
 };
 
+/**
+ * Clock setup description
+ * @cid:   clock id corresponding to clock subsystem
+ * @pid:   parent clock id corresponding to clock subsystem
+ * @rate:  clock rate
+ * @prate: parent rate
+ */
+struct pmc_clk_setup {
+   unsigned int cid;
+   unsigned int pid;
+   unsigned long rate;
+   unsigned long prate;
+};
+
 extern const struct clk_programmable_layout at91rm9200_programmable_layout;
 extern const struct clk_programmable_layout at91sam9g45_programmable_layout;
 extern const struct clk_programmable_layout at91sam9x5_programmable_layout;
@@ -160,4 +174,6 @@ void pmc_write(void __iomem *base, unsigned int off, 
unsigned int val);
 void pmc_update_bits(void __iomem *base, unsigned int off, unsigned int mask,
unsigned int bits);
 
+int at91_clk_setup(const struct pmc_clk_setup *setup, int size);
+
 #endif
diff --git a/drivers/clk/at91/sama7g5.c b/drivers/clk/at91/sama7g5.c
index d1ec3c82b5..8bd9c14156 100644
--- a/drivers/clk/at91/sama7g5.c
+++ b/drivers/clk/at91/sama7g5.c
@@ -1070,19 +1070,8 @@ static const struct {
},
 };
 
-/**
- * Clock setup description
- * @cid:   clock id corresponding to clock subsystem
- * @pid:   parent clock id corresponding to clock subsystem
- * @rate:  clock rate
- * @prate: parent rate
- */
-static const struct pmc_clk_setup {
-   unsigned int cid;
-   unsigned int pid;
-   unsigned long rate;
-   unsigned long prate;
-} sama7g5_clk_setup[] = {
+/* Clock setup description */
+static const struct pmc_clk_setup sama7g5_clk_setup[] = {
{
.cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_ETH_FRAC),
.rate = 62500,
@@ -1119,7 +1108,7 @@ static int sama7g5_clk_probe(struct udevice *dev)
unsigned int *muxallocs[SAMA7G5_MAX_MUX_ALLOCS];
const char *p[10];
unsigned int cm[10], m[10], *tmpclkmux, *tmpmux;
-   struct clk clk, *c, *parent;
+   struct clk clk, *c;
bool main_osc_bypass;
int ret, muxallocindex = 0, clkmuxallocindex = 0, i, j;
 
@@ -1353,34 +1342,9 @@ static int sama7g5_clk_probe(struct udevice *dev)
}
 
/* Setup clocks. */
-   for (i = 0; i < ARRAY_SIZE(sama7g5_clk_setup); i++) {
-   ret = clk_get_by_id(sama7g5_clk_setup[i].cid, &c);
-   if (ret)
-   goto fail;
-
-   if (sama7g5_clk_setup[i].pid) {
-   ret = clk_get_by_id(sama7g5_clk_setup[i].pid, &parent);
-   if (ret)
-   goto fail;
-
- 

[PATCH v3 05/19] clk: at91: sam9x60: Add initial setup of UPLL and USBCK rates

[Sergiu Moga]

In order for some of the functionalities, such as the USB clocks,
to work properly we need some clocks to be properly initialised
at the very beginning of booting.

Signed-off-by: Sergiu Moga 
---

v1 -> v2:
- Adapted according to the additional 04/19 PATCH, now making use of
`at91_clk_setup`



v2 -> v3:
- No change


 drivers/clk/at91/sam9x60.c | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/drivers/clk/at91/sam9x60.c b/drivers/clk/at91/sam9x60.c
index 14c2ffcac1..e2f72446d5 100644
--- a/drivers/clk/at91/sam9x60.c
+++ b/drivers/clk/at91/sam9x60.c
@@ -378,6 +378,31 @@ static const struct {
{ .n = "dbgu_gclk",   .id = 47, },
 };
 
+/**
+ * Clock setup description
+ * @cid:   clock id corresponding to clock subsystem
+ * @pid:   parent clock id corresponding to clock subsystem
+ * @rate:  clock rate
+ * @prate: parent rate
+ */
+static const struct pmc_clk_setup sam9x60_clk_setup[] = {
+   {
+   .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_FRAC),
+   .rate = 96000,
+   },
+
+   {
+   .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV),
+   .rate = 48000,
+   },
+
+   {
+   .cid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_USBCK),
+   .pid = AT91_TO_CLK_ID(PMC_TYPE_CORE, ID_PLL_U_DIV),
+   .rate = 4800,
+   },
+};
+
 #define prepare_mux_table(_allocs, _index, _dst, _src, _num, _label)   \
do {\
int _i; \
@@ -668,6 +693,11 @@ static int sam9x60_clk_probe(struct udevice *dev)
clk_dm(AT91_TO_CLK_ID(PMC_TYPE_GCK, sam9x60_gck[i].id), c);
}
 
+   /* Setup clocks. */
+   ret = at91_clk_setup(sam9x60_clk_setup, ARRAY_SIZE(sam9x60_clk_setup));
+   if (ret)
+   goto fail;
+
return 0;
 
 fail:
-- 
2.34.1

[PATCH v3 06/19] usb: ohci-at91: Enable OHCI functionality and register into DM

[Sergiu Moga]

Register the OHCI driver into DM by properly initializing the required
clocks and pins required by the DT node of OHCI. In order for the VBUS
to stay enabled, a `child_pre_probe` method has been added to overcome
the DM core disabling it in `usb_scan_device`: when the generic
`device_probe` method is called, the pinctrl is processed once again,
undoing whatever changes have been made in our driver's probe method.

Signed-off-by: Sergiu Moga 
---



v1 -> v2:
- Move ` #include ` below `#if !(CONFIG_IS_ENABLED(DM_USB))` to
avoid implicit declarations warnings/errors


v2 -> v3:
- No change



 drivers/usb/host/ohci-at91.c | 183 +++
 1 file changed, 183 insertions(+)

diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 9b955c1bd6..8a10a29564 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -5,6 +5,9 @@
  */
 
 #include 
+
+#if !(CONFIG_IS_ENABLED(DM_USB))
+
 #include 
 
 int usb_cpu_init(void)
@@ -62,3 +65,183 @@ int usb_cpu_init_fail(void)
 {
return usb_cpu_stop();
 }
+
+#elif CONFIG_IS_ENABLED(DM_GPIO)
+
+#include 
+#include 
+#include 
+#include 
+#include "ohci.h"
+
+#define AT91_MAX_USBH_PORTS3
+
+#define at91_for_each_port(index)  \
+   for ((index) = 0; (index) < AT91_MAX_USBH_PORTS; (index)++)
+
+struct at91_usbh_data {
+   enum usb_init_type init_type;
+   struct gpio_desc vbus_pin[AT91_MAX_USBH_PORTS];
+   u8 ports;   /* number of ports on root hub 
*/
+};
+
+struct ohci_at91_priv {
+   struct clk *iclk;
+   struct clk *fclk;
+   struct clk *hclk;
+   bool clocked;
+};
+
+static void at91_start_clock(struct ohci_at91_priv *ohci_at91)
+{
+   if (ohci_at91->clocked)
+   return;
+
+   clk_set_rate(ohci_at91->fclk, 4800);
+   clk_prepare_enable(ohci_at91->hclk);
+   clk_prepare_enable(ohci_at91->iclk);
+   clk_prepare_enable(ohci_at91->fclk);
+   ohci_at91->clocked = true;
+}
+
+static void at91_stop_clock(struct ohci_at91_priv *ohci_at91)
+{
+   if (!ohci_at91->clocked)
+   return;
+
+   clk_disable_unprepare(ohci_at91->fclk);
+   clk_disable_unprepare(ohci_at91->iclk);
+   clk_disable_unprepare(ohci_at91->hclk);
+   ohci_at91->clocked = false;
+}
+
+static void ohci_at91_set_power(struct at91_usbh_data *pdata, int port,
+   bool enable)
+{
+   if (!dm_gpio_is_valid(&pdata->vbus_pin[port]))
+   return;
+
+   if (enable)
+   dm_gpio_set_dir_flags(&pdata->vbus_pin[port],
+ GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE);
+   else
+   dm_gpio_set_dir_flags(&pdata->vbus_pin[port], 0);
+}
+
+static void at91_start_hc(struct udevice *dev)
+{
+   struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+
+   at91_start_clock(ohci_at91);
+}
+
+static void at91_stop_hc(struct udevice *dev)
+{
+   struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+
+   at91_stop_clock(ohci_at91);
+}
+
+static int ohci_atmel_deregister(struct udevice *dev)
+{
+   struct at91_usbh_data *pdata = dev_get_plat(dev);
+   int i;
+
+   at91_stop_hc(dev);
+
+   at91_for_each_port(i) {
+   if (i >= pdata->ports)
+   break;
+
+   ohci_at91_set_power(pdata, i, false);
+   }
+
+   return ohci_deregister(dev);
+}
+
+static int ohci_atmel_child_pre_probe(struct udevice *dev)
+{
+   struct udevice *ohci_controller = dev_get_parent(dev);
+   struct at91_usbh_data *pdata = dev_get_plat(ohci_controller);
+   int i;
+
+   at91_for_each_port(i) {
+   if (i >= pdata->ports)
+   break;
+
+   ohci_at91_set_power(pdata, i, true);
+   }
+
+   return 0;
+}
+
+static int ohci_atmel_probe(struct udevice *dev)
+{
+   struct at91_usbh_data *pdata = dev_get_plat(dev);
+   struct ohci_at91_priv *ohci_at91 = dev_get_priv(dev);
+   int   i;
+   int   ret;
+   u32   ports;
+   struct ohci_regs  *regs = (struct ohci_regs *)dev_read_addr(dev);
+
+   if (!dev_read_u32(dev, "num-ports", &ports))
+   pdata->ports = ports;
+
+   at91_for_each_port(i) {
+   if (i >= pdata->ports)
+   break;
+
+   gpio_request_by_name(dev, "atmel,vbus-gpio", i,
+&pdata->vbus_pin[i], GPIOD_IS_OUT |
+GPIOD_IS_OUT_ACTIVE);
+   }
+
+   ohci_at91->iclk = devm_clk_get(dev, "ohci_clk");
+   if (IS_ERR(ohci_at91->iclk)) {
+   ret = PTR_ERR(ohci_at91->iclk);
+   goto fail;
+   }
+
+   ohci_at91->fclk = devm_clk_get(dev, "uhpck");
+   if (IS_ERR(ohci_at91->fclk)) {
+   ret = PTR_ERR(ohci_at91->fclk);
+   goto fail;
+   }
+

[PATCH v3 07/19] dt-bindings: reset: add sama7g5 definitions

[Sergiu Moga]

Upstream linux commit 5994f58977e0.

Add reset bindings for SAMA7G5. At the moment only USB PHYs are
included.

Signed-off-by: Sergiu Moga 
---


v1 -> v3:
- No change



 include/dt-bindings/reset/sama7g5-reset.h | 10 ++
 1 file changed, 10 insertions(+)
 create mode 100644 include/dt-bindings/reset/sama7g5-reset.h

diff --git a/include/dt-bindings/reset/sama7g5-reset.h 
b/include/dt-bindings/reset/sama7g5-reset.h
new file mode 100644
index 00..2116f41d04
--- /dev/null
+++ b/include/dt-bindings/reset/sama7g5-reset.h
@@ -0,0 +1,10 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+
+#ifndef __DT_BINDINGS_RESET_SAMA7G5_H
+#define __DT_BINDINGS_RESET_SAMA7G5_H
+
+#define SAMA7G5_RESET_USB_PHY1 4
+#define SAMA7G5_RESET_USB_PHY2 5
+#define SAMA7G5_RESET_USB_PHY3 6
+
+#endif /* __DT_BINDINGS_RESET_SAMA7G5_H */
-- 
2.34.1

[PATCH v3 08/19] dt-bindings: clk: at91: Define additional UTMI related clocks

[Sergiu Moga]

Add definitions for an additional main UTMI clock as well as its
respective subclocks.

Signed-off-by: Sergiu Moga 
---

v1 -> v3:
- No change


 include/dt-bindings/clk/at91.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bindings/clk/at91.h
index e30756b280..386f01cf31 100644
--- a/include/dt-bindings/clk/at91.h
+++ b/include/dt-bindings/clk/at91.h
@@ -18,5 +18,10 @@
 #define PMC_TYPE_PERIPHERAL3
 #define PMC_TYPE_GCK   4
 #define PMC_TYPE_SLOW  5
+#define UTMI   6
+
+#define UTMI1  0
+#define UTMI2  1
+#define UTMI3  2
 
 #endif
-- 
2.34.1

[PATCH v3 09/19] ARM: dts: at91: sama7: Add USB related DT nodes

[Sergiu Moga]

Add the USB related DT nodes for the sama7g5ek board.

Signed-off-by: Sergiu Moga 
---


v1 -> v3:
- No change



 arch/arm/dts/at91-sama7g5ek.dts | 34 +++
 arch/arm/dts/sama7g5.dtsi   | 73 +
 2 files changed, 107 insertions(+)

diff --git a/arch/arm/dts/at91-sama7g5ek.dts b/arch/arm/dts/at91-sama7g5ek.dts
index 9b247fcaf6..31adc4d3e7 100644
--- a/arch/arm/dts/at91-sama7g5ek.dts
+++ b/arch/arm/dts/at91-sama7g5ek.dts
@@ -761,6 +761,11 @@
pinmux = ;
bias-disable;
};
+
+   pinctrl_usb_default: usb_default {
+   pinmux = ;
+   bias-disable;
+   };
 };
 
 &pwm {
@@ -837,6 +842,35 @@
status = "okay";
 };
 
+&usb2 {
+   num-ports = <3>;
+   atmel,vbus-gpio = <0
+  0
+  &pioA PIN_PC6 GPIO_ACTIVE_HIGH
+ >;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_usb_default>;
+   phys = <&usb_phy2>;
+   phy-names = "usb";
+   status = "okay";
+};
+
+&usb3 {
+   status = "okay";
+};
+
+&usb_phy0 {
+   status = "okay";
+};
+
+&usb_phy1 {
+   status = "okay";
+};
+
+&usb_phy2 {
+   status = "okay";
+};
+
 &vddout25 {
vin-supply = <&vdd_3v3>;
status = "okay";
diff --git a/arch/arm/dts/sama7g5.dtsi b/arch/arm/dts/sama7g5.dtsi
index 6388a60e53..a6521aaa82 100644
--- a/arch/arm/dts/sama7g5.dtsi
+++ b/arch/arm/dts/sama7g5.dtsi
@@ -16,6 +16,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 / {
model = "Microchip SAMA7G5 family SoC";
@@ -103,6 +105,54 @@
};
};
 
+   utmi_clk: utmi-clk {
+   compatible = "microchip,sama7g5-utmi-clk";
+   sfr-phandle = <&sfr>;
+   #clock-cells = <1>;
+   clocks = <&pmc PMC_TYPE_CORE 27>;
+   clock-names = "utmi_clk";
+   resets = <&reset_controller SAMA7G5_RESET_USB_PHY1>,
+<&reset_controller SAMA7G5_RESET_USB_PHY2>,
+<&reset_controller SAMA7G5_RESET_USB_PHY3>;
+   reset-names = "usb0_reset", "usb1_reset", "usb2_reset";
+   };
+
+   utmi {
+   compatible = "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   usb_phy0: phy@0 {
+   compatible = "microchip,sama7g5-usb-phy";
+   sfr-phandle = <&sfr>;
+   reg = <0>;
+   clocks = <&utmi_clk UTMI1>;
+   clock-names = "utmi_clk";
+   status = "disabled";
+   #phy-cells = <0>;
+   };
+
+   usb_phy1: phy@1 {
+   compatible = "microchip,sama7g5-usb-phy";
+   sfr-phandle = <&sfr>;
+   reg = <1>;
+   clocks = <&utmi_clk UTMI2>;
+   clock-names = "utmi_clk";
+   status = "disabled";
+   #phy-cells = <0>;
+   };
+
+   usb_phy2: phy@2 {
+   compatible = "microchip,sama7g5-usb-phy";
+   sfr-phandle = <&sfr>;
+   reg = <2>;
+   clocks = <&utmi_clk UTMI3>;
+   clock-names = "utmi_clk";
+   status = "disabled";
+   #phy-cells = <0>;
+   };
+   };
+
vddout25: fixed-regulator-vddout25 {
compatible = "regulator-fixed";
 
@@ -127,6 +177,24 @@
#size-cells = <1>;
ranges;
 
+   usb2: ohci@40 {
+   compatible = "microchip,sama7g5-ohci", "usb-ohci";
+   reg = <0x0040 0x10>;
+   interrupts = ;
+   clocks = <&pmc PMC_TYPE_PERIPHERAL 106>, <&utmi_clk 
UTMI1>, <&usb_clk>;
+   clock-names = "ohci_clk", "hclk", "uhpck";
+   status = "disabled";
+   };
+
+   usb3: ehci@50 {
+   compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
+   reg = <0x0050 0x10>;
+   interrupts = ;
+   clocks = <&usb_clk>, <&pmc PMC_TYPE_PERIPHERAL 106>;
+   clock-names = "usb_clk", "ehci_clk";
+   status = "disabled";
+   };
+
nfc_sram: sram@60 {
compatible = "mmio-sram";
no-memory-wc;
@@ -559,6 +627,11 @@
status = "disabled";
};
 
+   sfr: sfr@e1624000 {
+   compatible = "microchip,sama7g5-sfr", "syscon";
+   reg = <0xe1624000 0x4000>;
+   };
+
eic: interrupt-controller@e1628000 {

[PATCH v3 10/19] ARM: at91: add sama7 SFR definitions

[Sergiu Moga]

From: Cristian Birsan 

Special Function Registers(SFR) definitions for SAMA7 product family.

Signed-off-by: Cristian Birsan 
Signed-off-by: Sergiu Moga 
---



v1 -> v3:
- No change



 arch/arm/mach-at91/include/mach/sama7-sfr.h | 59 +
 1 file changed, 59 insertions(+)
 create mode 100644 arch/arm/mach-at91/include/mach/sama7-sfr.h

diff --git a/arch/arm/mach-at91/include/mach/sama7-sfr.h 
b/arch/arm/mach-at91/include/mach/sama7-sfr.h
new file mode 100644
index 00..a987ff5465
--- /dev/null
+++ b/arch/arm/mach-at91/include/mach/sama7-sfr.h
@@ -0,0 +1,59 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Microchip SFR (Special Function Registers) registers for SAMA7 family.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Cristian Birsan 
+ */
+
+#ifndef _LINUX_MFD_SYSCON_AT91_SAMA7_SFR_H
+#define _LINUX_MFD_SYSCON_AT91_SAMA7_SFR_H
+
+#define SAMA7_SFR_OHCIICR  0x00/* OHCI INT Configuration Register */
+#define SAMA7_SFR_OHCIISR  0x04/* OHCI INT Status Register */
+/* 0x08 ~ 0xe3: Reserved */
+#define SAMA7_SFR_WPMR 0xe4/* Write Protection Mode Register */
+#define SAMA7_SFR_WPSR 0xe4/* Write Protection Status Register */
+/* 0xec ~ 0x200b: Reserved */
+#define SAMA7_SFR_DEBUG0x200c  /* Debug Register */
+
+/* 0x2010 ~ 0x2027: Reserved */
+#define SAMA7_SFR_EHCIOHCI 0x2020  /* EHCI OHCI Clock Configuration Reg */
+
+#define SAMA7_SFR_HSS_AXI_QOS  0x2028  /* HSS AXI QOS Register */
+#define SAMA7_SFR_UDDRC0x202c  /* UDDRC Register */
+#define SAMA7_SFR_CAN_SRAM_SEL 0x2030  /* CAN SRAM Select. Register */
+/* 0x2034 ~ 0x203f: Reserved */
+
+#define SAMA7_SFR_UTMI00x2040
+#define SAMA7_SFR_UTMI0R(x)(SAMA7_SFR_UTMI0 + 4 * (x))
+
+#define SAMA7_SFR_UTMI0R0  0x2040  /* UTMI0 Configuration Register */
+#define SAMA7_SFR_UTMI0R1  0x2044  /* UTMI1 Configuration Register */
+#define SAMA7_SFR_UTMI0R2  0x2048  /* UTMI2 Configuration Register */
+
+/* Field definitions */
+#define SAMA7_SFR_OHCIICR_ARIE BIT(0)
+#define SAMA7_SFR_OHCIICR_APPSTART BIT(1)
+#define SAMA7_SFR_OHCIICR_USB_SUSP(x)  BIT(8 + (x))
+#define SAMA7_SFR_OHCIICR_USB_SUSPEND  GENMASK(10, 8)
+
+#define SAMA7_SFR_OHCIISR_RIS(x)   BIT(x)
+
+#define SAMA7_SFR_WPMR_WPENBIT(0)
+#define SAMA7_SFR_WPMR_KEY 0x53465200 /* SFR in ASCII*/
+#define SAMA7_SFR_WPMR_WPKEY_MASK  GENMASK(31, 8)
+
+#define SAMA7_SFR_WPSR_WPSRC_MASK  GENMASK(23, 8)
+#define SAMA7_SFR_WPSR_WPVS_MASK   BIT(0)
+
+#define SAMA7_SFR_CAN_SRAM_UPPER(x)BIT(x)
+
+#define SAMA7_SFR_UTMI_RX_VBUS BIT(25) /* VBUS Valid bit */
+#define SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X BIT(23) /* TXPREEMPAMPTUNE 1x */
+#define SAMA7_SFR_UTMI_COMMONONBIT(3)  /* PLL Common 
ON bit */
+
+#define SAMA7_SFR_EHCIOHCI_PHYCLK  BIT(1)  /* Alternate PHY Clk */
+
+#endif /* _LINUX_MFD_SYSCON_AT91_SAMA7_SFR_H */
-- 
2.34.1

[PATCH v3 11/19] reset: at91: Add reset driver for basic assert/deassert operations

[Sergiu Moga]

Add support for at91 reset controller's basic assert/deassert
operations. Since this driver conflicts with the
SYSRESET driver because they both bind to the same RSTC node,
implement a custom bind hook that would manually bind the
sysreset driver, if enabled, to the same RSTC DT node.
Furthermore, delete the no longer needed compatibles from the
SYSRESET driver and rename it to make sure than any possible
conflicts are avoided.

Signed-off-by: Sergiu Moga 
Tested-by: Mihai Sain 
Reviewed-by: Claudiu Beznea 
---


v1 -> v3:
- No change


 drivers/reset/Kconfig|   8 ++
 drivers/reset/Makefile   |   1 +
 drivers/reset/reset-at91.c   | 141 +++
 drivers/sysreset/sysreset_at91.c |  10 +--
 4 files changed, 151 insertions(+), 9 deletions(-)
 create mode 100644 drivers/reset/reset-at91.c

diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
index 4cb0ba0850..e4039d7474 100644
--- a/drivers/reset/Kconfig
+++ b/drivers/reset/Kconfig
@@ -211,4 +211,12 @@ config RESET_DRA7
help
  Support for TI DRA7-RESET subsystem. Basic Assert/Deassert
  is supported.
+
+config RESET_AT91
+   bool "Enable support for Microchip/Atmel Reset Controller driver"
+   depends on DM_RESET && ARCH_AT91
+   help
+ This enables the Reset Controller driver support for Microchip/Atmel
+ SoCs. Mainly used to expose assert/deassert methods to other drivers
+ that require it.
 endmenu
diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
index 0620b62809..6c8b45ecba 100644
--- a/drivers/reset/Makefile
+++ b/drivers/reset/Makefile
@@ -31,3 +31,4 @@ obj-$(CONFIG_RESET_RASPBERRYPI) += reset-raspberrypi.o
 obj-$(CONFIG_RESET_SCMI) += reset-scmi.o
 obj-$(CONFIG_RESET_ZYNQMP) += reset-zynqmp.o
 obj-$(CONFIG_RESET_DRA7) += reset-dra7.o
+obj-$(CONFIG_RESET_AT91) += reset-at91.o
diff --git a/drivers/reset/reset-at91.c b/drivers/reset/reset-at91.c
new file mode 100644
index 00..165c87acdc
--- /dev/null
+++ b/drivers/reset/reset-at91.c
@@ -0,0 +1,141 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for Atmel/Microchip Reset Controller.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sergiu Moga 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct at91_reset {
+   void __iomem *dev_base;
+   struct at91_reset_data *data;
+};
+
+struct at91_reset_data {
+   u32 n_device_reset;
+   u8 device_reset_min_id;
+   u8 device_reset_max_id;
+};
+
+static const struct at91_reset_data sama7g5_data = {
+   .n_device_reset = 3,
+   .device_reset_min_id = SAMA7G5_RESET_USB_PHY1,
+   .device_reset_max_id = SAMA7G5_RESET_USB_PHY3,
+};
+
+static int at91_rst_update(struct at91_reset *reset, unsigned long id,
+  bool assert)
+{
+   u32 val;
+
+   if (!reset->dev_base)
+   return 0;
+
+   val = readl(reset->dev_base);
+   if (assert)
+   val |= BIT(id);
+   else
+   val &= ~BIT(id);
+   writel(val, reset->dev_base);
+
+   return 0;
+}
+
+static int at91_reset_of_xlate(struct reset_ctl *reset_ctl,
+  struct ofnode_phandle_args *args)
+{
+   struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
+
+   if (!reset->data->n_device_reset ||
+   args->args[0] < reset->data->device_reset_min_id ||
+   args->args[0] > reset->data->device_reset_max_id)
+   return -EINVAL;
+
+   reset_ctl->id = args->args[0];
+
+   return 0;
+}
+
+static int at91_rst_assert(struct reset_ctl *reset_ctl)
+{
+   struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
+
+   return at91_rst_update(reset, reset_ctl->id, true);
+}
+
+static int at91_rst_deassert(struct reset_ctl *reset_ctl)
+{
+   struct at91_reset *reset = dev_get_priv(reset_ctl->dev);
+
+   return at91_rst_update(reset, reset_ctl->id, false);
+}
+
+struct reset_ops at91_reset_ops = {
+   .of_xlate = at91_reset_of_xlate,
+   .rst_assert = at91_rst_assert,
+   .rst_deassert = at91_rst_deassert,
+};
+
+static int at91_reset_probe(struct udevice *dev)
+{
+   struct at91_reset *reset = dev_get_priv(dev);
+   struct clk sclk;
+   int ret;
+
+   reset->data = (struct at91_reset_data *)dev_get_driver_data(dev);
+   reset->dev_base = dev_remap_addr_index(dev, 1);
+   if (reset->data && reset->data->n_device_reset && !reset->dev_base)
+   return -EINVAL;
+
+   ret = clk_get_by_index(dev, 0, &sclk);
+   if (ret)
+   return ret;
+
+   return clk_prepare_enable(&sclk);
+}
+
+static int at91_reset_bind(struct udevice *dev)
+{
+   struct udevice *at91_sysreset;
+
+   if (CONFIG_IS_ENABLED(SYSRESET_AT91))
+   return device_bind_driver_to_node(dev, "at91_sysreset",
+ "at91_sysreset",
+

[PATCH v3 12/19] phy: at91: Add support for the USB 2.0 PHY's of SAMA7

[Sergiu Moga]

In order to have USB functionality, drivers for SAMA7's
USB 2.0 PHY's have been added. There is one driver
for UTMI clock's SFR and RESET required functionalities and
one for its three possible subclocks of the phy's themselves.
In order for this layout to properly work in conjunction with
CCF and DT, the former driver will also act as a clock provider
for the three phy's with the help of a custom hook into the
driver's of_xlate method.

Signed-off-by: Sergiu Moga 
Tested-by: Mihai Sain 
---

v1 -> v3:
- No change


 drivers/phy/Kconfig  |  10 ++
 drivers/phy/Makefile |   1 +
 drivers/phy/phy-sama7-usb.c  |  92 ++
 drivers/phy/phy-sama7-utmi-clk.c | 202 +++
 4 files changed, 305 insertions(+)
 create mode 100644 drivers/phy/phy-sama7-usb.c
 create mode 100644 drivers/phy/phy-sama7-utmi-clk.c

diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
index cf4d5908d7..9fbb956783 100644
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -281,6 +281,16 @@ config PHY_XILINX_ZYNQMP
  Enable this to support ZynqMP High Speed Gigabit Transceiver
  that is part of ZynqMP SoC.
 
+config PHY_MICROCHIP_SAMA7_USB
+   tristate "Microchip SAMA7 USB 2.0 PHY"
+   depends on PHY && ARCH_AT91
+   help
+Enable this to support SAMA7 USB 2.0 PHY.
+
+The USB 2.0 PHY integrates high-speed, full-speed and low-speed
+termination and signal switching. With a single resistor, it
+requires minimal external components.
+
 source "drivers/phy/rockchip/Kconfig"
 source "drivers/phy/cadence/Kconfig"
 source "drivers/phy/ti/Kconfig"
diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
index a3b9f3c5b1..9d50affd47 100644
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
 obj-$(CONFIG_PHY_NPCM_USB) += phy-npcm-usb.o
 obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o
 obj-$(CONFIG_PHY_XILINX_ZYNQMP) += phy-zynqmp.o
+obj-$(CONFIG_PHY_MICROCHIP_SAMA7_USB)  += phy-sama7-utmi-clk.o phy-sama7-usb.o
 obj-y += cadence/
 obj-y += ti/
 obj-y += qcom/
diff --git a/drivers/phy/phy-sama7-usb.c b/drivers/phy/phy-sama7-usb.c
new file mode 100644
index 00..b6fe40ecc1
--- /dev/null
+++ b/drivers/phy/phy-sama7-usb.c
@@ -0,0 +1,92 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for Atmel/Microchip USB PHY's.
+ *
+ * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
+ *
+ * Author: Sergiu Moga 
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+struct sama7_usb_phy {
+   struct clk *uclk;
+   struct regmap *sfr;
+   int port;
+};
+
+int sama7_usb_phy_init(struct phy *phy)
+{
+   struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+   int port = sama7_phy->port;
+
+   regmap_update_bits(sama7_phy->sfr, SAMA7_SFR_UTMI0R(port),
+  SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X,
+  SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X);
+
+   regmap_update_bits(sama7_phy->sfr, SAMA7_SFR_UTMI0R(port),
+  SAMA7_SFR_UTMI_RX_VBUS,
+  SAMA7_SFR_UTMI_RX_VBUS);
+
+   return 0;
+}
+
+int sama7_phy_power_on(struct phy *phy)
+{
+   struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+
+   clk_prepare_enable(sama7_phy->uclk);
+
+   return 0;
+}
+
+int sama7_phy_power_off(struct phy *phy)
+{
+   struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
+
+   clk_disable_unprepare(sama7_phy->uclk);
+
+   return 0;
+}
+
+int sama7_usb_phy_probe(struct udevice *dev)
+{
+   struct sama7_usb_phy *sama7_phy = dev_get_priv(dev);
+
+   sama7_phy->uclk = devm_clk_get(dev, "utmi_clk");
+   if (IS_ERR(sama7_phy->uclk))
+   return PTR_ERR(sama7_phy->uclk);
+
+   sama7_phy->sfr = syscon_regmap_lookup_by_phandle(dev, "sfr-phandle");
+   if (IS_ERR(sama7_phy->sfr)) {
+   sama7_phy->sfr = NULL;
+   return PTR_ERR(sama7_phy->sfr);
+   }
+
+   return dev_read_u32(dev, "reg", &sama7_phy->port);
+}
+
+static const struct phy_ops sama7_usb_phy_ops = {
+   .init = sama7_usb_phy_init,
+   .power_on = sama7_phy_power_on,
+   .power_off = sama7_phy_power_off,
+};
+
+static const struct udevice_id sama7_usb_phy_of_match[] = {
+   { .compatible = "microchip,sama7g5-usb-phy", },
+   { },
+};
+
+U_BOOT_DRIVER(sama7_usb_phy_driver) = {
+   .name = "sama7-usb-phy",
+   .id = UCLASS_PHY,
+   .of_match = sama7_usb_phy_of_match,
+   .ops = &sama7_usb_phy_ops,
+   .probe = sama7_usb_phy_probe,
+   .priv_auto = sizeof(struct sama7_usb_phy),
+};
diff --git a/drivers/phy/phy-sama7-utmi-clk.c b/drivers/phy/phy-sama7-utmi-clk.c
new file mode 100644
index 00..ab9fddccf6
--- /dev/null
+++ b/drivers/phy/phy-sama7-utmi-clk.c
@@ -0,0 +1,202 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Support for Atmel/Microchip

[PATCH v3 13/19] usb: ohci-at91: Add USB PHY functionality

[Sergiu Moga]

Add the ability to enable/disable whatever USB PHY's are
passed to the AT91 OHCI driver through DT.

Signed-off-by: Sergiu Moga 
Tested-by: Mihai Sain 
---



v1 -> v3:
- No change



 drivers/usb/host/ohci-at91.c | 31 +++
 1 file changed, 31 insertions(+)

diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 8a10a29564..4b1aff4127 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -74,6 +74,10 @@ int usb_cpu_init_fail(void)
 #include 
 #include "ohci.h"
 
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+#include 
+#endif
+
 #define AT91_MAX_USBH_PORTS3
 
 #define at91_for_each_port(index)  \
@@ -90,6 +94,10 @@ struct ohci_at91_priv {
struct clk *fclk;
struct clk *hclk;
bool clocked;
+
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+   struct phy phy[AT91_MAX_USBH_PORTS];
+#endif
 };
 
 static void at91_start_clock(struct ohci_at91_priv *ohci_at91)
@@ -97,6 +105,13 @@ static void at91_start_clock(struct ohci_at91_priv 
*ohci_at91)
if (ohci_at91->clocked)
return;
 
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+   int i;
+
+   at91_for_each_port(i)
+   generic_phy_power_on(&ohci_at91->phy[i]);
+#endif
+
clk_set_rate(ohci_at91->fclk, 4800);
clk_prepare_enable(ohci_at91->hclk);
clk_prepare_enable(ohci_at91->iclk);
@@ -109,6 +124,13 @@ static void at91_stop_clock(struct ohci_at91_priv 
*ohci_at91)
if (!ohci_at91->clocked)
return;
 
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+   int i;
+
+   at91_for_each_port(i)
+   generic_phy_power_off(&ohci_at91->phy[i]);
+#endif
+
clk_disable_unprepare(ohci_at91->fclk);
clk_disable_unprepare(ohci_at91->iclk);
clk_disable_unprepare(ohci_at91->hclk);
@@ -214,6 +236,14 @@ static int ohci_atmel_probe(struct udevice *dev)
goto fail;
}
 
+#if CONFIG_IS_ENABLED(PHY_MICROCHIP_SAMA7_USB)
+   at91_for_each_port(i) {
+   generic_phy_get_by_index(dev, i, &ohci_at91->phy[i]);
+   generic_phy_init(&ohci_at91->phy[i]);
+   generic_phy_configure(&ohci_at91->phy[i], NULL);
+   }
+#endif
+
at91_start_hc(dev);
 
return ohci_register(dev, regs);
@@ -228,6 +258,7 @@ fail:
 
 static const struct udevice_id ohci_usb_ids[] = {
{ .compatible = "atmel,at91rm9200-ohci", },
+   { .compatible = "microchip,sama7g5-ohci", },
{ }
 };
 
-- 
2.34.1

[PATCH v3 15/19] ARM: dts: at91: sama5d27_wlsom1_ek: Add pinctrl nodes for USB DT nodes

[Sergiu Moga]

Add the pinctrl nodes required by the USB related DT nodes.

Signed-off-by: Sergiu Moga 
---




v1 -> v3:
- No change



 arch/arm/dts/at91-sama5d27_wlsom1_ek.dts | 25 
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts 
b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
index eec183d5de..6d4b35ea96 100644
--- a/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
+++ b/arch/arm/dts/at91-sama5d27_wlsom1_ek.dts
@@ -143,7 +143,32 @@
pinmux = ;
bias-pull-up;
};
+
+   pinctrl_usb_default: usb_default {
+   pinmux = ;
+   bias-disable;
+   };
+
+   pinctrl_usba_vbus: usba_vbus {
+   pinmux = ;
+   bias-disable;
+   };
};
};
};
 };
+
+&usb1 {
+   num-ports = <3>;
+   atmel,vbus-gpio = <0
+  &pioA PIN_PA10 GPIO_ACTIVE_HIGH
+  0
+ >;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_usb_default>;
+   status = "okay";
+};
+
+&usb2 {
+   status = "okay";
+};
-- 
2.34.1

[PATCH v3 17/19] configs: at91: sama5d2: Enable OHCI/EHCI related configs

[Sergiu Moga]

Enable the OHCI and EHCI related configs required in order to be
able to use the USB command properly.

Signed-off-by: Sergiu Moga 
---



v1 -> v2:
- No change


v2 -> v3:
- Also add CONFIG_RESET_AT91 to enable RSTC



 configs/sama5d27_giantboard_defconfig  | 4 
 configs/sama5d27_som1_ek_mmc1_defconfig| 4 
 configs/sama5d27_som1_ek_mmc_defconfig | 4 
 configs/sama5d27_som1_ek_qspiflash_defconfig   | 4 
 configs/sama5d27_wlsom1_ek_mmc_defconfig   | 5 +
 configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 4 
 configs/sama5d2_icp_mmc_defconfig  | 8 
 configs/sama5d2_icp_qspiflash_defconfig| 4 
 configs/sama5d2_ptc_ek_mmc_defconfig   | 4 
 configs/sama5d2_ptc_ek_nandflash_defconfig | 4 
 configs/sama5d2_xplained_emmc_defconfig| 4 
 configs/sama5d2_xplained_mmc_defconfig | 4 
 configs/sama5d2_xplained_qspiflash_defconfig   | 4 
 configs/sama5d2_xplained_spiflash_defconfig| 4 
 14 files changed, 61 insertions(+)

diff --git a/configs/sama5d27_giantboard_defconfig 
b/configs/sama5d27_giantboard_defconfig
index d08a42d911..d33b886116 100644
--- a/configs/sama5d27_giantboard_defconfig
+++ b/configs/sama5d27_giantboard_defconfig
@@ -81,6 +81,8 @@ CONFIG_DM_SPI_FLASH=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
@@ -95,6 +97,8 @@ CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_SPL_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ATMEL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig 
b/configs/sama5d27_som1_ek_mmc1_defconfig
index 93ae714b62..a1f17e0f16 100644
--- a/configs/sama5d27_som1_ek_mmc1_defconfig
+++ b/configs/sama5d27_som1_ek_mmc1_defconfig
@@ -93,6 +93,8 @@ CONFIG_MACB=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
@@ -108,6 +110,8 @@ CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_SPL_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ATMEL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
diff --git a/configs/sama5d27_som1_ek_mmc_defconfig 
b/configs/sama5d27_som1_ek_mmc_defconfig
index 5096366de7..67deb04af2 100644
--- a/configs/sama5d27_som1_ek_mmc_defconfig
+++ b/configs/sama5d27_som1_ek_mmc_defconfig
@@ -93,6 +93,8 @@ CONFIG_MACB=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
@@ -108,6 +110,8 @@ CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_SPL_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ATMEL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig 
b/configs/sama5d27_som1_ek_qspiflash_defconfig
index d7c7f42c93..265c1df32c 100644
--- a/configs/sama5d27_som1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_som1_ek_qspiflash_defconfig
@@ -92,6 +92,8 @@ CONFIG_MACB=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
@@ -107,6 +109,8 @@ CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_SPL_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ATMEL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig 
b/configs/sama5d27_wlsom1_ek_mmc_defconfig
index 7634a6c68f..3aa2dfda8f 100644
--- a/configs/sama5d27_wlsom1_ek_mmc_defconfig
+++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig
@@ -56,6 +56,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_BOOTP_BOOTFILESIZE=y
 CONFIG_CMD_MII=y
@@ -98,6 +99,8 @@ CONFIG_MACB=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
@@ -113,6 +116,8 @@ CONFIG_ATMEL_PIT_TIMER=y
 CONFIG_SPL_ATMEL_PIT_TIMER=y
 CONFIG_USB=y
 CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ATMEL=y
 CONFIG_USB_STORAGE=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_ATMEL_USBA=y
diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig 
b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
index bb018d4c69..9a5b98df92 100644
--- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
+++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig
@@ -102,6 +102,8 @@ CONFIG_MACB=y
 CONFIG_PINCTRL=y
 CONFIG_SPL_PINCTRL=y
 CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIA

[PATCH v3 14/19] ARM: dts: at91: sama5d2_icp: Add pinctrl nodes for USB related DT nodes

[Sergiu Moga]

Add the pinctrl subnodes required by the USB related DT nodes.

Signed-off-by: Sergiu Moga 
---


v1 -> v3:
- No change



 arch/arm/dts/at91-sama5d2_icp.dts | 22 ++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/dts/at91-sama5d2_icp.dts 
b/arch/arm/dts/at91-sama5d2_icp.dts
index 2dffae9c5c..4f796c6c94 100644
--- a/arch/arm/dts/at91-sama5d2_icp.dts
+++ b/arch/arm/dts/at91-sama5d2_icp.dts
@@ -154,7 +154,29 @@
 ;
bias-disable;
};
+
+   pinctrl_usb_default: usb_default {
+   pinmux = ;
+   bias-disable;
+   };
+
+   pinctrl_usba_vbus: usba_vbus {
+   pinmux = ;
+   bias-disable;
+   };
};
};
};
 };
+
+&usb1 {
+   num-ports = <3>;
+   pinctrl-names = "default";
+   pinctrl-0 = <&pinctrl_usb_default>;
+   status = "okay";
+};
+
+&usb2 {
+   phy_type = "hsic";
+   status = "okay";
+};
-- 
2.34.1

[PATCH v3 16/19] configs: at91: sam9x60ek: Add required configs for the USB command

[Sergiu Moga]

Add the configs required to use the USB-related functionalities within
the bootloader.

Signed-off-by: Sergiu Moga 
---


v1 -> v2:
- No change


v2 -> v3:
- Also add USB Mass Storage on SAM9X60 Curiosity
- Add CONFIG_RESET_AT91 to enable RSTC



 configs/sam9x60_curiosity_mmc_defconfig | 8 
 configs/sam9x60ek_mmc_defconfig | 9 +
 configs/sam9x60ek_nandflash_defconfig   | 9 +
 configs/sam9x60ek_qspiflash_defconfig   | 9 +
 4 files changed, 35 insertions(+)

diff --git a/configs/sam9x60_curiosity_mmc_defconfig 
b/configs/sam9x60_curiosity_mmc_defconfig
index 732b5adf26..a09e01c197 100644
--- a/configs/sam9x60_curiosity_mmc_defconfig
+++ b/configs/sam9x60_curiosity_mmc_defconfig
@@ -37,6 +37,7 @@ CONFIG_CMD_DM=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
 CONFIG_BOOTP_BOOTFILESIZE=y
@@ -54,6 +55,7 @@ CONFIG_CLK_CCF=y
 CONFIG_CLK_AT91=y
 CONFIG_AT91_GENERIC_CLK=y
 CONFIG_AT91_SAM9X60_PLL=y
+CONFIG_AT91_SAM9X60_USB=y
 CONFIG_CPU=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_I2C=y
@@ -66,11 +68,17 @@ CONFIG_PHY_MICREL=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
 CONFIG_TIMER=y
 CONFIG_MCHP_PIT64B_TIMER=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_ATMEL=y
+CONFIG_USB_STORAGE=y
 CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig
index 268a485456..f703f5f39b 100644
--- a/configs/sam9x60ek_mmc_defconfig
+++ b/configs/sam9x60ek_mmc_defconfig
@@ -40,6 +40,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
 CONFIG_BOOTP_BOOTFILESIZE=y
@@ -59,6 +60,7 @@ CONFIG_CLK_CCF=y
 CONFIG_CLK_AT91=y
 CONFIG_AT91_GENERIC_CLK=y
 CONFIG_AT91_SAM9X60_PLL=y
+CONFIG_AT91_SAM9X60_USB=y
 CONFIG_CPU=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_I2C=y
@@ -85,6 +87,8 @@ CONFIG_PHY_MICREL=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
@@ -95,6 +99,11 @@ CONFIG_SYSRESET=y
 CONFIG_SYSRESET_AT91=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ATMEL=y
+CONFIG_USB_STORAGE=y
 CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
diff --git a/configs/sam9x60ek_nandflash_defconfig 
b/configs/sam9x60ek_nandflash_defconfig
index a9cbb6e953..ff653090f7 100644
--- a/configs/sam9x60ek_nandflash_defconfig
+++ b/configs/sam9x60ek_nandflash_defconfig
@@ -41,6 +41,7 @@ CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
 CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
 CONFIG_BOOTP_BOOTFILESIZE=y
@@ -61,6 +62,7 @@ CONFIG_CLK_CCF=y
 CONFIG_CLK_AT91=y
 CONFIG_AT91_GENERIC_CLK=y
 CONFIG_AT91_SAM9X60_PLL=y
+CONFIG_AT91_SAM9X60_USB=y
 CONFIG_CPU=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_I2C=y
@@ -87,6 +89,8 @@ CONFIG_PHY_MICREL=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
@@ -97,6 +101,11 @@ CONFIG_SYSRESET=y
 CONFIG_SYSRESET_AT91=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ATMEL=y
+CONFIG_USB_STORAGE=y
 CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
diff --git a/configs/sam9x60ek_qspiflash_defconfig 
b/configs/sam9x60ek_qspiflash_defconfig
index 72f08f1375..3e8277e39a 100644
--- a/configs/sam9x60ek_qspiflash_defconfig
+++ b/configs/sam9x60ek_qspiflash_defconfig
@@ -41,6 +41,7 @@ CONFIG_CMD_I2C=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_NAND=y
 CONFIG_CMD_NAND_TRIMFFS=y
+CONFIG_CMD_USB=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_DHCP=y
 CONFIG_BOOTP_BOOTFILESIZE=y
@@ -61,6 +62,7 @@ CONFIG_CLK_CCF=y
 CONFIG_CLK_AT91=y
 CONFIG_AT91_GENERIC_CLK=y
 CONFIG_AT91_SAM9X60_PLL=y
+CONFIG_AT91_SAM9X60_USB=y
 CONFIG_CPU=y
 CONFIG_AT91_GPIO=y
 CONFIG_DM_I2C=y
@@ -86,6 +88,8 @@ CONFIG_PHY_MICREL=y
 CONFIG_MACB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
@@ -96,6 +100,11 @@ CONFIG_SYSRESET=y
 CONFIG_SYSRESET_AT91=y
 CONFIG_TIMER=y
 CONFIG_ATMEL_PIT_TIMER=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ATMEL=y
+CONFIG_USB_STORAGE=y
 CONFIG_W1=y
 CONFIG_W1_GPIO=y
 CONFIG_W1_EEPROM=y
-- 
2.34.1

[PATCH v3 18/19] configs: at91: sama7: Enable USB and RESET functionality

[Sergiu Moga]

Enable USB and RESET functionality. In order for USB to
work properly on SAMA7, the driver needs to be able
to have access to PHY's, which, in turn, need to have
access to the RSTC driver's assert/deassert functionalities.

Signed-off-by: Sergiu Moga 
Tested-by: Mihai Sain 
---



v1 -> v3:
- No change




 configs/sama7g5ek_mmc1_defconfig | 10 ++
 configs/sama7g5ek_mmc_defconfig  | 10 ++
 2 files changed, 20 insertions(+)

diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig
index f004e44803..6c92781e60 100644
--- a/configs/sama7g5ek_mmc1_defconfig
+++ b/configs/sama7g5ek_mmc1_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
@@ -68,8 +69,12 @@ CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_MACB=y
+CONFIG_PHY=y
+CONFIG_PHY_MICROCHIP_SAMA7_USB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
@@ -77,5 +82,10 @@ CONFIG_SYSRESET=y
 CONFIG_SYSRESET_AT91=y
 CONFIG_TIMER=y
 CONFIG_MCHP_PIT64B_TIMER=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ATMEL=y
+CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER_HII is not set
diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig
index 5b42fc63f3..a4e57c7ba5 100644
--- a/configs/sama7g5ek_mmc_defconfig
+++ b/configs/sama7g5ek_mmc_defconfig
@@ -38,6 +38,7 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_I2C=y
 # CONFIG_CMD_LOADS is not set
 CONFIG_CMD_MMC=y
+CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_MII=y
 CONFIG_CMD_PING=y
@@ -68,8 +69,12 @@ CONFIG_MMC_SDHCI_ATMEL=y
 CONFIG_PHY_MICREL=y
 CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_MACB=y
+CONFIG_PHY=y
+CONFIG_PHY_MICROCHIP_SAMA7_USB=y
 CONFIG_PINCTRL=y
 CONFIG_PINCTRL_AT91PIO4=y
+CONFIG_DM_RESET=y
+CONFIG_RESET_AT91=y
 CONFIG_DM_SERIAL=y
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_ATMEL_USART=y
@@ -77,5 +82,10 @@ CONFIG_SYSRESET=y
 CONFIG_SYSRESET_AT91=y
 CONFIG_TIMER=y
 CONFIG_MCHP_PIT64B_TIMER=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_ATMEL=y
+CONFIG_USB_STORAGE=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER_HII is not set
-- 
2.34.1

[PATCH v3 19/19] usb: ohci-at91: Add `ohci_t` field in `ohci_at91_priv`

[Sergiu Moga]

From: Cristian Birsan 

The `ohci_register` function expects that the OHCI driver's
priv is a struct whose first field is of type `ohci_t`.
The original conversion to DM did not have it and this
inconsistency revealed itself whenever U-Boot required
multiple memory allocations resulting in a memory overwrite
of where this field would supposedly be.

Thus, add this missing field and automatically increase
the implicit size of the driver's priv to avoid whatever
future memory allocations may take place from overwriting
it.

Fixes: de1cf0a9c6 ("drivers: usb: ohci-at91: Enable OHCI functionality and 
register into DM")
Signed-off-by: Cristian Birsan 
Signed-off-by: Sergiu Moga 
Tested-by: Mihai Sain 
---


v1 -> v3:
- No change



 drivers/usb/host/ohci-at91.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c
index 4b1aff4127..0791769026 100644
--- a/drivers/usb/host/ohci-at91.c
+++ b/drivers/usb/host/ohci-at91.c
@@ -90,6 +90,7 @@ struct at91_usbh_data {
 };
 
 struct ohci_at91_priv {
+   ohci_t ohci;
struct clk *iclk;
struct clk *fclk;
struct clk *hclk;
-- 
2.34.1

Re: [u-boot][PATCH 00/14] rawnand: omap_gpmc: driver model support

[Tom Rini]

On Mon, Dec 12, 2022 at 10:27:41AM +0100, Dario Binacchi wrote:
> Hi Roger,
> 
> On Mon, Dec 12, 2022 at 10:12 AM Roger Quadros  wrote:
> >
> > Hi Dario,
> >
> > On 11/12/2022 15:56, Dario Binacchi wrote:
> > > Hi Roger,
> > >
> > > On Fri, Nov 25, 2022 at 1:38 PM Roger Quadros  wrote:
> > >>
> > >> Hi Michael,
> > >>
> > >> On 08/11/2022 11:26, Michael Nazzareno Trimarchi wrote:
> > >>> Hi Roger
> > >>>
> > >>> On Fri, Nov 4, 2022 at 2:27 PM Roger Quadros  wrote:
> > 
> >  Hi,
> > 
> >  On 11/10/2022 14:49, Roger Quadros wrote:
> > > Hi,
> > >
> > > This series adds driver model support for rawnand: omap_gpmc
> > > and omap_elm drivers.
> > >
> > > This will enable the driver to be used on K2/K3 platforms as well.
> > 
> >  Any comments on patches 5 and later? Thanks
> > 
> > >>>
> > >>> We will try to close this week.
> > >>
> > >> Could you please give your comments on the last few patches. Thanks!
> > >>
> > >> cheers,
> > >> -roger
> > >>
> > >>>
> > >>> Michael
> > >>>
> > 
> >  cheers,
> >  -roger
> > 
> > >
> > > cheers,
> > > -roger
> > >
> > > Roger Quadros (14):
> > >   mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h
> > >   mtd: rawnand: omap_gpmc: Enable build for K2/K3 platforms
> > >   mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms
> > >   mtd: rawnand: omap_gpmc: Optimize NAND reads
> > >   mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction
> > >   mtd: rawnand: nand_base: Allow base driver to be used in SPL without
> > > nand_bbt
> > >   mtd: rawnand: nand_spl_loaders: Fix cast type build warning
> > >   mtd: rawnand: omap_gpmc: Reduce .bss usage
> > >   dt-bindings: mtd: Add ti,gpmc-nand DT binding documentation
> > >   mtd: rawnand: omap_gpmc: support u-boot driver model
> > >   mtd: rawnand: omap_gpmc: Add SPL NAND support
> > >   mtd: rawnand: omap_gpmc: Enable SYS_NAND_PAGE_COUNT for OMAP_GPMC
> > >   dt-bindings: mtd: Add ti,elm DT binding documentation
> > >   mtd: rawnand: omap_elm: u-boot driver model support
> > >
> > >  doc/device-tree-bindings/mtd/ti,elm.yaml  |  72 +++
> > >  .../mtd/ti,gpmc-nand.yaml | 129 +
> > >  drivers/mtd/nand/raw/Kconfig  |  11 +-
> > >  drivers/mtd/nand/raw/Makefile |   2 +-
> > >  drivers/mtd/nand/raw/nand_base.c  |  18 +-
> > >  drivers/mtd/nand/raw/nand_spl_loaders.c   |   2 +-
> > >  drivers/mtd/nand/raw/omap_elm.c   |  33 +-
> > >  .../mtd => drivers/mtd/nand/raw}/omap_elm.h   |   6 +
> > >  drivers/mtd/nand/raw/omap_gpmc.c  | 500 
> > > +-
> > >  9 files changed, 637 insertions(+), 136 deletions(-)
> > >  create mode 100644 doc/device-tree-bindings/mtd/ti,elm.yaml
> > >  create mode 100644 doc/device-tree-bindings/mtd/ti,gpmc-nand.yaml
> > >  rename {include/linux/mtd => drivers/mtd/nand/raw}/omap_elm.h (97%)
> > >
> > >>>
> > >>>
> > >>>
> > >
> > > I tried to merge your whole series but after the second fix and the
> > > third time the CI/CD pipeline failed
> >
> > Do you have the link to the failure?
> 
> These are the CI/CD pipelines links:
> https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/jobs/540827
> https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/jobs/540876
> but I think you don't have permission to access them.

Note that under CI settings you can make your pipeline visible to all.
It's just not the default for some reason and I'm not sure we can change
it globally.

-- 
Tom


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Description: PGP signature

Re: [PATCH v5 1/1] u-boot-initial-env: rework make target

[Tom Rini]

On Mon, Dec 12, 2022 at 02:39:09PM +0100, Max Krummenacher wrote:
> Hi Tom
> 
> On Thu, Dec 8, 2022 at 9:24 PM Tom Rini  wrote:
> >
> > On Mon, Nov 28, 2022 at 09:41:22AM +0100, Max Krummenacher wrote:
> >
> > > From: Max Krummenacher 
> > >
> > > With LTO enabled the U-Boot initial environment is no longer stored
> > > in an easy accessible section in env/common.o. I.e. the section name
> > > changes from build to build, its content maybe compressed and it is
> > > annotated with additional data.
> > >
> > > Drop trying to read the initial env with elf tools from the compiler
> > > specific object file in favour of adding and using a host tool with
> > > the only functionality of printing the initial env to stdout.
> > >
> > > See also:
> > > https://lore.kernel.org/all/927b122e-1f62-e790-f5ca-30bae4332...@foss.st.com/
> > >
> > > Signed-off-by: Max Krummenacher 
> > > Acked-by: Pali Rohár 
> > > Reviewed-by: Simon Glass 
> >
> > Applied to u-boot/next, thanks!
> 
> The commit not only fixes the use case on arm64 with LTO enabled, it also
> fixes sandbox for x86-64. For me on Fedora with a `gcc (GCC) 11.3.1 20220421`
> both `make sandbox_defconfig; make u-boot-initial-env` and
> `make sandbox_defconfig; ; make u-boot-initial-env` fail with
> ```
>   GENENV  u-boot-initial-env
> objcopy: env/common.o: can't dump section
> '.rodata.default_environment' - it does not exist: file format not
> recognized
> sed: can't read u-boot-initial-env: No such file or directory
> ```
> 
> Wouldn't that merit applying the commit to master, i.e. include it in 
> v2023.01?

You can just disable LTO, and it's been an issue for a while now. It's
also easy enough to cherry-pick if there's cases out there that can't
wait.  Thanks again for addressing the problem!

-- 
Tom


signature.asc
Description: PGP signature

[PATCH] arm64: zynqmp: Remove unused USB DT properties

[Michal Simek]

xlnx,usb-polarity, xlnx,usb-reset-mode and snps,mask_phy_reset are not
documented in dt binding and also there is no code associated with them
that's why remove them.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-dlc21-revA.dts  | 4 
 arch/arm/dts/zynqmp-g-a2197-00-revA.dts | 2 --
 arch/arm/dts/zynqmp-m-a2197-01-revA.dts | 4 
 arch/arm/dts/zynqmp-m-a2197-02-revA.dts | 4 
 arch/arm/dts/zynqmp-m-a2197-03-revA.dts | 4 
 arch/arm/dts/zynqmp-p-a2197-00-revA.dts | 4 
 6 files changed, 22 deletions(-)

diff --git a/arch/arm/dts/zynqmp-dlc21-revA.dts 
b/arch/arm/dts/zynqmp-dlc21-revA.dts
index 0461219ca3e7..bf0d89a5fcbe 100644
--- a/arch/arm/dts/zynqmp-dlc21-revA.dts
+++ b/arch/arm/dts/zynqmp-dlc21-revA.dts
@@ -154,8 +154,6 @@
 
 &usb0 {
status = "okay";
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
 };
 
 &dwc3_0 {
@@ -170,8 +168,6 @@
 
 &usb1 {
status = "disabled"; /* Any unknown issue with USB-C */
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
 };
 
 &dwc3_1 {
diff --git a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts 
b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
index e00428351cbf..02d2427809d5 100644
--- a/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-g-a2197-00-revA.dts
@@ -303,8 +303,6 @@
 
 &usb0 { /* USB0 MIO52-63 */
status = "okay";
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
 };
 
 &dwc3_0 {
diff --git a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts 
b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
index 1fa023ffb13c..2d7fe592c8f9 100644
--- a/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-01-revA.dts
@@ -461,8 +461,6 @@
 
 &usb0 {
status = "okay";
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
 };
 
 &dwc3_0 {
@@ -474,8 +472,6 @@
 
 &usb1 {
status = "disabled"; /* not at mem board */
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
 };
 
 &dwc3_1 {
diff --git a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts 
b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
index 2271a6a49065..e46748d32c03 100644
--- a/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-02-revA.dts
@@ -463,8 +463,6 @@
 
 &usb0 {
status = "okay";
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
 };
 
 &dwc3_0 {
@@ -476,8 +474,6 @@
 
 &usb1 {
status = "disabled"; /* not at mem board */
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
 };
 
 &dwc3_1 {
diff --git a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts 
b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
index a89046a818fd..f564817e2c84 100644
--- a/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
+++ b/arch/arm/dts/zynqmp-m-a2197-03-revA.dts
@@ -457,8 +457,6 @@
 
 &usb0 {
status = "okay";
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
 };
 
 &dwc3_0 {
@@ -470,8 +468,6 @@
 
 &usb1 {
status = "disabled"; /* not at mem board */
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
 };
 
 &dwc3_1 {
diff --git a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts 
b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
index b3fe42faeee8..d63deb83e3c6 100644
--- a/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
+++ b/arch/arm/dts/zynqmp-p-a2197-00-revA.dts
@@ -543,8 +543,6 @@
 
 &usb0 {
status = "okay";
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
phy-names = "usb3-phy";
phys = <&psgtr 1 PHY_TYPE_USB3 0 1>;
 };
@@ -559,8 +557,6 @@
 
 &usb1 {
status = "okay";
-   xlnx,usb-polarity = <0>;
-   xlnx,usb-reset-mode = <0>;
 };
 
 &dwc3_1 {
-- 
2.36.1

[PATCH 1/2] arm64: zynqmp: Describe TI phy as ethernet phy ID on ZCU102 RevB & up

[Michal Simek]

From: Harini Katakam 

TI phy requires a reset before PHY address detection to make sure
correct strapping via MIO is detected. Facilitate the same using
ethernet-phy-id compatible string. GPIO reset entry will be added in
a separate commit.
This support is present in RevA but needs to be extended to RevB/1.0/1.1
versions which are built on top.

Fixes: 13622c7a9dfa ("arm64: zynqmp: Describe TI phy as ethernet-phy-id")
Signed-off-by: Harini Katakam 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-zcu102-revB.dts | 22 +-
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts 
b/arch/arm/dts/zynqmp-zcu102-revB.dts
index 2422558b7484..b2f0b1133175 100644
--- a/arch/arm/dts/zynqmp-zcu102-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revB.dts
@@ -16,16 +16,20 @@
 
 &gem3 {
phy-handle = <&phyc>;
-   phyc: ethernet-phy@c {
-   reg = <0xc>;
-   ti,rx-internal-delay = <0x8>;
-   ti,tx-internal-delay = <0xa>;
-   ti,fifo-depth = <0x1>;
-   ti,dp83867-rxctrl-strap-quirk;
-   /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
+   mdio: mdio {
+   phyc: ethernet-phy@c {
+   #phy-cells = <0x1>;
+   compatible = "ethernet-phy-id2000.a231";
+   reg = <0xc>;
+   ti,rx-internal-delay = <0x8>;
+   ti,tx-internal-delay = <0xa>;
+   ti,fifo-depth = <0x1>;
+   ti,dp83867-rxctrl-strap-quirk;
+   /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
+   };
+   /* Cleanup from RevA */
+   /delete-node/ ethernet-phy@21;
};
-   /* Cleanup from RevA */
-   /delete-node/ ethernet-phy@21;
 };
 
 /* Fix collision with u61 */
-- 
2.36.1

[PATCH 2/2] arm64: zynqmp: Enable TI phy reset via GPIO

[Michal Simek]

From: Harini Katakam 

Add DT property to support reset of TI PHY connected to GEM.
This is present in RevA DT but needs to be extended RevB/1.0/1.1
versions which are built on top.

Fixes: 2b1db7b18c97 ("arm64: zynqmp: Wire GEM reset gpio")
Signed-off-by: Harini Katakam 
Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp-zcu102-revB.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/dts/zynqmp-zcu102-revB.dts 
b/arch/arm/dts/zynqmp-zcu102-revB.dts
index b2f0b1133175..de3b5ab9d93b 100644
--- a/arch/arm/dts/zynqmp-zcu102-revB.dts
+++ b/arch/arm/dts/zynqmp-zcu102-revB.dts
@@ -25,7 +25,7 @@
ti,tx-internal-delay = <0xa>;
ti,fifo-depth = <0x1>;
ti,dp83867-rxctrl-strap-quirk;
-   /* reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>; */
+   reset-gpios = <&tca6416_u97 6 GPIO_ACTIVE_LOW>;
};
/* Cleanup from RevA */
/delete-node/ ethernet-phy@21;
-- 
2.36.1

Re: [PATCH 1/1] net: missing break after net_ip6_handler()

[Heinrich Schuchardt]

On 12/7/22 06:52, Vyacheslav Mitrofanov V wrote:

On Wed, 2022-12-07 at 09:42 -0500, Tom Rini wrote:

On Wed, Dec 07, 2022 at 03:29:37PM +0100, Heinrich Schuchardt wrote:


Don't fall through to handling an IPv6 header as IPv4.

Fixes: ffdbf3bad5f3 ("net: ipv6: Incorporate IPv6 support into u-
boot net subsystem")
Addresses-Coverity-ID: 430975 ("Missing break in switch")
Signed-off-by: Heinrich Schuchardt <
heinrich.schucha...@canonical.com>
---
Do we have a unit trest of IPv6?
I guess we should at least do a IPv6 ping.


There are a few tests, yes, but more would be good.


Hello!

I have tested IPv6 (ping6 and tftpboot) with my own python scripts before 
sending to pathwork. I'll do some test conversion to use them with u-boot or 
add new tests for that soon!
Thanks!


Hello Vycheslav,

would you agree with that break being added? I didn't see a review response.

Best regards

Heinrich

[PATCH] arm64: zynqmp: Remove unused snps,refclk_fladj property

[Michal Simek]

The commit c55ac51a550c ("usb: dwc3: Program GFLADJ") hopefully fixed
issues around fladj logic. This DT property was used in Xilinx stack only
that's why remove because it is not needed anymore.

Signed-off-by: Michal Simek 
---

 arch/arm/dts/zynqmp.dtsi | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi
index 34504a8cbb92..0a06c73390b2 100644
--- a/arch/arm/dts/zynqmp.dtsi
+++ b/arch/arm/dts/zynqmp.dtsi
@@ -870,7 +870,6 @@
interrupts = <0 65 4>, <0 69 4>, <0 75 4>;
iommus = <&smmu 0x860>;
snps,quirk-frame-length-adjustment = <0x20>;
-   snps,refclk_fladj;
clock-names = "ref";
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
@@ -902,7 +901,6 @@
interrupts = <0 70 4>, <0 74 4>, <0 76 4>;
iommus = <&smmu 0x861>;
snps,quirk-frame-length-adjustment = <0x20>;
-   snps,refclk_fladj;
clock-names = "ref";
snps,enable_guctl1_resume_quirk;
snps,enable_guctl1_ipd_quirk;
-- 
2.36.1

Re: [PATCH v3 12/19] phy: at91: Add support for the USB 2.0 PHY's of SAMA7

[Claudiu.Beznea]

On 12.12.2022 15:39, Sergiu Moga wrote:
> In order to have USB functionality, drivers for SAMA7's
> USB 2.0 PHY's have been added. There is one driver
> for UTMI clock's SFR and RESET required functionalities and
> one for its three possible subclocks of the phy's themselves.
> In order for this layout to properly work in conjunction with
> CCF and DT, the former driver will also act as a clock provider
> for the three phy's with the help of a custom hook into the
> driver's of_xlate method.
> 
> Signed-off-by: Sergiu Moga 
> Tested-by: Mihai Sain 
> ---
> 
> v1 -> v3:
> - No change
> 
> 
>  drivers/phy/Kconfig  |  10 ++
>  drivers/phy/Makefile |   1 +
>  drivers/phy/phy-sama7-usb.c  |  92 ++
>  drivers/phy/phy-sama7-utmi-clk.c | 202 +++
>  4 files changed, 305 insertions(+)
>  create mode 100644 drivers/phy/phy-sama7-usb.c
>  create mode 100644 drivers/phy/phy-sama7-utmi-clk.c
> 
> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> index cf4d5908d7..9fbb956783 100644
> --- a/drivers/phy/Kconfig
> +++ b/drivers/phy/Kconfig
> @@ -281,6 +281,16 @@ config PHY_XILINX_ZYNQMP
> Enable this to support ZynqMP High Speed Gigabit Transceiver
> that is part of ZynqMP SoC.
>  
> +config PHY_MICROCHIP_SAMA7_USB
> +   tristate "Microchip SAMA7 USB 2.0 PHY"
> +   depends on PHY && ARCH_AT91
> +   help
> +  Enable this to support SAMA7 USB 2.0 PHY.
> +
> +  The USB 2.0 PHY integrates high-speed, full-speed and low-speed
> +  termination and signal switching. With a single resistor, it
> +  requires minimal external components.
> +
>  source "drivers/phy/rockchip/Kconfig"
>  source "drivers/phy/cadence/Kconfig"
>  source "drivers/phy/ti/Kconfig"
> diff --git a/drivers/phy/Makefile b/drivers/phy/Makefile
> index a3b9f3c5b1..9d50affd47 100644
> --- a/drivers/phy/Makefile
> +++ b/drivers/phy/Makefile
> @@ -38,6 +38,7 @@ obj-$(CONFIG_PHY_MTK_TPHY) += phy-mtk-tphy.o
>  obj-$(CONFIG_PHY_NPCM_USB) += phy-npcm-usb.o
>  obj-$(CONFIG_PHY_IMX8MQ_USB) += phy-imx8mq-usb.o
>  obj-$(CONFIG_PHY_XILINX_ZYNQMP) += phy-zynqmp.o
> +obj-$(CONFIG_PHY_MICROCHIP_SAMA7_USB)  += phy-sama7-utmi-clk.o 
> phy-sama7-usb.o
>  obj-y += cadence/
>  obj-y += ti/
>  obj-y += qcom/
> diff --git a/drivers/phy/phy-sama7-usb.c b/drivers/phy/phy-sama7-usb.c
> new file mode 100644
> index 00..b6fe40ecc1
> --- /dev/null
> +++ b/drivers/phy/phy-sama7-usb.c
> @@ -0,0 +1,92 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Support for Atmel/Microchip USB PHY's.
> + *
> + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
> + *
> + * Author: Sergiu Moga 
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +struct sama7_usb_phy {
> + struct clk *uclk;
> + struct regmap *sfr;
> + int port;
> +};
> +
> +int sama7_usb_phy_init(struct phy *phy)
> +{
> + struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
> + int port = sama7_phy->port;
> +
> + regmap_update_bits(sama7_phy->sfr, SAMA7_SFR_UTMI0R(port),
> +SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X,
> +SAMA7_SFR_UTMI_RX_TX_PREEM_AMP_TUNE_1X);
> +
> + regmap_update_bits(sama7_phy->sfr, SAMA7_SFR_UTMI0R(port),
> +SAMA7_SFR_UTMI_RX_VBUS,
> +SAMA7_SFR_UTMI_RX_VBUS);
> +
> + return 0;
> +}
> +
> +int sama7_phy_power_on(struct phy *phy)
> +{
> + struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
> +
> + clk_prepare_enable(sama7_phy->uclk);
> +
> + return 0;
> +}
> +
> +int sama7_phy_power_off(struct phy *phy)
> +{
> + struct sama7_usb_phy *sama7_phy = dev_get_priv(phy->dev);
> +
> + clk_disable_unprepare(sama7_phy->uclk);
> +
> + return 0;
> +}
> +
> +int sama7_usb_phy_probe(struct udevice *dev)
> +{
> + struct sama7_usb_phy *sama7_phy = dev_get_priv(dev);
> +
> + sama7_phy->uclk = devm_clk_get(dev, "utmi_clk");
> + if (IS_ERR(sama7_phy->uclk))
> + return PTR_ERR(sama7_phy->uclk);
> +
> + sama7_phy->sfr = syscon_regmap_lookup_by_phandle(dev, "sfr-phandle");
> + if (IS_ERR(sama7_phy->sfr)) {
> + sama7_phy->sfr = NULL;

Is this needed?

> + return PTR_ERR(sama7_phy->sfr);
> + }
> +
> + return dev_read_u32(dev, "reg", &sama7_phy->port);
> +}
> +
> +static const struct phy_ops sama7_usb_phy_ops = {
> + .init = sama7_usb_phy_init,
> + .power_on = sama7_phy_power_on,
> + .power_off = sama7_phy_power_off,
> +};
> +
> +static const struct udevice_id sama7_usb_phy_of_match[] = {
> + { .compatible = "microchip,sama7g5-usb-phy", },
> + { },
> +};
> +
> +U_BOOT_DRIVER(sama7_usb_phy_driver) = {
> + .name = "sama7-usb-phy",
> + .id = UCLASS_PHY,
> + .of_match = sama7_usb_phy_of_match,
> + .ops = &sama7_usb_phy_ops,
> + .probe = sama7_usb_phy_probe,
> + .priv_auto = sizeof(struct sama7_usb_phy)

Re: [PATCH V2 1/1] Configs: enable gigadevice xilinx_zynqmp_mini_qspi_defconfig

[Michal Simek]

Hi Victor,

po 12. 12. 2022 v 15:50 odesílatel Victor Lim  napsal:
>
> enabling gigadevice in this file

it is quite clear that you are changing it in this file not another
one. Remove it.

And send it as a series because I really don't want to pick it up one
by one when we have b4
and can download all of them together.

Thanks,
Michal



-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

Re: [PATCH 1/4] riscv: spl: Introduce SPL_OPENSBI_OS_BOOT

[Tom Rini]

On Mon, Dec 12, 2022 at 02:45:10PM +0800, Rick Chen wrote:
> Hi Tom
> 
> > On Fri, Dec 09, 2022 at 08:48:37AM -0500, Sean Anderson wrote:
> > > On 12/7/22 01:23, Rick Chen wrote:
> > > > In RISC-V, it only provide normal mode booting currently.
> > > > To speed up the booting process, here provide SPL_OPENSBI_OS_BOOT
> > > > to achieve this feature which will be call Fast-Boot mode. By
> > >
> > > Can you name this something different. We already have something called
> > > fastboot in-tree (the Android-derived protocol) and there's a Microsoft
> > > technology called fastboot (some kind of hibernation). "OS Boot" isn't
> > > very specific either, since we (almost always) boot an OS. Maybe "Eagle
> > > mode" by analogy to Falcon mode, which lets SPL directly boot an OS.
> > >
> > > (Is this substantially different from falcon mode anyway?)
> >
> > I was kind of wondering if this is different, really, from Falcon Mode.
> > Falcon Mode didn't initially have to factor in other-firmware as that's
> > not a hard requirement on arm32 like it is on arm64 or risc-v.  But my
> > first read of this was that it seems like the RISC-V specific side of
> > doing Falcon Mode and dealing with the prior stage needs correctly.
> >
> 
> Yes. It is a little bit different from the Falcon mode (SPL_OS_BOOT=y).
> When I try to enable SPL_OS_BOOT, it will encounter that SYS_SPL_ARGS_ADDR and
>  jump_to_image_linux() shall be defined but they are un-necessary for RISC-V.
> Because the flow of OpenSBI and SPL_OS_BOOT are totally different code
> flow in board_init_r() of common/spl/spl.c.
> That is why I added a new symbol called SPL_OPENSBI_OS_BOOT for this
> RISC-V fast boot implementation.

Those sound like fairly minor challenges for the same fundamental
concept. We have SYS_SPL_ARGS_ADDR for "where is the device tree to
pass along". We might need to do a little code re-factoring here. But
maybe also a little bit of explaining why we wouldn't be booting to the
OS directly but instead passing back to openSBI to do this? That's not
normally how RISC-V boots the OS, right? Or am I miss-understanding
something here?

-- 
Tom


signature.asc
Description: PGP signature

[PATCH] ARM: dts: stm32: update vbus-supply of usbphyc_port0 on stm32mp157c-ev1

[Fabrice Gasnier]

phy-stm32-usbphyc bindings uses a connector node with vbus-supply
property.

[backport from linux 43e55d778a6b]
Signed-off-by: Fabrice Gasnier 
---

 arch/arm/dts/stm32mp157c-ev1.dts | 4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts
index 07bcd7c50672..2d5db41ed67b 100644
--- a/arch/arm/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/dts/stm32mp157c-ev1.dts
@@ -393,6 +393,10 @@
st,tune-squelch-level = <3>;
st,tune-hs-rx-offset = <2>;
st,no-lsfs-sc;
+   connector {
+   compatible = "usb-a-connector";
+   vbus-supply = <&vbus_sw>;
+   };
 };
 
 &usbphyc_port1 {
-- 
2.25.1

[PATCH 1/3] usb: onboard-hub: add driver to manage onboard hub supplies

[Fabrice Gasnier]

The main issue the driver addresses is that a USB hub needs to be
powered before it can be discovered. This is often solved by using
"regulator-always-on".

This driver is inspired by the Linux v6.1 driver. It only enables (or
disables) the hub vdd (3v3) supply, so it can be enumerated.
Scanning of the device tree is done in a similar manner to the sandbox,
by the usb-uclass. DT part looks like:

&usbh_ehci {
...
#address-cells = <1>;
#size-cells = <0>;
hub@1 {
compatible = "usb424,2514";
reg = <1>;
vdd-supply = <&v3v3>;
};
};

When the bus gets probed, the driver is automatically probed/removed from
the bus tree, as an example on stm32:
STM32MP> usb start
starting USB...
STM32MP> dm tree
 Class Index  Probed  DriverName
---
 usb   0  [ + ]   ehci_generic  |   |-- usb@5800d000
 usb_hub   0  [ + ]   usb_onboard_hub   |   |   `-- hub@1
 usb_hub   1  [ + ]   usb_hub   |   |   `-- usb_hub

STM32MP> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
  |  u-boot EHCI Host Controller
  |
  +-2  Hub (480 Mb/s, 2mA)

Signed-off-by: Fabrice Gasnier 
---

 common/Makefile   |  1 +
 common/usb_onboard_hub.c  | 62 +++
 drivers/usb/Kconfig   | 10 ++
 drivers/usb/host/usb-uclass.c | 16 +
 4 files changed, 83 insertions(+), 6 deletions(-)
 create mode 100644 common/usb_onboard_hub.c

diff --git a/common/Makefile b/common/Makefile
index 20addfb244c2..7789aab484fd 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -26,6 +26,7 @@ obj-$(CONFIG_PHYLIB) += miiphyutil.o
 obj-$(CONFIG_USB_HOST) += usb.o usb_hub.o
 obj-$(CONFIG_USB_GADGET) += usb.o usb_hub.o
 obj-$(CONFIG_USB_STORAGE) += usb_storage.o
+obj-$(CONFIG_USB_ONBOARD_HUB) += usb_onboard_hub.o
 
 # others
 obj-$(CONFIG_CONSOLE_MUX) += iomux.o
diff --git a/common/usb_onboard_hub.c b/common/usb_onboard_hub.c
new file mode 100644
index ..89e18a2ddad6
--- /dev/null
+++ b/common/usb_onboard_hub.c
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Driver for onboard USB hubs
+ *
+ * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
+ *
+ * Mostly inspired by Linux kernel v6.1 onboard_usb_hub driver
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+struct onboard_hub {
+   struct udevice *vdd;
+};
+
+static int usb_onboard_hub_probe(struct udevice *dev)
+{
+   struct onboard_hub *hub = dev_get_priv(dev);
+   int ret;
+
+   ret = device_get_supply_regulator(dev, "vdd-supply", &hub->vdd);
+   if (ret) {
+   dev_err(dev, "can't get vdd-supply: %d\n", ret);
+   return ret;
+   }
+
+   ret = regulator_set_enable_if_allowed(hub->vdd, true);
+   if (ret)
+   dev_err(dev, "can't enable vdd-supply: %d\n", ret);
+
+   return ret;
+}
+
+static int usb_onboard_hub_remove(struct udevice *dev)
+{
+   struct onboard_hub *hub = dev_get_priv(dev);
+   int ret;
+
+   ret = regulator_set_enable_if_allowed(hub->vdd, false);
+   if (ret)
+   dev_err(dev, "can't disable vdd-supply: %d\n", ret);
+
+   return ret;
+}
+
+static const struct udevice_id usb_onboard_hub_ids[] = {
+   /* Use generic usbVID,PID dt-bindings (usb-device.yaml) */
+   { .compatible = "usb424,2514" }, /* USB2514B USB 2.0 */
+   { }
+};
+
+U_BOOT_DRIVER(usb_onboard_hub) = {
+   .name   = "usb_onboard_hub",
+   .id = UCLASS_USB_HUB,
+   .probe = usb_onboard_hub_probe,
+   .remove = usb_onboard_hub_remove,
+   .of_match = usb_onboard_hub_ids,
+   .priv_auto = sizeof(struct onboard_hub),
+};
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index 3afb45d5ccb2..d10ee6853d40 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -106,6 +106,16 @@ config USB_KEYBOARD
  Say Y here if you want to use a USB keyboard for U-Boot command line
  input.
 
+config USB_ONBOARD_HUB
+   bool "Onboard USB hub support"
+   depends on DM_USB
+   ---help---
+ Say Y here if you want to support discrete onboard USB hubs that
+ don't require an additional control bus for initialization, but
+ need some non-trivial form of initialization, such as enabling a
+ power regulator. An example for such a hub is the Microchip
+ USB2514B.
+
 if USB_KEYBOARD
 
 config USB_KEYBOARD_FN_KEYS
diff --git a/drivers/usb/host/usb-uclass.c b/drivers/usb/host/usb-uclass.c
index 060f3441df0c..f5dc93ffee39 100644
--- a/drivers/usb/host/usb-uclass.c
+++ b/drivers/usb/host/usb-uclass.c
@@ -271,19 +271,23 @@ int usb_init(void)
/* init low_level USB */
printf("Bus %s: ", bus->name);
 
-#ifdef CONFIG_SANDBOX
/*
 * For Sandbox, we need scan the device tree each time when we
   

[PATCH 2/3] configs: stm32: enable USB onboard HUB driver

[Fabrice Gasnier]

Activate the USB onboard HUB driver, that is used to enable the HUB supply
on STM32MP15 EVAL, DK1 and DK2 boards.
This avoids marking the 3v3 corresponding regulator as always-on.

Signed-off-by: Fabrice Gasnier 
---

 configs/stm32mp15_basic_defconfig   | 1 +
 configs/stm32mp15_defconfig | 1 +
 configs/stm32mp15_trusted_defconfig | 1 +
 3 files changed, 3 insertions(+)

diff --git a/configs/stm32mp15_basic_defconfig 
b/configs/stm32mp15_basic_defconfig
index 86ebbef0a6c8..4d2ac589931a 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -164,6 +164,7 @@ CONFIG_USB=y
 CONFIG_DM_USB_GADGET=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_ONBOARD_HUB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0483
diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
index caa79e68834f..ccf65dd12223 100644
--- a/configs/stm32mp15_defconfig
+++ b/configs/stm32mp15_defconfig
@@ -140,6 +140,7 @@ CONFIG_USB=y
 CONFIG_DM_USB_GADGET=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_ONBOARD_HUB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0483
diff --git a/configs/stm32mp15_trusted_defconfig 
b/configs/stm32mp15_trusted_defconfig
index 3309c2e79246..a553038a42c5 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -140,6 +140,7 @@ CONFIG_USB=y
 CONFIG_DM_USB_GADGET=y
 CONFIG_USB_EHCI_HCD=y
 CONFIG_USB_EHCI_GENERIC=y
+CONFIG_USB_ONBOARD_HUB=y
 CONFIG_USB_GADGET=y
 CONFIG_USB_GADGET_MANUFACTURER="STMicroelectronics"
 CONFIG_USB_GADGET_VENDOR_NUM=0x0483
-- 
2.25.1

[PATCH 0/3] Add support for USB onboard HUB, used on stm32 boards

[Fabrice Gasnier]

This series adds a driver to support USB onboard HUB, inspired by Linux
onboard hub driver.

Purpose is to manage the power supply regulator on STM32 boards, for
low power use case in Linux. U-boot driver allows to benefit of the
device tree part to supply the HUB when need, instead using an
always-on regulator.

It aligns the relevant DT part from emerging Linux v6.2. It also adds the
relevant default configuration on stm32mp15.


Fabrice Gasnier (3):
  usb: onboard-hub: add driver to manage onboard hub supplies
  configs: stm32: enable USB onboard HUB driver
  ARM: dts: stm32: add support for USB2514B onboard hub on
stm32mp157c-ev1

 arch/arm/dts/stm32mp157c-ev1.dts|  8 
 common/Makefile |  1 +
 common/usb_onboard_hub.c| 62 +
 configs/stm32mp15_basic_defconfig   |  1 +
 configs/stm32mp15_defconfig |  1 +
 configs/stm32mp15_trusted_defconfig |  1 +
 drivers/usb/Kconfig | 10 +
 drivers/usb/host/usb-uclass.c   | 16 +---
 8 files changed, 94 insertions(+), 6 deletions(-)
 create mode 100644 common/usb_onboard_hub.c

-- 
2.25.1

[PATCH 3/3] ARM: dts: stm32: add support for USB2514B onboard hub on stm32mp157c-ev1

[Fabrice Gasnier]

Add support for USB2514B onboard hub on stm32mp157c EV1 board. The HUB
is supplied by a 3v3 PMIC regulator.

[backport from linux ad9591b01d24]
Signed-off-by: Fabrice Gasnier 
---

 arch/arm/dts/stm32mp157c-ev1.dts | 8 
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts
index d142dd30e16b..07bcd7c50672 100644
--- a/arch/arm/dts/stm32mp157c-ev1.dts
+++ b/arch/arm/dts/stm32mp157c-ev1.dts
@@ -362,6 +362,14 @@
 &usbh_ehci {
phys = <&usbphyc_port0>;
status = "okay";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   /* onboard HUB */
+   hub@1 {
+   compatible = "usb424,2514";
+   reg = <1>;
+   vdd-supply = <&v3v3>;
+   };
 };
 
 &usbotg_hs {
-- 
2.25.1

[PATCH V2 1/1] Configs: enable gigadevice

[Victor Lim]

enabling gigadevice in this file

Signed-off-by: Victor Lim 
---
 configs/zynq_cse_qspi_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig
index 60f0d7cac4..d58db07e71 100644
--- a/configs/zynq_cse_qspi_defconfig
+++ b/configs/zynq_cse_qspi_defconfig
@@ -71,6 +71,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 CONFIG_ARM_DCC=y
 CONFIG_ZYNQ_QSPI=y
-- 
2.25.1

[PATCH V2 1/1] Configs: enable gigadevice xilinx_zynqmp_mini_qspi_defconfig

[Victor Lim]

enabling gigadevice in this file

Signed-off-by: Victor Lim 
---
 configs/xilinx_zynqmp_mini_qspi_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig 
b/configs/xilinx_zynqmp_mini_qspi_defconfig
index c6401c2a54..2171d09fc3 100644
--- a/configs/xilinx_zynqmp_mini_qspi_defconfig
+++ b/configs/xilinx_zynqmp_mini_qspi_defconfig
@@ -69,6 +69,7 @@ CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_SPANSION=y
 CONFIG_SPI_FLASH_STMICRO=y
 CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
 # CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
 # CONFIG_POWER is not set
 CONFIG_ARM_DCC=y
-- 
2.25.1

AW: [PATCH] distro/pxeboot: Handle prompt variable

[Traut Manuel LCPF-CH]

Can this be picked for next?

-Ursprüngliche Nachricht-
Von: Simon Glass  
Gesendet: Sonntag, 27. November 2022 15:36
An: Traut Manuel LCPF-CH 
Cc: u-boot@lists.denx.de; vagr...@debian.org
Betreff: Re: EXTERNAL - [PATCH] distro/pxeboot: Handle prompt variable

On Fri, 18 Nov 2022 at 05:36, Manuel Traut  wrote:
>
> Regarding the documentation found here:
> https://github.com/u-boot/u-boot/blob/master/common/menu.c#L347
>
> If both timeout and prompt is set to 0 the default entry shall be 
> booted immediately. However the current behaviour is that the prompt 
> is shown (tested with distroboot) until the user selects an entry (no 
> timeout).
>
> This change implements a behaviour as documented. It was tested with 
> distroboot.
>
> Signed-off-by: Manuel Traut 
> ---
>  boot/pxe_utils.c | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)

Reviewed-by: Simon Glass 

[PATCH v2] net: eth-uclass: revalidate priv after stop() in eth_halt()

[Niel Fourie]

In eth_halt(), reread and revalidate priv after calling stop(),
as it may have been freed, leaving a dangling pointer.

In the ethernet gadget implementation, the gadget device gets
probed during start() and removed during stop(), which includes
freeing `uclass_priv_` to which `priv` is pointing. Writing to
`priv` after stop() may corrupt the `fd` member of `struct
malloc_chunk`, which represents the freed block, and could cause
hard-to-debug crashes on subsequent calls to malloc()/free().

Signed-off-by: Niel Fourie 
Cc: Ramon Fried 
Cc: Marek Vasut 
Cc: Lukasz Majewski 
---
Changes for v2:
- Revalidate priv instead of changing state before stop()
- Added explanational comment

This patch my be dropped if the patch which addresses the root cause
("usb: gadget: ether: split start/stop from init/halt") is accepted.

 net/eth-uclass.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index f41da4b37b3..7d5783b5cab 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -341,8 +341,11 @@ void eth_halt(void)
priv = dev_get_uclass_priv(current);
if (!priv || !priv->running)
return;
-
eth_get_ops(current)->stop(current);
+   /* Ethernet gadget frees priv during stop, workaround until fixed... */
+   priv = dev_get_uclass_priv(current);
+   if (!priv || !priv->running)
+   return;
priv->state = ETH_STATE_PASSIVE;
priv->running = false;
 }
-- 
2.38.1

[PATCH] usb: gadget: ether: split start/stop from init/halt

[Niel Fourie]

Split out _usb_eth_start() from _usb_eth_init() and
usb_eth_stop() from _usb_eth_halt(). Now _usb_eth_init() only
initialises and registers the gadget device, which _usb_eth_halt()
reverses, and together are used for probing and removing the
device. The _usb_eth_start() and _usb_eth_stop() functions connect
and disconnect the gadget as expected by the start()/stop()
callbacks.

Previously the gadget device was probed on every start() and
removed on every stop(), which is inconsistent with other DM_ETH
drivers. For non-DM gadget drivers the old behaviour has been
retained.

Signed-off-by: Niel Fourie 
Cc: Marek Vasut 
Cc: Lukasz Majewski 
Cc: Ramon Fried 
---
 drivers/usb/gadget/ether.c | 58 +-
 1 file changed, 45 insertions(+), 13 deletions(-)

diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index 43aec7ffa70..a75b4eeb5bb 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -2305,15 +2305,11 @@ fail:
 
 /*-*/
 static void _usb_eth_halt(struct ether_priv *priv);
+static void _usb_eth_stop(struct ether_priv *priv);
 
 static int _usb_eth_init(struct ether_priv *priv)
 {
-   struct eth_dev *dev = &priv->ethdev;
-   struct usb_gadget *gadget;
-   unsigned long ts;
int ret;
-   unsigned long timeout = USB_CONNECT_TIMEOUT;
-
ret = usb_gadget_initialize(0);
if (ret)
return ret;
@@ -2353,14 +2349,26 @@ static int _usb_eth_init(struct ether_priv *priv)
priv->eth_driver.resume = eth_resume;
if (usb_gadget_register_driver(&priv->eth_driver) < 0)
goto fail;
+   return 0;
+fail:
+   _usb_eth_halt(priv);
+   return -1;
+}
 
-   dev->network_started = 0;
+static int _usb_eth_start(struct ether_priv *priv)
+{
+   unsigned long ts;
+   unsigned long timeout = USB_CONNECT_TIMEOUT;
+   struct eth_dev *dev = &priv->ethdev;
+
+   if (!dev->gadget)
+   return -1;
 
+   dev->network_started = 0;
packet_received = 0;
packet_sent = 0;
 
-   gadget = dev->gadget;
-   usb_gadget_connect(gadget);
+   usb_gadget_connect(dev->gadget);
 
if (env_get("cdc_connect_timeout"))
timeout = dectoul(env_get("cdc_connect_timeout"), NULL) * 
CONFIG_SYS_HZ;
@@ -2378,6 +2386,7 @@ static int _usb_eth_init(struct ether_priv *priv)
rx_submit(dev, dev->rx_req, 0);
return 0;
 fail:
+   _usb_eth_stop(priv);
_usb_eth_halt(priv);
return -1;
 }
@@ -2457,11 +2466,10 @@ static int _usb_eth_recv(struct ether_priv *priv)
return 0;
 }
 
-static void _usb_eth_halt(struct ether_priv *priv)
+static void _usb_eth_stop(struct ether_priv *priv)
 {
struct eth_dev *dev = &priv->ethdev;
 
-   /* If the gadget not registered, simple return */
if (!dev->gadget)
return;
 
@@ -2485,6 +2493,14 @@ static void _usb_eth_halt(struct ether_priv *priv)
usb_gadget_handle_interrupts(0);
dev->network_started = 0;
}
+}
+
+static void _usb_eth_halt(struct ether_priv *priv)
+{
+   struct eth_dev *dev = &priv->ethdev;
+
+   if (!dev->gadget)
+   return;
 
usb_gadget_unregister_driver(&priv->eth_driver);
usb_gadget_release(0);
@@ -2493,9 +2509,13 @@ static void _usb_eth_halt(struct ether_priv *priv)
 #ifndef CONFIG_DM_ETH
 static int usb_eth_init(struct eth_device *netdev, struct bd_info *bd)
 {
+   int ret;
struct ether_priv *priv = (struct ether_priv *)netdev->priv;
 
-   return _usb_eth_init(priv);
+   ret = _usb_eth_init(priv);
+   if (!ret)
+   ret = _usb_eth_start(priv);
+   return ret;
 }
 
 static int usb_eth_send(struct eth_device *netdev, void *packet, int length)
@@ -2536,6 +2556,7 @@ void usb_eth_halt(struct eth_device *netdev)
 {
struct ether_priv *priv = (struct ether_priv *)netdev->priv;
 
+   _usb_eth_stop(priv);
_usb_eth_halt(priv);
 }
 
@@ -2559,7 +2580,7 @@ static int usb_eth_start(struct udevice *dev)
 {
struct ether_priv *priv = dev_get_priv(dev);
 
-   return _usb_eth_init(priv);
+   return _usb_eth_start(priv);
 }
 
 static int usb_eth_send(struct udevice *dev, void *packet, int length)
@@ -2609,7 +2630,7 @@ static void usb_eth_stop(struct udevice *dev)
 {
struct ether_priv *priv = dev_get_priv(dev);
 
-   _usb_eth_halt(priv);
+   _usb_eth_stop(priv);
 }
 
 static int usb_eth_probe(struct udevice *dev)
@@ -2623,6 +2644,16 @@ static int usb_eth_probe(struct udevice *dev)
get_ether_addr(CONFIG_USBNET_DEV_ADDR, pdata->enetaddr);
eth_env_set_enetaddr("usbnet_devaddr", pdata->enetaddr);
 
+   return _usb_eth_init(priv);
+
+   return 0;
+}
+
+static int usb_eth_remove(struct udevice *dev)
+{
+   struct ether_priv *priv = dev_get_priv(dev);
+
+   _usb_eth_hal

Re: [PULL] Pull request for u-boot master / v2023.01-rc4 = u-boot-stm32-20221212

[Tom Rini]

On Mon, Dec 12, 2022 at 01:10:52PM +0100, Patrice CHOTARD wrote:

> Hi Tom
> 
> Please pull these 2 patches for v2023.01-rc4
> 
> CI status: 
> https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/14403
> 
> The following changes since commit 7a7b0856ca01f0dadc940f6f1bc6df44129ad9d0:
> 
>   Merge tag 'u-boot-nand-20221211' of 
> https://source.denx.de/u-boot/custodians/u-boot-nand-flash (2022-12-11 
> 09:40:25 -0500)
> 
> are available in the Git repository at:
> 
>   https://source.denx.de/u-boot/custodians/u-boot-stm.git 
> tags/u-boot-stm32-20221212
> 
> for you to fetch changes up to 30257f4699e0e58818f6e6f86021a994f485ee58:
> 
>   dm: pmic: ignore disabled node in pmic_bind_children (2022-12-12 11:25:28 
> +0100)
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: Please pull u-boot-marvell/master

[Tom Rini]

On Mon, Dec 12, 2022 at 09:57:41AM +0100, Stefan Roese wrote:

> Hi Tom,
> 
> please pull this late Marvell related fix:
> 

Applied to u-boot/master, thanks!

-- 
Tom


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Re: [PATCH 1/4] riscv: spl: Introduce SPL_OPENSBI_OS_BOOT

[Tom Rini]

On Mon, Dec 12, 2022 at 03:49:10PM +0800, Rick Chen wrote:
> > On 12/7/22 01:23, Rick Chen wrote:
> > > In RISC-V, it only provide normal mode booting currently.
> > > To speed up the booting process, here provide SPL_OPENSBI_OS_BOOT
> > > to achieve this feature which will be call Fast-Boot mode. By
> >
> > Can you name this something different. We already have something called
> > fastboot in-tree (the Android-derived protocol) and there's a Microsoft
> > technology called fastboot (some kind of hibernation). "OS Boot" isn't
> > very specific either, since we (almost always) boot an OS. Maybe "Eagle
> > mode" by analogy to Falcon mode, which lets SPL directly boot an OS.
> 
> I think fast boot is a behavior which shall be interpreted widely but
> not proprietary.
> Or maybe I can  rename it as RISC-V Fast Boot to distinguish them.
> 
> >
> > (Is this substantially different from falcon mode anyway?)
> 
> Please see the explanations to Tom.
> 
> >
> > > enabling SPL_OPENSBI_OS_BOOT, it will generate linux.itb instead
> > > of default u-boot.itb after compiling. It initializes memory with
> > > the U-Boot SPL at the first stage, just like what a regular booting
> > > process (i.e. Normal Boot) does in the beginning. Instead of jumping
> > > to the U-Boot proper from OpenSBI before booting Linux Kernel, the
> > > Fast Boot process jumps directly to Linux Kernel to gain shorter
> > > booting time.
> > >
> > > Signed-off-by: Rick Chen 
> > > ---
> > >   common/spl/Kconfig   | 14 ++
> > >   common/spl/spl_fit.c |  3 ++-
> > >   common/spl/spl_opensbi.c | 25 -
> > >   3 files changed, 28 insertions(+), 14 deletions(-)
> > >
> > > diff --git a/common/spl/Kconfig b/common/spl/Kconfig
> > > index 05181bdba3..8805aba1b7 100644
> > > --- a/common/spl/Kconfig
> > > +++ b/common/spl/Kconfig
> > > @@ -1509,6 +1509,20 @@ config SPL_OPENSBI_SCRATCH_OPTIONS
> > > Options passed to fw_dynamic, for example 
> > > SBI_SCRATCH_NO_BOOT_PRINTS or
> > > SBI_SCRATCH_DEBUG_PRINTS.
> > >
> > > +config SPL_OPENSBI_OS_BOOT
> >
> > Please use the same name for the config as for the description.
> >
> > > + bool "openSBI Fast Boot"
> > > + depends on SPL_OPENSBI
> > > + help
> > > +   Enable this openSBI can jump to Linux Kernel directly.
> >
> > Can you put some of the explanation from the commit message here?
> 
> OK, I will move some messages here from commit messages.
> 
> >
> > > +
> > > +config SPL_OPENSBI_FIT_NAME
> > > + string "SPL openSBI fit image name"
> > > + depends on SPL_OPENSBI
> > > + default "linux.itb" if SPL_OPENSBI_OS_BOOT
> > > + default "u-boot.itb"
> > > + help
> > > +   This will help to generate different fit name accordingly.
> >
> > Why not SPL_FS_LOAD_PAYLOAD_NAME?
> >
> > It looks like the code changes below do not use these configs. Can you
> > move them to the next patch so it is clearer that they are for binman?
> 
> I have saw this config, but it does't support SPL_RAM but only for filesystem
> That is why I don't leverage it.
> 
> I can prepare a patch as below if no other concerns:
> 
> config SPL_FS_LOAD_PAYLOAD_NAME
> string "File to load for U-Boot from the filesystem"
> depends on SPL_FS_EXT4 || SPL_FS_FAT || SPL_FS_SQUASHFS || SPL_RAM
> default "tispl.bin" if SYS_K3_SPL_ATF
> default "u-boot.itb" if SPL_LOAD_FIT
> default "linux.itb" if SPL_OPENSBI_OS_BOOT
> default "u-boot.img"
> help
>   Filename to read to load U-Boot when reading from filesystem.

But in the case you have it's for the output name, and not at all about
what's being loaded from a filesystem yes? This shouldn't be a "SPL_.."
option, but should be under arch/riscv/Kconfig somewhere, since it's
changing the general riscv binman.dtsi file. And on a related note,
please make sure that 'make htmldocs' is happy with your documentation
changes as I think I see some spacing problems in 4/4.

-- 
Tom


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Re: [PATCH] mtd: spi-nor-ids: add Macronix flash entry

[Tom Rini]

On Sun, Dec 11, 2022 at 11:19:02PM +0800, Jit Loon Lim wrote:

> From: Tien Fong Chee 
> 
> Add Macronix mx25u51245g flash entry, so this can be used on
> SoCFPGA devices.
> 
> Signed-off-by: Tien Fong Chee 
> Signed-off-by: Jit Loon Lim 
> ---
>  drivers/mtd/spi/spi-nor-ids.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/mtd/spi/spi-nor-ids.c b/drivers/mtd/spi/spi-nor-ids.c
> index 4fe8b0d92c..f5cf3d0156 100644
> --- a/drivers/mtd/spi/spi-nor-ids.c
> +++ b/drivers/mtd/spi/spi-nor-ids.c
> @@ -182,7 +182,7 @@ const struct flash_info spi_nor_ids[] = {
>   { INFO("mx25l12805d", 0xc22018, 0, 64 * 1024, 256, SECT_4K) },
>   { INFO("mx25u12835f", 0xc22538, 0, 64 * 1024, 256, SECT_4K) },
>   { INFO("mx25u51245g", 0xc2253a, 0, 64 * 1024, 1024, SECT_4K |
> -SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
> + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) },
>   { INFO("mx25l12855e", 0xc22618, 0, 64 * 1024, 256, 0) },
>   { INFO("mx25l25635e", 0xc22019, 0, 64 * 1024, 512, SPI_NOR_DUAL_READ | 
> SPI_NOR_QUAD_READ) },
>   { INFO("mx25u25635f", 0xc22539, 0, 64 * 1024, 512, SECT_4K | 
> SPI_NOR_4B_OPCODES) },

As confirmed by "git diff -w" this is entirely a whitespace only change.

-- 
Tom


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Re: [PATCH V2 1/1] Configs: enable gigadevice xilinx_zynqmp_mini_qspi_defconfig

[Michal Simek]

Hi,

first of all no top posting.

po 12. 12. 2022 v 16:07 odesílatel Vlim  napsal:
>
> Hi, Michal,
>
> Do you mean group a few files in to one patch?

I am fine with one patch per SOC but up2you.
But definitely send it as series with --thread with cover letter.

Thanks,
Michal

Re: [PATCH v1] arch/arm: sm: introduce efusedump command

[Tom Rini]

On Fri, Dec 09, 2022 at 03:52:04PM +0300, Alexey Romanov wrote:

> Using this command user can print efuse memory:
> 
> $ sm efusedump 0 10
>   : ff 00 31 00 00 ff 66 00 00 00  ..1...f...
> 
> Signed-off-by: Alexey Romanov 
> ---
>  arch/arm/mach-meson/sm.c | 36 +++-
>  1 file changed, 35 insertions(+), 1 deletion(-)

This needs to be moved done under cmd/ somewhere, perhaps cmd/meson/

-- 
Tom


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Re: [PATCH 0/8] sunxi: Update H616 DRAM driver

[Jernej Škrabec]

Hi Andre,

Dne ponedeljek, 12. december 2022 ob 02:04:51 CET je Andre Przywara 
napisal(a):
> On Sun, 11 Dec 2022 17:32:05 +0100
> Jernej Skrabec  wrote:
> 
> Hi Jernej,
> 
> many thanks for putting this together!
> I will have a more elaborate look at each patch later.
> 
> > Current H616 DRAM driver is completely customized to Orange Pi Zero2
> > board, which is currently the only H616 board supported by U-Boot.
> 
> Not anymore, I merged the X96 Mate support lately, after the DT got
> merged into the Linux tree.

Right. First part of sentence is still true, although I later remembered that 
some values are based on T95 values, those that are not used by Orange Pi 
Zero2.

> 
> Those are the values for the box I came up with:
> CONFIG_DRAM_SUN50I_H616_DX_ODT=0x03030303
> CONFIG_DRAM_SUN50I_H616_DX_DRI=0x0e0e0e0e
> CONFIG_DRAM_SUN50I_H616_CA_DRI=0x1c12
> CONFIG_DRAM_SUN50I_H616_TPR0=0xcc05
> CONFIG_DRAM_SUN50I_H616_TPR10=0x2f0007
> CONFIG_DRAM_SUN50I_H616_TPR11=0x
> CONFIG_DRAM_SUN50I_H616_TPR12=0xfedf7557
> 
> based on this boot0 found in some firmware update image:
> 00045400  be 02 00 ea 65 47 4f 4e  2e 42 54 30 cc ba f3 80 
> |eGON.BT0| 00045410  00 c0 00 00 30 00 00 00  00 00 00 00 00 00 02
> 00  |0...| 00045420  00 00 02 00 00 00 00 00  00 00 00 00 34 2e
> 30 00  |4.0.| 00045430  00 00 00 00 03 00 00 00  88 02 00 00 03
> 00 00 00  || 00045440  03 03 03 03 0e 0e 0e 0e  12 1c 00 00
> 01 00 00 00  || 00045450  fb 30 00 00 00 00 00 00  40 08 00
> 00 04 00 00 00  |.0..@...| 00045460  08 00 00 00 00 00 00 00  00 00
> 00 00 00 00 00 00  || 00045470  00 00 00 00 00 00 00 00  00
> 00 00 00 00 00 00 00  || 00045480  00 00 00 00 00 00 00 00 
> 00 00 00 00 00 00 00 00  || 00045490  05 0c 00 c0 00 00 00
> 00  00 00 00 00 00 00 00 00  || 000454a0  80 80 80 33 07 00
> 2f 00  dd dd ff ff 57 75 df fe  |...3../.Wu..| 000454b0  40 00 00 00 00
> 00 00 00  00 00 00 00 08 00 02 01  |@...|
> 
> I would be grateful if you could verify this.

Looks correct. I'll use them in my v2 patches.

> 
> I built it, and it reported the 4GB correctly, also managed to boot into
> Linux just fine. No extensive testing, nor didn't I compare register
> dumps or disassembly (yet).
> 
> Cheers,
> Andre
> 
> P.S. Any plans on upstreaming support for your T95  H616 TV
> box? That would probably help the case here.

Not really, X96 Mate is basically the same as T95, except DRAM configuration. 
As I said, I verified that these patches provide same register values as 
before. This includes those which were modeled after T95 DRAM values.

Best regards,
Jernej

> 
> > Needless to say, this is not ideal for adding new boards. With changes
> > in this series, all DDR3 boards are supported and all that is needed is
> > just vendor DRAM values extracted from Android image. New DRAM types
> > should also be easier to support, since a lot of constants used before
> > are not really DRAM type dependent.
> > 
> > Changes were verified by decompiling driver and generated values were
> > compared to previous, hard coded ones. This was done without dram_para
> > structures, so compiler was able to heavily optimize code and produce
> > constants.
> > 
> > Please take a look.
> > 
> > Best regards,
> > Jernej
> > 
> > Jernej Skrabec (8):
> >   sunxi: Fix write to H616 DRAM CR register
> >   sunxi: cosmetic: Fix H616 DRAM driver code style
> >   sunxi: parameterize H616 DRAM ODT values
> >   sunxi: Convert H616 DRAM options to single setting
> >   sunxi: Always configure ODT on H616 DRAM
> >   sunxi: Make bit delay function in H616 DRAM code void
> >   sunxi: Parameterize bit delay code in H616 DRAM driver
> >   sunxi: Parameterize H616 DRAM code some more
> >  
> >  .../include/asm/arch-sunxi/dram_sun50i_h616.h |  18 +
> >  arch/arm/mach-sunxi/Kconfig   |  67 +--
> >  arch/arm/mach-sunxi/dram_sun50i_h616.c| 445 +++---
> >  configs/orangepi_zero2_defconfig  |   8 +-
> >  4 files changed, 348 insertions(+), 190 deletions(-)

Re: [PATCH v3 4/4] cmd: source: Support specifying config name

[Tom Rini]

On Thu, Nov 03, 2022 at 05:35:33PM -0400, Sean Anderson wrote:

> As discussed previously [1,2], the source command is not safe to use with
> verified boot unless there is a key with required = "images" (which has its
> own problems). This is because if such a key is absent, signatures are
> verified but not required. It is assumed that configuration nodes will
> provide the signature. Because the source command does not use
> configurations to determine the image to source, effectively no
> verification takes place.
> 
> To address this, allow specifying configuration nodes. We use the same
> syntax as the bootm command (helpfully provided for us by fit_parse_conf).
> By default, we first try the default config and then the default image. To
> force using a config, # must be present in the command (e.g. `source
> $loadaddr#my-conf`). For convenience, the config may be omitted, just like
> the address may be (e.g. `source \#`). This also works for images
> (`source \:` behaves exactly like `source` currently does).
> 
> [1] 
> https://lore.kernel.org/u-boot/7d711133-d513-5bcb-52f2-a9dbaa9ee...@prevas.dk/
> [2] 
> https://lore.kernel.org/u-boot/042dcb34-f85f-351e-1b0e-513f89005...@gmail.com/
> 
> Signed-off-by: Sean Anderson 
> Reviewed-by: Simon Glass 

Currently, there's two problems.  One, fit_conf_get_prop_node() should
be called (I believe) with IH_PHASE_NONE, which I can do when applying.
However, two, fit_config_verify() depends on
CONFIG_IS_ENABLED(FIT_SIGNATURE) and I'm less immediately sure how to
rework that in to this patch. Can you please rebase on top of current
next? Thanks.

-- 
Tom


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Re: [PATCH v3 2/2] board: mediatek: add mt8195 demo board

[Tom Rini]

On Thu, Nov 10, 2022 at 03:34:53PM +0800, Macpaul Lin wrote:

> From: Fabien Parent 
> 
> Add mt8195-demo board support.
> This demo purpose board uses MediaTek's MT8195 SoC.
> 
> Signed-off-by: Fabien Parent 
> Signed-off-by: Amjad Ouled-Ameur 
> Signed-off-by: Macpaul Lin 
[snip]
> +#include 
> +
> +#define CONFIG_SYS_NS16550_SERIAL
> +#define CONFIG_SYS_NS16550_REG_SIZE  -4
> +#define CONFIG_SYS_NS16550_MEM32
> +#define CONFIG_SYS_NS16550_COM1  0x11002000
> +#define CONFIG_SYS_NS16550_CLK   2600

This is unused, I believe.  But when trying to build with current next I
get:
Error: Load Address must be set.
Error: Bad parameters for image type

Please rebase on top of current next and repost, thanks!

-- 
Tom


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Re: [PATCH 4/8] sunxi: Convert H616 DRAM options to single setting

[Andre Przywara]

On Sun, 11 Dec 2022 17:32:09 +0100
Jernej Skrabec  wrote:

Hi,

> Vendor DRAM settings use TPR10 parameter to enable various features.
> There are many mores features that just those that are currently
> mentioned. Since new will be added later and most are not known, let's
> reuse value from vendor DRAM driver as-is. This will also help adding
> support for new boards.

Looks good. I checked that the actual code in
mctl_phy_bit_delay_compensation() just gets indented (no real changes), and
is now guarded by the new checks.
The values in the _defconfig still result in the same decisions, though
many are blocked anyway by no one actually calling that bit_delay function
at all. (I wonder what happens when we enable it?)
One small thing below.

> Signed-off-by: Jernej Skrabec 
> ---
>  .../include/asm/arch-sunxi/dram_sun50i_h616.h |  10 +
>  arch/arm/mach-sunxi/Kconfig   |  38 +---
>  arch/arm/mach-sunxi/dram_sun50i_h616.c| 197 +-
>  configs/orangepi_zero2_defconfig  |   5 +-
>  4 files changed, 117 insertions(+), 133 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h 
> b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h
> index c9e1f84bfcdd..b5140c79b70e 100644
> --- a/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h
> +++ b/arch/arm/include/asm/arch-sunxi/dram_sun50i_h616.h
> @@ -137,6 +137,15 @@ check_member(sunxi_mctl_ctl_reg, unk_0x4240, 0x4240);
>  #define MSTR_ACTIVE_RANKS(x) (((x == 2) ? 3 : 1) << 24)
>  #define MSTR_BURST_LENGTH(x) (((x) >> 1) << 16)
>  
> +/* TODO: figure out what unknown features do */
> +#define TPR10_UNKNOWN_FEAT0  BIT(16)
> +#define TPR10_UNKNOWN_FEAT1  BIT(17)
> +#define TPR10_UNKNOWN_FEAT2  BIT(18)

Could you just put the bit number in the macro? Like TPR10_BIT16? That
both avoids inventing meaningless names, and helps readers to correlate
code more easily. Or skip the symbol altogether for those and use just
"BIT(16)" in the code.

Cheers,
Andre

> +#define TPR10_WRITE_LEVELING BIT(20)
> +#define TPR10_READ_CALIBRATION   BIT(21)
> +#define TPR10_READ_TRAINING  BIT(22)
> +#define TPR10_WRITE_TRAINING BIT(23)
> +
>  struct dram_para {
>   u32 clk;
>   enum sunxi_dram_type type;
> @@ -147,6 +156,7 @@ struct dram_para {
>   u32 dx_odt;
>   u32 dx_dri;
>   u32 ca_dri;
> + u32 tpr10;
>  };
>  
>  
> diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
> index cad53f19912c..abcbd0fb9061 100644
> --- a/arch/arm/mach-sunxi/Kconfig
> +++ b/arch/arm/mach-sunxi/Kconfig
> @@ -52,38 +52,6 @@ config DRAM_SUN50I_H616
> like H616.
>  
>  if DRAM_SUN50I_H616
> -config DRAM_SUN50I_H616_WRITE_LEVELING
> - bool "H616 DRAM write leveling"
> - ---help---
> -   Select this when DRAM on your H616 board needs write leveling.
> -
> -config DRAM_SUN50I_H616_READ_CALIBRATION
> - bool "H616 DRAM read calibration"
> - ---help---
> -   Select this when DRAM on your H616 board needs read calibration.
> -
> -config DRAM_SUN50I_H616_READ_TRAINING
> - bool "H616 DRAM read training"
> - ---help---
> -   Select this when DRAM on your H616 board needs read training.
> -
> -config DRAM_SUN50I_H616_WRITE_TRAINING
> - bool "H616 DRAM write training"
> - ---help---
> -   Select this when DRAM on your H616 board needs write training.
> -
> -config DRAM_SUN50I_H616_BIT_DELAY_COMPENSATION
> - bool "H616 DRAM bit delay compensation"
> - ---help---
> -   Select this when DRAM on your H616 board needs bit delay
> -   compensation.
> -
> -config DRAM_SUN50I_H616_UNKNOWN_FEATURE
> - bool "H616 DRAM unknown feature"
> - ---help---
> -   Select this when DRAM on your H616 board needs this unknown
> -   feature.
> -
>  config DRAM_SUN50I_H616_DX_ODT
>   hex "H616 DRAM DX ODT parameter"
>   help
> @@ -98,6 +66,12 @@ config DRAM_SUN50I_H616_CA_DRI
>   hex "H616 DRAM CA DRI parameter"
>   help
> CA DRI value from vendor DRAM settings.
> +
> +config DRAM_SUN50I_H616_TPR10
> + hex "H616 DRAM TPR10 parameter"
> + help
> +   TPR10 value from vendor DRAM settings. It tells which features
> +   should be configured, like write leveling, read calibration, etc.
>  endif
>  
>  config SUN6I_PRCM
> diff --git a/arch/arm/mach-sunxi/dram_sun50i_h616.c 
> b/arch/arm/mach-sunxi/dram_sun50i_h616.c
> index 06a07dfbf9cc..14a01a3c4e54 100644
> --- a/arch/arm/mach-sunxi/dram_sun50i_h616.c
> +++ b/arch/arm/mach-sunxi/dram_sun50i_h616.c
> @@ -577,109 +577,112 @@ static bool mctl_phy_bit_delay_compensation(struct 
> dram_para *para)
>   u32 *ptr;
>   int i;
>  
> - clrbits_le32(SUNXI_DRAM_PHY0_BASE + 0x60, 1);
> - setbits_le32(SUNXI_DRAM_PHY0_BASE + 8, 8);
> - clrbits_le32(SUNXI_DRAM_PHY0_BASE + 0x190, 0x10);
> + if (para->tpr10 & TPR10_UNKNOWN_FEAT2) {
> + clrbits_le32(SUNXI_DRAM_PHY0_BASE + 0x60, 1);
> + setbits_le32(SUNXI_DRAM_PHY0_BASE + 8, 8);
>

Re: [PATCH v3 2/2] board: mediatek: add mt8195 demo board

[Tom Rini]

On Mon, Dec 12, 2022 at 11:53:04AM -0500, Tom Rini wrote:
> On Thu, Nov 10, 2022 at 03:34:53PM +0800, Macpaul Lin wrote:
> 
> > From: Fabien Parent 
> > 
> > Add mt8195-demo board support.
> > This demo purpose board uses MediaTek's MT8195 SoC.
> > 
> > Signed-off-by: Fabien Parent 
> > Signed-off-by: Amjad Ouled-Ameur 
> > Signed-off-by: Macpaul Lin 
> [snip]
> > +#include 
> > +
> > +#define CONFIG_SYS_NS16550_SERIAL
> > +#define CONFIG_SYS_NS16550_REG_SIZE-4
> > +#define CONFIG_SYS_NS16550_MEM32
> > +#define CONFIG_SYS_NS16550_COM10x11002000
> > +#define CONFIG_SYS_NS16550_CLK 2600
> 
> This is unused, I believe.  But when trying to build with current next I
> get:
> Error: Load Address must be set.
> Error: Bad parameters for image type
> 
> Please rebase on top of current next and repost, thanks!

Sorry for the noise, this failed due to another patch that needs to be
reworked instead.

-- 
Tom


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Re: [PATCH] serial: ns16550: Enable clocks during probe

[Tom Rini]

On Sun, Nov 27, 2022 at 11:48:34PM -0600, Samuel Holland wrote:

> If the UART bus or baud clock has a gate, it must be enabled before the
> UART can be used.
> 
> Signed-off-by: Samuel Holland 
> Reviewed-by: Stefan Roese 

This breaks building on phycore-rk3288

-- 
Tom


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Re: [PATCH 2/2] musb-new: omap2430: fix musb probing in gadget mode

[Tom Rini]

On Sat, Nov 26, 2022 at 11:30:10PM +0100, Andreas Kemnade wrote:

> Host mode structures were accessed but not initialized
> and gadget dm did not compile at all.
> 
> Signed-off-by: Andreas Kemnade 
> ---
>  drivers/usb/musb-new/omap2430.c | 42 -
>  1 file changed, 25 insertions(+), 17 deletions(-)

This breaks omap3_beagle and omap3_evm.

-- 
Tom


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Re: [PATCH v3 2/2] board: mediatek: add mt8195 demo board

[Tom Rini]

On Mon, Dec 12, 2022 at 01:53:05PM -0500, Tom Rini wrote:
> On Mon, Dec 12, 2022 at 11:53:04AM -0500, Tom Rini wrote:
> > On Thu, Nov 10, 2022 at 03:34:53PM +0800, Macpaul Lin wrote:
> > 
> > > From: Fabien Parent 
> > > 
> > > Add mt8195-demo board support.
> > > This demo purpose board uses MediaTek's MT8195 SoC.
> > > 
> > > Signed-off-by: Fabien Parent 
> > > Signed-off-by: Amjad Ouled-Ameur 
> > > Signed-off-by: Macpaul Lin 
> > [snip]
> > > +#include 
> > > +
> > > +#define CONFIG_SYS_NS16550_SERIAL
> > > +#define CONFIG_SYS_NS16550_REG_SIZE  -4
> > > +#define CONFIG_SYS_NS16550_MEM32
> > > +#define CONFIG_SYS_NS16550_COM1  0x11002000
> > > +#define CONFIG_SYS_NS16550_CLK   2600
> > 
> > This is unused, I believe.  But when trying to build with current next I
> > get:
> > Error: Load Address must be set.
> > Error: Bad parameters for image type
> > 
> > Please rebase on top of current next and repost, thanks!
> 
> Sorry for the noise, this failed due to another patch that needs to be
> reworked instead.

Welp, I should have finished my re-testing.  The patch that broke
phycore-rk3288 and I assumed broke this platform too, did not break this
platform, there's still some other problem here.

-- 
Tom


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Re: [PATCH V2 1/1] Configs: enable gigadevice xilinx_zynqmp_mini_qspi_defconfig

[Vlim]

Hi, Michal,

Do you mean group a few files in to one patch?

Regards,

Victor



Get Outlook for Android

From: Michal Simek 
Sent: Monday, December 12, 2022 10:58:00 PM
To: Vlim 
Cc: u-boot@lists.denx.de ; vikhyat.go...@amd.com 
; ashok.reddy.s...@amd.com 
Subject: Re: [PATCH V2 1/1] Configs: enable gigadevice 
xilinx_zynqmp_mini_qspi_defconfig

此为外部邮件，谨防钓鱼邮件，请注意邮件是否涉及敏感信息

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attention to whether the email contains sensitive information


Hi Victor,

po 12. 12. 2022 v 15:50 odesílatel Victor Lim  napsal:
>
> enabling gigadevice in this file

it is quite clear that you are changing it in this file not another
one. Remove it.

And send it as a series because I really don't want to pick it up one
by one when we have b4
and can download all of them together.

Thanks,
Michal



--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: 
https://apc01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fwww.monstr.eu%2F&data=05%7C01%7Cvlim%40gigadevice.com%7C6bb31077525c42d9ad9c08dadc514ae1%7Cf84ba339959c4ab19b671e43414f945e%7C0%7C0%7C638064538983434499%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C2000%7C%7C%7C&sdata=%2BA3kGtoOST4zkZ0hCpiCiU5D9Zlm%2BzHpmVxpfs1Llj0%3D&reserved=0
 p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal SoCs

[PATCH v4 0/5] cmd: source: Support specifying config name

[Sean Anderson]

This series adds support for using configs with the source command. See
the third patch for details.

Changes in v4:
- Add fallback for fit_config_verify
- Fix fit_conf_get_prop_node missing a phase

Changes in v3:
- Halve the quotes

Changes in v2:
- Add test for source command

Sean Anderson (5):
  image: Add fallback for fit_config_verify
  test: Add test for source command
  treewide: Use NULL for script image name
  cmd: source: Clean up a few lines
  cmd: source: Support specifying config name

 .../cmd_stm32prog/cmd_stm32prog.c |  2 +-
 boot/bootmeth_script.c|  2 +-
 cmd/source.c  | 84 +--
 doc/uImage.FIT/source_file_format.txt |  3 +
 drivers/usb/gadget/f_sdp.c|  2 +-
 include/image.h   | 26 --
 test/py/tests/source.its  | 43 ++
 test/py/tests/test_source.py  | 37 
 8 files changed, 164 insertions(+), 35 deletions(-)
 create mode 100644 test/py/tests/source.its
 create mode 100644 test/py/tests/test_source.py

-- 
2.35.1.1320.gc452695387.dirty

[PATCH v4 1/5] image: Add fallback for fit_config_verify

[Sean Anderson]

Add a fallback for this function so it can be used without regard to
whether FIT_SIGNATURE is enabled or not.

Signed-off-by: Sean Anderson 
---

Changes in v4:
- New

 include/image.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/include/image.h b/include/image.h
index 6f21dafba8..2a53c30486 100644
--- a/include/image.h
+++ b/include/image.h
@@ -1258,7 +1258,14 @@ int fit_image_verify_with_data(const void *fit, int 
image_noffset,
   size_t size);
 
 int fit_image_verify(const void *fit, int noffset);
+#if CONFIG_IS_ENABLED(FIT_SIGNATURE)
 int fit_config_verify(const void *fit, int conf_noffset);
+#else
+static inline int fit_config_verify(const void *fit, int conf_noffset)
+{
+   return 0;
+}
+#endif
 int fit_all_image_verify(const void *fit);
 int fit_config_decrypt(const void *fit, int conf_noffset);
 int fit_image_check_os(const void *fit, int noffset, uint8_t os);
-- 
2.35.1.1320.gc452695387.dirty

[PATCH v4 2/5] test: Add test for source command

[Sean Anderson]

This adds a basic test for FIT image handling by the source command.
It's a python test becase we need to run mkimage.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

(no changes since v3)

Changes in v3:
- Halve the quotes

Changes in v2:
- New

 test/py/tests/source.its | 43 
 test/py/tests/test_source.py | 28 +++
 2 files changed, 71 insertions(+)
 create mode 100644 test/py/tests/source.its
 create mode 100644 test/py/tests/test_source.py

diff --git a/test/py/tests/source.its b/test/py/tests/source.its
new file mode 100644
index 00..3c62f777f1
--- /dev/null
+++ b/test/py/tests/source.its
@@ -0,0 +1,43 @@
+/dts-v1/;
+
+/ {
+description = "FIT image to test the source command";
+#address-cells = <1>;
+
+images {
+default = "script-1";
+
+script-1 {
+data = "echo 1";
+type = "script";
+arch = "sandbox";
+compression = "none";
+};
+
+script-2 {
+data = "echo 2";
+type = "script";
+arch = "sandbox";
+compression = "none";
+};
+
+not-a-script {
+data = "echo 3";
+type = "kernel";
+arch = "sandbox";
+compression = "none";
+};
+};
+
+configurations {
+default = "conf-2";
+
+conf-1 {
+script = "script-1";
+};
+
+conf-2 {
+script = "script-2";
+};
+};
+};
diff --git a/test/py/tests/test_source.py b/test/py/tests/test_source.py
new file mode 100644
index 00..e5ffdfe3fc
--- /dev/null
+++ b/test/py/tests/test_source.py
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0+
+# Copyright (C) 2022 Sean Anderson 
+
+import os
+import pytest
+import u_boot_utils as util
+
+@pytest.mark.boardspec('sandbox')
+@pytest.mark.buildconfigspec('cmd_echo')
+@pytest.mark.buildconfigspec('cmd_source')
+@pytest.mark.buildconfigspec('fit')
+def test_source(u_boot_console):
+# Compile our test script image
+cons = u_boot_console
+mkimage = os.path.join(cons.config.build_dir, 'tools/mkimage')
+its = os.path.join(cons.config.source_dir, 'test/py/tests/source.its')
+fit = os.path.join(cons.config.build_dir, 'source.itb')
+util.run_and_log(cons, (mkimage, '-f', its, fit))
+cons.run_command(f'host load hostfs - $loadaddr {fit}')
+
+assert '1' in cons.run_command('source')
+assert '1' in cons.run_command('source :script-1')
+assert '2' in cons.run_command('source :script-2')
+assert 'Fail' in cons.run_command('source :not-a-script || echo Fail')
+
+cons.run_command('fdt addr $loadaddr')
+cons.run_command('fdt rm /images default')
+assert 'Fail' in cons.run_command('source || echo Fail')
-- 
2.35.1.1320.gc452695387.dirty

[PATCH v4 3/5] treewide: Use NULL for script image name

[Sean Anderson]

Two callers of image_source_script specify an image name. However, both
use the deprecated @ syntax, indicating that they have not been updated
in a while. If CONFIG_FIT_SIGNATURE is enabled, we will reject such
names outright. Back in commit 152576a598c ("stm32mp: stm32prog: handle
U-Boot script in flashlayout alternate"), we even renamed one of the
nodes. Instead of hard-coding a script image name, just use the default
image.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
Reviewed-by: Patrick Delaunay 
---
This has a non-zero chance of breaking something, especially for SDP.
It's not strictly necessary for the following patches, so I can drop it
if there are any issues.

(no changes since v1)

 arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c | 2 +-
 drivers/usb/gadget/f_sdp.c  | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c 
b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
index 007f713130..3627b4c35c 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
@@ -154,7 +154,7 @@ static int do_stm32prog(struct cmd_tbl *cmdtp, int flag, 
int argc,
do_bootz(cmdtp, 0, 4, bootm_argv);
}
if (data->script)
-   image_source_script(data->script, "script@stm32prog");
+   image_source_script(data->script, NULL);
 
if (reset) {
puts("Reset...\n");
diff --git a/drivers/usb/gadget/f_sdp.c b/drivers/usb/gadget/f_sdp.c
index af4b167e17..1643d28947 100644
--- a/drivers/usb/gadget/f_sdp.c
+++ b/drivers/usb/gadget/f_sdp.c
@@ -868,7 +868,7 @@ static int sdp_handle_in_ep(struct spl_image_info 
*spl_image,
jump_to_image_no_args(&spl_image);
 #else
/* In U-Boot, allow jumps to scripts */
-   image_source_script(sdp_func->jmp_address, "script@1");
+   image_source_script(sdp_func->jmp_address, NULL);
 #endif
}
 
-- 
2.35.1.1320.gc452695387.dirty

[PATCH v4 4/5] cmd: source: Clean up a few lines

[Sean Anderson]

This simplifies a few lines and corrects an error message.

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

(no changes since v1)

 cmd/source.c | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/cmd/source.c b/cmd/source.c
index 698d9f86d9..5973824601 100644
--- a/cmd/source.c
+++ b/cmd/source.c
@@ -128,16 +128,14 @@ int image_source_script(ulong addr, const char *fit_uname)
}
 
if (!fit_image_check_type (fit_hdr, noffset, IH_TYPE_SCRIPT)) {
-   puts ("Not a image image\n");
+   puts("Not a script image\n");
return 1;
}
 
/* verify integrity */
-   if (verify) {
-   if (!fit_image_verify(fit_hdr, noffset)) {
-   puts ("Bad Data Hash\n");
-   return 1;
-   }
+   if (verify && !fit_image_verify(fit_hdr, noffset)) {
+   puts("Bad Data Hash\n");
+   return 1;
}
 
/* get script subimage data address and length */
-- 
2.35.1.1320.gc452695387.dirty

[PATCH v4 5/5] cmd: source: Support specifying config name

[Sean Anderson]

As discussed previously [1,2], the source command is not safe to use with
verified boot unless there is a key with required = "images" (which has its
own problems). This is because if such a key is absent, signatures are
verified but not required. It is assumed that configuration nodes will
provide the signature. Because the source command does not use
configurations to determine the image to source, effectively no
verification takes place.

To address this, allow specifying configuration nodes. We use the same
syntax as the bootm command (helpfully provided for us by fit_parse_conf).
By default, we first try the default config and then the default image. To
force using a config, # must be present in the command (e.g. `source
$loadaddr#my-conf`). For convenience, the config may be omitted, just like
the address may be (e.g. `source \#`). This also works for images
(`source :` behaves exactly like `source` currently does).

[1] 
https://lore.kernel.org/u-boot/7d711133-d513-5bcb-52f2-a9dbaa9ee...@prevas.dk/
[2] 
https://lore.kernel.org/u-boot/042dcb34-f85f-351e-1b0e-513f89005...@gmail.com/

Signed-off-by: Sean Anderson 
Reviewed-by: Simon Glass 
---

Changes in v4:
- Fix fit_conf_get_prop_node missing a phase

Changes in v3:
- Halve the quotes

 .../cmd_stm32prog/cmd_stm32prog.c |  2 +-
 boot/bootmeth_script.c|  2 +-
 cmd/source.c  | 74 +--
 doc/uImage.FIT/source_file_format.txt |  3 +
 drivers/usb/gadget/f_sdp.c|  2 +-
 include/image.h   | 19 +++--
 test/py/tests/test_source.py  | 11 ++-
 7 files changed, 83 insertions(+), 30 deletions(-)

diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c 
b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
index 3627b4c35c..cb13a14d82 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/cmd_stm32prog.c
@@ -154,7 +154,7 @@ static int do_stm32prog(struct cmd_tbl *cmdtp, int flag, 
int argc,
do_bootz(cmdtp, 0, 4, bootm_argv);
}
if (data->script)
-   image_source_script(data->script, NULL);
+   image_source_script(data->script, NULL, NULL);
 
if (reset) {
puts("Reset...\n");
diff --git a/boot/bootmeth_script.c b/boot/bootmeth_script.c
index d1c3f94003..6c84721d1c 100644
--- a/boot/bootmeth_script.c
+++ b/boot/bootmeth_script.c
@@ -101,7 +101,7 @@ static int script_boot(struct udevice *dev, struct bootflow 
*bflow)
log_debug("mmc_bootdev: %s\n", env_get("mmc_bootdev"));
 
addr = map_to_sysmem(bflow->buf);
-   ret = image_source_script(addr, NULL);
+   ret = image_source_script(addr, NULL, NULL);
if (ret)
return log_msg_ret("boot", ret);
 
diff --git a/cmd/source.c b/cmd/source.c
index 5973824601..94da5d8d6a 100644
--- a/cmd/source.c
+++ b/cmd/source.c
@@ -42,7 +42,7 @@ static const char *get_default_image(const void *fit)
 }
 #endif
 
-int image_source_script(ulong addr, const char *fit_uname)
+int image_source_script(ulong addr, const char *fit_uname, const char 
*confname)
 {
ulong   len;
 #if defined(CONFIG_LEGACY_IMAGE_FORMAT)
@@ -112,19 +112,47 @@ int image_source_script(ulong addr, const char *fit_uname)
return 1;
}
 
-   if (!fit_uname)
-   fit_uname = get_default_image(fit_hdr);
-
if (!fit_uname) {
-   puts("No FIT subimage unit name\n");
-   return 1;
-   }
+   /* If confname is empty, use the default */
+   if (confname && *confname)
+   noffset = fit_conf_get_node(fit_hdr, confname);
+   else
+   noffset = fit_conf_get_node(fit_hdr, NULL);
+   if (noffset < 0) {
+   if (!confname)
+   goto fallback;
+   printf("Could not find config %s\n", confname);
+   return 1;
+   }
 
-   /* get script component image node offset */
-   noffset = fit_image_get_node (fit_hdr, fit_uname);
-   if (noffset < 0) {
-   printf ("Can't find '%s' FIT subimage\n", fit_uname);
-   return 1;
+   if (verify && fit_config_verify(fit_hdr, noffset))
+   return 1;
+
+   noffset = fit_conf_get_prop_node(fit_hdr, noffset,
+FIT_SCRIPT_PROP,
+IH_PHASE_NONE);
+   if (noffset < 0) {
+   if (!confname)
+  

Re: [PATCH v4 1/5] image: Add fallback for fit_config_verify

[Tom Rini]

On Mon, Dec 12, 2022 at 02:12:07PM -0500, Sean Anderson wrote:

> Add a fallback for this function so it can be used without regard to
> whether FIT_SIGNATURE is enabled or not.
> 
> Signed-off-by: Sean Anderson 

Reviewed-by: Tom Rini 

-- 
Tom


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[PATCH] net: Fix memory corruption in eth_halt() if the stop handler frees the priv member

[Bernhard Rosenkränzer]

Calling eth_halt() could result in memory corruption if the stop()
handler frees or modifies the priv member.

A stored value of dev_get_uclass_priv() is assumed to remain valid
after the stop() handler has been called, which is not always the
case (e.g. rndis over usb gadget).

Re-check the priv pointer after calling the stop() handler.

Signed-off-by: Bernhard Rosenkränzer 
---
 net/eth-uclass.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/net/eth-uclass.c b/net/eth-uclass.c
index f41da4b37b..410f3310c7 100644
--- a/net/eth-uclass.c
+++ b/net/eth-uclass.c
@@ -343,6 +343,11 @@ void eth_halt(void)
return;
 
eth_get_ops(current)->stop(current);
+
+   priv = dev_get_uclass_priv(current);
+   if (!priv || !priv->running)
+   return;
+
priv->state = ETH_STATE_PASSIVE;
priv->running = false;
 }
-- 
2.38.1

Re: [PATCH] net: Fix memory corruption in eth_halt() if the stop handler frees the priv member

[Fabio Estevam]

Hi Bernhard,

On Mon, Dec 12, 2022 at 6:12 PM Bernhard Rosenkränzer  wrote:
>
> Calling eth_halt() could result in memory corruption if the stop()
> handler frees or modifies the priv member.
>
> A stored value of dev_get_uclass_priv() is assumed to remain valid
> after the stop() handler has been called, which is not always the
> case (e.g. rndis over usb gadget).
>
> Re-check the priv pointer after calling the stop() handler.
>
> Signed-off-by: Bernhard Rosenkränzer 
> ---
>  net/eth-uclass.c | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/net/eth-uclass.c b/net/eth-uclass.c
> index f41da4b37b..410f3310c7 100644
> --- a/net/eth-uclass.c
> +++ b/net/eth-uclass.c
> @@ -343,6 +343,11 @@ void eth_halt(void)
> return;
>
> eth_get_ops(current)->stop(current);
> +
> +   priv = dev_get_uclass_priv(current);
> +   if (!priv || !priv->running)
> +   return;
> +

Niel submitted the same fix:
https://lists.denx.de/pipermail/u-boot/2022-December/502055.html

Re: [PATCH 1/3] cmd: pxe: reorder kernel treatment in label_boot

[Tom Rini]

On Fri, Oct 28, 2022 at 11:01:18AM +0200, Patrick Delaunay wrote:

> Reorder kernel treatment in label_boot at the beginning of the function.
> 
> This patch doesn't change the pxe command behavior, it is only a
> preliminary step for next patch, build kernel_addr before parsing
> the label initrd and fdt to build the next bootm arguments.
> 
> Signed-off-by: Patrick Delaunay 
> Reviewed-by: Neil Armstrong 

Applied to u-boot/next, thanks!

-- 
Tom


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Re: [PATCH 2/3] cmd: pxe: support INITRD and FDT selection with FIT

[Tom Rini]

On Fri, Oct 28, 2022 at 11:01:19AM +0200, Patrick Delaunay wrote:

> Since the commit d5ba6188dfbf ("cmd: pxe_utils: Check fdtcontroladdr
> in label_boot") the FDT or the FDTDIR label is required in extlinux.conf
> and the fallback done by bootm command when only the device tree present
> in this command parameters is no more performed when FIT is used for
> kernel.
> 
> When the label FDT or FDTDIR are absent or if the device tree file is
> absent, the PXE command in U-Boot uses the default U-Boot device tree
> selected by fdtcontroladdr = gd->fdt_blob, it is the "Scenario 3".
> 
> With this scenario the bootm FIP fallback is no more possible with
> the extlinux.conf when only "kernel" label is present and is a FIP:
> 
>   kernel #[# 
> As the U-Boot FDT is always provided in the third bootm argument,
> the device tree found in FIP is not used as fallback, it was done
> previously in boot_get_fdt().
> 
> This patch adds a new field kernel_label to save the full kernel label.
> The FDT bootm parameters use the kernel address (to avoid to load a
> second time the same FIP) and the config when this full label is reused
> for "fdt" or "initrd" label.
> 
> This FIP support in extlinux.conf is restored when the "FDT" label
> can be found and select the same FIP (identical file and configuration):
> 
>   kernel #[#   fdt #[# 
> The patch add also this possibility for initrd.
> 
>   initrd #[# 
> Signed-off-by: Patrick Delaunay 
> Reviewed-by: Neil Armstrong 

Applied to u-boot/next, thanks!

-- 
Tom


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