Re: [PATCH v2 2/2] pmic: pca9450: Add regulator driver
Hi Tim, Marek,
On 20.05.22 00:24, Tim Harvey wrote:
On Sun, Apr 24, 2022 at 2:41 PM Marek Vasut wrote:
Add PCA9450 regulator driver. This is complementary driver for the BUCKn
and LDOn regulators provided by the PCA9450 PMIC driver. Currently the
driver permits reading the settngs and configuring the BUCKn and LDOn
regulators.
Reviewed-by: Fabio Estevam
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
V2: Add RB by Fabio
---
drivers/power/pmic/pca9450.c | 6 +-
drivers/power/regulator/Kconfig | 15 ++
drivers/power/regulator/Makefile | 1 +
drivers/power/regulator/pca9450.c | 333 ++
include/power/pca9450.h | 11 +
5 files changed, 363 insertions(+), 3 deletions(-)
create mode 100644 drivers/power/regulator/pca9450.c
diff --git a/drivers/power/pmic/pca9450.c b/drivers/power/pmic/pca9450.c
index 26c876c9c45..116ac49a8db 100644
--- a/drivers/power/pmic/pca9450.c
+++ b/drivers/power/pmic/pca9450.c
@@ -83,9 +83,9 @@ static struct dm_pmic_ops pca9450_ops = {
};
static const struct udevice_id pca9450_ids[] = {
- { .compatible = "nxp,pca9450a", .data = 0x25, },
- { .compatible = "nxp,pca9450b", .data = 0x25, },
- { .compatible = "nxp,pca9450c", .data = 0x25, },
+ { .compatible = "nxp,pca9450a", .data = NXP_CHIP_TYPE_PCA9450A, },
+ { .compatible = "nxp,pca9450b", .data = NXP_CHIP_TYPE_PCA9450BC, },
+ { .compatible = "nxp,pca9450c", .data = NXP_CHIP_TYPE_PCA9450BC, },
{ }
};
diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index cd253b95f2f..d486bad6bdc 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -60,6 +60,21 @@ config SPL_DM_REGULATOR_BD71837
This config enables implementation of driver-model regulator uclass
features for regulators on ROHM BD71837 and BD71847 in SPL.
+config DM_REGULATOR_PCA9450
+ bool "Enable Driver Model for NXP PCA9450 regulators"
+ depends on DM_REGULATOR && DM_PMIC_PCA9450
+ help
+ This config enables implementation of driver-model regulator uclass
+ features for regulators on NXP PCA9450 PMICs. PCA9450 contains 6 bucks
+ and 5 LDOS. The driver implements get/set api for value and enable.
+
+config SPL_DM_REGULATOR_PCA9450
+ bool "Enable Driver Model for NXP PCA9450 regulators in SPL"
+ depends on DM_REGULATOR_PCA9450
+ help
+ This config enables implementation of driver-model regulator uclass
+ features for regulators on ROHM PCA9450 in SPL.
+
config DM_REGULATOR_DA9063
bool "Enable Driver Model for REGULATOR DA9063"
depends on DM_REGULATOR && DM_PMIC_DA9063
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 4efb32a3228..d2d17f7aed0 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_DA9063) += da9063.o
obj-$(CONFIG_DM_REGULATOR_MAX77686) += max77686.o
obj-$(CONFIG_$(SPL_)DM_PMIC_PFUZE100) += pfuze100.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_BD71837) += bd71837.o
+obj-$(CONFIG_$(SPL_)DM_REGULATOR_PCA9450) += pca9450.o
obj-$(CONFIG_$(SPL_)REGULATOR_PWM) += pwm_regulator.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_FAN53555) += fan53555.o
obj-$(CONFIG_$(SPL_)DM_REGULATOR_COMMON) += regulator_common.o
diff --git a/drivers/power/regulator/pca9450.c
b/drivers/power/regulator/pca9450.c
new file mode 100644
index 000..4847c9f90f0
--- /dev/null
+++ b/drivers/power/regulator/pca9450.c
@@ -0,0 +1,333 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * NXP PCA9450 regulator driver
+ * Copyright (C) 2022 Marek Vasut
+ *
+ * Largely based on:
+ * ROHM BD71837 regulator driver
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define HW_STATE_CONTROL 0
+#define DEBUG
+
+/**
+ * struct pca9450_vrange - describe linear range of voltages
+ *
+ * @min_volt: smallest voltage in range
+ * @step: how much voltage changes at each selector step
+ * @min_sel: smallest selector in the range
+ * @max_sel: maximum selector in the range
+ */
+struct pca9450_vrange {
+ unsigned intmin_volt;
+ unsigned intstep;
+ u8 min_sel;
+ u8 max_sel;
+};
+
+/**
+ * struct pca9450_plat - describe regulator control registers
+ *
+ * @name: name of the regulator. Used for matching the dt-entry
+ * @enable_reg:register address used to enable/disable regulator
+ * @enablemask:register mask used to enable/disable regulator
+ * @volt_reg: register address used to configure regulator voltage
+ * @volt_mask: register mask used to configure regulator voltage
+ * @ranges:pointer to ranges of regulator voltages and matching register
+ * values
+ * @numranges: number of voltage ranges pointed by ranges
+ * @dvs: whether the voltage can be ch
Re: [PATCH 11/16] board: stm32pm1: add stm32mp13 board support
Hi Patrick
One typo and one remark below
On 5/6/22 16:06, Patrick Delaunay wrote:
> Add stm32mp15x prefix to all STM32MP15x board specific function,
> this patch is a preliminary step for STM32MP13x support.
>
> This patch also add the RCC probe to avoid circular access with
s/add/adds
> usbphyc probe as clk provider.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> board/st/stm32mp1/stm32mp1.c | 27 ++-
> 1 file changed, 18 insertions(+), 9 deletions(-)
>
> diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
> index fff1880e5b..4ba7201ffb 100644
> --- a/board/st/stm32mp1/stm32mp1.c
> +++ b/board/st/stm32mp1/stm32mp1.c
> @@ -547,8 +547,7 @@ static void sysconf_init(void)
> clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
> }
>
> -/* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
> -static int dk2_i2c1_fix(void)
> +static int board_stm32mp15x_dk2_init(void)
> {
> ofnode node;
> struct gpio_desc hdmi, audio;
> @@ -557,6 +556,7 @@ static int dk2_i2c1_fix(void)
> if (!IS_ENABLED(CONFIG_DM_REGULATOR))
> return -ENODEV;
>
> + /* Fix to make I2C1 usable on DK2 for touchscreen usage in kernel */
> node = ofnode_path("/soc/i2c@40012000/hdmi-transmitter@39");
> if (!ofnode_valid(node)) {
> log_debug("no hdmi-transmitter@39 ?\n");
> @@ -604,7 +604,7 @@ error:
> return ret;
> }
>
> -static bool board_is_dk2(void)
> +static bool board_is_stm32mp15x_dk2(void)
> {
> if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
> of_machine_is_compatible("st,stm32mp157c-dk2"))
> @@ -613,7 +613,7 @@ static bool board_is_dk2(void)
> return false;
> }
>
> -static bool board_is_ev1(void)
> +static bool board_is_stm32mp15x_ev1(void)
> {
> if (CONFIG_IS_ENABLED(TARGET_ST_STM32MP15x) &&
> (of_machine_is_compatible("st,stm32mp157a-ev1") ||
> @@ -637,7 +637,7 @@ U_BOOT_DRIVER(goodix) = {
> .of_match = goodix_ids,
> };
>
> -static void board_ev1_init(void)
> +static void board_stm32mp15x_ev1_init(void)
> {
> struct udevice *dev;
>
> @@ -648,13 +648,22 @@ static void board_ev1_init(void)
> /* board dependent setup after realloc */
> int board_init(void)
> {
> + struct udevice *dev;
> + int ret;
> +
> + /* probe RCC to avoid circular access with usbphyc probe as clk
> provider */
> + if (IS_ENABLED(CONFIG_CLK_STM32MP13)) {
> + ret = uclass_get_device_by_driver(UCLASS_CLK,
> DM_DRIVER_GET(stm32mp1_clock), &dev);
> + log_debug("Clock init failed: %d\n", ret);
I am wondering if usage of DM_FLAG_PROBE_AFTER_BIND in flag would avoid this
above piece of code ?
> + }
> +
> board_key_check();
>
> - if (board_is_ev1())
> - board_ev1_init();
> + if (board_is_stm32mp15x_ev1())
> + board_stm32mp15x_ev1_init();
>
> - if (board_is_dk2())
> - dk2_i2c1_fix();
> + if (board_is_stm32mp15x_dk2())
> + board_stm32mp15x_dk2_init();
>
> if (IS_ENABLED(CONFIG_DM_REGULATOR))
> regulators_enable_boot_on(_DEBUG);
Re: [PATCH 12/16] ram: stm32mp1: add support of STM32MP13x
HI Patrick
On 5/6/22 16:06, Patrick Delaunay wrote:
> Add support for new compatible "st,stm32mp13-ddr" to manage the
> DDR sub system (Controller and PHY) in STM32MP13x SOC:
> - only one AXI port
> - support of 16 port output (MEMC_DRAM_DATA_WIDTH = 2)
>
> The STM32MP15x SOC have 2 AXI ports and 32 bits support.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> .../memory-controllers/st,stm32mp1-ddr.txt| 49 +++
> drivers/ram/stm32mp1/stm32mp1_ram.c | 28 +++
> 2 files changed, 57 insertions(+), 20 deletions(-)
>
> diff --git a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
> b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
> index 926e3e83b3..e6ea8d0ef5 100644
> --- a/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
> +++ b/doc/device-tree-bindings/memory-controllers/st,stm32mp1-ddr.txt
> @@ -3,7 +3,8 @@ ST,stm32mp1 DDR3/LPDDR2/LPDDR3 Controller (DDRCTRL and
> DDRPHYC)
>
> Required properties:
>
> -- compatible : Should be "st,stm32mp1-ddr"
> +- compatible : Should be "st,stm32mp1-ddr" for STM32MP15x
> + Should be "st,stm32mp13-ddr" for STM32MP13x
> - reg: controleur (DDRCTRL) and phy (DDRPHYC) base address
> - clocks : controller clocks handle
> - clock-names: associated controller clock names
> @@ -13,6 +14,8 @@ Required properties:
> the next attributes are DDR parameters, they are generated by DDR tools
> included in STM32 Cube tool
>
> +They are required only in SPL, when TFABOOT is not activated.
> +
> info attributes:
>
> - st,mem-name: name for DDR configuration, simple string for
> information
> @@ -24,7 +27,7 @@ controlleur attributes:
> ---
> - st,ctl-reg : controleur values depending of the DDR type
> (DDR3/LPDDR2/LPDDR3)
> - for STM32MP15x: 25 values are requested in this order
> + for STM32MP15x and STM32MP13x: 25 values are requested in this order
> MSTR
> MRCTRL0
> MRCTRL1
> @@ -53,7 +56,7 @@ controlleur attributes:
>
> - st,ctl-timing : controleur values depending of frequency and timing
> parameter
> of DDR
> - for STM32MP15x: 12 values are requested in this order
> + for STM32MP15x and STM32MP13x: 12 values are requested in this order
> RFSHTMG
> DRAMTMG0
> DRAMTMG1
> @@ -68,7 +71,7 @@ controlleur attributes:
> ODTCFG
>
> - st,ctl-map : controleur values depending of address mapping
> - for STM32MP15x: 9 values are requested in this order
> + for STM32MP15x and STM32MP13x: 9 values are requested in this order
> ADDRMAP1
> ADDRMAP2
> ADDRMAP3
> @@ -99,6 +102,19 @@ controlleur attributes:
> PCFGWQOS0_1
> PCFGWQOS1_1
>
> + for STM32MP13x: 11 values are requested in this order
> + SCHED
> + SCHED1
> + PERFHPR1
> + PERFLPR1
> + PERFWR1
> + PCFGR_0
> + PCFGW_0
> + PCFGQOS0_0
> + PCFGQOS1_0
> + PCFGWQOS0_0
> + PCFGWQOS1_0
> +
> phyc attributes:
>
> - st,phy-reg : phy values depending of the DDR type (DDR3/LPDDR2/LPDDR3)
> @@ -115,8 +131,19 @@ phyc attributes:
> DX2GCR
> DX3GCR
>
> + for STM32MP13x: 9 values are requested in this order
> + PGCR
> + ACIOCR
> + DXCCR
> + DSGCR
> + DCR
> + ODTCR
> + ZQ0CR1
> + DX0GCR
> + DX1GCR
> +
> - st,phy-timing : phy values depending of frequency and timing
> parameter of DDR
> - for STM32MP15x: 10 values are requested in this order
> + for STM32MP15x and STM32MP13x: 10 values are requested in this order
> PTR0
> PTR1
> PTR2
> @@ -128,16 +155,18 @@ phyc attributes:
> MR2
> MR3
>
> + for STM32MP13x: 6 values are requested in this order
> + DX0DLLCR
> + DX0DQTR
> + DX0DQSTR
> + DX1DLLCR
> + DX1DQTR
> + DX1DQSTR
> Example:
>
> / {
> soc {
> - u-boot,dm-spl;
> -
> ddr: ddr@0x5A003000{
> - u-boot,dm-spl;
> - u-boot,dm-pre-reloc;
> -
> compatible = "st,stm32mp1-ddr";
>
> reg = <0x5A003000 0x550
> diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c
> b/drivers/ram/stm32mp1/stm32mp1_ram.c
> index 49b1262461..a6c19af972 100644
> --- a/drivers/ram/stm32mp1/stm32mp1_ram.c
> +++ b/drivers/ram/stm32mp1/stm32mp1_ram.c
> @@ -230,29 +230,29 @@ static u8 get_nb_col(struct stm32mp1_ddrctl *ctl, u8
> data_bus_width)
>
> reg = readl(
Re: [PATCH v3 2/2] boot: build arch/*/lib/bootm.c if support boot linux
On Fri, May 20, 2022 at 10:59 AM Rover Mo wrote: > > arch/*/lib/bootm.c is for the boot Linux commands, not just for > bootm command. > > This commit makes CONFIG_BOOTM_LINUX selected by the boot Linux > commands and arch/*/lib/bootm.c will be built if enabled > CONFIG_BOOTM_LINUX. NAK. bootm is also used for booting VxWorks. > > Signed-off-by: Rover Mo > --- > arch/arc/lib/Makefile| 2 +- > arch/arm/lib/Makefile| 6 +++--- > arch/m68k/lib/Makefile | 2 +- > arch/microblaze/lib/Makefile | 2 +- > arch/mips/lib/Makefile | 2 +- > arch/nios2/lib/Makefile | 2 +- > arch/powerpc/lib/Makefile| 2 +- > arch/riscv/lib/Makefile | 4 ++-- > arch/sandbox/lib/Makefile| 3 +-- > arch/sh/lib/Makefile | 2 +- > arch/x86/lib/Makefile| 2 +- > arch/xtensa/lib/Makefile | 2 +- > cmd/Kconfig | 3 +++ > 13 files changed, 18 insertions(+), 16 deletions(-) > Regards, Bin
Re: [PATCH 13/16] mmc: stm32_sdmmc2: make reset property optional
Hi Patrick
On 5/6/22 16:06, Patrick Delaunay wrote:
> Although not recommended, the reset property could be made optional.
> This way the driver will probe even if no reset property is provided
> in an sdmmc node in DT. This reset is already optional in Linux.
>
> Signed-off-by: Yann Gautier
> Signed-off-by: Patrick Delaunay
> ---
>
> drivers/mmc/stm32_sdmmc2.c | 14 +++---
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/mmc/stm32_sdmmc2.c b/drivers/mmc/stm32_sdmmc2.c
> index 44bfc911af..81b07609a9 100644
> --- a/drivers/mmc/stm32_sdmmc2.c
> +++ b/drivers/mmc/stm32_sdmmc2.c
> @@ -514,10 +514,12 @@ retry_cmd:
> */
> static void stm32_sdmmc2_reset(struct stm32_sdmmc2_priv *priv)
> {
> - /* Reset */
> - reset_assert(&priv->reset_ctl);
> - udelay(2);
> - reset_deassert(&priv->reset_ctl);
> + if (reset_valid(&priv->reset_ctl)) {
> + /* Reset */
> + reset_assert(&priv->reset_ctl);
> + udelay(2);
> + reset_deassert(&priv->reset_ctl);
> + }
>
> /* init the needed SDMMC register after reset */
> writel(priv->pwr_reg_msk, priv->base + SDMMC_POWER);
> @@ -735,7 +737,7 @@ static int stm32_sdmmc2_probe(struct udevice *dev)
>
> ret = reset_get_by_index(dev, 0, &priv->reset_ctl);
> if (ret)
> - goto clk_disable;
> + dev_dbg(dev, "No reset provided\n");
>
> gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio,
>GPIOD_IS_IN);
> @@ -755,8 +757,6 @@ static int stm32_sdmmc2_probe(struct udevice *dev)
> stm32_sdmmc2_reset(priv);
> return 0;
>
> -clk_disable:
> - clk_disable(&priv->clk);
> clk_free:
> clk_free(&priv->clk);
>
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 14/16] arm: dts: stm32mp: add stm32mp13 device tree for U-Boot
HI Patrick
On 5/6/22 16:06, Patrick Delaunay wrote:
> Compile the device tree of STM32MP13x boards and add the needed
> U-Boot add-on.
>
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/dts/Makefile | 3 +
> arch/arm/dts/stm32mp13-u-boot.dtsi | 91 +
> arch/arm/dts/stm32mp135f-dk-u-boot.dtsi | 30
> 3 files changed, 124 insertions(+)
> create mode 100644 arch/arm/dts/stm32mp13-u-boot.dtsi
> create mode 100644 arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 1032ce4c85..ba2987197c 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1135,6 +1135,9 @@ dtb-$(CONFIG_ASPEED_AST2600) += ast2600-evb.dtb
>
> dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb
>
> +dtb-$(CONFIG_STM32MP13x) += \
> + stm32mp135f-dk.dtb
> +
> dtb-$(CONFIG_STM32MP15x) += \
> stm32mp157a-dk1.dtb \
> stm32mp157a-icore-stm32mp1-ctouch2.dtb \
> diff --git a/arch/arm/dts/stm32mp13-u-boot.dtsi
> b/arch/arm/dts/stm32mp13-u-boot.dtsi
> new file mode 100644
> index 00..1b5b358690
> --- /dev/null
> +++ b/arch/arm/dts/stm32mp13-u-boot.dtsi
> @@ -0,0 +1,91 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
> +/*
> + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
> + */
> +
> +/ {
> + aliases {
> + gpio0 = &gpioa;
> + gpio1 = &gpiob;
> + gpio2 = &gpioc;
> + gpio3 = &gpiod;
> + gpio4 = &gpioe;
> + gpio5 = &gpiof;
> + gpio6 = &gpiog;
> + gpio7 = &gpioh;
> + gpio8 = &gpioi;
> + pinctrl0 = &pinctrl;
> + };
> +
> + /* need PSCI for sysreset during board_f */
> + psci {
> + u-boot,dm-pre-proper;
> + };
> +
> + soc {
> + u-boot,dm-pre-reloc;
> +
> + ddr: ddr@5a003000 {
> + u-boot,dm-pre-reloc;
> +
> + compatible = "st,stm32mp13-ddr";
> +
> + reg = <0x5A003000 0x550
> +0x5A004000 0x234>;
> +
> + status = "okay";
> + };
> + };
> +};
> +
> +&bsec {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpioa {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpiob {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpioc {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpiod {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpioe {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpiof {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpiog {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpioh {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&gpioi {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&iwdg2 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&pinctrl {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&syscfg {
> + u-boot,dm-pre-reloc;
> +};
> diff --git a/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
> b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
> new file mode 100644
> index 00..dfe5bbb2e3
> --- /dev/null
> +++ b/arch/arm/dts/stm32mp135f-dk-u-boot.dtsi
> @@ -0,0 +1,30 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause
> +/*
> + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved
> + */
> +
> +#include "stm32mp13-u-boot.dtsi"
> +
> +/ {
> + aliases {
> + mmc0 = &sdmmc1;
> + };
> +
> + config {
> + u-boot,mmc-env-partition = "u-boot-env";
> + };
> +};
> +
> +&uart4 {
> + u-boot,dm-pre-reloc;
> +};
> +
> +&uart4_pins_a {
> + u-boot,dm-pre-reloc;
> + pins1 {
> + u-boot,dm-pre-reloc;
> + };
> + pins2 {
> + u-boot,dm-pre-reloc;
> + };
> +};
Reviewed-by: Patrice Chotard
Thanks
Patrice
Re: [PATCH 15/16] configs: add stm32mp13 defconfig
Hi Patrick On 5/6/22 16:06, Patrick Delaunay wrote: > Add a initial config for STM32M13x SOC family, using the stm32mp135f-dk > device tree. > > Signed-off-by: Patrick Delaunay > --- > > board/st/stm32mp1/MAINTAINERS | 1 + > configs/stm32mp13_defconfig | 54 +++ > 2 files changed, 55 insertions(+) > create mode 100644 configs/stm32mp13_defconfig > > diff --git a/board/st/stm32mp1/MAINTAINERS b/board/st/stm32mp1/MAINTAINERS > index c9252e90f4..d5a09cdc39 100644 > --- a/board/st/stm32mp1/MAINTAINERS > +++ b/board/st/stm32mp1/MAINTAINERS > @@ -6,6 +6,7 @@ S:Maintained > F: arch/arm/dts/stm32mp13* > F: arch/arm/dts/stm32mp15* > F: board/st/stm32mp1/ > +F: configs/stm32mp13_defconfig > F: configs/stm32mp15_defconfig > F: configs/stm32mp15_basic_defconfig > F: configs/stm32mp15_trusted_defconfig > diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig > new file mode 100644 > index 00..877c020b4a > --- /dev/null > +++ b/configs/stm32mp13_defconfig > @@ -0,0 +1,54 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_STM32MP=y > +CONFIG_TFABOOT=y > +CONFIG_SYS_MALLOC_F_LEN=0x18 > +CONFIG_ENV_OFFSET=0x90 > +CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk" > +CONFIG_STM32MP13x=y > +CONFIG_DDR_CACHEABLE_SIZE=0x1000 > +CONFIG_TARGET_ST_STM32MP13x=y > +CONFIG_ENV_OFFSET_REDUND=0x94 > +# CONFIG_ARMV7_NONSEC is not set > +CONFIG_SYS_LOAD_ADDR=0xc200 > +CONFIG_SYS_MEMTEST_START=0xc000 > +CONFIG_SYS_MEMTEST_END=0xc400 > +CONFIG_DISTRO_DEFAULTS=y > +CONFIG_FIT=y > +CONFIG_BOOTDELAY=1 > +CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" > +CONFIG_SYS_PROMPT="STM32MP> " > +CONFIG_CMD_ADTIMG=y > +CONFIG_CMD_ERASEENV=y > +CONFIG_CMD_MEMINFO=y > +CONFIG_CMD_MEMTEST=y > +CONFIG_CMD_CLK=y > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_CACHE=y > +CONFIG_CMD_TIME=y > +CONFIG_CMD_TIMER=y > +CONFIG_CMD_LOG=y > +CONFIG_OF_LIVE=y > +CONFIG_ENV_IS_NOWHERE=y > +CONFIG_ENV_IS_IN_MMC=y > +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > +CONFIG_SYS_MMC_ENV_DEV=-1 > +CONFIG_CLK_SCMI=y > +CONFIG_STM32_SDMMC2=y > +CONFIG_DM_ETH=y > +CONFIG_PINCONF=y > +CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_REGULATOR_GPIO=y > +CONFIG_DM_REGULATOR_SCMI=y > +CONFIG_RESET_SCMI=y > +CONFIG_SERIAL_RX_BUFFER=y > +CONFIG_SYSRESET_PSCI=y > +CONFIG_TEE=y > +CONFIG_OPTEE=y > +# CONFIG_OPTEE_TA_AVB is not set > +CONFIG_ERRNO_STR=y > +# CONFIG_LMB_USE_MAX_REGIONS is not set > +CONFIG_LMB_MEMORY_REGIONS=2 > +CONFIG_LMB_RESERVED_REGIONS=16 Reviewed-by: Patrice Chotard Thanks Patrice
Re: [PATCH v2 2/2] pmic: pca9450: Add regulator driver
On 5/20/22 09:00, Stefano Babic wrote: Hi Tim, Marek, Hi, It's defined differently in include/power/bd71837.h (where it should also likely be changed to something that doesn't collide) $ git grep DVS_BUCK_RUN_MASK include/ include/power/bd71837.h:#define DVS_BUCK_RUN_MASK 0x3f include/power/pca9450.h:#define DVS_BUCK_RUN_MASK 0x7f Granted, board/gateworks/venice/spl.c is the only file I see that includes both of those. Is this merged yet? No, I set in patchworks that a new version is needed. Just to be sure this won't miss another MR, there is already V3 posted and you are explicitly in To: [PATCH v3 1/2] pmic: pca9450: Add upstream regulators subnode match [PATCH v3 2/2] pmic: pca9450: Add regulator driver
Re: [PATCH] ARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on Avenger96
Hi,
On 5/17/22 14:39, Patrick DELAUNAY wrote:
Hi,
On 5/11/22 23:09, Marek Vasut wrote:
The Avenger96 board comes in multiple regulator configurations.
- rev.100 or rev.200 have Buck3 preconfigured to 3V3 operation on
boot and contains extra Enpirion EP53A8LQI DCDC converter which
supplies the IO. Reduce Buck3 voltage to 2V9 to not waste power.
- rev.200L have Buck3 preconfigured to 1V8 operation and have no
Enpirion EP53A8LQI DCDC anymore, the IO is supplied from Buck3.
Configure the Buck3 voltage on this board per PMIC NVM settings and
update buck3 voltage limits in DT passed to OS before booting OS to
prevent potential hardware damage.
Signed-off-by: Marek Vasut
Cc: Patrice Chotard
Cc: Patrick Delaunay
---
arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi | 2 +-
board/dhelectronics/dh_stm32mp1/board.c | 109 +-
2 files changed, 107 insertions(+), 4 deletions(-)
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi
b/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi
index 9937b28548c..e20917824bf 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi
@@ -19,7 +19,7 @@
};
&vdd
{http://patchwork.ozlabs.org/project/uboot/patch/20220517143655.1.I4d61d5a725e965f1476b26412ed1e8329aa9ba98@changeid/
- regulator-min-microvolt = <290>;
+ regulator-min-microvolt = <180>;
regulator-max-microvolt = <290>;
};
diff --git a/board/dhelectronics/dh_stm32mp1/board.c
b/board/dhelectronics/dh_stm32mp1/board.c
index 67273f90992..d407f0bf592 100644
--- a/board/dhelectronics/dh_stm32mp1/board.c
+++ b/board/dhelectronics/dh_stm32mp1/board.c
@@ -594,14 +594,98 @@ static void board_init_fmc2(void)
setbits_le32(STM32_FMC2_BASE + STM32_FMC2_BCR1,
STM32_FMC2_BCRx_FMCEN);
}
+#ifdef CONFIG_DM_REGULATOR
+#define STPMIC_NVM_BUCKS_VOUT_SHR
http://patchwork.ozlabs.org/project/uboot/patch/20220517143655.1.I4d61d5a725e965f1476b26412ed1e8329aa9ba98@changeid/
0xfc
+#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_1V2 0
+#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_1V8 1
+#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_3V0 2
+#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_3V3 3
+#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_MASK GENMASK(1, 0)
+#define STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_OFFSET(n) n) - 1) & 3)
* 2)
+static int board_get_regulator_buck3_nvm_uv_av96(int *uv)
+{
+ const void *fdt = gd->fdt_blob;
+ struct udevice *dev;
+ u8 bucks_vout = 0;
+ const char *prop;
+ int len, ret;
+
+ /* Check whether this is Avenger96 board. */
+ prop = fdt_getprop(fdt, 0, "compatible", &len);
This API is not compatible with CONFIG_OF_LIVE
consider replacement with ofnode_read_prop or with
of_machine_is_compatible, for example
if (!of_machine_is_compatible(prop, "arrow,stm32mp15xx-avenger96"))
return -EINVAL;
See also
http://patchwork.ozlabs.org/project/uboot/patch/20220517143655.1.I4d61d5a725e965f1476b26412ed1e8329aa9ba98@changeid/
+ if (!prop || !len)
+ return -ENODEV;
+
+ if (!strstr(prop, "avenger96"))
+ return -EINVAL;
+
+ /* Read out STPMIC1 NVM and determine default Buck3 voltage. */
+ ret = uclass_get_device_by_driver(UCLASS_MISC,
+ DM_DRIVER_GET(stpmic1_nvm),
+ &dev);
+ if (ret)
+ return ret;
+
+ ret = misc_read(dev, STPMIC_NVM_BUCKS_VOUT_SHR, &bucks_vout, 1);
+ if (ret != 1)
+ return -EINVAL;
+
+ bucks_vout >>= STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_OFFSET(3);
+ bucks_vout &= STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_MASK;
+
+ /*
+ * Avenger96 board comes in multiple regulator configurations:
+ * - rev.100 or rev.200 have Buck3 preconfigured to 3V3
operation on
+ * boot and contains extra Enpirion EP53A8LQI DCDC converter
which
+ * supplies the IO. Reduce Buck3 voltage to 2V9 to not waste
power.
+ * - rev.200L have Buck3 preconfigured to 1V8 operation and have no
+ * Enpirion EP53A8LQI DCDC anymore,
http://patchwork.ozlabs.org/project/uboot/patch/20220517143655.1.I4d61d5a725e965f1476b26412ed1e8329aa9ba98@changeid/the
IO is supplied from Buck3.
+ */
+ if (bucks_vout == STPMIC_NVM_BUCKS_VOUT_SHR_BUCK_3V3)
+ *uv = 290;
+ else
+ *uv = 180;
+
+ return 0;
+}
+
+static void board_init_regulator_av96(void)
+{
+ struct udevice *rdev;
+ int ret, uv;
+
+ ret = board_get_regulator_buck3_nvm_uv_av96(&uv);
+ if (ret) /* Not Avenger96 board. */
+ return;
+
+ ret = regulator_get_by_devname("buck3", &rdev);
+ if (ret)
+ return;
+
+ /* Adjust Buck3 per preconfigured PMIC voltage from NVM. */
+ regulator_set_value(rdev, uv);
+}
+
+static void board_init_regulator(void)
+{
+ board_init_regulator_av96();
+
+
regulators_enable_boot_on(_DEBUG);http://patchwork.ozlabs.org/project/uboot/patch/20220517143655.1.I4d61d5a725e965f1476b26412ed1e8329aa9ba98@changeid/
+}
+#else
+static inline int board_ge
Re: [Uboot-stm32] [PATCH v1 1/2] spi: stm32_qspi: Always check SR_TCF flags in stm32_qspi_wait_cmd()
Hi,
On 5/17/22 10:23, Patrick DELAUNAY wrote:
Hi Patrice,
On 5/12/22 09:17, Patrice Chotard wrote:
Currently, SR_TCF flag is checked in case there is data, this criteria
is not correct.
SR_TCF flags is set when programmed number of bytes have been
transferred
to the memory device ("bytes" comprised command and data send to the
SPI device).
So even if there is no data, we must check SR_TCF flag.
Signed-off-by: Patrice Chotard
---
drivers/spi/stm32_qspi.c | 23 +++
1 file changed, 11 insertions(+), 12 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 8f4aabc3d1..3c8faecb54 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -150,20 +150,19 @@ static int _stm32_qspi_wait_cmd(struct
stm32_qspi_priv *priv,
u32 sr;
int ret = 0;
- if (op->data.nbytes) {
- ret = readl_poll_timeout(&priv->regs->sr, sr,
- sr & STM32_QSPI_SR_TCF,
- STM32_QSPI_CMD_TIMEOUT_US);
- if (ret) {
- log_err("cmd timeout (stat:%#x)\n", sr);
- } else if (readl(&priv->regs->sr) & STM32_QSPI_SR_TEF) {
- log_err("transfer error (stat:%#x)\n", sr);
- ret = -EIO;
- }
- /* clear flags */
- writel(STM32_QSPI_FCR_CTCF | STM32_QSPI_FCR_CTEF,
&priv->regs->fcr);
+ ret = readl_poll_timeout(&priv->regs->sr, sr,
+ sr & STM32_QSPI_SR_TCF,
+ STM32_QSPI_CMD_TIMEOUT_US);
+ if (ret) {
+ log_err("cmd timeout (stat:%#x)\n", sr);
+ } else if (readl(&priv->regs->sr) & STM32_QSPI_SR_TEF) {
+ log_err("transfer error (stat:%#x)\n", sr);
+ ret = -EIO;
}
+ /* clear flags */
+ writel(STM32_QSPI_FCR_CTCF | STM32_QSPI_FCR_CTEF,
&priv->regs->fcr);
+
if (!ret)
ret = _stm32_qspi_wait_for_not_busy(priv);
Reviewed-by: Patrick Delaunay
Thanks
Patrick
___
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Applied to u-boot-stm/master, thanks!
Regards
Patrick
Re: [PATCH 16/16] doc: st: stm32mp1: add STM32MP13x support
Hi PAtrick typos below On 5/6/22 16:06, Patrick Delaunay wrote: > Add in U-Boot documentation the quick instruction for s/for/to > setup the STMicroelectronics STM32MP13x boards. > > Signed-off-by: Patrick Delaunay > --- > > doc/board/st/stm32mp1.rst | 181 ++ > 1 file changed, 125 insertions(+), 56 deletions(-) > > diff --git a/doc/board/st/stm32mp1.rst b/doc/board/st/stm32mp1.rst > index 0c5d3a90f0..25d38d337a 100644 > --- a/doc/board/st/stm32mp1.rst > +++ b/doc/board/st/stm32mp1.rst > @@ -1,41 +1,31 @@ > .. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause > .. sectionauthor:: Patrick Delaunay > > -STM32MP15x boards > +STM32MP1xx boards > = > > -This is a quick instruction for setup STM32MP15x boards. > +This is a quick instruction for setup STMicroelectronics STM32MP1xx boards. > > Futher information can be found in STMicrolectronics STM32 WIKI_. s/Futher/Further > > Supported devices > - > > -U-Boot supports STMP32MP15x SoCs: > +U-Boot supports all the STMicroelectronics MPU with the associated boards > > - - STM32MP157 > - - STM32MP153 > - - STM32MP151 > + - STMP32MP15x SoCs: > > -The STM32MP15x is a Cortex-A MPU aimed at various applications. > + - STM32MP157 > + - STM32MP153 > + - STM32MP151 > > -It features: > - > - - Dual core Cortex-A7 application core (Single on STM32MP151) > - - 2D/3D image composition with GPU (only on STM32MP157) > - - Standard memories interface support > - - Standard connectivity, widely inherited from the STM32 MCU family > - - Comprehensive security support > + - STMP32MP13x SoCs: > > -Each line comes with a security option (cryptography & secure boot) and > -a Cortex-A frequency option: > - > - - A : Cortex-A7 @ 650 MHz > - - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz > - - D : Cortex-A7 @ 800 MHz > - - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz > + - STM32MP135 > + - STM32MP133 > + - STM32MP131 > > -Everything is supported in Linux but U-Boot is limited to: > +Everything is supported in Linux but U-Boot is limited to the boot device: > > 1. UART > 2. SD card/MMC controller (SDMMC) > @@ -49,7 +39,35 @@ And the necessary drivers > 1. I2C > 2. STPMIC1 (PMIC and regulator) > 3. Clock, Reset, Sysreset > - 4. Fuse > + 4. Fuse (BSEC) > + 5. OP-TEE > + 6. ETH > + 7. USB host > + 8. WATCHDOG > + 9. RNG > + 10. RTC > + > +STM32MP15x > +`` > + > +The STM32MP15x is a Cortex-A7 MPU aimed at various applications. > + > +It features: > + > + - Dual core Cortex-A7 application core (Single on STM32MP151) > + - 2D/3D image composition with GPU (only on STM32MP157) > + - Standard memories interface support > + - Standard connectivity, widely inherited from the STM32 MCU family > + - Comprehensive security support > + - Cortex M4 coprocessor s/coprocessor/co-processor > + > +Each line comes with a security option (cryptography & secure boot) and > +a Cortex-A frequency option: > + > + - A : Cortex-A7 @ 650 MHz > + - C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz > + - D : Cortex-A7 @ 800 MHz > + - F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz > > Currently the following boards are supported: > > @@ -59,6 +77,16 @@ Currently the following boards are supported: > + stm32mp157c-ev1.dts > + stm32mp15xx-dhcor-avenger96.dts > > +STM32MP13x > +`` > + > +The STM32MP13x is a single Cortex-A7 MPU aimed at various applications. > + > +Currently the following boards are supported: > + > + + stm32mp135f-dk.dts > + > + > Boot Sequences > -- > > @@ -71,12 +99,22 @@ Boot Sequences > + > ++-+--+ > | | embedded RAM | DDR > | > > +--++-+--+ > +| TrustZone| secure monitor > | > ++--++-+--+ > + > +The trusted boot chain is recommended with: > + > +- FSBL = **TF-A BL2** > +- Secure monitor = **OP-TEE** > +- SSBL = **U-Boot** > + > +It is the only supported boot chain for STM32MP13x family. > > The **Trusted** boot chain with TF-A_ > ` > > defconfig_file : > - + **stm32mp15_defconfig** (for TF-A_ with FIP support) > + + **stm32mp15_defconfig** and **stm32mp13_defconfig** (for TF-A_ with > FIP support) > + **stm32mp15_trusted_defconfig** (for TF-A_ without FIP support) > > +-+--++---+ > @@ -98,8 +136,8 @@ TF-A_ (BL2) initialize the DDR and loads the next stage > binaries from a FIP file > the secure monitor to access to secure resources. > + HW_CONFIG: The hardware configuration file = the U-Boot device tree > > -The **Basic** boot chain with SPL > -` > +The **Ba
Re: [PATCH v1 2/2] spi: stm32_qspi: Remove SR_BUSY bit check before sending command
Hi,
On 5/17/22 10:24, Patrick DELAUNAY wrote:
Hi Patrice
On 5/12/22 09:17, Patrice Chotard wrote:
Waiting for SR_BUSY bit when receiving a new command is not needed.
SR_BUSY bit is already managed in the previous command treatment.
Signed-off-by: Patrice Chotard
---
drivers/spi/stm32_qspi.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c
index 3c8faecb54..ceba413727 100644
--- a/drivers/spi/stm32_qspi.c
+++ b/drivers/spi/stm32_qspi.c
@@ -255,10 +255,6 @@ static int stm32_qspi_exec_op(struct spi_slave
*slave,
op->dummy.buswidth, op->data.buswidth,
op->addr.val, op->data.nbytes);
- ret = _stm32_qspi_wait_for_not_busy(priv);
- if (ret)
- return ret;
-
addr_max = op->addr.val + op->data.nbytes + 1;
if (op->data.dir == SPI_MEM_DATA_IN && op->data.nbytes) {
Reviewed-by: Patrick Delaunay
Thanks
Patrick
Applied to u-boot-stm/master, thanks!
Regards
Patrick
Re: [Uboot-stm32] [PATCH 08/16] arm: stm32mp: add support of STM32MP13x
another typo found below On 5/20/22 08:49, Patrice CHOTARD wrote: > Hi Patrick > > 2 minor typo below > > Thanks > Patrice > > On 5/6/22 16:06, Patrick Delaunay wrote: >> Introduce the code in mach-stm32mp and the configuration file >> stm32mp13_defconfig for the new STM32MP family. >> >> Signed-off-by: Patrick Delaunay >> --- >> >> arch/arm/mach-stm32mp/Kconfig | 21 +++- >> arch/arm/mach-stm32mp/Kconfig.13x | 57 + >> arch/arm/mach-stm32mp/Makefile| 1 + >> arch/arm/mach-stm32mp/cpu.c | 3 + >> arch/arm/mach-stm32mp/fdt.c | 3 + >> arch/arm/mach-stm32mp/include/mach/stm32.h| 26 >> .../arm/mach-stm32mp/include/mach/sys_proto.h | 16 ++- >> arch/arm/mach-stm32mp/stm32mp13x.c| 115 ++ >> board/st/stm32mp1/Kconfig | 15 +++ >> board/st/stm32mp1/MAINTAINERS | 2 + >> configs/stm32mp15_basic_defconfig | 2 +- >> configs/stm32mp15_defconfig | 2 +- >> configs/stm32mp15_trusted_defconfig | 2 +- >> include/configs/stm32mp13_common.h| 106 >> include/configs/stm32mp13_st_common.h | 17 +++ >> include/configs/stm32mp15_common.h| 4 +- >> 16 files changed, 385 insertions(+), 7 deletions(-) >> create mode 100644 arch/arm/mach-stm32mp/Kconfig.13x >> create mode 100644 arch/arm/mach-stm32mp/stm32mp13x.c >> create mode 100644 include/configs/stm32mp13_common.h >> create mode 100644 include/configs/stm32mp13_st_common.h >> >> diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig >> index 3b4936c326..db47baba6d 100644 >> --- a/arch/arm/mach-stm32mp/Kconfig >> +++ b/arch/arm/mach-stm32mp/Kconfig >> @@ -37,6 +37,24 @@ choice >> prompt "Select STMicroelectronics STM32MPxxx Soc" >> default STM32MP15x >> >> +config STM32MP13x >> +bool "Support STMicroelectronics STM32MP13x Soc" >> +select ARM_SMCCC >> +select CPU_V7A >> +select CPU_V7_HAS_NONSEC >> +select CPU_V7_HAS_VIRT >> +select OF_BOARD >> +select OF_BOARD_SETUP >> +select PINCTRL_STM32 >> +select STM32_RCC >> +select STM32_RESET >> +select STM32_SERIAL >> +select SYS_ARCH_TIMER >> +imply CMD_NVEDIT_INFO >> +help >> +support of STMicroelectronics SOC STM32MP13x family >> +STMicroelectronics MPU with core ARMv7 >> + >> config STM32MP15x >> bool "Support STMicroelectronics STM32MP15x Soc" >> select ARCH_SUPPORT_PSCI >> @@ -85,7 +103,7 @@ config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2 >> >> config STM32_ETZPC >> bool "STM32 Extended TrustZone Protection" >> -depends on STM32MP15x >> +depends on STM32MP15x || STM32MP13x >> default y >> imply BOOTP_SERVERIP >> help >> @@ -108,6 +126,7 @@ config CMD_STM32KEY >> This command is used to evaluate the secure boot on stm32mp SOC, >> it is deactivated by default in real products. >> >> +source "arch/arm/mach-stm32mp/Kconfig.13x" >> source "arch/arm/mach-stm32mp/Kconfig.15x" >> >> source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig" >> diff --git a/arch/arm/mach-stm32mp/Kconfig.13x >> b/arch/arm/mach-stm32mp/Kconfig.13x >> new file mode 100644 >> index 00..5fc000986e >> --- /dev/null >> +++ b/arch/arm/mach-stm32mp/Kconfig.13x >> @@ -0,0 +1,57 @@ >> +if STM32MP13x >> + >> +choice >> +prompt "STM32MP13x board select" >> +optional >> + >> +config TARGET_ST_STM32MP13x >> +bool "STMicroelectronics STM32MP13x boards" >> +imply BOOTSTAGE >> +imply CMD_BOOTSTAGE >> +imply CMD_CLS if CMD_BMP >> +imply DISABLE_CONSOLE >> +imply PRE_CONSOLE_BUFFER >> +imply SILENT_CONSOLE >> +help >> +target the STMicroelectronics board with SOC STM32MP13x >> +managed by board/st/stm32mp1. >> +The difference between board are managed with devicetree >> + >> +endchoice >> + >> +config SYS_TEXT_BASE >> +default 0xC000 >> + >> +config PRE_CON_BUF_ADDR >> +default 0xC080 >> + >> +config PRE_CON_BUF_SZ >> +default 4096 >> + >> +config BOOTSTAGE_STASH_ADDR >> +default 0xC300 >> + >> +if BOOTCOUNT_GENERIC >> +config SYS_BOOTCOUNT_SINGLEWORD >> +default y >> + >> +# TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(31) >> +config SYS_BOOTCOUNT_ADDR >> +default 0x5C00A17C >> +endif >> + >> +if DEBUG_UART >> + >> +# debug on UART4 by default >> +config DEBUG_UART_BASE >> +default 0x4001 >> + >> +# clock source is HSI on reset >> +config DEBUG_UART_CLOCK >> +default 4800 if STM32_FPGA >> +default 6400 >> +endif >> + >> +source "board/st/stm32mp1/Kconfig" >> + >> +endif >> diff --git a/arch/arm/mach-stm32mp/Makefile b/arch/arm/mach-stm32mp/Makefile >> index 0ffec6e02f..1db9057e04 100644 >> --- a/arch/arm/mach-stm32mp/Makefile >> +++ b/arch/arm/mach-stm32mp/Makefile >> @@ -8,6 +8,7
[PULL] Pull request for u-boot master / v2022.07 = u-boot-stm32-20220520
Hi Tom, Please pull the STM32 related fixes for u-boot/master, v2022.07: u-boot-stm32-20220520 - spi: fix busy bit check in stm32_qspi driver - stm32mp15: configure Buck3 voltage per PMIC NVM on Avenger96 board CI status: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/12043 Thanks, Patrick git request-pull origin/master https://source.denx.de/u-boot/custodians/u-boot-stm.git/ u-boot-stm32-20220520 The following changes since commit f83bd23e2a0e9861969c9d43395299a14f25ddda: Merge https://source.denx.de/u-boot/custodians/u-boot-marvell (2022-05-18 08:41:13 -0400) are available in the Git repository at: https://source.denx.de/u-boot/custodians/u-boot-stm.git/ tags/u-boot-stm32-20220520 for you to fetch changes up to b6a469360a0dec01dbbf087c5184a59dda494569: spi: stm32_qspi: Remove SR_BUSY bit check before sending command (2022-05-19 18:54:18 +0200) - spi: fix busy bit check in stm32_qspi driver - stm32mp15: configure Buck3 voltage per PMIC NVM on Avenger96 board Marek Vasut (1): ARM: dts: stm32: Configure Buck3 voltage per PMIC NVM on Avenger96 Patrice Chotard (2): spi: stm32_qspi: Always check SR_TCF flags in stm32_qspi_wait_cmd() spi: stm32_qspi: Remove SR_BUSY bit check before sending command arch/arm/dts/stm32mp15xx-dhcor-io1v8.dtsi | 2 +- board/dhelectronics/dh_stm32mp1/board.c | 109 ++--- drivers/spi/stm32_qspi.c | 27 +++ 3 files changed, 118 insertions(+), 20 deletions(-)
Re: [PATCH v2 2/2] pmic: pca9450: Add regulator driver
On 20.05.22 09:19, Marek Vasut wrote: On 5/20/22 09:00, Stefano Babic wrote: Hi Tim, Marek, Hi, It's defined differently in include/power/bd71837.h (where it should also likely be changed to something that doesn't collide) $ git grep DVS_BUCK_RUN_MASK include/ include/power/bd71837.h:#define DVS_BUCK_RUN_MASK 0x3f include/power/pca9450.h:#define DVS_BUCK_RUN_MASK 0x7f Granted, board/gateworks/venice/spl.c is the only file I see that includes both of those. Is this merged yet? No, I set in patchworks that a new version is needed. Just to be sure this won't miss another MR, there is already V3 posted and you are explicitly in To: [PATCH v3 1/2] pmic: pca9450: Add upstream regulators subnode match [PATCH v3 2/2] pmic: pca9450: Add regulator driver Sure, I applied this to my test branch. Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH 4/4] ARM: imx: imx5: Introduce and use UART_BASE_ADDR(n)
Hi Marek,
On 24.04.22 23:44, Marek Vasut wrote:
Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base
address. Convert all board configurations to this new macro. This is the
first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a
clean up, no functional change.
The new macro contains compile-time test to verify N is in suitable
range. The test works such that it multiplies constant N by constant
double-negation of size of a non-empty structure, i.e. it multiplies
constant N by constant 1 in each successful compilation case.
The non-empty structure may contain C11 _Static_assert(), make use of
this and place the kernel variant of static assert in there, so that
it performs the compile-time check for N in the correct range. Note
that it is not possible to directly use static_assert in compound
statements, hence this convoluted construct.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
I have not found the reason, but this breaks MX51:
https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/436880
Regards,
Stefano
arch/arm/include/asm/arch-mx5/imx-regs.h | 23 +++
include/configs/mx51evk.h| 2 +-
include/configs/mx53cx9020.h | 2 +-
include/configs/mx53loco.h | 2 +-
include/configs/usbarmory.h | 2 +-
5 files changed, 27 insertions(+), 4 deletions(-)
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h
b/arch/arm/include/asm/arch-mx5/imx-regs.h
index f763749b03c..856bc07e8ae 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -125,6 +125,29 @@
#if defined(CONFIG_MX53)
#define UART5_BASE_ADDR (AIPS2_BASE_ADDR + 0x0009)
+
+#define UART_BASE_ADDR(n) ( \
+ !!sizeof(struct { \
+ static_assert((n) >= 1 && (n) <= 5); \
+ int pad;\
+ }) * ( \
+ (n) == 1 ? UART1_BASE : \
+ (n) == 2 ? UART2_BASE : \
+ (n) == 3 ? UART3_BASE : \
+ (n) == 4 ? UART4_BASE_ADDR :\
+ UART5_BASE_ADDR)\
+ )
+#else /* i.MX51 */
+#define UART_BASE_ADDR(n) ( \
+ !!sizeof(struct { \
+ static_assert((n) >= 1 && (n) <= 4); \
+ int pad;\
+ }) * ( \
+ (n) == 1 ? UART1_BASE : \
+ (n) == 2 ? UART2_BASE : \
+ (n) == 3 ? UART3_BASE : \
+ UART4_BASE_ADDR)\
+ )
#endif
/*
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index ccfe292f6c6..814202e48d0 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -19,7 +19,7 @@
*/
#define CONFIG_FSL_IIM
-#define CONFIG_MXC_UART_BASE UART1_BASE
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
/* PMIC Controller */
#define CONFIG_POWER_SPI
diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h
index fafc5f1adcb..9f2259d2981 100644
--- a/include/configs/mx53cx9020.h
+++ b/include/configs/mx53cx9020.h
@@ -14,7 +14,7 @@
#include
-#define CONFIG_MXC_UART_BASE UART2_BASE
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(2)
#define CONFIG_FPGA_COUNT 1
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 8b9f0a29017..9851f64ee9f 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -11,7 +11,7 @@
#include
-#define CONFIG_MXC_UART_BASE UART1_BASE
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index 0faa656bc63..98b289e7ff1 100644
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -18,7 +18,7 @@
#define CONFIG_SYS_CBSIZE 512
/* UART */
-#define CONFIG_MXC_UART_BASE UART1_BASE
+#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1)
/* SD/MMC */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
Re: [Uboot-stm32] [PATCH 08/16] arm: stm32mp: add support of STM32MP13x
On 5/20/22 09:24, Patrice CHOTARD wrote: [...] @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-3-Clause */ +/* + * Copyright (C) 2022, STMicroelectronics - All Rights Reserved + * + * Configuration settings for the STMicroelectonics STM32MP15x boards s/STMicroelectonics/STMicroelectronics s@STM32MP15x@STM32MP13x@ too ;-) [...] btw. as a general comment, please do use these [...] to reduce the patch content you comment on. Searching for that one line in a wall of quoted text can be not fun.
Re: [PATCH 4/4] ARM: imx: imx5: Introduce and use UART_BASE_ADDR(n)
On 5/20/22 09:30, Stefano Babic wrote: Hi Marek, On 24.04.22 23:44, Marek Vasut wrote: Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base address. Convert all board configurations to this new macro. This is the first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a clean up, no functional change. The new macro contains compile-time test to verify N is in suitable range. The test works such that it multiplies constant N by constant double-negation of size of a non-empty structure, i.e. it multiplies constant N by constant 1 in each successful compilation case. The non-empty structure may contain C11 _Static_assert(), make use of this and place the kernel variant of static assert in there, so that it performs the compile-time check for N in the correct range. Note that it is not possible to directly use static_assert in compound statements, hence this convoluted construct. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic --- I have not found the reason, but this breaks MX51: All this UART_BASE_ADDR stuff is postponed, just drop for now.
Re: [PATCH 4/4] ARM: imx: imx5: Introduce and use UART_BASE_ADDR(n)
On 20.05.22 09:45, Marek Vasut wrote: On 5/20/22 09:30, Stefano Babic wrote: Hi Marek, On 24.04.22 23:44, Marek Vasut wrote: Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base address. Convert all board configurations to this new macro. This is the first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a clean up, no functional change. The new macro contains compile-time test to verify N is in suitable range. The test works such that it multiplies constant N by constant double-negation of size of a non-empty structure, i.e. it multiplies constant N by constant 1 in each successful compilation case. The non-empty structure may contain C11 _Static_assert(), make use of this and place the kernel variant of static assert in there, so that it performs the compile-time check for N in the correct range. Note that it is not possible to directly use static_assert in compound statements, hence this convoluted construct. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic --- I have not found the reason, but this breaks MX51: All this UART_BASE_ADDR stuff is postponed, just drop for now. Ok, understood - I remove them. Best regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH] board: turris: Find atsha device by atsha driver
On Friday 20 May 2022 07:05:50 Stefan Roese wrote:
> On 19.05.22 11:11, Pali Rohár wrote:
> > It does not matter what is DT node name of atsha device. So find it via
> > atsha driver and not by DT node name.
> >
> > Signed-off-by: Pali Rohár
>
> Just curious: What exactly does this patch fix? Is there a turris
> board with a differently named atsha DT entry?
Currently is not. In patch for Turris 1.x support I use same "crypto@64"
node name, so code would work correctly:
https://lore.kernel.org/u-boot/20220516090119.20217-1-p...@kernel.org/#Z31arch:powerpc:dts:turris1x-u-boot.dtsi
But I think that U-Boot code should be independent of the node names and
this file calls functions exported from atsha204 driver. So it is better
to find udevice based on driver which export those functions than DTS
node name.
> Still:
>
> Reviewed-by: Stefan Roese
>
> Thanks,
> Stefan
>
> > ---
> > board/CZ.NIC/turris_atsha_otp.c | 5 -
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
> > diff --git a/board/CZ.NIC/turris_atsha_otp.c
> > b/board/CZ.NIC/turris_atsha_otp.c
> > index 8c39f5e52414..e62b7ee2a49a 100644
> > --- a/board/CZ.NIC/turris_atsha_otp.c
> > +++ b/board/CZ.NIC/turris_atsha_otp.c
> > @@ -6,6 +6,7 @@
> > #include
> > #include
> > +#include
> > #include
> > #include
> > @@ -16,12 +17,14 @@
> > #define TURRIS_ATSHA_OTP_MAC0 3
> > #define TURRIS_ATSHA_OTP_MAC1 4
> > +extern U_BOOT_DRIVER(atsha204);
> > +
> > static struct udevice *get_atsha204a_dev(void)
> > {
> > /* Cannot be static because BSS does not have to be ready at this early
> > stage */
> > struct udevice *dev;
> > - if (uclass_get_device_by_name(UCLASS_MISC, "crypto@64", &dev)) {
> > + if (uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(atsha204),
> > &dev)) {
> > puts("Cannot find ATSHA204A on I2C bus!\n");
> > dev = NULL;
> > }
>
> Viele Grüße,
> Stefan Roese
>
> --
> DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH 4/4] ARM: imx: imx5: Introduce and use UART_BASE_ADDR(n)
On 20.05.22 10:11, Stefano Babic wrote: On 20.05.22 09:45, Marek Vasut wrote: On 5/20/22 09:30, Stefano Babic wrote: Hi Marek, On 24.04.22 23:44, Marek Vasut wrote: Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base address. Convert all board configurations to this new macro. This is the first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a clean up, no functional change. The new macro contains compile-time test to verify N is in suitable range. The test works such that it multiplies constant N by constant double-negation of size of a non-empty structure, i.e. it multiplies constant N by constant 1 in each successful compilation case. The non-empty structure may contain C11 _Static_assert(), make use of this and place the kernel variant of static assert in there, so that it performs the compile-time check for N in the correct range. Note that it is not possible to directly use static_assert in compound statements, hence this convoluted construct. Signed-off-by: Marek Vasut Cc: Fabio Estevam Cc: Peng Fan Cc: Stefano Babic --- I have not found the reason, but this breaks MX51: All this UART_BASE_ADDR stuff is postponed, just drop for now. Ok, understood - I remove them. Well, there is at least one patch depending on this: http://patchwork.ozlabs.org/project/uboot/patch/20220505074341.24086-2-peng@oss.nxp.com/ I will first try just to remove the i.MX5 patch, it seems to me that the MX51 is the only architecture that cannot be built. Regards, Stefano Best regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: i.MX8MP usb status
On Mon, May 16, 2022 at 12:50:34PM -0300, Fabio Estevam wrote: > Hi Marcel, > > On 16/05/2022 12:41, Marcel Ziswiler wrote: > > > Talking about uuu, has anybody managed to get that going on the i.MX > > 8M Mini yet? Regular USB device/host > > functionality works great but last I tried gadget functionality in SPL > > it gave me quite some grief. > > Please see this series: > https://patchwork.ozlabs.org/project/uboot/list/?series=251796&state=* > > I haven't had a chance to rework it. Feel free to work to submit it > if you have a chance. > > Tommaso has recently tested it: > https://www.mail-archive.com/search?l=u-boot@lists.denx.de&q=subject:%22Re%5C%3A+iMX8MM+USB+support%5C%3F%22&o=newest&f=1 Hi Fabio, I share here a more recent version of your series: https://patchwork.amarulasolutions.com/project/linux-amarula/list/?series=371 This series brings USB gadget support for i.MX8MM and allows the usage of the Serial Download Protocol, which is a convenient way for loading U-Boot via the 'uuu' tool and and flashing the eMMC via the U-Boot 'ums' command. Tested on board based on iMX8MM SOC: U-Boot SPL 2022.04-00114-gd04ac0fd3a-dirty (May 20 2022 - 10:12:08 +0200) DEBUG Normal Boot WDT: Started watchdog@3028 with servicing (60s timeout) Trying to boot from USB SDP SDP: initialize... SDP: handle requests... Downloading file of size 2366576 to 0x4040... done Jumping to header at 0x4040 Header Tag is not an IMX image Found header at 0x4041e1a0 NOTICE: BL31: v2.2(release):android-11.0.0_1.2.0-rc2-0-gcb435ee78 NOTICE: BL31: Built : 16:43:13, Feb 1 2022 welcome to lk/MP boot args 0x200 0xbe00 0x2000 0x0 initializing trusty (Built: 12:13:25 Nov 19 2020) Initializing Trusted OS SMC handler avb: Initializing AVB App hwcrypto: Initializing caam_drv: 318: job failed (0x255b) trusty_gatekeeper: Initializing hwrng_caam: Init HWRNG service provider hwrng_srv: Start HWRNG service hwcrypto_caam: Init HWCRYPTO service provider hwcrypto_srv: Start HWCRYPTO service hwkey_caam: Init HWKEY service provider hwkey_caam: 183: Invalid magic, unpack key package fail. hwkey_srv: Start HWKEY service hwcrypto: enter main event loop U-Boot 2022.04-00114-gd04ac0fd3a-dirty (May 20 2022 - 10:12:08 +0200) CPU: Freescale i.MX8MMQ rev1.0 at 1200 MHz Reset cause: POR Model: FSL i.MX8MM EVK board DRAM: 2 GiB References: - https://patchwork.ozlabs.org/project/uboot/list/?series=251796&state=* - https://www.mail-archive.com/u-boot@lists.denx.de/msg410536.html Hope this could be helpfull. Regards, Tommaso > > Someone needs to rework this series and resubmit it. > > Regards, > > Fabio Estevam > -- > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-60 Fax: (+49)-8142-66989-80 Email: feste...@denx.de -- Tommaso Merciai Embedded Linux Engineer tommaso.merc...@amarulasolutions.com __ Amarula Solutions SRL Via Le Canevare 30, 31100 Treviso, Veneto, IT T. +39 042 243 5310 i...@amarulasolutions.com www.amarulasolutions.com
[PATCH v2 0/8] ARM: imx: Add support for iMX6QDL DHCOM DRC02 and DH picoITX
This patch series adds support for the DHCOM DRC02 and DH picoITX baseboards by DH electronics. The two boards can be equipped with different SoMs. The STM32MP15xx based versions are already mainlined. This patch adds support for the iMX6QDL based variants. Changes in v2: - Rewrite board_fit_config_name_match - Return -EINVAL instead of -1 - Reviewed-by Marek - Fix spelling Philip Oberfichtner (8): ARM: imx6: Fix broken DT path in DH board file ARM: dts: imx: Migrate iMX6QDL DRC02 DTs from Linux ARM: dts: imx: Migrate iMX6QDL picoITX DTs from Linux ARM: imx6: Remove CONFIG_FEC_MXC_PHYADDR from DH header ARM: dts: imx: Simplify fec node for iMX6QDL DHCOM boards ARM: dts: imx: Configure FEC for iMX6QDL picoITX ARM: dts: imx: Configure FEC for iMX6QDL DRC02 ARM: imx6: Adapt device tree selection in DH board file arch/arm/dts/Makefile | 2 + arch/arm/dts/imx6dl-dhcom-picoitx-u-boot.dtsi | 10 ++ arch/arm/dts/imx6dl-dhcom-picoitx.dts | 20 +++ arch/arm/dts/imx6qdl-dhcom-drc02.dtsi | 143 ++ arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi | 13 -- arch/arm/dts/imx6qdl-dhcom-picoitx.dtsi | 69 + arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi| 18 +++ arch/arm/dts/imx6s-dhcom-drc02-u-boot.dtsi| 10 ++ arch/arm/dts/imx6s-dhcom-drc02.dts| 30 board/dhelectronics/dh_imx6/dh_imx6.c | 35 - configs/dh_imx6_defconfig | 2 +- include/configs/dh_imx6.h | 3 - 12 files changed, 330 insertions(+), 25 deletions(-) create mode 100644 arch/arm/dts/imx6dl-dhcom-picoitx-u-boot.dtsi create mode 100644 arch/arm/dts/imx6dl-dhcom-picoitx.dts create mode 100644 arch/arm/dts/imx6qdl-dhcom-drc02.dtsi create mode 100644 arch/arm/dts/imx6qdl-dhcom-picoitx.dtsi create mode 100644 arch/arm/dts/imx6s-dhcom-drc02-u-boot.dtsi create mode 100644 arch/arm/dts/imx6s-dhcom-drc02.dts -- 2.34.1
[PATCH v2 1/8] ARM: imx6: Fix broken DT path in DH board file
In the DH electronics iMX6 board file fix the outdated eeprom path by
using a DT label instead.
The label has been newly created for all iMX6QDL DHCOM boards.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Reviewed-by Marek
arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi | 11 +++
board/dhelectronics/dh_imx6/dh_imx6.c | 4 ++--
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi
b/arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi
index 4c3b5e82d6..91545ab6e9 100644
--- a/arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi
@@ -3,6 +3,17 @@
* Copyright (C) 2020 Harald Seiler
*/
+/ {
+ aliases {
+ eeprom0 = &eeprom0;
+ };
+};
+
+&i2c3 {
+ eeprom0: eeprom@50 {
+ };
+};
+
®_usb_otg_vbus {
gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
enable-active-high;
diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c
b/board/dhelectronics/dh_imx6/dh_imx6.c
index 2969e90a70..6059f96e80 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6.c
@@ -100,9 +100,9 @@ static int setup_dhcom_mac_from_fuse(void)
return 0;
}
- eeprom = ofnode_path("/soc/aips-bus@210/i2c@21a8000/eeprom@50");
+ eeprom = ofnode_get_aliases_node("eeprom0");
if (!ofnode_valid(eeprom)) {
- printf("Invalid hardware path to EEPROM!\n");
+ printf("Can't find eeprom0 alias!\n");
return -ENODEV;
}
--
2.34.1
[PATCH v2 2/8] ARM: dts: imx: Migrate iMX6QDL DRC02 DTs from Linux
Migrate DH DRC02 device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
(no changes since v1)
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx6qdl-dhcom-drc02.dtsi | 143 ++
arch/arm/dts/imx6s-dhcom-drc02.dts| 30 ++
configs/dh_imx6_defconfig | 2 +-
4 files changed, 175 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/imx6qdl-dhcom-drc02.dtsi
create mode 100644 arch/arm/dts/imx6s-dhcom-drc02.dts
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 83630af4f6..7bfdfb5313 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -771,6 +771,7 @@ dtb-y += \
imx6dl-sabreauto.dtb \
imx6dl-sabresd.dtb \
imx6dl-wandboard-revd1.dtb \
+ imx6s-dhcom-drc02.dtb
endif
diff --git a/arch/arm/dts/imx6qdl-dhcom-drc02.dtsi
b/arch/arm/dts/imx6qdl-dhcom-drc02.dtsi
new file mode 100644
index 00..702cd4a1b2
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-dhcom-drc02.dtsi
@@ -0,0 +1,143 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 DH electronics GmbH
+ */
+
+/ {
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+/*
+ * Special SoM hardware required which uses the pins from micro SD card. The
+ * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
+ * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
+ * card must be disabled and the uart1 rts/cts must be output on other DHCOM
+ * pins, see uart1 and usdhc3 node below.
+ */
+&can2 {
+ status = "okay";
+};
+
+&gpio1 {
+ /*
+* NOTE: On DRC02, the RS485_RX_En is controlled by a separate
+* GPIO line, however the i.MX6 UART driver assumes RX happens
+* during TX anyway and that it only controls drive enable DE
+* line. Hence, the RX is always enabled here.
+*/
+ rs485-rx-en-hog {
+ gpio-hog;
+ gpios = <18 0>; /* GPIO Q */
+ line-name = "rs485-rx-en";
+ output-low;
+ };
+};
+
+&gpio3 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "DRC02-In1", "", "", "", "";
+};
+
+&gpio4 {
+ gpio-line-names =
+ "", "", "", "", "", "DHCOM-E", "DRC02-In2", "DHCOM-H",
+ "DHCOM-I", "DRC02-HW0", "", "", "", "", "", "",
+ "", "", "", "", "DRC02-Out1", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio6 {
+ gpio-line-names =
+ "", "", "", "DRC02-Out2", "", "", "SOM-HW1", "",
+ "", "", "", "", "", "", "DRC02-HW2", "DRC02-HW1",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&i2c1 {
+ eeprom@50 {
+ compatible = "atmel,24c04";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+&uart1 {
+ /*
+* Due to the use of can2 the signals for can2 Tx and Rx are routed to
+* DHCOM UART1 rts/cts pins. Therefore this UART have to use DHCOM GPIOs
+* for rts/cts. So configure DHCOM GPIO I as rts and GPIO M as cts.
+*/
+ /delete-property/ uart-has-rtscts;
+ cts-gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; /* GPIO M */
+ pinctrl-0 = <&pinctrl_uart1 &pinctrl_dhcom_i &pinctrl_dhcom_m>;
+ pinctrl-names = "default";
+ rts-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
+};
+
+&uart5 {
+ /*
+* On DRC02 this UART is used as RS485 interface and RS485_TX_En is
+* controlled by DHCOM GPIO P. So remove rts/cts pins and the property
+* uart-has-rtscts from this UART and add the DHCOM GPIO P pin via
+* rts-gpios. The RS485_RX_En is controlled by DHCOM GPIO Q, see gpio1
+* node above.
+*/
+ /delete-property/ uart-has-rtscts;
+ linux,rs485-enabled-at-boot-time;
+ pinctrl-0 = <&pinctrl_uart5_core &pinctrl_dhcom_p &pinctrl_dhcom_q>;
+ pinctrl-names = "default";
+ rts-gpios = <&gpio7 13 GPIO_ACTIVE_HIGH>; /* GPIO P */
+};
+
+&usbh1 {
+ disable-over-current;
+};
+
+&usdhc2 { /* SD card */
+ status = "okay";
+};
+
+&usdhc3 {
+ /*
+* Due to the use of can2 the micro SD card on module have to be
+* disabled, because the pins SD3_DAT0 and SD3_DAT1 are muxed as
+* can2 Tx and Rx.
+*/
+ status = "disabled";
+};
+
+&iomuxc {
+ pinctrl-0 = <
+ /*
+* The following DHCOM GPIOs are used on this board.
+* Therefore, they have been removed from the list
below.
+* I: uart1 rts
+
[PATCH v2 3/8] ARM: dts: imx: Migrate iMX6QDL picoITX DTs from Linux
Migrate DH picoITX device trees from Linux commit 42226c989789
(tag v5.18-rc7). No changes have been made, the DTs are exact copies.
Furthermore add the DTB to dh_imx6_defconfig.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
(no changes since v1)
arch/arm/dts/Makefile | 1 +
arch/arm/dts/imx6dl-dhcom-picoitx.dts | 20 +++
arch/arm/dts/imx6qdl-dhcom-picoitx.dtsi | 69 +
configs/dh_imx6_defconfig | 2 +-
4 files changed, 91 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/dts/imx6dl-dhcom-picoitx.dts
create mode 100644 arch/arm/dts/imx6qdl-dhcom-picoitx.dtsi
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 7bfdfb5313..f7601afd9c 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -738,6 +738,7 @@ dtb-y += \
imx6dl-cubox-i-emmc-som-v15.dtb \
imx6dl-cubox-i-som-v15.dtb \
imx6dl-dhcom-pdk2.dtb \
+ imx6dl-dhcom-picoitx.dts \
imx6dl-gw51xx.dtb \
imx6dl-gw52xx.dtb \
imx6dl-gw53xx.dtb \
diff --git a/arch/arm/dts/imx6dl-dhcom-picoitx.dts
b/arch/arm/dts/imx6dl-dhcom-picoitx.dts
new file mode 100644
index 00..038bb00255
--- /dev/null
+++ b/arch/arm/dts/imx6dl-dhcom-picoitx.dts
@@ -0,0 +1,20 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 DH electronics GmbH
+ *
+ * DHCOM iMX6 variant:
+ * DHCM-iMX6DL-C0800-R102-F0819-E-SD-RTC-T-HS-I-01D2
+ * DHCOM PCB number: 493-300 or newer
+ * PicoITX PCB number: 487-600 or newer
+ */
+/dts-v1/;
+
+#include "imx6dl.dtsi"
+#include "imx6qdl-dhcom-som.dtsi"
+#include "imx6qdl-dhcom-picoitx.dtsi"
+
+/ {
+ model = "DH electronics i.MX6DL DHCOM on PicoITX";
+ compatible = "dh,imx6dl-dhcom-picoitx", "dh,imx6dl-dhcom-som",
+"fsl,imx6dl";
+};
diff --git a/arch/arm/dts/imx6qdl-dhcom-picoitx.dtsi
b/arch/arm/dts/imx6qdl-dhcom-picoitx.dtsi
new file mode 100644
index 00..4cd4cb9543
--- /dev/null
+++ b/arch/arm/dts/imx6qdl-dhcom-picoitx.dtsi
@@ -0,0 +1,69 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2021 DH electronics GmbH
+ */
+
+#include
+
+/ {
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ led {
+ compatible = "gpio-leds";
+
+ led-0 {
+ color = ;
+ default-state = "off";
+ function = LED_FUNCTION_INDICATOR;
+ gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; /* GPIO I */
+ pinctrl-0 = <&pinctrl_dhcom_i>;
+ pinctrl-names = "default";
+ };
+ };
+};
+
+&gpio1 {
+ gpio-line-names =
+ "", "", "DHCOM-A", "", "DHCOM-B", "PicoITX-In2", "", "",
+ "", "", "", "", "", "", "", "",
+ "DHCOM-R", "DHCOM-S", "DHCOM-Q", "DHCOM-T", "DHCOM-U", "", "",
"",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio4 {
+ gpio-line-names =
+ "", "", "", "", "", "PicoITX-In1", "DHCOM-INT", "DHCOM-H",
+ "DHCOM-I", "PicoITX-HW2", "", "", "", "", "", "",
+ "", "", "", "", "PicoITX-Out1", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio6 {
+ gpio-line-names =
+ "", "", "", "PicoITX-Out2", "", "", "SOM-HW1", "",
+ "", "", "", "", "", "", "PicoITX-HW0", "PicoITX-HW1",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
+&iomuxc {
+ pinctrl-0 = <
+ /*
+* The following DHCOM GPIOs are used on this board.
+* Therefore, they have been removed from the list
below.
+* I: yellow led
+*/
+ &pinctrl_hog_base
+ &pinctrl_dhcom_a &pinctrl_dhcom_b &pinctrl_dhcom_c
+ &pinctrl_dhcom_d &pinctrl_dhcom_e &pinctrl_dhcom_f
+ &pinctrl_dhcom_g &pinctrl_dhcom_h
+ &pinctrl_dhcom_j &pinctrl_dhcom_k &pinctrl_dhcom_l
+ &pinctrl_dhcom_m &pinctrl_dhcom_n &pinctrl_dhcom_o
+ &pinctrl_dhcom_p &pinctrl_dhcom_q &pinctrl_dhcom_r
+ &pinctrl_dhcom_s &pinctrl_dhcom_t &pinctrl_dhcom_u
+ &pinctrl_dhcom_v &pinctrl_dhcom_w &pinctrl_dhcom_int
+ >;
+ pinctrl-names = "default";
+};
diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig
index 9c78987473..558619fc31 100644
--- a/configs/dh_imx6_defconfig
+++ b/configs/dh_imx6_defconfig
@@ -53,7 +53,7 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_OF_CONTROL=y
-CONFIG_OF_LIST="imx6q-dhcom-pdk2 imx6dl-dhcom-pdk2 imx6s-dhcom-drc02"
+CONFIG_OF_LIST="imx6q-dhcom-pdk2 imx6dl-dhcom-pdk2 imx6s-dhcom-drc02
imx6dl-dhcom-picoitx"
CONFIG_MULTI_DTB_FIT=y
CONFIG_ENV_OVERWRITE=y
[PATCH v2 5/8] ARM: dts: imx: Simplify fec node for iMX6QDL DHCOM boards
Firstly the FEC can now use the regulator reg_eth_vio from
imx6qdl-dhcom-som.dtsi instead of defining its own.
Secondly the &fec node is moved to the more generic SoM device tree
file, because it can be used by multiple boards.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Reviewed-by Marek
arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi | 13 -
arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi | 7 +++
2 files changed, 7 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi
b/arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi
index a1ffb1d6fc..0673c21e3c 100644
--- a/arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-dhcom-pdk2-u-boot.dtsi
@@ -5,19 +5,6 @@
#include "imx6qdl-dhcom-u-boot.dtsi"
-/ {
- fec_vio: regulator-fec {
- compatible = "regulator-fixed";
-
- regulator-name = "fec-vio";
- gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
- };
-};
-
&fec {
phy-reset-gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;
- phy-reset-duration = <1>;
- phy-reset-post-delay = <10>;
-
- phy-supply = <&fec_vio>;
};
diff --git a/arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi
b/arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi
index 91545ab6e9..190567ab7b 100644
--- a/arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/imx6qdl-dhcom-u-boot.dtsi
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: (GPL-2.0+)
/*
* Copyright (C) 2020 Harald Seiler
+ * Copyright (C) 2022 Philip Oberfichtner
*/
/ {
@@ -9,6 +10,12 @@
};
};
+&fec {
+ phy-reset-duration = <1>;
+ phy-reset-post-delay = <10>;
+ phy-supply = <®_eth_vio>;
+};
+
&i2c3 {
eeprom0: eeprom@50 {
};
--
2.34.1
[PATCH v2 4/8] ARM: imx6: Remove CONFIG_FEC_MXC_PHYADDR from DH header
Use phy address from device tree instead of CONFIG_FEC_MXC_PHYADDR from board header. This is required, because the DH picoITX and DRC02 boards require different settings than PDK2. The corresponding 'phy-handle' device tree properties are already there. I tested this change on picoITX and DRC02, but on PDK2 it is untested. Reviewed-by: Marek Vasut Signed-off-by: Philip Oberfichtner --- (no changes since v1) include/configs/dh_imx6.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 2b14464dff..178f5a6e7d 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -30,9 +30,6 @@ /* Bootcounter */ #define CONFIG_SYS_BOOTCOUNT_BE -/* FEC ethernet */ -#define CONFIG_FEC_MXC_PHYADDR 7 - /* MMC Configs */ #define CONFIG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_SYS_FSL_USDHC_NUM 3 -- 2.34.1
[PATCH v2 7/8] ARM: dts: imx: Configure FEC for iMX6QDL DRC02
Add a u-boot dtsi for configuring the FEC node of the DH DRC02.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Reviewed-by Marek
arch/arm/dts/imx6s-dhcom-drc02-u-boot.dtsi | 10 ++
1 file changed, 10 insertions(+)
create mode 100644 arch/arm/dts/imx6s-dhcom-drc02-u-boot.dtsi
diff --git a/arch/arm/dts/imx6s-dhcom-drc02-u-boot.dtsi
b/arch/arm/dts/imx6s-dhcom-drc02-u-boot.dtsi
new file mode 100644
index 00..16669b2533
--- /dev/null
+++ b/arch/arm/dts/imx6s-dhcom-drc02-u-boot.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+)
+/*
+ * Copyright (C) 2022 Philip Oberfichtner
+ */
+
+#include "imx6qdl-dhcom-u-boot.dtsi"
+
+&fec {
+ phy-reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+};
--
2.34.1
[PATCH v2 6/8] ARM: dts: imx: Configure FEC for iMX6QDL picoITX
Add a u-boot dtsi for configuring the FEC node of the DH picoITX.
Reviewed-by: Marek Vasut
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Reviewed-by Marek
arch/arm/dts/imx6dl-dhcom-picoitx-u-boot.dtsi | 10 ++
1 file changed, 10 insertions(+)
create mode 100644 arch/arm/dts/imx6dl-dhcom-picoitx-u-boot.dtsi
diff --git a/arch/arm/dts/imx6dl-dhcom-picoitx-u-boot.dtsi
b/arch/arm/dts/imx6dl-dhcom-picoitx-u-boot.dtsi
new file mode 100644
index 00..16669b2533
--- /dev/null
+++ b/arch/arm/dts/imx6dl-dhcom-picoitx-u-boot.dtsi
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+)
+/*
+ * Copyright (C) 2022 Philip Oberfichtner
+ */
+
+#include "imx6qdl-dhcom-u-boot.dtsi"
+
+&fec {
+ phy-reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
+};
--
2.34.1
[PATCH v2 8/8] ARM: imx6: Adapt device tree selection in DH board file
Before this commit device tree selection could rely solely on
differentiating the iMX6 processor variant Q and DL. After adding two new
carrier boards, the DRC02 and the picoITX, the interchangeability of SoMs
makes this approach infeasible.
It is now required to specify the carrier board (dhcom-drc02,
dhcom-picoitx or dhcom-pdk2) at compile time using
CONFIG_DEFAULT_DEVICETREE. The SoM is determined at runtime as before.
Signed-off-by: Philip Oberfichtner
---
Changes in v2:
- Rewrite board_fit_config_name_match
- Return -EINVAL instead of -1
board/dhelectronics/dh_imx6/dh_imx6.c | 31 +--
1 file changed, 25 insertions(+), 6 deletions(-)
diff --git a/board/dhelectronics/dh_imx6/dh_imx6.c
b/board/dhelectronics/dh_imx6/dh_imx6.c
index 6059f96e80..e8aba83e1a 100644
--- a/board/dhelectronics/dh_imx6/dh_imx6.c
+++ b/board/dhelectronics/dh_imx6/dh_imx6.c
@@ -225,16 +225,35 @@ int checkboard(void)
}
#ifdef CONFIG_MULTI_DTB_FIT
+static int strcmp_prefix(const char *s1, const char *s2)
+{
+ size_t n;
+
+ n = min(strlen(s1), strlen(s2));
+ return strncmp(s1, s2, n);
+}
+
int board_fit_config_name_match(const char *name)
{
- if (is_mx6dq()) {
- if (!strcmp(name, "imx6q-dhcom-pdk2"))
- return 0;
- } else if (is_mx6sdl()) {
- if (!strcmp(name, "imx6dl-dhcom-pdk2"))
+ char *want;
+ char *have;
+
+ /* Test Board suffix, e.g. -dhcom-drc02 */
+ want = strchr(CONFIG_DEFAULT_DEVICE_TREE, '-');
+ have = strchr(name, '-');
+
+ if (!want || !have || strcmp(want, have))
+ return -EINVAL;
+
+ /* Test SoC prefix */
+ if (is_mx6dq() && !strcmp_prefix(name, "imx6q-"))
+ return 0;
+
+ if (is_mx6sdl()) {
+ if (!strcmp_prefix(name, "imx6s-") || !strcmp_prefix(name,
"imx6dl-"))
return 0;
}
- return -1;
+ return -EINVAL;
}
#endif
--
2.34.1
Re:Re: [PATCH v3 1/2] boot: don't enable the non-secure boot commands by default if secure boot enabled
At 2022-05-20 14:34:18, "Heinrich Schuchardt" wrote: >Am 20. Mai 2022 04:58:46 MESZ schrieb Rover Mo : > >Having EFI_SECURE_BOOT=y is not enough to use secure boot. You must also >supply variables PK, KEK, db, dbx. > >Furthermore you would have to disable a whole lot more commands to secure the >device. > >Currently we have patches in review to provide a bootmenu with optionally no >access to the console. This is a better approach. Thank you for your explanation. Please forget my patches. Best regards, Rover Mo
Re: [PATCH v2] usb: dwc3: add a SPL_USB_DWC3_GENERIC option for the dwc3 driver
Hi Marek, don't you mind if I apply to my u-booz-imx this (that really belongs to your competence area) ? It fixes warnings for the librem5, and it is a pity if I cannot merge it. Best regards, Stefano On 24.04.22 16:08, Angus Ainslie wrote: Suppress warnings when building the SPL without USB_DWC3_GENERIC Signed-off-by: Angus Ainslie --- Changes since v1: Updated Kconfig depends drivers/usb/dwc3/Kconfig | 7 +++ drivers/usb/dwc3/Makefile | 2 +- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig index 62aa65bf0c..f010291d02 100644 --- a/drivers/usb/dwc3/Kconfig +++ b/drivers/usb/dwc3/Kconfig @@ -30,6 +30,13 @@ config USB_DWC3_GENERIC Select this for Xilinx ZynqMP and similar Platforms. This wrapper supports Host and Peripheral operation modes. +config SPL_USB_DWC3_GENERIC + bool "Generic implementation of a DWC3 wrapper (aka dwc3 glue) for the SPL" + depends on SPL_DM_USB && USB_DWC3 && SPL_MISC + help + Select this for Xilinx ZynqMP and similar Platforms. + This wrapper supports Host and Peripheral operation modes. + config USB_DWC3_MESON_G12A bool "Amlogic Meson G12A USB wrapper" depends on DM_USB && USB_DWC3 && ARCH_MESON diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile index 0dd1ba87cd..97b4f7191c 100644 --- a/drivers/usb/dwc3/Makefile +++ b/drivers/usb/dwc3/Makefile @@ -9,7 +9,7 @@ obj-$(CONFIG_USB_DWC3_GADGET) += gadget.o ep0.o obj-$(CONFIG_USB_DWC3_OMAP) += dwc3-omap.o obj-$(CONFIG_USB_DWC3_MESON_G12A) += dwc3-meson-g12a.o obj-$(CONFIG_USB_DWC3_MESON_GXL) += dwc3-meson-gxl.o -obj-$(CONFIG_USB_DWC3_GENERIC) += dwc3-generic.o +obj-$(CONFIG_$(SPL_)USB_DWC3_GENERIC) += dwc3-generic.o obj-$(CONFIG_USB_DWC3_UNIPHIER) += dwc3-uniphier.o obj-$(CONFIG_USB_DWC3_LAYERSCAPE) += dwc3-layerscape.o obj-$(CONFIG_USB_DWC3_PHY_OMAP) += ti_usb_phy.o -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH v2] usb: dwc3: add a SPL_USB_DWC3_GENERIC option for the dwc3 driver
On 5/20/22 11:08, Stefano Babic wrote: Hi Marek, don't you mind if I apply to my u-booz-imx this (that really belongs to your competence area) ? It fixes warnings for the librem5, and it is a pity if I cannot merge it. Just pick it via imx, that's fine, I don't expect conflict. Reviewed-by: Marek Vasut
[PATCH v3 1/3] arm: mvebu: dts: sync DTS
Update the uDPU DTS to the version that is pending upstream [1][2][3][4].
[1]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-4-robert.ma...@sartura.hr/
[2]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-5-robert.ma...@sartura.hr/
[3]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.ma...@sartura.hr/
[4]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.ma...@sartura.hr/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index 1f534c0c65..f21a855fc6 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -16,7 +16,7 @@
/ {
model = "Methode uDPU Board";
- compatible = "methode,udpu", "marvell,armada3720";
+ compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
chosen {
stdout-path = "serial0:115200n8";
@@ -28,35 +28,34 @@
};
leds {
- pinctrl-names = "default";
compatible = "gpio-leds";
- power1 {
+ led-power1 {
label = "udpu:green:power";
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
};
- power2 {
+ led-power2 {
label = "udpu:red:power";
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
};
- network1 {
+ led-network1 {
label = "udpu:green:network";
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
};
- network2 {
+ led-network2 {
label = "udpu:red:network";
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
};
- alarm1 {
+ led-alarm1 {
label = "udpu:green:alarm";
gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;
};
- alarm2 {
+ led-alarm2 {
label = "udpu:red:alarm";
gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
};
@@ -99,7 +98,7 @@
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <5400>;
@@ -153,14 +152,12 @@
scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- nct375@48 {
- status = "okay";
+ temp-sensor@48 {
compatible = "ti,tmp75c";
reg = <0x48>;
};
- nct375@49 {
- status = "okay";
+ temp-sensor@49 {
compatible = "ti,tmp75c";
reg = <0x49>;
};
--
2.36.1
[PATCH v3 3/3] MAINTAINERS: add myself as Methode maintainer
I am currently maintaing the Methode uDPU and eDPU boards so add myself as the maintainer for them. Signed-off-by: Robert Marko --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 56be0bfad0..3d72b0c11f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -344,6 +344,14 @@ F: tools/mtk_image.c F: tools/mtk_image.h N: mediatek +ARM METHODE SUPPORT +M: Robert Marko +S: Maintained +F: arch/arm/dts/armada-3720-eDPU* +F: arch/arm/dts/armada-3720-uDPU* +F: configs/eDPU_defconfig +F: configs/uDPU_defconfig + ARM MICROCHIP/ATMEL AT91 M: Eugen Hristev S: Maintained -- 2.36.1
[PATCH v3 2/3] arm: mvebu: add support for Methode eDPU
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko
---
Changes in v3:
* Use DTS-es pending merge upstream
* Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device
as one of the bootable ones.
We dont have space constraints, so just re-enable SCSI rather than making
one more config header
Changes in v2:
* Correct the PHY mode to 2500Base-X
* Add the DTB to Makefile
* Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++
arch/arm/dts/armada-3720-eDPU.dts | 14 ++
arch/arm/dts/armada-3720-uDPU.dts | 150 +---
arch/arm/dts/armada-3720-uDPU.dtsi| 160 ++
configs/eDPU_defconfig| 96 +
6 files changed, 317 insertions(+), 149 deletions(-)
create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
create mode 100644 arch/arm/dts/armada-3720-eDPU.dts
create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi
create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 83630af4f6..c484875585 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -236,6 +236,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
armada-3720-turris-mox.dtb \
+ armada-3720-eDPU.dtb\
armada-3720-uDPU.dtb\
armada-375-db.dtb \
armada-385-atl-x530.dtb \
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
new file mode 100644
index 00..1b2648f64d
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ product = "eDPU";
+ };
+
+ baseboard {
+ product = "eDPU";
+ };
+
+ chassis {
+ product = "eDPU";
+ };
+ };
+ };
+};
+
+&spi0 {
+ u-boot,dm-pre-reloc;
+
+ spi-flash@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&sdhci0 {
+ u-boot,dm-pre-reloc;
+};
+
+ð0 {
+ /* G.hn does not work without additional configuration */
+ status = "disabled";
+};
+
+ð1 {
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
diff --git a/arch/arm/dts/armada-3720-eDPU.dts
b/arch/arm/dts/armada-3720-eDPU.dts
new file mode 100644
index 00..57fc698e55
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "armada-3720-uDPU.dtsi"
+
+/ {
+ model = "Methode eDPU Board";
+ compatible = "methode,edpu", "marvell,armada3720", "marvell,armada3710";
+};
+
+ð0 {
+ phy-mode = "2500base-x";
+};
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index f21a855fc6..a75734d88a 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -1,66 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Device tree for the uDPU board.
- * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- * Copyright (C) 2016 Marvell
- * Copyright (C) 2019 Methode Electronics
- * Copyright (C) 2019 Telus
- *
- * Vladimir Vid
- */
/dts-v1/;
-#include
-#include "armada-372x.dtsi"
+#include "armada-3720-uDPU.dtsi"
/ {
model = "Methode uDPU Board";
compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x 0x 0x 0x2000>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-power1 {
- label = "udpu:green:power";
- gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
- };
-
- led-power2 {
- label = "udpu:red:power";
- gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
- };
-
- led-network1 {
- label = "udpu:green:network";
- gpios = <&gpionb
Re: [PATCH 2/2] arm: mvebu: add support for Methode eDPU
On Mon, May 16, 2022 at 10:54 AM Stefan Roese wrote:
>
> On 16.05.22 10:52, Robert Marko wrote:
> > On Mon, May 16, 2022 at 8:40 AM Stefan Roese wrote:
> >>
> >> On 06.05.22 20:01, Robert Marko wrote:
> >>> Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
> >>>
> >>> They feature the same CPU, RAM, and storage as well as the form factor.
> >>>
> >>> However, eDPU only has one SFP slot plus a copper G.hn port which does not
> >>> work under U-boot.
> >>>
> >>> In order to reduce duplication, split the uDPU DTS into a common one.
> >>>
> >>> Signed-off-by: Robert Marko
> >>
> >> Reviewed-by: Stefan Roese
> >
> > Hi Stefan,
> > Can you hold off on merging this until v2?
> >
> > I have a few more comments to take care in Linux upstreaming
> > and will then use the final DTS versions in v2.
> > Had to convert A37xx bindings to YAML, so that slowed everything down.
>
> Sure. Thanks for the notice. Please make sure though, that you add the
> new board to some MAINTAINERS file. As this throws an CI build error
> without this.
Hi, thanks for the heads up on MAINTAINERS.
Sent the v3 with sync to the Linux pending DTS and MAINTAINERS added.
Regards,
Robert
>
> Thanks,
> Stefan
>
> > Regards,
> > Robert
> >>
> >> Thanks,
> >> Stefan
> >>
> >>> ---
> >>>arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++
> >>>arch/arm/dts/armada-3720-eDPU.dts | 14 ++
> >>>arch/arm/dts/armada-3720-uDPU.dts | 153 +---
> >>>arch/arm/dts/armada-3720-uDPU.dtsi| 163 ++
> >>>configs/eDPU_defconfig| 99 +
> >>>5 files changed, 322 insertions(+), 152 deletions(-)
> >>>create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
> >>>create mode 100644 arch/arm/dts/armada-3720-eDPU.dts
> >>>create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi
> >>>create mode 100644 configs/eDPU_defconfig
> >>>
> >>> diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
> >>> b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
> >>> new file mode 100644
> >>> index 00..1b2648f64d
> >>> --- /dev/null
> >>> +++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
> >>> @@ -0,0 +1,45 @@
> >>> +// SPDX-License-Identifier: GPL-2.0+
> >>> +
> >>> +/ {
> >>> + smbios {
> >>> + compatible = "u-boot,sysinfo-smbios";
> >>> +
> >>> + smbios {
> >>> + system {
> >>> + product = "eDPU";
> >>> + };
> >>> +
> >>> + baseboard {
> >>> + product = "eDPU";
> >>> + };
> >>> +
> >>> + chassis {
> >>> + product = "eDPU";
> >>> + };
> >>> + };
> >>> + };
> >>> +};
> >>> +
> >>> +&spi0 {
> >>> + u-boot,dm-pre-reloc;
> >>> +
> >>> + spi-flash@0 {
> >>> + u-boot,dm-pre-reloc;
> >>> + };
> >>> +};
> >>> +
> >>> +&sdhci0 {
> >>> + u-boot,dm-pre-reloc;
> >>> +};
> >>> +
> >>> +ð0 {
> >>> + /* G.hn does not work without additional configuration */
> >>> + status = "disabled";
> >>> +};
> >>> +
> >>> +ð1 {
> >>> + fixed-link {
> >>> + speed = <1000>;
> >>> + full-duplex;
> >>> + };
> >>> +};
> >>> diff --git a/arch/arm/dts/armada-3720-eDPU.dts
> >>> b/arch/arm/dts/armada-3720-eDPU.dts
> >>> new file mode 100644
> >>> index 00..f2e2d21a8d
> >>> --- /dev/null
> >>> +++ b/arch/arm/dts/armada-3720-eDPU.dts
> >>> @@ -0,0 +1,14 @@
> >>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> >>> +
> >>> +/dts-v1/;
> >>> +
> >>> +#include "armada-3720-uDPU.dtsi"
> >>> +
> >>> +/ {
> >>> + model = "Methode eDPU Board";
> >>> + compatible = "methode,edpu", "marvell,armada3720";
> >>> +};
> >>> +
> >>> +ð0 {
> >>> + phy-mode = "1000base-x";
> >>> +};
> >>> diff --git a/arch/arm/dts/armada-3720-uDPU.dts
> >>> b/arch/arm/dts/armada-3720-uDPU.dts
> >>> index 1f534c0c65..b146fae9f6 100644
> >>> --- a/arch/arm/dts/armada-3720-uDPU.dts
> >>> +++ b/arch/arm/dts/armada-3720-uDPU.dts
> >>> @@ -1,67 +1,13 @@
> >>>// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> >>> -/*
> >>> - * Device tree for the uDPU board.
> >>> - * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
> >>> - * Copyright (C) 2016 Marvell
> >>> - * Copyright (C) 2019 Methode Electronics
> >>> - * Copyright (C) 2019 Telus
> >>> - *
> >>> - * Vladimir Vid
> >>> - */
> >>>
> >>>/dts-v1/;
> >>>
> >>> -#include
> >>> -#include "armada-372x.dtsi"
> >>> +#include "armada-3720-uDPU.dtsi"
> >>>
> >>>/ {
> >>>model = "Methode uDPU Board";
> >>>compatible = "methode,udpu", "marvell,armada3720";
> >>>
> >>> - chosen {
> >>> - stdout-path = "serial0:115200n8";
> >>> - };
> >>> -
> >>> - memory@0 {
> >>> - device_type = "memory";
> >>> - reg = <0x 0x 0x 0x2000>;
Re: [PATCH v2 8/8] ARM: imx6: Adapt device tree selection in DH board file
On 5/20/22 10:46, Philip Oberfichtner wrote: Before this commit device tree selection could rely solely on differentiating the iMX6 processor variant Q and DL. After adding two new carrier boards, the DRC02 and the picoITX, the interchangeability of SoMs makes this approach infeasible. It is now required to specify the carrier board (dhcom-drc02, dhcom-picoitx or dhcom-pdk2) at compile time using CONFIG_DEFAULT_DEVICETREE. The SoM is determined at runtime as before. Signed-off-by: Philip Oberfichtner Reviewed-by: Marek Vasut
[PATCH] include/configs: Remove rootwait=1 to all the affected boards
rootwait=1 is not a valid kernel boot parameters. According
to the documenation is only rootwait
rootwait[KNL] Wait (indefinitely) for root device to show up.
Useful for devices that are detected asynchronously
(e.g. USB and MMC devices).
Fix:
Unknown kernel command line parameters "rootwait=1", will be passed to user
space.
Signed-off-by: Michael Trimarchi
---
include/configs/am335x_evm.h | 2 +-
include/configs/am43xx_evm.h | 2 +-
include/configs/baltos.h | 2 +-
include/configs/chiliboard.h | 2 +-
include/configs/etamin.h | 2 +-
include/configs/imx8mn_bsh_smm_s2.h| 2 +-
include/configs/siemens-am33x-common.h | 4 ++--
include/configs/ti_armv7_keystone2.h | 2 +-
8 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index fd5b209a52..f301a6dc83 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -34,7 +34,7 @@
"root=${nandroot} " \
"rootfstype=${nandrootfstype}\0" \
"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \
- "nandrootfstype=ubifs rootwait=1\0" \
+ "nandrootfstype=ubifs rootwait\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
index 5057441f75..1f5c3cd04e 100644
--- a/include/configs/am43xx_evm.h
+++ b/include/configs/am43xx_evm.h
@@ -166,7 +166,7 @@
"root=${nandroot} " \
"rootfstype=${nandrootfstype}\0" \
"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
- "nandrootfstype=ubifs rootwait=1\0" \
+ "nandrootfstype=ubifs rootwait\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
"nand read ${fdtaddr} NAND.u-boot-spl-os; " \
diff --git a/include/configs/baltos.h b/include/configs/baltos.h
index b881d8c03f..7b43741fde 100644
--- a/include/configs/baltos.h
+++ b/include/configs/baltos.h
@@ -37,7 +37,7 @@
"root=${nandroot} " \
"rootfstype=${nandrootfstype}\0" \
"nandroot=ubi0:rootfs rw ubi.mtd=5\0" \
- "nandrootfstype=ubifs rootwait=1\0" \
+ "nandrootfstype=ubifs rootwait\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
"setenv loadaddr 0x8400; " \
diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h
index 82acda595f..8bad0f9ac4 100644
--- a/include/configs/chiliboard.h
+++ b/include/configs/chiliboard.h
@@ -20,7 +20,7 @@
"root=${nandroot} " \
"rootfstype=${nandrootfstype}\0" \
"nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system\0" \
- "nandrootfstype=ubifs rootwait=1\0" \
+ "nandrootfstype=ubifs rootwait\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
"nand read ${fdt_addr} NAND.u-boot-spl-os; " \
diff --git a/include/configs/etamin.h b/include/configs/etamin.h
index 9cf93924df..1c0a86d1ed 100644
--- a/include/configs/etamin.h
+++ b/include/configs/etamin.h
@@ -113,7 +113,7 @@
"nand_active_ubi_vol=rootfs_a\0" \
"rootfs_name=rootfs\0" \
"kernel_name=uImage\0"\
- "nand_root_fs_type=ubifs rootwait=1\0" \
+ "nand_root_fs_type=ubifs rootwait\0" \
"nand_args=run bootargs_defaults;" \
"mtdparts default;" \
"setenv ${partitionset_active} true;" \
diff --git a/include/configs/imx8mn_bsh_smm_s2.h
b/include/configs/imx8mn_bsh_smm_s2.h
index 098f23b206..f752978369 100644
--- a/include/configs/imx8mn_bsh_smm_s2.h
+++ b/include/configs/imx8mn_bsh_smm_s2.h
@@ -21,7 +21,7 @@
"root=${nandroot} " \
"rootfstype=${nandrootfstype}\0" \
"nandroot=ubi0:root rw ubi.mtd=nandrootfs\0" \
- "nandrootfstype=ubifs rootwait=1\0" \
+ "nandrootfstype=ubifs rootwait\0" \
"nandboot=echo Booting from nand ...; " \
"run nandargs; " \
"nand read ${fdt_addr_r} nanddtb; " \
diff --git a/include/configs/siemens-am33x-common.h
b/include/configs/siemens-am33x-common.h
index 08c4d52d65..9f1a6cd51b 100644
--- a/include/configs/siemens-am33x-common.h
+++ b/include/configs/siemens-am33x-common.h
@@ -237,7 +237,7 @@
"nand_active_ubi_vol=rootfs_a\0" \
"nand_active_ubi_vol_A=rootfs_a\0" \
"nand_active_ubi_vol_B=rootfs_b\0" \
- "nand_root_fs_type=ubifs rootwait=1\0" \
+ "nand_root_fs_type=ubifs rootwait\0" \
"nand_src_addr=0x28\0" \
"nand_src_addr_A=0x28\0" \
"nand_src_addr_B=0x78\0" \
@@ -314,7 +314,7 @@
"nand_active_ubi_vol=rootfs_a\0" \
"rootfs_name=rootfs\0" \
"kernel_name=uIma
Re: [PATCH v3 2/3] arm: mvebu: add support for Methode eDPU
On Friday 20 May 2022 12:54:23 Robert Marko wrote: > Methode eDPU is an Armada 3720 power board based on the Methode uDPU. > > They feature the same CPU, RAM, and storage as well as the form factor. > > However, eDPU only has one SFP slot plus a copper G.hn port which does not > work under U-boot. > > In order to reduce duplication, split the uDPU DTS into a common one. > > Signed-off-by: Robert Marko > --- > Changes in v3: > * Use DTS-es pending merge upstream > * Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device > as one of the bootable ones. > We dont have space constraints, so just re-enable SCSI rather than making > one more config header > > Changes in v2: > * Correct the PHY mode to 2500Base-X > * Add the DTB to Makefile > * Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present > --- ... > diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig > new file mode 100644 > index 00..5e5e5a6b4d > --- /dev/null > +++ b/configs/eDPU_defconfig > @@ -0,0 +1,96 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_CPU_INIT=y > +CONFIG_ARCH_MVEBU=y > +CONFIG_SYS_TEXT_BASE=0x > +CONFIG_TARGET_MVEBU_ARMADA_37XX=y > +CONFIG_MVEBU_EFUSE=y > +CONFIG_ENV_SIZE=0x1 > +CONFIG_ENV_OFFSET=0x18 > +CONFIG_ENV_SECT_SIZE=0x1 > +CONFIG_DM_GPIO=y > +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" > +CONFIG_DEBUG_UART_BASE=0xd0012000 > +CONFIG_SYS_LOAD_ADDR=0x600 > +CONFIG_DEBUG_UART=y > +CONFIG_DISTRO_DEFAULTS=y > +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > +CONFIG_FIT=y > +CONFIG_FIT_VERBOSE=y > +CONFIG_USE_PREBOOT=y > +# CONFIG_DISPLAY_CPUINFO is not set > +# CONFIG_DISPLAY_BOARDINFO is not set > +CONFIG_DISPLAY_BOARDINFO_LATE=y > +CONFIG_ARCH_EARLY_INIT_R=y > +CONFIG_BOARD_EARLY_INIT_F=y > +CONFIG_SYS_PROMPT="eDPU>> " > +# CONFIG_CMD_ELF is not set > +# CONFIG_CMD_IMI is not set > +# CONFIG_CMD_XIMG is not set > +# CONFIG_CMD_FLASH is not set > +CONFIG_CMD_FUSE=y > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_I2C=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_MTD=y > +CONFIG_CMD_PCI=y Hello! Seems that you forgot to remove some parts of PCI... > +# CONFIG_CMD_SCSI is not set > +CONFIG_CMD_SPI=y > +CONFIG_CMD_USB=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_TFTPPUT=y > +CONFIG_CMD_CACHE=y > +CONFIG_CMD_TIME=y > +CONFIG_CMD_MVEBU_BUBT=y > +CONFIG_CMD_EXT4_WRITE=y > +CONFIG_MAC_PARTITION=y > +CONFIG_ENV_OVERWRITE=y > +CONFIG_ENV_IS_IN_SPI_FLASH=y > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > +CONFIG_ARP_TIMEOUT=200 > +CONFIG_NET_RETRY_COUNT=50 > +CONFIG_NET_RANDOM_ETHADDR=y > +CONFIG_CLK=y > +CONFIG_CLK_MVEBU=y > +CONFIG_DM_I2C=y > +CONFIG_DM_I2C_GPIO=y > +CONFIG_SYS_I2C_MV=y > +CONFIG_MISC=y > +CONFIG_MMC_HS200_SUPPORT=y > +CONFIG_MMC_SDHCI=y > +CONFIG_MMC_SDHCI_SDMA=y > +CONFIG_MMC_SDHCI_XENON=y > +CONFIG_MTD=y > +CONFIG_DM_MTD=y > +CONFIG_SPI_FLASH_SFDP_SUPPORT=y > +CONFIG_SPI_FLASH_MACRONIX=y > +CONFIG_SPI_FLASH_SPANSION=y > +CONFIG_SPI_FLASH_STMICRO=y > +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set > +CONFIG_SPI_FLASH_MTD=y > +CONFIG_PHYLIB_10G=y > +CONFIG_PHY_MARVELL=y > +CONFIG_PHY_FIXED=y > +CONFIG_PHY_GIGE=y > +CONFIG_MVNETA=y > +CONFIG_MVMDIO=y > +CONFIG_PHY=y > +CONFIG_MVEBU_COMPHY_SUPPORT=y > +CONFIG_PINCTRL=y > +CONFIG_PINCTRL_ARMADA_37XX=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_REGULATOR_GPIO=y > +CONFIG_DM_SCSI=y > +CONFIG_MVEBU_A3700_UART=y > +CONFIG_MVEBU_A3700_SPI=y > +CONFIG_SYSINFO=y > +CONFIG_SYSINFO_SMBIOS=y > +CONFIG_USB=y > +CONFIG_USB_XHCI_HCD=y > +CONFIG_USB_EHCI_HCD=y > +CONFIG_USB_HOST_ETHER=y > +CONFIG_USB_ETHER_ASIX=y > +CONFIG_USB_ETHER_MCS7830=y > +CONFIG_USB_ETHER_RTL8152=y > +CONFIG_USB_ETHER_SMSC95XX=y > +CONFIG_LZO=y > +CONFIG_SPL_LZO=y > -- > 2.36.1 >
Re: [PATCH v3 2/3] arm: mvebu: add support for Methode eDPU
On Fri, May 20, 2022 at 1:01 PM Pali Rohár wrote: > > On Friday 20 May 2022 12:54:23 Robert Marko wrote: > > Methode eDPU is an Armada 3720 power board based on the Methode uDPU. > > > > They feature the same CPU, RAM, and storage as well as the form factor. > > > > However, eDPU only has one SFP slot plus a copper G.hn port which does not > > work under U-boot. > > > > In order to reduce duplication, split the uDPU DTS into a common one. > > > > Signed-off-by: Robert Marko > > --- > > Changes in v3: > > * Use DTS-es pending merge upstream > > * Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device > > as one of the bootable ones. > > We dont have space constraints, so just re-enable SCSI rather than making > > one more config header > > > > Changes in v2: > > * Correct the PHY mode to 2500Base-X > > * Add the DTB to Makefile > > * Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present > > --- > ... > > diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig > > new file mode 100644 > > index 00..5e5e5a6b4d > > --- /dev/null > > +++ b/configs/eDPU_defconfig > > @@ -0,0 +1,96 @@ > > +CONFIG_ARM=y > > +CONFIG_ARCH_CPU_INIT=y > > +CONFIG_ARCH_MVEBU=y > > +CONFIG_SYS_TEXT_BASE=0x > > +CONFIG_TARGET_MVEBU_ARMADA_37XX=y > > +CONFIG_MVEBU_EFUSE=y > > +CONFIG_ENV_SIZE=0x1 > > +CONFIG_ENV_OFFSET=0x18 > > +CONFIG_ENV_SECT_SIZE=0x1 > > +CONFIG_DM_GPIO=y > > +CONFIG_DEFAULT_DEVICE_TREE="armada-3720-eDPU" > > +CONFIG_DEBUG_UART_BASE=0xd0012000 > > +CONFIG_SYS_LOAD_ADDR=0x600 > > +CONFIG_DEBUG_UART=y > > +CONFIG_DISTRO_DEFAULTS=y > > +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > > +CONFIG_FIT=y > > +CONFIG_FIT_VERBOSE=y > > +CONFIG_USE_PREBOOT=y > > +# CONFIG_DISPLAY_CPUINFO is not set > > +# CONFIG_DISPLAY_BOARDINFO is not set > > +CONFIG_DISPLAY_BOARDINFO_LATE=y > > +CONFIG_ARCH_EARLY_INIT_R=y > > +CONFIG_BOARD_EARLY_INIT_F=y > > +CONFIG_SYS_PROMPT="eDPU>> " > > +# CONFIG_CMD_ELF is not set > > +# CONFIG_CMD_IMI is not set > > +# CONFIG_CMD_XIMG is not set > > +# CONFIG_CMD_FLASH is not set > > +CONFIG_CMD_FUSE=y > > +CONFIG_CMD_GPIO=y > > +CONFIG_CMD_I2C=y > > +CONFIG_CMD_MMC=y > > +CONFIG_CMD_MTD=y > > +CONFIG_CMD_PCI=y > > Hello! Seems that you forgot to remove some parts of PCI... Oh yeah, forgot the command(Which weirdly does not depend on PCI support at all) I will fixup it ASAP. Regards, Robert > > > +# CONFIG_CMD_SCSI is not set > > +CONFIG_CMD_SPI=y > > +CONFIG_CMD_USB=y > > +# CONFIG_CMD_SETEXPR is not set > > +CONFIG_CMD_TFTPPUT=y > > +CONFIG_CMD_CACHE=y > > +CONFIG_CMD_TIME=y > > +CONFIG_CMD_MVEBU_BUBT=y > > +CONFIG_CMD_EXT4_WRITE=y > > +CONFIG_MAC_PARTITION=y > > +CONFIG_ENV_OVERWRITE=y > > +CONFIG_ENV_IS_IN_SPI_FLASH=y > > +CONFIG_SYS_RELOC_GD_ENV_ADDR=y > > +CONFIG_ARP_TIMEOUT=200 > > +CONFIG_NET_RETRY_COUNT=50 > > +CONFIG_NET_RANDOM_ETHADDR=y > > +CONFIG_CLK=y > > +CONFIG_CLK_MVEBU=y > > +CONFIG_DM_I2C=y > > +CONFIG_DM_I2C_GPIO=y > > +CONFIG_SYS_I2C_MV=y > > +CONFIG_MISC=y > > +CONFIG_MMC_HS200_SUPPORT=y > > +CONFIG_MMC_SDHCI=y > > +CONFIG_MMC_SDHCI_SDMA=y > > +CONFIG_MMC_SDHCI_XENON=y > > +CONFIG_MTD=y > > +CONFIG_DM_MTD=y > > +CONFIG_SPI_FLASH_SFDP_SUPPORT=y > > +CONFIG_SPI_FLASH_MACRONIX=y > > +CONFIG_SPI_FLASH_SPANSION=y > > +CONFIG_SPI_FLASH_STMICRO=y > > +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set > > +CONFIG_SPI_FLASH_MTD=y > > +CONFIG_PHYLIB_10G=y > > +CONFIG_PHY_MARVELL=y > > +CONFIG_PHY_FIXED=y > > +CONFIG_PHY_GIGE=y > > +CONFIG_MVNETA=y > > +CONFIG_MVMDIO=y > > +CONFIG_PHY=y > > +CONFIG_MVEBU_COMPHY_SUPPORT=y > > +CONFIG_PINCTRL=y > > +CONFIG_PINCTRL_ARMADA_37XX=y > > +CONFIG_DM_REGULATOR_FIXED=y > > +CONFIG_DM_REGULATOR_GPIO=y > > +CONFIG_DM_SCSI=y > > +CONFIG_MVEBU_A3700_UART=y > > +CONFIG_MVEBU_A3700_SPI=y > > +CONFIG_SYSINFO=y > > +CONFIG_SYSINFO_SMBIOS=y > > +CONFIG_USB=y > > +CONFIG_USB_XHCI_HCD=y > > +CONFIG_USB_EHCI_HCD=y > > +CONFIG_USB_HOST_ETHER=y > > +CONFIG_USB_ETHER_ASIX=y > > +CONFIG_USB_ETHER_MCS7830=y > > +CONFIG_USB_ETHER_RTL8152=y > > +CONFIG_USB_ETHER_SMSC95XX=y > > +CONFIG_LZO=y > > +CONFIG_SPL_LZO=y > > -- > > 2.36.1 > > -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
[PATCH v4 1/3] arm: mvebu: dts: sync DTS
Update the uDPU DTS to the version that is pending upstream [1][2][3][4].
[1]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-4-robert.ma...@sartura.hr/
[2]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-5-robert.ma...@sartura.hr/
[3]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.ma...@sartura.hr/
[4]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.ma...@sartura.hr/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index 1f534c0c65..f21a855fc6 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -16,7 +16,7 @@
/ {
model = "Methode uDPU Board";
- compatible = "methode,udpu", "marvell,armada3720";
+ compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
chosen {
stdout-path = "serial0:115200n8";
@@ -28,35 +28,34 @@
};
leds {
- pinctrl-names = "default";
compatible = "gpio-leds";
- power1 {
+ led-power1 {
label = "udpu:green:power";
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
};
- power2 {
+ led-power2 {
label = "udpu:red:power";
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
};
- network1 {
+ led-network1 {
label = "udpu:green:network";
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
};
- network2 {
+ led-network2 {
label = "udpu:red:network";
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
};
- alarm1 {
+ led-alarm1 {
label = "udpu:green:alarm";
gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;
};
- alarm2 {
+ led-alarm2 {
label = "udpu:red:alarm";
gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
};
@@ -99,7 +98,7 @@
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <5400>;
@@ -153,14 +152,12 @@
scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- nct375@48 {
- status = "okay";
+ temp-sensor@48 {
compatible = "ti,tmp75c";
reg = <0x48>;
};
- nct375@49 {
- status = "okay";
+ temp-sensor@49 {
compatible = "ti,tmp75c";
reg = <0x49>;
};
--
2.36.1
[PATCH v4 3/3] MAINTAINERS: add myself as Methode maintainer
I am currently maintaing the Methode uDPU and eDPU boards so add myself as the maintainer for them. Signed-off-by: Robert Marko --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 56be0bfad0..3d72b0c11f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -344,6 +344,14 @@ F: tools/mtk_image.c F: tools/mtk_image.h N: mediatek +ARM METHODE SUPPORT +M: Robert Marko +S: Maintained +F: arch/arm/dts/armada-3720-eDPU* +F: arch/arm/dts/armada-3720-uDPU* +F: configs/eDPU_defconfig +F: configs/uDPU_defconfig + ARM MICROCHIP/ATMEL AT91 M: Eugen Hristev S: Maintained -- 2.36.1
[PATCH v4 2/3] arm: mvebu: add support for Methode eDPU
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko
---
Changes in v4:
* Remove CMD_PCI as PCI is disabled anyway
Changes in v3:
* Use DTS-es pending merge upstream
* Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device
as one of the bootable ones.
We dont have space constraints, so just re-enable SCSI rather than making
one more config header
Changes in v2:
* Correct the PHY mode to 2500Base-X
* Add the DTB to Makefile
* Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++
arch/arm/dts/armada-3720-eDPU.dts | 14 ++
arch/arm/dts/armada-3720-uDPU.dts | 150 +---
arch/arm/dts/armada-3720-uDPU.dtsi| 160 ++
configs/eDPU_defconfig| 95 +
6 files changed, 316 insertions(+), 149 deletions(-)
create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
create mode 100644 arch/arm/dts/armada-3720-eDPU.dts
create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi
create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 83630af4f6..c484875585 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -236,6 +236,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
armada-3720-turris-mox.dtb \
+ armada-3720-eDPU.dtb\
armada-3720-uDPU.dtb\
armada-375-db.dtb \
armada-385-atl-x530.dtb \
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
new file mode 100644
index 00..1b2648f64d
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ product = "eDPU";
+ };
+
+ baseboard {
+ product = "eDPU";
+ };
+
+ chassis {
+ product = "eDPU";
+ };
+ };
+ };
+};
+
+&spi0 {
+ u-boot,dm-pre-reloc;
+
+ spi-flash@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&sdhci0 {
+ u-boot,dm-pre-reloc;
+};
+
+ð0 {
+ /* G.hn does not work without additional configuration */
+ status = "disabled";
+};
+
+ð1 {
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
diff --git a/arch/arm/dts/armada-3720-eDPU.dts
b/arch/arm/dts/armada-3720-eDPU.dts
new file mode 100644
index 00..57fc698e55
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "armada-3720-uDPU.dtsi"
+
+/ {
+ model = "Methode eDPU Board";
+ compatible = "methode,edpu", "marvell,armada3720", "marvell,armada3710";
+};
+
+ð0 {
+ phy-mode = "2500base-x";
+};
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index f21a855fc6..a75734d88a 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -1,66 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Device tree for the uDPU board.
- * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- * Copyright (C) 2016 Marvell
- * Copyright (C) 2019 Methode Electronics
- * Copyright (C) 2019 Telus
- *
- * Vladimir Vid
- */
/dts-v1/;
-#include
-#include "armada-372x.dtsi"
+#include "armada-3720-uDPU.dtsi"
/ {
model = "Methode uDPU Board";
compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x 0x 0x 0x2000>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-power1 {
- label = "udpu:green:power";
- gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
- };
-
- led-power2 {
- label = "udpu:red:power";
- gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
- };
-
- led-network1 {
- label = "udp
Re: [PATCH] include/configs: Remove rootwait=1 to all the affected boards
On Fri, May 20, 2022 at 01:00:13PM +0200, Michael Trimarchi wrote:
> rootwait=1 is not a valid kernel boot parameters. According
> to the documenation is only rootwait
>
> rootwait [KNL] Wait (indefinitely) for root device to show up.
> Useful for devices that are detected asynchronously
> (e.g. USB and MMC devices).
>
> Fix:
> Unknown kernel command line parameters "rootwait=1", will be passed to user
> space.
>
> Signed-off-by: Michael Trimarchi
> ---
> include/configs/am335x_evm.h | 2 +-
> include/configs/am43xx_evm.h | 2 +-
> include/configs/baltos.h | 2 +-
> include/configs/chiliboard.h | 2 +-
> include/configs/etamin.h | 2 +-
> include/configs/imx8mn_bsh_smm_s2.h| 2 +-
> include/configs/siemens-am33x-common.h | 4 ++--
> include/configs/ti_armv7_keystone2.h | 2 +-
> 8 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
> index fd5b209a52..f301a6dc83 100644
> --- a/include/configs/am335x_evm.h
> +++ b/include/configs/am335x_evm.h
> @@ -34,7 +34,7 @@
> "root=${nandroot} " \
> "rootfstype=${nandrootfstype}\0" \
> "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \
> - "nandrootfstype=ubifs rootwait=1\0" \
> + "nandrootfstype=ubifs rootwait\0" \
> "nandboot=echo Booting from nand ...; " \
> "run nandargs; " \
> "nand read ${fdtaddr} NAND.u-boot-spl-os; " \
> diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h
> index 5057441f75..1f5c3cd04e 100644
> --- a/include/configs/am43xx_evm.h
> +++ b/include/configs/am43xx_evm.h
> @@ -166,7 +166,7 @@
> "root=${nandroot} " \
> "rootfstype=${nandrootfstype}\0" \
> "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,4096\0" \
> - "nandrootfstype=ubifs rootwait=1\0" \
> + "nandrootfstype=ubifs rootwait\0" \
> "nandboot=echo Booting from nand ...; " \
> "run nandargs; " \
> "nand read ${fdtaddr} NAND.u-boot-spl-os; " \
> diff --git a/include/configs/baltos.h b/include/configs/baltos.h
> index b881d8c03f..7b43741fde 100644
> --- a/include/configs/baltos.h
> +++ b/include/configs/baltos.h
> @@ -37,7 +37,7 @@
> "root=${nandroot} " \
> "rootfstype=${nandrootfstype}\0" \
> "nandroot=ubi0:rootfs rw ubi.mtd=5\0" \
> - "nandrootfstype=ubifs rootwait=1\0" \
> + "nandrootfstype=ubifs rootwait\0" \
> "nandboot=echo Booting from nand ...; " \
> "run nandargs; " \
> "setenv loadaddr 0x8400; " \
> diff --git a/include/configs/chiliboard.h b/include/configs/chiliboard.h
> index 82acda595f..8bad0f9ac4 100644
> --- a/include/configs/chiliboard.h
> +++ b/include/configs/chiliboard.h
> @@ -20,7 +20,7 @@
> "root=${nandroot} " \
> "rootfstype=${nandrootfstype}\0" \
> "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system\0" \
> - "nandrootfstype=ubifs rootwait=1\0" \
> + "nandrootfstype=ubifs rootwait\0" \
> "nandboot=echo Booting from nand ...; " \
> "run nandargs; " \
> "nand read ${fdt_addr} NAND.u-boot-spl-os; " \
> diff --git a/include/configs/etamin.h b/include/configs/etamin.h
> index 9cf93924df..1c0a86d1ed 100644
> --- a/include/configs/etamin.h
> +++ b/include/configs/etamin.h
> @@ -113,7 +113,7 @@
> "nand_active_ubi_vol=rootfs_a\0" \
> "rootfs_name=rootfs\0" \
> "kernel_name=uImage\0"\
> - "nand_root_fs_type=ubifs rootwait=1\0" \
> + "nand_root_fs_type=ubifs rootwait\0" \
> "nand_args=run bootargs_defaults;" \
> "mtdparts default;" \
> "setenv ${partitionset_active} true;" \
> diff --git a/include/configs/imx8mn_bsh_smm_s2.h
> b/include/configs/imx8mn_bsh_smm_s2.h
> index 098f23b206..f752978369 100644
> --- a/include/configs/imx8mn_bsh_smm_s2.h
> +++ b/include/configs/imx8mn_bsh_smm_s2.h
> @@ -21,7 +21,7 @@
> "root=${nandroot} " \
> "rootfstype=${nandrootfstype}\0" \
> "nandroot=ubi0:root rw ubi.mtd=nandrootfs\0" \
> - "nandrootfstype=ubifs rootwait=1\0" \
> + "nandrootfstype=ubifs rootwait\0" \
> "nandboot=echo Booting from nand ...; " \
> "run nandargs; " \
> "nand read ${fdt_addr_r} nanddtb; " \
> diff --git a/include/configs/siemens-am33x-common.h
> b/include/configs/siemens-am33x-common.h
> index 08c4d52d65..9f1a6cd51b 100644
> --- a/include/configs/siemens-am33x-common.h
> +++ b/include/configs/siemens-am33x-common.h
> @@ -237,7 +237,7 @@
> "nand_active_ubi_vol=rootfs_a\0" \
> "nand_active_ubi_vol_A=rootfs_a\0" \
> "nand_active_ubi_vol_B=rootfs_b\0" \
> - "nand_root_fs_type=ubifs rootwait=1\0" \
> + "nand_root_fs_type=ubifs rootwait\0" \
> "nand_src_addr=0x28\0" \
> "nand_src_
Re: [PATCH v4 3/3] MAINTAINERS: add myself as Methode maintainer
On 20.05.22 13:12, Robert Marko wrote: I am currently maintaing the Methode uDPU and eDPU boards so add myself as the maintainer for them. Signed-off-by: Robert Marko --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 56be0bfad0..3d72b0c11f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -344,6 +344,14 @@ F: tools/mtk_image.c F:tools/mtk_image.h N:mediatek +ARM METHODE SUPPORT +M: Robert Marko +S: Maintained +F: arch/arm/dts/armada-3720-eDPU* +F: arch/arm/dts/armada-3720-uDPU* +F: configs/eDPU_defconfig +F: configs/uDPU_defconfig + Please board/Marvell/mvebu_armada-37xx/MAINTAINERS as there is already a bit for the uDPU which might be better dropped now, if you think that's feasible. Thanks, Stefan ARM MICROCHIP/ATMEL AT91 M:Eugen Hristev S:Maintained Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
[PATCH] common/board_r.c: drop legacy and unused bi_enetaddr
The bi_enetaddr field in struct bd_info is write-only; nothing ever
reads back the value.
Moreover, the value we write is more or less random, and certainly not
something one can rely on: If the board has a writable environment and
the mac address has been stored there, we fetch that value. But if the
board doesn't, this code runs before initr_net() -> eth_initialize(),
and thus before the code in eth-uclass which fetches MAC addresses
from eeprom, fuses or whatnot and populates the (run-time) environment
with those values.
Signed-off-by: Rasmus Villemoes
---
common/board_r.c | 15 ---
include/asm-generic/u-boot.h | 1 -
2 files changed, 16 deletions(-)
diff --git a/common/board_r.c b/common/board_r.c
index 6f4aca2077..3e6ba3a9bc 100644
--- a/common/board_r.c
+++ b/common/board_r.c
@@ -469,18 +469,6 @@ static int initr_malloc_bootparams(void)
}
#endif
-#ifdef CONFIG_CMD_NET
-static int initr_ethaddr(void)
-{
- struct bd_info *bd = gd->bd;
-
- /* kept around for legacy kernels only ... ignore the next section */
- eth_env_get_enetaddr("ethaddr", bd->bi_enetaddr);
-
- return 0;
-}
-#endif /* CONFIG_CMD_NET */
-
#if defined(CONFIG_LED_STATUS)
static int initr_status_led(void)
{
@@ -756,9 +744,6 @@ static init_fnc_t init_sequence_r[] = {
initr_status_led,
#endif
/* PPC has a udelay(20) here dating from 2002. Why? */
-#ifdef CONFIG_CMD_NET
- initr_ethaddr,
-#endif
#if defined(CONFIG_GPIO_HOG)
gpio_hog_probe_all,
#endif
diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h
index 1becc669ae..70303acd55 100644
--- a/include/asm-generic/u-boot.h
+++ b/include/asm-generic/u-boot.h
@@ -48,7 +48,6 @@ struct bd_info {
#endif
unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
unsigned long bi_ip_addr; /* IP Address */
- unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
unsigned short bi_ethspeed;/* Ethernet speed in Mbps */
unsigned long bi_intfreq; /* Internal Freq, in MHz */
unsigned long bi_busfreq; /* Bus Freq, in MHz */
--
2.31.1
Re: [PATCH v4 3/3] MAINTAINERS: add myself as Methode maintainer
On Fri, May 20, 2022 at 1:17 PM Stefan Roese wrote: > > On 20.05.22 13:12, Robert Marko wrote: > > I am currently maintaing the Methode uDPU and eDPU boards so add myself > > as the maintainer for them. > > > > Signed-off-by: Robert Marko > > --- > > MAINTAINERS | 8 > > 1 file changed, 8 insertions(+) > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 56be0bfad0..3d72b0c11f 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -344,6 +344,14 @@ F: tools/mtk_image.c > > F: tools/mtk_image.h > > N: mediatek > > > > +ARM METHODE SUPPORT > > +M: Robert Marko > > +S: Maintained > > +F: arch/arm/dts/armada-3720-eDPU* > > +F: arch/arm/dts/armada-3720-uDPU* > > +F: configs/eDPU_defconfig > > +F: configs/uDPU_defconfig > > + > > Please board/Marvell/mvebu_armada-37xx/MAINTAINERS as there is already > a bit for the uDPU which might be better dropped now, if you think > that's feasible. Hi Stefan, I can drop the uDPU entry from there as I was not aware it even existed. Regards, Robert > > Thanks, > Stefan > > > ARM MICROCHIP/ATMEL AT91 > > M: Eugen Hristev > > S: Maintained > > Viele Grüße, > Stefan Roese > > -- > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany > Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de -- Robert Marko Staff Embedded Linux Engineer Sartura Ltd. Lendavska ulica 16a 1 Zagreb, Croatia Email: robert.ma...@sartura.hr Web: www.sartura.hr
Re: [PATCH v4 3/3] MAINTAINERS: add myself as Methode maintainer
On 20.05.22 13:26, Robert Marko wrote: On Fri, May 20, 2022 at 1:17 PM Stefan Roese wrote: On 20.05.22 13:12, Robert Marko wrote: I am currently maintaing the Methode uDPU and eDPU boards so add myself as the maintainer for them. Signed-off-by: Robert Marko --- MAINTAINERS | 8 1 file changed, 8 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 56be0bfad0..3d72b0c11f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -344,6 +344,14 @@ F: tools/mtk_image.c F: tools/mtk_image.h N: mediatek +ARM METHODE SUPPORT +M: Robert Marko +S: Maintained +F: arch/arm/dts/armada-3720-eDPU* +F: arch/arm/dts/armada-3720-uDPU* +F: configs/eDPU_defconfig +F: configs/uDPU_defconfig + Please board/Marvell/mvebu_armada-37xx/MAINTAINERS as there is already a bit for the uDPU which might be better dropped now, if you think that's feasible. Hi Stefan, I can drop the uDPU entry from there as I was not aware it even existed. Please do. Otherwise we have duplication's here. Thanks, Stefan Regards, Robert Thanks, Stefan ARM MICROCHIP/ATMEL AT91 M: Eugen Hristev S: Maintained Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de Viele Grüße, Stefan Roese -- DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: s...@denx.de
Re: [PATCH v2 0/8] ARM: imx: Add support for iMX6QDL DHCOM DRC02 and DH picoITX
Hi Philip, On 20/05/2022 05:46, Philip Oberfichtner wrote: This patch series adds support for the DHCOM DRC02 and DH picoITX baseboards by DH electronics. The two boards can be equipped with different SoMs. The STM32MP15xx based versions are already mainlined. This patch adds support for the iMX6QDL based variants. Changes in v2: - Rewrite board_fit_config_name_match - Return -EINVAL instead of -1 - Reviewed-by Marek - Fix spelling Philip Oberfichtner (8): ARM: imx6: Fix broken DT path in DH board file ARM: dts: imx: Migrate iMX6QDL DRC02 DTs from Linux ARM: dts: imx: Migrate iMX6QDL picoITX DTs from Linux ARM: imx6: Remove CONFIG_FEC_MXC_PHYADDR from DH header ARM: dts: imx: Simplify fec node for iMX6QDL DHCOM boards ARM: dts: imx: Configure FEC for iMX6QDL picoITX ARM: dts: imx: Configure FEC for iMX6QDL DRC02 ARM: imx6: Adapt device tree selection in DH board file For the series: Reviewed-by: Fabio Estevam
[PATCH v5 1/3] arm: mvebu: dts: sync DTS
Update the uDPU DTS to the version that is pending upstream [1][2][3][4].
[1]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-4-robert.ma...@sartura.hr/
[2]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-5-robert.ma...@sartura.hr/
[3]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-6-robert.ma...@sartura.hr/
[4]
https://patchwork.kernel.org/project/linux-arm-kernel/patch/20220516124828.45144-7-robert.ma...@sartura.hr/
Signed-off-by: Robert Marko
---
arch/arm/dts/armada-3720-uDPU.dts | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index 1f534c0c65..f21a855fc6 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -16,7 +16,7 @@
/ {
model = "Methode uDPU Board";
- compatible = "methode,udpu", "marvell,armada3720";
+ compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
chosen {
stdout-path = "serial0:115200n8";
@@ -28,35 +28,34 @@
};
leds {
- pinctrl-names = "default";
compatible = "gpio-leds";
- power1 {
+ led-power1 {
label = "udpu:green:power";
gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
};
- power2 {
+ led-power2 {
label = "udpu:red:power";
gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
};
- network1 {
+ led-network1 {
label = "udpu:green:network";
gpios = <&gpionb 13 GPIO_ACTIVE_LOW>;
};
- network2 {
+ led-network2 {
label = "udpu:red:network";
gpios = <&gpionb 14 GPIO_ACTIVE_LOW>;
};
- alarm1 {
+ led-alarm1 {
label = "udpu:green:alarm";
gpios = <&gpionb 15 GPIO_ACTIVE_LOW>;
};
- alarm2 {
+ led-alarm2 {
label = "udpu:red:alarm";
gpios = <&gpionb 16 GPIO_ACTIVE_LOW>;
};
@@ -99,7 +98,7 @@
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
- spi-flash@0 {
+ flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <5400>;
@@ -153,14 +152,12 @@
scl-gpios = <&gpionb 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpionb 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
- nct375@48 {
- status = "okay";
+ temp-sensor@48 {
compatible = "ti,tmp75c";
reg = <0x48>;
};
- nct375@49 {
- status = "okay";
+ temp-sensor@49 {
compatible = "ti,tmp75c";
reg = <0x49>;
};
--
2.36.1
[PATCH v5 2/3] arm: mvebu: add support for Methode eDPU
Methode eDPU is an Armada 3720 power board based on the Methode uDPU.
They feature the same CPU, RAM, and storage as well as the form factor.
However, eDPU only has one SFP slot plus a copper G.hn port which does not
work under U-boot.
In order to reduce duplication, split the uDPU DTS into a common one.
Signed-off-by: Robert Marko
---
Changes in v4:
* Remove CMD_PCI as PCI is disabled anyway
Changes in v3:
* Use DTS-es pending merge upstream
* Re-enable SCSI as the Armada 37xx BOOT_TARGET_DEVICES defines SCSI device
as one of the bootable ones.
We dont have space constraints, so just re-enable SCSI rather than making
one more config header
Changes in v2:
* Correct the PHY mode to 2500Base-X
* Add the DTB to Makefile
* Remove SCSI/SATA, PCI and E1000 from defconfig as they are not present
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 45 ++
arch/arm/dts/armada-3720-eDPU.dts | 14 ++
arch/arm/dts/armada-3720-uDPU.dts | 150 +---
arch/arm/dts/armada-3720-uDPU.dtsi| 160 ++
configs/eDPU_defconfig| 95 +
6 files changed, 316 insertions(+), 149 deletions(-)
create mode 100644 arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
create mode 100644 arch/arm/dts/armada-3720-eDPU.dts
create mode 100644 arch/arm/dts/armada-3720-uDPU.dtsi
create mode 100644 configs/eDPU_defconfig
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 83630af4f6..c484875585 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -236,6 +236,7 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
armada-3720-turris-mox.dtb \
+ armada-3720-eDPU.dtb\
armada-3720-uDPU.dtb\
armada-375-db.dtb \
armada-385-atl-x530.dtb \
diff --git a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
new file mode 100644
index 00..1b2648f64d
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -0,0 +1,45 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+/ {
+ smbios {
+ compatible = "u-boot,sysinfo-smbios";
+
+ smbios {
+ system {
+ product = "eDPU";
+ };
+
+ baseboard {
+ product = "eDPU";
+ };
+
+ chassis {
+ product = "eDPU";
+ };
+ };
+ };
+};
+
+&spi0 {
+ u-boot,dm-pre-reloc;
+
+ spi-flash@0 {
+ u-boot,dm-pre-reloc;
+ };
+};
+
+&sdhci0 {
+ u-boot,dm-pre-reloc;
+};
+
+ð0 {
+ /* G.hn does not work without additional configuration */
+ status = "disabled";
+};
+
+ð1 {
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+};
diff --git a/arch/arm/dts/armada-3720-eDPU.dts
b/arch/arm/dts/armada-3720-eDPU.dts
new file mode 100644
index 00..57fc698e55
--- /dev/null
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include "armada-3720-uDPU.dtsi"
+
+/ {
+ model = "Methode eDPU Board";
+ compatible = "methode,edpu", "marvell,armada3720", "marvell,armada3710";
+};
+
+ð0 {
+ phy-mode = "2500base-x";
+};
diff --git a/arch/arm/dts/armada-3720-uDPU.dts
b/arch/arm/dts/armada-3720-uDPU.dts
index f21a855fc6..a75734d88a 100644
--- a/arch/arm/dts/armada-3720-uDPU.dts
+++ b/arch/arm/dts/armada-3720-uDPU.dts
@@ -1,66 +1,13 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Device tree for the uDPU board.
- * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
- * Copyright (C) 2016 Marvell
- * Copyright (C) 2019 Methode Electronics
- * Copyright (C) 2019 Telus
- *
- * Vladimir Vid
- */
/dts-v1/;
-#include
-#include "armada-372x.dtsi"
+#include "armada-3720-uDPU.dtsi"
/ {
model = "Methode uDPU Board";
compatible = "methode,udpu", "marvell,armada3720", "marvell,armada3710";
- chosen {
- stdout-path = "serial0:115200n8";
- };
-
- memory@0 {
- device_type = "memory";
- reg = <0x 0x 0x 0x2000>;
- };
-
- leds {
- compatible = "gpio-leds";
-
- led-power1 {
- label = "udpu:green:power";
- gpios = <&gpionb 11 GPIO_ACTIVE_LOW>;
- };
-
- led-power2 {
- label = "udpu:red:power";
- gpios = <&gpionb 12 GPIO_ACTIVE_LOW>;
- };
-
- led-network1 {
- label = "udp
[PATCH v5 3/3] MAINTAINERS: add myself as Methode maintainer
I am currently maintaing the Methode uDPU and eDPU boards so add myself as the maintainer for them. Remove the old entry from board/Marvell/mvebu_armada-37xx/MAINTAINERS. Signed-off-by: Robert Marko --- Changes in v5: * Remove entry from the board/Marvell/mvebu_armada-37xx/MAINTAINERS --- MAINTAINERS | 8 board/Marvell/mvebu_armada-37xx/MAINTAINERS | 5 - 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index 56be0bfad0..3d72b0c11f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -344,6 +344,14 @@ F: tools/mtk_image.c F: tools/mtk_image.h N: mediatek +ARM METHODE SUPPORT +M: Robert Marko +S: Maintained +F: arch/arm/dts/armada-3720-eDPU* +F: arch/arm/dts/armada-3720-uDPU* +F: configs/eDPU_defconfig +F: configs/uDPU_defconfig + ARM MICROCHIP/ATMEL AT91 M: Eugen Hristev S: Maintained diff --git a/board/Marvell/mvebu_armada-37xx/MAINTAINERS b/board/Marvell/mvebu_armada-37xx/MAINTAINERS index f2c0a582d7..9b0afeef10 100644 --- a/board/Marvell/mvebu_armada-37xx/MAINTAINERS +++ b/board/Marvell/mvebu_armada-37xx/MAINTAINERS @@ -9,8 +9,3 @@ ESPRESSOBin BOARD M: Konstantin Porotchkin S: Maintained F: configs/mvebu_espressobin-88f3720_defconfig - -uDPU BOARD -M: Vladimir Vid -S: Maintained -F: configs/uDPU_defconfig -- 2.36.1
[PATCH] riscv: cpu: set gp before board_init_f_init_reserve
From: Nikita Shubin Restore global pointer before board_init_f_init_reserve call, as "a0" can be set in harts_early_init call and we end up with invalid global pointer. Signed-off-by: Nikita Shubin --- arch/riscv/cpu/start.S | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 76850ec9be..623de57551 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -142,6 +142,7 @@ call_harts_early_init: bneztp, secondary_hart_loop #endif + mv a0, s0 jal board_init_f_init_reserve SREGs1, GD_FIRMWARE_FDT_ADDR(gp) -- 2.35.1
Re: [PATCH v2] usb: dwc3: add a SPL_USB_DWC3_GENERIC option for the dwc3 driver
On 20.05.22 12:21, Marek Vasut wrote: On 5/20/22 11:08, Stefano Babic wrote: Hi Marek, don't you mind if I apply to my u-booz-imx this (that really belongs to your competence area) ? It fixes warnings for the librem5, and it is a pity if I cannot merge it. Just pick it via imx, that's fine, I don't expect conflict. Rather it breaks some TI boards - Angus, can you take a look and possibly run buildman for ARM32 boards ? This a link for the failure : https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/437210 I put Libre5 in standby, but I will still merge for the release if the problem is solved. Regards, Stefano -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
Re: [PATCH v2] usb: dwc3: add a SPL_USB_DWC3_GENERIC option for the dwc3 driver
On 2022-05-20 05:31, Stefano Babic wrote: On 20.05.22 12:21, Marek Vasut wrote: On 5/20/22 11:08, Stefano Babic wrote: Hi Marek, don't you mind if I apply to my u-booz-imx this (that really belongs to your competence area) ? It fixes warnings for the librem5, and it is a pity if I cannot merge it. Just pick it via imx, that's fine, I don't expect conflict. Rather it breaks some TI boards - Angus, can you take a look and possibly run buildman for ARM32 boards ? This a link for the failure : https://source.denx.de/u-boot/custodians/u-boot-imx/-/jobs/437210 I put Libre5 in standby, but I will still merge for the release if the problem is solved. The fix is probably as simple as adding SPL_USB_DWC3_GENERIC to all configs where USB_DWC3_GENERIC was already defined. I'll try and verify that today. Thanks Angus Regards, Stefano
[PATCH V4 3/8] imx: imx8mm-icore: migrate to use BINMAN
From: Peng Fan Use BINMAN instead of imx specific packing method. Signed-off-by: Peng Fan --- arch/arm/mach-imx/imx8m/Kconfig | 1 + arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg | 10 +- configs/imx8mm-icore-mx8mm-ctouch2_defconfig| 2 +- configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 2 +- 4 files changed, 4 insertions(+), 11 deletions(-) diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig index 24299ae037f..75ad7aab081 100644 --- a/arch/arm/mach-imx/imx8m/Kconfig +++ b/arch/arm/mach-imx/imx8m/Kconfig @@ -68,6 +68,7 @@ config TARGET_IMX8MM_EVK config TARGET_IMX8MM_ICORE_MX8MM bool "Engicam i.Core MX8M Mini SOM" + select BINMAN select IMX8MM select SUPPORT_SPL select IMX8M_LPDDR4 diff --git a/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg b/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg index e06d53ef417..5dcb8ae72f0 100644 --- a/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg +++ b/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg @@ -3,13 +3,5 @@ * Copyright 2019 NXP */ - -FIT BOOT_FROM sd -LOADER spl/u-boot-spl-ddr.bin 0x7E1000 -SECOND_LOADER u-boot.itb 0x4020 0x6 - -DDR_FW lpddr4_pmu_train_1d_imem.bin -DDR_FW lpddr4_pmu_train_1d_dmem.bin -DDR_FW lpddr4_pmu_train_2d_imem.bin -DDR_FW lpddr4_pmu_train_2d_dmem.bin +LOADER u-boot-spl-ddr.bin 0x7E1000 diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index d95a74a7237..dcb12e5d026 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -20,7 +20,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb" CONFIG_SPL_BOARD_INIT=y diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 43c697a39d8..22acf7317b4 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -20,7 +20,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh" +# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb" CONFIG_SPL_BOARD_INIT=y -- 2.36.0
[PATCH V4 1/8] spl: guard u_boot_any with X86
From: Peng Fan
set the symbol as weak not work if LTO is enabled. Since u_boot_any is
only used on X86 for now, so guard it with X86, otherwise build break
if we use BINMAN_SYMBOLS on i.MX.
Tested-by: Tim Harvey #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan
---
common/spl/spl.c | 8 ++--
common/spl/spl_ram.c | 4
2 files changed, 10 insertions(+), 2 deletions(-)
diff --git a/common/spl/spl.c b/common/spl/spl.c
index c8c463f80bd..4b28180467a 100644
--- a/common/spl/spl.c
+++ b/common/spl/spl.c
@@ -50,7 +50,7 @@ DECLARE_GLOBAL_DATA_PTR;
u32 *boot_params_ptr = NULL;
-#if CONFIG_IS_ENABLED(BINMAN_SYMBOLS)
+#if CONFIG_IS_ENABLED(BINMAN_SYMBOLS) && CONFIG_IS_ENABLED(X86)
/* See spl.h for information about this */
binman_sym_declare(ulong, u_boot_any, image_pos);
binman_sym_declare(ulong, u_boot_any, size);
@@ -148,7 +148,7 @@ void spl_fixup_fdt(void *fdt_blob)
#endif
}
-#if CONFIG_IS_ENABLED(BINMAN_SYMBOLS)
+#if CONFIG_IS_ENABLED(BINMAN_SYMBOLS) && CONFIG_IS_ENABLED(X86)
ulong spl_get_image_pos(void)
{
#ifdef CONFIG_VPL
@@ -221,7 +221,11 @@ __weak struct image_header *spl_get_load_buffer(ssize_t
offset, size_t size)
void spl_set_header_raw_uboot(struct spl_image_info *spl_image)
{
+#if CONFIG_IS_ENABLED(X86)
ulong u_boot_pos = binman_sym(ulong, u_boot_any, image_pos);
+#else
+ ulong u_boot_pos = BINMAN_SYM_MISSING;
+#endif
spl_image->size = CONFIG_SYS_MONITOR_LEN;
diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
index 82964592571..083b14102ee 100644
--- a/common/spl/spl_ram.c
+++ b/common/spl/spl_ram.c
@@ -70,7 +70,11 @@ static int spl_ram_load_image(struct spl_image_info
*spl_image,
load.read = spl_ram_load_read;
spl_load_simple_fit(spl_image, &load, 0, header);
} else {
+#if CONFIG_IS_ENABLED(X86)
ulong u_boot_pos = binman_sym(ulong, u_boot_any, image_pos);
+#else
+ ulong u_boot_pos = BINMAN_SYM_MISSING;
+#endif
debug("Legacy image\n");
/*
--
2.36.0
[PATCH V4 4/8] armv8: u-boot-spl.lds: mark __image_copy_start as symbol
From: Peng Fan
In arch/arm/lib/sections.c there is below code:
char __image_copy_start[0] __section(".__image_copy_start");
But actually 'objdump -t spl/u-boot-spl' not able to find out
symbol '__image_copy_start' for binman update image-pos/size.
So update link file
Tested-by: Tim Harvey #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan
---
arch/arm/cpu/armv8/u-boot-spl.lds | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/u-boot-spl.lds
b/arch/arm/cpu/armv8/u-boot-spl.lds
index 730eb93dbc3..9b1e7d46287 100644
--- a/arch/arm/cpu/armv8/u-boot-spl.lds
+++ b/arch/arm/cpu/armv8/u-boot-spl.lds
@@ -23,7 +23,7 @@ SECTIONS
{
.text : {
. = ALIGN(8);
- *(.__image_copy_start)
+ __image_copy_start = .;
CPUDIR/start.o (.text*)
*(.text*)
} >.sram
--
2.36.0
[PATCH V4 5/8] tools: binman: section: replace @ with -
From: Peng Fan
In arch/arm/dts/imx8mp-u-boot.dtsi, there are blob-ext@1, blob-ext@2 and
etc which is for packing ddr phy firmware. However we could not declare
symbol name such as 'binman_sym_declare(ulong, blob_ext@1, image_pos)',
because '@' is not allowed, so we choose to declare the symbol
'binman_sym_declare(ulong, blob_ext_1, image_pos);' with '@' replaced with
'_'. It does not impact if there is no '@' in section name.
Tested-by: Tim Harvey #imx8m[m,n,p]-venice
Reviewed-by: Tom Rini
Signed-off-by: Peng Fan
---
tools/binman/etype/section.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/binman/etype/section.py b/tools/binman/etype/section.py
index bd67238b919..e3f362b442b 100644
--- a/tools/binman/etype/section.py
+++ b/tools/binman/etype/section.py
@@ -875,7 +875,7 @@ class Entry_section(Entry):
entries[entry.GetPath()] = entry
for entry in to_add.values():
self._CollectEntries(entries, entries_by_name, entry)
-entries_by_name[add_entry.name] = add_entry
+entries_by_name[add_entry.name.replace('@', '-')] = add_entry
def MissingArgs(self, entry, missing):
"""Report a missing argument, if enabled
--
2.36.0
[PATCH V4 0/8] arm64: binman: use binman symbols for imx
From: Peng Fan V4: Fix three boards build failure V3: Add R-b/T-b Fix build warning V2: resolve some CI failure include patch 7 binman symbol is a good feature, but only used on X86 for now. This patchset is to use it for i.MX8M platform. The current imx8m ddr phy firmware consumes lots of space, because we pad them to the largest 32KB and 16KB for IMEM and DMEM. With this patchset we use binman symbols to get firmware location and size, we could save near 36KB with i.MX8MP-EVK. Please help check and test Peng Fan (8): spl: guard u_boot_any with X86 arm: dts: imx8m: update binman ddr firmware node name imx: imx8mm-icore: migrate to use BINMAN armv8: u-boot-spl.lds: mark __image_copy_start as symbol tools: binman: section: replace @ with - ddr: imx8m: helper: load ddr firmware according to binman symbols arm: dts: imx8m: shrink ddr firmware size to actual file size binman_sym: guard with CONFIG_SPL_BINMAN_SYMBOLS arch/arm/cpu/armv8/u-boot-spl.lds | 2 +- arch/arm/dts/imx8mm-u-boot.dtsi | 16 +++--- arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi| 8 +-- .../dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi | 4 +- arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 8 +-- arch/arm/dts/imx8mn-evk-u-boot.dtsi | 8 +-- .../dts/imx8mn-var-som-symphony-u-boot.dtsi | 16 +++--- arch/arm/dts/imx8mn-venice-u-boot.dtsi| 16 +++--- arch/arm/dts/imx8mp-u-boot.dtsi | 8 +-- arch/arm/dts/imx8mq-cm-u-boot.dtsi| 8 +-- arch/arm/dts/imx8mq-u-boot.dtsi | 16 +++--- arch/arm/mach-imx/imx8m/Kconfig | 1 + .../mach-imx/imx8m/imximage-8mm-lpddr4.cfg| 10 +--- common/spl/spl.c | 8 ++- common/spl/spl_ram.c | 4 ++ configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 2 +- configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 2 +- drivers/ddr/imx/imx8m/helper.c| 51 --- include/binman_sym.h | 2 +- tools/binman/etype/section.py | 2 +- tools/binman/test/u_boot_binman_syms.c| 1 + tools/binman/test/u_boot_binman_syms_size.c | 1 + 22 files changed, 116 insertions(+), 78 deletions(-) -- 2.36.0
[PATCH V4 6/8] ddr: imx8m: helper: load ddr firmware according to binman symbols
From: Peng Fan
By reading binman symbols, we no need hard coded IMEM_LEN/DMEM_LEN after
we update the binman dtsi to drop 0x8000/0x4000 length for the firmware.
And that could save binary size for many KBs.
Tested-by: Tim Harvey #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan
---
drivers/ddr/imx/imx8m/helper.c | 51 --
1 file changed, 43 insertions(+), 8 deletions(-)
diff --git a/drivers/ddr/imx/imx8m/helper.c b/drivers/ddr/imx/imx8m/helper.c
index f23904bf712..b3bd57531b7 100644
--- a/drivers/ddr/imx/imx8m/helper.c
+++ b/drivers/ddr/imx/imx8m/helper.c
@@ -4,6 +4,7 @@
*/
#include
+#include
#include
#include
#include
@@ -25,15 +26,30 @@ DECLARE_GLOBAL_DATA_PTR;
#define DMEM_OFFSET_ADDR 0x00054000
#define DDR_TRAIN_CODE_BASE_ADDR IP2APB_DDRPHY_IPS_BASE_ADDR(0)
+binman_sym_declare(ulong, blob_ext_1, image_pos);
+binman_sym_declare(ulong, blob_ext_1, size);
+
+binman_sym_declare(ulong, blob_ext_2, image_pos);
+binman_sym_declare(ulong, blob_ext_2, size);
+
+#if !IS_ENABLED(CONFIG_IMX8M_DDR3L)
+binman_sym_declare(ulong, blob_ext_3, image_pos);
+binman_sym_declare(ulong, blob_ext_3, size);
+
+binman_sym_declare(ulong, blob_ext_4, image_pos);
+binman_sym_declare(ulong, blob_ext_4, size);
+#endif
+
/* We need PHY iMEM PHY is 32KB padded */
void ddr_load_train_firmware(enum fw_type type)
{
u32 tmp32, i;
u32 error = 0;
unsigned long pr_to32, pr_from32;
- unsigned long fw_offset = type ? IMEM_2D_OFFSET : 0;
- unsigned long imem_start = (unsigned long)&_end + fw_offset;
- unsigned long dmem_start;
+ uint32_t fw_offset = type ? IMEM_2D_OFFSET : 0;
+ uint32_t imem_start = (unsigned long)&_end + fw_offset;
+ uint32_t dmem_start;
+ uint32_t imem_len = IMEM_LEN, dmem_len = DMEM_LEN;
#ifdef CONFIG_SPL_OF_CONTROL
if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) {
@@ -43,11 +59,30 @@ void ddr_load_train_firmware(enum fw_type type)
}
#endif
- dmem_start = imem_start + IMEM_LEN;
+ if (CONFIG_IS_ENABLED(BINMAN_SYMBOLS)) {
+ switch (type) {
+ case FW_1D_IMAGE:
+ imem_start = binman_sym(ulong, blob_ext_1, image_pos);
+ imem_len = binman_sym(ulong, blob_ext_1, size);
+ dmem_start = binman_sym(ulong, blob_ext_2, image_pos);
+ dmem_len = binman_sym(ulong, blob_ext_2, size);
+ break;
+ case FW_2D_IMAGE:
+#if !IS_ENABLED(CONFIG_IMX8M_DDR3L)
+ imem_start = binman_sym(ulong, blob_ext_3, image_pos);
+ imem_len = binman_sym(ulong, blob_ext_3, size);
+ dmem_start = binman_sym(ulong, blob_ext_4, image_pos);
+ dmem_len = binman_sym(ulong, blob_ext_4, size);
+#endif
+ break;
+ }
+ }
+
+ dmem_start = imem_start + imem_len;
pr_from32 = imem_start;
pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR;
- for (i = 0x0; i < IMEM_LEN; ) {
+ for (i = 0x0; i < imem_len; ) {
tmp32 = readl(pr_from32);
writew(tmp32 & 0x, pr_to32);
pr_to32 += 4;
@@ -59,7 +94,7 @@ void ddr_load_train_firmware(enum fw_type type)
pr_from32 = dmem_start;
pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * DMEM_OFFSET_ADDR;
- for (i = 0x0; i < DMEM_LEN; ) {
+ for (i = 0x0; i < dmem_len; ) {
tmp32 = readl(pr_from32);
writew(tmp32 & 0x, pr_to32);
pr_to32 += 4;
@@ -72,7 +107,7 @@ void ddr_load_train_firmware(enum fw_type type)
debug("check ddr_pmu_train_imem code\n");
pr_from32 = imem_start;
pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * IMEM_OFFSET_ADDR;
- for (i = 0x0; i < IMEM_LEN; ) {
+ for (i = 0x0; i < imem_len; ) {
tmp32 = (readw(pr_to32) & 0x);
pr_to32 += 4;
tmp32 += ((readw(pr_to32) & 0x) << 16);
@@ -93,7 +128,7 @@ void ddr_load_train_firmware(enum fw_type type)
debug("check ddr4_pmu_train_dmem code\n");
pr_from32 = dmem_start;
pr_to32 = DDR_TRAIN_CODE_BASE_ADDR + 4 * DMEM_OFFSET_ADDR;
- for (i = 0x0; i < DMEM_LEN;) {
+ for (i = 0x0; i < dmem_len;) {
tmp32 = (readw(pr_to32) & 0x);
pr_to32 += 4;
tmp32 += ((readw(pr_to32) & 0x) << 16);
--
2.36.0
[PATCH V4 2/8] arm: dts: imx8m: update binman ddr firmware node name
From: Peng Fan
We are migrating to use BINMAN SYMBOLS, the current name is not
a valid binman type, so update to use blob-ext@[1,2,3,4].
Tested-by: Tim Harvey #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mm-u-boot.dtsi | 8
arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi | 4 ++--
arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi | 8
arch/arm/dts/imx8mn-venice-u-boot.dtsi| 8
arch/arm/dts/imx8mq-u-boot.dtsi | 8
5 files changed, 18 insertions(+), 18 deletions(-)
diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 9f66cdb65a9..5de55a2d80b 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -39,25 +39,25 @@
filename = "u-boot-spl.bin";
};
- 1d-imem {
+ imem_1d: blob-ext@1 {
filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>;
type = "blob-ext";
};
- 1d-dmem {
+ dmem_1d: blob-ext@2 {
filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>;
type = "blob-ext";
};
- 2d-imem {
+ imem_2d: blob-ext@3 {
filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>;
type = "blob-ext";
};
- 2d-dmem {
+ dmem_2d: blob-ext@4 {
filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <0x4000>;
type = "blob-ext";
diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
index 46a9d7fd78b..5a52b73d7e9 100644
--- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
+++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
@@ -111,13 +111,13 @@
filename = "u-boot-spl.bin";
};
- 1d-imem {
+ imem_1d: blob-ext@1 {
filename = "ddr3_imem_1d.bin";
size = <0x8000>;
type = "blob-ext";
};
- 1d_dmem {
+ dmem_1d: blob-ext@2 {
filename = "ddr3_dmem_1d.bin";
size = <0x4000>;
type = "blob-ext";
diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
index 6e37622cca7..001e725f568 100644
--- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
@@ -130,25 +130,25 @@
filename = "u-boot-spl.bin";
};
- 1d-imem {
+ blob_1: blob-ext@1 {
filename = "ddr4_imem_1d.bin";
size = <0x8000>;
type = "blob-ext";
};
- 1d_dmem {
+ blob_2: blob-ext@2 {
filename = "ddr4_dmem_1d.bin";
size = <0x4000>;
type = "blob-ext";
};
- 2d_imem {
+ blob_3: blob-ext@3 {
filename = "ddr4_imem_2d.bin";
size = <0x8000>;
type = "blob-ext";
};
- 2d_dmem {
+ blob_4: blob-ext@4 {
filename = "ddr4_dmem_2d.bin";
size = <0x4000>;
type = "blob-ext";
diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi
b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
index 35819553879..67922146963 100644
--- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
@@ -126,25 +126,25 @@
filename = "u-boot-spl.bin";
};
- 1d-imem {
+ imem_1d: blob-ext@1 {
filename = "lpddr4_pmu_train_1d_imem.bin";
size = <0x8000>;
type = "blob-ext";
};
- 1d_dmem {
+ dmem_1d: blob-ext@2 {
filename = "lpddr4_pmu_train_1d_dmem.bin";
size = <0x4000>;
type = "blob-ext";
};
- 2d_imem {
+ imem_2d: blob-ext@3 {
filename = "lpddr4_pmu_train_2d_imem.bin";
size = <0x8000>;
type = "blob-ext";
};
- 2d_dmem {
+ dmem_2d: blob-ext@4 {
filename = "lpddr4_pmu_train_2d_dmem.bin";
size = <
[PATCH V4 7/8] arm: dts: imx8m: shrink ddr firmware size to actual file size
From: Peng Fan
After we switch to use BINMAN_SYMBOLS, there is no need to pad
the file size to 0x8000 and 0x4000. After we use BINMAN_SYMBOLS,
the u-boot-spl-ddr.bin shrink about 36KB with i.MX8MP-EVK.
Tested-by: Tim Harvey #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mm-u-boot.dtsi | 8
arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi | 8
arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi | 8
arch/arm/dts/imx8mn-evk-u-boot.dtsi | 8
arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi | 8
arch/arm/dts/imx8mn-venice-u-boot.dtsi | 8
arch/arm/dts/imx8mp-u-boot.dtsi | 8
arch/arm/dts/imx8mq-cm-u-boot.dtsi | 8
arch/arm/dts/imx8mq-u-boot.dtsi | 8
9 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 5de55a2d80b..19a2da30f51 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -41,25 +41,25 @@
imem_1d: blob-ext@1 {
filename = "lpddr4_pmu_train_1d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};
dmem_1d: blob-ext@2 {
filename = "lpddr4_pmu_train_1d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};
imem_2d: blob-ext@3 {
filename = "lpddr4_pmu_train_2d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
type = "blob-ext";
};
dmem_2d: blob-ext@4 {
filename = "lpddr4_pmu_train_2d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
type = "blob-ext";
};
};
diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
index eb1dd8debba..e1740fa31a6 100644
--- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
@@ -149,22 +149,22 @@
blob_1: blob-ext@1 {
filename = "lpddr4_pmu_train_1d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
};
blob_2: blob-ext@2 {
filename = "lpddr4_pmu_train_1d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
};
blob_3: blob-ext@3 {
filename = "lpddr4_pmu_train_2d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
};
blob_4: blob-ext@4 {
filename = "lpddr4_pmu_train_2d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
};
};
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 4d0ecb07d4f..1fe2d0fd507 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -157,22 +157,22 @@
blob_1: blob-ext@1 {
filename = "ddr4_imem_1d_201810.bin";
- size = <0x8000>;
+ align-end = <4>;
};
blob_2: blob-ext@2 {
filename = "ddr4_dmem_1d_201810.bin";
- size = <0x4000>;
+ align-end = <4>;
};
blob_3: blob-ext@3 {
filename = "ddr4_imem_2d_201810.bin";
- size = <0x8000>;
+ align-end = <4>;
};
blob_4: blob-ext@4 {
filename = "ddr4_dmem_2d_201810.bin";
- size = <0x4000>;
+ align-end = <4>;
};
};
diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
index 3db46d4cbcb..4f6dcf307b2 100644
--- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
@@ -38,22 +38,22 @@
blob_1: blob-ext@1 {
filename = "lpddr4_pmu_train_1d_imem.bin";
- size = <0x8000>;
+ align-end = <4>;
};
blob_2: blob-ext@2 {
filename = "lpddr4_pmu_train_1d_dmem.bin";
- size = <0x4000>;
+ align-end = <4>;
};
blob_3: blob-ext@3 {
[PATCH V4 8/8] binman_sym: guard with CONFIG_SPL_BINMAN_SYMBOLS
From: Peng Fan There is case that CONFIG_BINMAN is defined, but CONFIG_SPL_BINMAN_SYMBOLS is not defined. In that case, there will be build failure. So use CONFIG_SPL_BINMAN_SYMBOLS to guard the macros, and define CONFIG_SPL_BINMAN_SYMBOLS in binman syms test. Tested-by: Tim Harvey #imx8m[m,n,p]-venice Signed-off-by: Peng Fan --- include/binman_sym.h| 2 +- tools/binman/test/u_boot_binman_syms.c | 1 + tools/binman/test/u_boot_binman_syms_size.c | 1 + 3 files changed, 3 insertions(+), 1 deletion(-) diff --git a/include/binman_sym.h b/include/binman_sym.h index 72e6765fe52..548d8f5654c 100644 --- a/include/binman_sym.h +++ b/include/binman_sym.h @@ -13,7 +13,7 @@ #define BINMAN_SYM_MISSING (-1UL) -#ifdef CONFIG_BINMAN +#ifdef CONFIG_SPL_BINMAN_SYMBOLS /** * binman_symname() - Internal function to get a binman symbol name diff --git a/tools/binman/test/u_boot_binman_syms.c b/tools/binman/test/u_boot_binman_syms.c index 37fc339ce84..f4a4d1f6846 100644 --- a/tools/binman/test/u_boot_binman_syms.c +++ b/tools/binman/test/u_boot_binman_syms.c @@ -6,6 +6,7 @@ */ #define CONFIG_BINMAN +#define CONFIG_SPL_BINMAN_SYMBOLS #include binman_sym_declare(unsigned long, u_boot_spl_any, offset); diff --git a/tools/binman/test/u_boot_binman_syms_size.c b/tools/binman/test/u_boot_binman_syms_size.c index 7224bc1863c..3a01d8ca4be 100644 --- a/tools/binman/test/u_boot_binman_syms_size.c +++ b/tools/binman/test/u_boot_binman_syms_size.c @@ -6,6 +6,7 @@ */ #define CONFIG_BINMAN +#define CONFIG_SPL_BINMAN_SYMBOLS #include binman_sym_declare(char, u_boot_spl, pos); -- 2.36.0
[PATCH 3/4] ARM: imx: imx31: Introduce and use UART_BASE_ADDR(n)
> Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base > address. Convert all board configurations to this new macro. This is the > first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a > clean up, no functional change. > The new macro contains compile-time test to verify N is in suitable > range. The test works such that it multiplies constant N by constant > double-negation of size of a non-empty structure, i.e. it multiplies > constant N by constant 1 in each successful compilation case. > The non-empty structure may contain C11 _Static_assert(), make use of > this and place the kernel variant of static assert in there, so that > it performs the compile-time check for N in the correct range. Note > that it is not possible to directly use static_assert in compound > statements, hence this convoluted construct. > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] board: gateworks: gw_ventana: add support for GPY111 PHY
> The MaxLinear GPY111 PHY is being used on some boards due to part > availability. Add support for this PHY which requires a longer reset > post-delay and RGMII delay configuration. > Signed-off-by: Tim Harvey Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 01/16] imx: imx8mn_evk: enable pinctrl_wdog in SPL
> From: Peng Fan > Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v6] bosch: Add initial board support for ACC
> The Bosch ACC (Air Center Control) Board is based on the i.MX6D. > The device tree is copied from Linux, see [1]. The only difference > compared to the Linux DT is the removal of usbphynop properties. They are > defined in the Linux version of imx6qdl.dtsi, but not in the u-boot > version. > [1] Commit 6192cf8ac082 from > git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 2/3] cgtqmx8: Enable cache in SPL
> From: Fabio Estevam > There is no reason for disabling I-cache and D-cache > in SPL. > > Remove the unneeded CONFIG_SPL_SYS_ICACHE_OFF and > CONFIG_SPL_SYS_DCACHE_OFF options. > Signed-off-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 4/8] ARM: imx6: Remove CONFIG_FEC_MXC_PHYADDR from DH header
> Use phy address from device tree instead of CONFIG_FEC_MXC_PHYADDR from > board header. This is required, because the DH picoITX and DRC02 boards > require different settings than PDK2. The corresponding 'phy-handle' > device tree properties are already there. > I tested this change on picoITX and DRC02, but on PDK2 it is untested. > Reviewed-by: Marek Vasut > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 02/16] imx: imx8mm_evk: enable pinctrl_wdog in SPL
> From: Peng Fan > Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 6/8] ARM: dts: imx: Configure FEC for iMX6QDL picoITX
> Add a u-boot dtsi for configuring the FEC node of the DH picoITX. > Reviewed-by: Marek Vasut > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] i.MX8ULP: add display_ele_fw_version api
> implement get f/w version api. > print ele f/w version in spl. > Signed-off-by: Gaurav Jain > Reviewed-by: Peng Fan > Reviewed-by: Pankaj Gupta Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 16/16] imx: toradex/verdin-imx8mm/p: cleanup board watchdog code
> From: Peng Fan > pinctrl_wdog already marked u-boot,dm-spl, so clean up board code. > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] imx8m: fix reading of DDR4 MR registers
> I was trying to employ lpddr4_mr_read() to something similar to what > the imx8mm-cl-iot-gate board is doing for auto-detecting the RAM > type. However, the version in drivers/ddr/imx/imx8m/ddrphy_utils.c > differs from the private one used by that board in how it extracts the > byte value, and I was only getting zeroes. Adding a bit of debug > printf'ing gives me > tmp = 0x0000 > tmp = 0x00070700 > tmp = 0x > tmp = 0x00101000 > and indeed I was expecting a (combined) value of 0xff070010 (0xff > being Manufacturer ID for Micron). I can't find any documentation that > says how the values are supposed to be read, but clearly the iot-gate > definition is the right one, both for its use case as well as my > imx8mp-based board. > So lift the private definition of lpddr4_mr_read() from the > imx8mm-cl-iot-gate board code to ddrphy_utils.c, and add a declaration > in the ddr.h header where e.g. get_trained_CDD() is already declared. > This has only been compile-tested for the imx8mm-cl-iot-gate > board (since I don't have the hardware), but since I've merely moved > its definition of lpddr4_mr_read(), I'd be surprised if it changed > anything for that board. > Signed-off-by: Rasmus Villemoes > Tested-by: Ying-Chun Liu (PaulLiu) > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v3 1/2] imx8mn_ddr4_evk: Add USB Mass Storage support
> From: Fabio Estevam > Add USB Mass Storage support, which is a convenient way to flash > the eMMC card, for example. > Signed-off-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 1/8] ARM: imx6: Fix broken DT path in DH board file
> In the DH electronics iMX6 board file fix the outdated eeprom path by > using a DT label instead. > The label has been newly created for all iMX6QDL DHCOM boards. > Reviewed-by: Marek Vasut > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 13/14] imx: imx8mq-pico: enable CONFIG_DM_SERIAL
> From: Peng Fan > Marked related nodes as u-boot,dm-spl for serial driver model > Enable CONFIG_DM_SERIAL > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] board: gateworks: gw_ventana: remove obsolete file
> commit 61cf22505339 ("board: gateworks: gw_ventana: use comomn GSC driver")
> moved to the common GSC driver and moved remaining board-specific
> functions to eeprom.c. The functions in gsc.c are no longer used and it
> was removed from the Makefile but the file itself was not removed.
> Remove it now.
> Signed-off-by: Tim Harvey
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH 2/2] mx6sllevk: Remove duplicated "mmc dev" command
> From: Fabio Estevam
> The "mmc dev ${mmcdev}" command is done twice.
> Remove one ocurrence to avoid the duplication.
> Signed-off-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH 2/4] ARM: imx: imx27: Introduce and use UART_BASE_ADDR(n)
> Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base > address. Convert all board configurations to this new macro. This is the > first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a > clean up, no functional change. > The new macro contains compile-time test to verify N is in suitable > range. The test works such that it multiplies constant N by constant > double-negation of size of a non-empty structure, i.e. it multiplies > constant N by constant 1 in each successful compilation case. > The non-empty structure may contain C11 _Static_assert(), make use of > this and place the kernel variant of static assert in there, so that > it performs the compile-time check for N in the correct range. Note > that it is not possible to directly use static_assert in compound > statements, hence this convoluted construct. > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] ARM: dts: imx: Use 100 kHz I2C2 on Data Modul i.MX8M Mini eDM SBC
> The I2C2 has SMBus device SMSC USB2514Bi connected to it, the device is > capable of up to 100 kHz operation. Reduce the bus frequency to 100 kHz > to guarantee this I2C device can work correctly. > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 10/16] imx: imx8mn_smm_s2: clean up board watchdog code
> From: Peng Fan > pinctrl_wdog already marked u-boot,dm-spl, so clean up board code. > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan > Tested-by: Ariel D'Alessandro Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] configs: imx8mp_venice: add FEC_QUIRK_ENET_MAC
> The IMX8MP SoC FEC needs to have the FEC_QUIRK_ENET_MAC defined.
> Fixes: commit 2395625209cc ("board: gateworks: venice: add
> imx8mp-venice-gw740x support")
> Signed-off-by: Tim Harvey
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH V2 09/14] imx: imx8mm_edm_sbc: Enable SPL_DM_SERIAL
> From: Peng Fan > Enable CONFIG_SPL_DM_SERIAL. uart and its pinmux was already > marked with u-boot,dm-spl. > Move preloader_console_init after spl_early_init to make sure driver > model work. > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 3/4] imx: bootaux: get stack from elf file
> From: Peng Fan > To i.MX8, M core stack is pre-coded in source code, so need to get it > before kicking M core. The stack pointer is stored in the first word of > the first PT_LOAD section __isr_vector. So use a num to index the > section loading. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v2 7/8] ARM: dts: imx: Configure FEC for iMX6QDL DRC02
> Add a u-boot dtsi for configuring the FEC node of the DH DRC02. > Reviewed-by: Marek Vasut > Signed-off-by: Philip Oberfichtner Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 4/4] imx: imx8m: add rproc_att
> From: Peng Fan > With rpoc_att, bootaux able to kick elf file for M core > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH] board: gateworks: venice: enable SPL_DM_SERIAL
> The uart2 and its pinmux are already marked with u-boot,dm-spl but we > need to move the call to preloader_console_init() after spl_early_init() > to avoid a board hang as dm can't be used until after spl_early_init() > due to the uart driver not enabling the uart clock. > Remove the manual config of the UART pinmux now that it is no longer > needed. > Signed-off-by: Tim Harvey Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v1] ARM: imx8mm: verdin-imx8mm: fix board hang in spl
> From: Marcel Ziswiler
> Move the preloader_console_init() call after spl_early_init() to avoid
> board hang in SPL.
> While at it remove explicit in-code console/debug UART pinmuxing (uart1
> and its pinmuxing are already marked as u-boot,dm-spl via device tree).
> Fixes: 4551e1898769 ("configs: verdin-imx8mm: verdin-imx8mp: enable dm
> serial")
> Signed-off-by: Marcel Ziswiler
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH V2 03/16] imx: imx8mp_evk: enable pinctrl_wdog in SPL
> From: Peng Fan > Mark pinctrl_wdog as u-boot,dm-spl to clean up board code, > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V4 3/5] arm: mach-imx: cmd_nandbcb fix bad block handling
> The badblock should be skipped properly in reading and writing. > Fix the logic. The bcb struct is written, skipping the bad block, > so we need to read using the same logic. This was tested create > bad block in the area and then flash it and read it back. > Acked-by: Han Xu > Tested-By: Tim Harvey > Signed-off-by: Michael Trimarchi Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 1/4] ARM: imx: imx8m: Introduce and use UART_BASE_ADDR(n)
> Introduce helper macro UART_BASE_ADDR(n), which returns Nth UART base > address. Convert all board configurations to this new macro. This is the > first step toward switching CONFIG_MXC_UART_BASE to Kconfig. This is a > clean up, no functional change. > The new macro contains compile-time test to verify N is in suitable > range. The test works such that it multiplies constant N by constant > double-negation of size of a non-empty structure, i.e. it multiplies > constant N by constant 1 in each successful compilation case. > The non-empty structure may contain C11 _Static_assert(), make use of > this and place the kernel variant of static assert in there, so that > it performs the compile-time check for N in the correct range. Note > that it is not possible to directly use static_assert in compound > statements, hence this convoluted construct. > Signed-off-by: Marek Vasut > Cc: Fabio Estevam > Cc: Peng Fan > Cc: Stefano Babic Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH 1/2] mx6slevk: Remove duplicated "mmc dev" command
> From: Fabio Estevam
> The "mmc dev ${mmcdev}" command is done twice.
> Remove one ocurrence to avoid the duplication.
> Signed-off-by: Fabio Estevam
Applied to u-boot-imx, master, thanks !
Best regards,
Stefano Babic
--
=
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de
=
[PATCH V2 03/14] imx: imx8mm_mx8menlo: Enable DM_SERIAL
> From: Peng Fan > Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already > marked with u-boot,dm-spl. > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V4 1/5] nand: raw: mxs_nand: Fix specific hook registration
> Move the hook after nand_scan_tail is called. The hook must be replaced > to the mxs specific one but those must to be assignment later in the > probe function. > With this fix markbad is working again. Before this change: > nand markbad 0xDEC00 > NXS NAND: Writing OOB isn't supported > NXS NAND: Writing OOB isn't supported > block 0x000dec00 NOT marked as bad! ERROR 0 > Cc: Han Xu > Cc: Fabio Estevam > Acked-by: Han Xu > Tested-By: Tim Harvey > Signed-off-by: Michael Trimarchi Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 01/14] imx: imx8mp_rsb3720a1: convert to DM_SERIAL
> From: Peng Fan > Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already > marked with u-boot,dm-spl. > Signed-off-by: Peng Fan > Reviewed-by: Fabio Estevam Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH V2 15/16] imx: verdin-imx8mm/p: cleanup board watchdog code
> From: Peng Fan > pinctrl_wdog already marked u-boot,dm-spl, so clean up board code. > The set_wdog_reset() function is not necessary as this is handled by > the imx_watchdog.c driver due to the 'fsl,ext-reset-output' property > being set. > Signed-off-by: Peng Fan Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
