[U-Boot] Pull request: u-boot-rockchip-20191026
Hi Tom, Please pull the rockchip update: - Add support for rockchip pmic rk805,rk809, rk816, rk817 - Add rk3399 board Leez support - Fix bug in rk3328 ram driver - Adapt SPL to support ATF bl31 with entry at 0x4 Travis: https://travis-ci.org/keveryang/u-boot/builds/601718633 Thanks, - Kever The following changes since commit 15147dc6a96697880cf355ed9df127bd8c896f2c: Merge branch '2019-10-24-ti-imports' (2019-10-25 17:33:28 -0400) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip.git tags/u-boot-rockchip-20191026 for you to fetch changes up to a8a09d078d5e17873754b33dc5d15858d2cb2605: rockchip: firefly-rk3288: Enable TPL support (2019-10-26 16:05:02 +0800) Andy Yan (1): rockchip: rk3399: Add Leez P710 support Elaine Zhang (3): power: regulator: rk8xx: update the driver for rk808 and rk818 power: pmic: rk816: support rk816 pmic power: pmic: rk805: support rk805 pmic Emmanuel Vadot (1): rockchip: dts: rk3328: rock64: Add same-as-spl order Heiko Stuebner (1): rockchip: make_fit_atf.py: allow inclusion of a tee binary Joseph Chen (4): dm: regulator: support regulator more state power: pmic: rk817: support rk817 pmic power: pmic: rk809: support rk809 pmic common: spl: atf: support booting bl32 image Kever Yang (6): rockchip: rk3399: defconfig: no need to reserve IRAM for SPL rockchip: rk3328: defconfig: no need to reserve IRAM for SPL rockchip: evb-px5: defconfig: no need to reserve IRAM for SPL rockchip: rk3399: update SPL_STACK_R_ADDR rockchip: config: update CONFIG_SPL_MAX_SIZE for 64bit CPUs rockchip: firefly-rk3288: Enable TPL support Levin Du (1): rockchip: adding the missing "/" in entries of boot_devices Simon South (3): clk: rockchip: rk3328: Configure CPU clock ram: rk3328: Use correct frequency units in function ram: rk3328: Fix loading of skew values arch/arm/dts/Makefile| 1 + arch/arm/dts/rk3328-rock64-u-boot.dtsi | 5 + arch/arm/dts/rk3399-leez-p710-u-boot.dtsi| 13 + arch/arm/dts/rk3399-leez-p710.dts| 645 arch/arm/include/asm/arch-rockchip/cru_rk3328.h | 3 + arch/arm/mach-rockchip/make_fit_atf.py | 52 +- arch/arm/mach-rockchip/rk3188/rk3188.c | 4 +- arch/arm/mach-rockchip/rk322x/rk322x.c | 4 +- arch/arm/mach-rockchip/rk3288/Kconfig| 1 + arch/arm/mach-rockchip/rk3288/rk3288.c | 4 +- arch/arm/mach-rockchip/rk3328/rk3328.c | 4 +- arch/arm/mach-rockchip/rk3368/rk3368.c | 4 +- arch/arm/mach-rockchip/rk3399/Kconfig| 3 + board/rockchip/evb_rk3399/MAINTAINERS| 6 + common/spl/spl_atf.c | 49 +- configs/chromebook_bob_defconfig | 1 - configs/evb-px5_defconfig| 1 - configs/evb-rk3328_defconfig | 1 - configs/evb-rk3399_defconfig | 2 - configs/ficus-rk3399_defconfig | 1 - configs/firefly-rk3288_defconfig | 5 +- configs/firefly-rk3399_defconfig | 2 - configs/khadas-edge-captain-rk3399_defconfig | 2 - configs/khadas-edge-rk3399_defconfig | 2 - configs/khadas-edge-v-rk3399_defconfig | 2 - configs/leez-rk3399_defconfig| 56 ++ configs/nanopc-t4-rk3399_defconfig | 2 - configs/nanopi-m4-rk3399_defconfig | 2 - configs/nanopi-neo4-rk3399_defconfig | 2 - configs/orangepi-rk3399_defconfig| 2 - configs/puma-rk3399_defconfig| 1 - configs/roc-rk3399-pc_defconfig | 2 - configs/rock-pi-4-rk3399_defconfig | 2 - configs/rock64-rk3328_defconfig | 1 - configs/rock960-rk3399_defconfig | 1 - configs/rockpro64-rk3399_defconfig | 2 - doc/device-tree-bindings/regulator/regulator.txt | 27 + drivers/clk/rockchip/clk_rk3328.c| 2 + drivers/power/pmic/rk8xx.c | 89 ++- drivers/power/regulator/regulator-uclass.c | 70 ++ drivers/power/regulator/rk8xx.c | 939 +-- drivers/ram/rockchip/sdram_rk3328.c | 6 +- include/configs/rk3328_common.h | 2 +- include/configs/rk3368_common.h | 2 +- include/configs/rk3399_common.h | 2 +- include/power/regulator.h| 64 ++ include/power/rk8xx_pmic.h | 42 + test/dm/regulator.c | 57 ++ 48 files changed, 2034 insertions(+), 158 deletions(-) create mode 100644 arch/arm/dt
Re: [U-Boot] [PATCH 0/9] phy: atheros: cleanup and device tree bindings
Hi Adam, Am 2019-10-26 05:28, schrieb Adam Ford: On Fri, Oct 25, 2019 at 10:20 PM Adam Ford wrote: On Fri, Oct 25, 2019 at 7:27 PM Michael Walle wrote: > > This series cleans up the Atheros PHY AR803x PHY driver and adds a > device tree binding for the most commonly used PHY settings like clock > output. > > If you're a board maintainer you're getting this mail because you probably > use an AR803x PHY on your board. Please have a look at your board specific > code and see if you can use the device tree bindings instead. Let me know, > if something is missing. Thank you for this! I was able to remove board_phy_config and the supporting ar8031_phy_fixup functions to a total of nearly 30 lines of code. Please disregard my comment. From a cold boot, I cannot remove these lines. Thank you for testing though. I guess your network drivers needs something like that: https://patchwork.ozlabs.org/patch/1184523/ So here is a cheap shot (very hacky, doesn't work with CONFIG_FEC_MXC_PHYADDR, completely untested, not even compiled ;). Could you try that? I need to add some debug messages to the Atheros PHY driver, so one could see if the device tree binding is working correctly. --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -1264,7 +1264,7 @@ static const struct eth_ops fecmxc_ops = { .read_rom_hwaddr= fecmxc_read_rom_hwaddr, }; -static int device_get_phy_addr(struct udevice *dev) +static int device_get_phy_addr(struct udevice *dev, struct ofnode *phy_node) { struct ofnode_phandle_args phandle_args; int reg; @@ -1276,6 +1276,7 @@ static int device_get_phy_addr(struct udevice *dev) } reg = ofnode_read_u32_default(phandle_args.node, "reg", 0); + phy_node = &phandle_args.node; return reg; } @@ -1284,8 +1285,9 @@ static int fec_phy_init(struct fec_priv *priv, struct udevice *dev) { struct phy_device *phydev; int addr; + ofnode *phy_node; - addr = device_get_phy_addr(dev); + addr = device_get_phy_addr(dev, &phy_node); #ifdef CONFIG_FEC_MXC_PHYADDR addr = CONFIG_FEC_MXC_PHYADDR; #endif @@ -1294,6 +1296,7 @@ static int fec_phy_init(struct fec_priv *priv, struct udevice *dev) if (!phydev) return -ENODEV; + phydev->node = phy_node; priv->phydev = phydev; phy_config(phydev); -michael ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 0/3] End of the MTD makefile cleanup
On Fri, Oct 25, 2019 at 11:09 PM Miquel Raynal wrote: > > As rightfully pointed by Jagan, I should have dropped the dependency > of cmd/sf.c and cmd/nand.c on mtd_uboot.c in patch 24/26 of the "MTD > defconfigs/Kconfigs/Makefiles heavy cleanup" v5 series. > > Instead of sending the 40 patches again, here are only the last three > patches with: > * patch 1 (24/26) being corrected as per Jagan's comment > * patch 2 (25/26) is untouched > * patch 3 (26/26) is almost untouched but I had to resolve a conflict > due to patch 1. > > Thanks, > Miquèl > > Miquel Raynal (3): > cmd: nand/sf: isolate legacy code > cmd: make MTD commands depend on MTD > mtd: Makefile: deep cleanup Reviewed-by: Jagan Teki ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] RK3399 NanoPI-M4 boot issues
On Fri, Oct 25, 2019 at 5:02 PM robert wrote: > > I'm trying to build a linux from source on a RK3399 nanopi-m4. I did the > below steps: > > *### Download and compile ARM-TF ### > *$ git clone https://github.com/ARM-software/arm-trusted-firmware.git > $ make CROSS_COMPILE=aarch64-linux-gnu- PLAT=rk3399 bl31 > > *### Download and complie U-Boot ### > *$ cd .. > $ git clone https://gitlab.denx.de/u-boot/u-boot.git > $ cd u-boot/ > $ git checkout v2019.10 > $ make CROSS_COMPILE=arm-linux-gnueabi- nanopi-m4-rk3399_defconfig > $ cp ../arm-trusted-firmware/build/rk3399/release/bl31/bl31.elf . > $ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- > $ make ARCH=arm CROSS_COMPILE=aarch64-linux-gnu- u-boot.itb > $ ./tools/mkimage -n rk3399 -T rksd -d ./tpl/u-boot-tpl-dtb.bin > idbloader.img > Image Type: Rockchip RK33 (SD/MMC) boot image > Data Size:47104 bytes > $ cat spl/u-boot-spl-dtb.bin >> idbloader.img You missed to set BL31 for bl31.elf and toolchain would be arm64 for u-boot. Flashing: ./tools/mkimage -n rk3399 -T rksd -d ./tpl/u-boot-tpl-dtb.bin out cat ./spl/u-boot-spl-dtb.bin >> out sudo dd if=out of=/dev/sda seek=64; sudo dd if=u-boot.itb of=/dev/sda seek=16384 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 00/29] Add the SPI DM support for PPC
Add the SPI DM support for PPC. depends on: http://patchwork.ozlabs.org/project/uboot/list/?series=127282 Xiaowei Bao (29): dts: P1020: Add ESPI DT nodes dts: P1020RDB: Add ESPI slave device node configs: P1020RDB: Enable ESPI driver dts: P2020: Add ESPI DT nodes dts: P2020RDB: Add ESPI slave device node configs: P2020RDB: Enable ESPI driver dts: P2041: Add ESPI DT nodes dts: P2041RDB: Add ESPI slave device node configs: P2041RDB: Enable ESPI driver dts: P3041: Add ESPI DT nodes dts: P3041DS: Add ESPI slave device node configs: P3041DS: Enable ESPI driver dts: P4080: Add ESPI DT nodes dts: P4080DS: Add ESPI slave device node configs: P4080DS: Enable ESPI driver dts: P5040: Add ESPI DT nodes dts: P5040DS: Add ESPI slave device node configs: P5040DS: Enable ESPI driver dts: T102x: Add ESPI DT nodes dts: T1024RDB: Add ESPI slave device node configs: T1024RDB: Enable ESPI driver dts: T104x: Add ESPI DT nodes dts: T1042D4RDB: Add ESPI slave device node configs: T1042D4RDB: Enable ESPI driver dts: T2080RDB: Add ESPI slave device node configs: T2080RDB: Enable ESPI driver dts: T4240: Add ESPI DT nodes dts: T4240RDB: Add ESPI slave device node configs: T4240RDB: Enable ESPI driver arch/powerpc/dts/p1020-post.dtsi | 9 + arch/powerpc/dts/p1020rdb-pc.dts | 15 +++ arch/powerpc/dts/p1020rdb-pc_36b.dts | 15 +++ arch/powerpc/dts/p1020rdb-pd.dts | 15 +++ arch/powerpc/dts/p2020-post.dtsi | 9 + arch/powerpc/dts/p2020rdb-pc.dts | 15 +++ arch/powerpc/dts/p2020rdb-pc_36b.dts | 15 +++ arch/powerpc/dts/p2041.dtsi | 9 + arch/powerpc/dts/p2041rdb.dts| 14 ++ arch/powerpc/dts/p3041.dtsi | 9 + arch/powerpc/dts/p3041ds.dts | 14 ++ arch/powerpc/dts/p4080.dtsi | 9 + arch/powerpc/dts/p4080ds.dts | 14 ++ arch/powerpc/dts/p5040.dtsi | 9 + arch/powerpc/dts/p5040ds.dts | 14 ++ arch/powerpc/dts/t1024rdb.dts| 15 +++ arch/powerpc/dts/t102x.dtsi | 9 + arch/powerpc/dts/t1042d4rdb.dts | 15 +++ arch/powerpc/dts/t104x.dtsi | 9 + arch/powerpc/dts/t2080rdb.dts| 15 +++ arch/powerpc/dts/t4240.dtsi | 9 + arch/powerpc/dts/t4240rdb.dts| 15 +++ configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_defconfig | 2 ++ configs/P1020RDB-PC_NAND_defconfig | 2 ++ configs/P1020RDB-PC_SDCARD_defconfig | 2 ++ configs/P1020RDB-PC_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PC_defconfig| 2 ++ configs/P1020RDB-PD_NAND_defconfig | 2 ++ configs/P1020RDB-PD_SDCARD_defconfig | 2 ++ configs/P1020RDB-PD_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PD_defconfig| 2 ++ configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_defconfig | 2 ++ configs/P2020RDB-PC_NAND_defconfig | 2 ++ configs/P2020RDB-PC_SDCARD_defconfig | 2 ++ configs/P2020RDB-PC_SPIFLASH_defconfig | 2 ++ configs/P2020RDB-PC_defconfig| 2 ++ configs/P2041RDB_NAND_defconfig | 2 ++ configs/P2041RDB_SDCARD_defconfig| 2 ++ configs/P2041RDB_SPIFLASH_defconfig | 2 ++ configs/P2041RDB_defconfig | 2 ++ configs/P3041DS_NAND_defconfig | 2 ++ configs/P3041DS_SDCARD_defconfig | 2 ++ configs/P3041DS_SPIFLASH_defconfig | 2 ++ configs/P3041DS_defconfig| 2 ++ configs/P4080DS_SDCARD_defconfig | 2 ++ configs/P4080DS_SPIFLASH_defconfig | 2 ++ configs/P4080DS_defconfig| 2 ++ configs/P5040DS_NAND_defconfig | 2 ++ configs/P5040DS_SDCARD_defconfig | 2 ++ configs/P5040DS_SPIFLASH_defconfig | 2 ++ configs/P5040DS_defconfig| 2 ++ configs/T1024RDB_NAND_defconfig | 2 ++ configs/T1024RDB_SDCARD_defconfig| 2 ++ configs/T1024RDB_SPIFLASH_defconfig | 2 ++ configs/T1024RDB_defconfig | 2 ++ configs/T1042D4RDB_NAND_defconfig| 2 ++ configs/T1042D4RDB_SDCARD_defconfig | 2 ++ configs/T1042D4RDB_SPIFLASH_defconfig| 2 ++ configs/T1042D4RDB_defconfig | 2 ++ configs
[U-Boot] [PATCH 02/29] dts: P1020RDB: Add ESPI slave device node
Add ESPI slave node for P1020RDB. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p1020rdb-pc.dts | 15 +++ arch/powerpc/dts/p1020rdb-pc_36b.dts | 15 +++ arch/powerpc/dts/p1020rdb-pd.dts | 15 +++ 3 files changed, 45 insertions(+) diff --git a/arch/powerpc/dts/p1020rdb-pc.dts b/arch/powerpc/dts/p1020rdb-pc.dts index 7ebaa61..4193af1 100644 --- a/arch/powerpc/dts/p1020rdb-pc.dts +++ b/arch/powerpc/dts/p1020rdb-pc.dts @@ -30,6 +30,21 @@ ranges = <0x0100 0x0 0x 0x0 0xffc0 0x0 0x0001 /* downstream I/O */ 0x0200 0x0 0x8000 0x0 0x8000 0x0 0x2000>; /* non-prefetchable memory */ }; + + aliases { + spi0 = &espi0; + }; }; /include/ "p1020-post.dtsi" + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; +}; diff --git a/arch/powerpc/dts/p1020rdb-pc_36b.dts b/arch/powerpc/dts/p1020rdb-pc_36b.dts index c0e5ef4..5a20e60 100644 --- a/arch/powerpc/dts/p1020rdb-pc_36b.dts +++ b/arch/powerpc/dts/p1020rdb-pc_36b.dts @@ -30,6 +30,21 @@ ranges = <0x0100 0x0 0x 0xf 0xffc0 0x0 0x0001 /* downstream I/O */ 0x0200 0x0 0x8000 0xc 0x 0x0 0x2000>; /* non-prefetchable memory */ }; + + aliases { + spi0 = &espi0; + }; }; /include/ "p1020-post.dtsi" + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; +}; diff --git a/arch/powerpc/dts/p1020rdb-pd.dts b/arch/powerpc/dts/p1020rdb-pd.dts index 21174a0..6e319f0 100644 --- a/arch/powerpc/dts/p1020rdb-pd.dts +++ b/arch/powerpc/dts/p1020rdb-pd.dts @@ -30,6 +30,21 @@ ranges = <0x0100 0x0 0x 0x0 0xffc0 0x0 0x0001 /* downstream I/O */ 0x0200 0x0 0x8000 0x0 0x8000 0x0 0x2000>; /* non-prefetchable memory */ }; + + aliases { + spi0 = &espi0; + }; }; /include/ "p1020-post.dtsi" + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; +}; -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 20/29] dts: T1024RDB: Add ESPI slave device node
Add ESPI slave node for T1024RDB. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/t1024rdb.dts | 15 +++ 1 file changed, 15 insertions(+) diff --git a/arch/powerpc/dts/t1024rdb.dts b/arch/powerpc/dts/t1024rdb.dts index 19a6652..5a45b1b 100644 --- a/arch/powerpc/dts/t1024rdb.dts +++ b/arch/powerpc/dts/t1024rdb.dts @@ -14,4 +14,19 @@ #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; + + aliases { + spi0 = &espi0; + }; +}; + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; }; -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 03/29] configs: P1020RDB: Enable ESPI driver
Enable the DM ESPI driver in P1020RDB defconfig. Signed-off-by: Xiaowei Bao --- configs/P1020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PC_36BIT_defconfig | 2 ++ configs/P1020RDB-PC_NAND_defconfig | 2 ++ configs/P1020RDB-PC_SDCARD_defconfig | 2 ++ configs/P1020RDB-PC_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PC_defconfig| 2 ++ configs/P1020RDB-PD_NAND_defconfig | 2 ++ configs/P1020RDB-PD_SDCARD_defconfig | 2 ++ configs/P1020RDB-PD_SPIFLASH_defconfig | 2 ++ configs/P1020RDB-PD_defconfig| 2 ++ 12 files changed, 24 insertions(+) diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index ba4229e..b2525f4 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -46,6 +46,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 883c4d9..ca97aef 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -42,6 +42,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index 4ec953a..7a51d0a 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -43,6 +43,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig index 9ce12c5..502da07 100644 --- a/configs/P1020RDB-PC_36BIT_defconfig +++ b/configs/P1020RDB-PC_36BIT_defconfig @@ -31,6 +31,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc_36b" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index 705bc71..56d4737 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -45,6 +45,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index e7407aa..7e8a8d0 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -41,6 +41,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 99457cb..cf0ae98 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -42,6 +42,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig index 9158fef..bdaa262 100644 --- a/configs/P1020RDB-PC_defconfig +++ b/configs/P1020RDB-PC_defconfig @@ -30,6 +30,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pc" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 835cbd8..e320828 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -48,6 +48,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p1020rdb-pd" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index a07c46d..ba35671 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -44,6 +44,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE=
[U-Boot] [PATCH 01/29] dts: P1020: Add ESPI DT nodes
Add ESPI controller DT node for P1020. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p1020-post.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/dts/p1020-post.dtsi b/arch/powerpc/dts/p1020-post.dtsi index 1e5e678..efb104f 100644 --- a/arch/powerpc/dts/p1020-post.dtsi +++ b/arch/powerpc/dts/p1020-post.dtsi @@ -24,6 +24,15 @@ single-cpu-affinity; last-interrupt-source = <255>; }; + + espi0: spi@7000 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7000 0x1000>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; }; /* PCIe controller base address 0x9000 */ -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 11/29] dts: P3041DS: Add ESPI slave device node
Add ESPI slave node for P3041DS. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p3041ds.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/powerpc/dts/p3041ds.dts b/arch/powerpc/dts/p3041ds.dts index c30bf7a..5d1bac2 100644 --- a/arch/powerpc/dts/p3041ds.dts +++ b/arch/powerpc/dts/p3041ds.dts @@ -15,4 +15,18 @@ #size-cells = <2>; interrupt-parent = <&mpic>; + aliases { + spi0 = &espi0; + }; +}; + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; }; -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 15/29] configs: P4080DS: Enable ESPI driver
Enable the DM ESPI driver in P4080DS defconfig. Signed-off-by: Xiaowei Bao --- configs/P4080DS_SDCARD_defconfig | 2 ++ configs/P4080DS_SPIFLASH_defconfig | 2 ++ configs/P4080DS_defconfig | 2 ++ 3 files changed, 6 insertions(+) diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig index b412e4f..fb52aea 100644 --- a/configs/P4080DS_SDCARD_defconfig +++ b/configs/P4080DS_SDCARD_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p4080ds" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig index e5e0eb2..f56cbd5 100644 --- a/configs/P4080DS_SPIFLASH_defconfig +++ b/configs/P4080DS_SPIFLASH_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p4080ds" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig index a9a90e4..053a66f 100644 --- a/configs/P4080DS_defconfig +++ b/configs/P4080DS_defconfig @@ -27,6 +27,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p4080ds" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 13/29] dts: P4080: Add ESPI DT nodes
Add ESPI controller DT node for P4080. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p4080.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/dts/p4080.dtsi b/arch/powerpc/dts/p4080.dtsi index ab76680..2c27897 100644 --- a/arch/powerpc/dts/p4080.dtsi +++ b/arch/powerpc/dts/p4080.dtsi @@ -79,6 +79,15 @@ device_type = "open-pic"; clock-frequency = <0x0>; }; + + espi0: spi@11 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11 0x1000>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; }; pcie@ffe20 { -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 08/29] dts: P2041RDB: Add ESPI slave device node
Add ESPI slave node for P2041RDB. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p2041rdb.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/powerpc/dts/p2041rdb.dts b/arch/powerpc/dts/p2041rdb.dts index 6e9d9c0..505c74d 100644 --- a/arch/powerpc/dts/p2041rdb.dts +++ b/arch/powerpc/dts/p2041rdb.dts @@ -15,4 +15,18 @@ #size-cells = <2>; interrupt-parent = <&mpic>; + aliases { + spi0 = &espi0; + }; +}; + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; }; -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 16/29] dts: P5040: Add ESPI DT nodes
Add ESPI controller DT node for P5040. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p5040.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/dts/p5040.dtsi b/arch/powerpc/dts/p5040.dtsi index 8ab123d..1facd9b 100644 --- a/arch/powerpc/dts/p5040.dtsi +++ b/arch/powerpc/dts/p5040.dtsi @@ -58,6 +58,15 @@ device_type = "open-pic"; clock-frequency = <0x0>; }; + + espi0: spi@11 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11 0x1000>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; }; pcie@ffe20 { -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 18/29] configs: P5040DS: Enable ESPI driver
Enable the DM ESPI driver in P5040DS defconfig. Signed-off-by: Xiaowei Bao --- configs/P5040DS_NAND_defconfig | 2 ++ configs/P5040DS_SDCARD_defconfig | 2 ++ configs/P5040DS_SPIFLASH_defconfig | 2 ++ configs/P5040DS_defconfig | 2 ++ 4 files changed, 8 insertions(+) diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig index 47a230c..7c5cede 100644 --- a/configs/P5040DS_NAND_defconfig +++ b/configs/P5040DS_NAND_defconfig @@ -29,6 +29,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p5040ds" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig index 719c8b4..a1737f8 100644 --- a/configs/P5040DS_SDCARD_defconfig +++ b/configs/P5040DS_SDCARD_defconfig @@ -29,6 +29,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p5040ds" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig index 3912dc9..c796880 100644 --- a/configs/P5040DS_SPIFLASH_defconfig +++ b/configs/P5040DS_SPIFLASH_defconfig @@ -29,6 +29,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p5040ds" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig index f922521..4b37b00 100644 --- a/configs/P5040DS_defconfig +++ b/configs/P5040DS_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p5040ds" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 12/29] configs: P3041DS: Enable ESPI driver
Enable the DM ESPI driver in P3041DS defconfig. Signed-off-by: Xiaowei Bao --- configs/P3041DS_NAND_defconfig | 2 ++ configs/P3041DS_SDCARD_defconfig | 2 ++ configs/P3041DS_SPIFLASH_defconfig | 2 ++ configs/P3041DS_defconfig | 2 ++ 4 files changed, 8 insertions(+) diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig index 0bdd2ab..d587a9c 100644 --- a/configs/P3041DS_NAND_defconfig +++ b/configs/P3041DS_NAND_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p3041ds" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig index 4d76efd..98267fb 100644 --- a/configs/P3041DS_SDCARD_defconfig +++ b/configs/P3041DS_SDCARD_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p3041ds" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig index 8b5e13d..8b2f973 100644 --- a/configs/P3041DS_SPIFLASH_defconfig +++ b/configs/P3041DS_SPIFLASH_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p3041ds" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig index 96297df..af4a6f5 100644 --- a/configs/P3041DS_defconfig +++ b/configs/P3041DS_defconfig @@ -27,6 +27,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p3041ds" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 07/29] dts: P2041: Add ESPI DT nodes
Add ESPI controller DT node for P2041. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p2041.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/dts/p2041.dtsi b/arch/powerpc/dts/p2041.dtsi index 55f7adc..0de3c79 100644 --- a/arch/powerpc/dts/p2041.dtsi +++ b/arch/powerpc/dts/p2041.dtsi @@ -59,6 +59,15 @@ device_type = "open-pic"; clock-frequency = <0x0>; }; + + espi0: spi@11 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11 0x1000>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; }; pcie@ffe20 { -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 17/29] dts: P5040DS: Add ESPI slave device node
Add ESPI slave node for P5040DS. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p5040ds.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/powerpc/dts/p5040ds.dts b/arch/powerpc/dts/p5040ds.dts index 723d31d..0e1308a 100644 --- a/arch/powerpc/dts/p5040ds.dts +++ b/arch/powerpc/dts/p5040ds.dts @@ -15,4 +15,18 @@ #size-cells = <2>; interrupt-parent = <&mpic>; + aliases { + spi0 = &espi0; + }; +}; + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; }; -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 28/29] dts: T4240RDB: Add ESPI slave device node
Add ESPI slave node for T4240RDB. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/t4240rdb.dts | 15 +++ 1 file changed, 15 insertions(+) diff --git a/arch/powerpc/dts/t4240rdb.dts b/arch/powerpc/dts/t4240rdb.dts index f67d7ce..635065a 100644 --- a/arch/powerpc/dts/t4240rdb.dts +++ b/arch/powerpc/dts/t4240rdb.dts @@ -14,4 +14,19 @@ #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; + + aliases { + spi0 = &espi0; + }; +}; + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; }; -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 14/29] dts: P4080DS: Add ESPI slave device node
Add ESPI slave node for P4080DS. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p4080ds.dts | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/powerpc/dts/p4080ds.dts b/arch/powerpc/dts/p4080ds.dts index 15a0f66..62a0f98 100644 --- a/arch/powerpc/dts/p4080ds.dts +++ b/arch/powerpc/dts/p4080ds.dts @@ -15,4 +15,18 @@ #size-cells = <2>; interrupt-parent = <&mpic>; + aliases { + spi0 = &espi0; + }; +}; + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; }; -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 19/29] dts: T102x: Add ESPI DT nodes
Add ESPI controller DT node for T102x. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/t102x.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/dts/t102x.dtsi b/arch/powerpc/dts/t102x.dtsi index c49fd21..8f339f6 100644 --- a/arch/powerpc/dts/t102x.dtsi +++ b/arch/powerpc/dts/t102x.dtsi @@ -48,6 +48,15 @@ device_type = "open-pic"; clock-frequency = <0x0>; }; + + espi0: spi@11 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11 0x1000>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; }; pcie@ffe24 { -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 22/29] dts: T104x: Add ESPI DT nodes
Add ESPI controller DT node for T104x. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/t104x.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/dts/t104x.dtsi b/arch/powerpc/dts/t104x.dtsi index 5998967..4fd3601 100644 --- a/arch/powerpc/dts/t104x.dtsi +++ b/arch/powerpc/dts/t104x.dtsi @@ -58,6 +58,15 @@ device_type = "open-pic"; clock-frequency = <0x0>; }; + + espi0: spi@11 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11 0x1000>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; }; pcie@ffe24 { -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 06/29] configs: P2020RDB: Enable ESPI driver
Enable the DM ESPI driver in P2020RDB defconfig. Signed-off-by: Xiaowei Bao --- configs/P2020RDB-PC_36BIT_NAND_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 2 ++ configs/P2020RDB-PC_36BIT_defconfig | 2 ++ configs/P2020RDB-PC_NAND_defconfig | 2 ++ configs/P2020RDB-PC_SDCARD_defconfig | 2 ++ configs/P2020RDB-PC_SPIFLASH_defconfig | 2 ++ configs/P2020RDB-PC_defconfig| 2 ++ 8 files changed, 16 insertions(+) diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index aa47e89..c92822f 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -50,6 +50,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 96ea15f..35d146c 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -46,6 +46,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index d0103b2..b3e19ef 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -47,6 +47,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig index c99c25f..049efef 100644 --- a/configs/P2020RDB-PC_36BIT_defconfig +++ b/configs/P2020RDB-PC_36BIT_defconfig @@ -35,6 +35,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc_36b" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index ee13ac2..bab9385 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -49,6 +49,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 7c43b95..edee886 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -45,6 +45,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index cddef3e..4dc8a82 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -46,6 +46,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig index a0a69ca..20763c6 100644 --- a/configs/P2020RDB-PC_defconfig +++ b/configs/P2020RDB-PC_defconfig @@ -34,6 +34,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2020rdb-pc" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y CONFIG_FLASH_CFI_DRIVER=y -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 23/29] dts: T1042D4RDB: Add ESPI slave device node
Add ESPI slave node for T1042D4RDB. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/t1042d4rdb.dts | 15 +++ 1 file changed, 15 insertions(+) diff --git a/arch/powerpc/dts/t1042d4rdb.dts b/arch/powerpc/dts/t1042d4rdb.dts index 16a8ed4..3584c06 100644 --- a/arch/powerpc/dts/t1042d4rdb.dts +++ b/arch/powerpc/dts/t1042d4rdb.dts @@ -14,4 +14,19 @@ #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; + + aliases { + spi0 = &espi0; + }; +}; + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; }; -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 10/29] dts: P3041: Add ESPI DT nodes
Add ESPI controller DT node for P3041. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p3041.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/dts/p3041.dtsi b/arch/powerpc/dts/p3041.dtsi index 197896d..352d7d4 100644 --- a/arch/powerpc/dts/p3041.dtsi +++ b/arch/powerpc/dts/p3041.dtsi @@ -59,6 +59,15 @@ device_type = "open-pic"; clock-frequency = <0x0>; }; + + espi0: spi@11 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11 0x1000>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; }; pcie@ffe20 { -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 04/29] dts: P2020: Add ESPI DT nodes
Add ESPI controller DT node for P2020. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p2020-post.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/dts/p2020-post.dtsi b/arch/powerpc/dts/p2020-post.dtsi index f696f35..a169340 100644 --- a/arch/powerpc/dts/p2020-post.dtsi +++ b/arch/powerpc/dts/p2020-post.dtsi @@ -24,6 +24,15 @@ single-cpu-affinity; last-interrupt-source = <255>; }; + + espi0: spi@7000 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x7000 0x1000>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; }; /* PCIe controller base address 0x8000 */ -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 21/29] configs: T1024RDB: Enable ESPI driver
Enable the DM ESPI driver in T1024RDB defconfig. Signed-off-by: Xiaowei Bao --- configs/T1024RDB_NAND_defconfig | 2 ++ configs/T1024RDB_SDCARD_defconfig | 2 ++ configs/T1024RDB_SPIFLASH_defconfig | 2 ++ configs/T1024RDB_defconfig | 2 ++ 4 files changed, 8 insertions(+) diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index af65615..ddf941e 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -49,6 +49,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index 43817be..6ce7871 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -47,6 +47,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 9ffd5d6..e3f4a53 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -48,6 +48,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig index 08a6225..ea76b7c 100644 --- a/configs/T1024RDB_defconfig +++ b/configs/T1024RDB_defconfig @@ -34,6 +34,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t1024rdb" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_SYS_FSL_DDR3=y CONFIG_FSL_ESDHC=y -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 09/29] configs: P2041RDB: Enable ESPI driver
Enable the DM ESPI driver in P2041RDB defconfig. Signed-off-by: Xiaowei Bao --- configs/P2041RDB_NAND_defconfig | 2 ++ configs/P2041RDB_SDCARD_defconfig | 2 ++ configs/P2041RDB_SPIFLASH_defconfig | 2 ++ configs/P2041RDB_defconfig | 2 ++ 4 files changed, 8 insertions(+) diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig index 7ed8abf..adbdfce 100644 --- a/configs/P2041RDB_NAND_defconfig +++ b/configs/P2041RDB_NAND_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig index 4d64d08..31c7e8e 100644 --- a/configs/P2041RDB_SDCARD_defconfig +++ b/configs/P2041RDB_SDCARD_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig index ec22c95..23a4d57 100644 --- a/configs/P2041RDB_SPIFLASH_defconfig +++ b/configs/P2041RDB_SPIFLASH_defconfig @@ -28,6 +28,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig index e757330..8a02296 100644 --- a/configs/P2041RDB_defconfig +++ b/configs/P2041RDB_defconfig @@ -27,6 +27,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="p2041rdb" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 24/29] configs: T1042D4RDB: Enable ESPI driver
Enable the DM ESPI driver in T1042D4RDB defconfig. Signed-off-by: Xiaowei Bao --- configs/T1042D4RDB_NAND_defconfig | 2 ++ configs/T1042D4RDB_SDCARD_defconfig | 2 ++ configs/T1042D4RDB_SPIFLASH_defconfig | 2 ++ configs/T1042D4RDB_defconfig | 2 ++ 4 files changed, 8 insertions(+) diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 2fcd9e1..8547757 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -48,6 +48,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index 04372fd..bed1e42 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -46,6 +46,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 2c869cd..a654462 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -47,6 +47,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig index 5d8a25f..7085c99 100644 --- a/configs/T1042D4RDB_defconfig +++ b/configs/T1042D4RDB_defconfig @@ -33,6 +33,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t1042d4rdb" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 27/29] dts: T4240: Add ESPI DT nodes
Add ESPI controller DT node for T4240. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/t4240.dtsi | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/powerpc/dts/t4240.dtsi b/arch/powerpc/dts/t4240.dtsi index fc34974..1158a92 100644 --- a/arch/powerpc/dts/t4240.dtsi +++ b/arch/powerpc/dts/t4240.dtsi @@ -98,6 +98,15 @@ device_type = "open-pic"; clock-frequency = <0x0>; }; + + espi0: spi@11 { + compatible = "fsl,mpc8536-espi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x11 0x1000>; + fsl,espi-num-chipselects = <4>; + status = "disabled"; + }; }; pcie@ffe24 { -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 26/29] configs: T2080RDB: Enable ESPI driver
Enable the DM ESPI driver in T2080RDB defconfig. Signed-off-by: Xiaowei Bao --- configs/T2080RDB_NAND_defconfig | 2 ++ configs/T2080RDB_SDCARD_defconfig | 2 ++ configs/T2080RDB_SPIFLASH_defconfig | 2 ++ configs/T2080RDB_defconfig | 2 ++ 4 files changed, 8 insertions(+) diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 692d01c..b09722e 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -46,6 +46,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_ENV_IS_IN_NAND=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index 247cc31..d35412d 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -44,6 +44,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 1370e16..bb72f18 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -45,6 +45,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/T2080RDB_defconfig b/configs/T2080RDB_defconfig index bc4a026..04e3cf3 100644 --- a/configs/T2080RDB_defconfig +++ b/configs/T2080RDB_defconfig @@ -31,6 +31,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t2080rdb" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 25/29] dts: T2080RDB: Add ESPI slave device node
Add ESPI slave node for T2080RDB. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/t2080rdb.dts | 15 +++ 1 file changed, 15 insertions(+) diff --git a/arch/powerpc/dts/t2080rdb.dts b/arch/powerpc/dts/t2080rdb.dts index 49c1765..34ec6a7 100644 --- a/arch/powerpc/dts/t2080rdb.dts +++ b/arch/powerpc/dts/t2080rdb.dts @@ -14,4 +14,19 @@ #address-cells = <2>; #size-cells = <2>; interrupt-parent = <&mpic>; + + aliases { + spi0 = &espi0; + }; +}; + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; /* 16MB */ + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; }; -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 29/29] configs: T4240RDB: Enable ESPI driver
Enable the DM ESPI driver in T4240RDB defconfig. Signed-off-by: Xiaowei Bao --- configs/T4240RDB_SDCARD_defconfig | 2 ++ configs/T4240RDB_defconfig| 2 ++ 2 files changed, 4 insertions(+) diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index df308d4..828e433 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -39,6 +39,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" CONFIG_ENV_IS_IN_MMC=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig index 9cf2c6a..e6aa953 100644 --- a/configs/T4240RDB_defconfig +++ b/configs/T4240RDB_defconfig @@ -26,6 +26,8 @@ CONFIG_OF_CONTROL=y CONFIG_DEFAULT_DEVICE_TREE="t4240rdb" CONFIG_ENV_IS_IN_FLASH=y CONFIG_DM=y +CONFIG_DM_SPI=y +CONFIG_DM_SPI_FLASH=y CONFIG_FSL_CAAM=y CONFIG_FSL_ESDHC=y CONFIG_MTD_NOR_FLASH=y -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 05/29] dts: P2020RDB: Add ESPI slave device node
Add ESPI slave node for P2020RDB. Signed-off-by: Xiaowei Bao --- arch/powerpc/dts/p2020rdb-pc.dts | 15 +++ arch/powerpc/dts/p2020rdb-pc_36b.dts | 15 +++ 2 files changed, 30 insertions(+) diff --git a/arch/powerpc/dts/p2020rdb-pc.dts b/arch/powerpc/dts/p2020rdb-pc.dts index 08befd4..5ae278c 100644 --- a/arch/powerpc/dts/p2020rdb-pc.dts +++ b/arch/powerpc/dts/p2020rdb-pc.dts @@ -35,6 +35,21 @@ ranges = <0x0100 0x0 0x 0x0 0xffc0 0x0 0x0001 /* downstream I/O */ 0x0200 0x0 0x8000 0x0 0x8000 0x0 0x2000>; /* non-prefetchable memory */ }; + + aliases { + spi0 = &espi0; + }; }; /include/ "p2020-post.dtsi" + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; +}; diff --git a/arch/powerpc/dts/p2020rdb-pc_36b.dts b/arch/powerpc/dts/p2020rdb-pc_36b.dts index 04b2519..542fffc 100644 --- a/arch/powerpc/dts/p2020rdb-pc_36b.dts +++ b/arch/powerpc/dts/p2020rdb-pc_36b.dts @@ -35,6 +35,21 @@ ranges = <0x0100 0x0 0x 0xf 0xffc0 0x0 0x0001 /* downstream I/O */ 0x0200 0x0 0x8000 0xc 0x 0x0 0x2000>; /* non-prefetchable memory */ }; + + aliases { + spi0 = &espi0; + }; }; /include/ "p2020-post.dtsi" + +&espi0 { + status = "okay"; + flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0>; + spi-max-frequency = <1000>; /* input clock */ + }; +}; -- 2.9.5 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PULL] u-boot-mips
On Sat, Oct 26, 2019 at 12:30:31AM +0200, Daniel Schwierzeck wrote: > Hi Tom, > > please pull MIPS updates for 2020.01. > > Gitlab: https://gitlab.denx.de/u-boot/custodians/u-boot-mips/pipelines/1101 > Travis CI: https://travis-ci.org/danielschwierzeck/u-boot/builds/602882075 > > > The following changes since commit 17fd9915a4c639381804ed28274fa136ae3b0bee: > > Merge branch '2019-10-24-UFS-support' (2019-10-24 09:51:48 -0400) > > are available in the Git repository at: > > git://git.denx.de/u-boot-mips.git tags/mips-pull-2019-10-25 > > for you to fetch changes up to ec54c8c0001d151e9ba59410d35fe6a02fdcaf12: > > configs: mtmips: remove configs which are selected in Kconfig or useless > (2019-10-25 17:20:44 +0200) > Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v2 8/8] Add Micirosoft Azure pipelines configuration
Hi Tom, On Fri, Oct 25, 2019 at 1:52 PM Bin Meng wrote: > > Hi Tom, > > On Thu, Oct 24, 2019 at 11:38 PM Tom Rini wrote: > > > > On Thu, Oct 24, 2019 at 11:31:30PM +0800, Bin Meng wrote: > > > On Thu, Oct 24, 2019 at 11:10 PM Bin Meng wrote: > > > > > > > > Hi Tom, > > > > > > > > On Thu, Oct 24, 2019 at 11:01 PM Tom Rini wrote: > > > > > > > > > > On Wed, Oct 23, 2019 at 08:11:52PM -0700, Bin Meng wrote: > > > > > > > > > > > Oops, just noticed a typo in the commit summary. Will correct it in v3. > > > > > > > > > Microsoft Azure Pipelines provides unlimited CI/CD minutes and 10 > > > > > > parallel jobs to every open source project for free [1]. > > > > > > > > > > > > This adds a configuration file for Azure Pipelines to utilize the > > > > > > free Windows VM hosted by Microsoft to ensure no build broken in > > > > > > building U-Boot host tools for Windows. > > > > > > > > > > > > [1] > > > > > > https://azure.microsoft.com/en-us/blog/announcing-azure-pipelines-with-unlimited-ci-cd-minutes-for-open-source/ > > > > > > > > > > > > Signed-off-by: Bin Meng > > > > > > > > > > > > --- > > > > > > See the build result at: > > > > > > https://dev.azure.com/bmeng/GitHub/_build/results?buildId=53 > > > > > > > > > > > > Changes in v2: > > > > > > - new patch: Add Micirosoft Azure pipelines configuration > > > > > > > > > > > > azure-pipelines.yml | 35 +++ > > > > > > 1 file changed, 35 insertions(+) > > > > > > create mode 100644 azure-pipelines.yml > > > > > > > > > > Thanks a lot for doing this. I'm starting to look at what's needed so > > > > > that I can also run this automatically and perhaps evaluate it for > > > > > other > > > > > uses in U-Boot as well. One thing I would like to change is that it > > > > > looks like under pipeline settings we can specify the file and I'd > > > > > like > > > > > to call this ".azure-pipelines.yml" instead to match travis/gitlab > > > > > files. > > > > > > > > I named this as I see examples from other open source projects have > > > > such a name. Let me try ".azure-pipelines.yml". > > > > > > I tried to rename it to ".azure-pipelines.yml", but the Azure > > > pipelines does not recognize it. > > > > Did you find the place in the pipeline settings page to change where it > > looks? > > https://stackoverflow.com/questions/55614307/can-you-change-the-location-of-azure-pipelines-yaml-in-azure-devops > > is what I found and why I asked. > > Thanks. I followed this link and now it is able to accept > ".azure-pipelines.yml". > > > > > > > > > diff --git a/azure-pipelines.yml b/azure-pipelines.yml > > > > > > new file mode 100644 > > > > > > index 000..cc0514b > > > > > > --- /dev/null > > > > > > +++ b/azure-pipelines.yml > > > > > > @@ -0,0 +1,35 @@ > > > > > > +jobs: > > > > > > + - job: tools_only_windows > > > > > > +displayName: 'Ensure host tools build for Windows' > > > > > > +pool: > > > > > > + vmImage: vs2015-win2012r2 > > > > > > +strategy: > > > > > > + matrix: > > > > > > +i686: > > > > > > + MSYS_DIR: msys32 > > > > > > + BASE_REPO: msys2-ci-base-i686 > > > > > > +x86_64: > > > > > > + MSYS_DIR: msys64 > > > > > > + BASE_REPO: msys2-ci-base > > > > > > +steps: > > > > > > + - script: | > > > > > > + git clone https://github.com/msys2/$(BASE_REPO).git > > > > > > %CD:~0,2%\$(MSYS_DIR) > > > > > > +displayName: 'Install MSYS2' > > > > > > + - script: | > > > > > > + set > > > > > > PATH=%CD:~0,2%\$(MSYS_DIR)\usr\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem > > > > > > + %CD:~0,2%\$(MSYS_DIR)\usr\bin\pacman --noconfirm -Syyuu > > > > > > +displayName: 'Update MSYS2' > > > > > > + - script: | > > > > > > + set > > > > > > PATH=%CD:~0,2%\$(MSYS_DIR)\usr\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem > > > > > > + %CD:~0,2%\$(MSYS_DIR)\usr\bin\pacman --noconfirm > > > > > > --needed -S make gcc bison diffutils openssl-devel > > > > > > +displayName: 'Install Toolchain' > > > > > > + - script: | > > > > > > + set > > > > > > PATH=C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem > > > > > > + echo make tools-only_defconfig tools-only NO_SDL=1 > > > > > > > build-tools.sh > > > > > > + %CD:~0,2%\$(MSYS_DIR)\usr\bin\bash -lc "bash > > > > > > build-tools.sh" > > > > > > +displayName: 'Build Host Tools' > > > > > > +env: > > > > > > + # Tell MSYS2 we need a POSIX emulation layer > > > > > > + MSYSTEM: MSYS > > > > > > + # Tell MSYS2 not to ‘cd’ our startup directory to HOME > > > > > > + CHERE_INVOKING: yes > > > > > > > > > > While I start understanding overall syntax, is this particular style > > > > > one > > > > > that would allow us to add in more jobs, like say all of the ones we > > > > > do > > > > > in GitLab, and in that sta
Re: [U-Boot] [PATCH v2 8/8] Add Micirosoft Azure pipelines configuration
On Sat, Oct 26, 2019 at 08:12:22PM +0800, Bin Meng wrote: > Hi Tom, > > On Fri, Oct 25, 2019 at 1:52 PM Bin Meng wrote: > > > > Hi Tom, > > > > On Thu, Oct 24, 2019 at 11:38 PM Tom Rini wrote: > > > > > > On Thu, Oct 24, 2019 at 11:31:30PM +0800, Bin Meng wrote: > > > > On Thu, Oct 24, 2019 at 11:10 PM Bin Meng wrote: > > > > > > > > > > Hi Tom, > > > > > > > > > > On Thu, Oct 24, 2019 at 11:01 PM Tom Rini wrote: > > > > > > > > > > > > On Wed, Oct 23, 2019 at 08:11:52PM -0700, Bin Meng wrote: > > > > > > > > > > > > > > Oops, just noticed a typo in the commit summary. Will correct it in v3. > > > > > > > > > > > Microsoft Azure Pipelines provides unlimited CI/CD minutes and 10 > > > > > > > parallel jobs to every open source project for free [1]. > > > > > > > > > > > > > > This adds a configuration file for Azure Pipelines to utilize the > > > > > > > free Windows VM hosted by Microsoft to ensure no build broken in > > > > > > > building U-Boot host tools for Windows. > > > > > > > > > > > > > > [1] > > > > > > > https://azure.microsoft.com/en-us/blog/announcing-azure-pipelines-with-unlimited-ci-cd-minutes-for-open-source/ > > > > > > > > > > > > > > Signed-off-by: Bin Meng > > > > > > > > > > > > > > --- > > > > > > > See the build result at: > > > > > > > https://dev.azure.com/bmeng/GitHub/_build/results?buildId=53 > > > > > > > > > > > > > > Changes in v2: > > > > > > > - new patch: Add Micirosoft Azure pipelines configuration > > > > > > > > > > > > > > azure-pipelines.yml | 35 +++ > > > > > > > 1 file changed, 35 insertions(+) > > > > > > > create mode 100644 azure-pipelines.yml > > > > > > > > > > > > Thanks a lot for doing this. I'm starting to look at what's needed > > > > > > so > > > > > > that I can also run this automatically and perhaps evaluate it for > > > > > > other > > > > > > uses in U-Boot as well. One thing I would like to change is that it > > > > > > looks like under pipeline settings we can specify the file and I'd > > > > > > like > > > > > > to call this ".azure-pipelines.yml" instead to match travis/gitlab > > > > > > files. > > > > > > > > > > I named this as I see examples from other open source projects have > > > > > such a name. Let me try ".azure-pipelines.yml". > > > > > > > > I tried to rename it to ".azure-pipelines.yml", but the Azure > > > > pipelines does not recognize it. > > > > > > Did you find the place in the pipeline settings page to change where it > > > looks? > > > https://stackoverflow.com/questions/55614307/can-you-change-the-location-of-azure-pipelines-yaml-in-azure-devops > > > is what I found and why I asked. > > > > Thanks. I followed this link and now it is able to accept > > ".azure-pipelines.yml". > > > > > > > > > > > > diff --git a/azure-pipelines.yml b/azure-pipelines.yml > > > > > > > new file mode 100644 > > > > > > > index 000..cc0514b > > > > > > > --- /dev/null > > > > > > > +++ b/azure-pipelines.yml > > > > > > > @@ -0,0 +1,35 @@ > > > > > > > +jobs: > > > > > > > + - job: tools_only_windows > > > > > > > +displayName: 'Ensure host tools build for Windows' > > > > > > > +pool: > > > > > > > + vmImage: vs2015-win2012r2 > > > > > > > +strategy: > > > > > > > + matrix: > > > > > > > +i686: > > > > > > > + MSYS_DIR: msys32 > > > > > > > + BASE_REPO: msys2-ci-base-i686 > > > > > > > +x86_64: > > > > > > > + MSYS_DIR: msys64 > > > > > > > + BASE_REPO: msys2-ci-base > > > > > > > +steps: > > > > > > > + - script: | > > > > > > > + git clone https://github.com/msys2/$(BASE_REPO).git > > > > > > > %CD:~0,2%\$(MSYS_DIR) > > > > > > > +displayName: 'Install MSYS2' > > > > > > > + - script: | > > > > > > > + set > > > > > > > PATH=%CD:~0,2%\$(MSYS_DIR)\usr\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem > > > > > > > + %CD:~0,2%\$(MSYS_DIR)\usr\bin\pacman --noconfirm -Syyuu > > > > > > > +displayName: 'Update MSYS2' > > > > > > > + - script: | > > > > > > > + set > > > > > > > PATH=%CD:~0,2%\$(MSYS_DIR)\usr\bin;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem > > > > > > > + %CD:~0,2%\$(MSYS_DIR)\usr\bin\pacman --noconfirm > > > > > > > --needed -S make gcc bison diffutils openssl-devel > > > > > > > +displayName: 'Install Toolchain' > > > > > > > + - script: | > > > > > > > + set > > > > > > > PATH=C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem > > > > > > > + echo make tools-only_defconfig tools-only NO_SDL=1 > > > > > > > > build-tools.sh > > > > > > > + %CD:~0,2%\$(MSYS_DIR)\usr\bin\bash -lc "bash > > > > > > > build-tools.sh" > > > > > > > +displayName: 'Build Host Tools' > > > > > > > +env: > > > > > > > + # Tell MSYS2 we need a POSIX emulation layer > > > > > > > + MSYSTEM: MSYS > > > > > > > + # Tell MSYS2 not to ‘cd’ our sta
Re: [U-Boot] Pull request: u-boot-rockchip-20191026
On Sat, Oct 26, 2019 at 04:13:52PM +0800, Kever Yang wrote: > Hi Tom, > > Please pull the rockchip update: > - Add support for rockchip pmic rk805,rk809, rk816, rk817 > - Add rk3399 board Leez support > - Fix bug in rk3328 ram driver > - Adapt SPL to support ATF bl31 with entry at 0x4 > > Travis: > https://travis-ci.org/keveryang/u-boot/builds/601718633 > > Thanks, > - Kever > > The following changes since commit 15147dc6a96697880cf355ed9df127bd8c896f2c: > > Merge branch '2019-10-24-ti-imports' (2019-10-25 17:33:28 -0400) > > are available in the Git repository at: > > https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip.git > tags/u-boot-rockchip-20191026 > > for you to fetch changes up to a8a09d078d5e17873754b33dc5d15858d2cb2605: > > rockchip: firefly-rk3288: Enable TPL support (2019-10-26 16:05:02 +0800) First up, the clang sandbox job isn't working as while I see it passed there, in my build script: /home/trini/u-boot/u-boot/drivers/power/regulator/rk8xx.c:281:21: warning: result of comparison of constant -1 with expression of type 'const u8' (aka 'const unsigned char') is always false [-Wtautological-constant-out-of-range-compare] if (info->vsel_reg == NA) ~~ ^ ~~ Along with vsel_sleep_reg, everywhere we have that type of pattern, so NAK. And I'll use this PR as-is to figure out why the sandbox job isn't working. -- Tom signature.asc Description: PGP signature ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 1/2] mach-imx: Adding new argument for SIP call interface
From: Ye Li Need to pass total 5 arguments for SIP HAB call on i.MX8MQ, so update the interface to add new argument. Signed-off-by: Ye Li [agust: fixed imx8m-power-domain build] Signed-off-by: Anatolij Gustschin Reviewed-by: Patrick Wildt --- Changes in v2: - fix build breakage in imx8m-power-domain.c arch/arm/include/asm/mach-imx/sys_proto.h | 3 ++- arch/arm/mach-imx/imx_bootaux.c | 4 ++-- arch/arm/mach-imx/sip.c | 4 +++- drivers/misc/imx8/fuse.c | 2 +- drivers/power/domain/imx8m-power-domain.c | 6 -- 5 files changed, 12 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/mach-imx/sys_proto.h b/arch/arm/include/asm/mach-imx/sys_proto.h index aa66fdc88f..139a7638c1 100644 --- a/arch/arm/include/asm/mach-imx/sys_proto.h +++ b/arch/arm/include/asm/mach-imx/sys_proto.h @@ -143,7 +143,8 @@ int mxs_wait_mask_set(struct mxs_register_32 *reg, u32 mask, u32 timeout); int mxs_wait_mask_clr(struct mxs_register_32 *reg, u32 mask, u32 timeout); unsigned long call_imx_sip(unsigned long id, unsigned long reg0, - unsigned long reg1, unsigned long reg2); + unsigned long reg1, unsigned long reg2, + unsigned long reg3); unsigned long call_imx_sip_ret2(unsigned long id, unsigned long reg0, unsigned long *reg1, unsigned long reg2, unsigned long reg3); diff --git a/arch/arm/mach-imx/imx_bootaux.c b/arch/arm/mach-imx/imx_bootaux.c index 18d7e6819c..3d9422d5a2 100644 --- a/arch/arm/mach-imx/imx_bootaux.c +++ b/arch/arm/mach-imx/imx_bootaux.c @@ -26,7 +26,7 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) /* Enable M4 */ #ifdef CONFIG_IMX8M - call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0); + call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_START, 0, 0, 0); #else clrsetbits_le32(SRC_BASE_ADDR + SRC_M4_REG_OFFSET, SRC_M4C_NON_SCLR_RST_MASK, SRC_M4_ENABLE_MASK); @@ -38,7 +38,7 @@ int arch_auxiliary_core_up(u32 core_id, ulong boot_private_data) int arch_auxiliary_core_check_up(u32 core_id) { #ifdef CONFIG_IMX8M - return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0); + return call_imx_sip(IMX_SIP_SRC, IMX_SIP_SRC_M4_STARTED, 0, 0, 0); #else unsigned int val; diff --git a/arch/arm/mach-imx/sip.c b/arch/arm/mach-imx/sip.c index 968e7cf309..fca520c671 100644 --- a/arch/arm/mach-imx/sip.c +++ b/arch/arm/mach-imx/sip.c @@ -7,7 +7,8 @@ #include unsigned long call_imx_sip(unsigned long id, unsigned long reg0, - unsigned long reg1, unsigned long reg2) + unsigned long reg1, unsigned long reg2, + unsigned long reg3) { struct pt_regs regs; @@ -15,6 +16,7 @@ unsigned long call_imx_sip(unsigned long id, unsigned long reg0, regs.regs[1] = reg0; regs.regs[2] = reg1; regs.regs[3] = reg2; + regs.regs[4] = reg3; smc_call(®s); diff --git a/drivers/misc/imx8/fuse.c b/drivers/misc/imx8/fuse.c index 2f2fad2c17..1309215d4d 100644 --- a/drivers/misc/imx8/fuse.c +++ b/drivers/misc/imx8/fuse.c @@ -74,7 +74,7 @@ int fuse_prog(u32 bank, u32 word, u32 val) } return call_imx_sip(FSL_SIP_OTP_WRITE, (unsigned long)word, - (unsigned long)val, 0); + (unsigned long)val, 0, 0); } int fuse_override(u32 bank, u32 word, u32 val) diff --git a/drivers/power/domain/imx8m-power-domain.c b/drivers/power/domain/imx8m-power-domain.c index 164fb3d31d..40ece9ee3f 100644 --- a/drivers/power/domain/imx8m-power-domain.c +++ b/drivers/power/domain/imx8m-power-domain.c @@ -37,7 +37,8 @@ static int imx8m_power_domain_on(struct power_domain *power_domain) if (pdata->has_pd) power_domain_on(&pdata->pd); - call_imx_sip(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN, pdata->resource_id, 1); + call_imx_sip(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN, +pdata->resource_id, 1, 0); return 0; } @@ -51,7 +52,8 @@ static int imx8m_power_domain_off(struct power_domain *power_domain) if (pdata->resource_id < 0) return -EINVAL; - call_imx_sip(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN, pdata->resource_id, 0); + call_imx_sip(IMX_SIP_GPC, IMX_SIP_GPC_PM_DOMAIN, +pdata->resource_id, 0, 0); if (pdata->has_pd) power_domain_off(&pdata->pd); -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v2 2/2] imx8: output SECO-FW and ATF commit IDs
Borrow ID reading code from Ye Li (NXP U-Boot, commit ID 5b443e3e2617) but drop imx-mkimage commit ID reading since we now use in tree mkimage. Signed-off-by: Anatolij Gustschin --- Changes in v2: - reword subject and commit description - use in tree sc_seco_build_info() instead of adding sc_misc_seco_build_info() - drop output of imx-mkimage commit ID code - drop setting the IDs to environment because build_info() is called before environment init and setting variables doesn't work yet arch/arm/mach-imx/imx8/misc.c | 26 +- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/imx8/misc.c b/arch/arm/mach-imx/imx8/misc.c index fe73e29eee..00fe4670bb 100644 --- a/arch/arm/mach-imx/imx8/misc.c +++ b/arch/arm/mach-imx/imx8/misc.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ #include #include +#include int sc_pm_setup_uart(sc_rsrc_t uart_rsrc, sc_pm_clock_rate_t clk_rate) { @@ -25,9 +26,14 @@ int sc_pm_setup_uart(sc_rsrc_t uart_rsrc, sc_pm_clock_rate_t clk_rate) return 0; } +#define FSL_SIP_BUILDINFO 0xC203 +#define FSL_SIP_BUILDINFO_GET_COMMITHASH 0x00 + void build_info(void) { + u32 seco_build = 0, seco_commit = 0; u32 sc_build = 0, sc_commit = 0; + ulong atf_commit = 0; /* Get SCFW build and commit id */ sc_misc_build_info(-1, &sc_build, &sc_commit); @@ -35,5 +41,23 @@ void build_info(void) printf("SCFW does not support build info\n"); sc_commit = 0; /* Display 0 if build info not supported */ } - printf("Build: SCFW %x\n", sc_commit); + + /* Get SECO FW build and commit id */ + sc_seco_build_info(-1, &seco_build, &seco_commit); + if (!seco_build) { + debug("SECO FW does not support build info\n"); + /* Display 0 when the build info is not supported */ + seco_commit = 0; + } + + /* Get ARM Trusted Firmware commit id */ + atf_commit = call_imx_sip(FSL_SIP_BUILDINFO, + FSL_SIP_BUILDINFO_GET_COMMITHASH, 0, 0, 0); + if (atf_commit == 0x) { + debug("ATF does not support build info\n"); + atf_commit = 0x30; /* Display 0 */ + } + + printf("Build: SCFW %08x, SECO-FW %08x, ATF %s\n", + sc_commit, seco_commit, (char *)&atf_commit); } -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH] travis: Fix the clang-7 test
When using the OVERRIDE variable we need to pass -O to buildman as well to use the "override" option to buildman. Fixed: e9500f49ea35 ("travis: Use buildman for building with clang") Signed-off-by: Tom Rini --- .travis.yml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/.travis.yml b/.travis.yml index a3e7451bcb17..97b41fc01258 100644 --- a/.travis.yml +++ b/.travis.yml @@ -389,7 +389,7 @@ matrix: env: - TEST_PY_BD="sandbox" BUILDMAN="^sandbox$" - OVERRIDE="clang-7" + OVERRIDE="-O clang-7" - name: "test/py sandbox_spl" env: - TEST_PY_BD="sandbox_spl" -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] Pull request: u-boot-sunxi/master
Hi Tom, Please pull this PR. Summary: - H6 dts(i) sync (Clément) - H6 PIO (Icenowy) - Fix pll1 clock calculation (Stefan) - H6 dram, half DQ (Jernej) - A64 OLinuXino eMMC (Sunil) Travis-CI: https://travis-ci.org/openedev/u-boot-amarula/builds/602715052 Thanks, Jagan. The following changes since commit 395ec7418695e5ce23f8b48c01a1dbffd2e52d3f: spi-nor-ids: Add support for Adesto AT25SL321 (2019-10-25 00:48:32 +0530) are available in the Git repository at: https://gitlab.denx.de/u-boot/custodians/u-boot-sunxi master for you to fetch changes up to 5f19c9302133cda54d5d1a6b1caa400260de9192: sunxi: set PIO voltage to hardware-detected value on startup on H6 (2019-10-25 14:40:34 +0530) Clément Péron (1): arm: dts: sync dts for Allwinner H6 Icenowy Zheng (1): sunxi: set PIO voltage to hardware-detected value on startup on H6 Jernej Skrabec (1): sunxi: H6: DRAM: Add support for half DQ Stefan Mavrodiev (1): sunxi: Fix pll1 clock calculation Sunil Mohan Adapa (1): arm64: dts: sun50i: Add support for A64 OLinuXino (with eMMC) arch/arm/dts/Makefile| 1 + arch/arm/dts/sun50i-a64-olinuxino-emmc.dts | 23 +++ arch/arm/dts/sun50i-h6-beelink-gs1.dts | 76 +++ arch/arm/dts/sun50i-h6-pine-h64.dts | 12 arch/arm/dts/sun50i-h6.dtsi | 46 +- arch/arm/include/asm/arch-sunxi/dram_sun50i_h6.h | 1 + arch/arm/include/asm/arch-sunxi/gpio.h | 3 + arch/arm/mach-sunxi/board.c | 9 +++ arch/arm/mach-sunxi/clock_sun6i.c| 2 +- arch/arm/mach-sunxi/dram_sun50i_h6.c | 78 board/sunxi/MAINTAINERS | 5 ++ configs/a64-olinuxino-emmc_defconfig | 17 ++ 12 files changed, 244 insertions(+), 29 deletions(-) create mode 100644 arch/arm/dts/sun50i-a64-olinuxino-emmc.dts create mode 100644 configs/a64-olinuxino-emmc_defconfig ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [BUG] tbs2910_defconfig does not compile with gcc 9.2.1
Hello Marek, tbs2910_defconfig does not compile with gcc 9.2.1: In file included from drivers/usb/gadget/g_dnl.c:24: drivers/usb/gadget/composite.c: In function ‘get_string’: drivers/usb/gadget/composite.c:545:23: error: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 545 |collect_langs(sp, s->wData); | ~^~~ drivers/usb/gadget/composite.c:550:24: error: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 550 | collect_langs(sp, s->wData); | ~^~~ drivers/usb/gadget/composite.c:555:25: error: taking address of packed member of ‘struct usb_string_descriptor’ may result in an unaligned pointer value [-Werror=address-of-packed-member] 555 | collect_langs(sp, s->wData); |~^~~ Best regards Heinrich ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [BUG] tbs2910_defconfig does not compile with gcc 9.2.1
On 10/26/19 8:01 PM, Heinrich Schuchardt wrote: > Hello Marek, Hi, > tbs2910_defconfig does not compile with gcc 9.2.1: > > In file included from drivers/usb/gadget/g_dnl.c:24: > drivers/usb/gadget/composite.c: In function ‘get_string’: > drivers/usb/gadget/composite.c:545:23: error: taking address of packed > member of ‘struct usb_string_descriptor’ may result in an unaligned > pointer value [-Werror=address-of-packed-member] > 545 | collect_langs(sp, s->wData); > | ~^~~ Send a patch fixing the issue please. The board seems to compile within travis, so it's a new problem due to newer gcc. -- Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH 0/9] phy: atheros: cleanup and device tree bindings
On Sat, Oct 26, 2019 at 3:57 AM Michael Walle wrote: > > Hi Adam, > > Am 2019-10-26 05:28, schrieb Adam Ford: > > On Fri, Oct 25, 2019 at 10:20 PM Adam Ford wrote: > >> > >> On Fri, Oct 25, 2019 at 7:27 PM Michael Walle > >> wrote: > >> > > >> > This series cleans up the Atheros PHY AR803x PHY driver and adds a > >> > device tree binding for the most commonly used PHY settings like clock > >> > output. > >> > > >> > If you're a board maintainer you're getting this mail because you > >> > probably > >> > use an AR803x PHY on your board. Please have a look at your board > >> > specific > >> > code and see if you can use the device tree bindings instead. Let me > >> > know, > >> > if something is missing. > >> > >> Thank you for this! > >> > >> I was able to remove board_phy_config and the supporting > >> ar8031_phy_fixup functions to a total of nearly 30 lines of code. > > > > Please disregard my comment. From a cold boot, I cannot remove these > > lines. > > Thank you for testing though. I guess your network drivers needs > something like that: >https://patchwork.ozlabs.org/patch/1184523/ I tried with the 2nd series also applied with no luck either on my i.MX6Q. > > So here is a cheap shot (very hacky, doesn't work with > CONFIG_FEC_MXC_PHYADDR, completely untested, not even compiled ;). Could > you try that? I need to add some debug messages to the Atheros PHY > driver, so one could see if the device tree binding is working > correctly. I will look at the following stuff when I have more time. > > --- a/drivers/net/fec_mxc.c > +++ b/drivers/net/fec_mxc.c > @@ -1264,7 +1264,7 @@ static const struct eth_ops fecmxc_ops = { > .read_rom_hwaddr= fecmxc_read_rom_hwaddr, > }; > > -static int device_get_phy_addr(struct udevice *dev) > +static int device_get_phy_addr(struct udevice *dev, struct ofnode > *phy_node) > { > struct ofnode_phandle_args phandle_args; > int reg; > @@ -1276,6 +1276,7 @@ static int device_get_phy_addr(struct udevice > *dev) > } > > reg = ofnode_read_u32_default(phandle_args.node, "reg", 0); > + phy_node = &phandle_args.node; > > return reg; > } > @@ -1284,8 +1285,9 @@ static int fec_phy_init(struct fec_priv *priv, > struct udevice *dev) > { > struct phy_device *phydev; > int addr; > + ofnode *phy_node; > > - addr = device_get_phy_addr(dev); > + addr = device_get_phy_addr(dev, &phy_node); > #ifdef CONFIG_FEC_MXC_PHYADDR > addr = CONFIG_FEC_MXC_PHYADDR; > #endif > @@ -1294,6 +1296,7 @@ static int fec_phy_init(struct fec_priv *priv, > struct udevice *dev) > if (!phydev) > return -ENODEV; > > + phydev->node = phy_node; > priv->phydev = phydev; > phy_config(phydev); > > > -michael ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] sandbox: use correct type reading /proc/self/maps
Compiling arch/sandbox/cpu/os.c results in an error ../arch/sandbox/cpu/os.c: In function ‘os_find_text_base’: ../arch/sandbox/cpu/os.c:823:12: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] 823 | base = (void *)addr; |^ cc1: all warnings being treated as errors The size of void* differs from that of unsigned long long on 32bit systems. Signed-off-by: Heinrich Schuchardt --- arch/sandbox/cpu/os.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 47dfb476d3..79094fb7f3 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -816,10 +816,10 @@ void *os_find_text_base(void) char *end = memchr(line, '-', len); if (end) { - unsigned long long addr; + uintptr_t addr; *end = '\0'; - if (sscanf(line, "%llx", &addr) == 1) + if (sscanf(line, "%zx", &addr) == 1) base = (void *)addr; } } -- 2.23.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] sandbox: use correct type reading /proc/self/maps
Compiling arch/sandbox/cpu/os.c results in an error ../arch/sandbox/cpu/os.c: In function ‘os_find_text_base’: ../arch/sandbox/cpu/os.c:823:12: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast] 823 | base = (void *)addr; |^ cc1: all warnings being treated as errors The size of void* differs from that of unsigned long long on 32bit systems. Signed-off-by: Heinrich Schuchardt --- arch/sandbox/cpu/os.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/sandbox/cpu/os.c b/arch/sandbox/cpu/os.c index 47dfb476d3..79094fb7f3 100644 --- a/arch/sandbox/cpu/os.c +++ b/arch/sandbox/cpu/os.c @@ -816,10 +816,10 @@ void *os_find_text_base(void) char *end = memchr(line, '-', len); if (end) { - unsigned long long addr; + uintptr_t addr; *end = '\0'; - if (sscanf(line, "%llx", &addr) == 1) + if (sscanf(line, "%zx", &addr) == 1) base = (void *)addr; } } -- 2.23.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] hush: re-sequence includes
'make tests' on a 32bit ARM system leads to In file included from ../common/cli_hush.c:79: ../include/malloc.h:364:7: error: conflicting types for ‘memset’ void* memset(void*, int, size_t); ^~ In file included from ../include/compiler.h:126, from ../include/env.h:12, from ../common/cli_hush.c:78: ../include/linux/string.h:103:15: note: previous declaration of ‘memset’ was here extern void * memset(void *,int,__kernel_size_t); ^~ In file included from ../common/cli_hush.c:79: ../include/malloc.h:365:7: error: conflicting types for ‘memcpy’ void* memcpy(void*, const void*, size_t); ^~ In file included from ../include/compiler.h:126, from ../include/env.h:12, from ../common/cli_hush.c:78: ../include/linux/string.h:106:15: note: previous declaration of ‘memcpy’ was here extern void * memcpy(void *,const void *,__kernel_size_t); ^~ According to the U-Boot coding style guide common.h should be the first include. Signed-off-by: Heinrich Schuchardt --- common/cli_hush.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/cli_hush.c b/common/cli_hush.c index 8f86e4aa4a..cf1e273485 100644 --- a/common/cli_hush.c +++ b/common/cli_hush.c @@ -75,10 +75,10 @@ #define __U_BOOT__ #ifdef __U_BOOT__ +#include /* readline */ #include #include /* malloc, free, realloc*/ #include /* isalpha, isdigit */ -#include /* readline */ #include #include #include -- 2.20.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v6 0/3] End of the MTD makefile cleanup
Hi Jagan, Jagan Teki wrote on Sat, 26 Oct 2019 15:50:06 +0530: > On Fri, Oct 25, 2019 at 11:09 PM Miquel Raynal > wrote: > > > > As rightfully pointed by Jagan, I should have dropped the dependency > > of cmd/sf.c and cmd/nand.c on mtd_uboot.c in patch 24/26 of the "MTD > > defconfigs/Kconfigs/Makefiles heavy cleanup" v5 series. > > > > Instead of sending the 40 patches again, here are only the last three > > patches with: > > * patch 1 (24/26) being corrected as per Jagan's comment > > * patch 2 (25/26) is untouched > > * patch 3 (26/26) is almost untouched but I had to resolve a conflict > > due to patch 1. > > > > Thanks, > > Miquèl > > > > Miquel Raynal (3): > > cmd: nand/sf: isolate legacy code > > cmd: make MTD commands depend on MTD > > mtd: Makefile: deep cleanup > > Reviewed-by: Jagan Teki Thanks! Who is supposed to take the two series? Miquèl ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH 1/1] efi_loader: correct includes in efi_variable.c
'make tests' on an 32bit ARM system leads to In file included from ../lib/efi_loader/efi_variable.c:9: ../include/malloc.h:364:7: error: conflicting types for ‘memset’ void* memset(void*, int, size_t); ^~ In file included from ../include/compiler.h:126, from ../include/env.h:12, from ../lib/efi_loader/efi_variable.c:8: ../include/linux/string.h:103:15: note: previous declaration of ‘memset’ was here extern void * memset(void *,int,__kernel_size_t); ^~ In file included from ../lib/efi_loader/efi_variable.c:9: ../include/malloc.h:365:7: error: conflicting types for ‘memcpy’ void* memcpy(void*, const void*, size_t); ^~ In file included from ../include/compiler.h:126, from ../include/env.h:12, from ../lib/efi_loader/efi_variable.c:8: ../include/linux/string.h:106:15: note: previous declaration of ‘memcpy’ was here extern void * memcpy(void *,const void *,__kernel_size_t); ^~ Use common.h as first include as recommended by the U-Boot coding style guide. Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/efi_variable.c | 8 +++- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index d0daf7bdeb..46f35bc60b 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -5,14 +5,12 @@ * Copyright (c) 2017 Rob Clark */ -#include -#include -#include +#include #include -#include #include +#include +#include #include -#include #define READ_ONLY BIT(31) -- 2.23.0 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] Cavium/Marvell Octeon Support
On Fri, Oct 25, 2019 at 05:13:57PM +0200, Daniel Schwierzeck wrote: > Hi Aaron, > > Am 23.10.19 um 05:50 schrieb Aaron Williams: > > Hi all, > > > > I have been tasked with porting our Octeon U-Boot to the latest U-Boot > > and merging it upstream. This will involve a very significant amount of > > code that generally will not be compatible with other MIPS processors > > due to our needs and requirements. For example, the start.S will need to > > be completely different than what is present. For example, our existing > > start.S is 3577 lines of code in order to deal with things like RAS, > > exceptions, virtual memory and more. We need to use virtual memory since > > U-Boot can be loaded at any 4MB boundary in memory, not just 0xbfc0. > > A number of drivers will need to be updated in order to properly map > > pointers to physical addresses. This is needed anyway, since I see > > numerous drivers that assume that a pointer is a DMA address. For MIPS > > this is never the case (I'm looking at XHCI). > > Good to see some progress in mainline Octeon support. Could you briefly > describe the differences and commonalities in booting an Octeon CPU > compared to other "generic" MIPS cores? Or could you point me to a > public Git tree? It can't be that different because Linux kernel is also > able to share most of the code ;) > > In principle you could compile an own start.S in your mach-octeon > directory, but you should try to use the generic start.S which is > already customisable and extensible. If needed, we could add more > extension points to it. Booting from any custom memory address is > already supported and very common for other MIPS based SoC's. Exception > support is also already there. > > > > > The new Octeon U-Boot will be native 64-bit instead of how the earlier > > one was 32-bit using the N32 ABI (so 64-bit addresses could be > > accessed). We had to jump through some hoops to make a 32-bit U-Boot > > fully support 64-bit hardware. > > We have 64 bit support for MIPS. I even sync'ed the asm/io stuff from > Linux in the past (which includes support for Octeon) so that you would > be able to use the standard IO primitives and ioremap stuff and hook in > your platform-specifc memory mappings. > > > > > I think we can shrink the code by removing support for starting "simple > > executive" tasks. Simple executive tasks are bare metal applications > > that can run on dedicated cores beside Linux (or without Linux). I will > > also not be porting any support for anything older than Octeon3. > > > > We also make heavy use of our SDK in order to perform hardware > > initialization and networking. In our old U-Boot, we have almost 900K > > lines of code. I can cut out much of this but much will remain. > > > > We also have added extensive infrastructure for handling SFP and QSFP > > cables as well as very extensive phy support for phys from > > Aquantia/Marvell, Vitesse/Microsemi, Inphi/Cortina and an Avago gearbox. > > Our customer wants us to port all of this to the new U-Boot and upstream > > it. I'm worried about the sheer amount of code since it is absolutely > > massive. > > Maybe you should cut down your customers expectations a bit. According > to sloccount we currently have 1.6M SLOC for the whole U-Boot. I guess > Tom or Wolfgang wouldn't agree with adding another 900k only for one > CPU. Actually what should be upstream is the basic CPU, driver and board > support to be able to boot a mainline kernel. Everything else like > custom bare metal applications or the SFP/PHY handling stuff mentioned > below could also be maintained in a downstream tree. Maybe Wolfgang is > willing to host one on gitlab.denx.de. > > > Some of these phy drivers are extremely complex and need to tie > > into the SFP management. We also need to use a background polling thread > > while at the command prompt. A fair bit of our phy code is not in the > > normal phy drivers because it did not fit the model. Some of these phy > > drivers need to interact with the SFP support code in order to handle > > hot plug events in order to reconfigure themselves based on the cable > > type. The existing SFP code handles everything from SFP to SFP28 as well > > as QSFP and 100G QSFP (never tested). > > > > In the old U-Boot the PHY support had to be significantly enhanced due > > to requirements for hot-plugging and how some of the PHYs are > > configured. It gets quite complicated with phys like the Inphi where one > > phy can handle either four ports (XFI/SGMII) or a single 4-lane port > > (XLAUI). It gets even worse since in some boards we use reclocking chips > > and there is one chip that handles the receive path of a QSFP and > > another that handles the transmit path. Further complicating things, > > with a QSFP it can be treated either as XLAUI or as four XFI ports, so > > you can have four ports spread across two chips, with each port using > > different slices of each chip. In the case of the Inphi/Cortina
[U-Boot] [PATCH v4 0/5] Extend mv88e61xx driver to support 88E6071
This series adds support for 88E6071 and compatible switches in the mv88e61xx driver. Changes in v4: patch 1 - rework to drop Kconfig option for MV88E6020 family selection: detect switch ID in mv88e61xx_priv_reg_offs_pre_init() and initialize the required port and global register offsets depending on the detected ID - patch 4 v3 is not required any more, drop it - add switch ID detection for 6020, 6070, 6220 and 6250 - reword comments and fix spelling (s/initialised/initialized/) No changes in patches 2, 3, 4, 5 Changes in v3: - Add Reviewed-/Tested-by tags patch 1 - drop DEVADDR_PORT to avoid macros with local variable - describe variables added to priv struct - reword comments in mv88e61xx_priv_reg_offs_pre_init() - add comment in get_phy_id() to explain why calling mv88e61xx_priv_reg_offs_pre_init() is required patch 2 - remove unused PORT_REG_STATUS_SPEED_WIDTH macro patch 4 - describe model numbers in numerical order Changes in v2: - fix port init for 6096/6097 devices in patch 1/6 - update commit description in patch 4/6 Anatolij Gustschin (5): net: phy: mv88e61xx: rework to enable detection of 88E6071 devices net: phy: mv88e61xx: add CPU port parameter init for 88E6071 net: phy: mv88E61xx: fix ENERGY_DET init for mv88E6071 net: phy: mv88e61xx: register phy_driver struct for 88E6071 net: phy: fix switch vendor name drivers/net/phy/Kconfig | 2 +- drivers/net/phy/mv88e61xx.c | 220 +--- 2 files changed, 179 insertions(+), 43 deletions(-) -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 3/5] net: phy: mv88E61xx: fix ENERGY_DET init for mv88E6071
On mv88E6071 the 'EDet' field offset, width and sense control bits are different, adjust the driver to init the PHY control register as needed. This fixes not working link detection and tftp transfers. Signed-off-by: Anatolij Gustschin Reviewed-by: Chris Packham Tested-by: Chris Packham Acked-by: Joe Hershberger --- drivers/net/phy/mv88e61xx.c | 22 -- 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index b692db5514..52b3272730 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -117,14 +117,12 @@ #define SERDES_REG_CTRL_1_FORCE_LINK BIT(10) -#define PHY_REG_CTRL1_ENERGY_DET_SHIFT 8 -#define PHY_REG_CTRL1_ENERGY_DET_WIDTH 2 - /* Field values */ #define PORT_REG_CTRL_PSTATE_DISABLED 0 #define PORT_REG_CTRL_PSTATE_FORWARD 3 #define PHY_REG_CTRL1_ENERGY_DET_OFF 0 +#define PHY_REG_CTRL1_ENERGY_DET_SENSE_PULSE 1 #define PHY_REG_CTRL1_ENERGY_DET_SENSE_ONLY2 #define PHY_REG_CTRL1_ENERGY_DET_SENSE_XMIT3 @@ -198,6 +196,9 @@ struct mv88e61xx_phy_priv { u8 port_stat_speed_width;/* Width of speed status bitfield */ u8 global1; /* Offset of Switch Global 1 registers */ u8 global2; /* Offset of Switch Global 2 registers */ + u8 phy_ctrl1_en_det_shift; /* 'EDet' bit field offset */ + u8 phy_ctrl1_en_det_width; /* Width of 'EDet' bit field */ + u8 phy_ctrl1_en_det_ctrl; /* 'EDet' control value */ }; static inline int smi_cmd(int cmd, int addr, int reg) @@ -846,6 +847,7 @@ static int mv88e61xx_phy_enable(struct phy_device *phydev, u8 phy) static int mv88e61xx_phy_setup(struct phy_device *phydev, u8 phy) { + struct mv88e61xx_phy_priv *priv = phydev->priv; int val; /* @@ -855,9 +857,9 @@ static int mv88e61xx_phy_setup(struct phy_device *phydev, u8 phy) val = mv88e61xx_phy_read(phydev, phy, PHY_REG_CTRL1); if (val < 0) return val; - val = bitfield_replace(val, PHY_REG_CTRL1_ENERGY_DET_SHIFT, - PHY_REG_CTRL1_ENERGY_DET_WIDTH, - PHY_REG_CTRL1_ENERGY_DET_SENSE_XMIT); + val = bitfield_replace(val, priv->phy_ctrl1_en_det_shift, + priv->phy_ctrl1_en_det_width, + priv->phy_ctrl1_en_det_ctrl); val = mv88e61xx_phy_write(phydev, phy, PHY_REG_CTRL1, val); if (val < 0) return val; @@ -994,6 +996,10 @@ static int mv88e61xx_probe(struct phy_device *phydev) priv->port_stat_link_mask = BIT(11); priv->port_stat_dup_mask = BIT(10); priv->port_stat_speed_width = 2; + priv->phy_ctrl1_en_det_shift = 8; + priv->phy_ctrl1_en_det_width = 2; + priv->phy_ctrl1_en_det_ctrl = + PHY_REG_CTRL1_ENERGY_DET_SENSE_XMIT; break; case PORT_SWITCH_ID_6020: case PORT_SWITCH_ID_6070: @@ -1004,6 +1010,10 @@ static int mv88e61xx_probe(struct phy_device *phydev) priv->port_stat_link_mask = BIT(12); priv->port_stat_dup_mask = BIT(9); priv->port_stat_speed_width = 1; + priv->phy_ctrl1_en_det_shift = 14; + priv->phy_ctrl1_en_det_width = 1; + priv->phy_ctrl1_en_det_ctrl = + PHY_REG_CTRL1_ENERGY_DET_SENSE_PULSE; break; default: free(priv); -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 2/5] net: phy: mv88e61xx: add CPU port parameter init for 88E6071
On 88E6071 chip the port status register bit field offsets for duplex and link bits differ. Extend the driver to use 88E6071 specific offset values. The width of bit fields for speed status differ, too. Adapt for proper port speed detection on 88E6071. Signed-off-by: Anatolij Gustschin Reviewed-by: Chris Packham Tested-by: Chris Packham Acked-by: Joe Hershberger --- drivers/net/phy/mv88e61xx.c | 42 - 1 file changed, 28 insertions(+), 14 deletions(-) diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index 56561c22ee..b692db5514 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -84,11 +84,7 @@ #define GLOBAL1_MON_CTRL_CPUDEST_SHIFT 4 #define GLOBAL1_MON_CTRL_CPUDEST_WIDTH 4 -#define PORT_REG_STATUS_LINK BIT(11) -#define PORT_REG_STATUS_DUPLEX BIT(10) - #define PORT_REG_STATUS_SPEED_SHIFT8 -#define PORT_REG_STATUS_SPEED_WIDTH2 #define PORT_REG_STATUS_SPEED_10 0 #define PORT_REG_STATUS_SPEED_100 1 #define PORT_REG_STATUS_SPEED_1000 2 @@ -107,6 +103,7 @@ #define PORT_REG_PHYS_CTRL_DUPLEX_VALUEBIT(3) #define PORT_REG_PHYS_CTRL_DUPLEX_FORCEBIT(2) #define PORT_REG_PHYS_CTRL_SPD1000 BIT(1) +#define PORT_REG_PHYS_CTRL_SPD100 BIT(0) #define PORT_REG_PHYS_CTRL_SPD_MASK(BIT(1) | BIT(0)) #define PORT_REG_CTRL_PSTATE_SHIFT 0 @@ -196,6 +193,9 @@ struct mv88e61xx_phy_priv { int id; int port_count; /* Number of switch ports */ int port_reg_base; /* Base of the switch port registers */ + u16 port_stat_link_mask;/* Bitmask for port link status bits */ + u16 port_stat_dup_mask; /* Bitmask for port duplex status bits */ + u8 port_stat_speed_width;/* Width of speed status bitfield */ u8 global1; /* Offset of Switch Global 1 registers */ u8 global2; /* Offset of Switch Global 2 registers */ }; @@ -644,6 +644,7 @@ static int mv88e61xx_port_set_vlan(struct phy_device *phydev, u8 port, static int mv88e61xx_read_port_config(struct phy_device *phydev, u8 port) { + struct mv88e61xx_phy_priv *priv = phydev->priv; int res; int val; bool forced = false; @@ -651,7 +652,7 @@ static int mv88e61xx_read_port_config(struct phy_device *phydev, u8 port) val = mv88e61xx_port_read(phydev, port, PORT_REG_STATUS); if (val < 0) return val; - if (!(val & PORT_REG_STATUS_LINK)) { + if (!(val & priv->port_stat_link_mask)) { /* Temporarily force link to read port configuration */ u32 timeout = 100; forced = true; @@ -674,7 +675,7 @@ static int mv88e61xx_read_port_config(struct phy_device *phydev, u8 port) res = -EIO; goto unforce; } - if (val & PORT_REG_STATUS_LINK) + if (val & priv->port_stat_link_mask) break; } while (--timeout); @@ -684,13 +685,13 @@ static int mv88e61xx_read_port_config(struct phy_device *phydev, u8 port) } } - if (val & PORT_REG_STATUS_DUPLEX) + if (val & priv->port_stat_dup_mask) phydev->duplex = DUPLEX_FULL; else phydev->duplex = DUPLEX_HALF; val = bitfield_extract(val, PORT_REG_STATUS_SPEED_SHIFT, - PORT_REG_STATUS_SPEED_WIDTH); + priv->port_stat_speed_width); switch (val) { case PORT_REG_STATUS_SPEED_1000: phydev->speed = SPEED_1000; @@ -723,6 +724,7 @@ unforce: static int mv88e61xx_fixed_port_setup(struct phy_device *phydev, u8 port) { + struct mv88e61xx_phy_priv *priv = phydev->priv; int val; val = mv88e61xx_port_read(phydev, port, PORT_REG_PHYS_CTRL); @@ -730,13 +732,19 @@ static int mv88e61xx_fixed_port_setup(struct phy_device *phydev, u8 port) return val; val &= ~(PORT_REG_PHYS_CTRL_SPD_MASK | -PORT_REG_PHYS_CTRL_FC_VALUE); - val |= PORT_REG_PHYS_CTRL_PCS_AN_EN | - PORT_REG_PHYS_CTRL_PCS_AN_RST | - PORT_REG_PHYS_CTRL_FC_FORCE | +PORT_REG_PHYS_CTRL_FC_VALUE | +PORT_REG_PHYS_CTRL_FC_FORCE); + val |= PORT_REG_PHYS_CTRL_FC_FORCE | PORT_REG_PHYS_CTRL_DUPLEX_VALUE | - PORT_REG_PHYS_CTRL_DUPLEX_FORCE | - PORT_REG_PHYS_CTRL_SPD1000; + PORT_REG_PHYS_CTRL_DUPLEX_FORCE; + + if (priv->id == PORT_SWITCH_ID_6071) { + val |= PORT_REG_PHYS_CTRL_SPD100; + } else { + val |= PORT_REG_PHYS_CTRL_PCS_AN_EN | + PORT_REG_PHYS_CTRL_PCS_AN_RST | + PORT_REG_PHYS_CTRL_SPD1000; + } if (port == CONFIG_MV88E61XX_CPU_PORT)
[U-Boot] [PATCH v4 5/5] net: phy: fix switch vendor name
Fix vendor name in MV88E61xx option description. Signed-off-by: Anatolij Gustschin Reviewed-by: Chris Packham Tested-by: Chris Packham Acked-by: Joe Hershberger --- drivers/net/phy/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 30bd8e7653..ac044c8f36 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -46,7 +46,7 @@ config B53_PHY_PORTS endif # B53_SWITCH config MV88E61XX_SWITCH - bool "Marvel MV88E61xx Ethernet switch PHY support." + bool "Marvell MV88E61xx Ethernet switch PHY support." if MV88E61XX_SWITCH -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 4/5] net: phy: mv88e61xx: register phy_driver struct for 88E6071
Support probing and init for 88E6071 switch. Signed-off-by: Anatolij Gustschin Reviewed-by: Chris Packham Tested-by: Chris Packham Acked-by: Joe Hershberger --- drivers/net/phy/mv88e61xx.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index 52b3272730..f09e689a35 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -1154,10 +1154,22 @@ static struct phy_driver mv88e609x_driver = { .shutdown = &genphy_shutdown, }; +static struct phy_driver mv88e6071_driver = { + .name = "Marvell MV88E6071", + .uid = 0x1410db0, + .mask = 0xfff0, + .features = PHY_BASIC_FEATURES | SUPPORTED_MII, + .probe = mv88e61xx_probe, + .config = mv88e61xx_phy_config, + .startup = mv88e61xx_phy_startup, + .shutdown = &genphy_shutdown, +}; + int phy_mv88e61xx_init(void) { phy_register(&mv88e61xx_driver); phy_register(&mv88e609x_driver); + phy_register(&mv88e6071_driver); return 0; } -- 2.17.1 ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
[U-Boot] [PATCH v4 1/5] net: phy: mv88e61xx: rework to enable detection of 88E6071 devices
Extend the driver to init switch register offsets from variables instead of compile time macros and enable detection of 88E6071 and compatible devices. Ethernet transfer (e.g. tftp) does not work yet, so enable the registration of the 'indirect mii' bus for easier PHY register access by 'mii' command. Signed-off-by: Anatolij Gustschin --- drivers/net/phy/mv88e61xx.c | 144 ++-- 1 file changed, 122 insertions(+), 22 deletions(-) diff --git a/drivers/net/phy/mv88e61xx.c b/drivers/net/phy/mv88e61xx.c index c1e2860329..56561c22ee 100644 --- a/drivers/net/phy/mv88e61xx.c +++ b/drivers/net/phy/mv88e61xx.c @@ -39,15 +39,11 @@ #define PHY_AUTONEGOTIATE_TIMEOUT 5000 -#define PORT_COUNT 11 -#define PORT_MASK ((1 << PORT_COUNT) - 1) +#define PORT_MASK(port_count) ((1 << (port_count)) - 1) /* Device addresses */ #define DEVADDR_PHY(p) (p) -#define DEVADDR_PORT(p)(0x10 + (p)) #define DEVADDR_SERDES 0x0F -#define DEVADDR_GLOBAL_1 0x1B -#define DEVADDR_GLOBAL_2 0x1C /* SMI indirection registers for multichip addressing mode */ #define SMI_CMD_REG0x00 @@ -182,17 +178,26 @@ #endif /* ID register values for different switch models */ +#define PORT_SWITCH_ID_60200x0200 +#define PORT_SWITCH_ID_60700x0700 +#define PORT_SWITCH_ID_60710x0710 #define PORT_SWITCH_ID_60960x0980 #define PORT_SWITCH_ID_60970x0990 #define PORT_SWITCH_ID_61720x1720 #define PORT_SWITCH_ID_61760x1760 +#define PORT_SWITCH_ID_62200x2200 #define PORT_SWITCH_ID_62400x2400 +#define PORT_SWITCH_ID_62500x2500 #define PORT_SWITCH_ID_63520x3520 struct mv88e61xx_phy_priv { struct mii_dev *mdio_bus; int smi_addr; int id; + int port_count; /* Number of switch ports */ + int port_reg_base; /* Base of the switch port registers */ + u8 global1; /* Offset of Switch Global 1 registers */ + u8 global2; /* Offset of Switch Global 2 registers */ }; static inline int smi_cmd(int cmd, int addr, int reg) @@ -329,11 +334,12 @@ static int mv88e61xx_reg_write(struct phy_device *phydev, int dev, int reg, static int mv88e61xx_phy_wait(struct phy_device *phydev) { + struct mv88e61xx_phy_priv *priv = phydev->priv; int val; u32 timeout = 100; do { - val = mv88e61xx_reg_read(phydev, DEVADDR_GLOBAL_2, + val = mv88e61xx_reg_read(phydev, priv->global2, GLOBAL2_REG_PHY_CMD); if (val >= 0 && (val & SMI_BUSY) == 0) return 0; @@ -347,13 +353,15 @@ static int mv88e61xx_phy_wait(struct phy_device *phydev) static int mv88e61xx_phy_read_indirect(struct mii_dev *smi_wrapper, int dev, int devad, int reg) { + struct mv88e61xx_phy_priv *priv; struct phy_device *phydev; int res; phydev = (struct phy_device *)smi_wrapper->priv; + priv = phydev->priv; /* Issue command to read */ - res = mv88e61xx_reg_write(phydev, DEVADDR_GLOBAL_2, + res = mv88e61xx_reg_write(phydev, priv->global2, GLOBAL2_REG_PHY_CMD, smi_cmd_read(dev, reg)); @@ -363,25 +371,27 @@ static int mv88e61xx_phy_read_indirect(struct mii_dev *smi_wrapper, int dev, return res; /* Read retrieved data */ - return mv88e61xx_reg_read(phydev, DEVADDR_GLOBAL_2, + return mv88e61xx_reg_read(phydev, priv->global2, GLOBAL2_REG_PHY_DATA); } static int mv88e61xx_phy_write_indirect(struct mii_dev *smi_wrapper, int dev, int devad, int reg, u16 data) { + struct mv88e61xx_phy_priv *priv; struct phy_device *phydev; int res; phydev = (struct phy_device *)smi_wrapper->priv; + priv = phydev->priv; /* Set the data to write */ - res = mv88e61xx_reg_write(phydev, DEVADDR_GLOBAL_2, + res = mv88e61xx_reg_write(phydev, priv->global2, GLOBAL2_REG_PHY_DATA, data); if (res < 0) return res; /* Issue the write command */ - res = mv88e61xx_reg_write(phydev, DEVADDR_GLOBAL_2, + res = mv88e61xx_reg_write(phydev, priv->global2, GLOBAL2_REG_PHY_CMD, smi_cmd_write(dev, reg)); if (res < 0) @@ -408,13 +418,18 @@ static int mv88e61xx_phy_write(struct phy_device *phydev, int phy, static int mv88e61xx_port_read(struct phy_device *phydev, u8 port, u8 reg) { - return mv88e61xx_reg_read(phydev, DEVADDR_PORT(port), reg); + struct mv88e61xx_phy_priv *priv = phydev-
Re: [U-Boot] [PATCH v2 4/6] net: phy: mv88E61xx: add config option for mv88E6071 support
Hi Joe, On Tue, 3 Sep 2019 22:00:08 + Joe Hershberger joe.hershber...@ni.com wrote: > On Mon, Jul 29, 2019 at 6:17 PM Joe Hershberger > wrote: > > > > On Thu, Jul 25, 2019 at 4:42 PM Anatolij Gustschin wrote: > > > > > > On Tue, 23 Jul 2019 04:26:17 + > > > Joe Hershberger joe.hershber...@ni.com wrote: > > > ... > > > > > +config MV88E61XX_88E6020_FAMILY > > > > > + bool "Marvell MV88E6020 family support." > > > > > + help > > > > > + The driver supports 6172/6176/6240/6352 devices in the > > > > > + default configuration. Select this option to enable support > > > > > + for 6250/6220/6020/6070/6071 switches. > > > > > > > > Is there a rhyme or reason to the model numbers here? This option > > > > seems oddly named, especially since the help doesn't have the model > > > > numbers in numerical order. Can you make it a choice instead? > > > > > > We want to be able to use single U-Boot images which support different > > > switches, a choice will make it not possible. > > > > I don't see how choice is any different than what you have here in > > that respect. You have a hard-coded selection among families. If you > > have a need to run the same binary on multiple switches, then this > > option should be removed and the pre-init should be detecting the > > target. > > Any response here? Sorry for delay, I've been too busy with other stuff. v4 patch series was reworked to drop this config option. Thanks! -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [PATCH v3 1/6] net: phy: mv88e61xx: rework to enable detection of 88E6071 devices
Hi Joe, On Mon, 29 Jul 2019 18:35:47 -0500 Joe Hershberger joe.hershber...@gmail.com wrote: ... > > +* initialised yet. Do this initialisation here before indirect > > initialised -> initialized > initialisation -> initialization Fixed in v4 series. Thanks! -- Anatolij ___ U-Boot mailing list U-Boot@lists.denx.de https://lists.denx.de/listinfo/u-boot
Re: [U-Boot] [EXT] Re: Cavium/Marvell Octeon Support
Hi Daniel, On Friday, October 25, 2019 8:13:57 AM PDT Daniel Schwierzeck wrote: > External Email > > -- > Hi Aaron, > > Am 23.10.19 um 05:50 schrieb Aaron Williams: > > Hi all, > > > > I have been tasked with porting our Octeon U-Boot to the latest U-Boot > > and merging it upstream. This will involve a very significant amount of > > code that generally will not be compatible with other MIPS processors > > due to our needs and requirements. For example, the start.S will need to > > be completely different than what is present. For example, our existing > > start.S is 3577 lines of code in order to deal with things like RAS, > > exceptions, virtual memory and more. We need to use virtual memory since > > U-Boot can be loaded at any 4MB boundary in memory, not just 0xbfc0. > > A number of drivers will need to be updated in order to properly map > > pointers to physical addresses. This is needed anyway, since I see > > numerous drivers that assume that a pointer is a DMA address. For MIPS > > this is never the case (I'm looking at XHCI). > > Good to see some progress in mainline Octeon support. Could you briefly > describe the differences and commonalities in booting an Octeon CPU > compared to other "generic" MIPS cores? Or could you point me to a > public Git tree? It can't be that different because Linux kernel is also > able to share most of the code ;) > Actually the low level code is significantly different. First of all, we need the U-Boot bootloader to be able to boot from different memory locations. Because of this, we use mapped memory for U-Boot. A side effect of this is that it eliminates the need for relocation when it is shifted to the top of memory. All we need to do is just set a couple of TLB entries. The assembly code is significantly different and is far more extensive. Additionally, the way Octeon Linux is booted is different. The generic start.S is not usable in our case. We have a significant amount of code for dealing with the cache and for things like copying U-Boot from flash into the L2 cache. We also have to deal with taking other cores out of reset in our start.S. Our exception handler has also been extended to handle multiple cores. Some other things we have included are a native API that allows Simple Executive applications to make calls into U-Boot for such things as environment variable access as well as access to block devices and filesystems. We used to have our Octeon SDK available for download but it seems this has been taken down :( I'm trying to find out how I can make it available but I'm getting pushback in sharing our GPLed U-Boot even though it is GPL. > In principle you could compile an own start.S in your mach-octeon > directory, but you should try to use the generic start.S which is > already customisable and extensible. If needed, we could add more > extension points to it. Booting from any custom memory address is > already supported and very common for other MIPS based SoC's. Exception > support is also already there. > The bootloader needs to be able to start from multiple memory locations without recompiling. Our existing bootloader can run from any 4MB boundary without recompiling or relocation. It can start out of flash (from any sector boundary, not just 0) or L2 cache. Starting by L2 cache is supported by eMMC, SPI and PCI target bootloaders. Additionally the same bootloader can be started from RAM such as when the failsafe bootloader starts the main bootloader. In most cases, the failsafe is the same full-featured bootloader since it fits entirely within the L2 cache. Our only bootloader requirement is that it fits in the L2 cache (except when booting from Flash, though this is preferred for speed) and that it remain under 4 MiB in size. I believe our exception handling is more extensive than the standard U-Boot exception handler. It includes the stack output as well as numerous COP0 registers and decoding the cause of the exception. The exception handler is also independent of a working C environment. We also need to handle exceptions occurring on multiple cores as they're brought out of reset and not all cases are exceptions. Cores are first powered on and kept in a halted state, then later when we start the Linux kernel or simple executive applications, the exception handler is updated (via a bootbus moveable memory region) and an NMI is generated for the cores where they will begin executing code out of start.S before moving to the code that sets up the environment for booting Linux and/or simple executive applications. In the latter case, TLB entries are programmed in for each core. > > The new Octeon U-Boot will be native 64-bit instead of how the earlier > > one was 32-bit using the N32 ABI (so 64-bit addresses could be > > accessed). We had to jump through some hoops to make a 32-bit U-Boot > > fully support 64-bit hardware.
Re: [U-Boot] [EXT] Re: Cavium/Marvell Octeon Support
On Saturday, October 26, 2019 3:15:36 PM PDT Tom Rini wrote: > External Email > > -- > > On Fri, Oct 25, 2019 at 05:13:57PM +0200, Daniel Schwierzeck wrote: > > Hi Aaron, > > > > Am 23.10.19 um 05:50 schrieb Aaron Williams: > > > Hi all, > > > > > > I have been tasked with porting our Octeon U-Boot to the latest U-Boot > > > and merging it upstream. This will involve a very significant amount of > > > code that generally will not be compatible with other MIPS processors > > > due to our needs and requirements. For example, the start.S will need to > > > be completely different than what is present. For example, our existing > > > start.S is 3577 lines of code in order to deal with things like RAS, > > > exceptions, virtual memory and more. We need to use virtual memory since > > > U-Boot can be loaded at any 4MB boundary in memory, not just 0xbfc0. > > > A number of drivers will need to be updated in order to properly map > > > pointers to physical addresses. This is needed anyway, since I see > > > numerous drivers that assume that a pointer is a DMA address. For MIPS > > > this is never the case (I'm looking at XHCI). > > > > Good to see some progress in mainline Octeon support. Could you briefly > > describe the differences and commonalities in booting an Octeon CPU > > compared to other "generic" MIPS cores? Or could you point me to a > > public Git tree? It can't be that different because Linux kernel is also > > able to share most of the code ;) > > > > In principle you could compile an own start.S in your mach-octeon > > directory, but you should try to use the generic start.S which is > > already customisable and extensible. If needed, we could add more > > extension points to it. Booting from any custom memory address is > > already supported and very common for other MIPS based SoC's. Exception > > support is also already there. > > > > > The new Octeon U-Boot will be native 64-bit instead of how the earlier > > > one was 32-bit using the N32 ABI (so 64-bit addresses could be > > > accessed). We had to jump through some hoops to make a 32-bit U-Boot > > > fully support 64-bit hardware. > > > > We have 64 bit support for MIPS. I even sync'ed the asm/io stuff from > > Linux in the past (which includes support for Octeon) so that you would > > be able to use the standard IO primitives and ioremap stuff and hook in > > your platform-specifc memory mappings. > > > > > I think we can shrink the code by removing support for starting "simple > > > executive" tasks. Simple executive tasks are bare metal applications > > > that can run on dedicated cores beside Linux (or without Linux). I will > > > also not be porting any support for anything older than Octeon3. > > > > > > We also make heavy use of our SDK in order to perform hardware > > > initialization and networking. In our old U-Boot, we have almost 900K > > > lines of code. I can cut out much of this but much will remain. > > > > > > We also have added extensive infrastructure for handling SFP and QSFP > > > cables as well as very extensive phy support for phys from > > > Aquantia/Marvell, Vitesse/Microsemi, Inphi/Cortina and an Avago gearbox. > > > Our customer wants us to port all of this to the new U-Boot and upstream > > > it. I'm worried about the sheer amount of code since it is absolutely > > > massive. > > > > Maybe you should cut down your customers expectations a bit. According > > to sloccount we currently have 1.6M SLOC for the whole U-Boot. I guess > > Tom or Wolfgang wouldn't agree with adding another 900k only for one > > CPU. Actually what should be upstream is the basic CPU, driver and board > > support to be able to boot a mainline kernel. Everything else like > > custom bare metal applications or the SFP/PHY handling stuff mentioned > > below could also be maintained in a downstream tree. Maybe Wolfgang is > > willing to host one on gitlab.denx.de. > > > > > Some of these phy drivers are extremely complex and need to tie > > > into the SFP management. We also need to use a background polling thread > > > while at the command prompt. A fair bit of our phy code is not in the > > > normal phy drivers because it did not fit the model. Some of these phy > > > drivers need to interact with the SFP support code in order to handle > > > hot plug events in order to reconfigure themselves based on the cable > > > type. The existing SFP code handles everything from SFP to SFP28 as well > > > as QSFP and 100G QSFP (never tested). > > > > > > In the old U-Boot the PHY support had to be significantly enhanced due > > > to requirements for hot-plugging and how some of the PHYs are > > > configured. It gets quite complicated with phys like the Inphi where one > > > phy can handle either four ports (XFI/SGMII) or a single 4-lane port > > > (XLAUI). It gets even worse since in some boards we use reclocking chips > > > and there is one chip that handles the receiv