Re: [U-Boot] [PATCH v3 07/13] regmap: Add raw read/write functions

[Mario Six]

Hi Anatolij,

On Thu, Aug 2, 2018 at 12:01 AM, Anatolij Gustschin  wrote:
> Hi Mario,
>
> On Tue, 31 Jul 2018 12:01:04 +0200
> Mario Six mario@gdsys.cc wrote:
>
>> The regmap functions currently assume that all register map accesses
>> have a data width of 32 bits, but there are maps that have different
>> widths.
>>
>> To rectify this, implement the regmap_raw_read and regmap_raw_write
>> functions from the Linux kernel API that specify the width of a desired
>> read or write operation on a regmap.
>>
>> Implement the regmap_read and regmap_write functions using these raw
>> functions in a backwards-compatible manner.
>>
>> Signed-off-by: Mario Six 
>
> Reviewed-by: Anatolij Gustschin 
>
> Please see some comments below.
>
> ...
>> +int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t 
>> val_len)
>> +{
>> + void *ptr;
>> +
>> + ptr = map_physmem(map->ranges[0] + offset, val_len, MAP_NOCACHE);
>
> shouldn't this be
>
>ptr = map_physmem(map->ranges[0].start + offset, val_len, MAP_NOCACHE);
> ?
>
> It works as is, but it is better to be explicit about the start address.
>

Yes, better be explicit here. I'll have that fixed in v4.

> ...
>> +int regmap_raw_write(struct regmap *map, uint offset, const void *val,
>> +  size_t val_len)
>> +{
>> + void *ptr;
>> +
>> + ptr = map_physmem(map->ranges[0] + offset, val_len, MAP_NOCACHE);
>
> map->ranges[0].start + offset ?
>

Dito, will be fixed in v4.

Thanks for reviewing!

> --
> Anatolij
>

Best regards,
Mario
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Re: [U-Boot] [PATCH v3 07/13] regmap: Add raw read/write functions

[Mario Six]

Hi Simon,

On Thu, Aug 2, 2018 at 2:20 PM, Simon Glass  wrote:
> Hi Mario,
>
> On 31 July 2018 at 04:01, Mario Six  wrote:
>> The regmap functions currently assume that all register map accesses
>> have a data width of 32 bits, but there are maps that have different
>> widths.
>>
>> To rectify this, implement the regmap_raw_read and regmap_raw_write
>> functions from the Linux kernel API that specify the width of a desired
>> read or write operation on a regmap.
>>
>> Implement the regmap_read and regmap_write functions using these raw
>> functions in a backwards-compatible manner.
>>
>> Signed-off-by: Mario Six 
>> ---
>>
>> v2 -> v3:
>> * Implement the "raw" functions from Linux instead of adding a size
>>   parameter to the regmap_{read,write} functions
>> * Fixed style violation
>> * Improved error handling
>>
>> v1 -> v2:
>> New in v2
>>
>> ---
>>  drivers/core/regmap.c | 54 
>> ---
>>  include/regmap.h  | 40 ++
>>  2 files changed, 87 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
>> index 3488361ee14..83ca19a08a4 100644
>> --- a/drivers/core/regmap.c
>> +++ b/drivers/core/regmap.c
>> @@ -188,22 +188,62 @@ int regmap_uninit(struct regmap *map)
>> return 0;
>>  }
>>
>> +int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t 
>> val_len)
>> +{
>> +   void *ptr;
>> +
>> +   ptr = map_physmem(map->ranges[0] + offset, val_len, MAP_NOCACHE);
>> +
>> +   switch (val_len) {
>> +   case REGMAP_SIZE_8:
>> +   *((u8 *)valp) = in_8((u8 *)ptr);
>> +   break;
>> +   case REGMAP_SIZE_16:
>> +   *((u16 *)valp) = in_le16((u16 *)ptr);
>> +   break;
>> +   case REGMAP_SIZE_32:
>> +   *((u32 *)valp) = in_le32((u32 *)ptr);
>> +   break;
>> +   default:
>> +   debug("%s: regmap size %u unknown\n", __func__, val_len);
>> +   return -EINVAL;
>> +   }
>> +   return 0;
>> +}
>> +
>>  int regmap_read(struct regmap *map, uint offset, uint *valp)
>>  {
>> -   u32 *ptr = map_physmem(map->ranges[0].start + offset, 4, 
>> MAP_NOCACHE);
>> +   return regmap_raw_read(map, offset, valp, REGMAP_SIZE_32);
>> +}
>>
>> -   *valp = le32_to_cpu(readl(ptr));
>> +int regmap_raw_write(struct regmap *map, uint offset, const void *val,
>> +size_t val_len)
>> +{
>> +   void *ptr;
>> +
>> +   ptr = map_physmem(map->ranges[0] + offset, val_len, MAP_NOCACHE);
>> +
>> +   switch (val_len) {
>> +   case REGMAP_SIZE_8:
>> +   out_8((u8 *)ptr, *((u8 *)val));
>> +   break;
>> +   case REGMAP_SIZE_16:
>> +   out_le16((u16 *)ptr, *((u16 *)val));
>> +   break;
>> +   case REGMAP_SIZE_32:
>> +   out_le32((u32 *)ptr, *((u32 *)val));
>> +   break;
>> +   default:
>> +   debug("%s: regmap size %u unknown\n", __func__, val_len);
>> +   return -EINVAL;
>> +   }
>>
>> return 0;
>>  }
>>
>>  int regmap_write(struct regmap *map, uint offset, uint val)
>>  {
>> -   u32 *ptr = map_physmem(map->ranges[0].start + offset, 4, 
>> MAP_NOCACHE);
>> -
>> -   writel(cpu_to_le32(val), ptr);
>> -
>> -   return 0;
>> +   return regmap_raw_write(map, offset, &val, REGMAP_SIZE_32);
>>  }
>>
>>  int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val)
>> diff --git a/include/regmap.h b/include/regmap.h
>> index 32f75e06f59..352851c715b 100644
>> --- a/include/regmap.h
>> +++ b/include/regmap.h
>> @@ -8,6 +8,19 @@
>>  #define __REGMAP_H
>>
>>  /**
>> + * enum regmap_size_t - Access sizes for fpgamap reads and writes
>> + *
>> + * @REGMAP_SIZE_8: 8-bit read/write access size
>> + * @REGMAP_SIZE_16: 16-bit read/write access size
>> + * @REGMAP_SIZE_32: 32-bit read/write access size
>> + */
>> +enum regmap_size_t {
>> +   REGMAP_SIZE_8 = 1,
>> +   REGMAP_SIZE_16 = 2,
>> +   REGMAP_SIZE_32 = 4,
>> +};
>> +
>> +/**
>>   * struct regmap_range - a register map range
>>   *
>>   * @start: Start address
>> @@ -57,6 +70,33 @@ int regmap_write(struct regmap *map, uint offset, uint 
>> val);
>>   */
>>  int regmap_read(struct regmap *map, uint offset, uint *valp);
>>
>> +/**
>> + * regmap_raw_write() - Write a value of specified length to a regmap
>> + *
>
> Please explain the meaning of 'raw' here. Also please update the
> non-raw ones to explain that meaning.
>

OK, I'll explain the difference in v4.

>> + * @map:   Regmap to write to
>> + * @offset:Offset in the regmap to write to
>> + * @val:   Value to write to the regmap at the specified offset
>> + * @val_len:   Length of the data to be written to the regmap
>> + *
>> + * Return: 0 if OK, -ve on error
>> + */
>> +int regmap_raw_write(struct regmap *map, uint offset, const void *val,
>> +size_t val_len);

Re: [U-Boot] [PATCH v3 05/13] regmap: Introduce init_range

[Mario Six]

Hi Simon,

On Thu, Aug 2, 2018 at 2:21 PM, Simon Glass  wrote:
> On 31 July 2018 at 04:01, Mario Six  wrote:
>> Both fdtdec_get_addr_size_fixed and of_address_to_resource can fail with
>> an error, which is not currently checked during regmap initialization.
>>
>> Since the indentation depth is already quite deep, extract a new
>> 'init_range' method to do the initialization.
>>
>> Signed-off-by: Mario Six 
>> ---
>>
>> v2 -> v3:
>> New in v3
>>
>> ---
>>  drivers/core/regmap.c | 68 
>> ++-
>>  1 file changed, 56 insertions(+), 12 deletions(-)
>
> Reviewed-by: Simon Glass 
>
> nit below
>
>>
>> diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
>> index 4ebab233490..51d9cadc510 100644
>> --- a/drivers/core/regmap.c
>> +++ b/drivers/core/regmap.c
>> @@ -56,6 +56,58 @@ int regmap_init_mem_platdata(struct udevice *dev, 
>> fdt_val_t *reg, int count,
>> return 0;
>>  }
>>  #else
>> +/**
>> + * init_range() - Initialize a single range of a regmap
>> + * @node: Device node that will use the map in question
>> + * @range:Pointer to a regmap_range structure that will be initialized
>> + * @addr_len: The length of the addr parts of the reg property
>> + * @size_len: The length of the size parts of the reg property
>> + * @index:The index of the range to initialize
>> + *
>> + * This function will read the necessary 'reg' information from the device 
>> tree
>> + * (the 'addr' part, and the 'length' part), and initialize the range in
>> + * quesion.
>> + *
>> + * Return: 0 if OK, -ve on error
>> + */
>> +static int init_range(ofnode node, struct regmap_range *range, int addr_len,
>> + int size_len, int index)
>> +{
>> +   fdt_size_t sz;
>> +   struct resource r;
>> +
>> +   if (of_live_active()) {
>> +   int ret;
>> +
>> +   ret = of_address_to_resource(ofnode_to_np(node),
>> +index, &r);
>> +   if (ret) {
>> +   debug("%s: Could not read resource of range %d (ret 
>> = %d)\n",
>> + ofnode_get_name(node), index, ret);
>> +   return ret;
>> +   }
>> +
>> +   range->start = r.start;
>> +   range->size = r.end - r.start + 1;
>> +
>> +   return 0;
>> +   }
>
> I wonder about having an else here? That makes it clear that this
> function has two implementations.
>

OK, shouldn't be a problem. I originally didn't put the else in because of the
length of the fdtdec_get_add_size_fixed call, but I can extract the
ofnode_to_offset into a "offset" variable, which should make the line more
easily indentable.

>> +
>> +   range->start = fdtdec_get_addr_size_fixed(gd->fdt_blob,
>> + ofnode_to_offset(node),
>> + "reg", index, addr_len,
>> + size_len, &sz, true);
>> +   if (range->start == FDT_ADDR_T_NONE) {
>> +   debug("%s: Could not read start of range %d\n",
>> + ofnode_get_name(node), index);
>> +   return -EINVAL;
>> +   }
>> +
>> +   range->size = sz;
>> +
>> +   return 0;
>> +}
>> +
>>  int regmap_init_mem(ofnode node, struct regmap **mapp)
>>  {
>> struct regmap_range *range;
>> @@ -64,7 +116,6 @@ int regmap_init_mem(ofnode node, struct regmap **mapp)
>> int addr_len, size_len, both_len;
>> int len;
>> int index;
>> -   struct resource r;
>>
>> addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
>> if (addr_len < 0) {
>> @@ -101,17 +152,10 @@ int regmap_init_mem(ofnode node, struct regmap **mapp)
>>
>> for (range = map->ranges, index = 0; count > 0;
>>  count--, range++, index++) {
>> -   fdt_size_t sz;
>> -   if (of_live_active()) {
>> -   of_address_to_resource(ofnode_to_np(node), index, 
>> &r);
>> -   range->start = r.start;
>> -   range->size = r.end - r.start + 1;
>> -   } else {
>> -   range->start = 
>> fdtdec_get_addr_size_fixed(gd->fdt_blob,
>> -   ofnode_to_offset(node), "reg", index,
>> -   addr_len, size_len, &sz, true);
>> -   range->size = sz;
>> -   }
>> +   int ret = init_range(node, range, addr_len, size_len, index);
>> +
>> +   if (ret)
>> +   return ret;
>> }
>>
>> *mapp = map;
>> --
>> 2.11.0
>>

Best regards,
Mario
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Re: [U-Boot] [PATCH v3 13/13] misc: Add IHS FPGA driver

[Mario Six]

Hi Simon,

On Thu, Aug 2, 2018 at 6:56 PM, Simon Glass  wrote:
> On 31 July 2018 at 04:01, Mario Six  wrote:
>> Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which
>> supports initialization of the FPGA, as well as information gathering.
>>
>> Signed-off-by: Mario Six 
>> ---
>>
>> v2 -> v3:
>> * Fixed style violations
>> * Added full documentation
>> * Extracted some magic numbers to constants
>> * Removed unnecessary includes
>> * Extracted wait_for_fpga_done
>> * Improved error handling and reporting
>> * Added device-tree-binding files
>> * Improved Kconfig entry
>>
>> v1 -> v2:
>> New in v2
>>
>> ---
>>  .../devicetree/bindings/misc/gdsys,iocon_fpga.txt  |  19 +
>>  .../devicetree/bindings/misc/gdsys,iocpu_fpga.txt  |  19 +
>>  drivers/misc/Kconfig   |   9 +
>>  drivers/misc/Makefile  |   1 +
>>  drivers/misc/ihs_fpga.c| 867 
>> +
>>  drivers/misc/ihs_fpga.h|  49 ++
>>  6 files changed, 964 insertions(+)
>>  create mode 100644 
>> Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt
>>  create mode 100644 
>> Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt
>>  create mode 100644 drivers/misc/ihs_fpga.c
>>  create mode 100644 drivers/misc/ihs_fpga.h
>
> Reviewed-by: Simon Glass 
>
> My only nit is that I prefer 'ret' for the return value instead of
> 'rc' or 'res', for consistency with driver model.

Eh, I'll do a v4 anyway, so I can fix this as well, no problem.

I wasn't aware that there was a preference in naming convention regarding
return variables, but your explanation definitely makes sense. That's another
one of these little tidbits that should probably be documented somewhere.

Best regards,
Mario
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Re: [U-Boot] [PATCH v3 02/13] regmap: Fix documentation

[Mario Six]

Hi Simon,

On Thu, Aug 2, 2018 at 6:56 PM, Simon Glass  wrote:
> Hi Mario,
>
> On 31 July 2018 at 04:00, Mario Six  wrote:
>> The documentation in regmap.h is not in kernel-doc format. Correct this.
>>
>> Signed-off-by: Mario Six 
>> ---
>>
>> v2 -> v3:
>> New in v3
>>
>> ---
>>  include/regmap.h | 48 +++-
>>  1 file changed, 39 insertions(+), 9 deletions(-)
>
> Do we have a checker for this?
>

Now that the documentation migration is merged, we have one: "kernel-doc -v
-none [file]" will analyze the documentation in a source file and print
warnings and errors if it finds something wrong.

But beware that the checks are not perfect; I found, e.g., that it has problems
with function declarations of the form "func(void)", where it complains
erroneously. Also, it doesn't complain about missing documentation, which would
be a nice feature to have (at least have it activatable via command line
switch).

I'd fix the tool, but my Perl knowledge is non-existent, so I can't really do
it.

> Reviewed-by: Simon Glass 
>
> Regards,
> Simon

Best regards,
Mario
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[U-Boot] [PATCH v3 1/2] armv8: layerscape: Enable EHCI access for LS1012A

[Ran Wang]

Program Central Security Unit (CSU) to grant access
permission for USB 2.0 controller, otherwiase EHCI funciton will down.

Signed-off-by: Ran Wang 
---
Change in v3:
- None

Change in v2:
- Add EL checking code to make sure related programming only happen
  in EL3

 arch/arm/cpu/armv8/fsl-layerscape/soc.c  | 9 +
 arch/arm/include/asm/arch-fsl-layerscape/ns_access.h | 1 +
 2 files changed, 10 insertions(+)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c 
b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 6a56269..d8c3083 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -14,6 +14,7 @@
 #include 
 #include 
 #include 
+#include 
 #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
 #include 
 #endif
@@ -668,6 +669,14 @@ void fsl_lsch2_early_init_f(void)
 CCI400_DVM_MESSAGE_REQ_EN | CCI400_SNOOP_REQ_EN);
}
 
+   /*
+* Program Central Security Unit (CSU) to grant access
+* permission for USB 2.0 controller
+*/
+#if defined(CONFIG_ARCH_LS1012A) && defined(CONFIG_USB_EHCI_FSL)
+   if (current_el() == 3)
+   set_devices_ns_access(CSU_CSLX_USB_2, CSU_ALL_RW);
+#endif
/* Erratum */
erratum_a008850_early(); /* part 1 of 2 */
erratum_a009929();
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h 
b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index fe97a93..d1b8efa 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -40,6 +40,7 @@ enum csu_cslx_ind {
CSU_CSLX_ESDHC,
CSU_CSLX_IFC = 45,
CSU_CSLX_I2C1,
+   CSU_CSLX_USB_2,
CSU_CSLX_I2C3 = 48,
CSU_CSLX_I2C2,
CSU_CSLX_DUART2 = 50,
-- 
2.7.4

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[U-Boot] [PATCH v3 2/2] armv8: layerscape: move ns_dev[] define from h to c file.

[Ran Wang]

Since more c files will include ns_access.h, this move will fix some
compiling warnings and make it sense.

Signed-off-by: Ran Wang 
---
Change in v3:
- New file

 .../include/asm/arch-fsl-layerscape/ns_access.h| 80 --
 board/freescale/common/ns_access.c | 80 ++
 2 files changed, 80 insertions(+), 80 deletions(-)

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h 
b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
index d1b8efa..2e33d53 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/ns_access.h
@@ -89,84 +89,4 @@ enum csu_cslx_ind {
CSU_CSLX_DSCR = 121,
 };
 
-static struct csu_ns_dev ns_dev[] = {
-{CSU_CSLX_PCIE2_IO, CSU_ALL_RW},
-{CSU_CSLX_PCIE1_IO, CSU_ALL_RW},
-{CSU_CSLX_MG2TPR_IP, CSU_ALL_RW},
-{CSU_CSLX_IFC_MEM, CSU_ALL_RW},
-{CSU_CSLX_OCRAM, CSU_ALL_RW},
-{CSU_CSLX_GIC, CSU_ALL_RW},
-{CSU_CSLX_PCIE1, CSU_ALL_RW},
-{CSU_CSLX_OCRAM2, CSU_ALL_RW},
-{CSU_CSLX_QSPI_MEM, CSU_ALL_RW},
-{CSU_CSLX_PCIE2, CSU_ALL_RW},
-{CSU_CSLX_SATA, CSU_ALL_RW},
-{CSU_CSLX_USB1, CSU_ALL_RW},
-{CSU_CSLX_QM_BM_SWPORTAL, CSU_ALL_RW},
-{CSU_CSLX_PCIE3, CSU_ALL_RW},
-{CSU_CSLX_PCIE3_IO, CSU_ALL_RW},
-{CSU_CSLX_USB3, CSU_ALL_RW},
-{CSU_CSLX_USB2, CSU_ALL_RW},
-{CSU_CSLX_PFE, CSU_ALL_RW},
-{CSU_CSLX_SERDES, CSU_ALL_RW},
-{CSU_CSLX_QDMA, CSU_ALL_RW},
-{CSU_CSLX_LPUART2, CSU_ALL_RW},
-{CSU_CSLX_LPUART1, CSU_ALL_RW},
-{CSU_CSLX_LPUART4, CSU_ALL_RW},
-{CSU_CSLX_LPUART3, CSU_ALL_RW},
-{CSU_CSLX_LPUART6, CSU_ALL_RW},
-{CSU_CSLX_LPUART5, CSU_ALL_RW},
-{CSU_CSLX_DSPI1, CSU_ALL_RW},
-{CSU_CSLX_QSPI, CSU_ALL_RW},
-{CSU_CSLX_ESDHC, CSU_ALL_RW},
-{CSU_CSLX_IFC, CSU_ALL_RW},
-{CSU_CSLX_I2C1, CSU_ALL_RW},
-{CSU_CSLX_I2C3, CSU_ALL_RW},
-{CSU_CSLX_I2C2, CSU_ALL_RW},
-{CSU_CSLX_DUART2, CSU_ALL_RW},
-{CSU_CSLX_DUART1, CSU_ALL_RW},
-{CSU_CSLX_WDT2, CSU_ALL_RW},
-{CSU_CSLX_WDT1, CSU_ALL_RW},
-{CSU_CSLX_EDMA, CSU_ALL_RW},
-{CSU_CSLX_SYS_CNT, CSU_ALL_RW},
-{CSU_CSLX_DMA_MUX2, CSU_ALL_RW},
-{CSU_CSLX_DMA_MUX1, CSU_ALL_RW},
-{CSU_CSLX_DDR, CSU_ALL_RW},
-{CSU_CSLX_QUICC, CSU_ALL_RW},
-{CSU_CSLX_DCFG_CCU_RCPM, CSU_ALL_RW},
-{CSU_CSLX_SECURE_BOOTROM, CSU_ALL_RW},
-{CSU_CSLX_SFP, CSU_ALL_RW},
-{CSU_CSLX_TMU, CSU_ALL_RW},
-{CSU_CSLX_SECURE_MONITOR, CSU_ALL_RW},
-{CSU_CSLX_SCFG, CSU_ALL_RW},
-{CSU_CSLX_FM, CSU_ALL_RW},
-{CSU_CSLX_SEC5_5, CSU_ALL_RW},
-{CSU_CSLX_BM, CSU_ALL_RW},
-{CSU_CSLX_QM, CSU_ALL_RW},
-{CSU_CSLX_GPIO2, CSU_ALL_RW},
-{CSU_CSLX_GPIO1, CSU_ALL_RW},
-{CSU_CSLX_GPIO4, CSU_ALL_RW},
-{CSU_CSLX_GPIO3, CSU_ALL_RW},
-{CSU_CSLX_PLATFORM_CONT, CSU_ALL_RW},
-{CSU_CSLX_CSU, CSU_ALL_RW},
-{CSU_CSLX_IIC4, CSU_ALL_RW},
-{CSU_CSLX_WDT4, CSU_ALL_RW},
-{CSU_CSLX_WDT3, CSU_ALL_RW},
-{CSU_CSLX_ESDHC2, CSU_ALL_RW},
-{CSU_CSLX_WDT5, CSU_ALL_RW},
-{CSU_CSLX_SAI2, CSU_ALL_RW},
-{CSU_CSLX_SAI1, CSU_ALL_RW},
-{CSU_CSLX_SAI4, CSU_ALL_RW},
-{CSU_CSLX_SAI3, CSU_ALL_RW},
-{CSU_CSLX_FTM2, CSU_ALL_RW},
-{CSU_CSLX_FTM1, CSU_ALL_RW},
-{CSU_CSLX_FTM4, CSU_ALL_RW},
-{CSU_CSLX_FTM3, CSU_ALL_RW},
-{CSU_CSLX_FTM6, CSU_ALL_RW},
-{CSU_CSLX_FTM5, CSU_ALL_RW},
-{CSU_CSLX_FTM8, CSU_ALL_RW},
-{CSU_CSLX_FTM7, CSU_ALL_RW},
-{CSU_CSLX_DSCR, CSU_ALL_RW},
-};
-
 #endif
diff --git a/board/freescale/common/ns_access.c 
b/board/freescale/common/ns_access.c
index 0c3a54c..a7c16e7 100644
--- a/board/freescale/common/ns_access.c
+++ b/board/freescale/common/ns_access.c
@@ -10,6 +10,86 @@
 #include 
 #include 
 
+static struct csu_ns_dev ns_dev[] = {
+{CSU_CSLX_PCIE2_IO, CSU_ALL_RW},
+{CSU_CSLX_PCIE1_IO, CSU_ALL_RW},
+{CSU_CSLX_MG2TPR_IP, CSU_ALL_RW},
+{CSU_CSLX_IFC_MEM, CSU_ALL_RW},
+{CSU_CSLX_OCRAM, CSU_ALL_RW},
+{CSU_CSLX_GIC, CSU_ALL_RW},
+{CSU_CSLX_PCIE1, CSU_ALL_RW},
+{CSU_CSLX_OCRAM2, CSU_ALL_RW},
+{CSU_CSLX_QSPI_MEM, CSU_ALL_RW},
+{CSU_CSLX_PCIE2, CSU_ALL_RW},
+{CSU_CSLX_SATA, CSU_ALL_RW},
+{CSU_CSLX_USB1, CSU_ALL_RW},
+{CSU_CSLX_QM_BM_SWPORTAL, CSU_ALL_RW},
+{CSU_CSLX_PCIE3, CSU_ALL_RW},
+{CSU_CSLX_PCIE3_IO, CSU_ALL_RW},
+{CSU_CSLX_USB3, CSU_ALL_RW},
+{CSU_CSLX_USB2, CSU_ALL_RW},
+{CSU_CSLX_PFE, CSU_ALL_RW},
+{CSU_CSLX_SERDES, CSU_ALL_RW},
+{CSU_CSLX_QDMA, CSU_ALL_RW},
+{CSU_CSLX_LPUART2, CSU_ALL_RW},
+{CSU_CSLX_LPUART1, CSU_ALL_RW},
+{CSU_CSLX_

[U-Boot] [PATCH v4 01/13] test: regmap: Increase size of syscon0 memory

[Mario Six]

The upcoming changes to the regmap interface will contain a proper check
for plausibility when reading/writing from/to a register map. To still
have the current tests pass, increase the size of the memory region for
the syscon0 device, since one of the tests reads and writes beyond this
range.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
No changes

v2 -> v3:
New in v3

---
 arch/sandbox/dts/test.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index e941cea3e5c..47cc961890f 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -406,7 +406,7 @@

syscon@0 {
compatible = "sandbox,syscon0";
-   reg = <0x10 4>;
+   reg = <0x10 16>;
};

syscon@1 {
--
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[U-Boot] [PATCH v4 10/13] test: regmap: Add test for regmap_{set, get}

[Mario Six]

Add test for regmap_{set,get} functions.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
No changes

v2 -> v3:
New in v3

---
 test/dm/regmap.c | 28 
 1 file changed, 28 insertions(+)

diff --git a/test/dm/regmap.c b/test/dm/regmap.c
index d4b86b3b03c..152b3a4b800 100644
--- a/test/dm/regmap.c
+++ b/test/dm/regmap.c
@@ -116,3 +116,31 @@ static int dm_test_regmap_rw(struct unit_test_state *uts)
 }

 DM_TEST(dm_test_regmap_rw, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Get/Set test */
+static int dm_test_regmap_getset(struct unit_test_state *uts)
+{
+   struct udevice *dev;
+   struct regmap *map;
+   uint reg;
+   struct layout {
+   u32 val0;
+   u32 val1;
+   u32 val2;
+   u32 val3;
+   };
+
+   ut_assertok(uclass_get_device(UCLASS_SYSCON, 0, &dev));
+   map = syscon_get_regmap(dev);
+   ut_assertok_ptr(map);
+
+   regmap_set(map, struct layout, val0, 0xcacafafa);
+   regmap_set(map, struct layout, val3, 0x55aa2211);
+
+   ut_assertok(regmap_get(map, struct layout, val0, ®));
+   ut_assertok(regmap_get(map, struct layout, val3, ®));
+
+   return 0;
+}
+
+DM_TEST(dm_test_regmap_getset, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
--
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[U-Boot] [PATCH v4 03/13] regmap: Add documentation

[Mario Six]

Document the regmap_alloc() function.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
No changes

v2 -> v3:
New in v3

---
 drivers/core/regmap.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 8e5c3bcf61b..77f6f520a06 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -17,6 +17,12 @@

 DECLARE_GLOBAL_DATA_PTR;

+/**
+ * regmap_alloc() - Allocate a regmap with a given number of ranges.
+ *
+ * @count: Number of ranges to be allocated for the regmap.
+ * Return: A pointer to the newly allocated regmap, or NULL on error.
+ */
 static struct regmap *regmap_alloc(int count)
 {
struct regmap *map;
--
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[U-Boot] [PATCH v4 02/13] regmap: Fix documentation

[Mario Six]

The documentation in regmap.h is not in kernel-doc format. Correct this.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
No changes

v2 -> v3:
New in v3

---
 include/regmap.h | 48 +++-
 1 file changed, 39 insertions(+), 9 deletions(-)

diff --git a/include/regmap.h b/include/regmap.h
index 6a574eaa412..32f75e06f59 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -21,8 +21,8 @@ struct regmap_range {
 /**
  * struct regmap - a way of accessing hardware/bus registers
  *
- * @range_count: Number of ranges available within the map
- * @ranges:Array of ranges
+ * @range_count:   Number of ranges available within the map
+ * @ranges:Array of ranges
  */
 struct regmap {
int range_count;
@@ -33,7 +33,28 @@ struct regmap {
  * Interface to provide access to registers either through a direct memory
  * bus or through a peripheral bus like I2C, SPI.
  */
+
+/**
+ * regmap_write() - Write a 32-bit value to a regmap
+ *
+ * @map:   Regmap to write to
+ * @offset:Offset in the regmap to write to
+ * @val:   Data to write to the regmap at the specified offset
+ *
+ * Return: 0 if OK, -ve on error
+ */
 int regmap_write(struct regmap *map, uint offset, uint val);
+
+/**
+ * regmap_read() - Read a 32-bit value from a regmap
+ *
+ * @map:   Regmap to read from
+ * @offset:Offset in the regmap to read from
+ * @valp:  Pointer to the buffer to receive the data read from the regmap
+ * at the specified offset
+ *
+ * Return: 0 if OK, -ve on error
+ */
 int regmap_read(struct regmap *map, uint offset, uint *valp);

 #define regmap_write32(map, ptr, member, val) \
@@ -49,31 +70,36 @@ int regmap_read(struct regmap *map, uint offset, uint 
*valp);
  * @offset:Offset of the memory
  * @mask:  Mask to apply to the read value
  * @val:   Value to apply to the value to write
+ * Return: 0 if OK, -ve on error
  */
 int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val);

 /**
  * regmap_init_mem() - Set up a new register map that uses memory access
  *
- * Use regmap_uninit() to free it.
- *
  * @node:  Device node that uses this map
  * @mapp:  Returns allocated map
+ * Return: 0 if OK, -ve on error
+ *
+ * Use regmap_uninit() to free it.
  */
 int regmap_init_mem(ofnode node, struct regmap **mapp);

 /**
- * regmap_init_mem_platdata() - Set up a new memory register map for 
of-platdata
+ * regmap_init_mem_platdata() - Set up a new memory register map for
+ * of-platdata
+ *
+ * @dev:   Device that uses this map
+ * @reg:   List of address, size pairs
+ * @count: Number of pairs (e.g. 1 if the regmap has a single entry)
+ * @mapp:  Returns allocated map
+ * Return: 0 if OK, -ve on error
  *
  * This creates a new regmap with a list of regions passed in, rather than
  * using the device tree. It only supports 32-bit machines.
  *
  * Use regmap_uninit() to free it.
  *
- * @dev:   Device that uses this map
- * @reg:   List of address, size pairs
- * @count: Number of pairs (e.g. 1 if the regmap has a single entry)
- * @mapp:  Returns allocated map
  */
 int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t *reg, int count,
 struct regmap **mapp);
@@ -83,11 +109,15 @@ int regmap_init_mem_platdata(struct udevice *dev, 
fdt_val_t *reg, int count,
  *
  * @map:   Regmap to query
  * @range_num: Range to look up
+ * Return: Pointer to the range in question if OK, NULL on error
  */
 void *regmap_get_range(struct regmap *map, unsigned int range_num);

 /**
  * regmap_uninit() - free a previously inited regmap
+ *
+ * @map:   Regmap to free
+ * Return: 0 if OK, -ve on error
  */
 int regmap_uninit(struct regmap *map);

--
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[U-Boot] [PATCH v4 09/13] regmap: Define regmap_{get,set}

[Mario Six]

It would be convenient if one could use the regmap API in conjunction
with register maps defined as structs (i.e. structs that directly mirror
the memory layout of the registers in question). A similar approach was
planned with the regmap_write32/regmap_read32 macros, but was never
used.

Hence, implement regmap_set/regmap_range_set and
regmap_get/regmap_range_get macros, which, given a register map, a
struct describing the layout of the register map, and a member name
automatically produce regmap_read/regmap_write calls that access the
specified member in the register map.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
No changes

v2 -> v3:
* Fixed style violations
* Added documentation

v1 -> v2:
New in v2

---
 include/regmap.h | 54 ++
 1 file changed, 50 insertions(+), 4 deletions(-)

diff --git a/include/regmap.h b/include/regmap.h
index df672df9fe1..85c4a8e502f 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -144,11 +144,57 @@ int regmap_raw_write_range(struct regmap *map, uint 
range_num, uint offset,
 int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset,
  void *valp, size_t val_len);

-#define regmap_write32(map, ptr, member, val) \
-   regmap_write(map, (uint32_t *)(ptr)->member - (uint32_t *)(ptr), val)
+/**
+ * regmap_range_set() - Set a value in a regmap range described by a struct
+ * @map:Regmap in which a value should be set
+ * @range:  Range of the regmap in which a value should be set
+ * @type:   Structure type that describes the memory layout of the regmap range
+ * @member: Member of the describing structure that should be set in the regmap
+ *  range
+ * @val:Value which should be written to the regmap range
+ */
+#define regmap_range_set(map, range, type, member, val) \
+   do { \
+   typeof(((type *)0)->member) __tmp = val; \
+   regmap_raw_write_range(map, range, offsetof(type, member), \
+  &__tmp, sizeof(((type *)0)->member)); \
+   } while (0)
+
+/**
+ * regmap_set() - Set a value in a regmap described by a struct
+ * @map:Regmap in which a value should be set
+ * @type:   Structure type that describes the memory layout of the regmap
+ * @member: Member of the describing structure that should be set in the regmap
+ * @val:Value which should be written to the regmap
+ */
+#define regmap_set(map, type, member, val) \
+   regmap_range_set(map, 0, type, member, val)

-#define regmap_read32(map, ptr, member, valp) \
-   regmap_read(map, (uint32_t *)(ptr)->member - (uint32_t *)(ptr), valp)
+/**
+ * regmap_range_get() - Get a value from a regmap range described by a struct
+ * @map:Regmap from which a value should be read
+ * @range:  Range of the regmap from which a value should be read
+ * @type:   Structure type that describes the memory layout of the regmap
+ *  range
+ * @member: Member of the describing structure that should be read in the
+ *  regmap range
+ * @valp:   Variable that receives the value read from the regmap range
+ */
+#define regmap_range_get(map, range, type, member, valp) \
+   regmap_raw_read_range(map, range, offsetof(type, member), \
+ (void *)valp, sizeof(((type *)0)->member))
+
+/**
+ * regmap_get() - Get a value from a regmap described by a struct
+ * @map:Regmap from which a value should be read
+ * @type:   Structure type that describes the memory layout of the regmap
+ *  range
+ * @member: Member of the describing structure that should be read in the
+ *  regmap
+ * @valp:   Variable that receives the value read from the regmap
+ */
+#define regmap_get(map, type, member, valp) \
+   regmap_range_get(map, 0, type, member, valp)

 /**
  * regmap_update_bits() - Perform a read/modify/write using a mask
--
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[U-Boot] [PATCH v4 06/13] regmap: Add error output

[Mario Six]

Add some debug output in cases where the initialization of a regmap
fails.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
No changes

v2 -> v3:
New in v3

---
 drivers/core/regmap.c | 10 --
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 25c1ae5d7df..154426269d9 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -139,12 +139,18 @@ int regmap_init_mem(ofnode node, struct regmap **mapp)
}

len = ofnode_read_size(node, "reg");
-   if (len < 0)
+   if (len < 0) {
+   debug("%s: Error while reading reg size (ret = %d)\n",
+ ofnode_get_name(node), len);
return len;
+   }
len /= sizeof(fdt32_t);
count = len / both_len;
-   if (!count)
+   if (!count) {
+   debug("%s: Not enough data in reg property\n",
+ ofnode_get_name(node));
return -EINVAL;
+   }

map = regmap_alloc(count);
if (!map)
--
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[U-Boot] [PATCH v4 07/13] regmap: Add raw read/write functions

[Mario Six]

The regmap functions currently assume that all register map accesses
have a data width of 32 bits, but there are maps that have different
widths.

To rectify this, implement the regmap_raw_read and regmap_raw_write
functions from the Linux kernel API that specify the width of a desired
read or write operation on a regmap.

Implement the regmap_read and regmap_write functions using these raw
functions in a backwards-compatible manner.

Reviewed-by: Anatolij Gustschin 
Signed-off-by: Mario Six 

---

v3 -> v4:
* Switched 'ranges[0] + offset' to 'ranges[0].start + offset'
* Explained the difference between the raw and non-raw read/write
  functions better in the docs

v2 -> v3:
* Implement the "raw" functions from Linux instead of adding a size
  parameter to the regmap_{read,write} functions
* Fixed style violation
* Improved error handling

v1 -> v2:
New in v2

---
 drivers/core/regmap.c | 54 ++---
 include/regmap.h  | 56 +++
 2 files changed, 103 insertions(+), 7 deletions(-)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 154426269d9..87c4c950a63 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -188,22 +188,62 @@ int regmap_uninit(struct regmap *map)
return 0;
 }

+int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t 
val_len)
+{
+   void *ptr;
+
+   ptr = map_physmem(map->ranges[0].start + offset, val_len, MAP_NOCACHE);
+
+   switch (val_len) {
+   case REGMAP_SIZE_8:
+   *((u8 *)valp) = in_8((u8 *)ptr);
+   break;
+   case REGMAP_SIZE_16:
+   *((u16 *)valp) = in_le16((u16 *)ptr);
+   break;
+   case REGMAP_SIZE_32:
+   *((u32 *)valp) = in_le32((u32 *)ptr);
+   break;
+   default:
+   debug("%s: regmap size %u unknown\n", __func__, val_len);
+   return -EINVAL;
+   }
+   return 0;
+}
+
 int regmap_read(struct regmap *map, uint offset, uint *valp)
 {
-   u32 *ptr = map_physmem(map->ranges[0].start + offset, 4, MAP_NOCACHE);
+   return regmap_raw_read(map, offset, valp, REGMAP_SIZE_32);
+}

-   *valp = le32_to_cpu(readl(ptr));
+int regmap_raw_write(struct regmap *map, uint offset, const void *val,
+size_t val_len)
+{
+   void *ptr;
+
+   ptr = map_physmem(map->ranges[0].start + offset, val_len, MAP_NOCACHE);
+
+   switch (val_len) {
+   case REGMAP_SIZE_8:
+   out_8((u8 *)ptr, *((u8 *)val));
+   break;
+   case REGMAP_SIZE_16:
+   out_le16((u16 *)ptr, *((u16 *)val));
+   break;
+   case REGMAP_SIZE_32:
+   out_le32((u32 *)ptr, *((u32 *)val));
+   break;
+   default:
+   debug("%s: regmap size %u unknown\n", __func__, val_len);
+   return -EINVAL;
+   }

return 0;
 }

 int regmap_write(struct regmap *map, uint offset, uint val)
 {
-   u32 *ptr = map_physmem(map->ranges[0].start + offset, 4, MAP_NOCACHE);
-
-   writel(cpu_to_le32(val), ptr);
-
-   return 0;
+   return regmap_raw_write(map, offset, &val, REGMAP_SIZE_32);
 }

 int regmap_update_bits(struct regmap *map, uint offset, uint mask, uint val)
diff --git a/include/regmap.h b/include/regmap.h
index 32f75e06f59..46ae4ed0a03 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -8,6 +8,19 @@
 #define __REGMAP_H

 /**
+ * enum regmap_size_t - Access sizes for fpgamap reads and writes
+ *
+ * @REGMAP_SIZE_8: 8-bit read/write access size
+ * @REGMAP_SIZE_16: 16-bit read/write access size
+ * @REGMAP_SIZE_32: 32-bit read/write access size
+ */
+enum regmap_size_t {
+   REGMAP_SIZE_8 = 1,
+   REGMAP_SIZE_16 = 2,
+   REGMAP_SIZE_32 = 4,
+};
+
+/**
  * struct regmap_range - a register map range
  *
  * @start: Start address
@@ -41,6 +54,10 @@ struct regmap {
  * @offset:Offset in the regmap to write to
  * @val:   Data to write to the regmap at the specified offset
  *
+ * Note that this function will only write values of 32 bit width to the
+ * regmap; if the size of data to be read is different, the regmap_raw_write
+ * function can be used.
+ *
  * Return: 0 if OK, -ve on error
  */
 int regmap_write(struct regmap *map, uint offset, uint val);
@@ -53,10 +70,49 @@ int regmap_write(struct regmap *map, uint offset, uint val);
  * @valp:  Pointer to the buffer to receive the data read from the regmap
  * at the specified offset
  *
+ * Note that this function will only read values of 32 bit width from the
+ * regmap; if the size of data to be read is different, the regmap_raw_read
+ * function can be used.
+ *
  * Return: 0 if OK, -ve on error
  */
 int regmap_read(struct regmap *map, uint offset, uint *valp);

+/**
+ * regmap_raw_write() - Write a value of specified length to a regmap
+ *
+ * @map:   Regmap to write to
+ * @offset:Offset in the re

[U-Boot] [PATCH v4 05/13] regmap: Introduce init_range

[Mario Six]

Both fdtdec_get_addr_size_fixed and of_address_to_resource can fail with
an error, which is not currently checked during regmap initialization.

Since the indentation depth is already quite deep, extract a new
'init_range' method to do the initialization.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
* Introduced else clause in of_live_active() if statement to make the
  distinction between live and non-live cases clearer

v2 -> v3:
New in v3

---
 drivers/core/regmap.c | 68 ++-
 1 file changed, 56 insertions(+), 12 deletions(-)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 4ebab233490..25c1ae5d7df 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -56,6 +56,58 @@ int regmap_init_mem_platdata(struct udevice *dev, fdt_val_t 
*reg, int count,
return 0;
 }
 #else
+/**
+ * init_range() - Initialize a single range of a regmap
+ * @node: Device node that will use the map in question
+ * @range:Pointer to a regmap_range structure that will be initialized
+ * @addr_len: The length of the addr parts of the reg property
+ * @size_len: The length of the size parts of the reg property
+ * @index:The index of the range to initialize
+ *
+ * This function will read the necessary 'reg' information from the device tree
+ * (the 'addr' part, and the 'length' part), and initialize the range in
+ * quesion.
+ *
+ * Return: 0 if OK, -ve on error
+ */
+static int init_range(ofnode node, struct regmap_range *range, int addr_len,
+ int size_len, int index)
+{
+   fdt_size_t sz;
+   struct resource r;
+
+   if (of_live_active()) {
+   int ret;
+
+   ret = of_address_to_resource(ofnode_to_np(node),
+index, &r);
+   if (ret) {
+   debug("%s: Could not read resource of range %d (ret = 
%d)\n",
+ ofnode_get_name(node), index, ret);
+   return ret;
+   }
+
+   range->start = r.start;
+   range->size = r.end - r.start + 1;
+   } else {
+   int offset = ofnode_to_offset(node);
+
+   range->start = fdtdec_get_addr_size_fixed(gd->fdt_blob, offset,
+ "reg", index,
+ addr_len, size_len,
+ &sz, true);
+   if (range->start == FDT_ADDR_T_NONE) {
+   debug("%s: Could not read start of range %d\n",
+ ofnode_get_name(node), index);
+   return -EINVAL;
+   }
+
+   range->size = sz;
+   }
+
+   return 0;
+}
+
 int regmap_init_mem(ofnode node, struct regmap **mapp)
 {
struct regmap_range *range;
@@ -64,7 +116,6 @@ int regmap_init_mem(ofnode node, struct regmap **mapp)
int addr_len, size_len, both_len;
int len;
int index;
-   struct resource r;

addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
if (addr_len < 0) {
@@ -101,17 +152,10 @@ int regmap_init_mem(ofnode node, struct regmap **mapp)

for (range = map->ranges, index = 0; count > 0;
 count--, range++, index++) {
-   fdt_size_t sz;
-   if (of_live_active()) {
-   of_address_to_resource(ofnode_to_np(node), index, &r);
-   range->start = r.start;
-   range->size = r.end - r.start + 1;
-   } else {
-   range->start = fdtdec_get_addr_size_fixed(gd->fdt_blob,
-   ofnode_to_offset(node), "reg", index,
-   addr_len, size_len, &sz, true);
-   range->size = sz;
-   }
+   int ret = init_range(node, range, addr_len, size_len, index);
+
+   if (ret)
+   return ret;
}

*mapp = map;
--
2.11.0

___
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[U-Boot] [PATCH v4 04/13] regmap: Improve error handling

[Mario Six]

ofnode_read_simple_addr_cells may fail and return a negative error code.
Check for this when initializing regmaps.

Also check if both_len is zero, since this is perfectly possible, and
would lead to a division-by-zero further down the line.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
No changes

v2 -> v3:
New in v3

---
 drivers/core/regmap.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 77f6f520a06..4ebab233490 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -67,8 +67,25 @@ int regmap_init_mem(ofnode node, struct regmap **mapp)
struct resource r;

addr_len = ofnode_read_simple_addr_cells(ofnode_get_parent(node));
+   if (addr_len < 0) {
+   debug("%s: Error while reading the addr length (ret = %d)\n",
+ ofnode_get_name(node), addr_len);
+   return addr_len;
+   }
+
size_len = ofnode_read_simple_size_cells(ofnode_get_parent(node));
+   if (size_len < 0) {
+   debug("%s: Error while reading the size length: (ret = %d)\n",
+ ofnode_get_name(node), size_len);
+   return size_len;
+   }
+
both_len = addr_len + size_len;
+   if (!both_len) {
+   debug("%s: Both addr and size length are zero\n",
+ ofnode_get_name(node));
+   return -EINVAL;
+   }

len = ofnode_read_size(node, "reg");
if (len < 0)
--
2.11.0

___
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[U-Boot] [PATCH v4 12/13] misc: Add gdsys_soc driver

[Mario Six]

This patch adds a driver for the bus associated with a IHS FPGA.

Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
No changes

v2 -> v3:
* Fixed style violations
* Added bindings file
* Added more debug output in case of errors
* Switched all printfs to debug
* Documented the private data structure
* Formatted documentation as proper kernel-doc
* Expanded Kconfig description

v1 -> v2:
* Switched to correct uclass for IHS FPGA driver (now in MISC uclass)

---
 .../devicetree/bindings/misc/gdsys,soc.txt | 16 +
 drivers/misc/Kconfig   |  9 +++
 drivers/misc/Makefile  |  1 +
 drivers/misc/gdsys_soc.c   | 74 ++
 drivers/misc/gdsys_soc.h   | 23 +++
 5 files changed, 123 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/misc/gdsys,soc.txt
 create mode 100644 drivers/misc/gdsys_soc.c
 create mode 100644 drivers/misc/gdsys_soc.h

diff --git a/Documentation/devicetree/bindings/misc/gdsys,soc.txt 
b/Documentation/devicetree/bindings/misc/gdsys,soc.txt
new file mode 100644
index 000..278e935b166
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gdsys,soc.txt
@@ -0,0 +1,16 @@
+gdsys soc bus driver
+
+This driver provides a simple interface for the busses associated with gdsys
+IHS FPGAs. The bus itself contains devices whose register maps are contained
+within the FPGA's register space.
+
+Required properties:
+- fpga: A phandle to the controlling IHS FPGA
+
+Example:
+
+FPGA0BUS: fpga0bus {
+   compatible = "gdsys,soc";
+   ranges = <0x0 0xe060 0x4000>;
+   fpga = <&FPGA0>;
+};
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 89854a4941b..535be1491e3 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -289,4 +289,13 @@ config GDSYS_IOEP
depends on MISC
help
  Support gdsys FPGA's IO endpoint driver.
+
+config GDSYS_SOC
+   bool "Enable gdsys SOC driver"
+   depends on MISC
+   help
+ Support for gdsys IHS SOC, a simple bus associated with each gdsys
+ IHS (Integrated Hardware Systems) FPGA, which holds all devices whose
+ register maps are contained within the FPGA's register map.
+
 endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 3ab110a1aaa..b1f9ce7ed39 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -37,6 +37,7 @@ obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
 obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
 obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
+obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
 obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
 obj-$(CONFIG_LED_STATUS) += status_led.o
 obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
diff --git a/drivers/misc/gdsys_soc.c b/drivers/misc/gdsys_soc.c
new file mode 100644
index 000..94a21e08af7
--- /dev/null
+++ b/drivers/misc/gdsys_soc.c
@@ -0,0 +1,74 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ */
+
+#include 
+#include 
+#include 
+
+#include "gdsys_soc.h"
+
+/**
+ * struct gdsys_soc_priv - Private data for gdsys soc bus
+ * @fpga: The gdsys IHS FPGA this bus is associated with
+ */
+struct gdsys_soc_priv {
+   struct udevice *fpga;
+};
+
+static const struct udevice_id gdsys_soc_ids[] = {
+   { .compatible = "gdsys,soc" },
+   { /* sentinel */ }
+};
+
+int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga)
+{
+   struct gdsys_soc_priv *bus_priv;
+
+   if (!child->parent) {
+   debug("%s: Invalid parent\n", child->name);
+   return -EINVAL;
+   }
+
+   if (!device_is_compatible(child->parent, "gdsys,soc")) {
+   debug("%s: Not child of a gdsys soc\n", child->name);
+   return -EINVAL;
+   }
+
+   bus_priv = dev_get_priv(child->parent);
+
+   *fpga = bus_priv->fpga;
+
+   return 0;
+}
+
+static int gdsys_soc_probe(struct udevice *dev)
+{
+   struct gdsys_soc_priv *priv = dev_get_priv(dev);
+   struct udevice *fpga;
+   int res = uclass_get_device_by_phandle(UCLASS_MISC, dev, "fpga",
+  &fpga);
+   if (res == -ENOENT) {
+   debug("%s: Could not find 'fpga' phandle\n", dev->name);
+   return -EINVAL;
+   }
+
+   if (res == -ENODEV) {
+   debug("%s: Could not get FPGA device\n", dev->name);
+   return -EINVAL;
+   }
+
+   priv->fpga = fpga;
+
+   return 0;
+}
+
+U_BOOT_DRIVER(gdsys_soc_bus) = {
+   .name   = "gdsys_soc_bus",
+   .id = UCLASS_SIMPLE_BUS,
+   .of_match   = gdsys_soc_ids,
+   .probe  = gdsys_soc_probe,
+   .priv_auto_alloc_size = sizeof(struct gdsys_soc_priv),
+};
diff --git a/drivers/misc/gdsys_soc.h b/drivers/misc

[U-Boot] [PATCH v4 08/13] regmap: Support reading from specific range

[Mario Six]

It is useful to be able to treat the different ranges of a regmap
separately to be able to use distinct offset for them, but this is
currently not implemented in the regmap API.

To preserve backwards compatibility, add regmap_read_range and
regmap_write_range functions that take an additional parameter
'range_num' that identifies the range to operate on.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
No changes

v2 -> v3:
* Renamed the functions to regmap_{write,read}_range
* Added function comments
* Fixed style violations
* Improved error handling

v1 -> v2:
New in v2

---
 drivers/core/regmap.c | 49 -
 include/regmap.h  | 31 +++
 2 files changed, 75 insertions(+), 5 deletions(-)

diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c
index 87c4c950a63..86b35edc050 100644
--- a/drivers/core/regmap.c
+++ b/drivers/core/regmap.c
@@ -188,11 +188,25 @@ int regmap_uninit(struct regmap *map)
return 0;
 }

-int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t 
val_len)
+int regmap_raw_read_range(struct regmap *map, uint range_num, uint offset,
+ void *valp, size_t val_len)
 {
+   struct regmap_range *range;
void *ptr;

-   ptr = map_physmem(map->ranges[0].start + offset, val_len, MAP_NOCACHE);
+   if (range_num >= map->range_count) {
+   debug("%s: range index %d larger than range count\n",
+ __func__, range_num);
+   return -ERANGE;
+   }
+   range = &map->ranges[range_num];
+
+   ptr = map_physmem(range->start + offset, val_len, MAP_NOCACHE);
+
+   if (offset + val_len > range->size) {
+   debug("%s: offset/size combination invalid\n", __func__);
+   return -ERANGE;
+   }

switch (val_len) {
case REGMAP_SIZE_8:
@@ -208,20 +222,39 @@ int regmap_raw_read(struct regmap *map, uint offset, void 
*valp, size_t val_len)
debug("%s: regmap size %u unknown\n", __func__, val_len);
return -EINVAL;
}
+
return 0;
 }

+int regmap_raw_read(struct regmap *map, uint offset, void *valp, size_t 
val_len)
+{
+   return regmap_raw_read_range(map, 0, offset, valp, val_len);
+}
+
 int regmap_read(struct regmap *map, uint offset, uint *valp)
 {
return regmap_raw_read(map, offset, valp, REGMAP_SIZE_32);
 }

-int regmap_raw_write(struct regmap *map, uint offset, const void *val,
-size_t val_len)
+int regmap_raw_write_range(struct regmap *map, uint range_num, uint offset,
+  const void *val, size_t val_len)
 {
+   struct regmap_range *range;
void *ptr;

-   ptr = map_physmem(map->ranges[0].start + offset, val_len, MAP_NOCACHE);
+   if (range_num >= map->range_count) {
+   debug("%s: range index %d larger than range count\n",
+ __func__, range_num);
+   return -ERANGE;
+   }
+   range = &map->ranges[range_num];
+
+   ptr = map_physmem(range->start + offset, val_len, MAP_NOCACHE);
+
+   if (offset + val_len > range->size) {
+   debug("%s: offset/size combination invalid\n", __func__);
+   return -ERANGE;
+   }

switch (val_len) {
case REGMAP_SIZE_8:
@@ -241,6 +274,12 @@ int regmap_raw_write(struct regmap *map, uint offset, 
const void *val,
return 0;
 }

+int regmap_raw_write(struct regmap *map, uint offset, const void *val,
+size_t val_len)
+{
+   return regmap_raw_write_range(map, 0, offset, val, val_len);
+}
+
 int regmap_write(struct regmap *map, uint offset, uint val)
 {
return regmap_raw_write(map, offset, &val, REGMAP_SIZE_32);
diff --git a/include/regmap.h b/include/regmap.h
index 46ae4ed0a03..df672df9fe1 100644
--- a/include/regmap.h
+++ b/include/regmap.h
@@ -113,6 +113,37 @@ int regmap_raw_write(struct regmap *map, uint offset, 
const void *val,
 int regmap_raw_read(struct regmap *map, uint offset, void *valp,
size_t val_len);

+/**
+ * regmap_raw_write_range() - Write a value of specified length to a range of a
+ *   regmap
+ *
+ * @map:   Regmap to write to
+ * @range_num: Number of the range in the regmap to write to
+ * @offset:Offset in the regmap to write to
+ * @val:   Value to write to the regmap at the specified offset
+ * @val_len:   Length of the data to be written to the regmap
+ *
+ * Return: 0 if OK, -ve on error
+ */
+int regmap_raw_write_range(struct regmap *map, uint range_num, uint offset,
+  const void *val, size_t val_len);
+
+/**
+ * regmap_raw_read_range() - Read a value of specified length from a range of a
+ *  regmap
+ *
+ * @map:   Regmap to read from
+ * @range_num: Number of the range in the regmap to write to
+ * @offset:

[U-Boot] [PATCH v4 13/13] misc: Add IHS FPGA driver

[Mario Six]

Add a driver for gdsys IHS (Integrated Hardware Systems) FPGAs, which
supports initialization of the FPGA, as well as information gathering.

Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
* Switched from 'res' as the name for return variables to 'ret'

v2 -> v3:
* Fixed style violations
* Added full documentation
* Extracted some magic numbers to constants
* Removed unnecessary includes
* Extracted wait_for_fpga_done
* Improved error handling and reporting
* Added device-tree-binding files
* Improved Kconfig entry

v1 -> v2:
New in v2

---
 .../devicetree/bindings/misc/gdsys,iocon_fpga.txt  |  19 +
 .../devicetree/bindings/misc/gdsys,iocpu_fpga.txt  |  19 +
 drivers/misc/Kconfig   |   9 +
 drivers/misc/Makefile  |   1 +
 drivers/misc/ihs_fpga.c| 867 +
 drivers/misc/ihs_fpga.h|  49 ++
 6 files changed, 964 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt
 create mode 100644 Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt
 create mode 100644 drivers/misc/ihs_fpga.c
 create mode 100644 drivers/misc/ihs_fpga.h

diff --git a/Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt 
b/Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt
new file mode 100644
index 000..acd466fdc6d
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gdsys,iocon_fpga.txt
@@ -0,0 +1,19 @@
+gdsys IHS FPGA for CON devices
+
+The gdsys IHS FPGA is the main FPGA on gdsys CON devices. This driver provides
+support for enabling and starting the FPGA, as well as verifying working bus
+communication.
+
+Required properties:
+- compatible: must be "gdsys,iocon_fpga"
+- reset-gpios: List of GPIOs controlling the FPGA's reset
+- done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is
+  done
+
+Example:
+
+FPGA0 {
+   compatible = "gdsys,iocon_fpga";
+   reset-gpios = <&PPCPCA 26 0>;
+   done-gpios = <&GPIO_VB0 19 0>;
+};
diff --git a/Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt 
b/Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt
new file mode 100644
index 000..819db22bf7d
--- /dev/null
+++ b/Documentation/devicetree/bindings/misc/gdsys,iocpu_fpga.txt
@@ -0,0 +1,19 @@
+gdsys IHS FPGA for CPU devices
+
+The gdsys IHS FPGA is the main FPGA on gdsys CPU devices. This driver provides
+support for enabling and starting the FPGA, as well as verifying working bus
+communication.
+
+Required properties:
+- compatible: must be "gdsys,iocpu_fpga"
+- reset-gpios: List of GPIOs controlling the FPGA's reset
+- done-gpios: List of GPIOs notifying whether the FPGA's reconfiguration is
+  done
+
+Example:
+
+FPGA0 {
+   compatible = "gdsys,iocpu_fpga";
+   reset-gpios = <&PPCPCA 26 0>;
+   done-gpios = <&GPIO_VB0 19 0>;
+};
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 535be1491e3..09d3a6d75ea 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -298,4 +298,13 @@ config GDSYS_SOC
  IHS (Integrated Hardware Systems) FPGA, which holds all devices whose
  register maps are contained within the FPGA's register map.

+config IHS_FPGA
+   bool "Enable IHS FPGA driver"
+   depends on MISC
+   help
+ Support IHS (Integrated Hardware Systems) FPGA, the main FPGAs on
+ gdsys devices, which supply the majority of the functionality offered
+ by the devices. This driver supports both CON and CPU variants of the
+ devices, depending on the device tree entry.
+
 endmenu
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index b1f9ce7ed39..710475c9419 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -39,6 +39,7 @@ obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
 obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
 obj-$(CONFIG_GDSYS_SOC) += gdsys_soc.o
 obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
+obj-$(CONFIG_IHS_FPGA) += ihs_fpga.o
 obj-$(CONFIG_LED_STATUS) += status_led.o
 obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
 obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
diff --git a/drivers/misc/ihs_fpga.c b/drivers/misc/ihs_fpga.c
new file mode 100644
index 000..f9e4b27a270
--- /dev/null
+++ b/drivers/misc/ihs_fpga.c
@@ -0,0 +1,867 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2017
+ * Mario Six,  Guntermann & Drunck GmbH, mario@gdsys.cc
+ *
+ * based on the ioep-fpga driver, which is
+ *
+ * (C) Copyright 2014
+ * Dirk Eibach,  Guntermann & Drunck GmbH, eib...@gdsys.de
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "ihs_fpga.h"
+
+/**
+ * struct ihs_fpga_priv - Private data structure for IHS FPGA driver
+ * @map:Register map for the FPGA's own register space
+ * @reset_gpio: GPIO to start FPGA reconfiguration
+ * @done_gpio:  GPOI to read the 'ready' status of the FPGA
+ */
+struct ih

[U-Boot] [PATCH v4 11/13] misc: Sort Makefile entries

[Mario Six]

Makefile entries should be sorted.

Reviewed-by: Anatolij Gustschin 
Reviewed-by: Simon Glass 
Signed-off-by: Mario Six 

---

v3 -> v4:
No changes

v2 -> v3:
New in v3

---
 drivers/misc/Makefile | 60 +++
 1 file changed, 32 insertions(+), 28 deletions(-)

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index b0ef97b6b31..3ab110a1aaa 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -4,11 +4,7 @@
 # Wolfgang Denk, DENX Software Engineering, w...@denx.de.

 obj-$(CONFIG_MISC) += misc-uclass.o
-obj-$(CONFIG_ALI152X) += ali512x.o
-obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
-obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o
-obj-$(CONFIG_DS4510)  += ds4510.o
-obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
+
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_CROS_EC) += cros_ec.o
 obj-$(CONFIG_CROS_EC_LPC) += cros_ec_lpc.o
@@ -16,43 +12,51 @@ obj-$(CONFIG_CROS_EC_I2C) += cros_ec_i2c.o
 obj-$(CONFIG_CROS_EC_SANDBOX) += cros_ec_sandbox.o
 obj-$(CONFIG_CROS_EC_SPI) += cros_ec_spi.o
 endif
-obj-$(CONFIG_FSL_IIM) += fsl_iim.o
-obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
-obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
-obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
-obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
-obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
-obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o
-obj-$(CONFIG_NS87308) += ns87308.o
-obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
+
 ifdef CONFIG_DM_I2C
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_SANDBOX) += i2c_eeprom_emul.o
 endif
 endif
-obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
-obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
-obj-$(CONFIG_LED_STATUS) += status_led.o
-obj-$(CONFIG_SANDBOX) += swap_case.o
+
 ifdef CONFIG_SPL_OF_PLATDATA
 ifdef CONFIG_SPL_BUILD
 obj-$(CONFIG_SANDBOX) += spltest_sandbox.o
 endif
 endif
-obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o
-obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
-obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o
-obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
+
+obj-$(CONFIG_ALI152X) += ali512x.o
+obj-$(CONFIG_ALTERA_SYSID) += altera_sysid.o
+obj-$(CONFIG_ATSHA204A) += atsha204a-i2c.o
+obj-$(CONFIG_CBMEM_CONSOLE) += cbmem_console.o
+obj-$(CONFIG_DS4510)  += ds4510.o
+obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
 obj-$(CONFIG_FSL_IFC) += fsl_ifc.o
+obj-$(CONFIG_FSL_IIM) += fsl_iim.o
+obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
 obj-$(CONFIG_FSL_SEC_MON) += fsl_sec_mon.o
+obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
+obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
+obj-$(CONFIG_$(SPL_)I2C_EEPROM) += i2c_eeprom.o
+obj-$(CONFIG_LED_STATUS) += status_led.o
+obj-$(CONFIG_LED_STATUS_GPIO) += gpio_led.o
+obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
+obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
+obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
+obj-$(CONFIG_NS87308) += ns87308.o
+obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o
 obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
-obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
-obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
+obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
 obj-$(CONFIG_QFW) += qfw.o
 obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o
-obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
+obj-$(CONFIG_SANDBOX) += swap_case.o
+obj-$(CONFIG_SANDBOX) += syscon_sandbox.o misc_sandbox.o
+obj-$(CONFIG_SMSC_LPC47M) += smsc_lpc47m.o
+obj-$(CONFIG_SMSC_SIO1007) += smsc_sio1007.o
 obj-$(CONFIG_STM32MP_FUSE) += stm32mp_fuse.o
+obj-$(CONFIG_STM32_RCC) += stm32_rcc.o
 obj-$(CONFIG_SYS_DPAA_QBMAN) += fsl_portals.o
-obj-$(CONFIG_GDSYS_RXAUI_CTRL) += gdsys_rxaui_ctrl.o
-obj-$(CONFIG_MPC83XX_SERDES) += mpc83xx_serdes.o
-obj-$(CONFIG_GDSYS_IOEP) += gdsys_ioep.o
+obj-$(CONFIG_TEGRA186_BPMP) += tegra186_bpmp.o
+obj-$(CONFIG_TEGRA_CAR) += tegra_car.o
+obj-$(CONFIG_TWL4030_LED) += twl4030_led.o
+obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
--
2.11.0

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Re: [U-Boot] [PATCH] net: fman: Support both new and legacy FMan Compatibles

[Qiang Zhao]

On 08/02/2018 23:26 PM, York Sun wrote:



> On 08/01/2018 02:50 AM, Zhao Qiang wrote:

>> Recently  the FMan Port and MAC compatibles were changed.

>> This patch aligns the FMan Port and MAC compatibles to the new FMan

>> device tree binding document.

>> The FMan device tree binding document can be found in the Linux

>> kernel:

>> ./Documentation/devicetree/bindings/net/fsl-fman.txt



> It would be helpful to know which version or commit has this change.

> It doesn't impact this patch though.



Thank you for your suggestion! I will add it in next version.



BR

Qiang Zhao
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[U-Boot] [PATCH v3 04/21] dm: pci: Extract vendor/device id in child_post_bind()

[Bin Meng]

Currently only devfn is extracted in child_post_bind(). Now that
we have the live-tree version API to look up PCI vendor and device
id from the compatible string, let's extract and save them too.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 drivers/pci/pci-uclass.c | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 46e9c71..b2909a3 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -987,19 +987,18 @@ static int pci_uclass_child_post_bind(struct udevice *dev)
if (!dev_of_valid(dev))
return 0;
 
-   /*
-* We could read vendor, device, class if available. But for now we
-* just check the address.
-*/
pplat = dev_get_parent_platdata(dev);
+
+   /* Extract vendor id and device id if available */
+   ofnode_read_pci_vendev(dev_ofnode(dev), &pplat->vendor, &pplat->device);
+
+   /* Extract the devfn from fdt_pci_addr */
ret = ofnode_read_pci_addr(dev_ofnode(dev), FDT_PCI_SPACE_CONFIG, "reg",
   &addr);
-
if (ret) {
if (ret != -ENOENT)
return -EINVAL;
} else {
-   /* extract the devfn from fdt_pci_addr */
pplat->devfn = addr.phys_hi & 0xff00;
}
 
-- 
2.7.4

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[U-Boot] [PATCH v3 01/21] pci: Remove 440ep-specific macros

[Bin Meng]

These macros should not be put in the generic pci.h header file.
Since they are not referenced anywhere, remove them completely.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 

---

Changes in v3:
- Change commit title to use "440ep-specific"

Changes in v2: None

 include/pci.h | 15 ---
 1 file changed, 15 deletions(-)

diff --git a/include/pci.h b/include/pci.h
index 8e27cbf..427094c 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -271,21 +271,6 @@
 #define  PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */
 #define  PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled on secondary 
interface */
 
-/* From 440ep */
-#define PCI_ERREN   0x48 /* Error Enable */
-#define PCI_ERRSTS  0x49 /* Error Status */
-#define PCI_BRDGOPT10x4A /* PCI Bridge Options 1 */
-#define PCI_PLBSESR00x4C /* PCI PLB Slave Error Syndrome 0 */
-#define PCI_PLBSESR10x50 /* PCI PLB Slave Error Syndrome 1 */
-#define PCI_PLBSEAR 0x54 /* PCI PLB Slave Error Address */
-#define PCI_CAPID   0x58 /* Capability Identifier */
-#define PCI_NEXTITEMPTR 0x59 /* Next Item Pointer */
-#define PCI_PMC 0x5A /* Power Management Capabilities */
-#define PCI_PMCSR   0x5C /* Power Management Control Status */
-#define PCI_PMCSRBSE0x5E /* PMCSR PCI to PCI Bridge Support Extensions 
*/
-#define PCI_BRDGOPT20x60 /* PCI Bridge Options 2 */
-#define PCI_PMSCRR  0x64 /* Power Management State Change Request Re. 
*/
-
 /* Header type 2 (CardBus bridges) */
 #define PCI_CB_CAPABILITY_LIST 0x14
 /* 0x15 reserved */
-- 
2.7.4

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[U-Boot] [PATCH v3 00/21] dm: pci: Various fixes and test cases update

[Bin Meng]

This fixes several bugs in dm pci driver, as well as updating test
cases running on Sandbox to test dm pci.

It turns out adding test cases for v1 (3 commits) reveals more design
limitations/bugs of sandbox pci driver. Now the v2/v3 series contains
20+ patches!

This series is available for testing at u-boot-x86/pci branch.

Changes in v3:
- Change commit title to use "440ep-specific"
- Update commit message to mention removing redundant asserts
- Update doc to describe the "sandbox,dev-info" encodings
- Describe test configuration in the commit message

Changes in v2:
- Mask header_type with 0x7f

Bin Meng (21):
  pci: Remove 440ep-specific macros
  dm: Correct typos in uclass_first/next_device_check()
  dm: core: Add ofnode function to read PCI vendor and device id
  dm: pci: Extract vendor/device id in child_post_bind()
  dm: pci: Fix scanning multi-function device
  test: dm: pci: Remove unnecessary steps in dm_test_pci_swapcase()
  test: dm: pci: Test more than one device on the same bus
  pci: sandbox: swap_case: Preserve space indicator bit in BAR registers
  test: dm: pci: Test more than one PCI host controller
  test: dm: pci: Add tests for configuration space access
  pci: sandbox: emul: Fix the call to pci_bus_find_devfn()
  dm: pci: Assign correct driver data when binding a driver
  pci: sandbox: Support dynamically binding device driver
  pci: sandbox: swap_case: Declare dynamic driver matching
  sandbox: Update test.dts for dynamic PCI device driver matching
  test: dm: pci: Test driver binding with driver data provided
  pci: sandbox: emul: Rename priv structure
  test: dm: pci: Add tests for mixed static and dynamic devices on the
same bus
  pci: Add all known capability and extended capability ids
  dm: pci: Add APIs to find capability and extended capability
  test: dm: pci: Add cases for finding PCI capability APIs

 arch/sandbox/dts/test.dts   |  41 +-
 arch/sandbox/include/asm/test.h |  12 +++
 doc/driver-model/pci-info.txt   |  28 +++
 drivers/core/ofnode.c   |  36 +
 drivers/misc/swap_case.c|  36 -
 drivers/pci/pci-emul-uclass.c   |  24 +++---
 drivers/pci/pci-uclass.c|  83 ++--
 drivers/pci/pci_sandbox.c   |  78 --
 include/dm/ofnode.h |  13 +++
 include/dm/uclass.h |   4 +-
 include/pci.h   |  84 
 test/dm/pci.c   | 170 ++--
 12 files changed, 556 insertions(+), 53 deletions(-)

-- 
2.7.4

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[U-Boot] [PATCH v3 10/21] test: dm: pci: Add tests for configuration space access

[Bin Meng]

So far we missed the testing for PCI configuration space access.
This adds tests for it, as well as removing some redundant asserts.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 

---

Changes in v3:
- Update commit message to mention removing redundant asserts

Changes in v2: None

 test/dm/pci.c | 24 +++-
 1 file changed, 15 insertions(+), 9 deletions(-)

diff --git a/test/dm/pci.c b/test/dm/pci.c
index 727ec34..089b72e 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -6,6 +6,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 
@@ -24,27 +25,32 @@ DM_TEST(dm_test_pci_base, DM_TESTF_SCAN_PDATA | 
DM_TESTF_SCAN_FDT);
 static int dm_test_pci_busdev(struct unit_test_state *uts)
 {
struct udevice *bus;
-   struct udevice *emul, *swap;
+   struct udevice *swap;
+   u16 vendor, device;
 
/* Test bus#0 and its devices */
ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
 
-   ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 0, &emul));
ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x00, 0), &swap));
-   ut_assert(device_active(swap));
-   ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 1, &emul));
+   vendor = 0;
+   ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor));
+   ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor);
ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
-   ut_assert(device_active(swap));
+   device = 0;
+   ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device));
+   ut_asserteq(SANDBOX_PCI_DEVICE_ID, device);
 
/* Test bus#1 and its devices */
ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));
 
-   ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 2, &emul));
ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap));
-   ut_assert(device_active(swap));
-   ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 3, &emul));
+   vendor = 0;
+   ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor));
+   ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor);
ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap));
-   ut_assert(device_active(swap));
+   device = 0;
+   ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device));
+   ut_asserteq(SANDBOX_PCI_DEVICE_ID, device);
 
return 0;
 }
-- 
2.7.4

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[U-Boot] [PATCH v3 11/21] pci: sandbox: emul: Fix the call to pci_bus_find_devfn()

[Bin Meng]

With the newly added test cases for PCI configuration access, we get:

  => ut dm pci_busdev
  Test: dm_test_pci_busdev: pci.c
  test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor:
  Expected 4660, got 65535
  Test: dm_test_pci_busdev: pci.c (flat tree)
  test/dm/pci.c:49, dm_test_pci_busdev(): SANDBOX_PCI_VENDOR_ID == vendor:
  Expected 4660, got 65535
  Failures: 2

The bug only shows up when bus number is not equal to zero. This is
caused by the plain find_devfn parameter is passed to function call
pci_bus_find_devfn(), inside which find_devfn is compared to devfn
in the device's pplat structure. However pplat->devfn does not carry
the bus number. Fix this by passing find_devfn with bus number masked.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 drivers/pci/pci-emul-uclass.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c
index 79e2c14..8570a5d 100644
--- a/drivers/pci/pci-emul-uclass.c
+++ b/drivers/pci/pci-emul-uclass.c
@@ -21,7 +21,7 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t 
find_devfn,
struct udevice *dev;
int ret;
 
-   ret = pci_bus_find_devfn(bus, find_devfn, &dev);
+   ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(find_devfn), &dev);
if (ret) {
debug("%s: Could not find emulator for dev %x\n", __func__,
  find_devfn);
-- 
2.7.4

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[U-Boot] [PATCH v3 03/21] dm: core: Add ofnode function to read PCI vendor and device id

[Bin Meng]

We don't have the live-tree version of fdtdec_get_pci_vendev().
This adds the API.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 drivers/core/ofnode.c | 36 
 include/dm/ofnode.h   | 13 +
 2 files changed, 49 insertions(+)

diff --git a/drivers/core/ofnode.c b/drivers/core/ofnode.c
index 2937539..0cfb0fb 100644
--- a/drivers/core/ofnode.c
+++ b/drivers/core/ofnode.c
@@ -623,6 +623,42 @@ fail:
return ret;
 }
 
+int ofnode_read_pci_vendev(ofnode node, u16 *vendor, u16 *device)
+{
+   const char *list, *end;
+   int len;
+
+   list = ofnode_get_property(node, "compatible", &len);
+   if (!list)
+   return -ENOENT;
+
+   end = list + len;
+   while (list < end) {
+   len = strlen(list);
+   if (len >= strlen("pci,")) {
+   char *s = strstr(list, "pci");
+
+   /*
+* check if the string is something like pci,.RR
+* or just pci,
+*/
+   if (s && s[7] == ',' &&
+   (s[12] == '.' || s[12] == 0)) {
+   s += 3;
+   *vendor = simple_strtol(s, NULL, 16);
+
+   s += 5;
+   *device = simple_strtol(s, NULL, 16);
+
+   return 0;
+   }
+   }
+   list += (len + 1);
+   }
+
+   return -ENOENT;
+}
+
 int ofnode_read_addr_cells(ofnode node)
 {
if (ofnode_is_np(node))
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index cd08a7e..ab36b74 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -586,6 +586,19 @@ int ofnode_read_pci_addr(ofnode node, enum fdt_pci_space 
type,
 const char *propname, struct fdt_pci_addr *addr);
 
 /**
+ * ofnode_read_pci_vendev() - look up PCI vendor and device id
+ *
+ * Look at the compatible property of a device node that represents a PCI
+ * device and extract pci vendor id and device id from it.
+ *
+ * @param node node to examine
+ * @param vendor   vendor id of the pci device
+ * @param device   device id of the pci device
+ * @return 0 if ok, negative on error
+ */
+int ofnode_read_pci_vendev(ofnode node, u16 *vendor, u16 *device);
+
+/**
  * ofnode_read_addr_cells() - Get the number of address cells for a node
  *
  * This walks back up the tree to find the closest #address-cells property
-- 
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[U-Boot] [PATCH v3 07/21] test: dm: pci: Test more than one device on the same bus

[Bin Meng]

It's quite common to have more than one device on the same PCI bus.
This updates the test case to test such scenario.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 arch/sandbox/dts/test.dts |  7 +++
 test/dm/pci.c | 37 +
 2 files changed, 40 insertions(+), 4 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 137679a..237266d 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -302,6 +302,13 @@
#size-cells = <2>;
ranges = <0x0200 0 0x1000 0x1000 0 0x2000
0x0100 0 0x2000 0x2000 0 0x2000>;
+   pci@0,0 {
+   compatible = "pci-generic";
+   reg = <0x 0 0 0 0>;
+   emul@0,0 {
+   compatible = "sandbox,swap-case";
+   };
+   };
pci@1f,0 {
compatible = "pci-generic";
reg = <0xf800 0 0 0 0>;
diff --git a/test/dm/pci.c b/test/dm/pci.c
index be1208c..f2bd52a 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -20,16 +20,24 @@ static int dm_test_pci_base(struct unit_test_state *uts)
 }
 DM_TEST(dm_test_pci_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
 
-/* Test that sandbox PCI bus numbering works correctly */
-static int dm_test_pci_busnum(struct unit_test_state *uts)
+/* Test that sandbox PCI bus numbering and device works correctly */
+static int dm_test_pci_busdev(struct unit_test_state *uts)
 {
struct udevice *bus;
+   struct udevice *emul, *swap;
 
ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
 
+   ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 0, &emul));
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x00, 0), &swap));
+   ut_assert(device_active(swap));
+   ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 1, &emul));
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
+   ut_assert(device_active(swap));
+
return 0;
 }
-DM_TEST(dm_test_pci_busnum, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+DM_TEST(dm_test_pci_busdev, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
 
 /* Test that we can use the swapcase device correctly */
 static int dm_test_pci_swapcase(struct unit_test_state *uts)
@@ -38,7 +46,28 @@ static int dm_test_pci_swapcase(struct unit_test_state *uts)
ulong io_addr, mem_addr;
char *ptr;
 
-   /* Check that asking for the device automatically fires up PCI */
+   /* Check that asking for the device 0 automatically fires up PCI */
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x00, 0), &swap));
+
+   /* First test I/O */
+   io_addr = dm_pci_read_bar32(swap, 0);
+   outb(2, io_addr);
+   ut_asserteq(2, inb(io_addr));
+
+   /*
+* Now test memory mapping - note we must unmap and remap to cause
+* the swapcase emulation to see our data and response.
+*/
+   mem_addr = dm_pci_read_bar32(swap, 1);
+   ptr = map_sysmem(mem_addr, 20);
+   strcpy(ptr, "This is a TesT");
+   unmap_sysmem(ptr);
+
+   ptr = map_sysmem(mem_addr, 20);
+   ut_asserteq_str("tHIS IS A tESt", ptr);
+   unmap_sysmem(ptr);
+
+   /* Check that asking for the device 1 automatically fires up PCI */
ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
 
/* First test I/O */
-- 
2.7.4

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[U-Boot] [PATCH v3 15/21] sandbox: Update test.dts for dynamic PCI device driver matching

[Bin Meng]

At present we have two PCI buses in the test configuration. Both
buses have static device-tree config devices. Now we switch the
2nd bus to use dynamic PCI devices for testing.

Signed-off-by: Bin Meng 

---

Changes in v3:
- Describe test configuration in the commit message

Changes in v2: None

 arch/sandbox/dts/test.dts | 16 ++--
 1 file changed, 2 insertions(+), 14 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 0bce6d0..44d24f9 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -326,20 +326,8 @@
#size-cells = <2>;
ranges = <0x0200 0 0x3000 0x3000 0 0x2000
0x0100 0 0x4000 0x4000 0 0x2000>;
-   pci@8,0 {
-   compatible = "pci-generic";
-   reg = <0x4000 0 0 0 0>;
-   emul@8,0 {
-   compatible = "sandbox,swap-case";
-   };
-   };
-   pci@c,0 {
-   compatible = "pci-generic";
-   reg = <0x6000 0 0 0 0>;
-   emul@c,0 {
-   compatible = "sandbox,swap-case";
-   };
-   };
+   sandbox,dev-info = <0x08 0x00 0x1234 0x5678
+   0x0c 0x00 0x1234 0x5678>;
};
 
probing {
-- 
2.7.4

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[U-Boot] [PATCH v3 08/21] pci: sandbox: swap_case: Preserve space indicator bit in BAR registers

[Bin Meng]

With the newly added testing of more than one device, we get:

  => ut dm pci_swapcase
  Test: dm_test_pci_swapcase: pci.c
  test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
  Expected "tHIS IS A tESt", got "this is a test"
  Test: dm_test_pci_swapcase: pci.c (flat tree)
  test/dm/pci.c:88, dm_test_pci_swapcase(): "tHIS IS A tESt" = ptr:
  Expected "tHIS IS A tESt", got "this is a test"
  Failures: 2

The failure only happens on the 2nd swap_case device on the PCI bus.
The case passes on the 1st device.

It turns out the swap_case driver does not emulate bit#0 in BAR
registers as a read-only bit. This corrects the implementation.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 drivers/misc/swap_case.c | 8 +---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c
index b777404..80ccb9f 100644
--- a/drivers/misc/swap_case.c
+++ b/drivers/misc/swap_case.c
@@ -142,6 +142,8 @@ static int sandbox_swap_case_write_config(struct udevice 
*emul, uint offset,
 
debug("w bar %d=%lx\n", barnum, value);
*bar = value;
+   /* space indicator (bit#0) is read-only */
+   *bar |= barinfo[barnum].type;
break;
}
}
@@ -157,11 +159,11 @@ static int sandbox_swap_case_find_bar(struct udevice 
*emul, unsigned int addr,
 
for (barnum = 0; barnum < ARRAY_SIZE(barinfo); barnum++) {
unsigned int size = barinfo[barnum].size;
+   u32 base = plat->bar[barnum] & ~PCI_BASE_ADDRESS_SPACE;
 
-   if (addr >= plat->bar[barnum] &&
-   addr < plat->bar[barnum] + size) {
+   if (addr >= base && addr < base + size) {
*barnump = barnum;
-   *offsetp = addr - plat->bar[barnum];
+   *offsetp = addr - base;
return 0;
}
}
-- 
2.7.4

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[U-Boot] [PATCH v3 05/21] dm: pci: Fix scanning multi-function device

[Bin Meng]

The flag to control whether to scan multi-function device during
enumeration should be cleared at the beginning of each iteration
if the device's function number equals to zero.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 drivers/pci/pci-uclass.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index b2909a3..28ea8c5 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -745,6 +745,8 @@ int pci_bind_bus_devices(struct udevice *bus)
struct udevice *dev;
ulong class;
 
+   if (!PCI_FUNC(bdf))
+   found_multi = false;
if (PCI_FUNC(bdf) && !found_multi)
continue;
/* Check only the first access, we don't expect problems */
-- 
2.7.4

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[U-Boot] [PATCH v3 06/21] test: dm: pci: Remove unnecessary steps in dm_test_pci_swapcase()

[Bin Meng]

The check on uclass_get_device() and device_active() is unnecessary
as the follow-up test operations will implicitly probe the driver.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 test/dm/pci.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/test/dm/pci.c b/test/dm/pci.c
index 47b5d22..be1208c 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -34,14 +34,12 @@ DM_TEST(dm_test_pci_busnum, DM_TESTF_SCAN_PDATA | 
DM_TESTF_SCAN_FDT);
 /* Test that we can use the swapcase device correctly */
 static int dm_test_pci_swapcase(struct unit_test_state *uts)
 {
-   struct udevice *emul, *swap;
+   struct udevice *swap;
ulong io_addr, mem_addr;
char *ptr;
 
/* Check that asking for the device automatically fires up PCI */
-   ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 0, &emul));
ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
-   ut_assert(device_active(swap));
 
/* First test I/O */
io_addr = dm_pci_read_bar32(swap, 0);
-- 
2.7.4

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[U-Boot] [PATCH v3 17/21] pci: sandbox: emul: Rename priv structure

[Bin Meng]

We have "struct sandbox_pci_priv" in pci_sandbox driver. To avoid
confusion, rename the emul's priv to "struct sandbox_pci_emul_priv".

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 drivers/pci/pci-emul-uclass.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c
index e9d2f49..3822758 100644
--- a/drivers/pci/pci-emul-uclass.c
+++ b/drivers/pci/pci-emul-uclass.c
@@ -11,7 +11,7 @@
 #include 
 #include 
 
-struct sandbox_pci_priv {
+struct sandbox_pci_emul_priv {
int dev_count;
 };
 
@@ -43,7 +43,7 @@ int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t 
find_devfn,
 
 static int sandbox_pci_emul_post_probe(struct udevice *dev)
 {
-   struct sandbox_pci_priv *priv = dev->uclass->priv;
+   struct sandbox_pci_emul_priv *priv = dev->uclass->priv;
 
priv->dev_count++;
sandbox_set_enable_pci_map(true);
@@ -53,7 +53,7 @@ static int sandbox_pci_emul_post_probe(struct udevice *dev)
 
 static int sandbox_pci_emul_pre_remove(struct udevice *dev)
 {
-   struct sandbox_pci_priv *priv = dev->uclass->priv;
+   struct sandbox_pci_emul_priv *priv = dev->uclass->priv;
 
priv->dev_count--;
sandbox_set_enable_pci_map(priv->dev_count > 0);
@@ -66,5 +66,5 @@ UCLASS_DRIVER(pci_emul) = {
.name   = "pci_emul",
.post_probe = sandbox_pci_emul_post_probe,
.pre_remove = sandbox_pci_emul_pre_remove,
-   .priv_auto_alloc_size   = sizeof(struct sandbox_pci_priv),
+   .priv_auto_alloc_size   = sizeof(struct sandbox_pci_emul_priv),
 };
-- 
2.7.4

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[U-Boot] [PATCH v3 12/21] dm: pci: Assign correct driver data when binding a driver

[Bin Meng]

The correct driver data comes from the matching 'id' instead of
'find_id' in pci_find_and_bind_driver().

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 drivers/pci/pci-uclass.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 28ea8c5..5eb6841 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -690,7 +690,7 @@ static int pci_find_and_bind_driver(struct udevice *parent,
if (ret)
goto error;
debug("%s: Match found: %s\n", __func__, drv->name);
-   dev->driver_data = find_id->driver_data;
+   dev->driver_data = id->driver_data;
*devp = dev;
return 0;
}
-- 
2.7.4

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[U-Boot] [PATCH v3 02/21] dm: Correct typos in uclass_first/next_device_check()

[Bin Meng]

Correct typos in the comment block of uclass_first/next_device_check().

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 include/dm/uclass.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 9fbaa7d..0e882ce 100644
--- a/include/dm/uclass.h
+++ b/include/dm/uclass.h
@@ -302,7 +302,7 @@ int uclass_first_device_err(enum uclass_id id, struct 
udevice **devp);
 int uclass_next_device(struct udevice **devp);
 
 /**
- * uclass_first_device() - Get the first device in a uclass
+ * uclass_first_device_check() - Get the first device in a uclass
  *
  * The device returned is probed if necessary, and ready for use
  *
@@ -318,7 +318,7 @@ int uclass_next_device(struct udevice **devp);
 int uclass_first_device_check(enum uclass_id id, struct udevice **devp);
 
 /**
- * uclass_next_device() - Get the next device in a uclass
+ * uclass_next_device_check() - Get the next device in a uclass
  *
  * The device returned is probed if necessary, and ready for use
  *
-- 
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[U-Boot] [PATCH v3 18/21] test: dm: pci: Add tests for mixed static and dynamic devices on the same bus

[Bin Meng]

In the Sandbox test configuration, PCI bus#0 only has static devices
while bus#1 only has dynamic devices. Create a bus#2 that has both
types of devices and test such.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 arch/sandbox/dts/test.dts | 18 ++
 test/dm/pci.c | 63 +++
 2 files changed, 81 insertions(+)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 44d24f9..7035646 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -16,6 +16,7 @@
mmc1 = "/mmc1";
pci0 = &pci0;
pci1 = &pci1;
+   pci2 = &pci2;
remoteproc1 = &rproc_1;
remoteproc2 = &rproc_2;
rtc0 = &rtc_0;
@@ -330,6 +331,23 @@
0x0c 0x00 0x1234 0x5678>;
};
 
+   pci2: pci-controller2 {
+   compatible = "sandbox,pci";
+   device_type = "pci";
+   #address-cells = <3>;
+   #size-cells = <2>;
+   ranges = <0x0200 0 0x5000 0x5000 0 0x2000
+   0x0100 0 0x6000 0x6000 0 0x2000>;
+   sandbox,dev-info = <0x08 0x00 0x1234 0x5678>;
+   pci@1f,0 {
+   compatible = "pci-generic";
+   reg = <0xf800 0 0 0 0>;
+   emul@1f,0 {
+   compatible = "sandbox,swap-case";
+   };
+   };
+   };
+
probing {
compatible = "simple-bus";
test1 {
diff --git a/test/dm/pci.c b/test/dm/pci.c
index 53d2ca1..e03f6ba 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -125,3 +125,66 @@ static int dm_test_pci_drvdata(struct unit_test_state *uts)
return 0;
 }
 DM_TEST(dm_test_pci_drvdata, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test that devices on PCI bus#2 can be accessed correctly */
+static int dm_test_pci_mixed(struct unit_test_state *uts)
+{
+   /* PCI bus#2 has both statically and dynamic declared devices */
+   struct udevice *bus, *swap;
+   u16 vendor, device;
+   ulong io_addr, mem_addr;
+   char *ptr;
+
+   ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 2, &bus));
+
+   /* Test the dynamic device */
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(2, 0x08, 0), &swap));
+   vendor = 0;
+   ut_assertok(dm_pci_read_config16(swap, PCI_VENDOR_ID, &vendor));
+   ut_asserteq(SANDBOX_PCI_VENDOR_ID, vendor);
+
+   /* First test I/O */
+   io_addr = dm_pci_read_bar32(swap, 0);
+   outb(2, io_addr);
+   ut_asserteq(2, inb(io_addr));
+
+   /*
+* Now test memory mapping - note we must unmap and remap to cause
+* the swapcase emulation to see our data and response.
+*/
+   mem_addr = dm_pci_read_bar32(swap, 1);
+   ptr = map_sysmem(mem_addr, 30);
+   strcpy(ptr, "This is a TesT oN dYNAMIc");
+   unmap_sysmem(ptr);
+
+   ptr = map_sysmem(mem_addr, 30);
+   ut_asserteq_str("tHIS IS A tESt On DynamiC", ptr);
+   unmap_sysmem(ptr);
+
+   /* Test the static device */
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(2, 0x1f, 0), &swap));
+   device = 0;
+   ut_assertok(dm_pci_read_config16(swap, PCI_DEVICE_ID, &device));
+   ut_asserteq(SANDBOX_PCI_DEVICE_ID, device);
+
+   /* First test I/O */
+   io_addr = dm_pci_read_bar32(swap, 0);
+   outb(2, io_addr);
+   ut_asserteq(2, inb(io_addr));
+
+   /*
+* Now test memory mapping - note we must unmap and remap to cause
+* the swapcase emulation to see our data and response.
+*/
+   mem_addr = dm_pci_read_bar32(swap, 1);
+   ptr = map_sysmem(mem_addr, 30);
+   strcpy(ptr, "This is a TesT oN sTATIc");
+   unmap_sysmem(ptr);
+
+   ptr = map_sysmem(mem_addr, 30);
+   ut_asserteq_str("tHIS IS A tESt On StatiC", ptr);
+   unmap_sysmem(ptr);
+
+   return 0;
+}
+DM_TEST(dm_test_pci_mixed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
-- 
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[U-Boot] [PATCH v3 09/21] test: dm: pci: Test more than one PCI host controller

[Bin Meng]

So far there is only one PCI host controller in the sandbox test
configuration. This is normally the case for x86, but it can be
common on other architectures like ARM/PPC to have more than one
PCI host controller in the system.

This updates the case to cover such scenario.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 arch/sandbox/dts/test.dts | 28 ++--
 test/dm/pci.c | 11 +++
 2 files changed, 37 insertions(+), 2 deletions(-)

diff --git a/arch/sandbox/dts/test.dts b/arch/sandbox/dts/test.dts
index 237266d..0bce6d0 100644
--- a/arch/sandbox/dts/test.dts
+++ b/arch/sandbox/dts/test.dts
@@ -14,7 +14,8 @@
i2c0 = "/i2c@0";
mmc0 = "/mmc0";
mmc1 = "/mmc1";
-   pci0 = &pci;
+   pci0 = &pci0;
+   pci1 = &pci1;
remoteproc1 = &rproc_1;
remoteproc2 = &rproc_2;
rtc0 = &rtc_0;
@@ -295,7 +296,7 @@
compatible = "sandbox,mmc";
};
 
-   pci: pci-controller {
+   pci0: pci-controller0 {
compatible = "sandbox,pci";
device_type = "pci";
#address-cells = <3>;
@@ -318,6 +319,29 @@
};
};
 
+   pci1: pci-controller1 {
+   compatible = "sandbox,pci";
+   device_type = "pci";
+   #address-cells = <3>;
+   #size-cells = <2>;
+   ranges = <0x0200 0 0x3000 0x3000 0 0x2000
+   0x0100 0 0x4000 0x4000 0 0x2000>;
+   pci@8,0 {
+   compatible = "pci-generic";
+   reg = <0x4000 0 0 0 0>;
+   emul@8,0 {
+   compatible = "sandbox,swap-case";
+   };
+   };
+   pci@c,0 {
+   compatible = "pci-generic";
+   reg = <0x6000 0 0 0 0>;
+   emul@c,0 {
+   compatible = "sandbox,swap-case";
+   };
+   };
+   };
+
probing {
compatible = "simple-bus";
test1 {
diff --git a/test/dm/pci.c b/test/dm/pci.c
index f2bd52a..727ec34 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -26,6 +26,7 @@ static int dm_test_pci_busdev(struct unit_test_state *uts)
struct udevice *bus;
struct udevice *emul, *swap;
 
+   /* Test bus#0 and its devices */
ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
 
ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 0, &emul));
@@ -35,6 +36,16 @@ static int dm_test_pci_busdev(struct unit_test_state *uts)
ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
ut_assert(device_active(swap));
 
+   /* Test bus#1 and its devices */
+   ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));
+
+   ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 2, &emul));
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap));
+   ut_assert(device_active(swap));
+   ut_assertok(uclass_get_device(UCLASS_PCI_EMUL, 3, &emul));
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap));
+   ut_assert(device_active(swap));
+
return 0;
 }
 DM_TEST(dm_test_pci_busdev, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
-- 
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[U-Boot] [PATCH v3 19/21] pci: Add all known capability and extended capability ids

[Bin Meng]

Currently we don't have a complete list of capability and extended
capability ids. This adds them.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 include/pci.h | 20 +++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/include/pci.h b/include/pci.h
index c0ae5d1..83a40a5 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -318,7 +318,21 @@
 #define  PCI_CAP_ID_SLOTID 0x04/* Slot Identification */
 #define  PCI_CAP_ID_MSI0x05/* Message Signalled Interrupts 
*/
 #define  PCI_CAP_ID_CHSWP  0x06/* CompactPCI HotSwap */
-#define  PCI_CAP_ID_EXP0x10/* PCI Express */
+#define  PCI_CAP_ID_PCIX   0x07/* PCI-X */
+#define  PCI_CAP_ID_HT 0x08/* HyperTransport */
+#define  PCI_CAP_ID_VNDR   0x09/* Vendor-Specific */
+#define  PCI_CAP_ID_DBG0x0A/* Debug port */
+#define  PCI_CAP_ID_CCRC   0x0B/* CompactPCI Central Resource Control 
*/
+#define  PCI_CAP_ID_SHPC   0x0C/* PCI Standard Hot-Plug Controller */
+#define  PCI_CAP_ID_SSVID  0x0D/* Bridge subsystem vendor/device ID */
+#define  PCI_CAP_ID_AGP3   0x0E/* AGP Target PCI-PCI bridge */
+#define  PCI_CAP_ID_SECDEV 0x0F/* Secure Device */
+#define  PCI_CAP_ID_EXP0x10/* PCI Express */
+#define  PCI_CAP_ID_MSIX   0x11/* MSI-X */
+#define  PCI_CAP_ID_SATA   0x12/* SATA Data/Index Conf. */
+#define  PCI_CAP_ID_AF 0x13/* PCI Advanced Features */
+#define  PCI_CAP_ID_EA 0x14/* PCI Enhanced Allocation */
+#define  PCI_CAP_ID_MAXPCI_CAP_ID_EA
 #define PCI_CAP_LIST_NEXT  1   /* Next capability in the list */
 #define PCI_CAP_FLAGS  2   /* Capability defined flags (16 bits) */
 #define PCI_CAP_SIZEOF 4
@@ -434,6 +448,10 @@
 #define PCI_EXT_CAP_ID_SECPCI  0x19/* Secondary PCIe Capability */
 #define PCI_EXT_CAP_ID_PMUX0x1A/* Protocol Multiplexing */
 #define PCI_EXT_CAP_ID_PASID   0x1B/* Process Address Space ID */
+#define PCI_EXT_CAP_ID_DPC 0x1D/* Downstream Port Containment */
+#define PCI_EXT_CAP_ID_L1SS0x1E/* L1 PM Substates */
+#define PCI_EXT_CAP_ID_PTM 0x1F/* Precision Time Measurement */
+#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PTM
 
 /* Include the ID list */
 
-- 
2.7.4

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[U-Boot] [PATCH v3 21/21] test: dm: pci: Add cases for finding PCI capability APIs

[Bin Meng]

Add several PCI capability and extended capability ID registers
in the swap_case driver, so that we can add test case for
dm_pci_find_capability() and dm_pci_find_ext_capability().

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 

---

Changes in v3: None
Changes in v2: None

 arch/sandbox/include/asm/test.h |  8 
 drivers/misc/swap_case.c| 21 +
 test/dm/pci.c   | 32 
 3 files changed, 61 insertions(+)

diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
index 57aeca8..c8ae52b 100644
--- a/arch/sandbox/include/asm/test.h
+++ b/arch/sandbox/include/asm/test.h
@@ -16,6 +16,14 @@
 #define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM
 #define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL
 
+#define PCI_CAP_ID_PM_OFFSET   0x50
+#define PCI_CAP_ID_EXP_OFFSET  0x60
+#define PCI_CAP_ID_MSIX_OFFSET 0x70
+
+#define PCI_EXT_CAP_ID_ERR_OFFSET  0x100
+#define PCI_EXT_CAP_ID_VC_OFFSET   0x200
+#define PCI_EXT_CAP_ID_DSN_OFFSET  0x300
+
 /* Useful for PCI_VDEVICE() macro */
 #define PCI_VENDOR_ID_SANDBOX  SANDBOX_PCI_VENDOR_ID
 #define SWAP_CASE_DRV_DATA 0x55aa
diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c
index 790bb0c..bffb809 100644
--- a/drivers/misc/swap_case.c
+++ b/drivers/misc/swap_case.c
@@ -118,6 +118,27 @@ static int sandbox_swap_case_read_config(struct udevice 
*emul, uint offset,
*valuep = result;
break;
}
+   case PCI_CAPABILITY_LIST:
+   *valuep = PCI_CAP_ID_PM_OFFSET;
+   break;
+   case PCI_CAP_ID_PM_OFFSET:
+   *valuep = (PCI_CAP_ID_EXP_OFFSET << 8) | PCI_CAP_ID_PM;
+   break;
+   case PCI_CAP_ID_EXP_OFFSET:
+   *valuep = (PCI_CAP_ID_MSIX_OFFSET << 8) | PCI_CAP_ID_EXP;
+   break;
+   case PCI_CAP_ID_MSIX_OFFSET:
+   *valuep = PCI_CAP_ID_MSIX;
+   break;
+   case PCI_EXT_CAP_ID_ERR_OFFSET:
+   *valuep = (PCI_EXT_CAP_ID_VC_OFFSET << 20) | PCI_EXT_CAP_ID_ERR;
+   break;
+   case PCI_EXT_CAP_ID_VC_OFFSET:
+   *valuep = (PCI_EXT_CAP_ID_DSN_OFFSET << 20) | PCI_EXT_CAP_ID_VC;
+   break;
+   case PCI_EXT_CAP_ID_DSN_OFFSET:
+   *valuep = PCI_EXT_CAP_ID_DSN;
+   break;
}
 
return 0;
diff --git a/test/dm/pci.c b/test/dm/pci.c
index e03f6ba..8699700 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -188,3 +188,35 @@ static int dm_test_pci_mixed(struct unit_test_state *uts)
return 0;
 }
 DM_TEST(dm_test_pci_mixed, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test looking up PCI capability and extended capability */
+static int dm_test_pci_cap(struct unit_test_state *uts)
+{
+   struct udevice *bus, *swap;
+   int cap;
+
+   ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 0, &bus));
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(0, 0x1f, 0), &swap));
+
+   /* look up PCI_CAP_ID_EXP */
+   cap = dm_pci_find_capability(swap, PCI_CAP_ID_EXP);
+   ut_asserteq(PCI_CAP_ID_EXP_OFFSET, cap);
+
+   /* look up PCI_CAP_ID_PCIX */
+   cap = dm_pci_find_capability(swap, PCI_CAP_ID_PCIX);
+   ut_asserteq(0, cap);
+
+   ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap));
+
+   /* look up PCI_EXT_CAP_ID_DSN */
+   cap = dm_pci_find_ext_capability(swap, PCI_EXT_CAP_ID_DSN);
+   ut_asserteq(PCI_EXT_CAP_ID_DSN_OFFSET, cap);
+
+   /* look up PCI_EXT_CAP_ID_SRIOV */
+   cap = dm_pci_find_ext_capability(swap, PCI_EXT_CAP_ID_SRIOV);
+   ut_asserteq(0, cap);
+
+   return 0;
+}
+DM_TEST(dm_test_pci_cap, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
-- 
2.7.4

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[U-Boot] [PATCH v3 13/21] pci: sandbox: Support dynamically binding device driver

[Bin Meng]

At present all emulated sandbox pci devices must be present in the
device tree in order to be used. The real world pci uclass driver
supports pci device driver matching, and we should add such support
on sandbox too.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 

---

Changes in v3:
- Update doc to describe the "sandbox,dev-info" encodings

Changes in v2: None

 doc/driver-model/pci-info.txt | 28 
 drivers/pci/pci-emul-uclass.c | 14 +---
 drivers/pci/pci_sandbox.c | 78 +++
 include/pci.h |  3 +-
 4 files changed, 112 insertions(+), 11 deletions(-)

diff --git a/doc/driver-model/pci-info.txt b/doc/driver-model/pci-info.txt
index 52b4389..e1701d1 100644
--- a/doc/driver-model/pci-info.txt
+++ b/doc/driver-model/pci-info.txt
@@ -133,3 +133,31 @@ When this bus is scanned we will end up with something 
like this:
 
 When accesses go to the pci@1f,0 device they are forwarded to its child, the
 emulator.
+
+The sandbox PCI drivers also support dynamic driver binding, allowing device
+driver to declare the driver binding information via U_BOOT_PCI_DEVICE(),
+eliminating the need to provide any device tree node under the host controller
+node. It is required a "sandbox,dev-info" property must be provided in the
+host controller node for this functionality to work.
+
+   pci1: pci-controller1 {
+   compatible = "sandbox,pci";
+   ...
+   sandbox,dev-info = <0x08 0x00 0x1234 0x5678
+   0x0c 0x00 0x1234 0x5678>;
+   };
+
+The "sandbox,dev-info" property specifies all dynamic PCI devices on this bus.
+Each dynamic PCI device is encoded as 4 cells a group. The first and second
+cells are PCI device number and function number respectively. The third and
+fourth cells are PCI vendor ID and device ID respectively.
+
+When this bus is scanned we will end up with something like this:
+
+ pci[ + ]   pci_sandbo  |-- pci-controller1
+ pci_emul   [   ]   sandbox_sw  |   |-- sandbox_swap_case_emul
+ pci_emul   [   ]   sandbox_sw  |   `-- sandbox_swap_case_emul
+
+Note the difference from the statically declared device nodes is that the
+device is directly attached to the host controller, instead of via a container
+device like pci@1f,0.
diff --git a/drivers/pci/pci-emul-uclass.c b/drivers/pci/pci-emul-uclass.c
index 8570a5d..e9d2f49 100644
--- a/drivers/pci/pci-emul-uclass.c
+++ b/drivers/pci/pci-emul-uclass.c
@@ -16,21 +16,27 @@ struct sandbox_pci_priv {
 };
 
 int sandbox_pci_get_emul(struct udevice *bus, pci_dev_t find_devfn,
-struct udevice **emulp)
+struct udevice **containerp, struct udevice **emulp)
 {
struct udevice *dev;
int ret;
 
+   *containerp = NULL;
ret = pci_bus_find_devfn(bus, PCI_MASK_BUS(find_devfn), &dev);
if (ret) {
debug("%s: Could not find emulator for dev %x\n", __func__,
  find_devfn);
return ret;
}
+   *containerp = dev;
 
-   ret = device_find_first_child(dev, emulp);
-   if (ret)
-   return ret;
+   if (device_get_uclass_id(dev) == UCLASS_PCI_GENERIC) {
+   ret = device_find_first_child(dev, emulp);
+   if (ret)
+   return ret;
+   } else {
+   *emulp = dev;
+   }
 
return *emulp ? 0 : -ENODEV;
 }
diff --git a/drivers/pci/pci_sandbox.c b/drivers/pci/pci_sandbox.c
index 67cd733..119a98d 100644
--- a/drivers/pci/pci_sandbox.c
+++ b/drivers/pci/pci_sandbox.c
@@ -10,15 +10,27 @@
 #include 
 #include 
 
+#define FDT_DEV_INFO_CELLS 4
+#define FDT_DEV_INFO_SIZE  (FDT_DEV_INFO_CELLS * sizeof(u32))
+
+#define SANDBOX_PCI_DEVFN(d, f)((d << 3) | f)
+
+struct sandbox_pci_priv {
+   struct {
+   u16 vendor;
+   u16 device;
+   } vendev[256];
+};
+
 static int sandbox_pci_write_config(struct udevice *bus, pci_dev_t devfn,
uint offset, ulong value,
enum pci_size_t size)
 {
struct dm_pci_emul_ops *ops;
-   struct udevice *emul;
+   struct udevice *container, *emul;
int ret;
 
-   ret = sandbox_pci_get_emul(bus, devfn, &emul);
+   ret = sandbox_pci_get_emul(bus, devfn, &container, &emul);
if (ret)
return ret == -ENODEV ? 0 : ret;
ops = pci_get_emul_ops(emul);
@@ -33,14 +45,31 @@ static int sandbox_pci_read_config(struct udevice *bus, 
pci_dev_t devfn,
   enum pci_size_t size)
 {
struct dm_pci_emul_ops *ops;
-   struct udevice *emul;
+   struct udevice *container, *emul;
+   struct sandbox_pci_priv *priv = dev_get_priv(bus);
int ret;
 
/* Prepare the default response */
*valuep = pci_get_ff(size);
-   ret = sandbox_pci_get_emul(bus, devfn, &emul);
-  

[U-Boot] [PATCH v3 20/21] dm: pci: Add APIs to find capability and extended capability

[Bin Meng]

This introduces two new APIs dm_pci_find_capability() and
dm_pci_find_ext_capability() to get PCI capability address and
PCI express extended capability address for a given PCI device.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 

---

Changes in v3: None
Changes in v2:
- Mask header_type with 0x7f

 drivers/pci/pci-uclass.c | 68 
 include/pci.h| 46 
 2 files changed, 114 insertions(+)

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 5eb6841..e9671d9 100644
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -1320,6 +1320,74 @@ void *dm_pci_map_bar(struct udevice *dev, int bar, int 
flags)
return dm_pci_bus_to_virt(dev, pci_bus_addr, flags, 0, MAP_NOCACHE);
 }
 
+int dm_pci_find_capability(struct udevice *dev, int cap)
+{
+   u16 status;
+   u8 header_type;
+   int ttl = PCI_FIND_CAP_TTL;
+   u8 id;
+   u16 ent;
+   u8 pos;
+
+   dm_pci_read_config16(dev, PCI_STATUS, &status);
+   if (!(status & PCI_STATUS_CAP_LIST))
+   return 0;
+
+   dm_pci_read_config8(dev, PCI_HEADER_TYPE, &header_type);
+   if ((header_type & 0x7f) == PCI_HEADER_TYPE_CARDBUS)
+   pos = PCI_CB_CAPABILITY_LIST;
+   else
+   pos = PCI_CAPABILITY_LIST;
+
+   dm_pci_read_config8(dev, pos, &pos);
+   while (ttl--) {
+   if (pos < PCI_STD_HEADER_SIZEOF)
+   break;
+   pos &= ~3;
+   dm_pci_read_config16(dev, pos, &ent);
+
+   id = ent & 0xff;
+   if (id == 0xff)
+   break;
+   if (id == cap)
+   return pos;
+   pos = (ent >> 8);
+   }
+
+   return 0;
+}
+
+int dm_pci_find_ext_capability(struct udevice *dev, int cap)
+{
+   u32 header;
+   int ttl;
+   int pos = PCI_CFG_SPACE_SIZE;
+
+   /* minimum 8 bytes per capability */
+   ttl = (PCI_CFG_SPACE_EXP_SIZE - PCI_CFG_SPACE_SIZE) / 8;
+
+   dm_pci_read_config32(dev, pos, &header);
+   /*
+* If we have no capabilities, this is indicated by cap ID,
+* cap version and next pointer all being 0.
+*/
+   if (header == 0)
+   return 0;
+
+   while (ttl--) {
+   if (PCI_EXT_CAP_ID(header) == cap)
+   return pos;
+
+   pos = PCI_EXT_CAP_NEXT(header);
+   if (pos < PCI_CFG_SPACE_SIZE)
+   break;
+
+   dm_pci_read_config32(dev, pos, &header);
+   }
+
+   return 0;
+}
+
 UCLASS_DRIVER(pci) = {
.id = UCLASS_PCI,
.name   = "pci",
diff --git a/include/pci.h b/include/pci.h
index 83a40a5..938a839 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -17,6 +17,7 @@
  * Under PCI, each device has 256 bytes of configuration address space,
  * of which the first 64 bytes are standardized as follows:
  */
+#define PCI_STD_HEADER_SIZEOF  64
 #define PCI_VENDOR_ID  0x00/* 16 bits */
 #define PCI_DEVICE_ID  0x02/* 16 bits */
 #define PCI_COMMAND0x04/* 16 bits */
@@ -1311,6 +1312,51 @@ pci_addr_t dm_pci_phys_to_bus(struct udevice *dev, 
phys_addr_t addr,
  */
 void *dm_pci_map_bar(struct udevice *dev, int bar, int flags);
 
+/**
+ * dm_pci_find_capability() - find a capability
+ *
+ * Tell if a device supports a given PCI capability. Returns the
+ * address of the requested capability structure within the device's
+ * PCI configuration space or 0 in case the device does not support it.
+ *
+ * Possible values for @cap:
+ *
+ *  %PCI_CAP_ID_MSIMessage Signalled Interrupts
+ *  %PCI_CAP_ID_PCIX   PCI-X
+ *  %PCI_CAP_ID_EXPPCI Express
+ *  %PCI_CAP_ID_MSIX   MSI-X
+ *
+ * See PCI_CAP_ID_xxx for the complete capability ID codes.
+ *
+ * @dev:   PCI device to query
+ * @cap:   capability code
+ * @return:capability address or 0 if not supported
+ */
+int dm_pci_find_capability(struct udevice *dev, int cap);
+
+/**
+ * dm_pci_find_ext_capability() - find an extended capability
+ *
+ * Tell if a device supports a given PCI express extended capability.
+ * Returns the address of the requested extended capability structure
+ * within the device's PCI configuration space or 0 in case the device
+ * does not support it.
+ *
+ * Possible values for @cap:
+ *
+ *  %PCI_EXT_CAP_ID_ERRAdvanced Error Reporting
+ *  %PCI_EXT_CAP_ID_VC Virtual Channel
+ *  %PCI_EXT_CAP_ID_DSNDevice Serial Number
+ *  %PCI_EXT_CAP_ID_PWRPower Budgeting
+ *
+ * See PCI_EXT_CAP_ID_xxx for the complete extended capability ID codes.
+ *
+ * @dev:   PCI device to query
+ * @cap:   extended capability code
+ * @return:extended capability address or 0 if not supported
+ */
+int dm_pci_find_ext_capability(struct udevice *dev, int cap);
+
 #define dm_pci_virt_to_bus(dev, addr, flags) \
d

[U-Boot] [PATCH v3 14/21] pci: sandbox: swap_case: Declare dynamic driver matching

[Bin Meng]

This adds a U_BOOT_PCI_DEVICE() declaration to the swap_case driver.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 arch/sandbox/include/asm/test.h | 4 
 drivers/misc/swap_case.c| 7 +++
 2 files changed, 11 insertions(+)

diff --git a/arch/sandbox/include/asm/test.h b/arch/sandbox/include/asm/test.h
index 08863bf..57aeca8 100644
--- a/arch/sandbox/include/asm/test.h
+++ b/arch/sandbox/include/asm/test.h
@@ -16,6 +16,10 @@
 #define SANDBOX_PCI_CLASS_CODE PCI_CLASS_CODE_COMM
 #define SANDBOX_PCI_CLASS_SUB_CODE PCI_CLASS_SUB_CODE_COMM_SERIAL
 
+/* Useful for PCI_VDEVICE() macro */
+#define PCI_VENDOR_ID_SANDBOX  SANDBOX_PCI_VENDOR_ID
+#define SWAP_CASE_DRV_DATA 0x55aa
+
 #define SANDBOX_CLK_RATE   32768
 
 /* System controller driver data */
diff --git a/drivers/misc/swap_case.c b/drivers/misc/swap_case.c
index 80ccb9f..790bb0c 100644
--- a/drivers/misc/swap_case.c
+++ b/drivers/misc/swap_case.c
@@ -285,3 +285,10 @@ U_BOOT_DRIVER(sandbox_swap_case_emul) = {
.priv_auto_alloc_size = sizeof(struct swap_case_priv),
.platdata_auto_alloc_size = sizeof(struct swap_case_platdata),
 };
+
+static struct pci_device_id sandbox_swap_case_supported[] = {
+   { PCI_VDEVICE(SANDBOX, SANDBOX_PCI_DEVICE_ID), SWAP_CASE_DRV_DATA },
+   {},
+};
+
+U_BOOT_PCI_DEVICE(sandbox_swap_case_emul, sandbox_swap_case_supported);
-- 
2.7.4

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[U-Boot] [PATCH v3 16/21] test: dm: pci: Test driver binding with driver data provided

[Bin Meng]

With struct pci_device_id, it's possible to pass a driver data for
bound driver to use. This adds a test case for this functionality.

Signed-off-by: Bin Meng 
Reviewed-by: Simon Glass 
---

Changes in v3: None
Changes in v2: None

 test/dm/pci.c | 17 +
 1 file changed, 17 insertions(+)

diff --git a/test/dm/pci.c b/test/dm/pci.c
index 089b72e..53d2ca1 100644
--- a/test/dm/pci.c
+++ b/test/dm/pci.c
@@ -108,3 +108,20 @@ static int dm_test_pci_swapcase(struct unit_test_state 
*uts)
return 0;
 }
 DM_TEST(dm_test_pci_swapcase, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
+
+/* Test that we can dynamically bind the device driver correctly */
+static int dm_test_pci_drvdata(struct unit_test_state *uts)
+{
+   struct udevice *bus, *swap;
+
+   /* Check that asking for the device automatically fires up PCI */
+   ut_assertok(uclass_get_device_by_seq(UCLASS_PCI, 1, &bus));
+
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x08, 0), &swap));
+   ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data);
+   ut_assertok(dm_pci_bus_find_bdf(PCI_BDF(1, 0x0c, 0), &swap));
+   ut_asserteq(SWAP_CASE_DRV_DATA, swap->driver_data);
+
+   return 0;
+}
+DM_TEST(dm_test_pci_drvdata, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);
-- 
2.7.4

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Re: [U-Boot] [PATCH v6 00/27] SPI-NAND support

[Miquel Raynal]

Hi Jagan, Tom,

Miquel Raynal  wrote on Wed,  1 Aug 2018
10:18:21 +0200:

> During the last months, Boris Brezillon shared his work to support
> serial flashes within Linux. First, he delivered (and merged) a new
> layer called spi-mem. He also initiated in Linux MTD subsystem the move
> of all 'raw' NAND related code to a raw/ subdirectory, adding at the
> same time a NAND core that would be shared with all NAND devices. Then,
> he contributed a generic SPI-NAND driver, making use of this NAND core,
> as well as some vendor code to drive a few chips.
> 
> On top of this work, I added an 'mtd' U-Boot command to handle all sort
> of MTD devices. This should become the default command instead of having
> one per flash flavor ('sf', 'nand', 'spi-nand' ?).
> 
> The series has been tested on an Ocelot board PCB123 (VSC7514),
> featuring a Macronix SPI NAND chip.
> 
> TL;DR: the series contains:
> - A few patches from Linux to resynchronize some areas of the MTD layer.
> - Various fixes and re-organization of the MTD subsystem.
> - The introduction of the SPI-mem interface.
> - The addition of the generic SPI-NAND driver (and its bindings).
> - Several SPI NAND chip drivers (Macronix, Micron, Winbond).
> - A new 'mtd' command.
> - Support for spi-nand devices in mtdparts.
> 
> To test your SPI-NAND device with U-Boot simply follow these lines:
> 
> > setenv mtdparts mtdparts=spi-nand0:1m(foo),-(bar)
> > setenv mtdids spi-nand0=spi-nand0
> > mtdparts # show the spi-nand device partitions
> > ubi part bar # create a static UBI volume in the bar partition  
> 
> Thanks,
> Miquèl
> 
> Changes since v5:
> -
> * Included Boris fixup about the build issues.
> * Added Rb/Ab tags from Jagan on patchs 20/21.

I can't see a pull request flow on U-Boot ML, I suppose you use a
different mean for that purpose.

Jagan, is this version OK? Is it part of your PR?

Thanks,
Miquèl
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Re: [U-Boot] [PATCH] ARM: socfpga: Convert to DM serial

[Simon Goldschmidt]

On 01.08.2018 09:34, Marek Vasut wrote:

On 08/01/2018 09:29 AM, Goldschmidt Simon wrote:


On 30.07.2018 16:04, Marek Vasut wrote:

On 07/30/2018 04:03 PM, Simon Goldschmidt wrote:


On 12.05.2018 22:28, Marek Vasut wrote:

Pull the serial port configuration from DT and use DM serial instead
of having the serial configuration in two places, DT and board config.

Signed-off-by: Marek Vasut 
Cc: Chin Liang See 
Cc: Dinh Nguyen 
---
    arch/arm/Kconfig | 3 +++
    arch/arm/dts/socfpga.dtsi    | 2 ++
    arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 1 +
    include/configs/socfpga_common.h | 8 
    4 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 532aa41a87..2012ac6410 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -737,6 +737,7 @@ config ARCH_SOCFPGA
    select ARCH_MISC_INIT
    select CPU_V7A
    select DM
+    select DM_SERIAL
    select ENABLE_ARM_SOC_BOOT0_HOOK
    select OF_CONTROL
    select SPL_LIBCOMMON_SUPPORT
@@ -746,11 +747,13 @@ config ARCH_SOCFPGA
    select SPL_NAND_SUPPORT if SPL_NAND_DENALI
    select SPL_OF_CONTROL
    select SPL_SERIAL_SUPPORT
+    select SPL_DM_SERIAL
    select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
    select SPL_SPI_SUPPORT if DM_SPI
    select SPL_WATCHDOG_SUPPORT
    select SUPPORT_SPL
    select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
+    select SYS_NS16550
    select SYS_THUMB_BUILD
    imply CMD_MTDPARTS
    imply CRC32_VERIFY
diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
index e64127fcb2..314449478d 100644
--- a/arch/arm/dts/socfpga.dtsi
+++ b/arch/arm/dts/socfpga.dtsi
@@ -737,6 +737,7 @@
    reg-shift = <2>;
    reg-io-width = <4>;
    clocks = <&l4_sp_clk>;
+    clock-frequency = <1>;
    };
      uart1: serial1@ffc03000 {
@@ -746,6 +747,7 @@
    reg-shift = <2>;
    reg-io-width = <4>;
    clocks = <&l4_sp_clk>;
+    clock-frequency = <1>;
    };
      rst: rstmgr@ffd05000 {
diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
index b573d0e658..06b61cb0af 100644
--- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
+++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
@@ -24,6 +24,7 @@
    };
      &uart1 {
+    clock-frequency = <5000>;
    u-boot,dm-pre-reloc;
    status = "okay";
    };
diff --git a/include/configs/socfpga_common.h
b/include/configs/socfpga_common.h
index 54b9edc97c..a60da85499 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -173,14 +173,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
     * Serial Driver
     */
    #define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE    -4
-#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
-#define CONFIG_SYS_NS16550_COM1    SOCFPGA_UART0_ADDRESS
-#define CONFIG_SYS_NS16550_CLK    1
-#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
-#define CONFIG_SYS_NS16550_COM1    SOCFPGA_UART1_ADDRESS
-#define CONFIG_SYS_NS16550_CLK    5000
-#endif
      /*
     * USB


Unfortunately I saw this just now, but it seems this breaks GEN5 SPL? At
least git-bisect told me that 73172753f4f3351ed1c9d2f6586fc599ce4e728c
is the first bad commit.

I tested socfpga_socrates_defconfig on my socrates board.

Any idea what's wrong there?

Nope, this should work fine. Can you investigate ?


Ok, so after adding "u-boot,dm-pre-reloc" to uart0 in
socfpga_cyclone5_socrates.dts, U-Boot works (combined with an old SPL).


Good!


SPL still does not work. Any idea? How does SPL get the uart?

Thanks for any pointers.


Dig around the NS16550 driver .
OK, so my DS-5 debugger shows me it's not the driver that fails but 
"malloc_simple()" returns 0x0 when being called from 
uclass_get_device_by_seq(). Which is strange because gd->malloc_base is 
0xe000.


Also, gd->fdt_blob is not initialized at the time serial_init() is 
called from SPL. Should it be? Because that way, we don't seem to have 
dts control over which uart is used as console?


Simon

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Re: [U-Boot] [PATCH] ARM: socfpga: Convert to DM serial

[Marek Vasut]

On 08/03/2018 10:40 AM, Simon Goldschmidt wrote:
> 
> 
> On 01.08.2018 09:34, Marek Vasut wrote:
>> On 08/01/2018 09:29 AM, Goldschmidt Simon wrote:
>>>
>>> On 30.07.2018 16:04, Marek Vasut wrote:
 On 07/30/2018 04:03 PM, Simon Goldschmidt wrote:
>
> On 12.05.2018 22:28, Marek Vasut wrote:
>> Pull the serial port configuration from DT and use DM serial instead
>> of having the serial configuration in two places, DT and board
>> config.
>>
>> Signed-off-by: Marek Vasut 
>> Cc: Chin Liang See 
>> Cc: Dinh Nguyen 
>> ---
>>     arch/arm/Kconfig | 3 +++
>>     arch/arm/dts/socfpga.dtsi    | 2 ++
>>     arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 1 +
>>     include/configs/socfpga_common.h | 8 
>>     4 files changed, 6 insertions(+), 8 deletions(-)
>>
>> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
>> index 532aa41a87..2012ac6410 100644
>> --- a/arch/arm/Kconfig
>> +++ b/arch/arm/Kconfig
>> @@ -737,6 +737,7 @@ config ARCH_SOCFPGA
>>     select ARCH_MISC_INIT
>>     select CPU_V7A
>>     select DM
>> +    select DM_SERIAL
>>     select ENABLE_ARM_SOC_BOOT0_HOOK
>>     select OF_CONTROL
>>     select SPL_LIBCOMMON_SUPPORT
>> @@ -746,11 +747,13 @@ config ARCH_SOCFPGA
>>     select SPL_NAND_SUPPORT if SPL_NAND_DENALI
>>     select SPL_OF_CONTROL
>>     select SPL_SERIAL_SUPPORT
>> +    select SPL_DM_SERIAL
>>     select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
>>     select SPL_SPI_SUPPORT if DM_SPI
>>     select SPL_WATCHDOG_SUPPORT
>>     select SUPPORT_SPL
>>     select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
>> +    select SYS_NS16550
>>     select SYS_THUMB_BUILD
>>     imply CMD_MTDPARTS
>>     imply CRC32_VERIFY
>> diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
>> index e64127fcb2..314449478d 100644
>> --- a/arch/arm/dts/socfpga.dtsi
>> +++ b/arch/arm/dts/socfpga.dtsi
>> @@ -737,6 +737,7 @@
>>     reg-shift = <2>;
>>     reg-io-width = <4>;
>>     clocks = <&l4_sp_clk>;
>> +    clock-frequency = <1>;
>>     };
>>       uart1: serial1@ffc03000 {
>> @@ -746,6 +747,7 @@
>>     reg-shift = <2>;
>>     reg-io-width = <4>;
>>     clocks = <&l4_sp_clk>;
>> +    clock-frequency = <1>;
>>     };
>>       rst: rstmgr@ffd05000 {
>> diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
>> b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
>> index b573d0e658..06b61cb0af 100644
>> --- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
>> +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
>> @@ -24,6 +24,7 @@
>>     };
>>       &uart1 {
>> +    clock-frequency = <5000>;
>>     u-boot,dm-pre-reloc;
>>     status = "okay";
>>     };
>> diff --git a/include/configs/socfpga_common.h
>> b/include/configs/socfpga_common.h
>> index 54b9edc97c..a60da85499 100644
>> --- a/include/configs/socfpga_common.h
>> +++ b/include/configs/socfpga_common.h
>> @@ -173,14 +173,6 @@ unsigned int
>> cm_get_qspi_controller_clk_hz(void);
>>  * Serial Driver
>>  */
>>     #define CONFIG_SYS_NS16550_SERIAL
>> -#define CONFIG_SYS_NS16550_REG_SIZE    -4
>> -#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
>> -#define CONFIG_SYS_NS16550_COM1    SOCFPGA_UART0_ADDRESS
>> -#define CONFIG_SYS_NS16550_CLK    1
>> -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
>> -#define CONFIG_SYS_NS16550_COM1    SOCFPGA_UART1_ADDRESS
>> -#define CONFIG_SYS_NS16550_CLK    5000
>> -#endif
>>       /*
>>  * USB
>>
> Unfortunately I saw this just now, but it seems this breaks GEN5
> SPL? At
> least git-bisect told me that 73172753f4f3351ed1c9d2f6586fc599ce4e728c
> is the first bad commit.
>
> I tested socfpga_socrates_defconfig on my socrates board.
>
> Any idea what's wrong there?
 Nope, this should work fine. Can you investigate ?
>>>
>>> Ok, so after adding "u-boot,dm-pre-reloc" to uart0 in
>>> socfpga_cyclone5_socrates.dts, U-Boot works (combined with an old SPL).
>>
>> Good!
>>
>>> SPL still does not work. Any idea? How does SPL get the uart?
>>>
>>> Thanks for any pointers.
>>
>> Dig around the NS16550 driver .
> OK, so my DS-5 debugger shows me it's not the driver that fails but
> "malloc_simple()" returns 0x0 when being called from
> uclass_get_device_by_seq(). Which is strange because gd->malloc_base is
> 0xe000.

malloc() returns NULL because it ran out of space ?

> Also, gd->fdt_blob is not initialized at the time serial_in

Re: [U-Boot] [PATCH] ARM: socfpga: Convert to DM serial

[Simon Goldschmidt]

Marek Vasut  schrieb am Fr., 3. Aug. 2018, 11:00:

> On 08/03/2018 10:40 AM, Simon Goldschmidt wrote:
> >
> >
> > On 01.08.2018 09:34, Marek Vasut wrote:
> >> On 08/01/2018 09:29 AM, Goldschmidt Simon wrote:
> >>>
> >>> On 30.07.2018 16:04, Marek Vasut wrote:
>  On 07/30/2018 04:03 PM, Simon Goldschmidt wrote:
> >
> > On 12.05.2018 22:28, Marek Vasut wrote:
> >> Pull the serial port configuration from DT and use DM serial instead
> >> of having the serial configuration in two places, DT and board
> >> config.
> >>
> >> Signed-off-by: Marek Vasut 
> >> Cc: Chin Liang See 
> >> Cc: Dinh Nguyen 
> >> ---
> >> arch/arm/Kconfig | 3 +++
> >> arch/arm/dts/socfpga.dtsi| 2 ++
> >> arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 1 +
> >> include/configs/socfpga_common.h | 8 
> >> 4 files changed, 6 insertions(+), 8 deletions(-)
> >>
> >> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> >> index 532aa41a87..2012ac6410 100644
> >> --- a/arch/arm/Kconfig
> >> +++ b/arch/arm/Kconfig
> >> @@ -737,6 +737,7 @@ config ARCH_SOCFPGA
> >> select ARCH_MISC_INIT
> >> select CPU_V7A
> >> select DM
> >> +select DM_SERIAL
> >> select ENABLE_ARM_SOC_BOOT0_HOOK
> >> select OF_CONTROL
> >> select SPL_LIBCOMMON_SUPPORT
> >> @@ -746,11 +747,13 @@ config ARCH_SOCFPGA
> >> select SPL_NAND_SUPPORT if SPL_NAND_DENALI
> >> select SPL_OF_CONTROL
> >> select SPL_SERIAL_SUPPORT
> >> +select SPL_DM_SERIAL
> >> select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
> >> select SPL_SPI_SUPPORT if DM_SPI
> >> select SPL_WATCHDOG_SUPPORT
> >> select SUPPORT_SPL
> >> select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
> >> +select SYS_NS16550
> >> select SYS_THUMB_BUILD
> >> imply CMD_MTDPARTS
> >> imply CRC32_VERIFY
> >> diff --git a/arch/arm/dts/socfpga.dtsi b/arch/arm/dts/socfpga.dtsi
> >> index e64127fcb2..314449478d 100644
> >> --- a/arch/arm/dts/socfpga.dtsi
> >> +++ b/arch/arm/dts/socfpga.dtsi
> >> @@ -737,6 +737,7 @@
> >> reg-shift = <2>;
> >> reg-io-width = <4>;
> >> clocks = <&l4_sp_clk>;
> >> +clock-frequency = <1>;
> >> };
> >>   uart1: serial1@ffc03000 {
> >> @@ -746,6 +747,7 @@
> >> reg-shift = <2>;
> >> reg-io-width = <4>;
> >> clocks = <&l4_sp_clk>;
> >> +clock-frequency = <1>;
> >> };
> >>   rst: rstmgr@ffd05000 {
> >> diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> >> b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> >> index b573d0e658..06b61cb0af 100644
> >> --- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> >> +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> >> @@ -24,6 +24,7 @@
> >> };
> >>   &uart1 {
> >> +clock-frequency = <5000>;
> >> u-boot,dm-pre-reloc;
> >> status = "okay";
> >> };
> >> diff --git a/include/configs/socfpga_common.h
> >> b/include/configs/socfpga_common.h
> >> index 54b9edc97c..a60da85499 100644
> >> --- a/include/configs/socfpga_common.h
> >> +++ b/include/configs/socfpga_common.h
> >> @@ -173,14 +173,6 @@ unsigned int
> >> cm_get_qspi_controller_clk_hz(void);
> >>  * Serial Driver
> >>  */
> >> #define CONFIG_SYS_NS16550_SERIAL
> >> -#define CONFIG_SYS_NS16550_REG_SIZE-4
> >> -#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> >> -#define CONFIG_SYS_NS16550_COM1SOCFPGA_UART0_ADDRESS
> >> -#define CONFIG_SYS_NS16550_CLK1
> >> -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> >> -#define CONFIG_SYS_NS16550_COM1SOCFPGA_UART1_ADDRESS
> >> -#define CONFIG_SYS_NS16550_CLK5000
> >> -#endif
> >>   /*
> >>  * USB
> >>
> > Unfortunately I saw this just now, but it seems this breaks GEN5
> > SPL? At
> > least git-bisect told me that
> 73172753f4f3351ed1c9d2f6586fc599ce4e728c
> > is the first bad commit.
> >
> > I tested socfpga_socrates_defconfig on my socrates board.
> >
> > Any idea what's wrong there?
>  Nope, this should work fine. Can you investigate ?
> >>>
> >>> Ok, so after adding "u-boot,dm-pre-reloc" to uart0 in
> >>> socfpga_cyclone5_socrates.dts, U-Boot works (combined with an old SPL).
> >>
> >> Good!
> >>
> >>> SPL still does not work. Any idea? How does SPL get the uart?
> >>>
> >>> Thanks for any pointers.
> >>
> >> Dig around the NS16550 driver .
> > OK, so my DS-5 debugger shows m

[U-Boot] [PATCH] clk: at91: utmi: add timeout for utmi lock

[Eugen Hristev]

In case the slow clock is not properly configured, the UTMI clock
cannot lock the PLL, because UPLLCOUNT will "wait X slow clock cycles".
In this case U-boot will loop indefinitely.
Added a timeout in this case, to start U-boot even if UTMI clock is
not enabled, so the user can use different media if needed, or investigate.

Signed-off-by: Eugen Hristev 
---
 drivers/clk/at91/clk-utmi.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c
index 0b56261..e850609 100644
--- a/drivers/clk/at91/clk-utmi.c
+++ b/drivers/clk/at91/clk-utmi.c
@@ -28,6 +28,7 @@ static int utmi_clk_enable(struct clk *clk)
u32 utmi_ref_clk_freq;
u32 tmp;
int err;
+   int timeout = 200;
 
if (readl(&pmc->sr) & AT91_PMC_LOCKU)
return 0;
@@ -85,8 +86,12 @@ static int utmi_clk_enable(struct clk *clk)
   AT91_PMC_BIASEN;
writel(tmp, &pmc->uckr);
 
-   while (!(readl(&pmc->sr) & AT91_PMC_LOCKU))
+   while ((--timeout) && !(readl(&pmc->sr) & AT91_PMC_LOCKU))
;
+   if (!timeout) {
+   printf("UTMICK: timeout waiting for UPLL lock\n");
+   return -ETIMEDOUT;
+   }
 
return 0;
 }
-- 
2.7.4

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Re: [U-Boot] [PATCH] ARM: socfpga: Convert to DM serial

[Marek Vasut]

On 08/03/2018 11:10 AM, Simon Goldschmidt wrote:
> 
> 
> Marek Vasut mailto:ma...@denx.de>> schrieb am Fr., 3.
> Aug. 2018, 11:00:
> 
> On 08/03/2018 10:40 AM, Simon Goldschmidt wrote:
> >
> >
> > On 01.08.2018 09:34, Marek Vasut wrote:
> >> On 08/01/2018 09:29 AM, Goldschmidt Simon wrote:
> >>>
> >>> On 30.07.2018 16:04, Marek Vasut wrote:
>  On 07/30/2018 04:03 PM, Simon Goldschmidt wrote:
> >
> > On 12.05.2018 22:28, Marek Vasut wrote:
> >> Pull the serial port configuration from DT and use DM serial
> instead
> >> of having the serial configuration in two places, DT and board
> >> config.
> >>
> >> Signed-off-by: Marek Vasut mailto:ma...@denx.de>>
> >> Cc: Chin Liang See  >
> >> Cc: Dinh Nguyen  >
> >> ---
> >>     arch/arm/Kconfig | 3 +++
> >>     arch/arm/dts/socfpga.dtsi    | 2 ++
> >>     arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 1 +
> >>     include/configs/socfpga_common.h | 8 
> >>     4 files changed, 6 insertions(+), 8 deletions(-)
> >>
> >> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> >> index 532aa41a87..2012ac6410 100644
> >> --- a/arch/arm/Kconfig
> >> +++ b/arch/arm/Kconfig
> >> @@ -737,6 +737,7 @@ config ARCH_SOCFPGA
> >>     select ARCH_MISC_INIT
> >>     select CPU_V7A
> >>     select DM
> >> +    select DM_SERIAL
> >>     select ENABLE_ARM_SOC_BOOT0_HOOK
> >>     select OF_CONTROL
> >>     select SPL_LIBCOMMON_SUPPORT
> >> @@ -746,11 +747,13 @@ config ARCH_SOCFPGA
> >>     select SPL_NAND_SUPPORT if SPL_NAND_DENALI
> >>     select SPL_OF_CONTROL
> >>     select SPL_SERIAL_SUPPORT
> >> +    select SPL_DM_SERIAL
> >>     select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
> >>     select SPL_SPI_SUPPORT if DM_SPI
> >>     select SPL_WATCHDOG_SUPPORT
> >>     select SUPPORT_SPL
> >>     select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
> >> +    select SYS_NS16550
> >>     select SYS_THUMB_BUILD
> >>     imply CMD_MTDPARTS
> >>     imply CRC32_VERIFY
> >> diff --git a/arch/arm/dts/socfpga.dtsi
> b/arch/arm/dts/socfpga.dtsi
> >> index e64127fcb2..314449478d 100644
> >> --- a/arch/arm/dts/socfpga.dtsi
> >> +++ b/arch/arm/dts/socfpga.dtsi
> >> @@ -737,6 +737,7 @@
> >>     reg-shift = <2>;
> >>     reg-io-width = <4>;
> >>     clocks = <&l4_sp_clk>;
> >> +    clock-frequency = <1>;
> >>     };
> >>       uart1: serial1@ffc03000 {
> >> @@ -746,6 +747,7 @@
> >>     reg-shift = <2>;
> >>     reg-io-width = <4>;
> >>     clocks = <&l4_sp_clk>;
> >> +    clock-frequency = <1>;
> >>     };
> >>       rst: rstmgr@ffd05000 {
> >> diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> >> b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> >> index b573d0e658..06b61cb0af 100644
> >> --- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> >> +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> >> @@ -24,6 +24,7 @@
> >>     };
> >>       &uart1 {
> >> +    clock-frequency = <5000>;
> >>     u-boot,dm-pre-reloc;
> >>     status = "okay";
> >>     };
> >> diff --git a/include/configs/socfpga_common.h
> >> b/include/configs/socfpga_common.h
> >> index 54b9edc97c..a60da85499 100644
> >> --- a/include/configs/socfpga_common.h
> >> +++ b/include/configs/socfpga_common.h
> >> @@ -173,14 +173,6 @@ unsigned int
> >> cm_get_qspi_controller_clk_hz(void);
> >>  * Serial Driver
> >>  */
> >>     #define CONFIG_SYS_NS16550_SERIAL
> >> -#define CONFIG_SYS_NS16550_REG_SIZE    -4
> >> -#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> >> -#define CONFIG_SYS_NS16550_COM1    SOCFPGA_UART0_ADDRESS
> >> -#define CONFIG_SYS_NS16550_CLK    1
> >> -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> >> -#define CONFIG_SYS_NS16550_COM1    SOCFPGA_UART1_ADDRESS
> >> -#define CONFIG_SYS_NS16550_CLK    5000
> >> -#endif
> >>       /*
> >>  * USB
> >>
> > Unfortunately I saw this just now, but it seems this breaks GEN5
> > SPL? At
> > least git-bisect told me

[U-Boot] [PATCH v1 01/11] board: stm32: use bi_dram[0].start instead of hardcoded value

[Patrice Chotard]

Use gd->bd->bi_dram[0].start initialized from DT instead of using
hardcoded CONFIG_SYS_SDRAM_BASE from config file.

Remove unused CONFIG_SYS_RAM_BASE and CONFIG_SYS_SDRAM_BASE defines.

Signed-off-by: Patrice Chotard 
---

 board/st/stm32f429-discovery/stm32f429-discovery.c   | 2 +-
 board/st/stm32f429-evaluation/stm32f429-evaluation.c | 2 +-
 board/st/stm32f469-discovery/stm32f469-discovery.c   | 2 +-
 include/configs/stm32f429-discovery.h| 2 --
 include/configs/stm32f429-evaluation.h   | 2 --
 include/configs/stm32f469-discovery.h| 2 --
 include/configs/stm32h743-disco.h| 2 --
 include/configs/stm32h743-eval.h | 2 --
 8 files changed, 3 insertions(+), 13 deletions(-)

diff --git a/board/st/stm32f429-discovery/stm32f429-discovery.c 
b/board/st/stm32f429-discovery/stm32f429-discovery.c
index e800d70f763b..500dc5fe3a6b 100644
--- a/board/st/stm32f429-discovery/stm32f429-discovery.c
+++ b/board/st/stm32f429-discovery/stm32f429-discovery.c
@@ -54,7 +54,7 @@ int board_early_init_f(void)
 
 int board_init(void)
 {
-   gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+   gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
 
return 0;
 }
diff --git a/board/st/stm32f429-evaluation/stm32f429-evaluation.c 
b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
index fd2109b27c0f..8ab2fa5d59ab 100644
--- a/board/st/stm32f429-evaluation/stm32f429-evaluation.c
+++ b/board/st/stm32f429-evaluation/stm32f429-evaluation.c
@@ -48,7 +48,7 @@ int board_early_init_f(void)
 
 int board_init(void)
 {
-   gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+   gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
 
return 0;
 }
diff --git a/board/st/stm32f469-discovery/stm32f469-discovery.c 
b/board/st/stm32f469-discovery/stm32f469-discovery.c
index a457f9095276..70d23d90f4ca 100644
--- a/board/st/stm32f469-discovery/stm32f469-discovery.c
+++ b/board/st/stm32f469-discovery/stm32f469-discovery.c
@@ -48,7 +48,7 @@ int board_early_init_f(void)
 
 int board_init(void)
 {
-   gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
+   gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
 
return 0;
 }
diff --git a/include/configs/stm32f429-discovery.h 
b/include/configs/stm32f429-discovery.h
index 46eda1d51829..458d433a6aca 100644
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -22,8 +22,6 @@
 #define CONFIG_NR_DRAM_BANKS   1
 #define CONFIG_SYS_RAM_CS  1
 #define CONFIG_SYS_RAM_FREQ_DIV2
-#define CONFIG_SYS_RAM_BASE0x9000
-#define CONFIG_SYS_SDRAM_BASE  CONFIG_SYS_RAM_BASE
 #define CONFIG_SYS_LOAD_ADDR   0x9040
 #define CONFIG_LOADADDR0x9040
 
diff --git a/include/configs/stm32f429-evaluation.h 
b/include/configs/stm32f429-evaluation.h
index 67cb584165fe..881cb2dedcbb 100644
--- a/include/configs/stm32f429-evaluation.h
+++ b/include/configs/stm32f429-evaluation.h
@@ -21,8 +21,6 @@
  */
 #define CONFIG_NR_DRAM_BANKS   1
 #define CONFIG_SYS_RAM_FREQ_DIV2
-#define CONFIG_SYS_RAM_BASE0x
-#define CONFIG_SYS_SDRAM_BASE  CONFIG_SYS_RAM_BASE
 #define CONFIG_SYS_LOAD_ADDR   0x0040
 #define CONFIG_LOADADDR0x0040
 
diff --git a/include/configs/stm32f469-discovery.h 
b/include/configs/stm32f469-discovery.h
index b5259ee21457..3d628cc71d75 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -21,8 +21,6 @@
  */
 #define CONFIG_NR_DRAM_BANKS   1
 #define CONFIG_SYS_RAM_FREQ_DIV2
-#define CONFIG_SYS_RAM_BASE0x
-#define CONFIG_SYS_SDRAM_BASE  CONFIG_SYS_RAM_BASE
 #define CONFIG_SYS_LOAD_ADDR   0x0040
 #define CONFIG_LOADADDR0x0040
 
diff --git a/include/configs/stm32h743-disco.h 
b/include/configs/stm32h743-disco.h
index 5b6ee76e7c6b..a8dcfe3b7a55 100644
--- a/include/configs/stm32h743-disco.h
+++ b/include/configs/stm32h743-disco.h
@@ -16,8 +16,6 @@
  * Configuration of the external SDRAM memory
  */
 #define CONFIG_NR_DRAM_BANKS   1
-#define CONFIG_SYS_RAM_BASE0xD000
-#define CONFIG_SYS_SDRAM_BASE  CONFIG_SYS_RAM_BASE
 #define CONFIG_SYS_LOAD_ADDR   0xD040
 #define CONFIG_LOADADDR0xD040
 
diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h
index 5b6ee76e7c6b..a8dcfe3b7a55 100644
--- a/include/configs/stm32h743-eval.h
+++ b/include/configs/stm32h743-eval.h
@@ -16,8 +16,6 @@
  * Configuration of the external SDRAM memory
  */
 #define CONFIG_NR_DRAM_BANKS   1
-#define CONFIG_SYS_RAM_BASE0xD000
-#define CONFIG_SYS_SDRAM_BASE  CONFIG_SYS_RAM_BASE
 #define CONFIG_SYS_LOAD_ADDR   0xD040

[U-Boot] [PATCH v1 03/11] configs: stm32f429-disco: Remove CONFIG_SYS_RAM_CS

[Patrice Chotard]

This flag is not used, remove it.

Signed-off-by: Patrice Chotard 
---

 include/configs/stm32f429-discovery.h | 1 -
 1 file changed, 1 deletion(-)

diff --git a/include/configs/stm32f429-discovery.h 
b/include/configs/stm32f429-discovery.h
index e0f604db0e21..38af704c3b96 100644
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -20,7 +20,6 @@
  * Configuration of the external SDRAM memory
  */
 #define CONFIG_NR_DRAM_BANKS   1
-#define CONFIG_SYS_RAM_CS  1
 #define CONFIG_SYS_RAM_FREQ_DIV2
 #define CONFIG_SYS_LOAD_ADDR   0x9040
 #define CONFIG_LOADADDR0x9040
-- 
1.9.1

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[U-Boot] [PATCH v1 00/11] Update STM32 MCU configs

[Patrice Chotard]

This series :
  - Remove unused configs flags in include/configs/stm32fxx files
  - Enable instruction and data caches for stm32f4
  _ Migrate CMD_CACHE flag from include/configs/ to defconfig for
stm32f746 and stm32h7
  - Add DISTRO_DEFAULT support for stm32f4 and stm32h7 boards


Patrice Chotard (11):
  board: stm32: use bi_dram[0].start instead of hardcoded value
  configs: stm32fxxx: Remove CONFIG_SYS_CLK_FREQ
  configs: stm32f429-disco: Remove CONFIG_SYS_RAM_CS
  configs: stm32f4xx: Enable ICACHE and DCACHE
  configs: stm32f746-disco: Migrate CONFIG_CMD_CACHE to defconfig
  configs: stm32h7xx: Migrate CONFIG_CMD_CACHE to defconfig
  configs: stm32f4xx: Remove CONFIG_SYS_RAM_FREQ_DIV
  configs: stm32h743-evaluation: Add DISTRO_DEFAULT support
  configs: stm32h743-discovery: Add DISTRO_DEFAULT support
  configs: stm32f469-discovery: Add DISTRO_DEFAULT support
  configs: stm32f429-evaluation: Add DISTRO_DEFAULT support

 board/st/stm32f429-discovery/stm32f429-discovery.c |  2 +-
 .../st/stm32f429-evaluation/stm32f429-evaluation.c |  2 +-
 board/st/stm32f469-discovery/stm32f469-discovery.c |  2 +-
 configs/stm32f429-evaluation_defconfig | 11 -
 configs/stm32f469-discovery_defconfig  | 11 -
 configs/stm32f746-disco_defconfig  |  1 +
 configs/stm32h743-disco_defconfig  | 13 ---
 configs/stm32h743-eval_defconfig   | 13 ---
 include/configs/stm32f429-discovery.h  |  9 
 include/configs/stm32f429-evaluation.h | 26 --
 include/configs/stm32f469-discovery.h  | 26 --
 include/configs/stm32f746-disco.h  |  2 --
 include/configs/stm32h743-disco.h  | 19 +++-
 include/configs/stm32h743-eval.h   | 19 +++-
 14 files changed, 76 insertions(+), 80 deletions(-)

-- 
1.9.1

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[U-Boot] [PATCH v1 11/11] configs: stm32f429-evaluation: Add DISTRO_DEFAULT support

[Patrice Chotard]

Add DISTRO_DEFAULT support to be able to boot on mmc
by default on boot.

Signed-off-by: Patrice Chotard 
---

 configs/stm32f429-evaluation_defconfig | 11 ---
 include/configs/stm32f429-evaluation.h | 19 ++-
 2 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/configs/stm32f429-evaluation_defconfig 
b/configs/stm32f429-evaluation_defconfig
index 1b14a4964067..74867ebd809b 100644
--- a/configs/stm32f429-evaluation_defconfig
+++ b/configs/stm32f429-evaluation_defconfig
@@ -5,25 +5,22 @@ CONFIG_SYS_MALLOC_F_LEN=0xF00
 CONFIG_STM32F4=y
 CONFIG_TARGET_STM32F429_EVALUATION=y
 CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval"
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=3
+# CONFIG_USE_BOOTCOMMAND is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_GPT=y
 # CONFIG_RANDOM_UUID is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MII is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
+# CONFIG_ISO_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 # CONFIG_BLK is not set
diff --git a/include/configs/stm32f429-evaluation.h 
b/include/configs/stm32f429-evaluation.h
index ab730e1a47dd..b0dcddc6d57f 100644
--- a/include/configs/stm32f429-evaluation.h
+++ b/include/configs/stm32f429-evaluation.h
@@ -40,11 +40,20 @@
 
 #define CONFIG_SYS_MALLOC_LEN  (1 * 1024 * 1024)
 
-#define CONFIG_BOOTCOMMAND \
-   "run boot_sd"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-   "boot_sd=mmc dev 0;fatload mmc 0 0x0070 stm32429i-eval.dtb; fatload 
mmc 0 0x8000 zImage; bootz 0x8000 - 0x0070"
+#define BOOT_TARGET_DEVICES(func) \
+   func(MMC, mmc, 0)
+
+#include 
+#define CONFIG_EXTRA_ENV_SETTINGS  \
+   "kernel_addr_r=0x8000\0"\
+   "fdtfile=stm32429i-eval.dtb\0"  \
+   "fdt_addr_r=0x0070\0"   \
+   "scriptaddr=0x0080\0"   \
+   "pxefile_addr_r=0x0080\0" \
+   "fdt_high=0x\0" \
+   "initrd_high=0x\0"  \
+   "ramdisk_addr_r=0x0090\0"   \
+   BOOTENV
 
 /*
  * Command line configuration.
-- 
1.9.1

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[U-Boot] [PATCH v1 06/11] configs: stm32h7xx: Migrate CONFIG_CMD_CACHE to defconfig

[Patrice Chotard]

Remove CONFIG_CMD_CACHE from include/configs/stm32h7xx.h
and enable it in stm32h7xx_defconfig

Signed-off-by: Patrice Chotard 
---

 configs/stm32h743-disco_defconfig | 1 +
 configs/stm32h743-eval_defconfig  | 1 +
 include/configs/stm32h743-disco.h | 1 -
 include/configs/stm32h743-eval.h  | 1 -
 4 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/configs/stm32h743-disco_defconfig 
b/configs/stm32h743-disco_defconfig
index c6a0d10bdbd7..67c754b90d22 100644
--- a/configs/stm32h743-disco_defconfig
+++ b/configs/stm32h743-disco_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig
index ab5273ba90aa..1122202c543b 100644
--- a/configs/stm32h743-eval_defconfig
+++ b/configs/stm32h743-eval_defconfig
@@ -19,6 +19,7 @@ CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
diff --git a/include/configs/stm32h743-disco.h 
b/include/configs/stm32h743-disco.h
index a8dcfe3b7a55..90fc736c3f28 100644
--- a/include/configs/stm32h743-disco.h
+++ b/include/configs/stm32h743-disco.h
@@ -37,7 +37,6 @@
 /*
  * Command line configuration.
  */
-#define CONFIG_CMD_CACHE
 #define CONFIG_BOARD_LATE_INIT
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h
index a8dcfe3b7a55..90fc736c3f28 100644
--- a/include/configs/stm32h743-eval.h
+++ b/include/configs/stm32h743-eval.h
@@ -37,7 +37,6 @@
 /*
  * Command line configuration.
  */
-#define CONFIG_CMD_CACHE
 #define CONFIG_BOARD_LATE_INIT
 
 #endif /* __CONFIG_H */
-- 
1.9.1

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[U-Boot] [PATCH v1 02/11] configs: stm32fxxx: Remove CONFIG_SYS_CLK_FREQ

[Patrice Chotard]

Since commit aa5e3e22f4d6 ("board: stm32: switch to DM STM32 timer")
SYS_CLK_FREQ is useless, remove it from stm32f4 and stm32f7 boards.

Signed-off-by: Patrice Chotard 
---

 include/configs/stm32f429-discovery.h  | 2 --
 include/configs/stm32f429-evaluation.h | 1 -
 include/configs/stm32f469-discovery.h  | 1 -
 include/configs/stm32f746-disco.h  | 1 -
 4 files changed, 5 deletions(-)

diff --git a/include/configs/stm32f429-discovery.h 
b/include/configs/stm32f429-discovery.h
index 458d433a6aca..e0f604db0e21 100644
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -37,8 +37,6 @@
 
 #define CONFIG_STM32_FLASH
 
-#define CONFIG_SYS_CLK_FREQ18000 /* 180 MHz */
-
 #define CONFIG_SYS_HZ_CLOCK100 /* Timer is clocked at 1MHz */
 
 #define CONFIG_CMDLINE_TAG
diff --git a/include/configs/stm32f429-evaluation.h 
b/include/configs/stm32f429-evaluation.h
index 881cb2dedcbb..258ae767d233 100644
--- a/include/configs/stm32f429-evaluation.h
+++ b/include/configs/stm32f429-evaluation.h
@@ -33,7 +33,6 @@
 
 #define CONFIG_STM32_FLASH
 
-#define CONFIG_SYS_CLK_FREQ18000 /* 180 MHz */
 #define CONFIG_SYS_HZ_CLOCK100 /* Timer is clocked at 1MHz */
 
 #define CONFIG_CMDLINE_TAG
diff --git a/include/configs/stm32f469-discovery.h 
b/include/configs/stm32f469-discovery.h
index 3d628cc71d75..a9182450e607 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -33,7 +33,6 @@
 
 #define CONFIG_STM32_FLASH
 
-#define CONFIG_SYS_CLK_FREQ18000 /* 180 MHz */
 #define CONFIG_SYS_HZ_CLOCK100 /* Timer is clocked at 1MHz */
 
 #define CONFIG_CMDLINE_TAG
diff --git a/include/configs/stm32f746-disco.h 
b/include/configs/stm32f746-disco.h
index 567e7f2a0078..aa45d29b803b 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -34,7 +34,6 @@
 #define CONFIG_MII
 #define CONFIG_PHY_SMSC
 
-#define CONFIG_SYS_CLK_FREQ2 /* 200 MHz */
 #define CONFIG_SYS_HZ_CLOCK100 /* Timer is clocked at 1MHz */
 
 #define CONFIG_CMDLINE_TAG
-- 
1.9.1

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[U-Boot] [PATCH v1 05/11] configs: stm32f746-disco: Migrate CONFIG_CMD_CACHE to defconfig

[Patrice Chotard]

Remove CONFIG_CMD_CACHE from include/configs/stm32f746-disco.h
and enable it in stm32f746-disco_defconfig

Signed-off-by: Patrice Chotard 
---

 configs/stm32f746-disco_defconfig | 1 +
 include/configs/stm32f746-disco.h | 1 -
 2 files changed, 1 insertion(+), 1 deletion(-)

diff --git a/configs/stm32f746-disco_defconfig 
b/configs/stm32f746-disco_defconfig
index aa7403f3c516..79566049d2a2 100644
--- a/configs/stm32f746-disco_defconfig
+++ b/configs/stm32f746-disco_defconfig
@@ -30,6 +30,7 @@ CONFIG_CMD_SNTP=y
 CONFIG_CMD_DNS=y
 CONFIG_CMD_LINK_LOCAL=y
 CONFIG_CMD_BMP=y
+CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
 CONFIG_CMD_EXT2=y
 CONFIG_CMD_EXT4=y
diff --git a/include/configs/stm32f746-disco.h 
b/include/configs/stm32f746-disco.h
index aa45d29b803b..3a76c5807a9c 100644
--- a/include/configs/stm32f746-disco.h
+++ b/include/configs/stm32f746-disco.h
@@ -57,7 +57,6 @@
 /*
  * Command line configuration.
  */
-#define CONFIG_CMD_CACHE
 #define CONFIG_BOARD_LATE_INIT
 #define CONFIG_DISPLAY_BOARDINFO
 
-- 
1.9.1

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[U-Boot] [PATCH v1 08/11] configs: stm32h743-evaluation: Add DISTRO_DEFAULT support

[Patrice Chotard]

Add DISTRO_DEFAULT support to be able to boot on mmc
by default on boot.

Signed-off-by: Patrice Chotard 
---

 configs/stm32h743-eval_defconfig | 12 +++-
 include/configs/stm32h743-eval.h | 16 ++--
 2 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig
index 1122202c543b..84d0ca7a8474 100644
--- a/configs/stm32h743-eval_defconfig
+++ b/configs/stm32h743-eval_defconfig
@@ -5,34 +5,28 @@ CONFIG_SYS_MALLOC_F_LEN=0xF00
 CONFIG_STM32H7=y
 CONFIG_TARGET_STM32H743_EVAL=y
 CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-eval"
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=3
+# CONFIG_USE_BOOTCOMMAND is not set
 CONFIG_DEFAULT_FDT_FILE="stm32h743i-eval"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
 CONFIG_AUTOBOOT_STOP_STR=" "
-CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
+# CONFIG_ISO_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
-# CONFIG_NET is not set
 CONFIG_DM_MMC=y
 CONFIG_STM32_SDMMC2=y
 # CONFIG_PINCTRL_FULL is not set
 # CONFIG_SPL_SERIAL_PRESENT is not set
-CONFIG_REGEX=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
diff --git a/include/configs/stm32h743-eval.h b/include/configs/stm32h743-eval.h
index 90fc736c3f28..b49dc1a34a8a 100644
--- a/include/configs/stm32h743-eval.h
+++ b/include/configs/stm32h743-eval.h
@@ -31,8 +31,20 @@
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_MALLOC_LEN  (1 * 1024 * 1024)
 
-#define CONFIG_BOOTARGS
\
-   "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+#define BOOT_TARGET_DEVICES(func) \
+   func(MMC, mmc, 0)
+
+#include 
+#define CONFIG_EXTRA_ENV_SETTINGS  \
+   "kernel_addr_r=0xD0008000\0"\
+   "fdtfile=stm32h743i-eval.dtb\0" \
+   "fdt_addr_r=0xD070\0"   \
+   "scriptaddr=0xD080\0"   \
+   "pxefile_addr_r=0xD080\0" \
+   "fdt_high=0x\0" \
+   "initrd_high=0x\0"  \
+   "ramdisk_addr_r=0xD090\0"   \
+   BOOTENV
 
 /*
  * Command line configuration.
-- 
1.9.1

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[U-Boot] [PATCH v1 10/11] configs: stm32f469-discovery: Add DISTRO_DEFAULT support

[Patrice Chotard]

Add DISTRO_DEFAULT support to be able to boot on mmc
by default on boot.

Signed-off-by: Patrice Chotard 
---

 configs/stm32f469-discovery_defconfig | 11 ---
 include/configs/stm32f469-discovery.h | 19 ++-
 2 files changed, 18 insertions(+), 12 deletions(-)

diff --git a/configs/stm32f469-discovery_defconfig 
b/configs/stm32f469-discovery_defconfig
index 4de03edcc2ca..2db586f683bc 100644
--- a/configs/stm32f469-discovery_defconfig
+++ b/configs/stm32f469-discovery_defconfig
@@ -5,25 +5,22 @@ CONFIG_SYS_MALLOC_F_LEN=0xF00
 CONFIG_STM32F4=y
 CONFIG_TARGET_STM32F469_DISCOVERY=y
 CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco"
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=3
+# CONFIG_USE_BOOTCOMMAND is not set
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
-CONFIG_CMD_BOOTZ=y
 # CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
 CONFIG_CMD_IMLS=y
 CONFIG_CMD_GPT=y
 # CONFIG_RANDOM_UUID is not set
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
+# CONFIG_CMD_MII is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
+# CONFIG_ISO_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
 # CONFIG_BLK is not set
diff --git a/include/configs/stm32f469-discovery.h 
b/include/configs/stm32f469-discovery.h
index 3e4e89bc4078..c95f3f7de454 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -40,11 +40,20 @@
 
 #define CONFIG_SYS_MALLOC_LEN  (1 * 1024 * 1024)
 
-#define CONFIG_BOOTCOMMAND \
-   "run boot_sd"
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-   "boot_sd=mmc dev 0;fatload mmc 0 0x0070 stm32f469-disco.dtb; 
fatload mmc 0 0x8000 zImage; bootz 0x8000 - 0x0070"
+#define BOOT_TARGET_DEVICES(func) \
+   func(MMC, mmc, 0)
+
+#include 
+#define CONFIG_EXTRA_ENV_SETTINGS  \
+   "kernel_addr_r=0x8000\0"\
+   "fdtfile=stm32f469-disco.dtb\0" \
+   "fdt_addr_r=0x0070\0"   \
+   "scriptaddr=0x0080\0"   \
+   "pxefile_addr_r=0x0080\0" \
+   "fdt_high=0x\0" \
+   "initrd_high=0x\0"  \
+   "ramdisk_addr_r=0x0090\0"   \
+   BOOTENV
 
 /*
  * Command line configuration.
-- 
1.9.1

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[U-Boot] [PATCH v1 09/11] configs: stm32h743-discovery: Add DISTRO_DEFAULT support

[Patrice Chotard]

Add DISTRO_DEFAULT support to be able to boot on
mmc by default on boot.

Signed-off-by: Patrice Chotard 
---

 configs/stm32h743-disco_defconfig | 12 +++-
 include/configs/stm32h743-disco.h | 16 ++--
 2 files changed, 17 insertions(+), 11 deletions(-)

diff --git a/configs/stm32h743-disco_defconfig 
b/configs/stm32h743-disco_defconfig
index 67c754b90d22..e98d18c11df4 100644
--- a/configs/stm32h743-disco_defconfig
+++ b/configs/stm32h743-disco_defconfig
@@ -5,34 +5,28 @@ CONFIG_SYS_MALLOC_F_LEN=0xF00
 CONFIG_STM32H7=y
 CONFIG_TARGET_STM32H743_DISCO=y
 CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-disco"
-CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_DISTRO_DEFAULTS=y
 CONFIG_BOOTDELAY=3
+# CONFIG_USE_BOOTCOMMAND is not set
 CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco"
 # CONFIG_DISPLAY_CPUINFO is not set
 CONFIG_BOARD_EARLY_INIT_F=y
-CONFIG_HUSH_PARSER=y
 CONFIG_SYS_PROMPT="U-Boot > "
 CONFIG_AUTOBOOT_KEYED=y
 CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
 CONFIG_AUTOBOOT_STOP_STR=" "
-CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_MMC=y
 # CONFIG_CMD_SETEXPR is not set
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIMER=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_EXT4=y
 CONFIG_CMD_EXT4_WRITE=y
-CONFIG_CMD_FAT=y
-CONFIG_CMD_FS_GENERIC=y
+# CONFIG_ISO_PARTITION is not set
 CONFIG_OF_CONTROL=y
 CONFIG_OF_EMBED=y
-# CONFIG_NET is not set
 CONFIG_DM_MMC=y
 CONFIG_STM32_SDMMC2=y
 # CONFIG_PINCTRL_FULL is not set
 # CONFIG_SPL_SERIAL_PRESENT is not set
-CONFIG_REGEX=y
 CONFIG_OF_LIBFDT_OVERLAY=y
 # CONFIG_EFI_LOADER is not set
diff --git a/include/configs/stm32h743-disco.h 
b/include/configs/stm32h743-disco.h
index 90fc736c3f28..822ab2de77c7 100644
--- a/include/configs/stm32h743-disco.h
+++ b/include/configs/stm32h743-disco.h
@@ -31,8 +31,20 @@
 #define CONFIG_SYS_MAXARGS 16
 #define CONFIG_SYS_MALLOC_LEN  (1 * 1024 * 1024)
 
-#define CONFIG_BOOTARGS
\
-   "console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
+#define BOOT_TARGET_DEVICES(func) \
+   func(MMC, mmc, 0)
+
+#include 
+#define CONFIG_EXTRA_ENV_SETTINGS  \
+   "kernel_addr_r=0xD0008000\0"\
+   "fdtfile=stm32h743i-disco.dtb\0"\
+   "fdt_addr_r=0xD070\0"   \
+   "scriptaddr=0xD080\0"   \
+   "pxefile_addr_r=0xD080\0" \
+   "fdt_high=0x\0" \
+   "initrd_high=0x\0"  \
+   "ramdisk_addr_r=0xD090\0"   \
+   BOOTENV
 
 /*
  * Command line configuration.
-- 
1.9.1

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[U-Boot] [PATCH v1 04/11] configs: stm32f4xx: Enable ICACHE and DCACHE

[Patrice Chotard]

Enable instruction and data caches.
Fix boot_sd command as since commit d409c962169b ("armv7m: disable
 icache before linux booting"), instruction cache is automatically
disable before linux booting. "icache off" from boot_sd command
becomes useless, remove it.

Signed-off-by: Patrice Chotard 
---

 include/configs/stm32f429-discovery.h  | 3 ---
 include/configs/stm32f429-evaluation.h | 5 +
 include/configs/stm32f469-discovery.h  | 5 +
 3 files changed, 2 insertions(+), 11 deletions(-)

diff --git a/include/configs/stm32f429-discovery.h 
b/include/configs/stm32f429-discovery.h
index 38af704c3b96..90d7429e706b 100644
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -13,9 +13,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR0x1001
 
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_DCACHE_OFF
-
 /*
  * Configuration of the external SDRAM memory
  */
diff --git a/include/configs/stm32f429-evaluation.h 
b/include/configs/stm32f429-evaluation.h
index 258ae767d233..d48940d0c884 100644
--- a/include/configs/stm32f429-evaluation.h
+++ b/include/configs/stm32f429-evaluation.h
@@ -13,9 +13,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR0x1001
 
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_DCACHE_OFF
-
 /*
  * Configuration of the external SDRAM memory
  */
@@ -48,7 +45,7 @@
"run boot_sd"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
-   "boot_sd=mmc dev 0;fatload mmc 0 0x0070 stm32429i-eval.dtb; fatload 
mmc 0 0x8000 zImage; icache off; bootz 0x8000 - 0x0070"
+   "boot_sd=mmc dev 0;fatload mmc 0 0x0070 stm32429i-eval.dtb; fatload 
mmc 0 0x8000 zImage; bootz 0x8000 - 0x0070"
 
 /*
  * Command line configuration.
diff --git a/include/configs/stm32f469-discovery.h 
b/include/configs/stm32f469-discovery.h
index a9182450e607..be8c2331566b 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -13,9 +13,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR0x1001
 
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_DCACHE_OFF
-
 /*
  * Configuration of the external SDRAM memory
  */
@@ -48,7 +45,7 @@
"run boot_sd"
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
-   "boot_sd=mmc dev 0;fatload mmc 0 0x0070 stm32f469-disco.dtb; 
fatload mmc 0 0x8000 zImage; icache off; bootz 0x8000 - 0x0070"
+   "boot_sd=mmc dev 0;fatload mmc 0 0x0070 stm32f469-disco.dtb; 
fatload mmc 0 0x8000 zImage; bootz 0x8000 - 0x0070"
 
 /*
  * Command line configuration.
-- 
1.9.1

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[U-Boot] [PATCH v1 07/11] configs: stm32f4xx: Remove CONFIG_SYS_RAM_FREQ_DIV

[Patrice Chotard]

Since commit bfea69ad2793 ("stm32f7: sdram: correct sdram
configuration as per micron sdram"), CONFIG_SYS_RAM_FREQ_DIV
flag is no more used, remove it.

Signed-off-by: Patrice Chotard 
---

 include/configs/stm32f429-discovery.h  | 1 -
 include/configs/stm32f429-evaluation.h | 1 -
 include/configs/stm32f469-discovery.h  | 1 -
 3 files changed, 3 deletions(-)

diff --git a/include/configs/stm32f429-discovery.h 
b/include/configs/stm32f429-discovery.h
index 90d7429e706b..b8848f16106a 100644
--- a/include/configs/stm32f429-discovery.h
+++ b/include/configs/stm32f429-discovery.h
@@ -17,7 +17,6 @@
  * Configuration of the external SDRAM memory
  */
 #define CONFIG_NR_DRAM_BANKS   1
-#define CONFIG_SYS_RAM_FREQ_DIV2
 #define CONFIG_SYS_LOAD_ADDR   0x9040
 #define CONFIG_LOADADDR0x9040
 
diff --git a/include/configs/stm32f429-evaluation.h 
b/include/configs/stm32f429-evaluation.h
index d48940d0c884..ab730e1a47dd 100644
--- a/include/configs/stm32f429-evaluation.h
+++ b/include/configs/stm32f429-evaluation.h
@@ -17,7 +17,6 @@
  * Configuration of the external SDRAM memory
  */
 #define CONFIG_NR_DRAM_BANKS   1
-#define CONFIG_SYS_RAM_FREQ_DIV2
 #define CONFIG_SYS_LOAD_ADDR   0x0040
 #define CONFIG_LOADADDR0x0040
 
diff --git a/include/configs/stm32f469-discovery.h 
b/include/configs/stm32f469-discovery.h
index be8c2331566b..3e4e89bc4078 100644
--- a/include/configs/stm32f469-discovery.h
+++ b/include/configs/stm32f469-discovery.h
@@ -17,7 +17,6 @@
  * Configuration of the external SDRAM memory
  */
 #define CONFIG_NR_DRAM_BANKS   1
-#define CONFIG_SYS_RAM_FREQ_DIV2
 #define CONFIG_SYS_LOAD_ADDR   0x0040
 #define CONFIG_LOADADDR0x0040
 
-- 
1.9.1

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Re: [U-Boot] [PATCH v6 00/27] SPI-NAND support

[Jagan Teki]

On Fri, Aug 3, 2018 at 1:57 PM, Miquel Raynal  wrote:
> Hi Jagan, Tom,
>
> Miquel Raynal  wrote on Wed,  1 Aug 2018
> 10:18:21 +0200:
>
>> During the last months, Boris Brezillon shared his work to support
>> serial flashes within Linux. First, he delivered (and merged) a new
>> layer called spi-mem. He also initiated in Linux MTD subsystem the move
>> of all 'raw' NAND related code to a raw/ subdirectory, adding at the
>> same time a NAND core that would be shared with all NAND devices. Then,
>> he contributed a generic SPI-NAND driver, making use of this NAND core,
>> as well as some vendor code to drive a few chips.
>>
>> On top of this work, I added an 'mtd' U-Boot command to handle all sort
>> of MTD devices. This should become the default command instead of having
>> one per flash flavor ('sf', 'nand', 'spi-nand' ?).
>>
>> The series has been tested on an Ocelot board PCB123 (VSC7514),
>> featuring a Macronix SPI NAND chip.
>>
>> TL;DR: the series contains:
>> - A few patches from Linux to resynchronize some areas of the MTD layer.
>> - Various fixes and re-organization of the MTD subsystem.
>> - The introduction of the SPI-mem interface.
>> - The addition of the generic SPI-NAND driver (and its bindings).
>> - Several SPI NAND chip drivers (Macronix, Micron, Winbond).
>> - A new 'mtd' command.
>> - Support for spi-nand devices in mtdparts.
>>
>> To test your SPI-NAND device with U-Boot simply follow these lines:
>>
>> > setenv mtdparts mtdparts=spi-nand0:1m(foo),-(bar)
>> > setenv mtdids spi-nand0=spi-nand0
>> > mtdparts # show the spi-nand device partitions
>> > ubi part bar # create a static UBI volume in the bar partition
>>
>> Thanks,
>> Miquèl
>>
>> Changes since v5:
>> -
>> * Included Boris fixup about the build issues.
>> * Added Rb/Ab tags from Jagan on patchs 20/21.
>
> I can't see a pull request flow on U-Boot ML, I suppose you use a
> different mean for that purpose.
>
> Jagan, is this version OK? Is it part of your PR?

Travis is going on [1], will send PR once all fine.

[1] https://travis-ci.org/openedev/u-boot-amarula/builds/411596788
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Re: [U-Boot] [PATCH] stm32f7: board: Fix memory init

[Patrice CHOTARD]

Hi Vikas

On 08/03/2018 02:48 AM, Vikas Manocha wrote:
> Hi Patrice,
> 
> On 08/02/2018 05:18 AM, Patrice Chotard wrote:
>> Commit 1473b12ad0b3 ("lib: fdtdec: Update ram_base to store ram start
>> adddress") brings regression on STM32F7 which can't boot.
>>
>> Use fdtdec_setup_mem_size_base() to setup memory base and size.
>> Use fdtdec_setup_memory_banksize() to setup memory bank base and size.
>>
>> Reported-by: Mark Olsson 
>> Signed-off-by: Patrice Chotard 
>> Cc: Mark Olsson 
> 
> Reviewed-by: Vikas Manocha 
> one minor comment below.
> 
>> ---
>>
>>   board/st/stm32f746-disco/stm32f746-disco.c | 31 
>> --
>>   1 file changed, 4 insertions(+), 27 deletions(-)
>>
>> diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
>> b/board/st/stm32f746-disco/stm32f746-disco.c
>> index e21cfc6e4955..a997e1825abf 100644
>> --- a/board/st/stm32f746-disco/stm32f746-disco.c
>> +++ b/board/st/stm32f746-disco/stm32f746-disco.c
>> @@ -21,23 +21,9 @@
>>   
>>   DECLARE_GLOBAL_DATA_PTR;
>>   
>> -int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size)
>> -{
>> -int mr_node;
>> -
>> -mr_node = fdt_path_offset(gd->fdt_blob, "/memory");
>> -if (mr_node < 0)
>> -return mr_node;
>> -*mr_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, mr_node,
>> -  "reg", 0, mr_size, false);
>> -debug("mr_base = %lx, mr_size= %lx\n", *mr_base, *mr_size);
>> -
>> -return 0;
>> -}
>>   int dram_init(void)
>>   {
>> -int rv;
>> -fdt_addr_t mr_base, mr_size;
>> +int rv = 0;
> this variable can be removed by returning 0 or error directly.

Exact, i will fix it in v2

Thanks

Patrice

> 
> Cheers,
> Vikas
> 
>>   
>>   #ifndef CONFIG_SUPPORT_SPL
>>  struct udevice *dev;
>> @@ -48,24 +34,15 @@ int dram_init(void)
>>  }
>>   
>>   #endif
>> -rv = get_memory_base_size(&mr_base, &mr_size);
>> -if (rv)
>> -return rv;
>> -gd->ram_size = mr_size;
>> -gd->ram_top = mr_base;
>> +if (fdtdec_setup_mem_size_base() != 0)
>> +rv = -EINVAL;
>>   
>>  return rv;
>>   }
>>   
>>   int dram_init_banksize(void)
>>   {
>> -fdt_addr_t mr_base, mr_size;
>> -get_memory_base_size(&mr_base, &mr_size);
>> -/*
>> - * Fill in global info with description of SRAM configuration
>> - */
>> -gd->bd->bi_dram[0].start = mr_base;
>> -gd->bd->bi_dram[0].size  = mr_size;
>> +fdtdec_setup_memory_banksize();
>>   
>>  return 0;
>>   }
>>
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[U-Boot] [PATCH] arm: armv7-a: Enable mtune when CONFIG_CPU_V7A

[Adam Ford]

arch/arm/Makefile has a list of options for mtune, but the
entry for CONFIG_CPU_V7A is empty.  By tuning for generic-armv7-a
both the size of SPL and u-boot shrink a little.  For those
with limited resources in SPL, every little bit helps.

The following size changed apply to omap3_logic

Original:
   textdata bss dec hex filename
 541198   22692  327040  890930   d9832 u-boot

   textdata bss dec hex filename
  50964 429   67580  118973   1d0bd spl/u-boot-spl

With -mtune=generic-armv7-a
   textdata bss dec hex filename
 540934   22692  327056  890682   d973a u-boot

   textdata bss dec hex filename
  50972 429   67580  118981   1d0c5 spl/u-boot-spl

Signed-off-by: Adam Ford 

diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index cac58bdc4d..b9f0903f9b 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -40,7 +40,7 @@ tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100
 tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
 tune-$(CONFIG_CPU_ARM1136) =
 tune-$(CONFIG_CPU_ARM1176) =
-tune-$(CONFIG_CPU_V7A) =
+tune-$(CONFIG_CPU_V7A) =-mtune=generic-armv7-a
 tune-$(CONFIG_CPU_V7R) =
 tune-$(CONFIG_ARM64)   =
 
-- 
2.17.1

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[U-Boot] [PATCH v1 0/3] Let U-Boot generate MAC address for db410

[Ramon Fried]

This patchset gives U-boot ownership on generating WLAN/BT mac
addresses for WCNSS chip on Dragonboard410.
Previously, this was done by LK and U-boot only read the
results from the patched DTB LK fixed-up.

This is is part of my ongoing effort to get rid of LK once and
for all for Snapdragon ARCH.


Ramon Fried (3):
  snapdragon: added msm_board_serial() func
  snapdragon: added MAC generation functions
  db410: alter WLAN/BT MAC address fixup

 arch/arm/mach-snapdragon/Makefile |  1 +
 arch/arm/mach-snapdragon/include/mach/misc.h  | 13 +
 arch/arm/mach-snapdragon/misc.c   | 53 ++
 .../dragonboard410c/dragonboard410c.c | 54 +--
 4 files changed, 94 insertions(+), 27 deletions(-)
 create mode 100644 arch/arm/mach-snapdragon/include/mach/misc.h
 create mode 100644 arch/arm/mach-snapdragon/misc.c

-- 
2.18.0

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[U-Boot] [PATCH v1 1/3] snapdragon: added msm_board_serial() func

[Ramon Fried]

This commit adds a function to get the board
serial number.
In snapdragon it's actually the eMMC serial number.

Function added in a new file misc.c that will
include further snapdragon miscellaneous functions.

Signed-off-by: Ramon Fried 

---

 arch/arm/mach-snapdragon/Makefile|  1 +
 arch/arm/mach-snapdragon/include/mach/misc.h | 12 +++
 arch/arm/mach-snapdragon/misc.c  | 37 
 3 files changed, 50 insertions(+)
 create mode 100644 arch/arm/mach-snapdragon/include/mach/misc.h
 create mode 100644 arch/arm/mach-snapdragon/misc.c

diff --git a/arch/arm/mach-snapdragon/Makefile 
b/arch/arm/mach-snapdragon/Makefile
index f375d07d03..2d94083600 100644
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -8,5 +8,6 @@ obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o
 obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o
 obj-$(CONFIG_TARGET_DRAGONBOARD410C) += pinctrl-apq8016.o
 obj-$(CONFIG_TARGET_DRAGONBOARD410C) += pinctrl-snapdragon.o
+obj-y += misc.o
 obj-y += clock-snapdragon.o
 obj-y += dram.o
diff --git a/arch/arm/mach-snapdragon/include/mach/misc.h 
b/arch/arm/mach-snapdragon/include/mach/misc.h
new file mode 100644
index 00..5af6ae8da4
--- /dev/null
+++ b/arch/arm/mach-snapdragon/include/mach/misc.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Snapdragon DRAM
+ * Copyright (C) 2018 Ramon Fried 
+ */
+
+#ifndef MISC_H
+#define MISC_H
+
+u32 msm_board_serial(void);
+
+#endif
diff --git a/arch/arm/mach-snapdragon/misc.c b/arch/arm/mach-snapdragon/misc.c
new file mode 100644
index 00..678bd69f83
--- /dev/null
+++ b/arch/arm/mach-snapdragon/misc.c
@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Miscellaneous Snapdragon functionality
+ *
+ * (C) Copyright 2018 Ramon Fried 
+ *
+ */
+
+#include 
+#include 
+#include 
+
+/* UNSTUFF_BITS macro taken from Linux Kernel: drivers/mmc/core/sd.c */
+#define UNSTUFF_BITS(resp, start, size) \
+   ({ \
+   const int __size = size; \
+   const u32 __mask = (__size < 32 ? 1 << __size : 0) - 1; \
+   const int __off = 3 - ((start) / 32); \
+   const int __shft = (start) & 31; \
+   u32 __res; \
+   \
+   __res = resp[__off] >> __shft; \
+   if (__size + __shft > 32) \
+   __res |= resp[__off - 1] << ((32 - __shft) % 32); \
+   __res & __mask; \
+   })
+
+u32 msm_board_serial(void)
+{
+   struct mmc *mmc_dev;
+
+   mmc_dev = find_mmc_device(0);
+   if (!mmc_dev)
+   return 0;
+
+   return UNSTUFF_BITS(mmc_dev->cid, 16, 32);
+}
-- 
2.18.0

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[U-Boot] [PATCH v1 2/3] snapdragon: added MAC generation functions

[Ramon Fried]

Add support for generation of unique MAC address
that is derived from board serial.
Algorithm for generation of MAC taken from LK.

Signed-off-by: Ramon Fried 
---

 arch/arm/mach-snapdragon/include/mach/misc.h |  1 +
 arch/arm/mach-snapdragon/misc.c  | 16 
 2 files changed, 17 insertions(+)

diff --git a/arch/arm/mach-snapdragon/include/mach/misc.h 
b/arch/arm/mach-snapdragon/include/mach/misc.h
index 5af6ae8da4..c60e3e4724 100644
--- a/arch/arm/mach-snapdragon/include/mach/misc.h
+++ b/arch/arm/mach-snapdragon/include/mach/misc.h
@@ -8,5 +8,6 @@
 #define MISC_H
 
 u32 msm_board_serial(void);
+void msm_generate_mac_addr(u8 *mac);
 
 #endif
diff --git a/arch/arm/mach-snapdragon/misc.c b/arch/arm/mach-snapdragon/misc.c
index 678bd69f83..f6c87866c0 100644
--- a/arch/arm/mach-snapdragon/misc.c
+++ b/arch/arm/mach-snapdragon/misc.c
@@ -35,3 +35,19 @@ u32 msm_board_serial(void)
 
return UNSTUFF_BITS(mmc_dev->cid, 16, 32);
 }
+
+void msm_generate_mac_addr(u8 *mac)
+{
+   int i;
+   char sn[9];
+
+   snprintf(sn, 8, "%08x", msm_board_serial());
+
+   /* fill in the mac with serialno, use locally adminstrated pool */
+   mac[0] = 0x02;
+   mac[1] = 00;
+   for (i = 3; i >= 0; i--) {
+   mac[i + 2] = simple_strtoul(&sn[2 * i], NULL, 16);
+   sn[2 * i] = 0;
+   }
+}
-- 
2.18.0

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[U-Boot] [PATCH v1 3/3] db410: alter WLAN/BT MAC address fixup

[Ramon Fried]

Change the way MAC address fixup is done:
1. Stop using LK handed device-tree and calculate
   the MAC address our own.
2. Allow overriding the generated MACS with environment variables:
   "wlanaddr" and  "btaddr".

Signed-off-by: Ramon Fried 
---

 .../dragonboard410c/dragonboard410c.c | 54 +--
 1 file changed, 27 insertions(+), 27 deletions(-)

diff --git a/board/qualcomm/dragonboard410c/dragonboard410c.c 
b/board/qualcomm/dragonboard410c/dragonboard410c.c
index 4f0b999e50..53e231e55a 100644
--- a/board/qualcomm/dragonboard410c/dragonboard410c.c
+++ b/board/qualcomm/dragonboard410c/dragonboard410c.c
@@ -10,7 +10,9 @@
 #include 
 #include 
 #include 
+#include 
 #include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -149,40 +151,38 @@ int board_init(void)
return 0;
 }
 
+/* Fixup of DTB for Linux Kernel
+ * 1. Fixup installed DRAM.
+ * 2. Fixup WLAN/BT Mac address:
+ * First, check if MAC addresses for WLAN/BT exists as environemnt
+ * variables wlanaddr,btaddr. if not, generate a unique address.
+ */
+
 int ft_board_setup(void *blob, bd_t *bd)
 {
-   int offset, len, i;
-   const char *mac;
-   struct {
-   const char *compatible;
-   const char *property;
-   } fix[] = {
-   [0] = {
-   /* update the kernel's dtb with wlan mac */
-   .compatible = "qcom,wcnss-wlan",
-   .property = "local-mac-address",
-   },
-   [1] = {
-   /* update the kernel's dtb with bt mac */
-   .compatible = "qcom,wcnss-bt",
-   .property = "local-bd-address",
-   },
+   u8 mac[ARP_HLEN];
+
+   msm_fixup_memory(blob);
+
+   if (!eth_env_get_enetaddr("wlanaddr", mac)) {
+   msm_generate_mac_addr(mac);
};
 
-   for (i = 0; i < sizeof(fix) / sizeof(fix[0]); i++) {
-   offset = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
-  fix[i].compatible);
-   if (offset < 0)
-   continue;
+   do_fixup_by_compat(blob, "qcom,wcnss-wlan",
+  "local-mac-address", mac, ARP_HLEN, 1);
 
-   mac = fdt_getprop(gd->fdt_blob, offset, fix[i].property, &len);
-   if (mac)
-   do_fixup_by_compat(blob, fix[i].compatible,
-  fix[i].property, mac, ARP_HLEN, 1);
-   }
 
-   msm_fixup_memory(blob);
+   if (!eth_env_get_enetaddr("btaddr", mac)) {
+   msm_generate_mac_addr(mac);
+
+/* The BD address is same as WLAN MAC address but with
+ * least significant bit flipped.
+ */
+   mac[0] ^= 0x01;
+   };
 
+   do_fixup_by_compat(blob, "qcom,wcnss-bt",
+  "local-bd-address", mac, ARP_HLEN, 1);
return 0;
 }
 
-- 
2.18.0

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[U-Boot] [PATCH] db410c: add FIT support

[Ramon Fried]

1. Add FIT support for DB410c defconfig.
2. Don't overwrite bootargs (they're already
   defined in Linux device tree for DB410c.

Signed-off-by: Ramon Fried 
---
 configs/dragonboard410c_defconfig | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/configs/dragonboard410c_defconfig 
b/configs/dragonboard410c_defconfig
index ae8a8da554..25137f94de 100644
--- a/configs/dragonboard410c_defconfig
+++ b/configs/dragonboard410c_defconfig
@@ -4,9 +4,8 @@ CONFIG_SYS_TEXT_BASE=0x8008
 CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C"
 CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c"
 CONFIG_DISTRO_DEFAULTS=y
+CONFIG_FIT=y
 CONFIG_OF_BOARD_SETUP=y
-CONFIG_USE_BOOTARGS=y
-CONFIG_BOOTARGS="console=ttyMSM0,115200n8"
 # CONFIG_DISPLAY_CPUINFO is not set
 # CONFIG_DISPLAY_BOARDINFO is not set
 CONFIG_SYS_PROMPT="dragonboard410c => "
-- 
2.18.0

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[U-Boot] [PATCH v3 1/8] armv8: enable BLK code configuration

[Yinbo Zhu]

This patch is to enable BLK code configuration for SD boot.

Signed-off-by: Yinbo Zhu 
---
Change in v3:
update the commit information as above 

 include/mmc.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/mmc.h b/include/mmc.h
index 534c317..66e69b7 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -604,7 +604,7 @@ struct mmc {
u64 enh_user_start;
u64 enh_user_size;
 #endif
-#if !CONFIG_IS_ENABLED(BLK)
+#if CONFIG_IS_ENABLED(BLK)
struct blk_desc block_dev;
 #endif
char op_cond_pending;   /* 1 if we are waiting on an op_cond command */
-- 
1.7.1

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[U-Boot] [PATCH v2 2/8] armv8/ls1088a/ls2088a: esdhc: Add esdhc clock support

[Yinbo Zhu]

This patch adds esdhc clock support for ls1088a and ls2088a.

Signed-off-by: Yinbo Zhu 
---
Change in v2:
Changed this patch's order

 .../arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c |   14 ++
 1 files changed, 14 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c 
b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
index 653c6dd..bc268e2 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
@@ -192,6 +192,16 @@ int get_dspi_freq(ulong dummy)
return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV;
 }
 
+#ifdef CONFIG_FSL_ESDHC
+int get_sdhc_freq(ulong dummy)
+{
+   if (!gd->arch.sdhc_clk)
+   get_clocks();
+
+   return gd->arch.sdhc_clk;
+}
+#endif
+
 int get_serial_clock(void)
 {
return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
@@ -202,6 +212,10 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) {
case MXC_I2C_CLK:
return get_i2c_freq(0);
+#if defined(CONFIG_FSL_ESDHC)
+   case MXC_ESDHC_CLK:
+   return get_sdhc_freq(0);
+#endif
case MXC_DSPI_CLK:
return get_dspi_freq(0);
default:
-- 
1.7.1

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[U-Boot] [PATCH v1 5/8] armv8: ls1088a: add eSDHC node

[Yinbo Zhu]

This patch is to add eSDHC node for ls1088a.

Signed-off-by: Yinbo Zhu 
---
 arch/arm/dts/fsl-ls1088a.dtsi |9 +
 1 files changed, 9 insertions(+), 0 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 077caf3..72d755a 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -74,6 +74,15 @@
reg-names = "QuadSPI", "QuadSPI-memory";
num-cs = <4>;
};
+
+   esdhc: esdhc@214 {
+   compatible = "fsl,esdhc";
+   reg = <0x0 0x214 0x0 0x1>;
+   interrupts = <0 28 0x4>; /* Level high type */
+   little-endian;
+   bus-width = <4>;
+   };
+
ifc: ifc@153 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x224 0x0 0x2>;
-- 
1.7.1

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[U-Boot] [PATCH v1 4/8] armv8: ls2088a: add eSDHC node

[Yinbo Zhu]

This patch is to add eSDHC node for ls2088a.

Signed-off-by: Yinbo Zhu 
---
 arch/arm/dts/fsl-ls2080a.dtsi |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index b0f8517..2d537ae 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -75,6 +75,14 @@
num-cs = <4>;
};
 
+   esdhc: esdhc@0 {
+   compatible = "fsl,esdhc";
+   reg = <0x0 0x214 0x0 0x1>;
+   interrupts = <0 28 0x4>; /* Level high type */
+   little-endian;
+   bus-width = <4>;
+   };
+
usb0: usb3@310 {
compatible = "fsl,layerscape-dwc3";
reg = <0x0 0x310 0x0 0x1>;
-- 
1.7.1

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[U-Boot] [PATCH v3 3/8] Enable CONFIG_BLK and CONFIG_DM_MMC to Kconfig

[Yinbo Zhu]

This enables the folowing to Kconfig:
CONFIG_BLK
CONFIG_DM_MMC

Signed-off-by: Yinbo Zhu 
---
Change in v3:
Changed this patch's order  

 configs/ls1021atwr_nor_SECURE_BOOT_defconfig   |2 ++
 configs/ls1021atwr_nor_defconfig   |2 ++
 configs/ls1021atwr_nor_lpuart_defconfig|2 ++
 configs/ls1021atwr_qspi_defconfig  |2 ++
 .../ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig|2 ++
 configs/ls1021atwr_sdcard_ifc_defconfig|2 ++
 configs/ls1021atwr_sdcard_qspi_defconfig   |2 ++
 configs/ls1043aqds_defconfig   |2 ++
 configs/ls1043aqds_lpuart_defconfig|2 ++
 configs/ls1043aqds_nand_defconfig  |2 ++
 configs/ls1043aqds_nor_ddr3_defconfig  |2 ++
 configs/ls1043aqds_qspi_defconfig  |2 ++
 configs/ls1043aqds_sdcard_ifc_defconfig|2 ++
 configs/ls1043aqds_sdcard_qspi_defconfig   |2 ++
 configs/ls1043ardb_SECURE_BOOT_defconfig   |2 ++
 configs/ls1043ardb_defconfig   |2 ++
 configs/ls1043ardb_nand_SECURE_BOOT_defconfig  |2 ++
 configs/ls1043ardb_nand_defconfig  |2 ++
 configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig|2 ++
 configs/ls1043ardb_sdcard_defconfig|2 ++
 configs/ls1046aqds_SECURE_BOOT_defconfig   |2 ++
 configs/ls1046aqds_defconfig   |2 ++
 configs/ls1046aqds_lpuart_defconfig|2 ++
 configs/ls1046aqds_nand_defconfig  |2 ++
 configs/ls1046aqds_qspi_defconfig  |2 ++
 configs/ls1046aqds_sdcard_ifc_defconfig|2 ++
 configs/ls1046aqds_sdcard_qspi_defconfig   |2 ++
 configs/ls1046ardb_emmc_defconfig  |2 ++
 configs/ls1046ardb_qspi_SECURE_BOOT_defconfig  |2 ++
 configs/ls1046ardb_qspi_defconfig  |2 ++
 configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig|2 ++
 configs/ls1046ardb_sdcard_defconfig|2 ++
 configs/ls1088aqds_defconfig   |2 ++
 configs/ls1088aqds_qspi_SECURE_BOOT_defconfig  |2 ++
 configs/ls1088aqds_qspi_defconfig  |2 ++
 configs/ls1088aqds_sdcard_ifc_defconfig|2 ++
 configs/ls1088aqds_sdcard_qspi_defconfig   |2 ++
 configs/ls1088ardb_qspi_SECURE_BOOT_defconfig  |2 ++
 configs/ls1088ardb_qspi_defconfig  |2 ++
 .../ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig   |2 ++
 configs/ls1088ardb_sdcard_qspi_defconfig   |2 ++
 configs/ls2080a_emu_defconfig  |2 ++
 configs/ls2080a_simu_defconfig |2 ++
 configs/ls2080aqds_SECURE_BOOT_defconfig   |2 ++
 configs/ls2080aqds_defconfig   |2 ++
 configs/ls2080aqds_nand_defconfig  |2 ++
 configs/ls2080aqds_qspi_defconfig  |2 ++
 configs/ls2080aqds_sdcard_defconfig|2 ++
 configs/ls2080ardb_SECURE_BOOT_defconfig   |2 ++
 configs/ls2080ardb_defconfig   |2 ++
 configs/ls2080ardb_nand_defconfig  |2 ++
 configs/ls2088ardb_qspi_SECURE_BOOT_defconfig  |2 ++
 configs/ls2088ardb_qspi_defconfig  |2 ++
 53 files changed, 106 insertions(+), 0 deletions(-)

diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig 
b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index 17a202d..4d85983 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -48,3 +48,5 @@ CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
 CONFIG_RSA=y
 CONFIG_SPL_RSA=y
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index a18426e..f4f7998 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -48,3 +48,5 @@ CONFIG_USB_STORAGE=y
 CONFIG_VIDEO_FSL_DCU_FB=y
 CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig 
b/configs/ls1021atwr_nor_lpuart_defconfig
index 83ffa19..037f56c 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -49,3 +49,5 @@ CONFIG_USB_STORAGE=y
 CONFIG_VIDEO_FSL_DCU_FB=y
 CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
diff --git a/configs/ls1021atwr_qspi_defconfig 
b/configs/ls1021atwr_qspi_defconfig
index 46d8dbb..084bd27 100644
--- a/configs/ls1021atwr_qspi_defconfig
+++ b/configs/ls1021atwr_qspi_defconfig
@@ -55,3 +55,5 @@ CONFIG_USB_STORAGE=y
 CONFIG_VIDEO_FSL_DCU_FB=y
 CONFIG_VIDEO=y
 # CONFIG_VIDEO_SW_CURSOR is not set
+CONFIG_BLK=y
+CONFIG_DM_MMC=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfi

[U-Boot] Get number of seconds since beginning of epoch

[Jonas Mark (BT-FIR/ENG1)]

Hi,

I am wondering whether U-Boot already has the functionality to retrieve the 
number of seconds since beginning of the 1970-01-01 epoch. I would like to use 
this value in a Hush script.

For a product I have the requirement to detect if the current booting happens 
within x seconds of the last boot. I already have access to the system’s RTC 
and can read it with U-Boot’s date command. This returns the current date and 
time in a nice human readable format. I am now looking for something which 
would return a timestamp in seconds. I could then fulfill the afore mentioned 
requirement by calculating the difference between two timestamps using Hush and 
the let command.

Alternative proposals how to fulfill the requirement within U-Boot are welcome, 
too. ☺

Best regards,
Mark

Building Technologies, Panel Software Fire (BT-FIR/ENG1) 
Bosch Sicherheitssysteme GmbH | Postfach 11 11 | 85626 Grasbrunn | GERMANY | 
www.boschsecurity.com

Sitz: Stuttgart, Registergericht: Amtsgericht Stuttgart HRB 23118 
Aufsichtsratsvorsitzender: Stefan Hartung; Geschäftsführung: Tanja Rückert, 
Andreas Bartz, Thomas Quante, Bernhard Schuster 



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[U-Boot] [PATCH v1 7/8] armv8: ls1046a: add eSDHC node

[Yinbo Zhu]

This patch is to add eSDHC node for ls1046a.

Signed-off-by: Yinbo Zhu 
---
 arch/arm/dts/fsl-ls1046a.dtsi |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 4acbaf7..7687d12 100644
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -70,6 +70,14 @@
status = "disabled";
};
 
+   esdhc: esdhc@156 {
+   compatible = "fsl,esdhc";
+   reg = <0x0 0x156 0x0 0x1>;
+   interrupts = <0 62 0x4>;
+   big-endian;
+   bus-width = <4>;
+   };
+
ifc: ifc@153 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x153 0x0 0x1>;
-- 
1.7.1

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[U-Boot] [PATCH v1 6/8] armv8: ls1043a: add eSDHC node

[Yinbo Zhu]

This patch is to add eSDHC node for ls1043a.

Signed-off-by: Yinbo Zhu 
---
 arch/arm/dts/fsl-ls1043a.dtsi |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index ff40122..a804f51 100644
--- a/arch/arm/dts/fsl-ls1043a.dtsi
+++ b/arch/arm/dts/fsl-ls1043a.dtsi
@@ -70,6 +70,14 @@
status = "disabled";
};
 
+   esdhc: esdhc@156 {
+   compatible = "fsl,esdhc";
+   reg = <0x0 0x156 0x0 0x1>;
+   interrupts = <0 62 0x4>;
+   big-endian;
+   bus-width = <4>;
+   };
+
ifc: ifc@153 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x153 0x0 0x1>;
-- 
1.7.1

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[U-Boot] [PATCH v1 8/8] armv7: ls1021a: enable esdhc

[Yinbo Zhu]

This patch is to enable eSDHC for ls1021a.

Signed-off-by: Yinbo Zhu 
---
 arch/arm/dts/ls1021a.dtsi |1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 5b3fc6a..59c97d5 100644
--- a/arch/arm/dts/ls1021a.dtsi
+++ b/arch/arm/dts/ls1021a.dtsi
@@ -96,7 +96,6 @@
sdhci,auto-cmd12;
big-endian;
bus-width = <4>;
-   status = "disabled";
};
 
scfg: scfg@157 {
-- 
1.7.1

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Re: [U-Boot] armv5 and OMAP3 Question

[Adam Ford]

On Tue, Jul 25, 2017 at 11:08 AM Tom Rini  wrote:
>
> On Tue, Jul 25, 2017 at 08:14:57AM -0500, Adam Ford wrote:
>
> > The readme file for OMAP indicates that we compile using armv5 to "to
> > allow more compilers to work"
> >
> > We have our arch/arm/mach-omap2/omap3/lowlevel_init.S file also noting
> > some special assembly insturctions becuse we use armv5.  The barriers
> > defined also indicate we're using CP15 instead of the separate barrier
> > instructions for armv7 because we're using armv5 instead.
> >
> > I just wonder in this day and age when we're noting a GCC version and
> > generating warnings based on the GCC warning, do we still need to
> > compile as armv5 any more?  It seems like "to allow more compilers to
> > work" would not really apply any more we're trying to push newer
> > versions of GCC.
>
> So, these are historical notes that really should be corrected.
> Initially, when ARMv7 support was added, most people did not have
> compilers new enough to recognize -march=armv7-a.  We still even support
> them, see the logic in arch/arm/Makefile around CONFIG_CPU_V7 (the
> options are any sort of modern gcc, llvm, ancient gcc).  When we move to
> gcc-6 being the oldest gcc supported for ARM we can fixup those comments
> and logic as well.

My understanding is that we've made the requirement for GCC 6 now.  I
just pushed a patch which enabled mtune=armv7-a-generic when
CONFIG_CPU_V7A is enabled and that seems to shrink the code a bit on
omap3_logic.  Does it make sense to remove the , -march=armv5 from
arch/arm/Makefile and or the plain -march=armv7 since CONFIG_CPU_V7A
implies armv-a?

adam

>
> --
> Tom
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Re: [U-Boot] [PATCH] ARM: socfpga: Convert to DM serial

[Simon Goldschmidt]

Marek Vasut  schrieb am Fr., 3. Aug. 2018, 11:22:

> On 08/03/2018 11:10 AM, Simon Goldschmidt wrote:
> >
> >
> > Marek Vasut mailto:ma...@denx.de>> schrieb am Fr., 3.
> > Aug. 2018, 11:00:
> >
> > On 08/03/2018 10:40 AM, Simon Goldschmidt wrote:
> > >
> > >
> > > On 01.08.2018 09:34, Marek Vasut wrote:
> > >> On 08/01/2018 09:29 AM, Goldschmidt Simon wrote:
> > >>>
> > >>> On 30.07.2018 16:04, Marek Vasut wrote:
> >  On 07/30/2018 04:03 PM, Simon Goldschmidt wrote:
> > >
> > > On 12.05.2018 22:28, Marek Vasut wrote:
> > >> Pull the serial port configuration from DT and use DM serial
> > instead
> > >> of having the serial configuration in two places, DT and board
> > >> config.
> > >>
> > >> Signed-off-by: Marek Vasut  ma...@denx.de>>
> > >> Cc: Chin Liang See  > >
> > >> Cc: Dinh Nguyen  > >
> > >> ---
> > >> arch/arm/Kconfig | 3 +++
> > >> arch/arm/dts/socfpga.dtsi| 2 ++
> > >> arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts | 1 +
> > >> include/configs/socfpga_common.h | 8 
> > >> 4 files changed, 6 insertions(+), 8 deletions(-)
> > >>
> > >> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > >> index 532aa41a87..2012ac6410 100644
> > >> --- a/arch/arm/Kconfig
> > >> +++ b/arch/arm/Kconfig
> > >> @@ -737,6 +737,7 @@ config ARCH_SOCFPGA
> > >> select ARCH_MISC_INIT
> > >> select CPU_V7A
> > >> select DM
> > >> +select DM_SERIAL
> > >> select ENABLE_ARM_SOC_BOOT0_HOOK
> > >> select OF_CONTROL
> > >> select SPL_LIBCOMMON_SUPPORT
> > >> @@ -746,11 +747,13 @@ config ARCH_SOCFPGA
> > >> select SPL_NAND_SUPPORT if SPL_NAND_DENALI
> > >> select SPL_OF_CONTROL
> > >> select SPL_SERIAL_SUPPORT
> > >> +select SPL_DM_SERIAL
> > >> select SPL_SPI_FLASH_SUPPORT if SPL_SPI_SUPPORT
> > >> select SPL_SPI_SUPPORT if DM_SPI
> > >> select SPL_WATCHDOG_SUPPORT
> > >> select SUPPORT_SPL
> > >> select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
> > >> +select SYS_NS16550
> > >> select SYS_THUMB_BUILD
> > >> imply CMD_MTDPARTS
> > >> imply CRC32_VERIFY
> > >> diff --git a/arch/arm/dts/socfpga.dtsi
> > b/arch/arm/dts/socfpga.dtsi
> > >> index e64127fcb2..314449478d 100644
> > >> --- a/arch/arm/dts/socfpga.dtsi
> > >> +++ b/arch/arm/dts/socfpga.dtsi
> > >> @@ -737,6 +737,7 @@
> > >> reg-shift = <2>;
> > >> reg-io-width = <4>;
> > >> clocks = <&l4_sp_clk>;
> > >> +clock-frequency = <1>;
> > >> };
> > >>   uart1: serial1@ffc03000 {
> > >> @@ -746,6 +747,7 @@
> > >> reg-shift = <2>;
> > >> reg-io-width = <4>;
> > >> clocks = <&l4_sp_clk>;
> > >> +clock-frequency = <1>;
> > >> };
> > >>   rst: rstmgr@ffd05000 {
> > >> diff --git a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> > >> b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> > >> index b573d0e658..06b61cb0af 100644
> > >> --- a/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> > >> +++ b/arch/arm/dts/socfpga_arria10_socdk_sdmmc.dts
> > >> @@ -24,6 +24,7 @@
> > >> };
> > >>   &uart1 {
> > >> +clock-frequency = <5000>;
> > >> u-boot,dm-pre-reloc;
> > >> status = "okay";
> > >> };
> > >> diff --git a/include/configs/socfpga_common.h
> > >> b/include/configs/socfpga_common.h
> > >> index 54b9edc97c..a60da85499 100644
> > >> --- a/include/configs/socfpga_common.h
> > >> +++ b/include/configs/socfpga_common.h
> > >> @@ -173,14 +173,6 @@ unsigned int
> > >> cm_get_qspi_controller_clk_hz(void);
> > >>  * Serial Driver
> > >>  */
> > >> #define CONFIG_SYS_NS16550_SERIAL
> > >> -#define CONFIG_SYS_NS16550_REG_SIZE-4
> > >> -#if defined(CONFIG_TARGET_SOCFPGA_GEN5)
> > >> -#define CONFIG_SYS_NS16550_COM1SOCFPGA_UART0_ADDRESS
> > >> -#define CONFIG_SYS_NS16550_CLK1
> > >> -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> > >> -#define CONFIG_SYS_NS16550_COM1SOCFPGA_UART1_ADDRESS
> > >> -#def

[U-Boot] [PATCH v2] stm32f7: board: Fix memory init

[Patrice Chotard]

Commit 1473b12ad0b3 ("lib: fdtdec: Update ram_base to store ram start
adddress") brings regression on STM32F7 which can't boot.

Use fdtdec_setup_mem_size_base() to setup memory base and size.
Use fdtdec_setup_memory_banksize() to setup memory bank base and size.

Reported-by: Mark Olsson 
Signed-off-by: Patrice Chotard 
Cc: Mark Olsson 
Reviewed-by: Vikas Manocha 

---

Changes in v2:
  _ Update value returned by dram_init() and dram_init_banksize

 board/st/stm32f746-disco/stm32f746-disco.c | 35 +++---
 1 file changed, 3 insertions(+), 32 deletions(-)

diff --git a/board/st/stm32f746-disco/stm32f746-disco.c 
b/board/st/stm32f746-disco/stm32f746-disco.c
index e21cfc6e4955..7c9b1ad82aa1 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -21,25 +21,10 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int get_memory_base_size(fdt_addr_t *mr_base, fdt_addr_t *mr_size)
-{
-   int mr_node;
-
-   mr_node = fdt_path_offset(gd->fdt_blob, "/memory");
-   if (mr_node < 0)
-   return mr_node;
-   *mr_base = fdtdec_get_addr_size_auto_noparent(gd->fdt_blob, mr_node,
- "reg", 0, mr_size, false);
-   debug("mr_base = %lx, mr_size= %lx\n", *mr_base, *mr_size);
-
-   return 0;
-}
 int dram_init(void)
 {
-   int rv;
-   fdt_addr_t mr_base, mr_size;
-
 #ifndef CONFIG_SUPPORT_SPL
+   int rv;
struct udevice *dev;
rv = uclass_get_device(UCLASS_RAM, 0, &dev);
if (rv) {
@@ -48,26 +33,12 @@ int dram_init(void)
}
 
 #endif
-   rv = get_memory_base_size(&mr_base, &mr_size);
-   if (rv)
-   return rv;
-   gd->ram_size = mr_size;
-   gd->ram_top = mr_base;
-
-   return rv;
+   return fdtdec_setup_mem_size_base();
 }
 
 int dram_init_banksize(void)
 {
-   fdt_addr_t mr_base, mr_size;
-   get_memory_base_size(&mr_base, &mr_size);
-   /*
-* Fill in global info with description of SRAM configuration
-*/
-   gd->bd->bi_dram[0].start = mr_base;
-   gd->bd->bi_dram[0].size  = mr_size;
-
-   return 0;
+   return fdtdec_setup_memory_banksize();
 }
 
 int board_early_init_f(void)
-- 
1.9.1

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Re: [U-Boot] [PATCH v2 1/3] dm: serial: Replace setparity by setconfig

[Patrice CHOTARD]

Hi Simon

On 08/02/2018 06:56 PM, Simon Glass wrote:
> Hi Patrice,
> 
> On 1 August 2018 at 09:58, Patrice Chotard  wrote:
>> From: Patrick Delaunay 
>>
>> Replace setparity by more generic setconfig ops
>> to allow uart parity, bits word length and stop bits
>> number change.
>>
>> Adds SERIAL_GET_PARITY/BITS/STOP macros.
>>
>> Signed-off-by: Patrick Delaunay 
>> Signed-off-by: Patrice Chotard 
>> ---
>>
>> Changes in v2:
>>- Update SERIAL_BITS_MASK and SERIAL_STOP_MASK
>>- Update serial_setconfig prototype
>>
>>   drivers/serial/serial-uclass.c | 16 
>>   include/serial.h   | 42 
>> +++---
>>   2 files changed, 55 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
>> index 321d23ee93bf..a7556c9b7bc3 100644
>> --- a/drivers/serial/serial-uclass.c
>> +++ b/drivers/serial/serial-uclass.c
>> @@ -287,6 +287,20 @@ void serial_setbrg(void)
>>  ops->setbrg(gd->cur_serial_dev, gd->baudrate);
>>   }
>>
>> +int serial_setconfig(uint config)
>> +{
>> +   struct dm_serial_ops *ops;
>> +
>> +   if (!gd->cur_serial_dev)
>> +   return 0;
>> +
>> +   ops = serial_get_ops(gd->cur_serial_dev);
>> +   if (ops->setconfig)
>> +   return ops->setconfig(gd->cur_serial_dev, config);
>> +
>> +   return 0;
>> +}
>> +
>>   void serial_stdio_init(void)
>>   {
>>   }
>> @@ -398,6 +412,8 @@ static int serial_post_probe(struct udevice *dev)
>>  ops->pending += gd->reloc_off;
>>  if (ops->clear)
>>  ops->clear += gd->reloc_off;
>> +   if (ops->setconfig)
>> +   ops->setconfig += gd->reloc_off;
>>   #if CONFIG_POST & CONFIG_SYS_POST_UART
>>  if (ops->loop)
>>  ops->loop += gd->reloc_off
>> diff --git a/include/serial.h b/include/serial.h
>> index b9ef6d91c9c5..4f104f6a7188 100644
>> --- a/include/serial.h
>> +++ b/include/serial.h
>> @@ -73,6 +73,39 @@ enum serial_par {
>>  SERIAL_PAR_EVEN
>>   };
>>
>> +#define SERIAL_PAR_MASK0x03
>> +#define SERIAL_PAR_SHIFT   0
> 
> Sorry I should have said this explicitly, but can you please update
> the other masks as well?

No problem, i will update this as well

Thanks

Patrice

> 
>> +#define SERIAL_GET_PARITY(config) \
>> +   ((config & SERIAL_PAR_MASK) >> SERIAL_PAR_SHIFT)
>> +
>> +enum serial_bits {
>> +   SERIAL_5_BITS,
>> +   SERIAL_6_BITS,
>> +   SERIAL_7_BITS,
>> +   SERIAL_8_BITS
>> +};
>> +
>> +#define SERIAL_BITS_SHIFT  2
>> +#define SERIAL_BITS_MASK   (0x3 << SERIAL_BITS_SHIFT)
>> +#define SERIAL_GET_BITS(config) \
>> +   ((config & SERIAL_BITS_MASK) >> SERIAL_BITS_SHIFT)
>> +
>> +enum serial_stop {
>> +   SERIAL_HALF_STOP,   /* 0.5 stop bit */
>> +   SERIAL_ONE_STOP,/*   1 stop bit */
>> +   SERIAL_ONE_HALF_STOP,   /* 1.5 stop bit */
>> +   SERIAL_TWO_STOP /*   2 stop bit */
>> +};
>> +
>> +#define SERIAL_STOP_SHIFT  4
>> +#define SERIAL_STOP_MASK   (0x3 << SERIAL_STOP_SHIFT)
>> +#define SERIAL_GET_STOP(config) \
>> +   ((config & SERIAL_STOP_MASK) >> SERIAL_STOP_SHIFT)
>> +
>> +#define SERIAL_DEFAULT_CONFIG  SERIAL_PAR_NONE << SERIAL_PAR_SHIFT | \
>> +   SERIAL_8_BITS << SERIAL_BITS_SHIFT | \
>> +   SERIAL_ONE_STOP << SERIAL_STOP_SHIFT
>> +
>>   /**
>>* struct struct dm_serial_ops - Driver model serial operations
>>*
>> @@ -150,15 +183,18 @@ struct dm_serial_ops {
>>  int (*loop)(struct udevice *dev, int on);
>>   #endif
>>  /**
>> -* setparity() - Set up the parity
>> +* setconfig() - Set up the uart configuration
>> +* (parity, 5/6/7/8 bits word length, stop bits)
>>   *
>> -* Set up a new parity for this device.
>> +* Set up a new config for this device.
>>   *
>>   * @dev: Device pointer
>>   * @parity: parity to use
>> +* @bits: bits number to use
>> +* @stop: stop bits number to use
>>   * @return 0 if OK, -ve on error
>>   */
>> -   int (*setparity)(struct udevice *dev, enum serial_par parity);
>> +   int (*setconfig)(struct udevice *dev, uint serial_config);
>>   };
>>
>>   /**
>> --
>> 1.9.1
>>
> 
> Regards,
> Simon
> 
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Re: [U-Boot] [PATCH v2 3/3] sandbox: Add serial test

[Patrice CHOTARD]

Hi Simon

On 08/02/2018 06:57 PM, Simon Glass wrote:
> On 1 August 2018 at 09:58, Patrice Chotard  wrote:
>> Signed-off-by: Patrice Chotard 
>> ---
>>
>> Changes in v2:
>>- Add sandbox serial test
>>
>>   drivers/serial/sandbox.c | 14 ++
>>   include/common.h |  1 +
>>   test/dm/Makefile |  1 +
>>   test/dm/serial.c | 26 ++
>>   4 files changed, 42 insertions(+)
>>   create mode 100644 test/dm/serial.c
> 
> Reviewed-by: Simon Glass 
> 
> How about also a test that checks it returns -ENOTSUPP when the wrong
> options are specified?

Effectively, it currently misses, i will add a specific test.

Thanks

Patrice

> 
>>
>> diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c
>> index a60dabe58835..94b4fdfb1714 100644
>> --- a/drivers/serial/sandbox.c
>> +++ b/drivers/serial/sandbox.c
>> @@ -143,6 +143,19 @@ static int sandbox_serial_getc(struct udevice *dev)
>>  return result;
>>   }
>>
>> +static int sandbox_serial_setconfig(struct udevice *dev, uint serial_config)
>> +{
>> +   u8 parity = SERIAL_GET_PARITY(serial_config);
>> +   u8 bits = SERIAL_GET_BITS(serial_config);
>> +   u8 stop = SERIAL_GET_STOP(serial_config);
>> +
>> +   if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP ||
>> +   parity != SERIAL_PAR_NONE)
>> +   return -ENOTSUPP; /* not supported in driver*/
>> +
>> +   return 0;
>> +}
>> +
>>   static const char * const ansi_colour[] = {
>>  "black", "red", "green", "yellow", "blue", "megenta", "cyan",
>>  "white",
>> @@ -173,6 +186,7 @@ static const struct dm_serial_ops sandbox_serial_ops = {
>>  .putc = sandbox_serial_putc,
>>  .pending = sandbox_serial_pending,
>>  .getc = sandbox_serial_getc,
>> +   .setconfig = sandbox_serial_setconfig,
>>   };
>>
>>   static const struct udevice_id sandbox_serial_ids[] = {
>> diff --git a/include/common.h b/include/common.h
>> index 940161f1758b..5c952af5e319 100644
>> --- a/include/common.h
>> +++ b/include/common.h
>> @@ -359,6 +359,7 @@ voidserial_putc_raw(const char);
>>   void   serial_puts   (const char *);
>>   intserial_getc   (void);
>>   intserial_tstc   (void);
>> +intserial_setconfig(uint config);
>>
>>   /* $(CPU)/speed.c */
>>   intget_clocks (void);
>> diff --git a/test/dm/Makefile b/test/dm/Makefile
>> index d2ed96c61533..97517c7f825e 100644
>> --- a/test/dm/Makefile
>> +++ b/test/dm/Makefile
>> @@ -44,4 +44,5 @@ obj-$(CONFIG_DM_VIDEO) += video.o
>>   obj-$(CONFIG_ADC) += adc.o
>>   obj-$(CONFIG_SPMI) += spmi.o
>>   obj-$(CONFIG_WDT) += wdt.o
>> +obj-$(CONFIG_DM_SERIAL) += serial.o
>>   endif
>> diff --git a/test/dm/serial.c b/test/dm/serial.c
>> new file mode 100644
>> index ..4d8422eebd34
>> --- /dev/null
>> +++ b/test/dm/serial.c
>> @@ -0,0 +1,26 @@
>> +// SPDX-License-Identifier: GPL-2.0
>> +/*
>> + * Copyright (c) 2018, STMicroelectronics
>> + */
>> +
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +
>> +static int dm_test_serial(struct unit_test_state *uts)
>> +{
>> +   struct udevice *dev_serial;
>> +
>> +   ut_assertok(uclass_get_device_by_name(UCLASS_SERIAL, "serial",
>> + &dev_serial));
>> +
>> +   ut_assertok(serial_tstc());
>> +
>> +   ut_assertok(serial_setconfig(SERIAL_DEFAULT_CONFIG));
>> +
>> +   return 0;
>> +}
>> +
>> +DM_TEST(dm_test_serial, DM_TESTF_SCAN_FDT);
>> --
>> 1.9.1
>>
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[U-Boot] [PATCH 0/4] Solve issue with serial rx buffer when MUX is deactivated

[Patrick Delaunay]

When I activate CONFIG_SERIAL_RX_BUFFER on my board without CONSOLE_MUX,
I have a strange behavior in console: a new prompt is displayed
continuously

I check the call stack

cread_line (common/cli_readline.c)
=> getcmd_getch (common/cli_readline.c)
==> fgetc (common/console.c)
===> console_tstc (common/console.c)
> stdio_devices[file]->get()
=> _serial_getc() (drivers/serial/serial-uclass.c)
   and the data reads from rx buffer but it is garbage
   as tstc is not called

PS: I have no issue when CONSOLE_MUX is activated because in this
case the tstc() is always called in fgetc loop.

My first solution to update the rx buffer management,
to avoid the issue:

static int _serial_getc(struct udevice *dev)
{
struct serial_dev_priv *upriv = dev_get_uclass_priv(dev);
char val;

if (upriv->rd_ptr == upriv->wr_ptr)
__serial_tstc(dev);

if (upriv->rd_ptr == upriv->wr_ptr)
return 0; /* error : no data to read */

val = upriv->buf[upriv->rd_ptr++];
upriv->rd_ptr %= CONFIG_SERIAL_RX_BUFFER_SIZE;

return val;
}

With this first patch, I see that that WATCHDOG is not reloaded
and the getc() error value 0x0 wasn't correctly handle in cli;
the issue is alway present and the behavior change (getc function
is no more blocking): the caller needs to handle the error and
reload the watchdog.

To summarize, I see several issues in the current U-Boot code:
- No protection on the rx buffer in _serial_getc():
  the current code assumed that tstc() is alway called but
  it is dangerous
- error for getc() (read value = 0x0) is not handled in cread_line()
- in console.c, tstc() is not called when CONSOLE_MUX is not activated

In this patchset I try to solve all these issues by separate patch
but perhaps only the first correction on the rx buffer is really mandatory.

On my board stm32mp1 ev1 the issue is solved.



Patrick Delaunay (4):
  stm32mp1: activate serial rx buffer
  serial: protect access to serial rx buffer
  console: unify fgetc function when console MUX is deactivated
  cli: handle getch error

 common/cli_readline.c | 4 
 common/console.c  | 9 +
 configs/stm32mp15_basic_defconfig | 1 +
 drivers/serial/serial-uclass.c| 3 +++
 4 files changed, 13 insertions(+), 4 deletions(-)

-- 
2.7.4

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[U-Boot] [PATCH 1/4] stm32mp1: activate serial rx buffer

[Patrick Delaunay]

Activate the serial rx buffer.
Prepare console MUX activation with vidconsole, and avoid console
performance issue (missing character for copy-paste).

Signed-off-by: Patrick Delaunay 
---

 configs/stm32mp15_basic_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/stm32mp15_basic_defconfig 
b/configs/stm32mp15_basic_defconfig
index c72a440..9792e49 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -41,4 +41,5 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_DM_REGULATOR_STM32_VREFBUF=y
 CONFIG_DM_REGULATOR_STPMU1=y
+CONFIG_SERIAL_RX_BUFFER=y
 CONFIG_STM32_SERIAL=y
-- 
2.7.4

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[U-Boot] [PATCH 2/4] serial: protect access to serial rx buffer

[Patrick Delaunay]

Add test to avoid access to rx buffer when this buffer is empty.
In this case directly call getc() function to avoid issue when tstc()
is not called.

Signed-off-by: Patrick Delaunay 
---

 drivers/serial/serial-uclass.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 321d23e..4121a37 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -228,6 +228,9 @@ static int _serial_getc(struct udevice *dev)
struct serial_dev_priv *upriv = dev_get_uclass_priv(dev);
char val;
 
+   if (upriv->rd_ptr == upriv->wr_ptr)
+   return __serial_getc(dev);
+
val = upriv->buf[upriv->rd_ptr++];
upriv->rd_ptr %= CONFIG_SERIAL_RX_BUFFER_SIZE;
 
-- 
2.7.4

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[U-Boot] [PATCH 3/4] console: unify fgetc function when console MUX is deactivated

[Patrick Delaunay]

Unify the fgetc function when MUX is activated or not:
- always call tstc() : it is the normal behavior expected
  by serial uclass (call tstc then getc) and that avoids
  issue when SERIAL_RX_BUFFER is activated
- reload WATCHDOG in the char waiting loop

This patch allow to have the same behavior when CONSOLE_MUX is activated
or not and avoid regression when this feature is deactivated.

Signed-off-by: Patrick Delaunay 
---

 common/console.c | 9 +
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/common/console.c b/common/console.c
index 7aa58d0..9a94f32 100644
--- a/common/console.c
+++ b/common/console.c
@@ -311,12 +311,12 @@ int serial_printf(const char *fmt, ...)
 int fgetc(int file)
 {
if (file < MAX_FILES) {
-#if CONFIG_IS_ENABLED(CONSOLE_MUX)
/*
 * Effectively poll for input wherever it may be available.
 */
for (;;) {
WATCHDOG_RESET();
+#if CONFIG_IS_ENABLED(CONSOLE_MUX)
/*
 * Upper layer may have already called tstc() so
 * check for that first.
@@ -324,6 +324,10 @@ int fgetc(int file)
if (tstcdev != NULL)
return console_getc(file);
console_tstc(file);
+#else
+   if (console_tstc(file))
+   return console_getc(file);
+#endif
 #ifdef CONFIG_WATCHDOG
/*
 * If the watchdog must be rate-limited then it should
@@ -332,9 +336,6 @@ int fgetc(int file)
 udelay(1);
 #endif
}
-#else
-   return console_getc(file);
-#endif
}
 
return -1;
-- 
2.7.4

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[U-Boot] [PATCH 4/4] cli: handle getch error

[Patrick Delaunay]

Handle getch error (when getch return 0x0) to avoid display issue
in the console.

Signed-off-by: Patrick Delaunay 
---

 common/cli_readline.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/common/cli_readline.c b/common/cli_readline.c
index 60a232b..99b6317 100644
--- a/common/cli_readline.c
+++ b/common/cli_readline.c
@@ -273,6 +273,10 @@ static int cread_line(const char *const prompt, char *buf, 
unsigned int *len,
 
ichar = getcmd_getch();
 
+   /* ichar=0x0 when error occurs in U-Boot getc */
+   if (!ichar)
+   continue;
+
if ((ichar == '\n') || (ichar == '\r')) {
putc('\n');
break;
-- 
2.7.4

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Re: [U-Boot] [PATCH v6 00/27] SPI-NAND support

[Jagan Teki]

On Fri, Aug 3, 2018 at 3:20 PM, Jagan Teki  wrote:
> On Fri, Aug 3, 2018 at 1:57 PM, Miquel Raynal  
> wrote:
>> Hi Jagan, Tom,
>>
>> Miquel Raynal  wrote on Wed,  1 Aug 2018
>> 10:18:21 +0200:
>>
>>> During the last months, Boris Brezillon shared his work to support
>>> serial flashes within Linux. First, he delivered (and merged) a new
>>> layer called spi-mem. He also initiated in Linux MTD subsystem the move
>>> of all 'raw' NAND related code to a raw/ subdirectory, adding at the
>>> same time a NAND core that would be shared with all NAND devices. Then,
>>> he contributed a generic SPI-NAND driver, making use of this NAND core,
>>> as well as some vendor code to drive a few chips.
>>>
>>> On top of this work, I added an 'mtd' U-Boot command to handle all sort
>>> of MTD devices. This should become the default command instead of having
>>> one per flash flavor ('sf', 'nand', 'spi-nand' ?).
>>>
>>> The series has been tested on an Ocelot board PCB123 (VSC7514),
>>> featuring a Macronix SPI NAND chip.
>>>
>>> TL;DR: the series contains:
>>> - A few patches from Linux to resynchronize some areas of the MTD layer.
>>> - Various fixes and re-organization of the MTD subsystem.
>>> - The introduction of the SPI-mem interface.
>>> - The addition of the generic SPI-NAND driver (and its bindings).
>>> - Several SPI NAND chip drivers (Macronix, Micron, Winbond).
>>> - A new 'mtd' command.
>>> - Support for spi-nand devices in mtdparts.
>>>
>>> To test your SPI-NAND device with U-Boot simply follow these lines:
>>>
>>> > setenv mtdparts mtdparts=spi-nand0:1m(foo),-(bar)
>>> > setenv mtdids spi-nand0=spi-nand0
>>> > mtdparts # show the spi-nand device partitions
>>> > ubi part bar # create a static UBI volume in the bar partition
>>>
>>> Thanks,
>>> Miquèl
>>>
>>> Changes since v5:
>>> -
>>> * Included Boris fixup about the build issues.
>>> * Added Rb/Ab tags from Jagan on patchs 20/21.
>>
>> I can't see a pull request flow on U-Boot ML, I suppose you use a
>> different mean for that purpose.
>>
>> Jagan, is this version OK? Is it part of your PR?
>
> Travis is going on [1], will send PR once all fine.
>
> [1] https://travis-ci.org/openedev/u-boot-amarula/builds/411596788

There are some build issues, not quite sure whether it relates. please
look into it.

[2] https://travis-ci.org/openedev/u-boot-amarula/jobs/411596814
[3] https://travis-ci.org/openedev/u-boot-amarula/jobs/411596815
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Re: [U-Boot] [PATCH v2 2/3] serial: stm32: Replace setparity by setconfig

[Patrice CHOTARD]

Hi Simon

On 08/02/2018 06:57 PM, Simon Glass wrote:
> Hi Patrice,
> 
> On 1 August 2018 at 09:58, Patrice Chotard  wrote:
>> Replace stm32_serial_setparity by stm32_serial_setconfig
>> which allows to set serial bits number, parity and stop
>> bits number.
>> Only parity setting is implemented.
>>
>> Signed-off-by: Patrick Delaunay 
>> Signed-off-by: Patrice Chotard 
>> ---
>>
>> Changes in v2:
>>- Update stm32_serial_setconfig prototype
>>
>>   drivers/serial/serial_stm32.c | 21 +++--
>>   1 file changed, 15 insertions(+), 6 deletions(-)
> 
> Reviewed-by: Simon Glass 
> 
> Please see below.
> 
> Also I worry about bisectability. U-Boot should always build every
> commit and I worry that your previous patch will break things, fixed
> by this patch.

Yes you are right, i will rework the series to avoid bissectability 
breakdown

> 
>>
>> diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
>> index f26234549c3e..53866a23e6fc 100644
>> --- a/drivers/serial/serial_stm32.c
>> +++ b/drivers/serial/serial_stm32.c
>> @@ -47,20 +47,28 @@ static int stm32_serial_setbrg(struct udevice *dev, int 
>> baudrate)
>>  return 0;
>>   }
>>
>> -static int stm32_serial_setparity(struct udevice *dev, enum serial_par 
>> parity)
>> +static int stm32_serial_setconfig(struct udevice *dev, uint serial_config)
>>   {
>>  struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
>>  bool stm32f4 = plat->uart_info->stm32f4;
>>  u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
>>  u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
>>  u32 config = 0;
>> -
>> -   if (stm32f4)
>> -   return -EINVAL; /* not supported in driver*/
>> +   u8 parity = SERIAL_GET_PARITY(serial_config);
>> +   u8 bits = SERIAL_GET_BITS(serial_config);
>> +   u8 stop = SERIAL_GET_STOP(serial_config);
> 
> I don't see the benefit of using u8 here. Isn't uint good enough?

I simply forgot to update these types

Thanks

Patrice

> 
>> +
>> +   /*
>> +* only parity config is implemented, check if other serial settings
>> +* are the default one.
>> +* (STM32F4 serial IP didn't support parity setting)
>> +*/
>> +   if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP || stm32f4)
>> +   return -ENOTSUPP; /* not supported in driver*/
>>
>>  clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | 
>> BIT(uart_enable_bit));
>>  /* update usart configuration (uart need to be disable)
>> -* PCE: parity check control
>> +* PCE: parity check enable
>>   * PS : '0' : Even / '1' : Odd
>>   * M[1:0] = '00' : 8 Data bits
>>   * M[1:0] = '01' : 9 Data bits with parity
>> @@ -77,6 +85,7 @@ static int stm32_serial_setparity(struct udevice *dev, 
>> enum serial_par parity)
>>  config = USART_CR1_PCE | USART_CR1_M0;
>>  break;
>>  }
>> +
>>  clrsetbits_le32(cr1,
>>  USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 |
>>  USART_CR1_M0,
>> @@ -210,7 +219,7 @@ static const struct dm_serial_ops stm32_serial_ops = {
>>  .pending = stm32_serial_pending,
>>  .getc = stm32_serial_getc,
>>  .setbrg = stm32_serial_setbrg,
>> -   .setparity = stm32_serial_setparity
>> +   .setconfig = stm32_serial_setconfig
>>   };
>>
>>   U_BOOT_DRIVER(serial_stm32) = {
>> --
>> 1.9.1
>>
> 
> Regards,
> Simon
> 
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[U-Boot] [PATCH v3 2/4] serial: stm32: Replace setparity by setconfig

[Patrice Chotard]

Replace stm32_serial_setparity by stm32_serial_setconfig
which allows to set serial bits number, parity and stop
bits number.
Only parity setting is implemented.

Signed-off-by: Patrick Delaunay 
Signed-off-by: Patrice Chotard 
---

Changes in v3:
  - Replace u8 by uint for parity/bits/stop in stm32_serial_setconfig()

Changes in v2:
  - Update stm32_serial_setconfig prototype

 drivers/serial/serial_stm32.c | 21 +++--
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/drivers/serial/serial_stm32.c b/drivers/serial/serial_stm32.c
index f26234549c3e..66e02d5689d0 100644
--- a/drivers/serial/serial_stm32.c
+++ b/drivers/serial/serial_stm32.c
@@ -47,20 +47,28 @@ static int stm32_serial_setbrg(struct udevice *dev, int 
baudrate)
return 0;
 }
 
-static int stm32_serial_setparity(struct udevice *dev, enum serial_par parity)
+static int stm32_serial_setconfig(struct udevice *dev, uint serial_config)
 {
struct stm32x7_serial_platdata *plat = dev_get_platdata(dev);
bool stm32f4 = plat->uart_info->stm32f4;
u8 uart_enable_bit = plat->uart_info->uart_enable_bit;
u32 cr1 = plat->base + CR1_OFFSET(stm32f4);
u32 config = 0;
-
-   if (stm32f4)
-   return -EINVAL; /* not supported in driver*/
+   uint parity = SERIAL_GET_PARITY(serial_config);
+   uint bits = SERIAL_GET_BITS(serial_config);
+   uint stop = SERIAL_GET_STOP(serial_config);
+
+   /*
+* only parity config is implemented, check if other serial settings
+* are the default one.
+* (STM32F4 serial IP didn't support parity setting)
+*/
+   if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP || stm32f4)
+   return -ENOTSUPP; /* not supported in driver*/
 
clrbits_le32(cr1, USART_CR1_RE | USART_CR1_TE | BIT(uart_enable_bit));
/* update usart configuration (uart need to be disable)
-* PCE: parity check control
+* PCE: parity check enable
 * PS : '0' : Even / '1' : Odd
 * M[1:0] = '00' : 8 Data bits
 * M[1:0] = '01' : 9 Data bits with parity
@@ -77,6 +85,7 @@ static int stm32_serial_setparity(struct udevice *dev, enum 
serial_par parity)
config = USART_CR1_PCE | USART_CR1_M0;
break;
}
+
clrsetbits_le32(cr1,
USART_CR1_PCE | USART_CR1_PS | USART_CR1_M1 |
USART_CR1_M0,
@@ -210,7 +219,7 @@ static const struct dm_serial_ops stm32_serial_ops = {
.pending = stm32_serial_pending,
.getc = stm32_serial_getc,
.setbrg = stm32_serial_setbrg,
-   .setparity = stm32_serial_setparity
+   .setconfig = stm32_serial_setconfig
 };
 
 U_BOOT_DRIVER(serial_stm32) = {
-- 
1.9.1

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[U-Boot] [PATCH v3 4/4] sandbox: Add serial test

[Patrice Chotard]

Signed-off-by: Patrice Chotard 
---

Changes in v3:
  - Update serial test when wrong serial options are specified
  - Add SERIAL_CONFIG(par, bits, stop) macro to create serial mask

Changes in v2:
  - Add sandbox serial test

 drivers/serial/sandbox.c | 14 +
 include/common.h |  1 +
 include/serial.h |  5 +
 test/dm/Makefile |  1 +
 test/dm/serial.c | 54 
 5 files changed, 75 insertions(+)
 create mode 100644 test/dm/serial.c

diff --git a/drivers/serial/sandbox.c b/drivers/serial/sandbox.c
index a60dabe58835..94b4fdfb1714 100644
--- a/drivers/serial/sandbox.c
+++ b/drivers/serial/sandbox.c
@@ -143,6 +143,19 @@ static int sandbox_serial_getc(struct udevice *dev)
return result;
 }
 
+static int sandbox_serial_setconfig(struct udevice *dev, uint serial_config)
+{
+   u8 parity = SERIAL_GET_PARITY(serial_config);
+   u8 bits = SERIAL_GET_BITS(serial_config);
+   u8 stop = SERIAL_GET_STOP(serial_config);
+
+   if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP ||
+   parity != SERIAL_PAR_NONE)
+   return -ENOTSUPP; /* not supported in driver*/
+
+   return 0;
+}
+
 static const char * const ansi_colour[] = {
"black", "red", "green", "yellow", "blue", "megenta", "cyan",
"white",
@@ -173,6 +186,7 @@ static const struct dm_serial_ops sandbox_serial_ops = {
.putc = sandbox_serial_putc,
.pending = sandbox_serial_pending,
.getc = sandbox_serial_getc,
+   .setconfig = sandbox_serial_setconfig,
 };
 
 static const struct udevice_id sandbox_serial_ids[] = {
diff --git a/include/common.h b/include/common.h
index 940161f1758b..5c952af5e319 100644
--- a/include/common.h
+++ b/include/common.h
@@ -359,6 +359,7 @@ voidserial_putc_raw(const char);
 void   serial_puts   (const char *);
 intserial_getc   (void);
 intserial_tstc   (void);
+intserial_setconfig(uint config);
 
 /* $(CPU)/speed.c */
 intget_clocks (void);
diff --git a/include/serial.h b/include/serial.h
index 9ae4b3879085..79f512fc98f3 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -102,6 +102,11 @@ enum serial_stop {
 #define SERIAL_GET_STOP(config) \
((config & SERIAL_STOP_MASK) >> SERIAL_STOP_SHIFT)
 
+#define SERIAL_CONFIG(par, bits, stop) \
+(par << SERIAL_PAR_SHIFT | \
+ bits << SERIAL_BITS_SHIFT | \
+ stop << SERIAL_STOP_SHIFT)
+
 #define SERIAL_DEFAULT_CONFIG  SERIAL_PAR_NONE << SERIAL_PAR_SHIFT | \
SERIAL_8_BITS << SERIAL_BITS_SHIFT | \
SERIAL_ONE_STOP << SERIAL_STOP_SHIFT
diff --git a/test/dm/Makefile b/test/dm/Makefile
index d2ed96c61533..97517c7f825e 100644
--- a/test/dm/Makefile
+++ b/test/dm/Makefile
@@ -44,4 +44,5 @@ obj-$(CONFIG_DM_VIDEO) += video.o
 obj-$(CONFIG_ADC) += adc.o
 obj-$(CONFIG_SPMI) += spmi.o
 obj-$(CONFIG_WDT) += wdt.o
+obj-$(CONFIG_DM_SERIAL) += serial.o
 endif
diff --git a/test/dm/serial.c b/test/dm/serial.c
new file mode 100644
index ..e1636868d7fe
--- /dev/null
+++ b/test/dm/serial.c
@@ -0,0 +1,54 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (c) 2018, STMicroelectronics
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+static int dm_test_serial(struct unit_test_state *uts)
+{
+   struct udevice *dev_serial;
+
+   ut_assertok(uclass_get_device_by_name(UCLASS_SERIAL, "serial",
+ &dev_serial));
+
+   ut_assertok(serial_tstc());
+   /*
+* test with default config which is the only one supported by
+* sandbox_serial driver
+*/
+   ut_assertok(serial_setconfig(SERIAL_DEFAULT_CONFIG));
+   /*
+* test with a serial config which is not supported by
+* sandbox_serial driver: test with wrong parity
+*/
+   ut_asserteq(-ENOTSUPP,
+   setconfig(SERIAL_CONFIG(SERIAL_PAR_ODD,
+   SERIAL_8_BITS,
+   SERIAL_ONE_STOP)));
+   /*
+* test with a serial config which is not supported by
+* sandbox_serial driver: test with wrong bits number
+*/
+   ut_asserteq(-ENOTSUPP,
+   serial_setconfig(SERIAL_CONFIG(SERIAL_PAR_NONE,
+  SERIAL_6_BITS,
+  SERIAL_ONE_STOP)));
+
+   /*
+* test with a serial config which is not supported by
+* sandbox_serial driver: test with wrong stop bits number
+*/
+   ut_asserteq(-ENOTSUPP,
+   serial_setconfig(SERIAL_CONFIG(SERIAL_PAR_NONE,
+  SERIAL_8_BITS,
+  SERIAL_TWO_STOP)));
+
+   return 0;
+}
+
+DM_TEST(dm_test_serial, DM_TESTF_SCAN_FDT

[U-Boot] [PATCH v3 0/4] Replace serial setparity by setconfig

[Patrice Chotard]

This series :
  - Replace setparity ops by more complete setconfig in serial uclass
  - Replace setparity by setconfig in STM32 serial driver
  _ Adds test for serial setconfig

Changes in v3:
  - Update SERIAL_PAR_MASK definition
  - Don't remove setparity ops declaration in patch 1 to not
break bissectability
  - Replace u8 by uint for parity/bits/stop in stm32_serial_setconfig()
  - Add patch to remove obsolete setparity ops
  - Update serial test when wrong serial options are specified
  - Add SERIAL_CONFIG(par, bits, stop) macro to create serial mask

Changes in v2:
  - Update SERIAL_BITS_MASK and SERIAL_STOP_MASK
  - Update serial_setconfig prototype
  - Update stm32_serial_setconfig prototype
  - Add sandbox serial test

Patrice Chotard (4):
  dm: serial: Replace setparity by setconfig
  serial: stm32: Replace setparity by setconfig
  dm: serial: Remove setparity ops
  sandbox: Add serial test

 drivers/serial/sandbox.c   | 14 +++
 drivers/serial/serial-uclass.c | 16 +
 drivers/serial/serial_stm32.c  | 21 +++-
 include/common.h   |  1 +
 include/serial.h   | 48 ++---
 test/dm/Makefile   |  1 +
 test/dm/serial.c   | 54 ++
 7 files changed, 146 insertions(+), 9 deletions(-)
 create mode 100644 test/dm/serial.c

-- 
1.9.1

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[U-Boot] [PATCH v3 3/4] dm: serial: Remove setparity ops

[Patrice Chotard]

setparity users has been updated to use new setconfig ops,
so we can safely remove setparity ops

Signed-off-by: Patrice Chotard 
---

Changes in v3:
  - Add patch to remove obsolete setparity ops

Changes in v2: None

 include/serial.h | 10 --
 1 file changed, 10 deletions(-)

diff --git a/include/serial.h b/include/serial.h
index ed9c70af74ed..9ae4b3879085 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -182,16 +182,6 @@ struct dm_serial_ops {
 */
int (*loop)(struct udevice *dev, int on);
 #endif
-   /**
-* setparity() - Set up the parity
-*
-* Set up a new parity for this device.
-*
-* @dev: Device pointer
-* @parity: parity to use
-* @return 0 if OK, -ve on error
-*/
-   int (*setparity)(struct udevice *dev, enum serial_par parity);
 
/**
 * setconfig() - Set up the uart configuration
-- 
1.9.1

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[U-Boot] [PATCH v3 1/4] dm: serial: Replace setparity by setconfig

[Patrice Chotard]

Replace setparity by more generic setconfig ops
to allow uart parity, bits word length and stop bits
number change.

Adds SERIAL_GET_PARITY/BITS/STOP macros.

Signed-off-by: Patrick Delaunay 
Signed-off-by: Patrice Chotard 
---

Changes in v3:
  - Update SERIAL_PAR_MASK definition
  - Don't remove setparity ops declaration in patch 1 to not
break bissectability

Changes in v2:
  - Update SERIAL_BITS_MASK and SERIAL_STOP_MASK
  - Update serial_setconfig prototype

 drivers/serial/serial-uclass.c | 16 ++
 include/serial.h   | 47 ++
 2 files changed, 63 insertions(+)

diff --git a/drivers/serial/serial-uclass.c b/drivers/serial/serial-uclass.c
index 321d23ee93bf..a7556c9b7bc3 100644
--- a/drivers/serial/serial-uclass.c
+++ b/drivers/serial/serial-uclass.c
@@ -287,6 +287,20 @@ void serial_setbrg(void)
ops->setbrg(gd->cur_serial_dev, gd->baudrate);
 }
 
+int serial_setconfig(uint config)
+{
+   struct dm_serial_ops *ops;
+
+   if (!gd->cur_serial_dev)
+   return 0;
+
+   ops = serial_get_ops(gd->cur_serial_dev);
+   if (ops->setconfig)
+   return ops->setconfig(gd->cur_serial_dev, config);
+
+   return 0;
+}
+
 void serial_stdio_init(void)
 {
 }
@@ -398,6 +412,8 @@ static int serial_post_probe(struct udevice *dev)
ops->pending += gd->reloc_off;
if (ops->clear)
ops->clear += gd->reloc_off;
+   if (ops->setconfig)
+   ops->setconfig += gd->reloc_off;
 #if CONFIG_POST & CONFIG_SYS_POST_UART
if (ops->loop)
ops->loop += gd->reloc_off
diff --git a/include/serial.h b/include/serial.h
index b9ef6d91c9c5..ed9c70af74ed 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -73,6 +73,39 @@ enum serial_par {
SERIAL_PAR_EVEN
 };
 
+#define SERIAL_PAR_SHIFT   0
+#define SERIAL_PAR_MASK(0x03 << SERIAL_PAR_SHIFT)
+#define SERIAL_GET_PARITY(config) \
+   ((config & SERIAL_PAR_MASK) >> SERIAL_PAR_SHIFT)
+
+enum serial_bits {
+   SERIAL_5_BITS,
+   SERIAL_6_BITS,
+   SERIAL_7_BITS,
+   SERIAL_8_BITS
+};
+
+#define SERIAL_BITS_SHIFT  2
+#define SERIAL_BITS_MASK   (0x3 << SERIAL_BITS_SHIFT)
+#define SERIAL_GET_BITS(config) \
+   ((config & SERIAL_BITS_MASK) >> SERIAL_BITS_SHIFT)
+
+enum serial_stop {
+   SERIAL_HALF_STOP,   /* 0.5 stop bit */
+   SERIAL_ONE_STOP,/*   1 stop bit */
+   SERIAL_ONE_HALF_STOP,   /* 1.5 stop bit */
+   SERIAL_TWO_STOP /*   2 stop bit */
+};
+
+#define SERIAL_STOP_SHIFT  4
+#define SERIAL_STOP_MASK   (0x3 << SERIAL_STOP_SHIFT)
+#define SERIAL_GET_STOP(config) \
+   ((config & SERIAL_STOP_MASK) >> SERIAL_STOP_SHIFT)
+
+#define SERIAL_DEFAULT_CONFIG  SERIAL_PAR_NONE << SERIAL_PAR_SHIFT | \
+   SERIAL_8_BITS << SERIAL_BITS_SHIFT | \
+   SERIAL_ONE_STOP << SERIAL_STOP_SHIFT
+
 /**
  * struct struct dm_serial_ops - Driver model serial operations
  *
@@ -159,6 +192,20 @@ struct dm_serial_ops {
 * @return 0 if OK, -ve on error
 */
int (*setparity)(struct udevice *dev, enum serial_par parity);
+
+   /**
+* setconfig() - Set up the uart configuration
+* (parity, 5/6/7/8 bits word length, stop bits)
+*
+* Set up a new config for this device.
+*
+* @dev: Device pointer
+* @parity: parity to use
+* @bits: bits number to use
+* @stop: stop bits number to use
+* @return 0 if OK, -ve on error
+*/
+   int (*setconfig)(struct udevice *dev, uint serial_config);
 };
 
 /**
-- 
1.9.1

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Re: [U-Boot] Get number of seconds since beginning of epoch

[Wolfgang Denk]

Hallo Mark,

In message  you wrote:
>
> I am wondering whether U-Boot already has the functionality to
> retrieve the number of seconds since beginning of the 1970-01-01
> epoch. I would like to use this value in a Hush script.

There is no such feature in U-Boot (yet).

> Alternative proposals how to fulfill the requirement within U-Boot are 
> welcome, too. ☺

There is no trivial way, as such information is not stored in typich
RTCs; it has to be computed from the information we have.  The
algorithm could be copied from existing code (GNU or BusyBox date
command for example) and added as an (optional, i. e. configurable)
extension to the U-Boot date command.

Note that such an extension would have to store the result in an
environment variable, as we don't have command substituation or
such in U-Boot's shells.

You know where you can ask for help :-)

Best regards,

Wolfgang Denk

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A failure will not appear until a unit has passed final inspection.
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Re: [U-Boot] [PATCH v1 1/5] dm: gpio: Add get_function_number ops

[Patrice CHOTARD]

Hi Simon

On 08/02/2018 06:56 PM, Simon Glass wrote:
> Hi Patrice,
> 
> On 1 August 2018 at 10:38, Patrice Chotard  wrote:
>> From: Patrick Delaunay 
>>
>> When a pin is not configured as a GPIO, it could
>> have several alternate function.
>>
>> To be able to identify the alternate function,
>> add ops get_function_number() to request the pin
>> function index from the driver when pin is not used
>> as gpio.
>>
>> Signed-off-by: Patrick Delaunay 
>> Signed-off-by: Patrice Chotard 
>> ---
>>
>>   drivers/gpio/gpio-uclass.c |  6 ++
>>   include/asm-generic/gpio.h | 11 +++
>>   2 files changed, 17 insertions(+)
>>
>> diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
>> index da5e9ba6e524..fa249f7b12d4 100644
>> --- a/drivers/gpio/gpio-uclass.c
>> +++ b/drivers/gpio/gpio-uclass.c
>> @@ -568,6 +568,12 @@ int gpio_get_status(struct udevice *dev, int offset, 
>> char *buf, int buffsize)
>>   label ? label : "");
>>  }
>>
>> +   if (func == GPIOF_FUNC && ops->get_function_number) {
>> +   ret = ops->get_function_number(dev, offset);
>> +   if (ret >= 0)
>> +   snprintf(str + len, buffsize - len, ": %d", ret);
>> +   }
>> +
>>  return 0;
>>   }
>>
>> diff --git a/include/asm-generic/gpio.h b/include/asm-generic/gpio.h
>> index d03602696f6d..f8cd6ddccbbf 100644
>> --- a/include/asm-generic/gpio.h
>> +++ b/include/asm-generic/gpio.h
>> @@ -266,6 +266,17 @@ struct dm_gpio_ops {
>>  int (*get_function)(struct udevice *dev, unsigned offset);
>>
>>  /**
>> +* get_function_number() Get the function number
>> +*
>> +* get index for GPIOF_FUNC, when pin is not used as a GPIO
>> +*
>> +* @dev: Device to check
>> +* @offset:  GPIO offset within that device
>> +* @return current function index
>> +*/
>> +   int (*get_function_number)(struct udevice *dev, unsigned int offset);
> 
> Can you please add comments as to how this is different from
> get_function(), Also, I suggest a different name, since it would be
> confusing for people to have such similar names for different things,

Ok, i will rename get_function_number() to get_alternate_function()
and add a comments

Thanks

Patrice

> 
>> +
>> +   /**
>>   * xlate() - Translate phandle arguments into a GPIO description
>>   *
>>   * This function should set up the fields in desc according to the
>> --
>> 1.9.1
>>
> Regards,
> Simon
> 
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Re: [U-Boot] [PATCH] arm: armv7-a: Enable mtune when CONFIG_CPU_V7A

[Tom Rini]

On Fri, Aug 03, 2018 at 05:23:21AM -0500, Adam Ford wrote:

> arch/arm/Makefile has a list of options for mtune, but the
> entry for CONFIG_CPU_V7A is empty.  By tuning for generic-armv7-a
> both the size of SPL and u-boot shrink a little.  For those
> with limited resources in SPL, every little bit helps.
> 
> The following size changed apply to omap3_logic
> 
> Original:
>text  data bss dec hex filename
>  541198 22692  327040  890930   d9832 u-boot
> 
>text  data bss dec hex filename
>   50964   429   67580  118973   1d0bd spl/u-boot-spl
> 
> With -mtune=generic-armv7-a
>text  data bss dec hex filename
>  540934 22692  327056  890682   d973a u-boot
> 
>text  data bss dec hex filename
>   50972   429   67580  118981   1d0c5 spl/u-boot-spl
> 
> Signed-off-by: Adam Ford 
> 
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index cac58bdc4d..b9f0903f9b 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -40,7 +40,7 @@ tune-$(CONFIG_CPU_SA1100)   =-mtune=strongarm1100
>  tune-$(CONFIG_CPU_PXA)   =-mcpu=xscale
>  tune-$(CONFIG_CPU_ARM1136)   =
>  tune-$(CONFIG_CPU_ARM1176)   =
> -tune-$(CONFIG_CPU_V7A)   =
> +tune-$(CONFIG_CPU_V7A)   =-mtune=generic-armv7-a
>  tune-$(CONFIG_CPU_V7R)   =
>  tune-$(CONFIG_ARM64) =

I think we might need to use cc-option here.  We have that around the
arch portion due to llvm using 'armv7' not 'armv7-a'.

-- 
Tom


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Re: [U-Boot] Questions about loading U-Boot from ATF

[Tom Rini]

On Thu, Aug 02, 2018 at 09:07:15PM +, York Sun wrote:

> Tom,
> 
> Can you help me (or point me to the proper persons) to understand the
> long term flow of booting ARMv8 U-Boot with ATF? We are trying to make
> changes. As you may know, we have been booting U-Boot for NXP ARMv8
> platforms from EL3 and drop to EL2 with an in-house ATF-compatible
> monitor. I have seen some boards in U-Boot using SPL to load ATF. I want
> to see a flow of booting ATF first, then load U-Boot as BL33 image. Has
> any board done that?

With a quick grep around, I think at least the amlogic and hisilicon
platforms do this.

-- 
Tom


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[U-Boot] [PATCH] MAINTAINERS: Add more sources to Arch Snapdragon

[Ramon Fried]

Add scattered driver files around the source tree
that belongs to Snapdragon arch. Not sure why they
were not included in the first place.

Signed-off-by: Ramon Fried 
---
 MAINTAINERS | 4 
 1 file changed, 4 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 1bd583c975..0434dbd920 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -207,7 +207,11 @@ ARM SNAPDRAGON
 M: Ramon Fried 
 S: Maintained
 F: arch/arm/mach-snapdragon/
+F: drivers/gpio/msm_gpio.c
+F: drivers/mmc/msm_sdhci.c
+F: drivers/serial/serial_msm.c
 F: drivers/smem/msm_smem.c
+F: drivers/usb/host/ehci-msm.c
 
 ARM STI
 M: Patrice Chotard 
-- 
2.18.0

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