Re: [U-Boot] [PATCH 0/2] Disable hybrid mode for SPANSION S25FS-S family

2017-10-30 Thread Jagan Teki
On Mon, Oct 30, 2017 at 11:52 AM, Jagan Teki  wrote:
> On Mon, Oct 16, 2017 at 12:54 PM, Rajat Srivastava
>  wrote:
>> The S25FS-S family physical sectors may be configured as a hybrid
>> combination of eight 4-kB parameter sectors at the top or bottom
>> of the address space with all but one of the remaining sectors
>> being uniform size. The default status of the flash is the hybrid
>> architecture.
>>
>> Since the parameter sectors and the uniform sectors have different
>> erase commands, it is a problem to implement erase functionality for
>> hybrid mode in current U-boot code. Also, enabling hybrid mode doesn't
>> provide any significant benefit.
>
> I think I've asked this question before, keeping the state of the
> flash remains same. Can't erase parameter and uniform sectors
> individually during operations like
> - parameter sectors with erase commands (20h or 21h)
> - uniform sectors with erase commands (D8h or DCh)

I understand that even we can do parameter and uniform sectors
individually with the help of offsets we still have 224. Any idea why
we need hybrid mode with this off 244 sector size? if require we can
even write cypress on this case.

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Re: [U-Boot] [PATCH] configs: vf610: increase maximum size and enforce correct limit

2017-10-30 Thread Stefan Agner
Hi Tom, Stefano,

Any chance to get this still into 2017.11? It allows to use 2017.11 on
my board...

--
Stefan

On 2017-10-17 13:59, Stefan Agner wrote:
> From: Stefan Agner 
> 
> On Vybrid SoCs U-Boot gets loaded into GFX SRAM which is 512KiB.
> Currently 32KiB is reserved for the IMX header. However, this is
> not reflected in the size limit. In v2017.11-rc2 the actual size
> limit (512KiB-32KiB) has been reached for Colibri VF61, which
> lead to a successful build of U-Boot but not a working binary.
> 
> The IMX header is much smaller than 32KiB, typically around 1KiB.
> Decrease the reserved size to 4KiB and specify the correct U-Boot
> size limit. Apply this new base address and limit for all Vybrid
> based boards.
> 
> Signed-off-by: Stefan Agner 
> ---
> 
>  include/configs/colibri_vf.h | 4 ++--
>  include/configs/pcm052.h | 4 ++--
>  include/configs/vf610twr.h   | 4 ++--
>  3 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
> index 8166aa4afb..bf3bbffe24 100644
> --- a/include/configs/colibri_vf.h
> +++ b/include/configs/colibri_vf.h
> @@ -75,8 +75,8 @@
>  #define CONFIG_FDTADDR   0x8400
>  
>  /* We boot from the gfxRAM area of the OCRAM. */
> -#define CONFIG_SYS_TEXT_BASE 0x3f408000
> -#define CONFIG_BOARD_SIZE_LIMIT  524288
> +#define CONFIG_SYS_TEXT_BASE 0x3f401000
> +#define CONFIG_BOARD_SIZE_LIMIT  520192
>  
>  #define SD_BOOTCMD \
>   "sdargs=root=/dev/mmcblk0p2 rw rootwait\0"  \
> diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
> index 8144a83db2..060928bd30 100644
> --- a/include/configs/pcm052.h
> +++ b/include/configs/pcm052.h
> @@ -89,8 +89,8 @@
>  #define CONFIG_LOADADDR  0x8200
>  
>  /* We boot from the gfxRAM area of the OCRAM. */
> -#define CONFIG_SYS_TEXT_BASE 0x3f408000
> -#define CONFIG_BOARD_SIZE_LIMIT  524288
> +#define CONFIG_SYS_TEXT_BASE 0x3f401000
> +#define CONFIG_BOARD_SIZE_LIMIT  520192
>  
>  /* if no target-specific extra environment settings were defined by the
> target, define an empty one */
> diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
> index 3430f27c40..ddfcd6f618 100644
> --- a/include/configs/vf610twr.h
> +++ b/include/configs/vf610twr.h
> @@ -79,8 +79,8 @@
>  #define CONFIG_SYS_LOAD_ADDR 0x8200
>  
>  /* We boot from the gfxRAM area of the OCRAM. */
> -#define CONFIG_SYS_TEXT_BASE 0x3f408000
> -#define CONFIG_BOARD_SIZE_LIMIT  524288
> +#define CONFIG_SYS_TEXT_BASE 0x3f401000
> +#define CONFIG_BOARD_SIZE_LIMIT  520192
>  
>  /*
>   * We do have 128MB of memory on the Vybrid Tower board. Leave the last
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Re: [U-Boot] [PATCH] ARM: dts: exynos: fix property values of LDO15/17 for ODROID-XU3/4

2017-10-30 Thread Lukasz Majewski
Hi Dongjin,

> Looking at the schematic, LDO15 and LDO17 are tied as a power source
> of a builtin network chipset. The voltage on LDO15 is corrected to
> 3.3V and the name of LDO17 is corrected to "vdd_ldo17".
> 
> Signed-off-by: Dongjin Kim 
> ---
>  arch/arm/dts/exynos5422-odroidxu3.dts | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm/dts/exynos5422-odroidxu3.dts
> b/arch/arm/dts/exynos5422-odroidxu3.dts index b6f4333227..b48ca3b121
> 100644 --- a/arch/arm/dts/exynos5422-odroidxu3.dts
> +++ b/arch/arm/dts/exynos5422-odroidxu3.dts
> @@ -124,8 +124,8 @@
>  
>   ldo15_reg: LDO15 {
>   regulator-name = "vdd_ldo15";
> - regulator-min-microvolt =
> <310>;
> - regulator-max-microvolt =
> <310>;
> + regulator-min-microvolt =
> <330>;
> + regulator-max-microvolt =
> <330>; regulator-always-on;
>   };
>  
> @@ -137,7 +137,7 @@
>   };
>  
>   ldo17_reg: LDO17 {
> - regulator-name = "tsp_avdd";
> + regulator-name = "vdd_ldo17";
>   regulator-min-microvolt =
> <330>; regulator-max-microvolt = <330>;
>   regulator-always-on;

Reviewed-by: Lukasz Majewski 

Best regards,

Lukasz Majewski

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[U-Boot] [PATCH v3 1/2] i.MX6: engicam: Fix MAINTAINERS/README

2017-10-30 Thread Jagan Teki
- Update newly added include/configs file in MAINTAINERS
- Update newly added defconfig file in README

Signed-off-by: Jagan Teki 
---
Changes for v3:
- none

 board/engicam/geam6ul/MAINTAINERS | 2 +-
 board/engicam/icorem6/MAINTAINERS | 2 +-
 board/engicam/icorem6/README  | 7 ++-
 board/engicam/icorem6_rqs/MAINTAINERS | 2 +-
 board/engicam/icorem6_rqs/README  | 7 ++-
 board/engicam/isiotmx6ul/MAINTAINERS  | 2 +-
 6 files changed, 8 insertions(+), 14 deletions(-)

diff --git a/board/engicam/geam6ul/MAINTAINERS 
b/board/engicam/geam6ul/MAINTAINERS
index 1c31375..2b882d2 100644
--- a/board/engicam/geam6ul/MAINTAINERS
+++ b/board/engicam/geam6ul/MAINTAINERS
@@ -2,7 +2,7 @@ GEAM6UL BOARD
 M: Jagan Teki 
 S: Maintained
 F: board/engicam/geam6ul
-F: include/configs/imx6ul_geam.h
+F: include/configs/imx6-engicam.h
 F: configs/imx6ul_geam_mmc_defconfig
 F: configs/imx6ul_geam_nand_defconfig
 F: arch/arm/dts/imx6ul-geam-kit.dts
diff --git a/board/engicam/icorem6/MAINTAINERS 
b/board/engicam/icorem6/MAINTAINERS
index 26b4b56..a348bdd 100644
--- a/board/engicam/icorem6/MAINTAINERS
+++ b/board/engicam/icorem6/MAINTAINERS
@@ -2,7 +2,7 @@ ICOREM6QDL BOARD
 M: Jagan Teki 
 S: Maintained
 F: board/engicam/icorem6
-F: include/configs/imx6qdl_icore.h
+F: include/configs/imx6-engicam.h
 F: configs/imx6qdl_icore_mmc_defconfig
 F: configs/imx6qdl_icore_nand_defconfig
 F: arch/arm/dts/imx6qdl-icore.dtsi
diff --git a/board/engicam/icorem6/README b/board/engicam/icorem6/README
index 6461c0a..3779e96 100644
--- a/board/engicam/icorem6/README
+++ b/board/engicam/icorem6/README
@@ -3,11 +3,8 @@ How to use U-Boot on Engicam i.CoreM6 Solo/DualLite and 
Quad/Dual Starter Kit:
 
 $ make mrproper
 
-- Configure U-Boot for Engicam i.CoreM6 Quad/Dual:
-$ make imx6q_icore_mmc_defconfig
-
-- Configure U-Boot for Engicam i.CoreM6 Solo/DualLite:
-$ make imx6dl_icore_mmc_defconfig
+- Configure U-Boot for Engicam i.CoreM6 Quad/Dual/Solo/DualLite:
+$ make imx6qdl_icore_mmc_defconfig
 
 - Build U-Boot
 $ make
diff --git a/board/engicam/icorem6_rqs/MAINTAINERS 
b/board/engicam/icorem6_rqs/MAINTAINERS
index 6205acb..9a74265 100644
--- a/board/engicam/icorem6_rqs/MAINTAINERS
+++ b/board/engicam/icorem6_rqs/MAINTAINERS
@@ -2,7 +2,7 @@ ICOREM6QDL_RQS BOARD
 M: Jagan Teki 
 S: Maintained
 F: board/engicam/icorem6_rqs
-F: include/configs/imx6qdl_icore_rqs.h
+F: include/configs/imx6-engicam.h
 F: configs/imx6qdl_icore_rqs_defconfig
 F: arch/arm/dts/imx6qdl-icore-rqs.dtsi
 F: arch/arm/dts/imx6q-icore-rqs.dts
diff --git a/board/engicam/icorem6_rqs/README b/board/engicam/icorem6_rqs/README
index ccce622..97e978c 100644
--- a/board/engicam/icorem6_rqs/README
+++ b/board/engicam/icorem6_rqs/README
@@ -3,11 +3,8 @@ How to use U-Boot on Engicam i.CoreM6 RQS Solo/DualLite and 
Quad/Dual Starter Ki
 
 $ make mrproper
 
-- Configure U-Boot for Engicam i.CoreM6 RQS Quad/Dual:
-$ make imx6q_icore_rqs_mmc_defconfig
-
-- Configure U-Boot for Engicam i.CoreM6 RQS Solo/DualLite:
-$ make imx6dl_icore_rqs_mmc_defconfig
+- Configure U-Boot for Engicam i.CoreM6 RQS Quad/Dual/Solo/DualLite:
+$ make imx6qdl_icore_rqs_defconfig
 
 - Build U-Boot
 $ make
diff --git a/board/engicam/isiotmx6ul/MAINTAINERS 
b/board/engicam/isiotmx6ul/MAINTAINERS
index c30cfe7..9b66c8d 100644
--- a/board/engicam/isiotmx6ul/MAINTAINERS
+++ b/board/engicam/isiotmx6ul/MAINTAINERS
@@ -2,7 +2,7 @@ ISIOTMX6UL BOARD
 M: Jagan Teki 
 S: Maintained
 F: board/engicam/isiotmx6ul
-F: include/configs/imx6ul_isiot.h
+F: include/configs/imx6-engicam.h
 F: configs/imx6ul_isiot_mmc_defconfig
 F: configs/imx6ul_isiot_emmc_defconfig
 F: configs/imx6ul_isiot_nand_defconfig
-- 
2.7.4

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[U-Boot] [PATCH v3 2/2] imx6ul: geam6ul/isiot: Fix to MMC devices

2017-10-30 Thread Jagan Teki
U-Boot proper is using DM_MMC so, enable CONFIG_BLK otherwise
find_mmc_device failed to detect MMC device.

Signed-off-by: Jagan Teki 
---
Changes for v3:
- none

 configs/imx6ul_geam_mmc_defconfig   | 1 -
 configs/imx6ul_isiot_emmc_defconfig | 1 -
 configs/imx6ul_isiot_mmc_defconfig  | 1 -
 3 files changed, 3 deletions(-)

diff --git a/configs/imx6ul_geam_mmc_defconfig 
b/configs/imx6ul_geam_mmc_defconfig
index 7c79873..ce7c288 100644
--- a/configs/imx6ul_geam_mmc_defconfig
+++ b/configs/imx6ul_geam_mmc_defconfig
@@ -32,7 +32,6 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_MMC=y
-# CONFIG_BLK is not set
 CONFIG_SYS_I2C_MXC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_SMSC=y
diff --git a/configs/imx6ul_isiot_emmc_defconfig 
b/configs/imx6ul_isiot_emmc_defconfig
index 67fa9a0..94af53e 100644
--- a/configs/imx6ul_isiot_emmc_defconfig
+++ b/configs/imx6ul_isiot_emmc_defconfig
@@ -31,7 +31,6 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_MMC=y
-# CONFIG_BLK is not set
 CONFIG_PHYLIB=y
 CONFIG_PHY_SMSC=y
 CONFIG_FEC_MXC=y
diff --git a/configs/imx6ul_isiot_mmc_defconfig 
b/configs/imx6ul_isiot_mmc_defconfig
index c673d93..0a990d7 100644
--- a/configs/imx6ul_isiot_mmc_defconfig
+++ b/configs/imx6ul_isiot_mmc_defconfig
@@ -32,7 +32,6 @@ CONFIG_CMD_EXT4_WRITE=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 CONFIG_ENV_IS_IN_MMC=y
-# CONFIG_BLK is not set
 CONFIG_SYS_I2C_MXC=y
 CONFIG_PHYLIB=y
 CONFIG_PHY_SMSC=y
-- 
2.7.4

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Re: [U-Boot] [PATCH v3 2/2] imx6ul: geam6ul/isiot: Fix to MMC devices

2017-10-30 Thread Fabio Estevam
Hi Jagan,

On Mon, Oct 30, 2017 at 7:57 AM, Jagan Teki  wrote:
> U-Boot proper is using DM_MMC so, enable CONFIG_BLK otherwise
> find_mmc_device failed to detect MMC device.
>
> Signed-off-by: Jagan Teki 

I have already sent a patch that fixes this issue for all mx6 boards.

Regards,

Fabio Estevam
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Re: [U-Boot] [PATCH v3] imx: Fix regression with CONFIG_DM_MMC=y

2017-10-30 Thread Fabio Estevam
Hi Stefano and Tom,

On Fri, Oct 20, 2017 at 12:17 PM, Fabio Estevam  wrote:
> When CONFIG_DM_MMC=y, CONFIG_BLK should be selected, otherwise the
> SD/eMMC card cannot be used.
>
> Also, select CONFIG_DM_USB=y when CONFIG_USB=y to avoid build failure.
>
> Tested on mx6slevk, mx7dsabresd and mx6ullevk.
>
> Signed-off-by: Fabio Estevam 
> Reviewed-by: Jaehoon Chung 
> Tested-by: Adam Ford 
> Tested-by: Sébastien Szymanski 

Could you please apply this one for 2017.11? It fixes esdhc issue on
multiple boards.

Thanks
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Re: [U-Boot] [PATCH v3] imx: Fix regression with CONFIG_DM_MMC=y

2017-10-30 Thread Jagan Teki
On Fri, Oct 20, 2017 at 7:47 PM, Fabio Estevam  wrote:
> When CONFIG_DM_MMC=y, CONFIG_BLK should be selected, otherwise the
> SD/eMMC card cannot be used.
>
> Also, select CONFIG_DM_USB=y when CONFIG_USB=y to avoid build failure.
>
> Tested on mx6slevk, mx7dsabresd and mx6ullevk.
>
> Signed-off-by: Fabio Estevam 
> Reviewed-by: Jaehoon Chung 
> Tested-by: Adam Ford 
> Tested-by: Sébastien Szymanski 

Tested on i.MX6UL boards - geam6ul and Is.IoT

Tested-by: Jagan Teki 
Reviewed-by: Jagan Teki 

thanks!
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Re: [U-Boot] [PATCH v3 2/2] imx6ul: geam6ul/isiot: Fix to MMC devices

2017-10-30 Thread Jagan Teki
On Mon, Oct 30, 2017 at 3:41 PM, Fabio Estevam  wrote:
> Hi Jagan,
>
> On Mon, Oct 30, 2017 at 7:57 AM, Jagan Teki  wrote:
>> U-Boot proper is using DM_MMC so, enable CONFIG_BLK otherwise
>> find_mmc_device failed to detect MMC device.
>>
>> Signed-off-by: Jagan Teki 
>
> I have already sent a patch that fixes this issue for all mx6 boards.

Ohh, I missed it.. marked r-b and t-b tags just now.

thanks!
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[U-Boot] [Patch V4 1/2] armv8: ls1088ardb: Add SD boot support for ls1088

2017-10-30 Thread Ashish Kumar
Signed-off-by: Prabhakar Kushwaha 
Signed-off-by: Ashish Kumar 
Signed-off-by: Raghav Dogra 
---

v4:
Add Documentation for SD boot
Rebase to top

 arch/arm/Kconfig   |  1 +
 arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3 | 43 ++
 board/freescale/ls1088a/MAINTAINERS|  1 +
 board/freescale/ls1088a/ddr.c  |  5 ++-
 configs/ls1088ardb_sdcard_qspi_defconfig   | 33 +
 include/configs/ls1088a_common.h   | 35 ++
 include/configs/ls1088ardb.h   | 31 +++-
 7 files changed, 146 insertions(+), 3 deletions(-)
 create mode 100644 configs/ls1088ardb_sdcard_qspi_defconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 83b7aa5..5707111 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -938,6 +938,7 @@ config TARGET_LS1088ARDB
select ARMV8_MULTIENTRY
select ARCH_MISC_INIT
select BOARD_LATE_INIT
+   select SUPPORT_SPL
help
  Support for NXP LS1088ARDB platform.
  The LS1088A Reference design board (RDB) is a high-performance
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3 
b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3
index 7867c37..5f10415 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3
+++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3
@@ -201,6 +201,49 @@ nand write  8 
 Notice the difference from QDS is SRC, SRC_ADDR and the offset of u-boot image
 to match board NAND device with 4KB/page, block size 512KB.
 
+Booting from SD/eMMC
+---
+Booting from SD/eMMC requires two images, RCW and u-boot-with-spl.bin.
+The difference between SD boot RCW image and QSPI-NOR boot image is the PBI
+command sequence. Below is one example for PBI commands for RDB and QDS which 
uses
+SD device with sector size 512.
+
+1) Block Copy: SRC=0x0040, SRC_ADDR=0x0010, DEST_ADDR=0x1800a000,
+BLOCK_SIZE=0x00016000
+
+This command copies u-boot image from SD device into OCRAM. The values need
+to adjust accordingly for SD/eMMC
+
+SRCshould match the cfg_rcw_src, the reset config pins. It depends
+   on the device will be SD(0x0040) or eMMC(0x0041).
+SRC_ADDR   is the offset of u-boot-with-spl.bin image in SD device. In
+   the example above, 1MB. This is same as QSPI-NOR.
+DEST_ADDR  is fixed at 0x1800a000, matching bootloc set above.
+BLOCK_SIZE is the size to be copied by PBI.
+
+2) CCSR 4-byte write to 0x01e00404, data=0x
+3) CCSR 4-byte write to 0x01e00400, data=0x1800a000
+The above two commands set bootloc register to 0x_1800a000 where
+the u-boot code will be running in OCRAM.
+
+
+RCW image should be written at 8th sector of device(SD/eMMC). Example of using
+u-boot command
+
+mc erase 0x8 0x10
+mmc write  0x8 
+
+To form the SD-Boot image, build u-boot with SD config, for example,
+ls1088ardb_sdcard_qspi_defconfig. The image needed is u-boot-with-spl.bin.
+The u-boot image should be written to match SRC_ADDR, in above example  offset 
0x10
+in other work it means sector location 0x800
+
+mmc erase 0x800 0x1800
+mmc write  0x800 
+
+With these two images in SD/eMMC device, the board can boot from SD/eMMC.
+
+
 MMU Translation Tables
 ==
 
diff --git a/board/freescale/ls1088a/MAINTAINERS 
b/board/freescale/ls1088a/MAINTAINERS
index e1e6d4b..68f23d6 100644
--- a/board/freescale/ls1088a/MAINTAINERS
+++ b/board/freescale/ls1088a/MAINTAINERS
@@ -5,6 +5,7 @@ S:  Maintained
 F: board/freescale/ls1088a/
 F: include/configs/ls1088ardb.h
 F: configs/ls1088ardb_qspi_defconfig
+F: configs/ls1088ardb_sdcard_qspi_defconfig
 
 LS1088AQDS BOARD
 M: Prabhakar Kushwaha 
diff --git a/board/freescale/ls1088a/ddr.c b/board/freescale/ls1088a/ddr.c
index 0ecfd65..e24bfd5 100644
--- a/board/freescale/ls1088a/ddr.c
+++ b/board/freescale/ls1088a/ddr.c
@@ -96,7 +96,10 @@ int fsl_initdram(void)
 {
puts("Initializing DDRusing SPD\n");
 
+#if defined(CONFIG_SPL) && !defined(CONFIG_SPL_BUILD)
+   gd->ram_size = fsl_ddr_sdram_size();
+#else
gd->ram_size = fsl_ddr_sdram();
-
+#endif
return 0;
 }
diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig 
b/configs/ls1088ardb_sdcard_qspi_defconfig
new file mode 100644
index 000..c226bc1
--- /dev/null
+++ b/configs/ls1088ardb_sdcard_qspi_defconfig
@@ -0,0 +1,33 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1088ARDB=y
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI"
+CONFIG_SD_BOOT=y
+CONFIG_SPL=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SPI_FL

[U-Boot] [Patch V4 2/2] armv8: ls1088aqds: Add SD boot support for ls1088qds

2017-10-30 Thread Ashish Kumar
Signed-off-by: Ashish Kumar 
Signed-off-by: Prabhakar Kushwaha 
Signed-off-by: Raghav Dogra 
---

v2: rebase to top

 arch/arm/Kconfig |  1 +
 board/freescale/ls1088a/MAINTAINERS  |  1 +
 configs/ls1088aqds_sdcard_qspi_defconfig | 33 
 include/configs/ls1088aqds.h | 33 +---
 4 files changed, 65 insertions(+), 3 deletions(-)
 create mode 100644 configs/ls1088aqds_sdcard_qspi_defconfig

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5707111..25514ed 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -824,6 +824,7 @@ config TARGET_LS1088AQDS
select ARMV8_MULTIENTRY
select ARCH_MISC_INIT
select BOARD_LATE_INIT
+   select SUPPORT_SPL
help
  Support for NXP LS1088AQDS platform
  The LS1088A Development System (QDS) is a high-performance
diff --git a/board/freescale/ls1088a/MAINTAINERS 
b/board/freescale/ls1088a/MAINTAINERS
index 68f23d6..b3d5c38 100644
--- a/board/freescale/ls1088a/MAINTAINERS
+++ b/board/freescale/ls1088a/MAINTAINERS
@@ -14,3 +14,4 @@ S:Maintained
 F: board/freescale/ls1088a/
 F: include/configs/ls1088aqds.h
 F: configs/ls1088aqds_qspi_defconfig
+F: configs/ls1088aqds_sdcard_qspi_defconfig
diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig 
b/configs/ls1088aqds_sdcard_qspi_defconfig
new file mode 100644
index 000..95d8627
--- /dev/null
+++ b/configs/ls1088aqds_sdcard_qspi_defconfig
@@ -0,0 +1,33 @@
+CONFIG_ARM=y
+CONFIG_TARGET_LS1088AQDS=y
+# CONFIG_SYS_MALLOC_F is not set
+CONFIG_DM_SPI=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
+CONFIG_SYS_EXTRA_OPTIONS="SD_BOOT_QSPI"
+CONFIG_SD_BOOT=y
+CONFIG_SPL=y
+CONFIG_HUSH_PARSER=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_SF=y
+CONFIG_CMD_I2C=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_DHCP=y
+CONFIG_CMD_PING=y
+CONFIG_OF_CONTROL=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_DM=y
+CONFIG_SPI_FLASH=y
+CONFIG_NETDEVICES=y
+CONFIG_E1000=y
+CONFIG_SYS_NS16550=y
+CONFIG_FSL_DSPI=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0
+CONFIG_FSL_LS_PPA=y
+CONFIG_SPL_BUILD=y
+CONFIG_PARTITIONS=y
+# CONFIG_DISPLAY_BOARDINFO is not set
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 31efb82..de23d3a 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -23,6 +23,11 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_SIZE0x2000  /* 8KB */
 #define CONFIG_ENV_OFFSET  0x30/* 3MB */
 #define CONFIG_ENV_SECT_SIZE   0x4
+#elif defined(CONFIG_SD_BOOT)
+#define CONFIG_ENV_OFFSET  (3 * 1024 * 1024)
+#define CONFIG_ENV_IS_IN_MMC
+#define CONFIG_SYS_MMC_ENV_DEV 0
+#define CONFIG_ENV_SIZE0x2000
 #else
 #define CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_ADDR(CONFIG_SYS_FLASH_BASE + 
0x30)
@@ -30,10 +35,11 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_ENV_SIZE0x2
 #endif
 
-#if defined(CONFIG_QSPI_BOOT)
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_QIXIS_I2C_ACCESS
 #define SYS_NO_FLASH
 
+#undef CONFIG_CMD_IMLS
 #define CONFIG_SYS_CLK_FREQ1
 #define CONFIG_DDR_CLK_FREQ1
 #else
@@ -190,7 +196,7 @@ unsigned long get_board_ddr_clk(void);
| CSPR_V)
 
 #define CONFIG_SYS_FPGA_AMASK  IFC_AMASK(64*1024)
-#if defined(CONFIG_QSPI_BOOT)
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_SYS_FPGA_CSOR   CSOR_GPCM_ADM_SHIFT(0)
 #else
 #define CONFIG_SYS_FPGA_CSOR   CSOR_GPCM_ADM_SHIFT(12)
@@ -293,7 +299,7 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
 
 /* QSPI device */
-#if defined(CONFIG_QSPI_BOOT)
+#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_FSL_QSPI
 #define FSL_QSPI_FLASH_SIZE(1 << 26)
 #define FSL_QSPI_FLASH_NUM 2
@@ -315,7 +321,11 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_SYS_MEMTEST_START   0x8000
 #define CONFIG_SYS_MEMTEST_END 0x9fff
 
+#ifdef CONFIG_SPL_BUILD
+#define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE
+#else
 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
+#endif
 
 #define CONFIG_FSL_MEMAC
 
@@ -343,6 +353,23 @@ unsigned long get_board_ddr_clk(void);
"sf read 0x8010 0xE0 0x10;" \
"fsl_mc start mc 0x8000 0x8010\0"   \
"mcmemsize=0x7000 \0"
+#elif defined(CONFIG_SD_BOOT)
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS   \
+   "hwconfig=fsl_ddr:bank_intlv=auto\0"\
+   "loadaddr=0x9010\0" \
+   "kern

Re: [U-Boot] [PATCH v2] net: phy: marvell: Add functions to read PHY's extended registers

2017-10-30 Thread Lukasz Majewski
Hi York,

> On 10/27/2017 08:23 AM, Lukasz Majewski wrote:
> > On Fri, 27 Oct 2017 15:06:37 +
> > York Sun  wrote:
> >   
> >> On 10/27/2017 02:12 AM, Lukasz Majewski wrote:  
> >>> This commit allows extended Marvell registers to be read with:
> >>>
> >>> foo > mdio rx FEC 3.10
> >>> Reading from bus FEC
> >>> PHY at address 0:
> >>> 3.16 - 0x1063
> >>> foo > mdio wx FEC 3.10 0x1011
> >>>
> >>> The above code changes the way ETH connector LEDs blink.
> >>>
> >>> Signed-off-by: Lukasz Majewski 
> >>>
> >>> ---
> >>>
> >>> Changes in v2:
> >>> - Provide the readext and writeext callbacks to other marvell ETH
> >>> PHY devices
> >>>
> >>>  drivers/net/phy/marvell.c | 47
> >>> +++ 1 file changed, 47
> >>> insertions(+)
> >>>
> >>> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
> >>> index b7f300e..19f451d 100644
> >>> --- a/drivers/net/phy/marvell.c
> >>> +++ b/drivers/net/phy/marvell.c
> >>> @@ -104,6 +104,31 @@
> >>>  #define MIIM_88E151x_MODE_SGMII  1
> >>>  #define MIIM_88E151x_RESET_OFFS  15
> >>>  
> >>> +static int m88e1xxx_phy_extread(struct phy_device *phydev, int
> >>> addr,
> >>> + int devaddr, int regnum)
> >>> +{
> >>> + int oldpage = phy_read(phydev, MDIO_DEVAD_NONE,
> >>> MII_MARVELL_PHY_PAGE);
> >>> + int val;
> >>> +
> >>> + phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE,
> >>> devaddr);  
> 
> For register 30 and 31, the page register is 29, not 22.

Yes, for 88E1145 and 88E1149 the page register is 29, not 22 (as it is
in majority of devices from marvell.c file in u-boot).

It seems like the most practical approach would be as presented in
patch v1 - just enable this code on PHY which I can test.

If you find other devices (boards) and test the code, then we can add
it as well.
 
> >>> + val = phy_read(phydev, MDIO_DEVAD_NONE, regnum);
> >>> + phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE,
> >>> oldpage); +
> >>> + return val;
> >>> +}
> >>> +
> >>> +static int m88e1xxx_phy_extwrite(struct phy_device *phydev, int
> >>> addr,
> >>> +  int devaddr, int regnum, u16
> >>> val) +{
> >>> + int oldpage = phy_read(phydev, MDIO_DEVAD_NONE,
> >>> MII_MARVELL_PHY_PAGE); +
> >>> + phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE,
> >>> devaddr);
> >>> + phy_write(phydev, MDIO_DEVAD_NONE, regnum, val);
> >>> + phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE,
> >>> oldpage); +
> >>> + return 0;
> >>> +}
> >>> +
> >>>  /* Marvell 88E1011S */
> >>>  static int m88e1011s_config(struct phy_device *phydev)
> >>>  {
> >>> @@ -599,6 +624,8 @@ static struct phy_driver M88E1011S_driver = {
> >>>   .config = &m88e1011s_config,
> >>>   .startup = &m88e1011s_startup,
> >>>   .shutdown = &genphy_shutdown,
> >>> + .readext = &m88e1xxx_phy_extread,
> >>> + .writeext = &m88e1xxx_phy_extwrite,
> >>>  };
> >>>
> >>
> >> Lukasz,
> >>
> >> This seems wrong. 88E1011S doesn't have the page register.  
> > 
> > Ok. I will remove this one from v3.
> >   
> >> I can only
> >> confirm 88E and 88E1145 have pages.   
> > 
> > I do know that it works on 88E151x
> > 
> > The 88E1318 and 88E1618 seems to be unknown.
> >   
> >> I don't have other part's
> >> datasheet to check.  
> >   
> 
> I suggest only to enable the parts you can confirm on hardware,
> datasheet, or from the source code (where the page register is used).
> 
> York



Best regards,

Lukasz Majewski

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[U-Boot] [PATCH] video: sunxi: de2: add support for LCD SimpleFB

2017-10-30 Thread Icenowy Zheng
Add support for setting up SimpleFB for LCD display output in DE2
SimpleFB setup code.

Signed-off-by: Icenowy Zheng 
---
 drivers/video/sunxi/sunxi_de2.c | 25 ++---
 1 file changed, 18 insertions(+), 7 deletions(-)

diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
index e8903400ec..a41944e645 100644
--- a/drivers/video/sunxi/sunxi_de2.c
+++ b/drivers/video/sunxi/sunxi_de2.c
@@ -319,7 +319,7 @@ U_BOOT_DEVICE(sunxi_de2) = {
 #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_VIDEO_DT_SIMPLEFB)
 int sunxi_simplefb_setup(void *blob)
 {
-   struct udevice *de2, *hdmi;
+   struct udevice *de2, *disp;
struct video_priv *de2_priv;
struct video_uc_platdata *de2_plat;
int mux;
@@ -343,16 +343,27 @@ int sunxi_simplefb_setup(void *blob)
}
 
ret = uclass_find_device_by_name(UCLASS_DISPLAY,
-"sunxi_dw_hdmi", &hdmi);
+"sunxi_dw_hdmi", &disp);
if (ret) {
debug("HDMI not present\n");
-   return 0;
+   } else if (device_active(disp)) {
+   if (mux == 0)
+   pipeline = "mixer0-lcd0-hdmi";
+   else
+   pipeline = "mixer1-lcd1-hdmi";
}
 
-   if (mux == 0)
-   pipeline = "mixer0-lcd0-hdmi";
-   else
-   pipeline = "mixer1-lcd1-hdmi";
+   ret = uclass_find_device_by_name(UCLASS_DISPLAY,
+"sunxi_lcd", &disp);
+   if (ret)
+   debug("LCD not present\n");
+   else if (device_active(disp))
+   pipeline = "mixer0-lcd0";
+
+   if (!pipeline) {
+   debug("No active display present\n");
+   return 0;
+   }
 
de2_priv = dev_get_uclass_priv(de2);
de2_plat = dev_get_uclass_platdata(de2);
-- 
2.13.6

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Re: [U-Boot] [PATCH] video: sunxi: de2: add support for LCD SimpleFB

2017-10-30 Thread Jagan Teki
On Mon, Oct 30, 2017 at 4:07 PM, Icenowy Zheng  wrote:
> Add support for setting up SimpleFB for LCD display output in DE2
> SimpleFB setup code.
>
> Signed-off-by: Icenowy Zheng 
> ---
>  drivers/video/sunxi/sunxi_de2.c | 25 ++---
>  1 file changed, 18 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
> index e8903400ec..a41944e645 100644
> --- a/drivers/video/sunxi/sunxi_de2.c
> +++ b/drivers/video/sunxi/sunxi_de2.c
> @@ -319,7 +319,7 @@ U_BOOT_DEVICE(sunxi_de2) = {
>  #if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_VIDEO_DT_SIMPLEFB)
>  int sunxi_simplefb_setup(void *blob)
>  {
> -   struct udevice *de2, *hdmi;
> +   struct udevice *de2, *disp;
> struct video_priv *de2_priv;
> struct video_uc_platdata *de2_plat;
> int mux;
> @@ -343,16 +343,27 @@ int sunxi_simplefb_setup(void *blob)
> }
>
> ret = uclass_find_device_by_name(UCLASS_DISPLAY,
> -"sunxi_dw_hdmi", &hdmi);
> +"sunxi_dw_hdmi", &disp);

why hdmi setup code need to change since the patch is for LCD and
'disp' here for lcd and hdmi, doesn't look good. use udevice lcd to
probe the same.

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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Re: [U-Boot] [PATCH v2] DW SPI: Get clock value from Device Tree

2017-10-30 Thread Marek Vasut
On 10/30/2017 07:04 AM, Jagan Teki wrote:
> On Sat, Oct 28, 2017 at 5:09 PM, Marek Vasut  wrote:
>> On 10/27/2017 03:54 PM, Eugeniy Paltsev wrote:
>>> On Tue, 2017-10-24 at 15:22 +0530, Jagan Teki wrote:
 On Tue, Oct 24, 2017 at 11:38 AM, Marek Vasut  wrote:
> On 10/23/2017 01:43 PM, Eugeniy Paltsev wrote:
>> On Thu, 2017-10-19 at 13:20 -0500, Dinh Nguyen wrote:
>>>
>>> On 10/19/2017 10:51 AM, Marek Vasut wrote:
 On 10/19/2017 05:36 PM, Eugeniy Paltsev wrote:
> On Tue, 2017-10-17 at 20:32 +0530, Jagan Teki wrote:
>> On Tue, Oct 17, 2017 at 8:27 PM, Alexey Brodkin
>>  wrote:
>>> Hi Jagan,
>>>
 -Original Message-
 From: Eugeniy Paltsev [mailto:palt...@synopsys.com]
 Sent: Tuesday, October 17, 2017 4:33 PM
 To: jagannadh.t...@gmail.com
 Cc: u-boot@lists.denx.de; uboot-snps-...@synopsys.com
 Subject: [uboot-snps-arc] Re: [PATCH v2] DW SPI: Get clock value 
 from Device Tree
>
> How hard it is to make others to use clock manager? do you have 
> any list?

 clock_manager.h is an old (and non-generic) way to deal with 
 different clocks.
 For example in SOCFPGA_GEN5 and SOCFPGA_ARRIA10 clock_manager.h 
 provides
 cm_get_spi_controller_clk_hz function to deal with spi controller 
 clock.

 But today we have another, linux-like alternative: to bind clocks 
 via device tree
 and manipulate with clocks via generic functions provided by clk.h

 In this patch I added option to get clock via device tree using 
 standard bindings
 and restrict clock_manager.h functions usage only to targets which 
 still use it,
 so new targets can simply bind clock via device tree and they do 
 not need to
 implement/define something in clock_manager.h

 So we don't need to make others to use clock manager :)
>>>
>>> Maybe it worth trying the other way around and think about 
>>> switching SOCFPGA platforms to
>>> generic clk framework?
>>
>> Yes, ie what exactly I thought of, thanks!
>
> I checked cm_get_spi_controller_clk_hz implementation in SOCFPGA_GEN5 
> and
> SOCFPGA_ARRIA10: we can't simply replace it with "fixed-clock" driver 
> as it
> manipulate with real hardware.
> The only way to do it is to replace SOCFPGA* clock manager functions 
> by real
> clock driver.
>
> And given I don't have mentioned hardware so I barely can help with
> those improvements on SOCFPGA. That said if there're no short-term 
> plans to
> switch SOCFPGA to clk framework maybe we'll be OK with my workaround 
> with #ifdefs?

 Wait for Dinh's reply ...

>>>
>>> Honestly, I don't have too much time to work on this right now. So I
>>> really don't when it can get done. But it'll go on my to-do list.
>>>
>>> Dinh
>>
>> Yep, thanks for your comments.
>>
>> So, Jagan,
>> given Dinh's reply, could you please apply this patch?
>
> I'd really hate it to start seeing soc-specific ifdefs in drivers,
> that's IMO not acceptable. A __weak override might be a temporary
> solution I'd be willing to live with though.

 I would rather like to see some check on clock manager itself whether
 CONFIG_IS_ENABLED(CLK) is using or not? this can tends not to use
 __weak as well soc #ifdefs in driver.

>>>
>>> Actually I don't understand what do you mean.
>>> Even if I add any #ifdefs to the clock_manager.h I still need to wrap 
>>> clock_manager.h
>>> include with #ifdefs as clock_manager.h is defined only for two
>>> targets - SOCFPGA_GEN5 and SOCFPGA_ARRIA10.
>>>
>>> #if defined(CONFIG_TARGET_SOCFPGA_GEN5) || 
>>> defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
>>> #include 
>>> #endif
>>>
>>> And I think it is better to add this #ifdef in driver than create empty
>>> clock_manager.h file for every new target which uses this driver.
> 
> Check CLK in clock-manager like below, of-course cm_get_l4_noc_hz used
> in other IP's as well. we need to carefully adding these check and if
> require add CLK for remaining drivers as well. the reason for adding
> checks in clock-manager is it may be removable code if all use CLK.

I do not understand what you're trying to tell me, but the patch below
makes no sense. What I would like to see is a weak function in the
driver and that function be overriden in the socfpga clock manager.

> --- a/arch/arm/mach-socfpga/clock_manager_arria10.c
> +++ b/arch/arm/mach-socfpga/clock_manager_arria10.c
> @@ -1066,10 +1066,17 @@ unsigned int cm_get_mmc_contro

Re: [U-Boot] [PATCH v2] DW SPI: Get clock value from Device Tree

2017-10-30 Thread Jagan Teki
On Mon, Oct 30, 2017 at 4:24 PM, Marek Vasut  wrote:
> On 10/30/2017 07:04 AM, Jagan Teki wrote:
>> On Sat, Oct 28, 2017 at 5:09 PM, Marek Vasut  wrote:
>>> On 10/27/2017 03:54 PM, Eugeniy Paltsev wrote:
 On Tue, 2017-10-24 at 15:22 +0530, Jagan Teki wrote:
> On Tue, Oct 24, 2017 at 11:38 AM, Marek Vasut  wrote:
>> On 10/23/2017 01:43 PM, Eugeniy Paltsev wrote:
>>> On Thu, 2017-10-19 at 13:20 -0500, Dinh Nguyen wrote:

 On 10/19/2017 10:51 AM, Marek Vasut wrote:
> On 10/19/2017 05:36 PM, Eugeniy Paltsev wrote:
>> On Tue, 2017-10-17 at 20:32 +0530, Jagan Teki wrote:
>>> On Tue, Oct 17, 2017 at 8:27 PM, Alexey Brodkin
>>>  wrote:
 Hi Jagan,

> -Original Message-
> From: Eugeniy Paltsev [mailto:palt...@synopsys.com]
> Sent: Tuesday, October 17, 2017 4:33 PM
> To: jagannadh.t...@gmail.com
> Cc: u-boot@lists.denx.de; uboot-snps-...@synopsys.com
> Subject: [uboot-snps-arc] Re: [PATCH v2] DW SPI: Get clock value 
> from Device Tree
>>
>> How hard it is to make others to use clock manager? do you have 
>> any list?
>
> clock_manager.h is an old (and non-generic) way to deal with 
> different clocks.
> For example in SOCFPGA_GEN5 and SOCFPGA_ARRIA10 clock_manager.h 
> provides
> cm_get_spi_controller_clk_hz function to deal with spi controller 
> clock.
>
> But today we have another, linux-like alternative: to bind clocks 
> via device tree
> and manipulate with clocks via generic functions provided by clk.h
>
> In this patch I added option to get clock via device tree using 
> standard bindings
> and restrict clock_manager.h functions usage only to targets 
> which still use it,
> so new targets can simply bind clock via device tree and they do 
> not need to
> implement/define something in clock_manager.h
>
> So we don't need to make others to use clock manager :)

 Maybe it worth trying the other way around and think about 
 switching SOCFPGA platforms to
 generic clk framework?
>>>
>>> Yes, ie what exactly I thought of, thanks!
>>
>> I checked cm_get_spi_controller_clk_hz implementation in 
>> SOCFPGA_GEN5 and
>> SOCFPGA_ARRIA10: we can't simply replace it with "fixed-clock" 
>> driver as it
>> manipulate with real hardware.
>> The only way to do it is to replace SOCFPGA* clock manager functions 
>> by real
>> clock driver.
>>
>> And given I don't have mentioned hardware so I barely can help with
>> those improvements on SOCFPGA. That said if there're no short-term 
>> plans to
>> switch SOCFPGA to clk framework maybe we'll be OK with my workaround 
>> with #ifdefs?
>
> Wait for Dinh's reply ...
>

 Honestly, I don't have too much time to work on this right now. So I
 really don't when it can get done. But it'll go on my to-do list.

 Dinh
>>>
>>> Yep, thanks for your comments.
>>>
>>> So, Jagan,
>>> given Dinh's reply, could you please apply this patch?
>>
>> I'd really hate it to start seeing soc-specific ifdefs in drivers,
>> that's IMO not acceptable. A __weak override might be a temporary
>> solution I'd be willing to live with though.
>
> I would rather like to see some check on clock manager itself whether
> CONFIG_IS_ENABLED(CLK) is using or not? this can tends not to use
> __weak as well soc #ifdefs in driver.
>

 Actually I don't understand what do you mean.
 Even if I add any #ifdefs to the clock_manager.h I still need to wrap 
 clock_manager.h
 include with #ifdefs as clock_manager.h is defined only for two
 targets - SOCFPGA_GEN5 and SOCFPGA_ARRIA10.

 #if defined(CONFIG_TARGET_SOCFPGA_GEN5) || 
 defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
 #include 
 #endif

 And I think it is better to add this #ifdef in driver than create empty
 clock_manager.h file for every new target which uses this driver.
>>
>> Check CLK in clock-manager like below, of-course cm_get_l4_noc_hz used
>> in other IP's as well. we need to carefully adding these check and if
>> require add CLK for remaining drivers as well. the reason for adding
>> checks in clock-manager is it may be removable code if all use CLK.
>
> I do not understand what you're trying to tell me, but the patch below
> makes no sense. What I would like to see is a weak function in the
> driver and that function be overriden in the socfpga clock manage

Re: [U-Boot] [PATCH v2] DW SPI: Get clock value from Device Tree

2017-10-30 Thread Marek Vasut
On 10/30/2017 12:36 PM, Jagan Teki wrote:
> On Mon, Oct 30, 2017 at 4:24 PM, Marek Vasut  wrote:
>> On 10/30/2017 07:04 AM, Jagan Teki wrote:
>>> On Sat, Oct 28, 2017 at 5:09 PM, Marek Vasut  wrote:
 On 10/27/2017 03:54 PM, Eugeniy Paltsev wrote:
> On Tue, 2017-10-24 at 15:22 +0530, Jagan Teki wrote:
>> On Tue, Oct 24, 2017 at 11:38 AM, Marek Vasut  wrote:
>>> On 10/23/2017 01:43 PM, Eugeniy Paltsev wrote:
 On Thu, 2017-10-19 at 13:20 -0500, Dinh Nguyen wrote:
>
> On 10/19/2017 10:51 AM, Marek Vasut wrote:
>> On 10/19/2017 05:36 PM, Eugeniy Paltsev wrote:
>>> On Tue, 2017-10-17 at 20:32 +0530, Jagan Teki wrote:
 On Tue, Oct 17, 2017 at 8:27 PM, Alexey Brodkin
  wrote:
> Hi Jagan,
>
>> -Original Message-
>> From: Eugeniy Paltsev [mailto:palt...@synopsys.com]
>> Sent: Tuesday, October 17, 2017 4:33 PM
>> To: jagannadh.t...@gmail.com
>> Cc: u-boot@lists.denx.de; uboot-snps-...@synopsys.com
>> Subject: [uboot-snps-arc] Re: [PATCH v2] DW SPI: Get clock value 
>> from Device Tree
>>>
>>> How hard it is to make others to use clock manager? do you have 
>>> any list?
>>
>> clock_manager.h is an old (and non-generic) way to deal with 
>> different clocks.
>> For example in SOCFPGA_GEN5 and SOCFPGA_ARRIA10 clock_manager.h 
>> provides
>> cm_get_spi_controller_clk_hz function to deal with spi 
>> controller clock.
>>
>> But today we have another, linux-like alternative: to bind 
>> clocks via device tree
>> and manipulate with clocks via generic functions provided by 
>> clk.h
>>
>> In this patch I added option to get clock via device tree using 
>> standard bindings
>> and restrict clock_manager.h functions usage only to targets 
>> which still use it,
>> so new targets can simply bind clock via device tree and they do 
>> not need to
>> implement/define something in clock_manager.h
>>
>> So we don't need to make others to use clock manager :)
>
> Maybe it worth trying the other way around and think about 
> switching SOCFPGA platforms to
> generic clk framework?

 Yes, ie what exactly I thought of, thanks!
>>>
>>> I checked cm_get_spi_controller_clk_hz implementation in 
>>> SOCFPGA_GEN5 and
>>> SOCFPGA_ARRIA10: we can't simply replace it with "fixed-clock" 
>>> driver as it
>>> manipulate with real hardware.
>>> The only way to do it is to replace SOCFPGA* clock manager 
>>> functions by real
>>> clock driver.
>>>
>>> And given I don't have mentioned hardware so I barely can help with
>>> those improvements on SOCFPGA. That said if there're no short-term 
>>> plans to
>>> switch SOCFPGA to clk framework maybe we'll be OK with my 
>>> workaround with #ifdefs?
>>
>> Wait for Dinh's reply ...
>>
>
> Honestly, I don't have too much time to work on this right now. So I
> really don't when it can get done. But it'll go on my to-do list.
>
> Dinh

 Yep, thanks for your comments.

 So, Jagan,
 given Dinh's reply, could you please apply this patch?
>>>
>>> I'd really hate it to start seeing soc-specific ifdefs in drivers,
>>> that's IMO not acceptable. A __weak override might be a temporary
>>> solution I'd be willing to live with though.
>>
>> I would rather like to see some check on clock manager itself whether
>> CONFIG_IS_ENABLED(CLK) is using or not? this can tends not to use
>> __weak as well soc #ifdefs in driver.
>>
>
> Actually I don't understand what do you mean.
> Even if I add any #ifdefs to the clock_manager.h I still need to wrap 
> clock_manager.h
> include with #ifdefs as clock_manager.h is defined only for two
> targets - SOCFPGA_GEN5 and SOCFPGA_ARRIA10.
>
> #if defined(CONFIG_TARGET_SOCFPGA_GEN5) || 
> defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
> #include 
> #endif
>
> And I think it is better to add this #ifdef in driver than create empty
> clock_manager.h file for every new target which uses this driver.
>>>
>>> Check CLK in clock-manager like below, of-course cm_get_l4_noc_hz used
>>> in other IP's as well. we need to carefully adding these check and if
>>> require add CLK for remaining drivers as well. the reason for adding
>>> checks in clock-manager is it may be removable code if all use CLK.
>>
>> I do not understand what you're tryin

Re: [U-Boot] [RESEND] drivers/usb/ehci: Use platform-specific accessors

2017-10-30 Thread Alexey Brodkin
Hi Marek, Vladimir,

On Sun, 2017-10-29 at 11:00 +0100, Marek Vasut wrote:
> On 10/27/2017 02:42 PM, Vladimir Boroda wrote:
> > 
> > Alexey/Marek,
> > 
> > It appears that the "drivers/usb/ehci: Use platform-specific accessors"
> > patch that was submitted in June (and currently adopted in U-Boot
> > releases) kills USB EHCI functionality on PowerPC and likely all other
> > big-endian platforms.  The readl() and writel() accessors already
> > perform endian port to cpu conversion, so no extra conversion was
> > necessary.  The double conversion caused incorrect reading of USB EHCI
> > registers.
> 
> Give Alexey a few days, I've met him at a conference a few days ago so
> he's probably still traveling.

Yep indeed I was recovering after the last trip.

> > I can propose a patch to fix this issue, currently not sure how to
> > submit it for U-Boot approval.  Or you may want to pull the previous
> > patch (or replace the readl() and writel() with some endian-agnostic
> > register reading functions).

Indeed I do see a problem with existing implementation of ehci_{readl|writel}.
Could you please try the following fix which I believe is right now:
->8--
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index 7c39becd247e..7080ae8bded2 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -101,11 +101,11 @@ struct usb_linux_config_descriptor {
 } __attribute__ ((packed));
 
 #if defined CONFIG_EHCI_DESC_BIG_ENDIAN
-#define ehci_readl(x)  cpu_to_be32(readl(x))
-#define ehci_writel(a, b)  writel(cpu_to_be32(b), a)
+#define ehci_readl(x)  be32_to_cpu(__raw_readl(x))
+#define ehci_writel(a, b)  __raw_writel(cpu_to_be32(a), b)
 #else
-#define ehci_readl(x)  cpu_to_le32(readl(x))
-#define ehci_writel(a, b)  writel(cpu_to_le32(b), a)
+#define ehci_readl(x)  readl(x)
+#define ehci_writel(a, b)  writel(b, a)
 #endif
 
 #if defined CONFIG_EHCI_MMIO_BIG_ENDIAN
->8--

I don't have BE platform handy now so your "Tested-by" will be very
nice to have. On LE platform the change above doesn't cause any problems
[as expected] :)

-Alexey
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Re: [U-Boot] [PATCH 0/2] Disable hybrid mode for SPANSION S25FS-S family

2017-10-30 Thread Rajat Srivastava
> On Mon, Oct 30, 2017 at 11:52 AM, Jagan Teki 
> wrote:
> > On Mon, Oct 16, 2017 at 12:54 PM, Rajat Srivastava
> >  wrote:
> >> The S25FS-S family physical sectors may be configured as a hybrid
> >> combination of eight 4-kB parameter sectors at the top or bottom of
> >> the address space with all but one of the remaining sectors being
> >> uniform size. The default status of the flash is the hybrid
> >> architecture.
> >>
> >> Since the parameter sectors and the uniform sectors have different
> >> erase commands, it is a problem to implement erase functionality for
> >> hybrid mode in current U-boot code. Also, enabling hybrid mode
> >> doesn't provide any significant benefit.
> >
> > I think I've asked this question before, keeping the state of the
> > flash remains same. Can't erase parameter and uniform sectors
> > individually during operations like
> > - parameter sectors with erase commands (20h or 21h)
> > - uniform sectors with erase commands (D8h or DCh)
> 
> I understand that even we can do parameter and uniform sectors individually
> with the help of offsets we still have 224. Any idea why we need hybrid mode
> with this off 244 sector size? if require we can even write cypress on this 
> case.
> 
Hi Jagan

I am not aware of usage of the remaining 244 sector area. We will discuss this 
with Cypress.

Moreover, do you have any idea where we apply offset based checks in code? And 
if we do apply checks, will that look good with current Uboot code?
I think no one is going to use hybrid mode and even if someone wants to, they 
can modify the code.

Thanks
Rajat
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[U-Boot] [PATCH 2/2] rockchip: puma-rk3399: defconfig: select PHY_MICREL_KSZ90X1

2017-10-30 Thread Philipp Tomsich
The RK3368-uQ7 uses a KSZ9031 PHY on-module.  Enable PHY_MICREL_KSZ90X1
in the associated defconfig (this somehow got lost with da3b9e7f).

References: da3b9e7f ("Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig")
Signed-off-by: Philipp Tomsich 
---

 configs/puma-rk3399_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig
index d8b24f1..ebbf8a9 100644
--- a/configs/puma-rk3399_defconfig
+++ b/configs/puma-rk3399_defconfig
@@ -57,6 +57,7 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y
 CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_GMAC_ROCKCHIP=y
-- 
2.1.4

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[U-Boot] [PATCH 1/2] rockchip: lion-rk3368: defconfig: select PHY_MICREL_KSZ90X1

2017-10-30 Thread Philipp Tomsich
The RK3368-uQ7 uses a KSZ9031 PHY on-module.  Enable PHY_MICREL_KSZ90X1
in the associated defconfig.

References: da3b9e7f ("Move PHY_MICREL and PHY_MICREL_KSZ90X1 to Kconfig")
Signed-off-by: Philipp Tomsich 
---

 configs/lion-rk3368_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig
index 959180c..8dae75c 100644
--- a/configs/lion-rk3368_defconfig
+++ b/configs/lion-rk3368_defconfig
@@ -67,6 +67,7 @@ CONFIG_SPI_FLASH=y
 CONFIG_SPI_FLASH_MACRONIX=y
 CONFIG_SPI_FLASH_WINBOND=y
 CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
 CONFIG_DM_ETH=y
 CONFIG_ETH_DESIGNWARE=y
 CONFIG_RGMII=y
-- 
2.1.4

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[U-Boot] Problem with initialize in mmc_initialize in mmc.c

2017-10-30 Thread Faiz Abbas
Hi,

The variable *initialized* in mmc_initialize() is declared as static and
initialised to 0 in the following commit. This makes the compiler put it
in the .bss section of the image.

commit 1b26bab12e85e8b0d382d6775e40d14445249574
Author: Daniel Kochmański 
Date:   Fri May 29 16:55:43 2015 +0200

mmc: Protect `mmc_initialize` from initialising mmc multiple times

`mmc_initialize` might be called multiple times leading to the
mmc-controllers being initialised twice, and initialising the
`mmc_devices` list head twice which may lead to memory leaks.

Signed-off-by: Daniel Kochmański 
CC: Roy Spliet 
Cc: Ian Campbell 
CC: Pantelis Antoniou 
Acked-by: Hans de Goede 
Signed-off-by: Hans de Goede 

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index da47037..f12546a 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -1762,6 +1762,11 @@ static void do_preinit(void)

 int mmc_initialize(bd_t *bis)
 {
+   static int initialized = 0;
+   if (initialized)/* Avoid initializing mmc multiple times */
+   return 0;
+   initialized = 1;
+
INIT_LIST_HEAD (&mmc_devices);
cur_dev_num = 0;


.bss should not be accessed in u-boot before relocation because it
overlaps with fdt and writing to variables in .bss can corrupt the fdt.
MMC can be probed before relocation if it contains the u-boot
environment. Therefore, I tried to move this variable to the .data
section by

static int initialized __attribute__((section(".data")));

When *initialized* was a part of .bss it was getting re-initilized to 0
as a part of relocation. Therefore, mmc was getting probed again
successfully after relocation with new addresses for mmc devices.

Now when *initialized* is not a part of .bss, it holds its value across
relocation and a second call to mmc_initialize() returns without doing
anything. However, the *mmc_devices* list containing pointers to the
older locations of mmc devices is not refreshed and thus mmc devices
fail to enumerate.

So *initialized* is a problem whether it is in .data or .bss.
I am not sure how to fix this. Any help is appreciated.

Thanks,
Faiz
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[U-Boot] [PATCH] BugFix: PXE Boot fails on old arm kernel with initrd without FDT

2017-10-30 Thread Sven Glodowski
Hello,

PXE/Extlinux boot fails on old Kernel which requires initrd but doesn't have 
FDT!

sysboot loads initrd loaded into RAM, but system boots without initrd and hangs.

Kernel:
  Linux odroid 3.8.13.30 #1 SMP PREEMPT Wed Feb 1 20:17:12 CET 2017 armv7l 
armv7l armv7l GNU/Linux

Looking into [master]u-boot/cmd/pxe.c, 
  function  label_boot(cmd_tbl_t *cmdtp, struct pxe_label *label)

Number of boot parameter initializing with 2
 622: int bootm_argc = 2;

Before calling boot_m / boot_z, 
number of boot parameters updated only if FTD is used!

 783if (!bootm_argv[3])
 784bootm_argv[3] = getenv("fdt_addr");
 785
 786 if (bootm_argv[3]) {
 787 if (!bootm_argv[2])
 788 bootm_argv[2] = "-";
 789 bootm_argc = 4;

Applying this patch, Number of boot parameters set to 3 if initrd loaded before.

---
--- a/u-boot/cmd/pxe.c.orig 2017-10-30 11:53:20.470526920 +0100
+++ b/u-boot/cmd/pxe.c  2017-10-30 11:56:43.526036397 +0100
@@ -780,6 +780,9 @@ static int label_boot(cmd_tbl_t *cmdtp,
}
}
 
+   if (bootm_argv[2])
+   bootm_argc = 3;
+
if (!bootm_argv[3])
bootm_argv[3] = env_get("fdt_addr");
 


After that, board boots even without FTD.
 
checked on device with patched U-Boot 2016.11-rc3-g8a65327.

for u-boot branch [master] 
  calling do_bootm /  do_bootz not changed so maybe bug still exists.

For u-boot branch [next] this is fixed.
  bootm_argc initilized with 3 and boot commands called with "-" on systems 
without initrd
  

Best regards

Sven Glodowski

-
Boot log after applying patch


U-Boot 2016.11-rc3-g8a65327-dirty (Oct 30 2017 - 10:28:32 +0100)

CPU:   Exynos4412 @ 1 GHz
Model: Odroid based on Exynos4412
Board: Odroid based on Exynos4412
Type:  u3
DRAM:  2 GiB
LDO20@VDDQ_EMMC_1.8V: set 180 uV; enabling
LDO22@VDDQ_EMMC_2.8V: set 280 uV; enabling
LDO21@TFLASH_2.8V: set 280 uV; enabling
MMC:   EXYNOS DWMMC: 0, SAMSUNG SDHCI: 1
Net:   No ethernet found.
Autobooting in 1 seconds, press  twice to stop.
Retrieving file: extlinux.conf
reading extlinux.conf
572 bytes read in 2 ms (279.3 KiB/s)
Odroid boot options
1:  Odroid-3.8.13 (1080p-edid)
2:  Odroid-3.8.13 (1080p-noedid)
Enter choice: 2:Odroid-3.8.13 (1080p-noedid)
Retrieving file: uInitrd
reading uInitrd
9325833 bytes read in 330 ms (27 MiB/s)
Retrieving file: zImage
reading zImage
2344680 bytes read in 86 ms (26 MiB/s)
append: console=tty1 console=ttySAC1,115200n8 
root=UUID=e139ce78-9841-40fe-8823-96a304a09859 rootwait ro mem=2047M 
drm_kms_helper.edid_firmware=edid/1920x1080.bin
Kernel image @ 0x4200 [ 0x00 - 0x23c6e8 ]
## Loading init Ramdisk from Legacy Image at 4500 ...
   Image Name:   initrd.img-3.8.13.30
   Image Type:   ARM Linux RAMDisk Image (gzip compressed)
   Data Size:9325769 Bytes = 8.9 MiB
   Load Address: 
   Entry Point:  
   Verifying Checksum ... OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
[0.00] Booting Linux on physical CPU 0xa00
...--- a/u-boot/cmd/pxe.c.orig	2017-10-30 11:53:20.470526920 +0100
+++ b/u-boot/cmd/pxe.c	2017-10-30 11:56:43.526036397 +0100
@@ -780,6 +780,9 @@ static int label_boot(cmd_tbl_t *cmdtp,
 		}
 	}
 
+	if (bootm_argv[2])
+		bootm_argc = 3;
+
 	if (!bootm_argv[3])
 		bootm_argv[3] = env_get("fdt_addr");
 
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Re: [U-Boot] [u-boot-release] [Patch V4 1/2] armv8: ls1088ardb: Add SD boot support for ls1088

2017-10-30 Thread York Sun
On 10/30/2017 03:31 AM, Ashish Kumar wrote:
> Signed-off-by: Prabhakar Kushwaha 
> Signed-off-by: Ashish Kumar 
> Signed-off-by: Raghav Dogra 
> ---
> 
> v4:
> Add Documentation for SD boot
> Rebase to top
> 
>  arch/arm/Kconfig   |  1 +
>  arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3 | 43 
> ++
>  board/freescale/ls1088a/MAINTAINERS|  1 +
>  board/freescale/ls1088a/ddr.c  |  5 ++-
>  configs/ls1088ardb_sdcard_qspi_defconfig   | 33 +
>  include/configs/ls1088a_common.h   | 35 ++
>  include/configs/ls1088ardb.h   | 31 +++-
>  7 files changed, 146 insertions(+), 3 deletions(-)
>  create mode 100644 configs/ls1088ardb_sdcard_qspi_defconfig
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 83b7aa5..5707111 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -938,6 +938,7 @@ config TARGET_LS1088ARDB
>   select ARMV8_MULTIENTRY
>   select ARCH_MISC_INIT
>   select BOARD_LATE_INIT
> + select SUPPORT_SPL
>   help
> Support for NXP LS1088ARDB platform.
> The LS1088A Reference design board (RDB) is a high-performance
> diff --git a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3 
> b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3
> index 7867c37..5f10415 100644
> --- a/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3
> +++ b/arch/arm/cpu/armv8/fsl-layerscape/doc/README.lsch3
> @@ -201,6 +201,49 @@ nand write  8  u-boot image>
>  Notice the difference from QDS is SRC, SRC_ADDR and the offset of u-boot 
> image
>  to match board NAND device with 4KB/page, block size 512KB.
>  
> +Booting from SD/eMMC
> +---
> +Booting from SD/eMMC requires two images, RCW and u-boot-with-spl.bin.
> +The difference between SD boot RCW image and QSPI-NOR boot image is the PBI
> +command sequence. Below is one example for PBI commands for RDB and QDS 
> which uses
> +SD device with sector size 512.
> +
> +1) Block Copy: SRC=0x0040, SRC_ADDR=0x0010, DEST_ADDR=0x1800a000,
> +BLOCK_SIZE=0x00016000
> +
> +This command copies u-boot image from SD device into OCRAM. The values need
> +to adjust accordingly for SD/eMMC
> +
> +SRC  should match the cfg_rcw_src, the reset config pins. It depends
> + on the device will be SD(0x0040) or eMMC(0x0041).

Please fix this sentence.

> +SRC_ADDR is the offset of u-boot-with-spl.bin image in SD device. In
> + the example above, 1MB. This is same as QSPI-NOR.

This field is always in byte, isn't it? Does it always use 512KB block size?

> +DEST_ADDRis fixed at 0x1800a000, matching bootloc set above.

It is not "fixed", but rather "matching" the setting below.

> +BLOCK_SIZE   is the size to be copied by PBI.
> +
> +2) CCSR 4-byte write to 0x01e00404, data=0x
> +3) CCSR 4-byte write to 0x01e00400, data=0x1800a000
> +The above two commands set bootloc register to 0x_1800a000 where
> +the u-boot code will be running in OCRAM.
> +
> +
> +RCW image should be written at 8th sector of device(SD/eMMC). Example of 
> using
> +u-boot command

I think the term here is "block", not "sector".

> +
> +mc erase 0x8 0x10

You are missing a "m" here.

> +mmc write  0x8  value= 10>
> +
> +To form the SD-Boot image, build u-boot with SD config, for example,
> +ls1088ardb_sdcard_qspi_defconfig. The image needed is u-boot-with-spl.bin.
> +The u-boot image should be written to match SRC_ADDR, in above example  
> offset 0x10
> +in other work it means sector location 0x800

s/sector/block



>  
> +#ifdef CONFIG_SPL
> +#define CONFIG_SPL_BSS_START_ADDR  0x8010
> +#define CONFIG_SPL_BSS_MAX_SIZE0x0010
> +#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
> +#define CONFIG_SPL_ENV_SUPPORT
> +#define CONFIG_SPL_FRAMEWORK
> +#define CONFIG_SPL_I2C_SUPPORT
> +#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
> +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define CONFIG_SPL_LIBGENERIC_SUPPORT
> +#define CONFIG_SPL_MAX_SIZE0x16000
> +#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
> +#define CONFIG_SPL_SERIAL_SUPPORT
> +#define CONFIG_SPL_STACK   (CONFIG_SYS_FSL_OCRAM_BASE + 0x9ff0)
> +#define CONFIG_SPL_TARGET  "u-boot-with-spl.bin"
> +#define CONFIG_SPL_TEXT_BASE   0x1800a000
> +#ifdef CONFIG_SD_BOOT
> +#define CONFIG_SPL_MMC_SUPPORT
> +#endif
> +
> +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x0010
> +#define CONFIG_SYS_SPL_MALLOC_START0x8020
> +#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
> +#endif
>  #define CONFIG_SYS_BOOTM_LEN   (64 << 20)  /* Increase max gunzip size */
>  
>  #endif /* __LS1088_COMMON_H */

Please double check. I am sure some of the config options are in Kconfig.

York
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Re: [U-Boot] [PATCH v2] net: phy: marvell: Add functions to read PHY's extended registers

2017-10-30 Thread York Sun
On 10/30/2017 03:34 AM, Lukasz Majewski wrote:
> Hi York,
> 
>> On 10/27/2017 08:23 AM, Lukasz Majewski wrote:
>>> On Fri, 27 Oct 2017 15:06:37 +
>>> York Sun  wrote:
>>>   
 On 10/27/2017 02:12 AM, Lukasz Majewski wrote:  
> This commit allows extended Marvell registers to be read with:
>
> foo > mdio rx FEC 3.10
> Reading from bus FEC
> PHY at address 0:
> 3.16 - 0x1063
> foo > mdio wx FEC 3.10 0x1011
>
> The above code changes the way ETH connector LEDs blink.
>
> Signed-off-by: Lukasz Majewski 
>
> ---
>
> Changes in v2:
> - Provide the readext and writeext callbacks to other marvell ETH
> PHY devices
>
>  drivers/net/phy/marvell.c | 47
> +++ 1 file changed, 47
> insertions(+)
>
> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
> index b7f300e..19f451d 100644
> --- a/drivers/net/phy/marvell.c
> +++ b/drivers/net/phy/marvell.c
> @@ -104,6 +104,31 @@
>  #define MIIM_88E151x_MODE_SGMII  1
>  #define MIIM_88E151x_RESET_OFFS  15
>  
> +static int m88e1xxx_phy_extread(struct phy_device *phydev, int
> addr,
> + int devaddr, int regnum)
> +{
> + int oldpage = phy_read(phydev, MDIO_DEVAD_NONE,
> MII_MARVELL_PHY_PAGE);
> + int val;
> +
> + phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE,
> devaddr);  
>>
>> For register 30 and 31, the page register is 29, not 22.
> 
> Yes, for 88E1145 and 88E1149 the page register is 29, not 22 (as it is
> in majority of devices from marvell.c file in u-boot).
> 
> It seems like the most practical approach would be as presented in
> patch v1 - just enable this code on PHY which I can test.
> 
> If you find other devices (boards) and test the code, then we can add
> it as well.
>  

OK. Thanks for trying.

York
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Re: [U-Boot] [PATCH RESEND] imx:display5: Add support for LWN's DISPLAY5 board (for v2017.11-rc2+)

2017-10-30 Thread Stefano Babic
Hi Lukasz,

On 20/10/2017 14:46, Lukasz Majewski wrote:
> This commit provides support for LWN's IMX6Q based DISPLAY5 board.
> 
> Signed-off-by: Lukasz Majewski 
> ---
> 
>  arch/arm/dts/imx6q-display5.dts |  18 ++
>  arch/arm/mach-imx/mx6/Kconfig   |   7 +
>  board/liebherr/display5/Kconfig |  18 ++
>  board/liebherr/display5/MAINTAINERS |   7 +
>  board/liebherr/display5/Makefile|  11 +
>  board/liebherr/display5/common.c| 113 +
>  board/liebherr/display5/common.h|  42 
>  board/liebherr/display5/display5.c  | 440 
> 
>  board/liebherr/display5/spl.c   | 247 
>  configs/display5_defconfig  |  61 +
>  configs/display5_factory_defconfig  |  75 ++
>  include/configs/display5.h  | 423 ++
>  12 files changed, 1462 insertions(+)
>  create mode 100644 arch/arm/dts/imx6q-display5.dts
>  create mode 100644 board/liebherr/display5/Kconfig
>  create mode 100644 board/liebherr/display5/MAINTAINERS
>  create mode 100644 board/liebherr/display5/Makefile
>  create mode 100644 board/liebherr/display5/common.c
>  create mode 100644 board/liebherr/display5/common.h
>  create mode 100644 board/liebherr/display5/display5.c
>  create mode 100644 board/liebherr/display5/spl.c
>  create mode 100644 configs/display5_defconfig
>  create mode 100644 configs/display5_factory_defconfig
>  create mode 100644 include/configs/display5.h
> 
> diff --git a/arch/arm/dts/imx6q-display5.dts b/arch/arm/dts/imx6q-display5.dts
> new file mode 100644
> index 000..50347ff
> --- /dev/null
> +++ b/arch/arm/dts/imx6q-display5.dts
> @@ -0,0 +1,18 @@
> +/*
> + * Copyright 2017
> + * Lukasz Majewski, DENX Software Engineering, lu...@denx.de
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + *
> + */
> +
> +/dts-v1/;
> +
> +#include "imx6q.dtsi"
> +
> +/ {
> + model = "Liebherr (LWN) display5 i.MX6 Quad Board";
> + compatible = "lwn,display5", "fsl,imx6q";
> +};
> diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig
> index b82db3a..fd73c67 100644
> --- a/arch/arm/mach-imx/mx6/Kconfig
> +++ b/arch/arm/mach-imx/mx6/Kconfig
> @@ -138,6 +138,12 @@ config TARGET_DHCOMIMX6
>   select DM_THERMAL
>   imply CMD_SPL
>  
> +config TARGET_DISPLAY5
> + bool "LWN DISPLAY5 board"
> + select SUPPORT_SPL
> + select DM
> + select DM_SERIAL
> +
>  config TARGET_EMBESTMX6BOARDS
>   bool "embestmx6boards"
>   select BOARD_LATE_INIT
> @@ -459,6 +465,7 @@ source "board/phytec/pfla02/Kconfig"
>  source "board/gateworks/gw_ventana/Kconfig"
>  source "board/kosagi/novena/Kconfig"
>  source "board/samtec/vining_2000/Kconfig"
> +source "board/liebherr/display5/Kconfig"
>  source "board/liebherr/mccmon6/Kconfig"
>  source "board/logicpd/imx6/Kconfig"
>  source "board/seco/Kconfig"
> diff --git a/board/liebherr/display5/Kconfig b/board/liebherr/display5/Kconfig
> new file mode 100644
> index 000..b096c89
> --- /dev/null
> +++ b/board/liebherr/display5/Kconfig
> @@ -0,0 +1,18 @@
> +if TARGET_DISPLAY5
> +
> +config SYS_CPU
> + default "armv7"
> +
> +config SYS_BOARD
> + default "display5"
> +
> +config SYS_VENDOR
> + default "liebherr"
> +
> +config SYS_SOC
> + default "mx6"
> +
> +config SYS_CONFIG_NAME
> + default "display5"
> +
> +endif
> diff --git a/board/liebherr/display5/MAINTAINERS 
> b/board/liebherr/display5/MAINTAINERS
> new file mode 100644
> index 000..5217831
> --- /dev/null
> +++ b/board/liebherr/display5/MAINTAINERS
> @@ -0,0 +1,7 @@
> +DISPLAY5 BOARD
> +M:   Lukasz Majewski 
> +S:   Maintained
> +F:   board/liebherr/display5/
> +F:   include/configs/display5.h
> +F:   configs/display5_defconfig
> +F:   configs/display5_factory_defconfig
> diff --git a/board/liebherr/display5/Makefile 
> b/board/liebherr/display5/Makefile
> new file mode 100644
> index 000..f934672
> --- /dev/null
> +++ b/board/liebherr/display5/Makefile
> @@ -0,0 +1,11 @@
> +#
> +# Copyright (C) 2017, DENX Software Engineering
> +# Lukasz Majewski 
> +#
> +# SPDX-License-Identifier:GPL-2.0+
> +#
> +ifdef CONFIG_SPL_BUILD
> +obj-y = common.o spl.o
> +else
> +obj-y := common.o display5.o
> +endif
> diff --git a/board/liebherr/display5/common.c 
> b/board/liebherr/display5/common.c
> new file mode 100644
> index 000..98d3d64
> --- /dev/null
> +++ b/board/liebherr/display5/common.c
> @@ -0,0 +1,113 @@
> +/*
> + * Copyright (C) 2017 DENX Software Engineering
> + * Lukasz Majewski, DENX Software Engineering, lu...@denx.de
> + *
> + * SPDX-License-Identifier:  GPL-2.0+
> + */
> +
> +#include 
> +#include 
> +#include "common.h"
> +
> +iomux_v3_cfg_t const uart_pads[] = {
> + /* UART4 */
> + MX6_PAD_CSI0_DAT12__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
> + MX6_PAD_CSI0_DAT13__UART4_RX_D

[U-Boot] rk3288: Falcon mode broken

2017-10-30 Thread Jagan Teki
Hi,

Did anyone have tested falcon recently? it was working for me during
rc1 and now it's broken cant see kernel booting, I knew I need to
bisect but just checking in case if any new changes.

Log:
--

=> reset
spl_early_init()
>>spl:board_init_r()

U-Boot TPL 2017.11-rc2-00077-g1ea3e90-dirty (Oct 30 2017 - 22:40:51)
Trying to boot from BOOTROM
spl_early_init()
>>spl:board_init_r()

U-Boot SPL 2017.11-rc2-00077-g1ea3e90-dirty (Oct 30 2017 - 22:40:51)
Trying to boot from MMC1
spl: payload image: *s load addr: 0x4 size: 1048544
Jumping to Linux
Entering kernel arg pointer: 0x

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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Re: [U-Boot] rk3288: Falcon mode broken

2017-10-30 Thread York Sun
On 10/30/2017 10:17 AM, Jagan Teki wrote:
> Hi,
> 
> Did anyone have tested falcon recently? it was working for me during
> rc1 and now it's broken cant see kernel booting, I knew I need to
> bisect but just checking in case if any new changes.
> 
> Log:
> --
> 
> => reset
> spl_early_init()
>>> spl:board_init_r()
> 
> U-Boot TPL 2017.11-rc2-00077-g1ea3e90-dirty (Oct 30 2017 - 22:40:51)
> Trying to boot from BOOTROM
> spl_early_init()
>>> spl:board_init_r()
> 
> U-Boot SPL 2017.11-rc2-00077-g1ea3e90-dirty (Oct 30 2017 - 22:40:51)
> Trying to boot from MMC1
> spl: payload image: *s load addr: 0x4 size: 1048544
> Jumping to Linux
> Entering kernel arg pointer: 0x
> 

Jagan,

I tested it after seeing your message. I have to make some adjustment to
accommodate the growing SPL image for LS1043ARDB. It boots OK. Please
see my log

U-Boot SPL 2017.11-rc2-00105-ga1a5779 (Oct 30 2017 - 10:42:49)
Initialzing DDR using fixed setting
Configuring DDR for 1600 MT/s data rate
PPA Firmware: Version fsl-sdk-v2.0-1703-29-ga439286
Trying to boot from MMC1
[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version
4.11.0-rc4-next-20170330-35552-ge4bfaa9-dirty (york@oslab-l16) (gcc
version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #93 SMP Wed May 10
14:54:47 PDT 2017
[0.00] Boot CPU: AArch64 Processor [410fd034]
[0.00] earlycon: uart8250 at MMIO 0x021c0500 (options '')
[0.00] bootconsole [uart8250] enabled
Starting logging: OK
Initializing random number generator... done.
Starting network: OK

Welcome to Buildroot
buildroot login:

I have a local commit to adjust the image size. My git log is

commit a1a577912fe17f9ff75e07661d9eb61f15e45693
Author: York Sun 

Test: ls1043ardb SD boot to falcon

commit b79372ae94fbc9e30d014ad8ce830d2062539eb9
Author: Heinrich Schuchardt 

scripts/get_maintainer.pl: enable find_maintainer_files

commit 9ef2684c033d325b08133e96e8744b4da9b69a58
Author: Heinrich Schuchardt 

checkpatch: Support wide strings

commit 2d5e6b4aac59d3a93773f19839fbb86d9e704fb7
Merge: 4058356 9b73bcc
Author: Tom Rini 

Merge git://git.denx.de/u-boot-video

York
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Re: [U-Boot] [PATCH v3] imx: Fix regression with CONFIG_DM_MMC=y

2017-10-30 Thread Stefano Babic
On 30/10/2017 11:13, Fabio Estevam wrote:
> Hi Stefano and Tom,
> 
> On Fri, Oct 20, 2017 at 12:17 PM, Fabio Estevam  wrote:
>> When CONFIG_DM_MMC=y, CONFIG_BLK should be selected, otherwise the
>> SD/eMMC card cannot be used.
>>
>> Also, select CONFIG_DM_USB=y when CONFIG_USB=y to avoid build failure.
>>
>> Tested on mx6slevk, mx7dsabresd and mx6ullevk.
>>
>> Signed-off-by: Fabio Estevam 
>> Reviewed-by: Jaehoon Chung 
>> Tested-by: Adam Ford 
>> Tested-by: Sébastien Szymanski 
> 
> Could you please apply this one for 2017.11? It fixes esdhc issue on
> multiple boards.
> 

Applied to u-boot-imx, -master, thanks !

Best regards,
Stefano Babic

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Re: [U-Boot] rk3288: Falcon mode broken

2017-10-30 Thread Jagan Teki
On Mon, Oct 30, 2017 at 11:19 PM, York Sun  wrote:
> On 10/30/2017 10:17 AM, Jagan Teki wrote:
>> Hi,
>>
>> Did anyone have tested falcon recently? it was working for me during
>> rc1 and now it's broken cant see kernel booting, I knew I need to
>> bisect but just checking in case if any new changes.
>>
>> Log:
>> --
>>
>> => reset
>> spl_early_init()
 spl:board_init_r()
>>
>> U-Boot TPL 2017.11-rc2-00077-g1ea3e90-dirty (Oct 30 2017 - 22:40:51)
>> Trying to boot from BOOTROM
>> spl_early_init()
 spl:board_init_r()
>>
>> U-Boot SPL 2017.11-rc2-00077-g1ea3e90-dirty (Oct 30 2017 - 22:40:51)
>> Trying to boot from MMC1
>> spl: payload image: *s load addr: 0x4 size: 1048544
>> Jumping to Linux
>> Entering kernel arg pointer: 0x
>>
>
> Jagan,
>
> I tested it after seeing your message. I have to make some adjustment to
> accommodate the growing SPL image for LS1043ARDB. It boots OK. Please
> see my log
>
> U-Boot SPL 2017.11-rc2-00105-ga1a5779 (Oct 30 2017 - 10:42:49)
> Initialzing DDR using fixed setting
> Configuring DDR for 1600 MT/s data rate
> PPA Firmware: Version fsl-sdk-v2.0-1703-29-ga439286
> Trying to boot from MMC1
> [0.00] Booting Linux on physical CPU 0x0
> [0.00] Linux version
> 4.11.0-rc4-next-20170330-35552-ge4bfaa9-dirty (york@oslab-l16) (gcc
> version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #93 SMP Wed May 10
> 14:54:47 PDT 2017
> [0.00] Boot CPU: AArch64 Processor [410fd034]
> [0.00] earlycon: uart8250 at MMIO 0x021c0500 (options '')
> [0.00] bootconsole [uart8250] enabled
> Starting logging: OK
> Initializing random number generator... done.
> Starting network: OK
>
> Welcome to Buildroot
> buildroot login:
>
> I have a local commit to adjust the image size. My git log is
>
> commit a1a577912fe17f9ff75e07661d9eb61f15e45693
> Author: York Sun 
>
> Test: ls1043ardb SD boot to falcon
>
> commit b79372ae94fbc9e30d014ad8ce830d2062539eb9
> Author: Heinrich Schuchardt 
>
> scripts/get_maintainer.pl: enable find_maintainer_files
>
> commit 9ef2684c033d325b08133e96e8744b4da9b69a58
> Author: Heinrich Schuchardt 
>
> checkpatch: Support wide strings
>
> commit 2d5e6b4aac59d3a93773f19839fbb86d9e704fb7
> Merge: 4058356 9b73bcc
> Author: Tom Rini 
>
> Merge git://git.denx.de/u-boot-video

Can I see these changes means the image size adjustment ?

thanks!
-- 
Jagan Teki
Free Software Engineer | www.openedev.com
U-Boot, Linux | Upstream Maintainer
Hyderabad, India.
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Re: [U-Boot] rk3288: Falcon mode broken

2017-10-30 Thread York Sun
On 10/30/2017 10:55 AM, Jagan Teki wrote:
> On Mon, Oct 30, 2017 at 11:19 PM, York Sun  wrote:
>> On 10/30/2017 10:17 AM, Jagan Teki wrote:
>>> Hi,
>>>
>>> Did anyone have tested falcon recently? it was working for me during
>>> rc1 and now it's broken cant see kernel booting, I knew I need to
>>> bisect but just checking in case if any new changes.
>>>
>>> Log:
>>> --
>>>
>>> => reset
>>> spl_early_init()
> spl:board_init_r()
>>>
>>> U-Boot TPL 2017.11-rc2-00077-g1ea3e90-dirty (Oct 30 2017 - 22:40:51)
>>> Trying to boot from BOOTROM
>>> spl_early_init()
> spl:board_init_r()
>>>
>>> U-Boot SPL 2017.11-rc2-00077-g1ea3e90-dirty (Oct 30 2017 - 22:40:51)
>>> Trying to boot from MMC1
>>> spl: payload image: *s load addr: 0x4 size: 1048544
>>> Jumping to Linux
>>> Entering kernel arg pointer: 0x
>>>
>>
>> Jagan,
>>
>> I tested it after seeing your message. I have to make some adjustment to
>> accommodate the growing SPL image for LS1043ARDB. It boots OK. Please
>> see my log
>>
>> U-Boot SPL 2017.11-rc2-00105-ga1a5779 (Oct 30 2017 - 10:42:49)
>> Initialzing DDR using fixed setting
>> Configuring DDR for 1600 MT/s data rate
>> PPA Firmware: Version fsl-sdk-v2.0-1703-29-ga439286
>> Trying to boot from MMC1
>> [0.00] Booting Linux on physical CPU 0x0
>> [0.00] Linux version
>> 4.11.0-rc4-next-20170330-35552-ge4bfaa9-dirty (york@oslab-l16) (gcc
>> version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #93 SMP Wed May 10
>> 14:54:47 PDT 2017
>> [0.00] Boot CPU: AArch64 Processor [410fd034]
>> [0.00] earlycon: uart8250 at MMIO 0x021c0500 (options '')
>> [0.00] bootconsole [uart8250] enabled
>> Starting logging: OK
>> Initializing random number generator... done.
>> Starting network: OK
>>
>> Welcome to Buildroot
>> buildroot login:
>>
>> I have a local commit to adjust the image size. My git log is
>>
>> commit a1a577912fe17f9ff75e07661d9eb61f15e45693
>> Author: York Sun 
>>
>> Test: ls1043ardb SD boot to falcon
>>
>> commit b79372ae94fbc9e30d014ad8ce830d2062539eb9
>> Author: Heinrich Schuchardt 
>>
>> scripts/get_maintainer.pl: enable find_maintainer_files
>>
>> commit 9ef2684c033d325b08133e96e8744b4da9b69a58
>> Author: Heinrich Schuchardt 
>>
>> checkpatch: Support wide strings
>>
>> commit 2d5e6b4aac59d3a93773f19839fbb86d9e704fb7
>> Merge: 4058356 9b73bcc
>> Author: Tom Rini 
>>
>> Merge git://git.denx.de/u-boot-video
> 
> Can I see these changes means the image size adjustment ?
> 

Here it is

---
 configs/ls1043ardb_sdcard_defconfig | 7 ++-
 include/configs/ls1043a_common.h| 4 ++--
 2 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/configs/ls1043ardb_sdcard_defconfig
b/configs/ls1043ardb_sdcard_defconfig
index eac931b..d817a8a 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -20,7 +20,7 @@ CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0
earlycon=uart8250,mmio,0x21
 CONFIG_SPL=y
 CONFIG_SPL_BOARD_INIT=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
-CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110
 CONFIG_SPL_ENV_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_CMD_IMLS=y
@@ -53,3 +53,8 @@ CONFIG_DM_USB=y
 CONFIG_USB_XHCI_HCD=y
 CONFIG_USB_XHCI_DWC3=y
 CONFIG_USB_STORAGE=y
+CONFIG_SPL_FIT=y
+CONFIG_SPL_GZIP=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_SPL_OS_BOOT=y
+CONFIG_SPL_OF_LIBFDT=y
diff --git a/include/configs/ls1043a_common.h
b/include/configs/ls1043a_common.h
index a24d006..cb3b748 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -69,9 +69,9 @@
 #define CONFIG_SPL_TARGET  "u-boot-with-spl.bin"

 #define CONFIG_SPL_TEXT_BASE   0x1000
-#define CONFIG_SPL_MAX_SIZE0x17000
+#define CONFIG_SPL_MAX_SIZE0x1b000
 #define CONFIG_SPL_STACK   0x1001e000
-#define CONFIG_SPL_PAD_TO  0x1d000
+#define CONFIG_SPL_PAD_TO  0x21000

 #define CONFIG_SYS_SPL_MALLOC_START(CONFIG_SPL_BSS_START_ADDR + \
CONFIG_SPL_BSS_MAX_SIZE)
-- 
2.7.4

York

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Re: [U-Boot] [PATCH] powerpc: mpc85xx: Implement CPU erratum A-007907 for secondary cores

2017-10-30 Thread York Sun
On 10/17/2017 08:19 AM, York Sun wrote:
> Commit 06ad970b53a3 ("powerpc: mpc85xx: Implemente workaround for CPU
> erratum A-007907") clears L1CSR2 for the boot core, but other cores
> don't run through the workaround. Add similar code for secondary
> cores to clear DCSTASHID field in L1CSR2 register.
> 
> Signed-off-by: York Sun 
> ---
> 

Applied to fsl-qoriq master.

York

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Re: [U-Boot] [PATCH][v4] driver: fsl-mc: use calloc instead malloc

2017-10-30 Thread York Sun
On 10/10/2017 08:21 PM, Prabhakar Kushwaha wrote:
> Memory allocated via malloc is not guaranteed to be zeroized.
> 
> So explicitly use calloc instead of malloc.
> 
> Signed-off-by: Prabhakar Kushwaha 
> ---
> Changes for v2: Replaced malloc/memset with calloc
> Changes for v3: Updated patch description
> Changes for v4: Updated patch subject
> 

Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH v2] armv8: ls1088: Move CONFIG_ENV_IS_IN_SPI_FLASH to defconfig

2017-10-30 Thread York Sun
On 10/11/2017 06:07 AM, Ashish Kumar wrote:
> Signed-off-by: Ashish Kumar 
> ---
> v2:
> Reword commit msg
> 

Applied to fsl-qoriq master. Thanks.

York


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Re: [U-Boot] [PATCH v2] armv8: configs: ls1012a: correct the generic timer frequency issue

2017-10-30 Thread York Sun
On 10/11/2017 11:47 PM, andy.t...@nxp.com wrote:
> From: Yuantian Tang 
> 
> On ls1012a soc, core clock source frequency is 100Mhz.
> Generic timer frequency is derived from core clock source divided
> by 4, which is 25Mhz. So assign timer frequency to 25Mhz here.
> 
> Signed-off-by: Tang Yuantian 
> ---
> v2:
> - refine the commit message

Minor change to commit message.
Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH] armv8: ls1088aqds: Change phy mode to PHY_INTERFACE_MODE_RGMII_ID

2017-10-30 Thread York Sun
On 10/12/2017 02:51 AM, Ashish Kumar wrote:
> Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID
> PHY_INTERFACE_MODE_RGMII_TXID.
> 
> These change where introduced in phy driver in commit titled
> "net: phy: realtek: fix enabling of the TX-delay for RTL8211F"
> 
> Signed-off-by: Ashish Kumar 
> ---

Minor change to commit message.
Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH v4 1/5] arm64: layerscape: Move CONFIG_HAS_FSL_XHCI_USB to Kconfig

2017-10-30 Thread York Sun
On 10/22/2017 07:28 PM, Ran Wang wrote:
> Use Kconfig to select QE-HDLC and USB pin-mux.
> 
> Signed-off-by: Ran Wang 
> Reviewed-by: Bin Meng 
> ---
> Change in v4:
>   Typo correction.
> 
> Change in v3:
>   New patch file.
> 

This set is applied to fsl-qoriq master. Thanks.

York
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Re: [U-Boot] [PATCH 1/2] armv8: layerscape: Allocate 66 MB DDR for secure memory

2017-10-30 Thread York Sun
On 09/01/2017 01:24 AM, Sumit Garg wrote:
> Change DDR allocated for secure memory from 2 MB to 66 MB. This additional
> 64 MB secure memory is required for trusted OS running in Trusted Execution
> Environment using ARMv8 TrustZone.
> 
> Signed-off-by: Sumit Garg 
> ---

Reformatted commit message to wrap back at or before 70 characters.
Applied to fsl-qoriq master. Thanks.

York

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Re: [U-Boot] [PATCH 2/2] armv8: sec_firmware: Add support for loadables in FIT

2017-10-30 Thread York Sun
On 09/01/2017 01:25 AM, Sumit Garg wrote:
> Enable support for loadables in SEC firmware FIT image. Currently support
> is added for single loadable image.
> 
> Brief description of implementation:
> - Add two more address pointers (loadable_h, loadable_l) as arguments to
>   sec_firmware_init() api.
> - Create new api: sec_firmware_checks_copy_loadable() to check if loadables
>   node is present in SEC firmware FIT image. If present, verify loadable
>   image and copies it to secure DDR memory.
> - Populate address pointers with secure DDR memory addresses where loadable
>   is copied.
> 
> Example use-case could be trusted OS (tee.bin) as loadables node in SEC
> firmware FIT image.
> 
> Signed-off-by: Sumit Garg 
> ---

Reformatted commit message get rid of the bulletin style.
Applied to fsl-qoriq master. Thanks.

York


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Re: [U-Boot] [PATCH 1/9] drivers: net: pfe_eth: LS1012A PFE driver introduction

2017-10-30 Thread York Sun
On 10/09/2017 02:09 AM, Calvin Johnson wrote:
> This patch adds PFE driver into U-Boot.
> 
> Following are the main driver files:-
> pfe.c: provides low level helper functions to initialize PFE internal
> processor engines and other hardware blocks.
> pfe_driver.c: provides probe functions, initialization functions
> and packet send and receive functions.
> pfe_eth.c: provides high level gemac, phy and mdio initialization
> functions.
> pfe_firmware.c: provides functions to load firmware into PFE
> internal processor engines.
> 
> Signed-off-by: Calvin Johnson 
> Signed-off-by: Anjaneyulu Jagarlmudi 
> ---
>  drivers/net/pfe_eth/Kconfig|8 +
>  drivers/net/pfe_eth/Makefile   |   10 +
>  drivers/net/pfe_eth/pfe.c  | 1161 
> 
>  drivers/net/pfe_eth/pfe_driver.c   |  626 +++
>  drivers/net/pfe_eth/pfe_eth.c  |  545 +
>  drivers/net/pfe_eth/pfe_firmware.c |  230 +++
>  6 files changed, 2580 insertions(+)
>  create mode 100644 drivers/net/pfe_eth/Kconfig
>  create mode 100644 drivers/net/pfe_eth/Makefile
>  create mode 100644 drivers/net/pfe_eth/pfe.c
>  create mode 100644 drivers/net/pfe_eth/pfe_driver.c
>  create mode 100644 drivers/net/pfe_eth/pfe_eth.c
>  create mode 100644 drivers/net/pfe_eth/pfe_firmware.c
> 

Joe,

Did you get a chance to review this set?

York
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Re: [U-Boot] [PATCH 1/4] arm64: ls1043ardb: Add sd_bootcmd for distro fallback in case of sdboot

2017-10-30 Thread York Sun
On 10/23/2017 01:53 PM, York Sun wrote:
> On 09/14/2017 02:26 PM, York Sun wrote:
>> On 08/30/2017 03:43 AM, Shengzhou Liu wrote:
>>> Signed-off-by: Shengzhou Liu 
>>> ---
>>>   include/configs/ls1043a_common.h | 11 ++-
>>>   1 file changed, 10 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/include/configs/ls1043a_common.h 
>>> b/include/configs/ls1043a_common.h
>>> index f064d5c24a..976c031574 100644
>>> --- a/include/configs/ls1043a_common.h
>>> +++ b/include/configs/ls1043a_common.h
>>> @@ -281,6 +281,8 @@
>>> "fdt_addr_r=0x9000\0"   \
>>> "load_addr=0xa000\0"\
>>> "kernel_size=0x280\0"   \
>>> +   "kernel_addr_sd=0x8000\0"   \
>>> +   "kernel_size_sd=0x14000\0"  \
>>> "console=ttyS0,115200\0"\
>>> "mtdparts=" MTDPARTS_DEFAULT "\0"   \
>>> BOOTENV \
>>> @@ -318,12 +320,19 @@
>>> "$kernel_addr $kernel_size && bootm $load_addr#$board\0" \
>>> "nor_bootcmd=echo Trying load from nor..;"  \
>>> "cp.b $kernel_addr $load_addr " \
>>> -   "$kernel_size && bootm $load_addr#$board\0"
>>> +   "$kernel_size && bootm $load_addr#$board\0" \
>>> +   "sd_bootcmd=echo Trying load from SD ..;"   \
>>> +   "mmcinfo; mmc read $load_addr " \
>>> +   "$kernel_addr_sd $kernel_size_sd ;" \
>>> +   " bootm $load_addr#$board\0"
>>>   
>>
>> Shouldn't you be using "&&" instead of ";" between commands?
>>
> 
> Shengzhou,
> 
> Are you going to update the patches?

Mingkai,

Do you need this change for LS1043ARDB? Please respond to my comment if
so. Otherwise, I will drop this set.

York
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Re: [U-Boot] [PATCH v5] wandboard: Add support for the MX6QP variant

2017-10-30 Thread Otavio Salvador
On Sat, Oct 14, 2017 at 9:17 AM, Fabio Estevam  wrote:
> From: Fabio Estevam 
>
> Add support for the latest MX6QP wandboard variant.
>
> Based on Richard Hu's work from Technexion's U-Boot tree.
>
> Signed-off-by: Fabio Estevam 

Stefano, please add this to 17.11 release too.

-- 
Otavio Salvador O.S. Systems
http://www.ossystems.com.brhttp://code.ossystems.com.br
Mobile: +55 (53) 9981-7854Mobile: +1 (347) 903-9750
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Re: [U-Boot] [PATCH v2] mtd: nand: fsl-ifc: fix support of multiple NAND devices

2017-10-30 Thread York Sun
On 10/20/2017 03:43 AM, Kurt Kanzenbach wrote:
> Currently the chipselect used to identify the corresponding NAND chip is 
> stored
> at the controller and only set during fsl_ifc_chip_init(). This way, only the
> last NAND chip is working, as the previous value of cs_nand gets overwritten.
> 
> In order to solve this issue the chipselect is computed on demand by 
> evaluating
> the bank variable. Thus, the correct chipselect for each NAND chip operation 
> is
> used.
> 
> Tested on hardware with two NAND chips connected to the IFC controller.
> 
> Signed-off-by: Kurt Kanzenbach 
> ---
> Changes for v2:
>- get rid of cs_nand and compute chipselect on demand
>- pass priv instead of mtd to fsl_ifc_sram_init()

Scott,

Are you OK with this version? Somehow this patch was assigned me. I can
bring it in if you ack it.

York
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Re: [U-Boot] [PATCH 1/2] armv8: ls1088a: Enable sata on ls1088a

2017-10-30 Thread York Sun
On 10/26/2017 02:46 AM, andy.t...@nxp.com wrote:
> From: Yuantian Tang 
> 
> Enable sata feature on ls1088a platforms
> 
> Signed-off-by: Tang Yuantian 
> ---
>  include/configs/ls1088aqds.h | 12 
>  include/configs/ls1088ardb.h | 13 +
>  2 files changed, 25 insertions(+)
> 
> diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
> index 71d0e4e7d1..c1087edb38 100644
> --- a/include/configs/ls1088aqds.h
> +++ b/include/configs/ls1088aqds.h
> @@ -293,6 +293,18 @@ unsigned long get_board_ddr_clk(void);
>  #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS3
>  #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS5
>  
> +/* SATA */

How about check CONFIG_SCSI here, and use Kconfig to select SCSI?

> +#define CONFIG_LIBATA
> +#define CONFIG_SCSI
> +#define CONFIG_SCSI_AHCI
> +#define CONFIG_SCSI_AHCI_PLAT
> +
> +#define CONFIG_SYS_SATA1   AHCI_BASE_ADDR1
> +
> +#define CONFIG_SYS_SCSI_MAX_SCSI_ID1
> +#define CONFIG_SYS_SCSI_MAX_LUN1
> +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID 
> * \
> + CONFIG_SYS_SCSI_MAX_LUN)
>  /* QSPI device */
>  #if defined(CONFIG_QSPI_BOOT)
>  #define CONFIG_FSL_QSPI
> diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
> index 39f1345f97..8587234dcd 100644
> --- a/include/configs/ls1088ardb.h
> +++ b/include/configs/ls1088ardb.h
> @@ -232,6 +232,19 @@
>  #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS3
>  #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS5
>  
> +/* SATA */
> +#define CONFIG_LIBATA
> +#define CONFIG_SCSI
> +#define CONFIG_SCSI_AHCI
> +#define CONFIG_SCSI_AHCI_PLAT
> +
> +#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
> +
> +#define CONFIG_SYS_SCSI_MAX_SCSI_ID  1
> +#define CONFIG_SYS_SCSI_MAX_LUN  1
> +#define CONFIG_SYS_SCSI_MAX_DEVICE   (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
> + CONFIG_SYS_SCSI_MAX_LUN)
> +

Aren't the above two sections are identical? Do they fit well in the
common header file?

York
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Re: [U-Boot] [PATCH] drivers: net: ldpaa_eth: Correct error handler for qbman_swp_acquire()

2017-10-30 Thread York Sun
On 10/29/2017 10:23 PM, Ashish Kumar wrote:
> Hello York,
> 
> The definition of qbman_swp_acquire(), is not owned by u-boot, it is part of 
> qbman drivers which is owned by Roy.
> u-boot gets this definition from flib code and same is used in u-boot as it 
> is.
> 
> So, moving this error handler in qbman_swp_acquire for num == 0, may result 
> in inconsistency in flib code that was provided at the time of integration.
> 

OK. Let's keep it that way.
BTW, please do not top post if you can avoid it. Please always use
common quotation style when you reply.

York
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Re: [U-Boot] [Patch V2 1/2] armv8: ls1088ardb: Add SCSI related configs in header file for RDB

2017-10-30 Thread York Sun
On 10/29/2017 11:40 PM, Ashish Kumar wrote:
> Signed-off-by: Amrita Kumari 
> Signed-off-by: Ashish Kumar 
> ---

Change log?

>  include/configs/ls1088ardb.h | 13 +
>  1 file changed, 13 insertions(+)
> 
> diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
> index 958d472..8fdc576 100644
> --- a/include/configs/ls1088ardb.h
> +++ b/include/configs/ls1088ardb.h
> @@ -293,6 +293,19 @@
>  #define CONFIG_PHY_GIGE
>  #endif
>  
> +/* SATA */
> +#define CONFIG_LIBATA
> +#define CONFIG_SCSI_AHCI
> +#define CONFIG_SCSI_AHCI_PLAT
> +#define CONFIG_CMD_SCSI
> +#define CONFIG_SCSI
> +#define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
> +
> +#define CONFIG_SYS_SCSI_MAX_SCSI_ID  1
> +#define CONFIG_SYS_SCSI_MAX_LUN  1
> +#define CONFIG_SYS_SCSI_MAX_DEVICE   (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
> + CONFIG_SYS_SCSI_MAX_LUN)
> +
>  /*  MMC  */
>  #ifdef CONFIG_MMC
>  #define CONFIG_FSL_ESDHC
> 

Please check my comments to your first version. It still applied.

York
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Re: [U-Boot] [Patch V2 1/2] armv8: ls1088ardb: Add SCSI related configs in header file for RDB

2017-10-30 Thread York Sun
On 10/30/2017 12:06 PM, York Sun wrote:
> On 10/29/2017 11:40 PM, Ashish Kumar wrote:
>> Signed-off-by: Amrita Kumari 
>> Signed-off-by: Ashish Kumar 
>> ---
> 
> Change log?
> 
>>  include/configs/ls1088ardb.h | 13 +
>>  1 file changed, 13 insertions(+)
>>
>> diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
>> index 958d472..8fdc576 100644
>> --- a/include/configs/ls1088ardb.h
>> +++ b/include/configs/ls1088ardb.h
>> @@ -293,6 +293,19 @@
>>  #define CONFIG_PHY_GIGE
>>  #endif
>>  
>> +/* SATA */
>> +#define CONFIG_LIBATA
>> +#define CONFIG_SCSI_AHCI
>> +#define CONFIG_SCSI_AHCI_PLAT
>> +#define CONFIG_CMD_SCSI
>> +#define CONFIG_SCSI
>> +#define CONFIG_SYS_SATA1AHCI_BASE_ADDR1
>> +
>> +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
>> +#define CONFIG_SYS_SCSI_MAX_LUN 1
>> +#define CONFIG_SYS_SCSI_MAX_DEVICE  (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
>> +CONFIG_SYS_SCSI_MAX_LUN)
>> +
>>  /*  MMC  */
>>  #ifdef CONFIG_MMC
>>  #define CONFIG_FSL_ESDHC
>>
> 
> Please check my comments to your first version. It still applied.

Sorry, my bad. My comment was on the patch submitted by Andy Tang. You
both changed the same. Please work together to update the patches.

York
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Re: [U-Boot] [PATCH v2] mtd: nand: fsl-ifc: fix support of multiple NAND devices

2017-10-30 Thread Scott Wood
On Mon, 2017-10-30 at 18:50 +, York Sun wrote:
> On 10/20/2017 03:43 AM, Kurt Kanzenbach wrote:
> > Currently the chipselect used to identify the corresponding NAND chip is
> > stored
> > at the controller and only set during fsl_ifc_chip_init(). This way, only
> > the
> > last NAND chip is working, as the previous value of cs_nand gets
> > overwritten.
> > 
> > In order to solve this issue the chipselect is computed on demand by
> > evaluating
> > the bank variable. Thus, the correct chipselect for each NAND chip
> > operation is
> > used.
> > 
> > Tested on hardware with two NAND chips connected to the IFC controller.
> > 
> > Signed-off-by: Kurt Kanzenbach 
> > ---
> > Changes for v2:
> >    - get rid of cs_nand and compute chipselect on demand
> >    - pass priv instead of mtd to fsl_ifc_sram_init()
> 
> Scott,
> 
> Are you OK with this version? Somehow this patch was assigned me. I can
> bring it in if you ack it.

Acked-by: Scott Wood 

-Scott

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[U-Boot] [PATCH v3] net: phy: marvell: Add functions to read PHY's extended registers

2017-10-30 Thread Lukasz Majewski
This commit allows extended Marvell registers to be read with:

foo > mdio rx FEC 3.10
Reading from bus FEC
PHY at address 0:
3.16 - 0x1063
foo > mdio wx FEC 3.10 0x1011

The above code changes the way ETH connector LEDs blink.

Signed-off-by: Lukasz Majewski 

---

Changes in v3:
- Enable extended registers access only for 88E151x family of PHYs

Changes in v2:
- Provide the readext and writeext callbacks to other marvell ETH PHY
devices

 drivers/net/phy/marvell.c | 29 +
 1 file changed, 29 insertions(+)

diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index b7f300e40f..0b9a9fce8a 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -104,6 +104,31 @@
 #define MIIM_88E151x_MODE_SGMII1
 #define MIIM_88E151x_RESET_OFFS15
 
+static int m88e1xxx_phy_extread(struct phy_device *phydev, int addr,
+   int devaddr, int regnum)
+{
+   int oldpage = phy_read(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE);
+   int val;
+
+   phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, devaddr);
+   val = phy_read(phydev, MDIO_DEVAD_NONE, regnum);
+   phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, oldpage);
+
+   return val;
+}
+
+static int m88e1xxx_phy_extwrite(struct phy_device *phydev, int addr,
+int devaddr, int regnum, u16 val)
+{
+   int oldpage = phy_read(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE);
+
+   phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, devaddr);
+   phy_write(phydev, MDIO_DEVAD_NONE, regnum, val);
+   phy_write(phydev, MDIO_DEVAD_NONE, MII_MARVELL_PHY_PAGE, oldpage);
+
+   return 0;
+}
+
 /* Marvell 88E1011S */
 static int m88e1011s_config(struct phy_device *phydev)
 {
@@ -669,6 +694,8 @@ static struct phy_driver M88E1510_driver = {
.config = &m88e1510_config,
.startup = &m88e1011s_startup,
.shutdown = &genphy_shutdown,
+   .readext = &m88e1xxx_phy_extread,
+   .writeext = &m88e1xxx_phy_extwrite,
 };
 
 /*
@@ -684,6 +711,8 @@ static struct phy_driver M88E1518_driver = {
.config = &m88e1518_config,
.startup = &m88e1011s_startup,
.shutdown = &genphy_shutdown,
+   .readext = &m88e1xxx_phy_extread,
+   .writeext = &m88e1xxx_phy_extwrite,
 };
 
 static struct phy_driver M88E1310_driver = {
-- 
2.11.0

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Re: [U-Boot] [PATCH v3] net: phy: marvell: Add functions to read PHY's extended registers

2017-10-30 Thread York Sun
On 10/30/2017 02:58 PM, Lukasz Majewski wrote:
> This commit allows extended Marvell registers to be read with:
> 
> foo > mdio rx FEC 3.10
> Reading from bus FEC
> PHY at address 0:
> 3.16 - 0x1063
> foo > mdio wx FEC 3.10 0x1011
> 
> The above code changes the way ETH connector LEDs blink.
> 
> Signed-off-by: Lukasz Majewski 
> 
> ---
> 
> Changes in v3:
> - Enable extended registers access only for 88E151x family of PHYs
> 
> Changes in v2:
> - Provide the readext and writeext callbacks to other marvell ETH PHY
> devices
> 

Reviewed-by: York Sun 
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Re: [U-Boot] [PATCH] arm64: ls1012ardb: Add distro secure boot support

2017-10-30 Thread York Sun
On 09/07/2017 10:54 PM, Sumit Garg wrote:
> Enable validation of boot.scr script prior to its execution dependent
> on "secureboot" flag in environment. Enable fall back option to
> qspi boot in case of secure boot.
> 
> Signed-off-by: Sumit Garg 
> Tested-by: Vinitha Pillai 
> ---
>  configs/ls1012ardb_qspi_SECURE_BOOT_defconfig |  1 +
>  include/configs/ls1012ardb.h  | 20 ++--
>  2 files changed, 19 insertions(+), 2 deletions(-)
> 

This patch doesn't apply at all. Please rebase.

York
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Re: [U-Boot] [PATCH v2] mx6slevk: Fix MMC breakage for the SPL target

2017-10-30 Thread Fabio Estevam
Hi Stefano,

On Fri, Oct 13, 2017 at 10:27 AM, Fabio Estevam  wrote:
> From: Fabio Estevam 
>
> Commit 001cdbbb32ef1f6 ("imx: mx6slevk: enable more DM drivers") breaks
> MMC support in U-Boot proper on the mx6slevk_spl_defconfig target:
>
> U-Boot SPL 2017.09-00396-g6ca43a5 (Oct 01 2017 - 16:20:18)
> Trying to boot from MMC1
>
> U-Boot 2017.09-00396-g6ca43a5 (Oct 01 2017 - 16:20:18 -0300)
>
> CPU:   Freescale i.MX6SL rev1.0 792 MHz (running at 396 MHz)
> CPU:   Commercial temperature grade (0C to 95C) at 33C
> Reset cause: POR
> Board: MX6SLEVK
> I2C:   ready
> DRAM:  1 GiB
> MMC:   FSL_SDHC: 0
> MMC Device 1 not found
> *** Warning - No MMC card found, using default environment
>
> As mx6slevk_spl_defconfig does not use CONFIG_DM_MMC and its
> board file does not register the mmc controller for U-Boot proper,
> let's fix this by adding CONFIG_DM_MMC=y and device tree support.
>
> While at it, add more DM drivers, so that it becomes closer to
> mx6slevk_defconfig.
>
> Signed-off-by: Fabio Estevam 

Could you also please consider this one for the upcoming 2017.11 release?

Thanks
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[U-Boot] [PATCH] sunxi: set the default CPUx frequency of H5 to 816MHz

2017-10-30 Thread Icenowy Zheng
Some H5 boards are designed to start at 1.1V CPUx voltage (e.g. Nano Pi
NEO2), which may not work properly at 1008MHz if the chip's quality is
not so good.

Lower the default CPUx frequency of H5 to 816MHz.

Signed-off-by: Icenowy Zheng 
---
 arch/arm/mach-sunxi/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 09cfec6f57..1fededd0a3 100644
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -397,9 +397,9 @@ config SYS_CLK_FREQ
default 100800 if MACH_SUN5I
default 100800 if MACH_SUN6I
default 91200 if MACH_SUN7I
+   default 81600 if MACH_SUN50I || MACH_SUN50I_H5
default 100800 if MACH_SUN8I
default 100800 if MACH_SUN9I
-   default 81600 if MACH_SUN50I
 
 config SYS_CONFIG_NAME
default "sun4i" if MACH_SUN4I
-- 
2.13.6

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Re: [U-Boot] [PATCH] net: fec_mxc: Change "error frame" message to debug level

2017-10-30 Thread Fabio Estevam
Hi Joe,

On Sun, Oct 15, 2017 at 11:01 AM, Fabio Estevam  wrote:
> From: Fabio Estevam 
>
> As reported by Jonathan Gray:
>
> "After the recent changes to add SimpleNetworkProtocol to efi_loader
> when booting off mmc via an efi payload that doesn't use
> SimpleNetworkProtocol U-Boot's fec_mxc driver will now display
> various "error frame" messages.
> 
> MMC Device 1 not found
> MMC Device 2 not found
> MMC Device 3 not found
> Scanning disks on sata...
> Found 6 disks
> reading efi/boot/bootarm.efi
> 67372 bytes read in 32 ms (2 MiB/s)
> ## Starting EFI application at 1200 ...
>>> OpenBSD/armv7 BOOTARM 1.0
> error frame: 0x8f57ec40 0x3d74
> error frame: 0x8f57ec40 0x7079
> error frame: 0x8f57ec40 0x6964
> error frame: 0x8f57ec40 0x6f6f
> error frame: 0x8f57ec40 0x726f
> error frame: 0x8f57ec40 0x2074
> error frame: 0x8f57ec40 0x6f6f"
>
> Heinrich Schuchardt explains:
>
> "A receive FIFO overrun can be expected if network packages are not
> processed.
> With the network patches we check if a package is available quite often."
>
> Move the "error frame" messages to debug level so that a clean output
> log can be seen.
>
> Reported-by: Jonathan Gray 
> Suggested-by: Heinrich Schuchardt 
> Signed-off-by: Fabio Estevam 

Do you think this one can be applied for 2017.11?

Thanks
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[U-Boot] [PATCH] Update Paul Burton's email address

2017-10-30 Thread Paul Burton
MIPS is no longer a part of Imagination Technologies, and as such my
@imgtec.com email address will soon cease to function. This patch
updates occurrances of it with my new @mips.com email address, and adds
an entry in .mailmap such that git (& tools such as get_maintainer.pl
when examining history) will use the new address.

Signed-off-by: Paul Burton 
Cc: Daniel Schwierzeck 
Cc: u-boot@lists.denx.de

---

 .mailmap| 1 +
 board/imgtec/boston/MAINTAINERS | 2 +-
 board/imgtec/malta/MAINTAINERS  | 2 +-
 board/imgtec/malta/superio.c| 2 +-
 board/imgtec/malta/superio.h| 2 +-
 drivers/pci/pci_msc01.c | 2 +-
 include/msc01.h | 2 +-
 include/pci_msc01.h | 2 +-
 8 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/.mailmap b/.mailmap
index 14b5ad7e5c..bd7267241a 100644
--- a/.mailmap
+++ b/.mailmap
@@ -20,6 +20,7 @@ Jagan Teki 
 Jagan Teki 
 Jagan Teki 
 Markus Klotzbuecher 
+Paul Burton  
 Prabhakar Kushwaha 
 Rajeshwari Shinde 
 Ricardo Ribalda 
diff --git a/board/imgtec/boston/MAINTAINERS b/board/imgtec/boston/MAINTAINERS
index ec850d2f91..81f067d690 100644
--- a/board/imgtec/boston/MAINTAINERS
+++ b/board/imgtec/boston/MAINTAINERS
@@ -1,5 +1,5 @@
 BOSTON BOARD
-M: Paul Burton 
+M: Paul Burton 
 S: Maintained
 F: board/imgtec/boston/
 F: include/configs/boston.h
diff --git a/board/imgtec/malta/MAINTAINERS b/board/imgtec/malta/MAINTAINERS
index 052ec67b14..b1cf297f4f 100644
--- a/board/imgtec/malta/MAINTAINERS
+++ b/board/imgtec/malta/MAINTAINERS
@@ -1,5 +1,5 @@
 MALTA BOARD
-M: Paul Burton 
+M: Paul Burton 
 S: Maintained
 F: board/imgtec/malta/
 F: include/configs/malta.h
diff --git a/board/imgtec/malta/superio.c b/board/imgtec/malta/superio.c
index 7865ae2b70..d6ada4f87d 100644
--- a/board/imgtec/malta/superio.c
+++ b/board/imgtec/malta/superio.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton 
+ * Author: Paul Burton 
  *
  * Setup code for the FDC37M817 super I/O controller
  *
diff --git a/board/imgtec/malta/superio.h b/board/imgtec/malta/superio.h
index 271c462eac..f0ae1422b8 100644
--- a/board/imgtec/malta/superio.h
+++ b/board/imgtec/malta/superio.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton 
+ * Author: Paul Burton 
  *
  * Setup code for the FDC37M817 super I/O controller
  *
diff --git a/drivers/pci/pci_msc01.c b/drivers/pci/pci_msc01.c
index 284ffa09b6..a1b9116e4d 100644
--- a/drivers/pci/pci_msc01.c
+++ b/drivers/pci/pci_msc01.c
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton 
+ * Author: Paul Burton 
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
diff --git a/include/msc01.h b/include/msc01.h
index 37cf963f13..7ee243bec3 100644
--- a/include/msc01.h
+++ b/include/msc01.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton 
+ * Author: Paul Burton 
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
diff --git a/include/pci_msc01.h b/include/pci_msc01.h
index 54945a7a8f..066c6622da 100644
--- a/include/pci_msc01.h
+++ b/include/pci_msc01.h
@@ -1,6 +1,6 @@
 /*
  * Copyright (C) 2013 Imagination Technologies
- * Author: Paul Burton 
+ * Author: Paul Burton 
  *
  * SPDX-License-Identifier:GPL-2.0+
  */
-- 
2.14.3

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Re: [U-Boot] [PATCH] configs: vf610: increase maximum size and enforce correct limit

2017-10-30 Thread Tom Rini
On Mon, Oct 30, 2017 at 09:59:04AM +0100, Stefan Agner wrote:
> Hi Tom, Stefano,
> 
> Any chance to get this still into 2017.11? It allows to use 2017.11 on
> my board...

Stefano, this is your call, thanks!

> 
> --
> Stefan
> 
> On 2017-10-17 13:59, Stefan Agner wrote:
> > From: Stefan Agner 
> > 
> > On Vybrid SoCs U-Boot gets loaded into GFX SRAM which is 512KiB.
> > Currently 32KiB is reserved for the IMX header. However, this is
> > not reflected in the size limit. In v2017.11-rc2 the actual size
> > limit (512KiB-32KiB) has been reached for Colibri VF61, which
> > lead to a successful build of U-Boot but not a working binary.
> > 
> > The IMX header is much smaller than 32KiB, typically around 1KiB.
> > Decrease the reserved size to 4KiB and specify the correct U-Boot
> > size limit. Apply this new base address and limit for all Vybrid
> > based boards.
> > 
> > Signed-off-by: Stefan Agner 
> > ---
> > 
> >  include/configs/colibri_vf.h | 4 ++--
> >  include/configs/pcm052.h | 4 ++--
> >  include/configs/vf610twr.h   | 4 ++--
> >  3 files changed, 6 insertions(+), 6 deletions(-)
> > 
> > diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
> > index 8166aa4afb..bf3bbffe24 100644
> > --- a/include/configs/colibri_vf.h
> > +++ b/include/configs/colibri_vf.h
> > @@ -75,8 +75,8 @@
> >  #define CONFIG_FDTADDR 0x8400
> >  
> >  /* We boot from the gfxRAM area of the OCRAM. */
> > -#define CONFIG_SYS_TEXT_BASE   0x3f408000
> > -#define CONFIG_BOARD_SIZE_LIMIT524288
> > +#define CONFIG_SYS_TEXT_BASE   0x3f401000
> > +#define CONFIG_BOARD_SIZE_LIMIT520192
> >  
> >  #define SD_BOOTCMD \
> > "sdargs=root=/dev/mmcblk0p2 rw rootwait\0"  \
> > diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
> > index 8144a83db2..060928bd30 100644
> > --- a/include/configs/pcm052.h
> > +++ b/include/configs/pcm052.h
> > @@ -89,8 +89,8 @@
> >  #define CONFIG_LOADADDR0x8200
> >  
> >  /* We boot from the gfxRAM area of the OCRAM. */
> > -#define CONFIG_SYS_TEXT_BASE   0x3f408000
> > -#define CONFIG_BOARD_SIZE_LIMIT524288
> > +#define CONFIG_SYS_TEXT_BASE   0x3f401000
> > +#define CONFIG_BOARD_SIZE_LIMIT520192
> >  
> >  /* if no target-specific extra environment settings were defined by the
> > target, define an empty one */
> > diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
> > index 3430f27c40..ddfcd6f618 100644
> > --- a/include/configs/vf610twr.h
> > +++ b/include/configs/vf610twr.h
> > @@ -79,8 +79,8 @@
> >  #define CONFIG_SYS_LOAD_ADDR   0x8200
> >  
> >  /* We boot from the gfxRAM area of the OCRAM. */
> > -#define CONFIG_SYS_TEXT_BASE   0x3f408000
> > -#define CONFIG_BOARD_SIZE_LIMIT524288
> > +#define CONFIG_SYS_TEXT_BASE   0x3f401000
> > +#define CONFIG_BOARD_SIZE_LIMIT520192
> >  
> >  /*
> >   * We do have 128MB of memory on the Vybrid Tower board. Leave the last
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Re: [U-Boot] [PATCH] arm64: ls1012ardb: Add distro secure boot support

2017-10-30 Thread Sumit Garg
> -Original Message-
> From: York Sun
> Sent: Tuesday, October 31, 2017 3:51 AM
> To: Sumit Garg ; u-boot@lists.denx.de
> Cc: Ruchika Gupta ; Prabhakar Kushwaha
> 
> Subject: Re: [PATCH] arm64: ls1012ardb: Add distro secure boot support
> 
> On 09/07/2017 10:54 PM, Sumit Garg wrote:
> > Enable validation of boot.scr script prior to its execution dependent
> > on "secureboot" flag in environment. Enable fall back option to qspi
> > boot in case of secure boot.
> >
> > Signed-off-by: Sumit Garg 
> > Tested-by: Vinitha Pillai 
> > ---
> >  configs/ls1012ardb_qspi_SECURE_BOOT_defconfig |  1 +
> >  include/configs/ls1012ardb.h  | 20 ++--
> >  2 files changed, 19 insertions(+), 2 deletions(-)
> >
> 
> This patch doesn't apply at all. Please rebase.
> 
> York

Sure let me rebase this patch.

Sumit
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Re: [U-Boot] [PATCH 1/7] imx: mxc_i2c: tweak the i2c transfer method

2017-10-30 Thread Heiko Schocher

Hello Martyn,

Am 26.10.2017 um 16:47 schrieb Martyn Welch:

From: Nandor Han 

Tweak the i2c transfer to work for devices that want to read data
without addressing a register.

Signed-off-by: Nandor Han 
Signed-off-by: Martyn Welch 
Cc: Heiko Schocher 
Cc: Stefano Babic 
Signed-off-by: Martyn Welch 
---
  drivers/i2c/mxc_i2c.c | 25 +++--
  1 file changed, 15 insertions(+), 10 deletions(-)

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index abf1da2..01f268b 100644
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -317,16 +317,19 @@ static int i2c_init_transfer_(struct mxc_i2c_bus 
*i2c_bus, u8 chip,
temp |= I2CR_MTX | I2CR_TX_NO_AK;
writeb(temp, base + (I2CR << reg_shift));
  
-	/* write slave address */

-   ret = tx_byte(i2c_bus, chip << 1);
-   if (ret < 0)
-   return ret;
-
-   while (alen--) {
-   ret = tx_byte(i2c_bus, (addr >> (alen * 8)) & 0xff);
+   if (alen != -1) {


I prefer here a "if (alen >= 0) {"

Thanks!

bye,
Heiko
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Re: [U-Boot] [PATCH] drivers: net: ldpaa_eth: Correct error handler for qbman_swp_acquire()

2017-10-30 Thread Ashish Kumar
Please see inline.

-Original Message-
From: York Sun 
Sent: Tuesday, October 31, 2017 12:32 AM
To: Ashish Kumar ; Roy Pledge 
Cc: joe.hershber...@gmail.com; Prabhakar Kushwaha ; 
u-boot@lists.denx.de
Subject: Re: [PATCH] drivers: net: ldpaa_eth: Correct error handler for 
qbman_swp_acquire()

On 10/29/2017 10:23 PM, Ashish Kumar wrote:
> Hello York,
> 
> The definition of qbman_swp_acquire(), is not owned by u-boot, it is part of 
> qbman drivers which is owned by Roy.
> u-boot gets this definition from flib code and same is used in u-boot as it 
> is.
> 
> So, moving this error handler in qbman_swp_acquire for num == 0, may result 
> in inconsistency in flib code that was provided at the time of integration.
> 

OK. Let's keep it that way.
BTW, please do not top post if you can avoid it. Please always use common 
quotation style when you reply.

Sure, I will take care.

York
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Re: [U-Boot] [Patch V2 1/2] armv8: ls1088ardb: Add SCSI related configs in header file for RDB

2017-10-30 Thread Ashish Kumar
-Original Message-
From: York Sun 
Sent: Tuesday, October 31, 2017 12:37 AM
To: Ashish Kumar ; u-boot@lists.denx.de
Cc: Amrita Kumari 
Subject: Re: [Patch V2 1/2] armv8: ls1088ardb: Add SCSI related configs in 
header file for RDB

On 10/30/2017 12:06 PM, York Sun wrote:
> On 10/29/2017 11:40 PM, Ashish Kumar wrote:
>> Signed-off-by: Amrita Kumari 
>> Signed-off-by: Ashish Kumar 
>> ---
> 
> Change log?
> 
>>  include/configs/ls1088ardb.h | 13 +
>>  1 file changed, 13 insertions(+)
>>
>> diff --git a/include/configs/ls1088ardb.h 
>> b/include/configs/ls1088ardb.h index 958d472..8fdc576 100644
>> --- a/include/configs/ls1088ardb.h
>> +++ b/include/configs/ls1088ardb.h
>> @@ -293,6 +293,19 @@
>>  #define CONFIG_PHY_GIGE
>>  #endif
>>  
>> +/* SATA */
>> +#define CONFIG_LIBATA
>> +#define CONFIG_SCSI_AHCI
>> +#define CONFIG_SCSI_AHCI_PLAT
>> +#define CONFIG_CMD_SCSI
>> +#define CONFIG_SCSI
>> +#define CONFIG_SYS_SATA1AHCI_BASE_ADDR1
>> +
>> +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
>> +#define CONFIG_SYS_SCSI_MAX_LUN 1
>> +#define CONFIG_SYS_SCSI_MAX_DEVICE  (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
>> +CONFIG_SYS_SCSI_MAX_LUN)
>> +
>>  /*  MMC  */
>>  #ifdef CONFIG_MMC
>>  #define CONFIG_FSL_ESDHC
>>
> 
> Please check my comments to your first version. It still applied.

Sorry, my bad. My comment was on the patch submitted by Andy Tang. You both 
changed the same. Please work together to update the patches.

As discussed with Andy, I will send next version. Andy to supersede his patch 
set.

Regards
Ashish

York
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