Re: [U-Boot] [PATCH 2/9] ARM: Factor out reusable psci_cpu_entry
-BEGIN PGP SIGNED MESSAGE- Hash: SHA1 On 2015-02-15 07:29, Jan Kiszka wrote: > On 2015-02-15 03:01, Chen-Yu Tsai wrote: >> Hi, >> >> On Sun, Feb 15, 2015 at 5:28 AM, Jan Kiszka >> wrote: >>> From: Jan Kiszka >>> >>> _sunxi_cpu_entry can be converted completely into a reusable >>> psci_cpu_entry. Tegra124 will use it as well. >>> >>> Signed-off-by: Jan Kiszka --- >>> arch/arm/cpu/armv7/psci.S | 19 +++ >>> arch/arm/cpu/armv7/sunxi/psci.S | 21 ++--- 2 >>> files changed, 21 insertions(+), 19 deletions(-) >>> >>> diff --git a/arch/arm/cpu/armv7/psci.S >>> b/arch/arm/cpu/armv7/psci.S index d688607..e916d71 100644 --- >>> a/arch/arm/cpu/armv7/psci.S +++ b/arch/arm/cpu/armv7/psci.S @@ >>> -170,4 +170,23 @@ ENTRY(psci_cpu_off_common) bx lr >>> ENDPROC(psci_cpu_off_common) >>> >>> +ENTRY(psci_cpu_entry) + @ Set SMP bit + mrc >>> p15, 0, r0, c1, c0, 1 @ ACTLR + orr r0, r0, >>> #(1 << 6) @ Set SMP bit + mcr p15, 0, >>> r0, c1, c0, 1 @ ACTLR + isb + + bl >>> _nonsec_init + bl psci_arch_init + + adr >>> r0, _psci_target_pc + ldr r0, [r0] + b >>> _do_nonsec_entry +ENDPROC(psci_cpu_entry) + +.globl >>> _psci_target_pc +_psci_target_pc: + .word 0 >> >> The sunxi version didn't have a per-core target_pc variable. It >> is still the case here. Is this the correct way to implement it? >> I see per-core storage of this in some of the kernel's smp ops. >> >> On sunxi it works because the only platform using it only has one >> secondary core. >> > > With homogeneous SMP, it probably works as well because reset > vectors may not differ across the cores. But this remains a valid > point. > > I'm considering to push this variable to the top of the per-CPU > stack. Calculating the stack position is actually another function > to factor out. > https://github.com/siemens/u-boot/commits/jetson-tk1-v2 works fine on the TK1, but I'd like to give it a try on a Banana Pi as well (currently out of reach) before reposting. Jan -BEGIN PGP SIGNATURE- Version: GnuPG v2 iEYEARECAAYFAlTgawwACgkQitSsb3rl5xQCqgCg1cQM3fGHRbU4VhvHlfvwMkFa 2MwAnRy3lYcAXeCYiCfk8h5WlRLxIxRx =tcEk -END PGP SIGNATURE- ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] u-boot sunxi fel plan for v2015.04
On Fri, 13 Feb 2015 16:50:49 -0500 Tom Rini wrote: > On Fri, Feb 13, 2015 at 09:19:08AM +0100, Hans de Goede wrote: > > Hi Siarhei and Simon, > > > > I'm wondering what the plan is wrt sunxi FEL booting for u-boot > > v2015.04 I know that you both have been working on this, and I > > think that for v2015.04 Simon's latest set probably is the best > > way forward for now, we're going to need parts of that set > > anyways for the more complete solution Siarhei has. > > > > we could replace the patch adding all the #ifdef's to start.S > > with code saving / restoring PCR15 and friends, that would be > > more cleaner. > > > > So I see 2 ways forwards for v2014.05 > > > > 1) Go with Simon's latest set as is. > > 2) Take the first patches from Simon's set and replace the > > on adding he #ifdef's to start.S with one saving / restoring > > the necessary regs > > > > I've a slight preference for 2. Siarhei, can you perhaps prepare > > a patch-set for 2 for merging for v2014.05 ? > > And when everyone is happy I'll take it via the sunxi tree (And try and > see about giving it a spin on my Lime2). Thanks! Thanks for clarifying this. Simon, could you please confirm that you are not going to do anything anymore with the third patch from your sunxi FEL fixes set? Hans, could you please queue Simon's patches in the sunxi next branch just like Tom suggested (and after the status of the third patch becomes more clear)? If I don't get any response in a few hours, I will just assume that the third Simon's patch is to be kept as-is and submit additional patches to be applied on top of it. We are not exactly losing time. The sunxi FEL patches are getting additional testing every day by me and also by other people (thanks Karsten!). But missing the -rc2 release would not be great. Thanks to everyone for doing a great job. The FEL mode support is going to be much better than before. -- Best regards, Siarhei Siamashka ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] mx6sx: pins: Enable SION for I2C3 iomux setting
Hi guys, On 02/10/2015 12:18 PM, Stefano Babic wrote: Hi, On 09/02/2015 14:27, Li Ye-B37916 wrote: Hi Stefano, Nikolay, On 1/30/2015 1:54 AM, Stefano Babic wrote: Hi, On 12/01/2015 11:37, Nikolay Dimitrov wrote: Hi Ye.Li, On 01/12/2015 10:46 AM, Ye.Li wrote: The I2C SDA and SCL require the IOMUX SION bit set to get input signal. Signed-off-by: Ye.Li --- arch/arm/include/asm/arch-mx6/mx6sx_pins.h |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-mx6/mx6sx_pins.h b/arch/arm/include/asm/arch-mx6/mx6sx_pins.h index 7c6c1e8..da8c698 100644 --- a/arch/arm/include/asm/arch-mx6/mx6sx_pins.h +++ b/arch/arm/include/asm/arch-mx6/mx6sx_pins.h @@ -420,7 +420,7 @@ enum { MX6_PAD_KEY_COL4__KPP_COL_4= IOMUX_PAD(0x03FC, 0x00B4, 0, 0x, 0, 0), MX6_PAD_KEY_COL4__ENET2_MDC= IOMUX_PAD(0x03FC, 0x00B4, 1, 0x, 0, 0), - MX6_PAD_KEY_COL4__I2C3_SCL = IOMUX_PAD(0x03FC, 0x00B4, 2, 0x07B8, 2, 0), + MX6_PAD_KEY_COL4__I2C3_SCL = IOMUX_PAD(0x03FC, 0x00B4, IOMUX_CONFIG_SION | 2, 0x07B8, 2, 0), MX6_PAD_KEY_COL4__USDHC2_LCTL = IOMUX_PAD(0x03FC, 0x00B4, 3, 0x, 0, 0), MX6_PAD_KEY_COL4__AUDMUX_AUD5_RXC = IOMUX_PAD(0x03FC, 0x00B4, 4, 0x0664, 0, 0), MX6_PAD_KEY_COL4__GPIO2_IO_14 = IOMUX_PAD(0x03FC, 0x00B4, 5, 0x, 0, 0), @@ -467,7 +467,7 @@ enum { MX6_PAD_KEY_ROW4__KPP_ROW_4= IOMUX_PAD(0x0410, 0x00C8, 0, 0x, 0, 0), MX6_PAD_KEY_ROW4__ENET2_MDIO = IOMUX_PAD(0x0410, 0x00C8, 1, 0x0770, 3, 0), - MX6_PAD_KEY_ROW4__I2C3_SDA = IOMUX_PAD(0x0410, 0x00C8, 2, 0x07BC, 2, 0), + MX6_PAD_KEY_ROW4__I2C3_SDA = IOMUX_PAD(0x0410, 0x00C8, IOMUX_CONFIG_SION | 2, 0x07BC, 2, 0), MX6_PAD_KEY_ROW4__USDHC1_LCTL = IOMUX_PAD(0x0410, 0x00C8, 3, 0x, 0, 0), MX6_PAD_KEY_ROW4__AUDMUX_AUD5_RXFS = IOMUX_PAD(0x0410, 0x00C8, 4, 0x0668, 0, 0), MX6_PAD_KEY_ROW4__GPIO2_IO_19 = IOMUX_PAD(0x0410, 0x00C8, 5, 0x, 0, 0), Usually the SCL is output-only, driven by the I2C master. Why do you need to enable SION bit on SCL, if the pin will be used as output-only? Right - I do not see why SION should be set. Regards, Stefano Babic Setting SION to both SDA and SCL is required by i.MX6 reference manual. You can find the information below from i2c chapter. 34.2 External Signals This section discusses I2C signals that connect off-chip. For I2C compliance, all devices connected to the I2Cn_SCL and I2Cn_SDA signals must have open-drain or open-collector outputs. The logic AND function is implemented on both lines with external pull-up resistors. Inputs of I2Cn_SCL and I2Cn_SDA also need to be manually enabled by setting the SION bit in the IOMUX after the corresponding PADs are selected as I2C function. Checked in manual, thanks for link. However, I have still a couple of questions. The controller can work as slave or as master, and according to the manual, the slave is the default after a reset. I understand that putting the controller into slave mode must require the SION bit set. Anyway, you are using I2C3 as master in your patch 4/4. Is it still mandatory even in this case to set the SION bit ? The manual states that to use the signal as input the SION bit must be set, but as far as I see in the patchset SCL is output only. Just tested the behavior of SION bit on imx6sl (riotboard), as I don't have imx6sx hardware. For the test I used I2C4, located on expansion connector J13. I verified that the SION bits are enabled after boot: # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO07 IOMUXC_SW_MUX_CTL_PAD_GPIO07:0x020e0238 =0x0018 # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO08 IOMUXC_SW_MUX_CTL_PAD_GPIO08:0x020e023c =0x0018 I also verified that the I2C interface works as expected (by observing I2C transactions on a digital scope): i2cdetect -y 3 This works so far. Then I disabled the SION bits for both iomuxes: # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO07 0x08 IOMUXC_SW_MUX_CTL_PAD_GPIO07:0x020e0238 =0x0018 IOMUXC_SW_MUX_CTL_PAD_GPIO07:0x020e0238 == 0x0018...0x0008 # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO08 0x08 IOMUXC_SW_MUX_CTL_PAD_GPIO08:0x020e023c =0x0018 IOMUXC_SW_MUX_CTL_PAD_GPIO08:0x020e023c == 0x0018...0x0008 Now interface I2C4 doesn't work anymore. Instead of complete I2C transactions, I see just a single pulses on both clock/data lines, repeated on each 500ms. At the same time i2cdetect scans the address space much more slowly than usual, and it looks like it timeouts on each single address check for the same amount of time (500ms). Restoring the SION bits for clock & data restores the I2C4 functionality. All the time
Re: [U-Boot] u-boot sunxi fel plan for v2015.04
Hi Siarhei, On 15 February 2015 at 07:43, Siarhei Siamashka wrote: > On Fri, 13 Feb 2015 16:50:49 -0500 > Tom Rini wrote: > >> On Fri, Feb 13, 2015 at 09:19:08AM +0100, Hans de Goede wrote: >> > Hi Siarhei and Simon, >> > >> > I'm wondering what the plan is wrt sunxi FEL booting for u-boot >> > v2015.04 I know that you both have been working on this, and I >> > think that for v2015.04 Simon's latest set probably is the best >> > way forward for now, we're going to need parts of that set >> > anyways for the more complete solution Siarhei has. >> > >> > we could replace the patch adding all the #ifdef's to start.S >> > with code saving / restoring PCR15 and friends, that would be >> > more cleaner. >> > >> > So I see 2 ways forwards for v2014.05 >> > >> > 1) Go with Simon's latest set as is. >> > 2) Take the first patches from Simon's set and replace the >> > on adding he #ifdef's to start.S with one saving / restoring >> > the necessary regs >> > >> > I've a slight preference for 2. Siarhei, can you perhaps prepare >> > a patch-set for 2 for merging for v2014.05 ? >> >> And when everyone is happy I'll take it via the sunxi tree (And try and >> see about giving it a spin on my Lime2). Thanks! > > Thanks for clarifying this. > > Simon, could you please confirm that you are not going to do anything > anymore with the third patch from your sunxi FEL fixes set? That is fine with me. I am no expert in this area and was just trying to solve the low-level problem in U-Boot. > > Hans, could you please queue Simon's patches in the sunxi next branch > just like Tom suggested (and after the status of the third patch becomes > more clear)? > > If I don't get any response in a few hours, I will just assume that > the third Simon's patch is to be kept as-is and submit additional > patches to be applied on top of it. That seems like the best idea. > > We are not exactly losing time. The sunxi FEL patches are getting > additional testing every day by me and also by other people (thanks > Karsten!). But missing the -rc2 release would not be great. > > Thanks to everyone for doing a great job. The FEL mode support is > going to be much better than before. Indeed. More compatible with U-Boot, more general-purpose and definitely more glorious. Thanks for chasing all this down. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH v3 07/14] dm: eth: Add basic driver model support to Ethernet stack
Hi Joe, On 10 February 2015 at 18:30, Joe Hershberger wrote: > First just add support for MAC drivers. It has taken me a while to get through all this unfortunately. This seems OK to me but needs a clean-up with more comments, etc. If you like these could go in a separate patch, so if you want to do that please add my Reviewed-by: Simon Glass to this one. I would prefer that we sort out the bind/probe problem before this is merged but I understand you now have quite a bit of work built on top, and the problems can be separated. So if you like we could do one more version, merge it, and continue with refinements after that. > > Signed-off-by: Joe Hershberger > > --- > > Changes in v3: > -Correct the pre_unbind logic > -Correct failure chaining from bind to probe to init > --Fail init if not activated > --Fail probe if ethaddr not set > -Update ethaddr from env unconditionally on init > -Use set current to select the current device regardless of the previous > selection > -Allow current eth dev to be NULL > -Fixed blank line formatting for variable declaration > > Changes in v2: > -Updated comments > -Removed extra parentheses > -Changed eth_uclass_priv local var names to be uc_priv > -Update error codes > -Cause an invalid name to fail binding > -Rebase on top of dm/master > -Stop maintaining our own index and use DM seq now that it works for our needs > -Move the hwaddr to platdata so that its memory is allocated at bind when we > need it > -Prevent device from being probed before used by a command (i.e. before > eth_init()). > > common/board_r.c | 4 +- > common/cmd_bdinfo.c| 2 + > include/dm/uclass-id.h | 1 + > include/net.h | 25 > net/eth.c | 336 > - > 5 files changed, 361 insertions(+), 7 deletions(-) > > diff --git a/common/board_r.c b/common/board_r.c > index 68a9448..75147b7 100644 > --- a/common/board_r.c > +++ b/common/board_r.c > @@ -556,7 +556,7 @@ static int initr_bbmii(void) > } > #endif > > -#ifdef CONFIG_CMD_NET > +#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) > static int initr_net(void) > { > puts("Net: "); > @@ -825,7 +825,7 @@ init_fnc_t init_sequence_r[] = { > #ifdef CONFIG_BITBANGMII > initr_bbmii, > #endif > -#ifdef CONFIG_CMD_NET > +#if defined(CONFIG_CMD_NET) && !defined(CONFIG_DM_ETH) > INIT_FUNC_WATCHDOG_RESET > initr_net, > #endif > diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c > index e6d8a7a..8688cf9 100644 > --- a/common/cmd_bdinfo.c > +++ b/common/cmd_bdinfo.c > @@ -34,6 +34,7 @@ static void print_eth(int idx) > printf("%-12s= %s\n", name, val); > } > > +#ifndef CONFIG_DM_ETH > __maybe_unused > static void print_eths(void) > { > @@ -52,6 +53,7 @@ static void print_eths(void) > printf("current eth = %s\n", eth_get_name()); > printf("ip_addr = %s\n", getenv("ipaddr")); > } > +#endif > > __maybe_unused > static void print_lnum(const char *name, unsigned long long value) > diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h > index 91bb90d..ad96682 100644 > --- a/include/dm/uclass-id.h > +++ b/include/dm/uclass-id.h > @@ -34,6 +34,7 @@ enum uclass_id { > UCLASS_I2C_GENERIC, /* Generic I2C device */ > UCLASS_I2C_EEPROM, /* I2C EEPROM device */ > UCLASS_MOD_EXP, /* RSA Mod Exp device */ > + UCLASS_ETH, /* Ethernet device */ > > UCLASS_COUNT, > UCLASS_INVALID = -1, > diff --git a/include/net.h b/include/net.h > index 4d7575e..11471bd 100644 > --- a/include/net.h > +++ b/include/net.h > @@ -78,6 +78,30 @@ enum eth_state_t { > ETH_STATE_ACTIVE > }; > > +#ifdef CONFIG_DM_ETH > +struct eth_pdata { > + phys_addr_t iobase; > + unsigned char enetaddr[6]; > +}; > + > +struct eth_ops { > + int (*init)(struct udevice *dev, bd_t *bis); Why do we pass in bd_t? Isn't that available through gd->bd? > + int (*send)(struct udevice *dev, void *packet, int length); > + int (*recv)(struct udevice *dev); > + void (*halt)(struct udevice *dev); > +#ifdef CONFIG_MCAST_TFTP > + int (*mcast)(struct udevice *dev, const u8 *enetaddr, u8 set); s/u8/bool/ or maybe int? On ARM at least it is inefficient to keep having to mask the parameters. > +#endif > + int (*write_hwaddr)(struct udevice *dev); > +}; Can you please add interface comments on all of these plus the four below? I'm trying to make driver model an opportunity to improve the code as we go. Things like what the function does, what packet contains. > + > +struct udevice *eth_get_dev(void); /* get the current device */ > +unsigned char *eth_get_ethaddr(void); /* get the current device MAC */ > +int eth_init_state_only(bd_t *bis); /* Set active state */ > +void eth_halt_state_only(void); /* Set passive state */ Can you expand these a bit? The first one can return NULL in some situations. The second returns a p
Re: [U-Boot] [RFC PATCH v3 08/14] dm: eth: Add network support to sandbox
Hi Joe, On 10 February 2015 at 18:30, Joe Hershberger wrote: > Add basic network support to sandbox which includes a network driver. > > Signed-off-by: Joe Hershberger > Reviewed-by: Simon Glass > > --- > > Changes in v3: > -Added 2 more ethaddr to sandbox > -Print which device in the debug write hwaddr > > Changes in v2: > -Change printfs to debug in sandbox driver > -Remove unused priv struct for sandbox driver > > arch/sandbox/dts/sandbox.dts | 4 +++ > drivers/net/Makefile | 1 + > drivers/net/sandbox.c| 86 > > include/configs/sandbox.h| 18 +++--- > 4 files changed, 104 insertions(+), 5 deletions(-) > create mode 100644 drivers/net/sandbox.c > > diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts > index 4c63e4f..502eb3d 100644 > --- a/arch/sandbox/dts/sandbox.dts > +++ b/arch/sandbox/dts/sandbox.dts > @@ -183,4 +183,8 @@ > }; > }; > > + eth@10002000 { > + compatible = "sandbox,eth"; > + reg = <0x10002000 0x1000>; > + }; > }; > diff --git a/drivers/net/Makefile b/drivers/net/Makefile > index 46c4ac6..15dc431 100644 > --- a/drivers/net/Makefile > +++ b/drivers/net/Makefile > @@ -50,6 +50,7 @@ obj-$(CONFIG_NS8382X) += ns8382x.o > obj-$(CONFIG_PCNET) += pcnet.o > obj-$(CONFIG_RTL8139) += rtl8139.o > obj-$(CONFIG_RTL8169) += rtl8169.o > +obj-$(CONFIG_ETH_SANDBOX) += sandbox.o > obj-$(CONFIG_SH_ETHER) += sh_eth.o > obj-$(CONFIG_SMC9) += smc9.o > obj-$(CONFIG_SMC911X) += smc911x.o > diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c > new file mode 100644 > index 000..2a2ad41 > --- /dev/null > +++ b/drivers/net/sandbox.c > @@ -0,0 +1,86 @@ > +/* > + * Copyright (c) 2015 National Instruments > + * > + * (C) Copyright 2015 > + * Joe Hershberger > + * > + * SPDX-License-Identifier:GPL-2.0+ > + */ > + > +#include > +#include > +#include > +#include > +#include > + > +DECLARE_GLOBAL_DATA_PTR; > + > +static int sb_eth_init(struct udevice *dev, bd_t *bis) > +{ > + debug("eth_sandbox: Init\n"); > + > + return 0; > +} > + > +static int sb_eth_send(struct udevice *dev, void *packet, int length) > +{ > + debug("eth_sandbox: Send packet %d\n", length); > + > + return 0; > +} > + > +static int sb_eth_recv(struct udevice *dev) > +{ > + return 0; > +} > + > +static void sb_eth_halt(struct udevice *dev) > +{ > + debug("eth_sandbox: Halt\n"); > +} > + > +static int sb_eth_write_hwaddr(struct udevice *dev) > +{ > + struct eth_pdata *pdata = dev->platdata; > + debug("eth_sandbox %s: Write HW ADDR - %pM\n", dev->name, > + pdata->enetaddr); > + return 0; > +} > + > +static const struct eth_ops sb_eth_ops = { > + .init = sb_eth_init, > + .send = sb_eth_send, > + .recv = sb_eth_recv, > + .halt = sb_eth_halt, > + .write_hwaddr = sb_eth_write_hwaddr, > +}; > + > +static int sb_eth_remove(struct udevice *dev) > +{ > + return 0; > +} > + > +#ifdef CONFIG_OF_CONTROL > +static int sb_eth_ofdata_to_platdata(struct udevice *dev) > +{ > + struct eth_pdata *pdata = dev->platdata; > + > + pdata->iobase = fdtdec_get_addr(gd->fdt_blob, dev->of_offset, "reg"); > + return 0; > +} > + > +static const struct udevice_id sb_eth_ids[] = { > + { .compatible = "sandbox,eth" }, > + { } > +}; > +#endif > + > +U_BOOT_DRIVER(eth_sandbox) = { > + .name = "eth_sandbox", > + .id = UCLASS_ETH, > + .of_match = of_match_ptr(sb_eth_ids), > + .ofdata_to_platdata = of_match_ptr(sb_eth_ofdata_to_platdata), > + .remove = sb_eth_remove, > + .ops= &sb_eth_ops, > + .platdata_auto_alloc_size = sizeof(struct eth_pdata), > +}; > diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h > index e9d3f32..fdba1c8 100644 > --- a/include/configs/sandbox.h > +++ b/include/configs/sandbox.h > @@ -139,9 +139,9 @@ > /* include default commands */ > #include > > -/* We don't have networking support yet */ > -#undef CONFIG_CMD_NET > -#undef CONFIG_CMD_NFS > +#define CONFIG_DM_ETH > +#define CONFIG_ETH_SANDBOX > +#define CONFIG_CMD_PING > > #define CONFIG_CMD_HASH > #define CONFIG_HASH_VERIFY > @@ -184,12 +184,20 @@ > > #define CONFIG_EXTRA_ENV_SETTINGS "stdin=serial,cros-ec-keyb\0" \ > "stdout=serial,lcd\0" \ > - "stderr=serial,lcd\0" > + "stderr=serial,lcd\0" \ > + "ethaddr=00:00:11:22:33:44\0" \ > + "eth1addr=00:00:11:22:33:45\0" \ > + "eth2addr=00:00:11:22:33:46\0" \ > + "ipaddr=1.2.3.4\0" > #else > > #define CONFIG_EXTRA_ENV_SETTINGS
Re: [U-Boot] [RFC PATCH v3 09/14] dm: eth: Add ARP and PING response to sandbox driver
Hi Joe, On 10 February 2015 at 18:30, Joe Hershberger wrote: > The sandbox driver will now generate response traffic to exercise the > ping command even when no network exists. This allows the basic data > pathways of the DM to be tested. > > Signed-off-by: Joe Hershberger > Reviewed-by: Simon Glass > --- > > Changes in v3: > -Prevent a crash if memory is not allocated > > Changes in v2: > -Change printfs to debug in sandbox driver > -Move static data to priv > -Move fake hwaddr to the device tree > > arch/sandbox/dts/sandbox.dts | 1 + > drivers/net/sandbox.c| 101 > +++ > 2 files changed, 102 insertions(+) > > diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts > index 502eb3d..ba635e8 100644 > --- a/arch/sandbox/dts/sandbox.dts > +++ b/arch/sandbox/dts/sandbox.dts > @@ -186,5 +186,6 @@ > eth@10002000 { > compatible = "sandbox,eth"; > reg = <0x10002000 0x1000>; > + fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x00>; > }; > }; > diff --git a/drivers/net/sandbox.c b/drivers/net/sandbox.c > index 2a2ad41..f9fa1a1 100644 > --- a/drivers/net/sandbox.c > +++ b/drivers/net/sandbox.c > @@ -15,22 +15,121 @@ > > DECLARE_GLOBAL_DATA_PTR; > > +struct eth_sandbox_priv { > + uchar fake_host_hwaddr[ARP_HLEN]; > + IPaddr_t fake_host_ipaddr; > + uchar recv_packet_buffer[PKTSIZE]; > + int recv_packet_length; > +}; > + > static int sb_eth_init(struct udevice *dev, bd_t *bis) > { > debug("eth_sandbox: Init\n"); > > + struct eth_sandbox_priv *priv = dev->priv; > + u32 int_array[ARP_HLEN]; > + int i; > + > + if (!priv) > + return -EINVAL; How can this happen? > + > + fdtdec_get_int_array(gd->fdt_blob, dev->of_offset, "fake-host-hwaddr", > +int_array, ARP_HLEN); > + for (i = 0; i < ARP_HLEN; i++) > + priv->fake_host_hwaddr[i] = (uchar)int_array[i]; > + > return 0; > } > > static int sb_eth_send(struct udevice *dev, void *packet, int length) > { > debug("eth_sandbox: Send packet %d\n", length); > + struct eth_sandbox_priv *priv = dev->priv; > + struct ethernet_hdr *eth = packet; > + > + if (ntohs(eth->et_protlen) == PROT_ARP) { > + struct arp_hdr *arp = packet + ETHER_HDR_SIZE; > + if (ntohs(arp->ar_op) == ARPOP_REQUEST) { > + /* store this as the assumed IP of the fake host */ > + priv->fake_host_ipaddr = NetReadIP(&arp->ar_tpa); > + /* Formulate a fake response */ > + struct ethernet_hdr *eth_recv = > + (void *)priv->recv_packet_buffer; > + memcpy(eth_recv->et_dest, eth->et_src, ARP_HLEN); > + memcpy(eth_recv->et_src, priv->fake_host_hwaddr, > + ARP_HLEN); > + eth_recv->et_protlen = htons(PROT_ARP); > + > + struct arp_hdr *arp_recv = > + (void *)priv->recv_packet_buffer + > + ETHER_HDR_SIZE; > + arp_recv->ar_hrd = htons(ARP_ETHER); > + arp_recv->ar_pro = htons(PROT_IP); > + arp_recv->ar_hln = ARP_HLEN; > + arp_recv->ar_pln = ARP_PLEN; > + arp_recv->ar_op = htons(ARPOP_REPLY); > + memcpy(&arp_recv->ar_sha, priv->fake_host_hwaddr, > + ARP_HLEN); > + NetWriteIP(&arp_recv->ar_spa, priv->fake_host_ipaddr); > + memcpy(&arp_recv->ar_tha, &arp->ar_sha, ARP_HLEN); > + NetCopyIP(&arp_recv->ar_tpa, &arp->ar_spa); > + > + priv->recv_packet_length = ETHER_HDR_SIZE + > + ARP_HDR_SIZE; > + } > + } else if (ntohs(eth->et_protlen) == PROT_IP) { > + struct ip_udp_hdr *ip = packet + ETHER_HDR_SIZE; > + if (ip->ip_p == IPPROTO_ICMP) { > + struct icmp_hdr *icmp = (struct icmp_hdr > *)&ip->udp_src; > + if (icmp->type == ICMP_ECHO_REQUEST) { > + /* reply to the ping */ > + memcpy(priv->recv_packet_buffer, packet, > + length); > + struct ethernet_hdr *eth_recv = > + (void *)priv->recv_packet_buffer; > + struct ip_udp_hdr *ipr = > + (void *)priv->recv_packet_buffer + > + ETHER_HDR_SIZE; > + struct icmp_hdr *icmpr = > + (struct icmp_hdr
Re: [U-Boot] [RFC PATCH v3 10/14] test: dm: eth: Add tests for the eth dm implementation
On 10 February 2015 at 18:30, Joe Hershberger wrote: > Signed-off-by: Joe Hershberger > > --- This needs a commit message describing what is added. With that: Reviewed-by: Simon Glass > > Changes in v3: > -Added dm eth testing > > Changes in v2: None > > test/dm/Makefile | 1 + > test/dm/eth.c| 39 +++ > test/dm/test.dts | 18 ++ > 3 files changed, 58 insertions(+) > create mode 100644 test/dm/eth.c > > diff --git a/test/dm/Makefile b/test/dm/Makefile > index 1d9148f..b2eb989 100644 > --- a/test/dm/Makefile > +++ b/test/dm/Makefile > @@ -17,6 +17,7 @@ obj-$(CONFIG_DM_TEST) += ut.o > obj-$(CONFIG_DM_TEST) += core.o > obj-$(CONFIG_DM_TEST) += ut.o > ifneq ($(CONFIG_SANDBOX),) > +obj-$(CONFIG_DM_ETH) += eth.o > obj-$(CONFIG_DM_GPIO) += gpio.o > obj-$(CONFIG_DM_I2C) += i2c.o > obj-$(CONFIG_DM_SPI_FLASH) += sf.o > diff --git a/test/dm/eth.c b/test/dm/eth.c > new file mode 100644 > index 000..2b29fa2 > --- /dev/null > +++ b/test/dm/eth.c > @@ -0,0 +1,39 @@ > +/* > + * Copyright (c) 2015 National Instruments > + * > + * (C) Copyright 2015 > + * Joe Hershberger > + * > + * SPDX-License-Identifier:GPL-2.0+ > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +DECLARE_GLOBAL_DATA_PTR; > + > +static int dm_test_eth(struct dm_test_state *dms) > +{ > + NetPingIP = string_to_ip("1.1.2.2"); > + > + setenv("ethact", "eth@10002000"); > + ut_assertok(NetLoop(PING)); > + ut_asserteq_str("eth@10002000", getenv("ethact")); > + > + setenv("ethact", "eth@10003000"); > + ut_assertok(NetLoop(PING)); > + ut_asserteq_str("eth@10003000", getenv("ethact")); > + > + setenv("ethact", "eth@10004000"); > + ut_assertok(NetLoop(PING)); > + ut_asserteq_str("eth@10004000", getenv("ethact")); > + > + return 0; > +} > + > +DM_TEST(dm_test_eth, DM_TESTF_SCAN_FDT); > diff --git a/test/dm/test.dts b/test/dm/test.dts > index 84024a4..2f68cdf 100644 > --- a/test/dm/test.dts > +++ b/test/dm/test.dts > @@ -149,4 +149,22 @@ > }; > }; > > + eth@10002000 { > + compatible = "sandbox,eth"; > + reg = <0x10002000 0x1000>; > + fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x00>; > + }; > + > + eth@10003000 { > + compatible = "sandbox,eth"; > + reg = <0x10003000 0x1000>; > + fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x11>; > + }; > + > + eth@10004000 { > + compatible = "sandbox,eth"; > + reg = <0x10004000 0x1000>; > + fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x22>; > + }; > + > }; > -- > 1.7.11.5 > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH v3 12/14] dm: eth: Add support for ethprime env var
Hi Joe, On 10 February 2015 at 18:30, Joe Hershberger wrote: > The ethprime env var is used to indicate the starting device if none is > specified in ethact. Also support aliases specified in the ethprime var. > > Signed-off-by: Joe Hershberger Reviewed-by: Simon Glass Two nits below. > > --- > > Changes in v3: > -Added support for ethprime > > Changes in v2: None > > net/eth.c | 13 - > test/dm/eth.c | 21 + > 2 files changed, 33 insertions(+), 1 deletion(-) > > diff --git a/net/eth.c b/net/eth.c > index 762effe..1770662 100644 > --- a/net/eth.c > +++ b/net/eth.c > @@ -893,8 +893,19 @@ void eth_set_current(void) > act = getenv("ethact"); > env_changed_id = env_id; > } > - if (act != NULL) > + > + if (act == NULL) { > + char *ethprime = getenv("ethprime"); > + > + if (ethprime && eth_get_dev_by_name(ethprime)) { > + eth_set_dev(eth_get_dev_by_name(ethprime)); Can you store the result of eth_get_dev_by_name() and reuse it? It seems like an expensive function. > + } else { > + eth_set_dev(NULL); > + eth_set_current_to_next(); > + } > + } else { > eth_set_dev(eth_get_dev_by_name(act)); > + } > > eth_current_changed(); > } > diff --git a/test/dm/eth.c b/test/dm/eth.c > index c0a8ab5..b39a94a 100644 > --- a/test/dm/eth.c > +++ b/test/dm/eth.c > @@ -62,3 +62,24 @@ static int dm_test_eth_alias(struct dm_test_state *dms) > } > > DM_TEST(dm_test_eth_alias, DM_TESTF_SCAN_FDT); > + > +static int dm_test_eth_prime(struct dm_test_state *dms) > +{ > + NetPingIP = string_to_ip("1.1.2.2"); > + > + /* Expected to be "eth@10003000" because of ethprime variable */ > + setenv("ethact", NULL); > + setenv("ethprime", "eth5"); > + ut_assertok(NetLoop(PING)); > + ut_asserteq_str("eth@10003000", getenv("ethact")); > + > + /* Expected to be "eth@10002000" because it is first */ > + setenv("ethact", NULL); > + setenv("ethprime", NULL); > + ut_assertok(NetLoop(PING)); > + ut_asserteq_str("eth@10002000", getenv("ethact")); > + > + return 0; > +} > + Can you remove this blank line so it is consistent with other test files? > +DM_TEST(dm_test_eth_prime, DM_TESTF_SCAN_FDT); > -- > 1.7.11.5 > Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH v3 11/14] dm: eth: Add support for aliases
Hi Joe, On 10 February 2015 at 18:30, Joe Hershberger wrote: > Allow network devices to be referred to as "eth0" instead of > "eth@12345678" when specified in ethact. > > Add tests to verify this behavior. > > Signed-off-by: Joe Hershberger > > --- > > Changes in v3: > -Added support for aliases > > Changes in v2: None > > include/configs/sandbox.h | 4 ++-- > include/fdtdec.h | 1 + > include/net.h | 5 + > lib/fdtdec.c | 1 + > net/eth.c | 53 > +++ > test/dm/eth.c | 25 ++ > test/dm/test.dts | 10 + > 7 files changed, 84 insertions(+), 15 deletions(-) > > diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h > index fdba1c8..9df5f74 100644 > --- a/include/configs/sandbox.h > +++ b/include/configs/sandbox.h > @@ -187,7 +187,7 @@ > "stderr=serial,lcd\0" \ > "ethaddr=00:00:11:22:33:44\0" \ > "eth1addr=00:00:11:22:33:45\0" \ > - "eth2addr=00:00:11:22:33:46\0" \ > + "eth5addr=00:00:11:22:33:46\0" \ > "ipaddr=1.2.3.4\0" > #else > > @@ -196,7 +196,7 @@ > "stderr=serial,lcd\0" \ > "ethaddr=00:00:11:22:33:44\0" \ > "eth1addr=00:00:11:22:33:45\0" \ > - "eth2addr=00:00:11:22:33:46\0" \ > + "eth5addr=00:00:11:22:33:46\0" \ > "ipaddr=1.2.3.4\0" > #endif > > diff --git a/include/fdtdec.h b/include/fdtdec.h > index 231eed7..e945baa 100644 > --- a/include/fdtdec.h > +++ b/include/fdtdec.h > @@ -167,6 +167,7 @@ enum fdt_compat_id { > COMPAT_INTEL_GMA, /* Intel Graphics Media Accelerator */ > COMPAT_AMS_AS3722, /* AMS AS3722 PMIC */ > COMPAT_INTEL_ICH_SPI, /* Intel ICH7/9 SPI controller */ > + COMPAT_ETHERNET,/* Ethernet devices */ SANDBOX_ETHERNET > > COMPAT_COUNT, > }; > diff --git a/include/net.h b/include/net.h > index 11471bd..4e98850 100644 > --- a/include/net.h > +++ b/include/net.h > @@ -38,6 +38,8 @@ > > #define PKTALIGN ARCH_DMA_MINALIGN > > +#define ETH_MAX_DEVS 32 > + > /* IPv4 addresses are always 32 bits in size */ > typedef __be32 IPaddr_t; > > @@ -79,6 +81,8 @@ enum eth_state_t { > }; > > #ifdef CONFIG_DM_ETH > +#define ETH_ALIAS_ROOT "eth" > + > struct eth_pdata { > phys_addr_t iobase; > unsigned char enetaddr[6]; > @@ -96,6 +100,7 @@ struct eth_ops { > }; > > struct udevice *eth_get_dev(void); /* get the current device */ > +struct udevice *eth_get_dev_by_name(const char *devname); > unsigned char *eth_get_ethaddr(void); /* get the current device MAC */ > int eth_init_state_only(bd_t *bis); /* Set active state */ > void eth_halt_state_only(void); /* Set passive state */ > diff --git a/lib/fdtdec.c b/lib/fdtdec.c > index 5bf8f29..33b0a53 100644 > --- a/lib/fdtdec.c > +++ b/lib/fdtdec.c > @@ -75,6 +75,7 @@ static const char * const compat_names[COMPAT_COUNT] = { > COMPAT(INTEL_GMA, "intel,gma"), > COMPAT(AMS_AS3722, "ams,as3722"), > COMPAT(INTEL_ICH_SPI, "intel,ich-spi"), > + COMPAT(ETHERNET, "eth"), sandbox,eth > }; > > const char *fdtdec_get_compatible(enum fdt_compat_id id) > diff --git a/net/eth.c b/net/eth.c > index e84b948..762effe 100644 > --- a/net/eth.c > +++ b/net/eth.c > @@ -10,11 +10,14 @@ > #include > #include > #include > +#include > #include > #include > #include > #include > > +DECLARE_GLOBAL_DATA_PTR; > + > void eth_parse_enetaddr(const char *addr, uchar *enetaddr) > { > char *end; > @@ -121,6 +124,39 @@ static void eth_set_dev(struct udevice *dev) > uc_priv->current = dev; > } > > +/* > + * Find the udevice that either has the name passed in as devname or has an > + * alias named devname. > + */ > +struct udevice *eth_get_dev_by_name(const char *devname) > +{ > + int node_list[ETH_MAX_DEVS]; > + int count; > + int seq; > + char *endp = NULL; > + const char *true_name = devname; > + struct udevice *it; > + struct uclass *uc; > + > + count = fdtdec_find_aliases_for_id(gd->fdt_blob, ETH_ALIAS_ROOT, > + COMPAT_ETHERNET, node_list, > + ETH_MAX_DEVS); > + > + seq = simple_strtoul(devname + strlen(ETH_ALIAS_ROOT), &endp, 10); > + > + if (endp > devname + strlen(ETH_ALIAS_ROOT) && count > seq && > + node_list[seq]) > + true_name = fdt_get_name(gd->fdt_blob, node_list[seq], NULL); > + > + uclass_
Re: [U-Boot] [RFC PATCH v3 13/14] dm: eth: Add testing for netretry env var
On 10 February 2015 at 18:30, Joe Hershberger wrote: > Make sure that the retry behavior occurs as expected. > > Signed-off-by: Joe Hershberger Reviewed-by: Simon Glass Nit below. > > --- > > Changes in v3: > -Added testing for netretry > > Changes in v2: None > > test/dm/eth.c | 25 + > 1 file changed, 25 insertions(+) > > diff --git a/test/dm/eth.c b/test/dm/eth.c > index b39a94a..831a994 100644 > --- a/test/dm/eth.c > +++ b/test/dm/eth.c > @@ -83,3 +83,28 @@ static int dm_test_eth_prime(struct dm_test_state *dms) > } > > DM_TEST(dm_test_eth_prime, DM_TESTF_SCAN_FDT); > + > +static int dm_test_eth_retry(struct dm_test_state *dms) > +{ > + char ethaddr[18]; > + > + NetPingIP = string_to_ip("1.1.2.2"); > + strcpy(ethaddr, getenv("eth1addr")); > + setenv("ethact", "eth@10004000"); > + setenv("eth1addr", NULL); > + ut_assertok(NetLoop(PING)); > + ut_asserteq_str("eth@10002000", getenv("ethact")); > + > + setenv("ethact", "eth@10004000"); > + setenv("netretry", "no"); > + ut_asserteq(-1, NetLoop(PING)); > + ut_asserteq_str("eth@10004000", getenv("ethact")); > + > + /* Restore the env */ > + setenv("eth1addr", ethaddr); > + setenv("netretry", NULL); > + > + return 0; > +} > + Remove blank line again > +DM_TEST(dm_test_eth_retry, DM_TESTF_SCAN_FDT); > -- > 1.7.11.5 > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC PATCH v3 14/14] dm: eth: Add a bridge to a real network for sandbox
Hi Joe, On 10 February 2015 at 18:30, Joe Hershberger wrote: > Implement a bridge between u-boot's network stack and Linux's raw packet > API allowing the sandbox to send and receive packets using the host > machine's network interface. > > This raw Ethernet API requires elevated privileges. You can either run > as root, or you can add the capability needed like so: > > sudo /sbin/setcap "CAP_NET_RAW+ep" u-boot Can you add a note about thsi in README.sandbox? This seems like a major new feature. It was talked about a few years ago when sandbox was first created. > > Signed-off-by: Joe Hershberger > > --- > > Changes in v3: > -Made the os raw packet support for sandbox eth build and work. > > Changes in v2: > -Added the raw packet proof-of-concept patch. > > arch/sandbox/dts/sandbox.dts | 6 ++ > arch/sandbox/include/asm/sandbox-raw-os.h | 16 > drivers/net/Makefile | 11 +++ > drivers/net/sandbox-raw-os.c | 105 > drivers/net/sandbox-raw.c | 128 > ++ > include/configs/sandbox.h | 1 + > 6 files changed, 267 insertions(+) > create mode 100644 arch/sandbox/include/asm/sandbox-raw-os.h > create mode 100644 drivers/net/sandbox-raw-os.c > create mode 100644 drivers/net/sandbox-raw.c > > diff --git a/arch/sandbox/dts/sandbox.dts b/arch/sandbox/dts/sandbox.dts > index ba635e8..13bd6c2 100644 > --- a/arch/sandbox/dts/sandbox.dts > +++ b/arch/sandbox/dts/sandbox.dts > @@ -188,4 +188,10 @@ > reg = <0x10002000 0x1000>; > fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x00>; > }; > + > + eth@8000 { > + compatible = "sandbox,eth,raw"; We normally have "vendor,device", so maybe "sandbox,raw-eth" > + reg = <0x8000 0x1000>; > + host-raw-interface = "eth0"; > + }; > }; > diff --git a/arch/sandbox/include/asm/sandbox-raw-os.h > b/arch/sandbox/include/asm/sandbox-raw-os.h > new file mode 100644 > index 000..4e5d418 > --- /dev/null > +++ b/arch/sandbox/include/asm/sandbox-raw-os.h > @@ -0,0 +1,16 @@ > +/* > + * Copyright (c) 2015 National Instruments > + * > + * (C) Copyright 2015 > + * Joe Hershberger > + * > + * SPDX-License-Identifier:GPL-2.0+ > + */ > + > +#pragma once We use #ifdef for this in U-Boot at present. I'm not sure why - perhaps compatibility? > + > +int sandbox_raw_init(int *sd, void **devp, const char *ifname, > +unsigned char *ethmac); > +int sandbox_raw_send(void *packet, int length, int sd, void *device); > +int sandbox_raw_recv(void *packet, int *length, int sd, void *device); > +void sandbox_raw_halt(int *sd, void **devp); Function comments, also what is 'device'? > diff --git a/drivers/net/Makefile b/drivers/net/Makefile > index 15dc431..39975b3 100644 > --- a/drivers/net/Makefile > +++ b/drivers/net/Makefile > @@ -51,6 +51,8 @@ obj-$(CONFIG_PCNET) += pcnet.o > obj-$(CONFIG_RTL8139) += rtl8139.o > obj-$(CONFIG_RTL8169) += rtl8169.o > obj-$(CONFIG_ETH_SANDBOX) += sandbox.o > +obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw.o > +obj-$(CONFIG_ETH_SANDBOX_RAW) += sandbox-raw-os.o > obj-$(CONFIG_SH_ETHER) += sh_eth.o > obj-$(CONFIG_SMC9) += smc9.o > obj-$(CONFIG_SMC911X) += smc911x.o > @@ -68,3 +70,12 @@ obj-$(CONFIG_XILINX_LL_TEMAC) += xilinx_ll_temac.o > xilinx_ll_temac_mdio.o \ > obj-$(CONFIG_ZYNQ_GEM) += zynq_gem.o > obj-$(CONFIG_FSL_MC_ENET) += fsl_mc/ > obj-$(CONFIG_VSC9953) += vsc9953.o > + > +# sandbox-raw-os.c is built in the system env, so needs standard includes > +# CFLAGS_REMOVE_sandbox-raw-os.o cannot be used to drop header include path > +quiet_cmd_cc_sandbox-raw-os.o = CC $(quiet_modtag) $@ > +cmd_cc_sandbox-raw-os.o = $(CC) $(filter-out -nostdinc, \ > + $(patsubst -I%,-idirafter%,$(c_flags))) -c -o $@ $< > + > +$(obj)/sandbox-raw-os.o: $(src)/sandbox-raw-os.c FORCE > + $(call if_changed_dep,cc_sandbox-raw-os.o) Can we please move this to the same directory as os.c, so that all the OS-specific stuff is in one place. > diff --git a/drivers/net/sandbox-raw-os.c b/drivers/net/sandbox-raw-os.c > new file mode 100644 > index 000..43fae60 > --- /dev/null > +++ b/drivers/net/sandbox-raw-os.c > @@ -0,0 +1,105 @@ > +/* > + * Copyright (c) 2015 National Instruments > + * > + * (C) Copyright 2015 > + * Joe Hershberger > + * > + * SPDX-License-Identifier:GPL-2.0+ > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > +#include > + > +int sandbox_raw_init(int *sd, void **devp, const char *ifname, > +unsigned char *ethmac) > +{ > + int tempsd = 0; > + struct ifreq ifr; > + > + strcpy(ifr.ifr_name, ifname); > + ifr.ifr_addr.sa_family = AF_INET; > + memset(ethmac, 0, 6); > + tempsd = socket(AF_INET, SOCK_RAW, IPPROTO_RAW); >
Re: [U-Boot] [RFC PATCH v3 01/14] dm: core: Allow seq numbers to be resolved before probe
Hi Joe, On 13 February 2015 at 19:33, Joe Hershberger wrote: > On Thu, Feb 12, 2015 at 11:14 PM, Simon Glass wrote: >> >> Hi Joe, >> >> On 10 February 2015 at 23:08, Joe Hershberger >> wrote: >> > Hi Simon, >> > >> > On Tue, Feb 10, 2015 at 10:39 PM, Simon Glass wrote: >> >> >> >> Hi Joe, >> >> >> >> On 10 February 2015 at 18:30, Joe Hershberger >> >> wrote: >> >> > Before this patch, if the sequence numbers were resolved before >> >> > probe, >> >> > this code would insist on defining new non-conflicting-with-itself >> >> > seq >> >> > numbers. Now any "non -1" seq number is accepted as already resolved. >> >> >> >> Can you explain what problem this solves? At present, when probing a >> >> device, ->seq must be -1 (sort-of by definition since it doesn't exist >> >> as an active device in the uclass). >> > >> > Please look at eth_post_bind() in patch 07/14. The Ethernet devices >> > need to >> > write their hardware addresses to the registers in bind (since it needs >> > to >> > happen regardless of the device being used so that Linux will see the >> > MAC >> > address). As such, the sequence number is needed to look up the >> > ethaddr. In >> > order to avoid probing all the devices to get the seq number resolved, I >> > resolve it in post_bind to avoid the rest of the overhead (thus no >> > longer >> > probing in post_bind, which was one of the issues previously). Then >> > when >> > probe comes along, the seq is already resolved. That's why this patch >> > is >> > needed. >> >> OK I see. >> >> This is a bit messy. If the MAC address assignment is part of the bind >> step then it shouldn't need the seq number. > > Not sure why you say that. The reason I need the seq number is because I > need to look up the proper env variable for the MAC address. E.g. ethaddr, > eth2addr, etc. The seq number select which one to read from the env. We should be able to do this after a probe. A device which is bound but not probed does not have a sequence number, as things currently stand. > >> I can think of some poor ways to do this but a nice way is not obvious! > > Not sure what you're referring to here. What is "this" in this context? Figuring out the sequence number. > >> One option would be probe all the Ethernet devices on startup. If >> probe() only set up the hardware (including MAC address) then that >> might work. It would be fairly fast since it wouldn't involve starting >> up the link, etc. I suspect you are worried about a lot of Ethernet >> devices sitting around probed by unused. I'm not sure if that matters >> though. > > I had it probing the devices originally (by calling first and next) and you > commented that it shouldn't happen until the devices are used. However, I That was because your code was probing things in the bind mehod. > don't think we can guarantee that all drivers that come later will have > simple probe (since that's not part of the contract). I think I agree with > your original statement that we should not probe. It seems more suitable to > write the hwaddr in bind as a known and limited side effect. I don't like the idea of an ethernet device supporting writing its hardware address before it is probed. Until it is probed we don't really know it is there, nor where it is exactly (bus, memory address). So I think writing the hardware address makes more sense after probe. But probe should not happen as part of bind. It seems to me it could happen in your eth_init(). > > The seq number resolution seems fairly well contained as I implemented it in > bind. I simply call the core function and write the result to the device > member. Then of course this patch to remove the assert. Yes it is well contained, but I still don't think it is right. If you want to put '#ifndef CONFIG_DM_NET' around the assert in uclass_resolve_seq() while we work it out, that is OK with me. Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] mx6sx: pins: Enable SION for I2C3 iomux setting
Hi everybody, On 15/02/2015 16:11, Nikolay Dimitrov wrote: >> Checked in manual, thanks for link. However, I have still a couple of >> questions. The controller can work as slave or as master, and according >> to the manual, the slave is the default after a reset. I understand that >> putting the controller into slave mode must require the SION bit set. >> Anyway, you are using I2C3 as master in your patch 4/4. Is it still >> mandatory even in this case to set the SION bit ? The manual states that >> to use the signal as input the SION bit must be set, but as far as I see >> in the patchset SCL is output only. > > Just tested the behavior of SION bit on imx6sl (riotboard), as I don't > have imx6sx hardware. > > For the test I used I2C4, located on expansion connector J13. I > verified that the SION bits are enabled after boot: > > # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO07 > IOMUXC_SW_MUX_CTL_PAD_GPIO07:0x020e0238=0x0018 > > # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO08 > IOMUXC_SW_MUX_CTL_PAD_GPIO08:0x020e023c=0x0018 > > I also verified that the I2C interface works as expected (by observing > I2C transactions on a digital scope): > > i2cdetect -y 3 > > This works so far. Then I disabled the SION bits for both iomuxes: > > # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO07 0x08 > IOMUXC_SW_MUX_CTL_PAD_GPIO07:0x020e0238=0x0018 > IOMUXC_SW_MUX_CTL_PAD_GPIO07:0x020e0238 == 0x0018...0x0008 > > # devregs IOMUXC_SW_MUX_CTL_PAD_GPIO08 0x08 > IOMUXC_SW_MUX_CTL_PAD_GPIO08:0x020e023c=0x0018 > IOMUXC_SW_MUX_CTL_PAD_GPIO08:0x020e023c == 0x0018...0x0008 > > Now interface I2C4 doesn't work anymore. Instead of complete I2C > transactions, I see just a single pulses on both clock/data lines, > repeated on each 500ms. At the same time i2cdetect scans the address > space much more slowly than usual, and it looks like it timeouts on > each single address check for the same amount of time (500ms). > > Restoring the SION bits for clock & data restores the I2C4 > functionality. All the time the port was in master mode. > > I don't have experience with imx6sx, but if the I2C IP core was reused > for imx6sx (which is very likely), then I tend to agree with Ye Li that > the SION bits will have to be enabled. Thanks for testing and to share your experience. I will merge Li's patch now. Thanks again, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] net: phy: Add ability to program the ksz9031 skew values from the uboot env
On Friday, February 13, 2015 at 05:44:11 PM, Stefan Roese wrote: > Hi Vince, > > On 13.02.2015 17:19, Vince Bridgers wrote: > > > > > >> No. But with your comments above (which make total sense), I tend to NAK > >> this ability to configure the PHY skew timings via environment > >> variables. > > > > Understood, I'll focus on the devicetree implementation and a README to > > > > help non-expert users use the MII command for board bringup & debug > > purposes. > > This README is a good idea and will be helpful. Thanks for doing this. Hi! Thank you for doing this indeed :) Best regards, Marek Vasut ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] u-boot sunxi fel plan for v2015.04
Hi, On 15-02-15 15:43, Siarhei Siamashka wrote: On Fri, 13 Feb 2015 16:50:49 -0500 Tom Rini wrote: On Fri, Feb 13, 2015 at 09:19:08AM +0100, Hans de Goede wrote: Hi Siarhei and Simon, I'm wondering what the plan is wrt sunxi FEL booting for u-boot v2015.04 I know that you both have been working on this, and I think that for v2015.04 Simon's latest set probably is the best way forward for now, we're going to need parts of that set anyways for the more complete solution Siarhei has. we could replace the patch adding all the #ifdef's to start.S with code saving / restoring PCR15 and friends, that would be more cleaner. So I see 2 ways forwards for v2014.05 1) Go with Simon's latest set as is. 2) Take the first patches from Simon's set and replace the on adding he #ifdef's to start.S with one saving / restoring the necessary regs I've a slight preference for 2. Siarhei, can you perhaps prepare a patch-set for 2 for merging for v2014.05 ? And when everyone is happy I'll take it via the sunxi tree (And try and see about giving it a spin on my Lime2). Thanks! Thanks for clarifying this. Simon, could you please confirm that you are not going to do anything anymore with the third patch from your sunxi FEL fixes set? Hans, could you please queue Simon's patches in the sunxi next branch just like Tom suggested (and after the status of the third patch becomes more clear)? I'm fine with taking Simon's patch-set as is, and upstreaming it through the sunxi tree, but the start.S changes are not really sunxi specific, so I think they need Alberts ack? Tom are you ok with taking these without Albert's ack? And/or Albert can we have your ack for: http://patchwork.ozlabs.org/patch/437580/ http://patchwork.ozlabs.org/patch/437581/ http://patchwork.ozlabs.org/patch/437582/ (the 2nd one is not really ARM specific, but still) Regards, Hans ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] keystone2: ddr3: eliminate using global ddr3_size variable
On 14:07-20150211, Vitaly Andrianov wrote: > KS2 ddr3 initialization uses ddr3_size global variable before u-boot > relocation. Even if the variable is not being used after relocation, > writing to it corrupts relocation table. > > This patch removes the global ddr3_size variable and uses local one > instead. > > Signed-off-by: Vitaly Andrianov > --- This patch is necesasry for Keystone2 platforms to boot to u-boot shell. Tested-by: Nishanth Menon Tested on v2015.01 tag (which is broke). > arch/arm/cpu/armv7/keystone/ddr3.c| 5 + > arch/arm/include/asm/arch-keystone/ddr3.h | 5 ++--- > board/ti/ks2_evm/board.c | 6 -- > board/ti/ks2_evm/ddr3_k2e.c | 14 ++ > board/ti/ks2_evm/ddr3_k2hk.c | 11 ++- > board/ti/ks2_evm/ddr3_k2l.c | 12 ++-- > 6 files changed, 17 insertions(+), 36 deletions(-) > > diff --git a/arch/arm/cpu/armv7/keystone/ddr3.c > b/arch/arm/cpu/armv7/keystone/ddr3.c > index 923906a..dfb27b5 100644 > --- a/arch/arm/cpu/armv7/keystone/ddr3.c > +++ b/arch/arm/cpu/armv7/keystone/ddr3.c > @@ -263,17 +263,14 @@ static void ddr3_map_ecc_cic2_irq(u32 base) > } > #endif > > -void ddr3_init_ecc(u32 base) > +void ddr3_init_ecc(u32 base, u32 ddr3_size) > { > - u32 ddr3_size; > - > if (!ddr3_ecc_support_rmw(base)) { > ddr3_disable_ecc(base); > return; > } > > ddr3_ecc_init_range(base); > - ddr3_size = ddr3_get_size(); > ddr3_reset_data(CONFIG_SYS_SDRAM_BASE, ddr3_size); > > /* mapping DDR3 ECC system interrupt from CIC2 to GIC */ > diff --git a/arch/arm/include/asm/arch-keystone/ddr3.h > b/arch/arm/include/asm/arch-keystone/ddr3.h > index b044d6f..a22c237 100644 > --- a/arch/arm/include/asm/arch-keystone/ddr3.h > +++ b/arch/arm/include/asm/arch-keystone/ddr3.h > @@ -48,10 +48,9 @@ struct ddr3_emif_config { > unsigned int sdrfc; > }; > > -void ddr3_init(void); > -int ddr3_get_size(void); > +u32 ddr3_init(void); > void ddr3_reset_ddrphy(void); > -void ddr3_init_ecc(u32 base); > +void ddr3_init_ecc(u32 base, u32 ddr3_size); > void ddr3_disable_ecc(u32 base); > void ddr3_check_ecc_int(u32 base); > int ddr3_ecc_support_rmw(u32 base); > diff --git a/board/ti/ks2_evm/board.c b/board/ti/ks2_evm/board.c > index 04ec675..8892a28 100644 > --- a/board/ti/ks2_evm/board.c > +++ b/board/ti/ks2_evm/board.c > @@ -35,12 +35,14 @@ static struct aemif_config aemif_configs[] = { > > int dram_init(void) > { > - ddr3_init(); > + u32 ddr3_size; > + > + ddr3_size = ddr3_init(); > > gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, > CONFIG_MAX_RAM_BANK_SIZE); > aemif_init(ARRAY_SIZE(aemif_configs), aemif_configs); > - ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE); > + ddr3_init_ecc(KS2_DDR3A_EMIF_CTRL_BASE, ddr3_size); > return 0; > } > > diff --git a/board/ti/ks2_evm/ddr3_k2e.c b/board/ti/ks2_evm/ddr3_k2e.c > index 40fd966..35ffb42 100644 > --- a/board/ti/ks2_evm/ddr3_k2e.c > +++ b/board/ti/ks2_evm/ddr3_k2e.c > @@ -11,11 +11,11 @@ > #include "ddr3_cfg.h" > #include > > -static int ddr3_size; > static struct pll_init_data ddr3_400 = DDR3_PLL_400; > > -void ddr3_init(void) > +u32 ddr3_init(void) > { > + u32 ddr3_size; > char dimm_name[32]; > > if (~(readl(KS2_PLL_CNTRL_BASE + KS2_RSTCTRL_RSTYPE) & 0x1)) > @@ -43,13 +43,11 @@ void ddr3_init(void) > printf("DRAM: 4 GiB\n"); > ddr3_init_ddrphy(KS2_DDR3A_DDRPHYC, &ddr3phy_1600_4g); > ddr3_init_ddremif(KS2_DDR3A_EMIF_CTRL_BASE, &ddr3_1600_4g); > + } else { > + printf("Unknown SO-DIMM. Cannot configure DDR3\n"); > + while (1) > + ; > } > -} > > -/** > - * ddr3_get_size - return ddr3 size in GiB > - */ > -int ddr3_get_size(void) > -{ > return ddr3_size; > } > diff --git a/board/ti/ks2_evm/ddr3_k2hk.c b/board/ti/ks2_evm/ddr3_k2hk.c > index a1c3d05..b36eb27 100644 > --- a/board/ti/ks2_evm/ddr3_k2hk.c > +++ b/board/ti/ks2_evm/ddr3_k2hk.c > @@ -12,14 +12,13 @@ > #include > #include > > -static int ddr3_size; > - > struct pll_init_data ddr3a_333 = DDR3_PLL_333(A); > struct pll_init_data ddr3a_400 = DDR3_PLL_400(A); > > -void ddr3_init(void) > +u32 ddr3_init(void) > { > char dimm_name[32]; > + u32 ddr3_size; > > ddr3_get_dimm_params(dimm_name); > > @@ -93,12 +92,6 @@ void ddr3_init(void) > /* Apply the workaround for PG 1.0 and 1.1 Silicons */ > if (cpu_revision() <= 1) > ddr3_err_reset_workaround(); > -} > > -/** > - * ddr3_get_size - return ddr3 size in GiB > - */ > -int ddr3_get_size(void) > -{ > return ddr3_size; > } > diff --git a/board/ti/ks2_evm/ddr3_k2l.c b/board/ti/ks2_evm/ddr3_k2l.c > index 15a14f2..00fc194 100644 > --- a/board/ti/ks2_evm/ddr3_k2l.c > +++ b/board/ti/ks2_evm/ddr3_k2l.c > @@ -11,28 +11,20 @@ >
Re: [U-Boot] [PATCH] net: keystone_net: move serdes setup to initialization function
On 14:05-20150211, Vitaly Andrianov wrote: > On Keystone2 devices serdes must be initialized before accessing MDIO bus. > This commit moves the keystone2_net_serdes_setup() from keystone2_eth_open > to keystone2_emac_initialize to meet that requirement. > > This also eliminates unnecessary serdes initializatin every time when the > keystone2_eth_open is being called. > > Signed-off-by: Vitaly Andrianov > --- Necessary for keystone 2 devices to reach to shell. Tested-by: Nishanth Menon > drivers/net/keystone_net.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/keystone_net.c b/drivers/net/keystone_net.c > index bedab1d..35f1a57 100644 > --- a/drivers/net/keystone_net.c > +++ b/drivers/net/keystone_net.c > @@ -398,8 +398,6 @@ static int keystone2_eth_open(struct eth_device *dev, > bd_t *bis) > sys_has_mdio = > (eth_priv->sgmii_link_type == SGMII_LINK_MAC_PHY) ? 1 : 0; > > - keystone2_net_serdes_setup(); > - > if (sys_has_mdio) > keystone2_mdio_reset(mdio_bus); > > @@ -556,6 +554,8 @@ int keystone2_emac_initialize(struct eth_priv_t *eth_priv) > return res; > } > > + keystone2_net_serdes_setup(); > + > /* Create phy device and bind it with driver */ > #ifdef CONFIG_KSNET_MDIO_PHY_CONFIG_ENABLE > phy_dev = phy_connect(mdio_bus, eth_priv->phy_addr, > -- > 1.9.1 > > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot -- Regards, Nishanth Menon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] buildman: allow multiple toolchains in a single path
On 31 January 2015 at 16:12, Albert ARIBAUD wrote: > When buildman scans a toolchain path, it stops at the > first toolchain found. However, a single path can contains > several toolchains, each with its own prefix. > > This patch lets buildman scan all toolchains in the path. > > Signed-off-by: Albert ARIBAUD > --- > tools/buildman/toolchain.py | 9 + > 1 file changed, 5 insertions(+), 4 deletions(-) Acked-by: Simon Glass ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] patman: Make dry-run output match real functionality
On 27 January 2015 at 22:08, Simon Glass wrote: > On 27 January 2015 at 08:40, Peter Tyser wrote: >> >> On Mon, 2015-01-26 at 22:21 -0700, Simon Glass wrote: >>> Hi Peter, >>> >>> On 26 January 2015 at 10:42, Peter Tyser wrote: >>> > When run with the --dry-run argument patman prints out information >>> > showing what it would do. This information currently doesn't line up >>> > with what patman/git send-email really do. Some basic examples: >>> > - If an email address is addressed via "Series-cc" and "Patch-cc" patman >>> > shows that email address would be CC-ed two times. >>> > - If an email address is addressed via "Series-to" and "Patch-cc" patman >>> > shows that email address would be sent TO and CC-ed. >>> > - If an email address is addressed from a combination of tag aliases, >>> > get_maintainer.pl output, "Series-cc", "Patch-cc", etc patman shows >>> > that the email address would be CC-ed multiple times. >>> > >>> > Patman currently does try to send duplicate emails like the --dry-run >>> > output shows, but "git send-email" intelligently removes duplicate >>> > addresses so this patch shouldn't change the non-dry-run functionality. >>> > >>> > Change patman's output and email addressing to line up with the >>> > "git send-email" logic. This trims down patman's dry-run output and >>> > prevents confusion about what patman will do when emails are actually >>> > sent. >>> >>> Thanks for the patch, it's good to match up with git send-email. >>> >>> Are the rules that git send-email follows documented or obtained by >>> trial and error? >> >> Trial and error initially. The git source code lined up with what I >> saw (see the send_message function in git-send-email.perl). I didn't >> see the policy documented officially, but what git does makes sense >> to me: >> - remove any duplicate addresses in the to: field >> - remove all the to: addresses from the cc: addresses >> - remove any duplicate cc: addresses >> >> This makes sure each email is only sent to an address one time, >> with the to: field taking precedence over the cc: field. >> >> >> For a recent NAND patch series it looked like I was going to send Scott >> 2-4 emails per patch which is why I looked into it. > > Thanks. > > Acked-by: Simon Glass > Tested-by: Simon Glass Applied to x86/patman and now in mainline. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] ARM: i.MX: provide access to reset cause through get_imx_reset_cause()
Signed-off-by: Eric Nelson --- This patch set replaces http://patchwork.ozlabs.org/patch/436492/. arch/arm/imx-common/cpu.c | 10 +- arch/arm/include/asm/arch-imx/cpu.h | 2 ++ 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 28ccd29..067d08f 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -24,13 +24,16 @@ #include #endif -char *get_reset_cause(void) +static u32 reset_cause = -1; + +static char *get_reset_cause(void) { u32 cause; struct src *src_regs = (struct src *)SRC_BASE_ADDR; cause = readl(&src_regs->srsr); writel(cause, &src_regs->srsr); + reset_cause = cause; switch (cause) { case 0x1: @@ -53,6 +56,11 @@ char *get_reset_cause(void) } } +u32 get_imx_reset_cause(void) +{ + return reset_cause; +} + #if defined(CONFIG_MX53) || defined(CONFIG_MX6) #if defined(CONFIG_MX53) #define MEMCTL_BASEESDCTL_BASE_ADDR diff --git a/arch/arm/include/asm/arch-imx/cpu.h b/arch/arm/include/asm/arch-imx/cpu.h index 254136e..4715f4e 100644 --- a/arch/arm/include/asm/arch-imx/cpu.h +++ b/arch/arm/include/asm/arch-imx/cpu.h @@ -17,3 +17,5 @@ #define CS0_64M_CS1_64M1 #define CS0_64M_CS1_32M_CS2_32M2 #define CS0_32M_CS1_32M_CS2_32M_CS3_32M3 + +u32 get_imx_reset_cause(void); -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] nitrogen6x: set environment variable reset_cause
Signed-off-by: Eric Nelson --- This patch replaces the following two patches, but only applies to Nitrogen6x and SABRE Lite boards: http://patchwork.ozlabs.org/patch/436972/ http://patchwork.ozlabs.org/patch/436974/ board/boundary/nitrogen6x/nitrogen6x.c | 1 + 1 file changed, 1 insertion(+) diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c index e8ea256..d46b8db 100644 --- a/board/boundary/nitrogen6x/nitrogen6x.c +++ b/board/boundary/nitrogen6x/nitrogen6x.c @@ -1018,5 +1018,6 @@ int misc_init_r(void) #ifdef CONFIG_CMD_BMODE add_board_boot_modes(board_boot_modes); #endif + setenv_hex("reset_cause", get_imx_reset_cause()); return 0; } -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] patman: Read in the git-mailrc alias file
On 29 January 2015 at 11:35, Simon Glass wrote: > We should read this file to obtain a set of aliases. This reduces the need > to create them in the ~/.patman file. > > This feature did exist in some version of patman, and is mentioned in the > help but it did not find its way upstream. > > Reported-by: Graeme Russ > Signed-off-by: Simon Glass > --- > > tools/patman/settings.py | 27 +++ > 1 file changed, 27 insertions(+) I did not get any test feedback on this one. I'll apply it and see if anyone see any problems. Applied to u-boot-x86/sandbox. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/2] buildman: Fix incorrect arguemnt in GetUpstream()
On 29 January 2015 at 11:35, Simon Glass wrote: > This causes an error when trying to build a local branch which has a local > branch as its upstream. > > Signed-off-by: Simon Glass > Reported-by: Masahiro Yamada > --- > > tools/patman/gitutil.py | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py > index cc5a55a..9a40f68 100644 > --- a/tools/patman/gitutil.py > +++ b/tools/patman/gitutil.py > @@ -129,7 +129,7 @@ def GetUpstream(git_dir, branch): > return upstream, msg > > if remote == '.': > -return merge > +return merge, None > elif remote and merge: > leaf = merge.split('/')[-1] > return '%s/%s' % (remote, leaf), None > -- > 2.2.0.rc0.207.ga3a616c > Applied to u-boot-x86/sandbox. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] buildman: allow multiple toolchains in a single path
On 15 February 2015 at 14:31, Simon Glass wrote: > On 31 January 2015 at 16:12, Albert ARIBAUD wrote: >> When buildman scans a toolchain path, it stops at the >> first toolchain found. However, a single path can contains >> several toolchains, each with its own prefix. >> >> This patch lets buildman scan all toolchains in the path. >> >> Signed-off-by: Albert ARIBAUD >> --- >> tools/buildman/toolchain.py | 9 + >> 1 file changed, 5 insertions(+), 4 deletions(-) > > Acked-by: Simon Glass Applied to u-boot-x86/sandbox. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] sandbox: Adjust the order of the NO_SDL check
On 12 February 2015 at 16:12, Jeroen Hofstee wrote: > Hello Simon, > > > On 11-02-15 02:52, Simon Glass wrote: >> >> An option is provided to avoid using SDL in U-Boot sandbox (and drop >> support for the LCD). However the check in the Makefile is too late >> and warnings are printed even if NO_SDL=y is given. >> >> Adjust the order to avoid this warning. >> >> Signed-off-by: Simon Glass >> --- >> >> arch/sandbox/config.mk | 12 ++-- >> 1 file changed, 6 insertions(+), 6 deletions(-) >> >> diff --git a/arch/sandbox/config.mk b/arch/sandbox/config.mk >> index e38a44b..7b84f02 100644 >> --- a/arch/sandbox/config.mk >> +++ b/arch/sandbox/config.mk >> @@ -5,10 +5,16 @@ PLATFORM_CPPFLAGS += -D__SANDBOX__ -U_FORTIFY_SOURCE >> PLATFORM_CPPFLAGS += -DCONFIG_ARCH_MAP_SYSMEM -DCONFIG_SYS_GENERIC_BOARD >> PLATFORM_LIBS += -lrt >> +# Define this to avoid linking with SDL, which requires SDL libraries >> +# This can solve 'sdl-config: Command not found' errors >> +ifneq ($(NO_SDL),) >> +PLATFORM_CPPFLAGS += -DSANDBOX_NO_SDL >> +else >> ifdef CONFIG_SANDBOX_SDL >> PLATFORM_LIBS += $(shell sdl-config --libs) >> PLATFORM_CPPFLAGS += $(shell sdl-config --cflags) >> endif >> +endif >> # Support generic board on sandbox >> __HAVE_ARCH_GENERIC_BOARD := y >> @@ -18,9 +24,3 @@ cmd_u-boot__ = $(CC) -o $@ -T u-boot.lds \ >> $(PLATFORM_LIBS) -Wl,-Map -Wl,u-boot.map >> CONFIG_ARCH_DEVICE_TREE := sandbox >> - >> -# Define this to avoid linking with SDL, which requires SDL libraries >> -# This can solve 'sdl-config: Command not found' errors >> -ifneq ($(NO_SDL),) >> -PLATFORM_CPPFLAGS += -DSANDBOX_NO_SDL >> -endif > > > yup, feel free to commit this (it can't do any harm just prevents some > warnings). Which I guess translates to > > Acked-by: Jeroen Hofstee Applied to u-boot-x86/sandbox. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] sandbox: Return '-c command' exit value as sandbox exit code
On 10 February 2015 at 12:50, Simon Glass wrote: > On 6 February 2015 at 14:37, Joe Hershberger wrote: >> >> When a command is passed into sandbox using the '-c' argument the >> command is run directly. This is most helpful when running tests (such >> as test-dm.sh). Previously the exit code was an unused enum. Change it >> to be the actual return code from the command so that the script calling >> sandbox can know if the command succeeded (tests passed). Also remove >> the now completely unused "exit_state" in sandbox. >> >> Signed-off-by: Joe Hershberger >> >> --- >> >> arch/sandbox/cpu/start.c | 6 -- >> arch/sandbox/cpu/state.c | 5 - >> arch/sandbox/include/asm/state.h | 15 --- >> 3 files changed, 4 insertions(+), 22 deletions(-) > > Acked-by: Simon Glass Applied to u-boot-x86/sandbox. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-x86.git branch sandbox
Hi Tom, There are the only pending sandbox/patman/buildman patches that I am aware of (for this release). If I have missed any, please assign them to me in patchwork. Note these are in branch 'sandbox'. The following changes since commit bd2a4888b123713adec271d6c8040ca9f609aa2f: sunxi: configs/sunxi-common.h: Enable CONFIG_CMD_PART (2015-02-11 19:43:45 -0500) are available in the git repository at: git://git.denx.de/u-boot-x86.git x86/sandbox for you to fetch changes up to e50ab22984ce90ffcc47bc620ed2caac0bcc02f7: sandbox: Adjust the order of the NO_SDL check (2015-02-15 14:34:06 -0700) Albert ARIBAUD (1): buildman: allow multiple toolchains in a single path Joe Hershberger (1): sandbox: Return '-c command' exit value as sandbox exit code Simon Glass (3): buildman: Fix incorrect arguemnt in GetUpstream() patman: Read in the git-mailrc alias file sandbox: Adjust the order of the NO_SDL check arch/sandbox/config.mk | 12 ++-- arch/sandbox/cpu/start.c | 6 -- arch/sandbox/cpu/state.c | 5 - arch/sandbox/include/asm/state.h | 15 --- tools/buildman/toolchain.py | 9 + tools/patman/gitutil.py | 2 +- tools/patman/settings.py | 27 +++ 7 files changed, 43 insertions(+), 33 deletions(-) Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 3/8] lpc32xx: i2c: add LPC32xx I2C interface support
Hi Albert, On 13 February 2015 at 04:20, Heiko Schocher wrote: > Hello Albert, > > Am 13.02.2015 12:09, schrieb Albert ARIBAUD: >> >> Hi Heiko, >> >> Le Fri, 13 Feb 2015 11:48:26 +0100, Heiko Schocher a >> écrit : >> >>> Hello Albert, >>> >>> Am 12.02.2015 18:37, schrieb Albert ARIBAUD (3ADEV): Signed-off-by: Albert ARIBAUD (3ADEV) --- Changes in v2: None arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++ arch/arm/include/asm/arch-lpc32xx/clk.h | 4 + arch/arm/include/asm/arch-lpc32xx/cpu.h | 2 + arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 + drivers/i2c/Makefile | 1 + drivers/i2c/lpc32xx_i2c.c | 249 ++ 6 files changed, 268 insertions(+) create mode 100644 drivers/i2c/lpc32xx_i2c.c >>> >>> >>> Acked-by: Heiko Schocher >>> >>> Do you have a chance to use DM on this HW? >> >> >> I am using it for GPIOs already. I guess you would like I2C to use it >> too? > > > Yes, if it is possible for you to convert the driver to it, that would > be great! > > DM is the future ;-) It is fairly straightforward for I2C now. There is no detailed documentation but i2c.h explains the methods and you can see examples with tegra, sandbox and samsung (s3c24x0.c). Regards, Simon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] x86: minnowmax: add GPIO mapping support
Configure the pinctrl as it required to make some IO controllers working (USB/UART/I2C/...). The idea would be in the next version to modify the pch GPIO driver and configure these pins through the device tree. These modifications are ported from the coreboot project. Signed-off-by: Gabriel Huau --- arch/x86/cpu/baytrail/Makefile| 1 + arch/x86/cpu/baytrail/gpio.c | 206 +++ arch/x86/include/asm/arch-baytrail/gpio.h | 364 ++ arch/x86/include/asm/arch-baytrail/iomap.h| 73 ++ arch/x86/include/asm/arch-baytrail/irq.h | 119 + arch/x86/include/asm/arch-baytrail/irqroute.h | 67 + arch/x86/include/asm/arch-baytrail/pci_devs.h | 144 ++ arch/x86/include/asm/arch-baytrail/pmc.h | 253 ++ board/intel/minnowmax/minnowmax.c | 212 +++ include/configs/minnowmax.h | 11 + 10 files changed, 1450 insertions(+) create mode 100644 arch/x86/cpu/baytrail/gpio.c create mode 100644 arch/x86/include/asm/arch-baytrail/iomap.h create mode 100644 arch/x86/include/asm/arch-baytrail/irq.h create mode 100644 arch/x86/include/asm/arch-baytrail/irqroute.h create mode 100644 arch/x86/include/asm/arch-baytrail/pci_devs.h create mode 100644 arch/x86/include/asm/arch-baytrail/pmc.h diff --git a/arch/x86/cpu/baytrail/Makefile b/arch/x86/cpu/baytrail/Makefile index 8914e8b..c20a616 100644 --- a/arch/x86/cpu/baytrail/Makefile +++ b/arch/x86/cpu/baytrail/Makefile @@ -8,3 +8,4 @@ obj-y += early_uart.o obj-y += fsp_configs.o obj-y += pci.o obj-y += valleyview.o +obj-y += gpio.o diff --git a/arch/x86/cpu/baytrail/gpio.c b/arch/x86/cpu/baytrail/gpio.c new file mode 100644 index 000..0ad41cc --- /dev/null +++ b/arch/x86/cpu/baytrail/gpio.c @@ -0,0 +1,206 @@ +/* + * Copyright (c) 2012 The Chromium OS Authors. + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* GPIO-to-Pad LUTs */ +static const u8 gpncore_gpio_to_pad[GPNCORE_COUNT] = { + 19, 18, 17, 20, 21, 22, 24, 25, /* [ 0: 7] */ + 23, 16, 14, 15, 12, 26, 27, 1, /* [ 8:15] */ + 4, 8, 11, 0, 3, 6, 10, 13, /* [16:23] */ + 2, 5, 9 /* [24:26] */ +}; + +static const u8 gpscore_gpio_to_pad[GPSCORE_COUNT] = { + 85, 89, 93, 96, 99, 102, 98, 101, /* [ 0: 7] */ + 34, 37, 36, 38, 39, 35, 40, 84, /* [ 8: 15] */ + 62, 61, 64, 59, 54, 56, 60, 55, /* [16: 23] */ + 63, 57, 51, 50, 53, 47, 52, 49, /* [24: 31] */ + 48, 43, 46, 41, 45, 42, 58, 44, /* [32: 39] */ + 95, 105, 70, 68, 67, 66, 69, 71, /* [40: 47] */ + 65, 72, 86, 90, 88, 92, 103, 77, /* [48: 55] */ + 79, 83, 78, 81, 80, 82, 13, 12, /* [56: 63] */ + 15, 14, 17, 18, 19, 16, 2, 1, /* [64: 71] */ + 0, 4, 6, 7, 9, 8, 33, 32, /* [72: 79] */ + 31, 30, 29, 27, 25, 28, 26, 23, /* [80: 87] */ + 21, 20, 24, 22, 5, 3, 10, 11, /* [88: 95] */ + 106, 87, 91, 104, 97, 100 /* [96:101] */ +}; + +static const u8 gpssus_gpio_to_pad[GPSSUS_COUNT] = { + 29, 33, 30, 31, 32, 34, 36, 35, /* [ 0: 7] */ + 38, 37, 18, 7, 11, 20, 17, 1, /* [ 8:15] */ + 8, 10, 19, 12, 0, 2, 23, 39, /* [16:23] */ + 28, 27, 22, 21, 24, 25, 26, 51, /* [24:31] */ + 56, 54, 49, 55, 48, 57, 50, 58, /* [32:39] */ + 52, 53, 59, 40 /* [40:43] */ +}; + +/* GPIO bank descriptions */ +static const struct gpio_bank gpncore_bank = { + .gpio_count = GPNCORE_COUNT, + .gpio_to_pad = gpncore_gpio_to_pad, + .legacy_base = GP_LEGACY_BASE_NONE, + .pad_base = GPNCORE_PAD_BASE, + .has_wake_en = 0, + .gpio_f1_range_start = GPNCORE_GPIO_F1_RANGE_START, + .gpio_f1_range_end = GPNCORE_GPIO_F1_RANGE_END, +}; + +static const struct gpio_bank gpscore_bank = { + .gpio_count = GPSCORE_COUNT, + .gpio_to_pad = gpscore_gpio_to_pad, + .legacy_base = GPSCORE_LEGACY_BASE, + .pad_base = GPSCORE_PAD_BASE, + .has_wake_en = 0, + .gpio_f1_range_start = GPSCORE_GPIO_F1_RANGE_START, + .gpio_f1_range_end = GPSCORE_GPIO_F1_RANGE_END, +}; + +static const struct gpio_bank gpssus_bank = { + .gpio_count = GPSSUS_COUNT, + .gpio_to_pad = gpssus_gpio_to_pad, + .legacy_base = GPSSUS_LEGACY_BASE, + .pad_base = GPSSUS_PAD_BASE, + .has_wake_en = 1, + .gpio_f1_range_start = GPSSUS_GPIO_F1_RANGE_START, + .gpio_f1_range_end = GPSSUS_GPIO_F1_RANGE_END, +}; + +static void setup_gpios(const struct byt_gpio_map *gpios, + const struct gpio_bank *bank) +{ + const struct byt_gpio_map *config; + int gpio = 0; + u32 reg, pad_conf0; + u8 set, bit; + + u32 use_sel[4] = {0}; + u32 io_sel[4] = {0}; +
[U-Boot] unassigned-patches/128: [PATCH] x86: minnowmax: add GPIO mapping support
Configure the pinctrl as it required to make some IO controllers working (USB/UART/I2C/...). The idea would be in the next version to modify the pch GPIO driver and configure these pins through the device tree. These modifications are ported from the coreboot project. Signed-off-by: Gabriel Huau --- Added to GNATS database as unassigned-patches/128 >Responsible:patch-coord >Message-Id: <1424037328-31636-1-git-send-email-cont...@huau-gabriel.fr> >In-Reply-To: >References: >Patch-Date: Sun Feb 15 22:55:28 +0100 2015 --- arch/x86/cpu/baytrail/Makefile| 1 + arch/x86/cpu/baytrail/gpio.c | 206 +++ arch/x86/include/asm/arch-baytrail/gpio.h | 364 ++ arch/x86/include/asm/arch-baytrail/iomap.h| 73 ++ arch/x86/include/asm/arch-baytrail/irq.h | 119 + arch/x86/include/asm/arch-baytrail/irqroute.h | 67 + arch/x86/include/asm/arch-baytrail/pci_devs.h | 144 ++ arch/x86/include/asm/arch-baytrail/pmc.h | 253 ++ board/intel/minnowmax/minnowmax.c | 212 +++ include/configs/minnowmax.h | 11 + 10 files changed, 1450 insertions(+) create mode 100644 arch/x86/cpu/baytrail/gpio.c create mode 100644 arch/x86/include/asm/arch-baytrail/iomap.h create mode 100644 arch/x86/include/asm/arch-baytrail/irq.h create mode 100644 arch/x86/include/asm/arch-baytrail/irqroute.h create mode 100644 arch/x86/include/asm/arch-baytrail/pci_devs.h create mode 100644 arch/x86/include/asm/arch-baytrail/pmc.h diff --git a/arch/x86/cpu/baytrail/Makefile b/arch/x86/cpu/baytrail/Makefile index 8914e8b..c20a616 100644 --- a/arch/x86/cpu/baytrail/Makefile +++ b/arch/x86/cpu/baytrail/Makefile @@ -8,3 +8,4 @@ obj-y += early_uart.o obj-y += fsp_configs.o obj-y += pci.o obj-y += valleyview.o +obj-y += gpio.o diff --git a/arch/x86/cpu/baytrail/gpio.c b/arch/x86/cpu/baytrail/gpio.c new file mode 100644 index 000..0ad41cc --- /dev/null +++ b/arch/x86/cpu/baytrail/gpio.c @@ -0,0 +1,206 @@ +/* + * Copyright (c) 2012 The Chromium OS Authors. + * SPDX-License-Identifier:GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* GPIO-to-Pad LUTs */ +static const u8 gpncore_gpio_to_pad[GPNCORE_COUNT] = { + 19, 18, 17, 20, 21, 22, 24, 25, /* [ 0: 7] */ + 23, 16, 14, 15, 12, 26, 27, 1, /* [ 8:15] */ + 4, 8, 11, 0, 3, 6, 10, 13, /* [16:23] */ + 2, 5, 9 /* [24:26] */ +}; + +static const u8 gpscore_gpio_to_pad[GPSCORE_COUNT] = { + 85, 89, 93, 96, 99, 102, 98, 101, /* [ 0: 7] */ + 34, 37, 36, 38, 39, 35, 40, 84, /* [ 8: 15] */ + 62, 61, 64, 59, 54, 56, 60, 55, /* [16: 23] */ + 63, 57, 51, 50, 53, 47, 52, 49, /* [24: 31] */ + 48, 43, 46, 41, 45, 42, 58, 44, /* [32: 39] */ + 95, 105, 70, 68, 67, 66, 69, 71, /* [40: 47] */ + 65, 72, 86, 90, 88, 92, 103, 77, /* [48: 55] */ + 79, 83, 78, 81, 80, 82, 13, 12, /* [56: 63] */ + 15, 14, 17, 18, 19, 16, 2, 1, /* [64: 71] */ + 0, 4, 6, 7, 9, 8, 33, 32, /* [72: 79] */ + 31, 30, 29, 27, 25, 28, 26, 23, /* [80: 87] */ + 21, 20, 24, 22, 5, 3, 10, 11, /* [88: 95] */ + 106, 87, 91, 104, 97, 100 /* [96:101] */ +}; + +static const u8 gpssus_gpio_to_pad[GPSSUS_COUNT] = { + 29, 33, 30, 31, 32, 34, 36, 35, /* [ 0: 7] */ + 38, 37, 18, 7, 11, 20, 17, 1, /* [ 8:15] */ + 8, 10, 19, 12, 0, 2, 23, 39, /* [16:23] */ + 28, 27, 22, 21, 24, 25, 26, 51, /* [24:31] */ + 56, 54, 49, 55, 48, 57, 50, 58, /* [32:39] */ + 52, 53, 59, 40 /* [40:43] */ +}; + +/* GPIO bank descriptions */ +static const struct gpio_bank gpncore_bank = { + .gpio_count = GPNCORE_COUNT, + .gpio_to_pad = gpncore_gpio_to_pad, + .legacy_base = GP_LEGACY_BASE_NONE, + .pad_base = GPNCORE_PAD_BASE, + .has_wake_en = 0, + .gpio_f1_range_start = GPNCORE_GPIO_F1_RANGE_START, + .gpio_f1_range_end = GPNCORE_GPIO_F1_RANGE_END, +}; + +static const struct gpio_bank gpscore_bank = { + .gpio_count = GPSCORE_COUNT, + .gpio_to_pad = gpscore_gpio_to_pad, + .legacy_base = GPSCORE_LEGACY_BASE, + .pad_base = GPSCORE_PAD_BASE, + .has_wake_en = 0, + .gpio_f1_range_start = GPSCORE_GPIO_F1_RANGE_START, + .gpio_f1_range_end = GPSCORE_GPIO_F1_RANGE_END, +}; + +static const struct gpio_bank gpssus_bank = { + .gpio_count = GPSSUS_COUNT, + .gpio_to_pad = gpssus_gpio_to_pad, + .legacy_base = GPSSUS_LEGACY_BASE, + .pad_base = GPSSUS_PAD_BASE, + .has_wake_en = 1, + .gpio_f1_range_start = GPSSUS_GPIO_F1_RANGE_START, + .gpio_f1_range_end = GPSSUS_GPIO_F1_RANGE_END, +}; + +static void setup_gpios(const struct byt_gpio_ma
Re: [U-Boot] [PATCHv1 01/22] arm: socfpga: spl: Add main sdram code
Hi! > From: Dinh Nguyen > > This adds the code to configure the SDRAM controller that is found in the > SoCFGPA Cyclone5 and Arria5 platforms. > > Signed-off-by: Dinh Nguyen > +/** > + > ** > + ** NOTE: Special Rules for Globale Variables > ** > + ** > ** > + ** All global variables that are explicitly initialized (including > ** > + ** explicitly initialized to zero), are only initialized once, during > ** > + ** configuration time, and not again on reset. This means that they > ** > + ** preserve their current contents across resets, which is needed for some > ** > + ** special cases involving communication with external modules. In > ** > + ** addition, this avoids paying the price to have the memory initialized, > ** > + ** even for zeroed data, provided it is explicitly set to zero in the code, > ** > + ** and doesn't rely on implicit initialization. > ** > + > ** > + > **/ Comment coding style, please? And they not globale variables. But more importantly: is it good idea? What state is shared over reset? What are the special cases this is needed for? What happens, when kernel corrupts that state? > +/* > + * case:56390 > + * VFIFO_CONTROL_WIDTH_PER_DQS is the number of VFIFOs actually instantiated > + * per DQS. This is always one except: > + * AV QDRII where it is 2 for x18 and x18w2, and 4 for x36 and x36w2 > + * RLDRAMII x36 and x36w2 where it is 2. > + * In 12.0sp1 we set this to 4 for all of the special cases above to > + * keep it simple. > + * In 12.0sp2 or 12.1 this should get moved to generation and unified with > + * the same constant used in the phy mgr > + */ Does case: refer to something public? > +/* > + * Given a rank, select the set of shadow registers that is responsible > + * for the delays of such rank, so that subsequent SCC updates will > + * go to those shadow registers. > + */ > +void select_shadow_regs_for_update(uint32_t rank, uint32_t group, > + uint32_t update_scan_chains) > +{ > +#if USE_SHADOW_REGS > + uint32_t rank_one_hot = (0xFF & (1 << rank)); Does this need to be configurable? Best regards, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] gunzip: add gzwrite routine for extracting compresed images to block device
Initial filesystem images are generally highly compressible. Add a routine gzwrite that allows gzip-compressed images to be written to block devices. Signed-off-by: Eric Nelson --- include/common.h | 39 +++ lib/gunzip.c | 194 ++- 2 files changed, 232 insertions(+), 1 deletion(-) diff --git a/include/common.h b/include/common.h index 9129454..f96baea 100644 --- a/include/common.h +++ b/include/common.h @@ -713,6 +713,45 @@ int gunzip(void *, int, unsigned char *, unsigned long *); int zunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp, int stoponerr, int offset); +/** + * gzwrite progress indicators: defined weak to allow board-specific + * overrides: + * + * gzwrite_progress_init called on startup + * gzwrite_progress called during decompress/write loop + * gzwrite_progress_finish called at end of loop to + * indicate success (retcode=0) or failure + */ +void gzwrite_progress_init(u64 expected_size); + +void gzwrite_progress(int iteration, +u64 bytes_written, +u64 total_bytes); + +void gzwrite_progress_finish(int retcode, +u64 totalwritten, +u64 totalsize, +u32 expected_crc, +u32 calculated_crc); + +/** + * decompress and write gzipped image from memory to block device + * + * @param src compressed image address + * @param len compressed image length in bytes + * @param dev block device descriptor + * @param szwritebuf bytes per write (pad to erase size) + * @param startoffs offset in bytes of first write + * @param szexpected expected uncompressed length + * may be zero to use gzip trailer + * for files under 4GiB + */ +int gzwrite(unsigned char *src, int len, + struct block_dev_desc *dev, + unsigned long szwritebuf, + u64 startoffs, + u64 szexpected); + /* lib/qsort.c */ void qsort(void *base, size_t nmemb, size_t size, int(*compar)(const void *, const void *)); diff --git a/lib/gunzip.c b/lib/gunzip.c index f469fcb..d28fda8 100644 --- a/lib/gunzip.c +++ b/lib/gunzip.c @@ -12,6 +12,8 @@ #include #include +#define HEADER0'\x1f' +#define HEADER1'\x8b' #defineZALLOC_ALIGNMENT16 #define HEAD_CRC 2 #define EXTRA_FIELD4 @@ -66,6 +68,196 @@ int gunzip(void *dst, int dstlen, unsigned char *src, unsigned long *lenp) return zunzip(dst, dstlen, src, lenp, 1, i); } +__weak +void gzwrite_progress_init(u64 expectedsize) +{ + putc('\n'); +} + +__weak +void gzwrite_progress(int iteration, +u64 bytes_written, +u64 total_bytes) +{ + if (0 == (iteration & 3)) + printf("%llu/%llu\r", bytes_written, total_bytes); +} + +__weak +void gzwrite_progress_finish(int returnval, +u64 bytes_written, +u64 total_bytes, +u32 expected_crc, +u32 calculated_crc) +{ + if (0 == returnval) { + printf("\n\t%llu bytes, crc 0x%08x\n", + total_bytes, calculated_crc); + } else { + printf("\n\tuncompressed %llu of %llu\n" + "\tcrcs == 0x%08x/0x%08x\n", + bytes_written, total_bytes, + expected_crc, calculated_crc); + } +} + +int gzwrite(unsigned char *src, int len, + struct block_dev_desc *dev, + unsigned long szwritebuf, + u64 startoffs, + u64 szexpected) +{ + int i, flags; + z_stream s; + int r = 0; + unsigned char *writebuf; + unsigned crc = 0; + u64 totalfilled = 0; + lbaint_t blksperbuf, outblock; + u32 expected_crc; + u32 payload_size; + int iteration = 0; + + if (!szwritebuf || + (szwritebuf % dev->blksz) || + (szwritebuf < dev->blksz)) { + printf("%s: size %lu not a multiple of %lu\n", + __func__, szwritebuf, dev->blksz); + return -1; + } + + if (startoffs % dev->blksz) { + printf("%s: start offset %llu not a multiple of %lu\n", + __func__, startoffs, dev->blksz); + return -1; + } + + blksperbuf = szwritebuf / dev->blksz; + outblock = startoffs / dev->blksz; + + /* skip header */ + i = 10; + flags = src[3]; + if (src[2] != DEFLATED || (flags & RESERVED) != 0) { + puts("Error: Bad gzipped data\n"); + return -1; + } + if (
[U-Boot] [PATCH 2/2] unzip: add gzwrite command to write compressed image to block device
Add gzwrite command to write gzip-compressed images to block devices. Input must be gzip-compressed according to RFC1952, since the crc and file size in the trailer will be confirmed during operation. The decompressed file size must be specified on the command line for images with decompressed sizes >= 4GiB because the trailer only contains the low 32 bits of the original file size. Signed-off-by: Eric Nelson --- common/cmd_unzip.c | 47 +++ 1 file changed, 47 insertions(+) diff --git a/common/cmd_unzip.c b/common/cmd_unzip.c index b02c69e..0686be6 100644 --- a/common/cmd_unzip.c +++ b/common/cmd_unzip.c @@ -39,3 +39,50 @@ U_BOOT_CMD( "unzip a memory region", "srcaddr dstaddr [dstsize]" ); + +static int do_gzwrite(cmd_tbl_t *cmdtp, int flag, + int argc, char * const argv[]) +{ + block_dev_desc_t *bdev; + int ret; + unsigned char *addr; + unsigned long length; + unsigned long writebuf = 1<<20; + u64 startoffs = 0; + u64 szexpected = 0; + + if (argc < 5) + return CMD_RET_USAGE; + ret = get_device(argv[1], argv[2], &bdev); + if (ret < 0) + return CMD_RET_FAILURE; + + addr = (unsigned char *)simple_strtoul(argv[3], NULL, 16); + length = simple_strtoul(argv[4], NULL, 16); + + if (5 < argc) { + writebuf = simple_strtoul(argv[5], NULL, 16); + if (6 < argc) { + startoffs = simple_strtoull(argv[6], NULL, 16); + if (7 < argc) + szexpected = simple_strtoull(argv[7], +NULL, 16); + } + } + + ret = gzwrite(addr, length, bdev, writebuf, startoffs, szexpected); + + return ret ? CMD_RET_FAILURE : CMD_RET_SUCCESS; +} + +U_BOOT_CMD( + gzwrite, 8, 0, do_gzwrite, + "unzip and write memory to block device", + " length [wbuf=1M [offs=0 [outsize=0]]]\n" + "\twbuf is the size in bytes (hex) of write buffer\n" + "\t\tand should be padded to erase size for SSDs\n" + "\toffs is the output start offset in bytes (hex)\n" + "\toutsize is the size of the expected output (hex bytes)\n" + "\t\tand is required for files with uncompressed lengths\n" + "\t\t4 GiB or larger\n" +); -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCHv1 01/22] arm: socfpga: spl: Add main sdram code
Hi! > +#if ENABLE_BRINGUP_DEBUGGING Could we get rid of this for initial merge? > +static inline void reg_file_set_sub_stage(uint32_t set_sub_stage) > +{ > + /* Read the current group and stage */ > + uint32_t cur_stage_group = IORD_32DIRECT(REG_FILE_CUR_STAGE, 0); Could normal u-boot memory access macros be used here? Thanks, Pavel -- (english) http://www.livejournal.com/~pavelmachek (cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] add example for file on VFAT filesystem usage
For example on a raspberry pi the u-boot environment can be saved in a file on the first VFAT partition. This example illustrates how to use it with fw_printenv/fw_setenv. Signed-off-by: Waldemar Brodkorb --- tools/env/fw_env.config | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tools/env/fw_env.config b/tools/env/fw_env.config index c9b9f6a..6f216f9 100644 --- a/tools/env/fw_env.config +++ b/tools/env/fw_env.config @@ -20,3 +20,6 @@ # Block device example #/dev/mmcblk0 0xc 0x2 + +# VFAT example +#/boot/uboot.env 0x 0x4000 -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3] ARM: DRA7-evm: DDR3: Update leveling values
Update the software leveling parameters. This fixes the random crash seen on DRA7-evm. Signed-off-by: Lokesh Vutla --- arch/arm/cpu/armv7/omap5/sdram.c | 60 1 file changed, 30 insertions(+), 30 deletions(-) diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index 61e9aef..5f8daa1 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -152,10 +152,10 @@ const struct emif_regs emif_1_regs_ddr3_532_mhz_1cs_dra_es1 = { .emif_ddr_phy_ctlr_1_init = 0x0E24400A, .emif_ddr_phy_ctlr_1= 0x0E24400A, .emif_ddr_ext_phy_ctrl_1= 0x10040100, - .emif_ddr_ext_phy_ctrl_2= 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_3= 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_4= 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_5= 0x00BB00BB, + .emif_ddr_ext_phy_ctrl_2= 0x00910091, + .emif_ddr_ext_phy_ctrl_3= 0x00950095, + .emif_ddr_ext_phy_ctrl_4= 0x009B009B, + .emif_ddr_ext_phy_ctrl_5= 0x009E009E, .emif_rd_wr_lvl_rmp_win = 0x, .emif_rd_wr_lvl_rmp_ctl = 0x, .emif_rd_wr_lvl_ctl = 0x, @@ -177,10 +177,10 @@ const struct emif_regs emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = { .emif_ddr_phy_ctlr_1_init = 0x0E24400A, .emif_ddr_phy_ctlr_1= 0x0E24400A, .emif_ddr_ext_phy_ctrl_1= 0x10040100, - .emif_ddr_ext_phy_ctrl_2= 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_3= 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_4= 0x00BB00BB, - .emif_ddr_ext_phy_ctrl_5= 0x00BB00BB, + .emif_ddr_ext_phy_ctrl_2= 0x00910091, + .emif_ddr_ext_phy_ctrl_3= 0x00950095, + .emif_ddr_ext_phy_ctrl_4= 0x009B009B, + .emif_ddr_ext_phy_ctrl_5= 0x009E009E, .emif_rd_wr_lvl_rmp_win = 0x, .emif_rd_wr_lvl_rmp_ctl = 0x, .emif_rd_wr_lvl_ctl = 0x, @@ -423,22 +423,22 @@ const u32 ddr3_ext_phy_ctrl_const_base_es2[] = { const u32 dra_ddr3_ext_phy_ctrl_const_base_es1_emif1[] = { - 0x00BB00BB, - 0x00440044, - 0x00440044, - 0x00440044, - 0x00440044, - 0x00440044, + 0x00980098, + 0x00340034, + 0x00350035, + 0x00340034, + 0x00310031, + 0x00340034, 0x007F007F, 0x007F007F, 0x007F007F, 0x007F007F, 0x007F007F, - 0x00600060, - 0x00600060, - 0x00600060, - 0x00600060, - 0x00600060, + 0x00480048, + 0x004A004A, + 0x00520052, + 0x00550055, + 0x00500050, 0x, 0x00600020, 0x40010080, @@ -452,22 +452,22 @@ dra_ddr3_ext_phy_ctrl_const_base_es1_emif1[] = { const u32 dra_ddr3_ext_phy_ctrl_const_base_es1_emif2[] = { - 0x00BB00BB, - 0x00440044, - 0x00440044, - 0x00440044, - 0x00440044, - 0x00440044, + 0x00980098, + 0x00330033, + 0x00330033, + 0x002F002F, + 0x00320032, + 0x00310031, 0x007F007F, 0x007F007F, 0x007F007F, 0x007F007F, 0x007F007F, - 0x00600060, - 0x00600060, - 0x00600060, - 0x00600060, - 0x00600060, + 0x00520052, + 0x00520052, + 0x00470047, + 0x00490049, + 0x00500050, 0x, 0x00600020, 0x40010080, -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/3] ARM: DRA7: DDR3: Update timings and leveling parameters
This series updates the DDR timing and leveling parameters on DRA7 and DRA72 EVM. Angela Stegmaier (1): ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clock Lokesh Vutla (2): ARM: DRA7: EMIF: Update SDRAM_REF_CTRL register value ARM: DRA7-evm: DDR3: Update leveling values arch/arm/cpu/armv7/omap-common/emif-common.c | 4 +- arch/arm/cpu/armv7/omap5/sdram.c | 83 ++-- arch/arm/include/asm/emif.h | 1 + board/ti/beagle_x15/board.c | 6 +- 4 files changed, 51 insertions(+), 43 deletions(-) -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/3] ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clock
From: Angela Stegmaier DDR3 timing and latency paramenters were not configured correctly for 666MHz. Fixing the timing and latency values according to Data sheet. This fixes the random crashes seen on DRA72-evm. Signed-off-by: Angela Stegmaier Signed-off-by: Lokesh Vutla --- arch/arm/cpu/armv7/omap5/sdram.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index 7d8cec0..e5456ff 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -186,18 +186,18 @@ const struct emif_regs emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = { }; const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = { - .sdram_config_init = 0x61851AB2, - .sdram_config = 0x61851AB2, + .sdram_config_init = 0x61862B32, + .sdram_config = 0x61862B32, .sdram_config2 = 0x0800, - .ref_ctrl = 0x1035, - .sdram_tim1 = 0xCCCF36B3, - .sdram_tim2 = 0x308F7FDA, - .sdram_tim3 = 0x027F88A8, + .ref_ctrl = 0x144A, + .sdram_tim1 = 0xD113781C, + .sdram_tim2 = 0x308F7FE3, + .sdram_tim3 = 0x009F86A8, .read_idle_ctrl = 0x0005, .zq_config = 0x0007190B, .temp_alert_config = 0x, - .emif_ddr_phy_ctlr_1_init = 0x0024400A, - .emif_ddr_phy_ctlr_1= 0x0024400A, + .emif_ddr_phy_ctlr_1_init = 0x0E24400D, + .emif_ddr_phy_ctlr_1= 0x0E24400D, .emif_ddr_ext_phy_ctrl_1= 0x10040100, .emif_ddr_ext_phy_ctrl_2= 0x00A400A4, .emif_ddr_ext_phy_ctrl_3= 0x00A900A9, -- 1.9.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] ARM: DRA7: EMIF: Update SDRAM_REF_CTRL register value
The value in SDRAM_REF_CTRL controls the delay time between the initial rising edge of DDR_RESETn to rising edge of DDR_CKE (JEDEC specs this as 500us). In order to achieve this, SDRAM_REF_CTRL should be written with a value corresponding to 500us delay before starting DDR initialization sequence, and configure proper value at the end of sequence. Signed-off-by: Lokesh Vutla --- arch/arm/cpu/armv7/omap-common/emif-common.c | 4 +++- arch/arm/cpu/armv7/omap5/sdram.c | 9 ++--- arch/arm/include/asm/emif.h | 1 + board/ti/beagle_x15/board.c | 6 -- 4 files changed, 14 insertions(+), 6 deletions(-) diff --git a/arch/arm/cpu/armv7/omap-common/emif-common.c b/arch/arm/cpu/armv7/omap-common/emif-common.c index e601ba1..c01a98f 100644 --- a/arch/arm/cpu/armv7/omap-common/emif-common.c +++ b/arch/arm/cpu/armv7/omap-common/emif-common.c @@ -252,6 +252,8 @@ static void ddr3_init(u32 base, const struct emif_regs *regs) { struct emif_reg_struct *emif = (struct emif_reg_struct *)base; + writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl); + writel(regs->sdram_config_init, &emif->emif_sdram_config); /* * Set SDRAM_CONFIG and PHY control registers to locked frequency * and RL =7. As the default values of the Mode Registers are not @@ -265,7 +267,6 @@ static void ddr3_init(u32 base, const struct emif_regs *regs) writel(regs->sdram_tim2, &emif->emif_sdram_tim_2); writel(regs->sdram_tim3, &emif->emif_sdram_tim_3); - writel(regs->ref_ctrl, &emif->emif_sdram_ref_ctrl); writel(regs->read_idle_ctrl, &emif->emif_read_idlectrl); /* @@ -274,6 +275,7 @@ static void ddr3_init(u32 base, const struct emif_regs *regs) */ if (is_dra7xx()) { do_ext_phy_settings(base, regs); + writel(regs->ref_ctrl_final, &emif->emif_sdram_ref_ctrl); writel(regs->sdram_config2, &emif->emif_lpddr2_nvm_config); writel(regs->sdram_config_init, &emif->emif_sdram_config); } else { diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c index e5456ff..61e9aef 100644 --- a/arch/arm/cpu/armv7/omap5/sdram.c +++ b/arch/arm/cpu/armv7/omap5/sdram.c @@ -141,7 +141,8 @@ const struct emif_regs emif_1_regs_ddr3_532_mhz_1cs_dra_es1 = { .sdram_config_init = 0x61851ab2, .sdram_config = 0x61851ab2, .sdram_config2 = 0x0800, - .ref_ctrl = 0x1035, + .ref_ctrl = 0x40F1, + .ref_ctrl_final = 0x1035, .sdram_tim1 = 0xCCCF36B3, .sdram_tim2 = 0x308F7FDA, .sdram_tim3 = 0x027F88A8, @@ -165,7 +166,8 @@ const struct emif_regs emif_2_regs_ddr3_532_mhz_1cs_dra_es1 = { .sdram_config_init = 0x61851B32, .sdram_config = 0x61851B32, .sdram_config2 = 0x0800, - .ref_ctrl = 0x1035, + .ref_ctrl = 0x40F1, + .ref_ctrl_final = 0x1035, .sdram_tim1 = 0xCCCF36B3, .sdram_tim2 = 0x308F7FDA, .sdram_tim3 = 0x027F88A8, @@ -189,7 +191,8 @@ const struct emif_regs emif_1_regs_ddr3_666_mhz_1cs_dra_es1 = { .sdram_config_init = 0x61862B32, .sdram_config = 0x61862B32, .sdram_config2 = 0x0800, - .ref_ctrl = 0x144A, + .ref_ctrl = 0x493E, + .ref_ctrl_final = 0x144A, .sdram_tim1 = 0xD113781C, .sdram_tim2 = 0x308F7FE3, .sdram_tim3 = 0x009F86A8, diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h index 2fe5776..5a7a812 100644 --- a/arch/arm/include/asm/emif.h +++ b/arch/arm/include/asm/emif.h @@ -1122,6 +1122,7 @@ struct emif_regs { u32 sdram_config; u32 sdram_config2; u32 ref_ctrl; + u32 ref_ctrl_final; u32 sdram_tim1; u32 sdram_tim2; u32 sdram_tim3; diff --git a/board/ti/beagle_x15/board.c b/board/ti/beagle_x15/board.c index db96e34..3a7e04d 100644 --- a/board/ti/beagle_x15/board.c +++ b/board/ti/beagle_x15/board.c @@ -47,7 +47,8 @@ static const struct emif_regs beagle_x15_emif1_ddr3_532mhz_emif_regs = { .sdram_config_init = 0x61851b32, .sdram_config = 0x61851b32, .sdram_config2 = 0x, - .ref_ctrl = 0x1035, + .ref_ctrl = 0x40F1, + .ref_ctrl_final = 0x1035, .sdram_tim1 = 0xceef266b, .sdram_tim2