Re: [U-Boot] [RFC][PATCH 00/21] [x86] 'Comming of Age'
Joakim Tjernlund wrote: > > Graeme Russ wrote on 2010/03/27 12:54:03: >> Joakim Tjernlund wrote: >>> I did a few months ago for MPC83xx and sent it to the list. There was some >>> discussion but in the end it wasn't applied because it was too invasive. >>> PPC is especially bad as it needs to relocate string literals too. >>> >> To implement full relocation, I simply need to add an additional parameter >> to this function which provides the 'link versus load' offset which will >> get applied to the 'load versus run' offset calculation > > Are we talking about the same thing? when you say "does not > need to be loaded at TEXT_BASE" you need something like my LINK_OFF patch, > otherwise I don't see how you can boot out of flash otherwise. > I realise now that we are not talking about the same thing. The x86 port always relocates into (and runs from) RAM. Only a very small stub is run from flash (SDRAM setup and sizing, copy to RAM, process relocation entries etc). This stub can be made fully relocatable while running from Flash (with a few tricks) By adjusting all position dependent code after copying into RAM, LINK_OFF is no longer needed Graeme ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4 tabify] net: add altera triple speeds ethernet mac driver
This driver supports the Altera triple speeds 10/100/1000 ethernet
mac.
Signed-off-by: Thomas Chou
---
drivers/net/Makefile |1 +
drivers/net/altera_tse.c | 978 ++
drivers/net/altera_tse.h | 512
include/netdev.h |1 +
4 files changed, 1492 insertions(+), 0 deletions(-)
create mode 100644 drivers/net/altera_tse.c
create mode 100644 drivers/net/altera_tse.h
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index 0e68e52..b75c02f 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -27,6 +27,7 @@ LIB := $(obj)libnet.a
COBJS-$(CONFIG_DRIVER_3C589) += 3c589.o
COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o
+COBJS-$(CONFIG_ALTERA_TSE) += altera_tse.o
COBJS-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
COBJS-$(CONFIG_DRIVER_AX88180) += ax88180.o
COBJS-$(CONFIG_BCM570x) += bcm570x.o bcm570x_autoneg.o 5701rls.o
diff --git a/drivers/net/altera_tse.c b/drivers/net/altera_tse.c
new file mode 100644
index 000..7a2cb66
--- /dev/null
+++ b/drivers/net/altera_tse.c
@@ -0,0 +1,978 @@
+/*
+ * Altera 10/100/1000 triple speed ethernet mac driver
+ *
+ * Copyright (C) 2008 Altera Corporation.
+ * Copyright (C) 2010 Thomas Chou
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include "altera_tse.h"
+
+static int tse_eth_send(struct eth_device *dev, volatile void *packet,
+ int length);
+static int tse_eth_rx(struct eth_device *dev);
+static void tse_eth_halt(struct eth_device *dev);
+static void tse_eth_reset(struct eth_device *dev);
+static int tse_eth_init(struct eth_device *dev, bd_t *bd);
+
+static int tse_mdio_read(struct altera_tse_priv *priv, unsigned int regnum);
+static int tse_mdio_write(struct altera_tse_priv *priv, unsigned int regnum,
+ unsigned int value);
+#define read_phy_reg(priv, regnum) tse_mdio_read(priv, regnum)
+#define write_phy_reg(priv, regnum, value) tse_mdio_write(priv, regnum, value)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) && !defined(BITBANGMII)
+static int altera_tse_miiphy_write(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value);
+static int altera_tse_miiphy_read(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value);
+#endif
+
+static int tse_adjust_link(struct altera_tse_priv *priv);
+
+static uint mii_parse_88E1011_psr(uint mii_reg, struct altera_tse_priv *priv);
+static uint mii_parse_sr(uint mii_reg, struct altera_tse_priv *priv);
+static uint mii_m88es_setmode_sr(uint mii_reg,
+struct altera_tse_priv *priv);
+static uint mii_m88es_setmode_cr(uint mii_reg,
+struct altera_tse_priv *priv);
+static uint mii_cr_init(uint mii_reg, struct altera_tse_priv *priv);
+
+static struct phy_info *get_phy_info(struct eth_device *dev);
+static void phy_run_commands(struct altera_tse_priv *priv, struct phy_cmd
*cmd);
+static int init_phy(struct eth_device *dev);
+
+/* sgdma debug - print descriptor */
+static void alt_sgdma_print_desc(volatile struct alt_sgdma_descriptor *desc)
+{
+ debug("SGDMA DEBUG :\n");
+ debug("desc->source : 0x%x \n", (unsigned int)desc->source);
+ debug("desc->destination : 0x%x \n", (unsigned int)desc->destination);
+ debug("desc->next : 0x%x \n", (unsigned int)desc->next);
+ debug("desc->source_pad : 0x%x \n", (unsigned int)desc->source_pad);
+ debug("desc->destination_pad : 0x%x \n",
+ (unsigned int)desc->destination_pad);
+ debug("desc->next_pad : 0x%x \n", (unsigned int)desc->next_pad);
+ debug("desc->bytes_to_transfer : 0x%x \n",
+ (unsigned int)desc->bytes_to_transfer);
+ debug("desc->actual_bytes_transferred : 0x%x \n",
+ (unsigned int)desc->actual_bytes_transferred);
+ debug("desc->descriptor_status : 0x%x \n",
+ (unsigned int)desc->descriptor_status);
+ debug("desc->descriptor_control : 0x%x \n",
+ (unsigned int)desc->descriptor_control);
+}
+
+/* This is a generic routine that the SGDMA mode-specific routines
+ * call to populate a descriptor.
+ * arg1:pointer to first SGDMA descriptor.
+ * arg2:pointer to next SGDMA descriptor.
+ * arg3:Address to where data to be written.
+ * arg4:Address from where data to be read.
+ * arg5:no of byte to transaction.
+ * arg6:variable indicating to generate start of packet or not
+ * arg7:read fixed
+ * arg8:write fixed
+ * arg9:read burst
+ * arg10:write burst
+ * arg11:atlantic_channel number
+ */
+s
Re: [U-Boot] [RFC][PATCH 00/21] [x86] 'Comming of Age'
Graeme Russ wrote on 2010/03/28 09:38:47: > > Joakim Tjernlund wrote: > > > > Graeme Russ wrote on 2010/03/27 12:54:03: > >> Joakim Tjernlund wrote: > >>> I did a few months ago for MPC83xx and sent it to the list. There was some > >>> discussion but in the end it wasn't applied because it was too invasive. > >>> PPC is especially bad as it needs to relocate string literals too. > >>> > >> To implement full relocation, I simply need to add an additional parameter > >> to this function which provides the 'link versus load' offset which will > >> get applied to the 'load versus run' offset calculation > > > > Are we talking about the same thing? when you say "does not > > need to be loaded at TEXT_BASE" you need something like my LINK_OFF patch, > > otherwise I don't see how you can boot out of flash otherwise. > > > > I realise now that we are not talking about the same thing. The x86 port > always relocates into (and runs from) RAM. Only a very small stub is run > from flash (SDRAM setup and sizing, copy to RAM, process relocation entries > etc). This stub can be made fully relocatable while running from Flash > (with a few tricks) Have you tried that yet? This is exactly what LINK_OFF is for. Turns out that there is more code than you think that is executed before relocation into RAM. Perhaps your stub is very small and doesn't need the serial port or access to EEPROM via I2C. That won't work in the long run though. > > By adjusting all position dependent code after copying into RAM, LINK_OFF > is no longer needed You don't need LINK_OFF for this, PPC already have this feature since it can relocate into any RAM address. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH V2] Moved board specific values in config file
The lowlevel_init file contained some hard-coded values to setup the RAM. These board related values are moved into the board configuration file. Signed-off-by: Stefano Babic --- cpu/arm_cortexa8/mx51/lowlevel_init.S |5 - include/configs/mx51evk.h |3 +++ 2 files changed, 7 insertions(+), 1 deletions(-) diff --git a/cpu/arm_cortexa8/mx51/lowlevel_init.S b/cpu/arm_cortexa8/mx51/lowlevel_init.S index 31af9e2..783c81f 100644 --- a/cpu/arm_cortexa8/mx51/lowlevel_init.S +++ b/cpu/arm_cortexa8/mx51/lowlevel_init.S @@ -158,6 +158,7 @@ /* Switch peripheral to PLL 3 */ ldr r0, =CCM_BASE_ADDR ldr r1, =0x10C0 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] ldr r1, =0x13239145 str r1, [r0, #CLKCTL_CBCDR] @@ -171,6 +172,7 @@ ldr r1, =0x19239145 str r1, [r0, #CLKCTL_CBCDR] ldr r1, =0x20C0 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] mov r3, #DP_OP_216 @@ -201,9 +203,10 @@ /* setup the rest */ /* Use lp_apm (24MHz) source for perclk */ ldr r1, =0x20C2 + orr r1,r1,#CONFIG_SYS_DDR_CLKSEL str r1, [r0, #CLKCTL_CBCMR] /* ddr clock from PLL 1, all perclk dividers are 1 since using 24MHz */ - ldr r1, =0x59E35100 + ldr r1, =CONFIG_SYS_CLKTL_CBCDR str r1, [r0, #CLKCTL_CBCDR] /* Restore the default values in the Gate registers */ diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index e2daeca..5096ab7 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -177,6 +177,9 @@ #define PHYS_SDRAM_1 CSD0_BASE_ADDR #define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) +#define CONFIG_SYS_DDR_CLKSEL 0 +#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 + /*--- * FLASH and environment organization */ -- 1.6.3.3 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] using AT91_PMC_MCKR_MDIV_ instead of LEGACY one in at91/clock.c
Asen Dimov wrote: > Signed-off-by: Asen Dimov > --- > cpu/arm926ejs/at91/clock.c |3 ++- > 1 files changed, 2 insertions(+), 1 deletions(-) > > diff --git a/cpu/arm926ejs/at91/clock.c b/cpu/arm926ejs/at91/clock.c > index b06d760..ecf91f5 100644 > --- a/cpu/arm926ejs/at91/clock.c > +++ b/cpu/arm926ejs/at91/clock.c > @@ -203,7 +203,8 @@ int at91_clock_init(unsigned long main_clock) > if (mckr & AT91_PMC_MCKR_MDIV_MASK) > freq /= 2; /* processor clock division */ > #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) > - mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) == AT91SAM9_PMC_MDIV_3 > + mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) == > + (AT91_PMC_MCKR_MDIV_2 | AT91_PMC_MCKR_MDIV_4) > ? freq / 3 > : freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8)); > #else Applied to arm/next Thanks Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] cant not enter uboot command line
when debuging the S3C2416, it could not enter uboot command line, as follows printed information, and then the there will be with no response when the key pressed. I'm very pleased for your advice! Thank you! CPU: s3c2...@400mhz mmc0: S Fclk = 800MHz, Hclk = 133MHz, Pclk = 66MHz m Board: SMDK2416 Mobile DDRalising SD card DRAM:64 MB Flash: 0 kBs3c-sdhci.1: NAND:512 MBhsmmc (1333 *** Warning - bad CRC or NAND, using default environment sdhci: card In: serialion=0 Out: serial s3c-sd Err: serial clock source 1 Not found the DM9000 bs60_init >>> test [*]trinityb_init: bs_chip_command(INIT_SYS_RUN)vfat /dev/mmcblk0p1 /mn [*]trinityb_init: bs_chip_wr_reg( 0x0106, 0x0203 ); SDRAM Refresh Clock Configur [*]loa mmcblk0: error -110 tr ationring measure2=7,duration=0 sdh measure2=0,duration=0 [*] [*]set rotate 3 [*]load color bar [*]disp_full(2, 15); [*]bs_cmd_wait_disp_ready() measure2=5,duration=0 measure2=1559,duration=0 nand_read 220 trinityb_display_bitmap c000 There is no valid bmp file at the given address Hit any key to stop autoboot: 0 SMDK2416 # SMDK2416 # SMDK2416 # SMDK2416 # U-Boot 1.1.6 (Sep 24 2009 - 10:24:40) for SMDK2416 Unknown command 'U-Boot' - try 'help' SMDK2416 # SMDK2416 # SMDK2416 # SMDK2416 # SMDK2416 # SMDK2416 # CPU:3#U-Boot 1.1.6 (Sep 24 2009 - 10:24:40) for SMDK241# CPU :3#U-Boot 1.1.6 (Sep 24 2009 - 10:24:40) for SMDK241# CPU:3#U-Boot 1.1.6 (Sep 24 2009 - 10:24:40) for SMDK241# CPU:3#U-Boot 1.1.6 (Sep 24 2009 - 10:24:40) for SMDK24 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/2] Add AT91_ECC_BASE to at91sam9260.h to use atmel_nand with HW-ECC
--- include/asm-arm/arch-at91/at91sam9260.h |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/asm-arm/arch-at91/at91sam9260.h b/include/asm-arm/arch-at91/at91sam9260.h index a60a081..3bc7167 100644 --- a/include/asm-arm/arch-at91/at91sam9260.h +++ b/include/asm-arm/arch-at91/at91sam9260.h @@ -50,6 +50,7 @@ #define AT91SAM9260_ID_IRQ231 /* Advanced Interrupt Controller (IRQ2) */ #define AT91_EMAC_BASE 0xfffc4000 +#define AT91_ECC_BASE 0xe800 #define AT91_SDRAMC_BASE 0xea00 #define AT91_SMC_BASE 0xec00 #define AT91_MATRIX_BASE 0xee00 -- 1.6.2.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 0/2] atmel_nand with HW-ECC
Hello, I've cherry-picked the patch for atmel_nand to enable HW-ECC on the master and had to apply some changes. Afterwards it seems to work on an AT91SAM9263. Thanks for that functionality. Regards, Alexander Holler ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/2] Fix compile errors for atmel_nand with hw-ecc and new SoC access
atmel_nand.c with HW-ECC doesn't compile with the new SoC access.
Using CONFIG_AT91_LEGACY to circumvent the compile errors only leaves
the driver in a state where it doesn't find the NAND.
To use HW-ECC with atmel_nand one has to use
CONFIG_SYS_NAND_ECC_BASE AT91_ECC0_BASE (instead of AT91_ECC0)
for an AT91SAM9263 or AT91_ECC_BASE for an AT91SAM9260.
I've removed three unused variables too.
---
drivers/mtd/nand/atmel_nand.c |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index d5eb54a..5f10a02 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -35,9 +35,9 @@
/* Register access macros */
#define ecc_readl(add, reg)\
- readl(AT91_BASE_SYS + add + ATMEL_ECC_##reg)
+ readl(add + ATMEL_ECC_##reg)
#define ecc_writel(add, reg, value)\
- writel((value), AT91_BASE_SYS + add + ATMEL_ECC_##reg)
+ writel((value), add + ATMEL_ECC_##reg)
#include "atmel_nand_ecc.h"/* Hardware ECC registers */
@@ -79,7 +79,6 @@ static struct nand_ecclayout atmel_oobinfo_small = {
static int atmel_nand_calculate(struct mtd_info *mtd,
const u_char *dat, unsigned char *ecc_code)
{
- struct nand_chip *nand_chip = mtd->priv;
unsigned int ecc_value;
/* get the first 2 ECC bytes */
@@ -167,7 +166,7 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char
*dat,
u_char *read_ecc, u_char *isnull)
{
struct nand_chip *nand_chip = mtd->priv;
- unsigned int ecc_status, ecc_parity, ecc_mode;
+ unsigned int ecc_status;
unsigned int ecc_word, ecc_bit;
/* get the status from the Status Register */
--
1.6.2.5
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[U-Boot] [PATCH] nios2: add altera cf reset
This patch toggles power to reset the cf card.
Signed-off-by: Thomas Chou
---
board/altera/common/cfide.c | 34 ++
1 files changed, 34 insertions(+), 0 deletions(-)
create mode 100644 board/altera/common/cfide.c
diff --git a/board/altera/common/cfide.c b/board/altera/common/cfide.c
new file mode 100644
index 000..665c85d
--- /dev/null
+++ b/board/altera/common/cfide.c
@@ -0,0 +1,34 @@
+/*
+ * Altera CF drvier
+ *
+ * (C) Copyright 2010, Thomas Chou
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include
+#include
+
+#if defined(CONFIG_IDE_RESET) && defined(CONFIG_SYS_CF_CTL_BASE)
+/* ide_set_reset for Altera CF interface */
+#define ALTERA_CF_CTL_STATUS 0
+#define ALTERA_CF_IDE_CTL 4
+#define ALTERA_CF_CTL_STATUS_PRESENT_MSK (0x1)
+#define ALTERA_CF_CTL_STATUS_POWER_MSK (0x2)
+#define ALTERA_CF_CTL_STATUS_RESET_MSK (0x4)
+#define ALTERA_CF_CTL_STATUS_IRQ_EN_MSK(0x8)
+#define ALTERA_CF_IDE_CTL_IRQ_EN_MSK (0x1)
+
+void ide_set_reset(int idereset)
+{
+ if (idereset) {
+ writel(ALTERA_CF_CTL_STATUS_RESET_MSK, /* power down */
+ CONFIG_SYS_CF_CTL_BASE + ALTERA_CF_CTL_STATUS);
+ udelay(500 * 1000); /* 0.5 sec delay */
+ writel(ALTERA_CF_CTL_STATUS_POWER_MSK, /* power up */
+ CONFIG_SYS_CF_CTL_BASE + ALTERA_CF_CTL_STATUS);
+ udelay(500 * 1000); /* 0.5 sec delay */
+ }
+}
+#endif
--
1.6.6.1
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[U-Boot] [PATCH v2] nios2: add altera cf reset
This patch toggles power to reset the cf card.
Signed-off-by: Thomas Chou
---
board/altera/common/cfide.c | 33 +
1 files changed, 33 insertions(+), 0 deletions(-)
create mode 100644 board/altera/common/cfide.c
diff --git a/board/altera/common/cfide.c b/board/altera/common/cfide.c
new file mode 100644
index 000..491b6e2
--- /dev/null
+++ b/board/altera/common/cfide.c
@@ -0,0 +1,33 @@
+/*
+ * Altera CF drvier
+ *
+ * (C) Copyright 2010, Thomas Chou
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include
+#include
+
+#if defined(CONFIG_IDE_RESET) && defined(CONFIG_SYS_CF_CTL_BASE)
+/* ide_set_reset for Altera CF interface */
+#define ALTERA_CF_CTL_STATUS 0
+#define ALTERA_CF_IDE_CTL 4
+#define ALTERA_CF_CTL_STATUS_PRESENT_MSK (0x1)
+#define ALTERA_CF_CTL_STATUS_POWER_MSK (0x2)
+#define ALTERA_CF_CTL_STATUS_RESET_MSK (0x4)
+#define ALTERA_CF_CTL_STATUS_IRQ_EN_MSK(0x8)
+#define ALTERA_CF_IDE_CTL_IRQ_EN_MSK (0x1)
+
+void ide_set_reset(int idereset)
+{
+ writel(idereset ? ALTERA_CF_CTL_STATUS_RESET_MSK :
+ ALTERA_CF_CTL_STATUS_POWER_MSK,
+ CONFIG_SYS_CF_CTL_BASE + ALTERA_CF_CTL_STATUS);
+ /* wait 500 ms for power to stabilize */
+ for (i=0; i<500; ++i) {
+ udelay (1000);
+ }
+}
+#endif
--
1.6.6.1
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[U-Boot] [PATCH v3] nios2: add altera cf reset
This patch toggles power to reset the cf card.
Signed-off-by: Thomas Chou
---
board/altera/common/cfide.c | 34 ++
1 files changed, 34 insertions(+), 0 deletions(-)
create mode 100644 board/altera/common/cfide.c
diff --git a/board/altera/common/cfide.c b/board/altera/common/cfide.c
new file mode 100644
index 000..84ca213
--- /dev/null
+++ b/board/altera/common/cfide.c
@@ -0,0 +1,34 @@
+/*
+ * Altera CF drvier
+ *
+ * (C) Copyright 2010, Thomas Chou
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include
+#include
+
+#if defined(CONFIG_IDE_RESET) && defined(CONFIG_SYS_CF_CTL_BASE)
+/* ide_set_reset for Altera CF interface */
+#define ALTERA_CF_CTL_STATUS 0
+#define ALTERA_CF_IDE_CTL 4
+#define ALTERA_CF_CTL_STATUS_PRESENT_MSK (0x1)
+#define ALTERA_CF_CTL_STATUS_POWER_MSK (0x2)
+#define ALTERA_CF_CTL_STATUS_RESET_MSK (0x4)
+#define ALTERA_CF_CTL_STATUS_IRQ_EN_MSK(0x8)
+#define ALTERA_CF_IDE_CTL_IRQ_EN_MSK (0x1)
+
+void ide_set_reset(int idereset)
+{
+ int i;
+ writel(idereset ? ALTERA_CF_CTL_STATUS_RESET_MSK :
+ ALTERA_CF_CTL_STATUS_POWER_MSK,
+ CONFIG_SYS_CF_CTL_BASE + ALTERA_CF_CTL_STATUS);
+ /* wait 500 ms for power to stabilize */
+ for (i=0; i<500; ++i) {
+ udelay (1000);
+ }
+}
+#endif
--
1.6.6.1
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Re: [U-Boot] [PATCH v3] nios2: add altera cf reset
Thomas, Please test your patches _before_ you post them. When you post three versions of the same patch all within thirty minutes, you do little to build any confidence in their quality or your reputation. Regards, --Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 0/8] ST-Ericsson Ux500 support
Rabin Vincent wrote: > This series adds base support for ST-Ericsson's Ux500 series of Cortex-A9 > based The big change I would like to see with this patchset is for the arm_cortexa9 cpu be added. > SoCs. Several peripherals are shared with the Nomadik family, for which > support already exists in U-Boot. > > Note: The series must be applied on top of the patch "[PATCH V4] Nomadik: fix > reset_timer()" posted by Alessandro Rubini on 2009-11-25: > http://lists.denx.de/pipermail/u-boot/2009-November/064800.html > Cc: Alessandro Rubini This patch has been applied to arm/next. Thanks for explicilty calling it out here. Tom > > Rabin Vincent (8): > Nomadik: move timer code to drivers/misc > Nomadik: move gpio driver to drivers/gpio > nomadik_gpio: get base address from platform code > nomadik_mtu: support configurable clock rates > ARM Cortex A8: ifdef code calling lowlevel init > ux500: add SoC-specific code > pl01x: add support for Ux500 variant of pl011 > mop500: add board-specific files > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/8] Nomadik: move timer code to drivers/misc
Rabin Vincent wrote:
> The Nomadik MTU driver will also be used on the U8500 SoC, so move it
> out of platform-specific code.
>
> Acked-by: Alessandro Rubini
> Acked-by: Michael Brandt
> Signed-off-by: Rabin Vincent
> ---
> cpu/arm926ejs/nomadik/Makefile |2 +-
> drivers/misc/Makefile |1 +
> .../nomadik/timer.c => drivers/misc/nomadik_mtu.c |2 +-
> include/configs/nhk8815.h |1 +
> .../{asm-arm/arch-nomadik/mtu.h => nomadik_mtu.h} |0
Move the nomadik_gpio.h and nomadik_mtu.h into nomadik.h
Just to have 1 nomadik *.h
Tom
> 5 files changed, 4 insertions(+), 2 deletions(-)
> rename cpu/arm926ejs/nomadik/timer.c => drivers/misc/nomadik_mtu.c (98%)
> rename include/{asm-arm/arch-nomadik/mtu.h => nomadik_mtu.h} (100%)
>
> diff --git a/cpu/arm926ejs/nomadik/Makefile b/cpu/arm926ejs/nomadik/Makefile
> index 0fc9f2a..180db8b 100644
> --- a/cpu/arm926ejs/nomadik/Makefile
> +++ b/cpu/arm926ejs/nomadik/Makefile
> @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
>
> LIB = $(obj)lib$(SOC).a
>
> -COBJS= timer.o gpio.o
> +COBJS= gpio.o
> SOBJS= reset.o
>
> SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
> index f6df60f..5c0c6f3 100644
> --- a/drivers/misc/Makefile
> +++ b/drivers/misc/Makefile
> @@ -28,6 +28,7 @@ LIB := $(obj)libmisc.a
> COBJS-$(CONFIG_ALI152X) += ali512x.o
> COBJS-$(CONFIG_DS4510) += ds4510.o
> COBJS-$(CONFIG_FSL_LAW) += fsl_law.o
> +COBJS-$(CONFIG_NOMADIK_MTU) += nomadik_mtu.o
> COBJS-$(CONFIG_NS87308) += ns87308.o
> COBJS-$(CONFIG_STATUS_LED) += status_led.o
> COBJS-$(CONFIG_TWL4030_LED) += twl4030_led.o
> diff --git a/cpu/arm926ejs/nomadik/timer.c b/drivers/misc/nomadik_mtu.c
> similarity index 98%
> rename from cpu/arm926ejs/nomadik/timer.c
> rename to drivers/misc/nomadik_mtu.c
> index 1d98ef3..b9c0fb1 100644
> --- a/cpu/arm926ejs/nomadik/timer.c
> +++ b/drivers/misc/nomadik_mtu.c
> @@ -22,7 +22,7 @@
>
> #include
> #include
> -#include
> +#include
>
> /*
> * The timer is a decrementer, we'll left it free running at 2.4MHz.
> diff --git a/include/configs/nhk8815.h b/include/configs/nhk8815.h
> index 2b640dc..4dd391e 100644
> --- a/include/configs/nhk8815.h
> +++ b/include/configs/nhk8815.h
> @@ -97,6 +97,7 @@
> /* timing informazion */
> #define CONFIG_SYS_HZ1000 /* Mandatory... */
> #define CONFIG_SYS_TIMERBASE 0x101E2000
> +#define CONFIG_NOMADIK_MTU
>
> /* serial port (PL011) configuration */
> #define CONFIG_PL011_SERIAL
> diff --git a/include/asm-arm/arch-nomadik/mtu.h b/include/nomadik_mtu.h
> similarity index 100%
> rename from include/asm-arm/arch-nomadik/mtu.h
> rename to include/nomadik_mtu.h
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Re: [U-Boot] [PATCH v3] nios2: add altera cf reset
Dear Thomas Chou, In message <1269782852-4347-1-git-send-email-tho...@wytron.com.tw> you wrote: > This patch toggles power to reset the cf card. > > Signed-off-by: Thomas Chou In addition to Scott's comment: Please always include a log of what was changed compared to the previous version of the patch; at this comment below the "---" line. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de What we anticipate seldom occurs; what we least expect generally happens. - Bengamin Disraeli ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/8] Nomadik: move gpio driver to drivers/gpio
Rabin Vincent wrote:
> The Nomadik GPIO driver will also be used on the U8500 SoC, so move it
> out of platform-specific code.
>
> Acked-by: Alessandro Rubini
> Acked-by: Michael Brandt
> Signed-off-by: Rabin Vincent
> ---
> board/st/nhk8815/nhk8815.c |2 +-
> cpu/arm926ejs/nomadik/Makefile |1 -
> drivers/gpio/Makefile |1 +
> .../nomadik/gpio.c => drivers/gpio/nomadik_gpio.c |2 +-
> include/configs/nhk8815.h |7 +--
> .../arch-nomadik/gpio.h => nomadik_gpio.h} |0
> 6 files changed, 8 insertions(+), 5 deletions(-)
> rename cpu/arm926ejs/nomadik/gpio.c => drivers/gpio/nomadik_gpio.c (98%)
> rename include/{asm-arm/arch-nomadik/gpio.h => nomadik_gpio.h} (100%)
>
> diff --git a/board/st/nhk8815/nhk8815.c b/board/st/nhk8815/nhk8815.c
> index faef810..4f5f94f 100644
> --- a/board/st/nhk8815/nhk8815.c
> +++ b/board/st/nhk8815/nhk8815.c
> @@ -28,7 +28,7 @@
> #include
> #include
> #include
> -#include
> +#include
>
> DECLARE_GLOBAL_DATA_PTR;
>
> diff --git a/cpu/arm926ejs/nomadik/Makefile b/cpu/arm926ejs/nomadik/Makefile
> index 180db8b..35550d7 100644
> --- a/cpu/arm926ejs/nomadik/Makefile
> +++ b/cpu/arm926ejs/nomadik/Makefile
> @@ -25,7 +25,6 @@ include $(TOPDIR)/config.mk
>
> LIB = $(obj)lib$(SOC).a
>
> -COBJS= gpio.o
> SOBJS= reset.o
>
> SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
> index d966082..d84f81e 100644
> --- a/drivers/gpio/Makefile
> +++ b/drivers/gpio/Makefile
> @@ -28,6 +28,7 @@ LIB := $(obj)libgpio.a
> COBJS-$(CONFIG_AT91_GPIO)+= at91_gpio.o
> COBJS-$(CONFIG_KIRKWOOD_GPIO)+= kw_gpio.o
> COBJS-$(CONFIG_MX31_GPIO)+= mx31_gpio.o
> +COBJS-$(CONFIG_NOMADIK_GPIO) += nomadik_gpio.o
> COBJS-$(CONFIG_PCA953X) += pca953x.o
>
> COBJS:= $(COBJS-y)
> diff --git a/cpu/arm926ejs/nomadik/gpio.c b/drivers/gpio/nomadik_gpio.c
> similarity index 98%
> rename from cpu/arm926ejs/nomadik/gpio.c
> rename to drivers/gpio/nomadik_gpio.c
> index 62a375b..e8a7bca 100644
> --- a/cpu/arm926ejs/nomadik/gpio.c
> +++ b/drivers/gpio/nomadik_gpio.c
> @@ -22,7 +22,7 @@
>
> #include
> #include
> -#include
> +#include
>
> static unsigned long gpio_base[4] = {
> NOMADIK_GPIO0_BASE,
> diff --git a/include/configs/nhk8815.h b/include/configs/nhk8815.h
> index 4dd391e..8ba1e5e 100644
> --- a/include/configs/nhk8815.h
> +++ b/include/configs/nhk8815.h
> @@ -99,6 +99,9 @@
> #define CONFIG_SYS_TIMERBASE 0x101E2000
> #define CONFIG_NOMADIK_MTU
>
> +/* GPIO */
> +#define CONFIG_NOMADIK_GPIO
> +
> /* serial port (PL011) configuration */
> #define CONFIG_PL011_SERIAL
> #define CONFIG_CONS_INDEX1
> @@ -110,9 +113,9 @@
> #define CONFIG_PL01x_PORTS { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
> #define CONFIG_PL011_CLOCK 4800
>
> -/* i2c, for the port extenders (uses gpio.c in board directory) */
> +/* i2c, for the port extenders (uses drivers/gpio/nomadik_gpio.c) */
May want to just strip the path '(uses )' from the comment
> #ifndef __ASSEMBLY__
> -#include
> +#include
It would be better if the #include was not in config file.
Can this be moved to the C files that need it ?
> #define CONFIG_CMD_I2C
> #define CONFIG_SOFT_I2C
> #define CONFIG_SYS_I2C_SPEED 40
> diff --git a/include/asm-arm/arch-nomadik/gpio.h b/include/nomadik_gpio.h
> similarity index 100%
> rename from include/asm-arm/arch-nomadik/gpio.h
> rename to include/nomadik_gpio.h
Tom
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Re: [U-Boot] [PATCH 3/8] nomadik_gpio: get base address from platform code
Rabin Vincent wrote:
> Change the Nomadik GPIO driver to get the base addresses from platform
> specific code, since it will be used on multiple platforms with
> different base addresses.
>
> Acked-by: Alessandro Rubini
> Acked-by: Michael Brandt
> Signed-off-by: Rabin Vincent
> ---
> board/st/nhk8815/nhk8815.c |7 +++
> drivers/gpio/nomadik_gpio.c |9 +
> include/nomadik_gpio.h |2 ++
> 3 files changed, 10 insertions(+), 8 deletions(-)
>
> diff --git a/board/st/nhk8815/nhk8815.c b/board/st/nhk8815/nhk8815.c
> index 4f5f94f..79c91a7 100644
> --- a/board/st/nhk8815/nhk8815.c
> +++ b/board/st/nhk8815/nhk8815.c
> @@ -32,6 +32,13 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +unsigned long nmk_gpio_base[] = {
> + NOMADIK_GPIO0_BASE,
> + NOMADIK_GPIO1_BASE,
> + NOMADIK_GPIO2_BASE,
> + NOMADIK_GPIO3_BASE
> +};
> +
Should added #if-def CONFIG_NOMADIK_GPIO, to not include this global if
it is not used.
> #ifdef CONFIG_SHOW_BOOT_PROGRESS
> void show_boot_progress(int progress)
> {
> diff --git a/drivers/gpio/nomadik_gpio.c b/drivers/gpio/nomadik_gpio.c
> index e8a7bca..deb2beb 100644
> --- a/drivers/gpio/nomadik_gpio.c
> +++ b/drivers/gpio/nomadik_gpio.c
> @@ -24,13 +24,6 @@
> #include
> #include
>
> -static unsigned long gpio_base[4] = {
> - NOMADIK_GPIO0_BASE,
> - NOMADIK_GPIO1_BASE,
> - NOMADIK_GPIO2_BASE,
> - NOMADIK_GPIO3_BASE
> -};
> -
> enum gpio_registers {
> GPIO_DAT = 0x00, /* data register */
> GPIO_DATS = 0x04, /* data set */
> @@ -45,7 +38,7 @@ enum gpio_registers {
>
> static inline unsigned long gpio_to_base(int gpio)
> {
> - return gpio_base[gpio / 32];
> + return nmk_gpio_base[gpio / 32];
Should a check on the input.
(gpio / 32) < NMK_GPIO_BASE_INDEX_MAX
Add
#define NMK_GPIO_BASE_INDEX_MAX 4
Different values per board
Ok to change the name NMK_GPIO_BASE_INDEX_MAX
to something you like.
> }
>
> static inline u32 gpio_to_bit(int gpio)
> diff --git a/include/nomadik_gpio.h b/include/nomadik_gpio.h
> index 1d3c9ce..2822db4 100644
> --- a/include/nomadik_gpio.h
> +++ b/include/nomadik_gpio.h
> @@ -34,6 +34,8 @@ enum nmk_af { /* alternate function settings */
> GPIO_ALT_C
> };
>
> +extern unsigned long nmk_gpio_base[];
> +
> extern void nmk_gpio_af(int gpio, int alternate_function);
> extern void nmk_gpio_dir(int gpio, int dir);
> extern void nmk_gpio_set(int gpio, int val);
Tom
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Re: [U-Boot] [PATCH 4/8] nomadik_mtu: support configurable clock rates
Rabin Vincent wrote:
> Change the Nomadik MTU driver to get the clock rate and prescaler from
> the config file. Also remove the hardcoded divisors and do the
> calculations based on the configured rate.
>
> Acked-by: Alessandro Rubini
> Acked-by: Michael Brandt
> Signed-off-by: Rabin Vincent
> ---
> drivers/misc/nomadik_mtu.c | 22 +-
> include/configs/nhk8815.h |3 +++
> 2 files changed, 16 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/misc/nomadik_mtu.c b/drivers/misc/nomadik_mtu.c
> index b9c0fb1..4ec75ad 100644
> --- a/drivers/misc/nomadik_mtu.c
> +++ b/drivers/misc/nomadik_mtu.c
> @@ -22,25 +22,29 @@
>
> #include
> #include
> +#include
> #include
>
> -/*
> - * The timer is a decrementer, we'll left it free running at 2.4MHz.
> - * We have 2.4 ticks per microsecond and an overflow in almost 30min
> - */
> -#define TIMER_CLOCK (24 * 100 * 1000)
> -#define COUNT_TO_USEC(x) ((x) * 5 / 12) /* overflows at 6min */
> -#define USEC_TO_COUNT(x) ((x) * 12 / 5) /* overflows at 6min */
> +#define TIMER_CLOCK CONFIG_NOMADIK_MTU_CLOCK
> #define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
> #define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
TICKS_TO_HZ is only used once.
This macro should be expanded in get_timer() and removed
TICKS_PER_HZ is only used in TICKS_PER_HZ, it should be expanded and removed
TIMER_CLOCK is a remapping of CONFIG_NOMADIK_MTU_CLOCK.
CONFIG_NOMADIK_MTU_CLOCK should just be used
>
> /* macro to read the decrementing 32 bit timer as an increasing count */
> #define READ_TIMER() (0 - readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0)))
>
> +static unsigned long usec_to_count(unsigned long long usec)
> +{
> + unsigned long long count = usec * TIMER_CLOCK;
> +
> + do_div(count, 100);
> +
> + return count;
> +}
> +
> /* Configure a free-running, auto-wrap counter with no prescaler */
> int timer_init(void)
> {
> - writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS,
> + writel(MTU_CRn_ENA | CONFIG_NOMADIK_MTU_PRESCALE | MTU_CRn_32BITS,
> CONFIG_SYS_TIMERBASE + MTU_CR(0));
> reset_timer();
> return 0;
> @@ -73,7 +77,7 @@ void __udelay(unsigned long usec)
> ulong ini, end;
>
> ini = READ_TIMER();
> - end = ini + USEC_TO_COUNT(usec);
> + end = ini + usec_to_count(usec);
> while ((signed)(end - READ_TIMER()) > 0)
> ;
> }
> diff --git a/include/configs/nhk8815.h b/include/configs/nhk8815.h
> index 8ba1e5e..d52f50c 100644
> --- a/include/configs/nhk8815.h
> +++ b/include/configs/nhk8815.h
> @@ -98,6 +98,9 @@
> #define CONFIG_SYS_HZ1000 /* Mandatory... */
> #define CONFIG_SYS_TIMERBASE 0x101E2000
> #define CONFIG_NOMADIK_MTU
> +/* We have 2.4 ticks per microsecond and an overflow in almost 30min */
> +#define CONFIG_NOMADIK_MTU_CLOCK (24 * 100 * 1000)
> +#define CONFIG_NOMADIK_MTU_PRESCALE MTU_CRn_PRESCALE_1
>
> /* GPIO */
> #define CONFIG_NOMADIK_GPIO
Tom
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Re: [U-Boot] [PATCH 5/8] ARM Cortex A8: ifdef code calling lowlevel init
Rabin Vincent wrote: > Conditionally compile the code calling lowlevel_init, to avoid the > following build error when CONFIG_SKIP_LOWLEVEL_INIT is defined: > > start.S:218: undefined reference to `lowlevel_init' Move this change to the cpu/arm_cortexa9/start.S That will be created from comment on 6/8 > > Acked-by: Michael Brandt > Signed-off-by: Rabin Vincent > --- > cpu/arm_cortexa8/start.S |4 +++- > 1 files changed, 3 insertions(+), 1 deletions(-) > > diff --git a/cpu/arm_cortexa8/start.S b/cpu/arm_cortexa8/start.S > index 29dae2f..70bfc5d 100644 > --- a/cpu/arm_cortexa8/start.S > +++ b/cpu/arm_cortexa8/start.S > @@ -181,7 +181,7 @@ clbss_l: > > _start_armboot: .word start_armboot > > - > +#ifndef CONFIG_SKIP_LOWLEVEL_INIT > /* > * > * CPU_init_critical registers > @@ -218,6 +218,8 @@ cpu_init_crit: > bl lowlevel_init @ go setup pll,mux,memory > mov lr, ip @ restore link > mov pc, lr @ back to my caller > +#endif > + > /* > * > * Tom ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 6/8] ux500: add SoC-specific code
Rabin Vincent wrote:
> Add the base SoC code for ST-Ericsson's Ux500 series of Cortex A9 based
> SoCs.
>
> Even though this is a Cortex A9, we put it under Cortex A8 to avoid code
> duplication, since the CPU specific code can be used unmodified across
> the two CPUs.
>
I would rather have arm_cortexa9 be created.
Minimize the duplication by only copying the arm_cortexa8 files
that are needed.
Make this initial copying of a8->a9 its own patch
> Acked-by: Michael Brandt
> Signed-off-by: Rabin Vincent
> ---
> cpu/arm_cortexa8/ux500/Makefile | 45 +++
> cpu/arm_cortexa8/ux500/clock.c| 56 +++
> cpu/arm_cortexa8/ux500/cpu.c | 49
> include/asm-arm/arch-ux500/clock.h| 72 ++
> include/asm-arm/arch-ux500/hardware.h | 78
> +
> 5 files changed, 300 insertions(+), 0 deletions(-)
> create mode 100644 cpu/arm_cortexa8/ux500/Makefile
> create mode 100644 cpu/arm_cortexa8/ux500/clock.c
> create mode 100644 cpu/arm_cortexa8/ux500/cpu.c
> create mode 100644 include/asm-arm/arch-ux500/clock.h
> create mode 100644 include/asm-arm/arch-ux500/hardware.h
>
> diff --git a/cpu/arm_cortexa8/ux500/Makefile b/cpu/arm_cortexa8/ux500/Makefile
> new file mode 100644
> index 000..c671010
> --- /dev/null
> +++ b/cpu/arm_cortexa8/ux500/Makefile
> @@ -0,0 +1,45 @@
> +#
> +# (C) Copyright 2000-2003
> +# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
> +#
> +# See file CREDITS for list of people who contributed to this
> +# project.
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +#
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(SOC).a
> +
> +COBJS+= clock.o cpu.o
> +
> +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
> +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
> +
> +all: $(obj).depend $(LIB)
> +
> +$(LIB): $(OBJS)
> + $(AR) $(ARFLAGS) $@ $(OBJS)
> +
> +#
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#
> diff --git a/cpu/arm_cortexa8/ux500/clock.c b/cpu/arm_cortexa8/ux500/clock.c
> new file mode 100644
> index 000..6b67fe8
> --- /dev/null
> +++ b/cpu/arm_cortexa8/ux500/clock.c
> @@ -0,0 +1,56 @@
> +/*
> + * (C) Copyright 2010 ST-Ericsson SA
> + * Author: Rabin Vincent
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +struct clkrst {
> + unsigned int pcken;
> + unsigned int pckdis;
> + unsigned int kcken;
> + unsigned int kckdis;
> +};
> +
> +static unsigned int clkrst_base[] = {
> + U8500_CLKRST1_BASE,
> + U8500_CLKRST2_BASE,
> + U8500_CLKRST3_BASE,
> + 0,
0 ?
If this is an exception, it should be checked for.
Should also have a comment.
Expected to have U8500_CLKRSTR4_BASE.
> + U8500_CLKRST5_BASE,
> + U8500_CLKRST6_BASE,
> + U8500_CLKRST7_BASE,
> +};
Could these structures be added to an arch or board *.h ?
> +
> +/* Turn on peripheral clock at PRCC level */
> +void u8500_clock_enable(int periph, int kern, int cluster)
> +{
> + struct clkrst *clkrst = (struct clkrst *) clkrst_base[periph - 1];
-1 on array access.
Convert to unsigned access
> +
> + if (kern != -1)
> + writel(1 << kern, &clkrst->kcken);
> +
> + i
Re: [U-Boot] [PATCH 7/8] pl01x: add support for Ux500 variant of pl011
Rabin Vincent wrote: > The Ux500 variants of the pl011 have separate LCRH registers for RX and > TX. The TX register is at the same offset as the unmodified pl011, so > we need to additionally program only the RX register. > > Acked-by: Michael Brandt > Signed-off-by: Rabin Vincent This is serial and not ARM. My opinion is that the board specific #if-def could be cleaner. Tom > --- > I have used the style of the surrounding code here. > > drivers/serial/serial_pl01x.c |8 > drivers/serial/serial_pl01x.h |1 + > 2 files changed, 9 insertions(+), 0 deletions(-) > > diff --git a/drivers/serial/serial_pl01x.c b/drivers/serial/serial_pl01x.c > index c645cef..c819f1d 100644 > --- a/drivers/serial/serial_pl01x.c > +++ b/drivers/serial/serial_pl01x.c > @@ -144,6 +144,14 @@ int serial_init (void) > IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH, > (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN)); > > +#ifdef CONFIG_UX500 > + /* > + * On Ux500 variants, also set up the separate LCRH for RX. > + */ > + IO_WRITE (port[CONSOLE_PORT] + UART_PL011_LCRH_RX, > + (UART_PL011_LCRH_WLEN_8 | UART_PL011_LCRH_FEN)); > +#endif > + > /* >** Finally, enable the UART >*/ > diff --git a/drivers/serial/serial_pl01x.h b/drivers/serial/serial_pl01x.h > index 5f20fdd..0ff6203 100644 > --- a/drivers/serial/serial_pl01x.h > +++ b/drivers/serial/serial_pl01x.h > @@ -93,6 +93,7 @@ > * PL011 definitions > * > */ > +#define UART_PL011_LCRH_RX 0x1C > #define UART_PL011_IBRD 0x24 > #define UART_PL011_FBRD 0x28 > #define UART_PL011_LCRH 0x2C ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 8/8] mop500: add board-specific files
Rabin Vincent wrote: > Add base board code for the MOP500 board, which uses the U8500 SoC. > > Acked-by: Michael Brandt > Tested-by: Michael Brandt > Signed-off-by: Rabin Vincent > --- > MAINTAINERS |4 ++ > MAKEALL |1 + MAINTAINERS and MAKEALL will need to be changed for change to arm_cortexa9 > Makefile |3 + > board/stericsson/mop500/Makefile | 54 +++ > board/stericsson/mop500/config.mk | 23 > board/stericsson/mop500/mop500.c | 72 + > include/configs/mop500.h | 107 > + > 7 files changed, 264 insertions(+), 0 deletions(-) > create mode 100644 board/stericsson/mop500/Makefile > create mode 100644 board/stericsson/mop500/config.mk > create mode 100644 board/stericsson/mop500/mop500.c > create mode 100644 include/configs/mop500.h > > diff --git a/MAINTAINERS b/MAINTAINERS > index 80057ce..4a9a371 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -759,6 +759,10 @@ Hugo Villeneuve > > SFFSDR ARM926EJS > > +Rabin Vincent > + > + mop500 ARM CORTEX-A9 (U8500 SoC) > + > Prafulla Wadaskar > > mv88f6281gtw_ge ARM926EJS (Kirkwood SoC) > diff --git a/MAKEALL b/MAKEALL > index beacb5f..dd50cc4 100755 > --- a/MAKEALL > +++ b/MAKEALL > @@ -633,6 +633,7 @@ LIST_ARM11=" \ > # > LIST_ARM_CORTEX_A8=" \ > devkit8000 \ > + mop500 \ > mx51evk \ > omap3_beagle\ > omap3_overo \ > diff --git a/Makefile b/Makefile > index d801e25..9e07de6 100644 > --- a/Makefile > +++ b/Makefile > @@ -3163,6 +3163,9 @@ SMN42_config: unconfig > devkit8000_config : unconfig > @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 devkit8000 timll omap3 > > +mop500_config: unconfig > + @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 mop500 stericsson ux500 > + > omap3_beagle_config :unconfig > @$(MKCONFIG) $(@:_config=) arm arm_cortexa8 beagle ti omap3 > > diff --git a/board/stericsson/mop500/Makefile > b/board/stericsson/mop500/Makefile > new file mode 100644 > index 000..218d572 > --- /dev/null > +++ b/board/stericsson/mop500/Makefile > @@ -0,0 +1,54 @@ > +# > +# (C) Copyright 2000-2004 > +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. > +# > +# (C) Copyright 2004 > +# ARM Ltd. > +# Philippe Robin, > +# > +# See file CREDITS for list of people who contributed to this > +# project. > +# > +# This program is free software; you can redistribute it and/or > +# modify it under the terms of the GNU General Public License as > +# published by the Free Software Foundation; either version 2 of > +# the License, or (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program; if not, write to the Free Software > +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, > +# MA 02111-1307 USA > +# > + > +include $(TOPDIR)/config.mk > + > +LIB = $(obj)lib$(BOARD).a > + > +COBJS:= mop500.o > + > +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) > +OBJS := $(addprefix $(obj),$(COBJS)) > +SOBJS:= $(addprefix $(obj),$(SOBJS)) > + > +$(LIB): $(obj).depend $(OBJS) $(SOBJS) > + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) > + > +clean: > + rm -f $(SOBJS) $(OBJS) > + > +distclean: clean > + rm -f $(LIB) core *.bak $(obj).depend > + > +# > + > +# defines $(obj).depend target > +include $(SRCTREE)/rules.mk > + > +sinclude $(obj).depend > + > +# > diff --git a/board/stericsson/mop500/config.mk > b/board/stericsson/mop500/config.mk > new file mode 100644 > index 000..af246bd > --- /dev/null > +++ b/board/stericsson/mop500/config.mk > @@ -0,0 +1,23 @@ > +# > +# (C) Copyright 2010 ST-Ericsson SA > +# > +# See file CREDITS for list of people who contributed to this > +# project. > +# > +# This program is free software; you can redistribute it and/or > +# modify it under the terms of the GNU General Public License as > +# published by the Free Software Foundation; either version 2 of > +# the License, or (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more d
[U-Boot] [STATUS] v2010.03-rc3 is out
Hello all, U-Boot v2010.03-rc3 has been released. Please help testing, and send any feedback / last minute patches ASAP. I'm trying to keep the release date of March 31. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de "The bad reputation UNIX has gotten is totally undeserved, laid on by people who don't understand, who have not gotten in there and tried anything." -- Jim Joyce, owner of Jim Joyce's UNIX Bookstore ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2] [ARM] at91: Add support for taskit AT91SAM9G20 boards
Achim Ehrlich wrote: > This adds support for the AT91SAM9G20 boards by taskit GmbH. > Both boards, Stamp9G20 and PortuxG20, are integrated in one file. > PortuxG20 is basically a SBC built around Stamp9G20. > > Signed-off-by: Achim Ehrlich > --- > MAINTAINERS|5 + > MAKEALL|1 + > Makefile |4 + > board/taskit/stamp9G20/Makefile| 50 + > board/taskit/stamp9G20/config.mk |1 + > board/taskit/stamp9G20/stamp9G20.c | 203 > > include/configs/stamp9G20.h| 180 > 7 files changed, 444 insertions(+), 0 deletions(-) > create mode 100644 board/taskit/stamp9G20/Makefile > create mode 100644 board/taskit/stamp9G20/config.mk > create mode 100644 board/taskit/stamp9G20/stamp9G20.c > create mode 100644 include/configs/stamp9G20.h > Are more taskit based boards expected? If not taskit/stamp9G20 could be reduced to just taskit > diff --git a/MAINTAINERS b/MAINTAINERS > index 7f40ebd..c4259a0 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -138,6 +138,11 @@ Jon Diekema > > sbc8260 MPC8260 > > +Achim Ehrlich > + > + Stamp9G20 AT91SAM9G20 > + PortuxG20 AT91SAM9G20 > + > Dirk Eibach > > devconcenterPPC460EX > diff --git a/MAKEALL b/MAKEALL > index 1949985..516 100755 > --- a/MAKEALL > +++ b/MAKEALL > @@ -675,6 +675,7 @@ LIST_at91=" \ > pm9261 \ > pm9263 \ > SBC35_A9G20 \ > + stamp9G20 \ This is ok becasue the portuxg20 is a trival change > TNY_A9260 \ > TNY_A9G20 \ > " > diff --git a/Makefile b/Makefile > index ce77e10..ed9ae00 100644 > --- a/Makefile > +++ b/Makefile > @@ -2903,6 +2903,10 @@ TNY_A9260_config : unconfig > @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h > @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91 > > +portuxG20_config \ > +stamp9G20_config : unconfig > + @$(MKCONFIG) -t $(@:_config=) stamp9G20 arm arm926ejs stamp9G20 taskit > at91 > + > > ## ARM Integrator boards - see doc/README-integrator for more info. > integratorap_config \ > diff --git a/board/taskit/stamp9G20/Makefile b/board/taskit/stamp9G20/Makefile > new file mode 100644 > index 000..191fb8e > --- /dev/null > +++ b/board/taskit/stamp9G20/Makefile > @@ -0,0 +1,50 @@ > +# > +# (C) Copyright 2010 > +# Achim Ehrlich, taskit GmbH, aehrl...@taskit.de. > +# > +# See file CREDITS for list of people who contributed to this > +# project. > +# > +# This program is free software; you can redistribute it and/or > +# modify it under the terms of the GNU General Public License as > +# published by the Free Software Foundation; either version 2 of > +# the License, or (at your option) any later version. > +# > +# This program is distributed in the hope that it will be useful, > +# but WITHOUT ANY WARRANTY; without even the implied warranty of > +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > +# GNU General Public License for more details. > +# > +# You should have received a copy of the GNU General Public License > +# along with this program; if not, write to the Free Software > +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, > +# MA 02111-1307 USA > +# > + > +include $(TOPDIR)/config.mk > + > +LIB = $(obj)lib$(BOARD).a > + > +COBJS-y += stamp9G20.o > + > +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) > +OBJS := $(addprefix $(obj),$(COBJS-y)) > +SOBJS:= $(addprefix $(obj),$(SOBJS)) > + > +$(LIB): $(obj).depend $(OBJS) $(SOBJS) > + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) > + > +clean: > + rm -f $(SOBJS) $(OBJS) > + > +distclean: clean > + rm -f $(LIB) core *.bak $(obj).depend > + > +# > + > +# defines $(obj).depend target > +include $(SRCTREE)/rules.mk > + > +sinclude $(obj).depend > + > +# > diff --git a/board/taskit/stamp9G20/config.mk > b/board/taskit/stamp9G20/config.mk > new file mode 100644 > index 000..ff2cfd1 > --- /dev/null > +++ b/board/taskit/stamp9G20/config.mk > @@ -0,0 +1 @@ > +TEXT_BASE = 0x23f0 > diff --git a/board/taskit/stamp9G20/stamp9G20.c > b/board/taskit/stamp9G20/stamp9G20.c > new file mode 100644 > index 000..b543b0a > --- /dev/null > +++ b/board/taskit/stamp9G20/stamp9G20.c > @@ -0,0 +1,203 @@ > +/* > + * (C) Copyright 2007-2008 > + * Stelian Pop > + * Lead Tech Design > + * > + * (C) Copyright 2010 > + * Achim Ehrlich > + * taskit GmbH > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redis
[U-Boot] git merge summary
Hello, may I ask if there is reason why merge commits don't have a summary? I find those summaries (enabled with git config [--global] merge.summary true) very hand to see what was changed with the merge commit. Regards, Alexander ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/4] SPEAr : SMI erase and write timeouts increased
Vipin KUMAR wrote:
> SMI driver fails because of low timeout values. Increasing the erase and write
> timeouts to 3 seconds
This is a huge timeout change.
2ms to 3000ms.
If something goes wrong, it will seem like the board is hung.
Is this ok?
>
> Signed-off-by: Vipin Kumar
> ---
> drivers/mtd/spr_smi.c|8
> include/asm-arm/arch-spear/spr_smi.h |6 +++---
> 2 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/mtd/spr_smi.c b/drivers/mtd/spr_smi.c
> index 9a70a19..189ee6d 100755
> --- a/drivers/mtd/spr_smi.c
> +++ b/drivers/mtd/spr_smi.c
> @@ -60,11 +60,11 @@ static struct flash_dev flash_ids[] = {
> */
> static void smi_wait_xfer_finish(int timeout)
> {
> - while (timeout--) {
> + do {
> if (readl(&smicntl->smi_sr) & TFF)
> break;
> udelay(1000);
> - }
> + } while (timeout--);
This changes the function to wait at least 1ms even if timeout == 0.
Why was the original logic changed?
> }
>
> /*
> @@ -215,11 +215,11 @@ static int smi_write_enable(int bank)
> /* Restore the CTRL REG1 state */
> writel(ctrlreg1, &smicntl->smi_cr1);
>
> - while (timeout--) {
> + do {
> if (smi_read_sr(bank) & (1 << (bank + WM_SHIFT)))
> break;
> udelay(1000);
> - }
> + } while (timeout--);
>
> if (timeout)
> return 0;
> diff --git a/include/asm-arm/arch-spear/spr_smi.h
> b/include/asm-arm/arch-spear/spr_smi.h
> index 06df745..e2e5e8f 100755
> --- a/include/asm-arm/arch-spear/spr_smi.h
> +++ b/include/asm-arm/arch-spear/spr_smi.h
> @@ -108,8 +108,8 @@ struct flash_dev {
> ushort sector_count;
> };
>
> -#define SFLASH_PAGE_SIZE 0x100 /* flash page size */
> -#define XFER_FINISH_TOUT 2 /* xfer finish timeout */
> -#define WMODE_TOUT 2 /* write enable timeout */
> +#define SFLASH_PAGE_SIZE 0x100 /* flash page size */
> +#define XFER_FINISH_TOUT (3 * CONFIG_SYS_HZ)
> +#define WMODE_TOUT (3 * CONFIG_SYS_HZ)
>
> #endif
Tom
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Re: [U-Boot] [PATCH 2/4] SPEAr : Placing ethaddr write and read within CONFIG_CMD_NET
Vipin KUMAR wrote:
> ethaddr can be optionally read from i2c memory. So, chip_config command
> supports
> reading/writing hw mac id into i2c memory. Placing this code within
> CONFIG_CMD_NET as this would only be needed when network interface is
> configured
>
> Signed-off-by: Vipin Kumar
> ---
> board/spear/common/spr_misc.c | 22 +++---
> 1 files changed, 19 insertions(+), 3 deletions(-)
>
> diff --git a/board/spear/common/spr_misc.c b/board/spear/common/spr_misc.c
> index e356912..935b2fa 100755
> --- a/board/spear/common/spr_misc.c
> +++ b/board/spear/common/spr_misc.c
> @@ -37,6 +37,9 @@
>
> DECLARE_GLOBAL_DATA_PTR;
> static struct chip_data chip_data;
> +#if defined(CONFIG_CMD_NET)
> +static int i2c_read_mac(uchar *);
> +#endif
>
> int dram_init(void)
> {
> @@ -166,6 +169,7 @@ int spear_board_init(ulong mach_type)
> return 0;
> }
>
> +#if defined(CONFIG_CMD_NET)
> static int i2c_read_mac(uchar *buffer)
> {
> u8 buf[2];
> @@ -205,15 +209,20 @@ static int write_mac(uchar *mac)
> puts("I2C EEPROM writing failed \n");
> return -1;
> }
> +#endif
>
> int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
> {
> void (*sram_setfreq) (unsigned int, unsigned int);
> struct chip_data *chip = &chip_data;
> - unsigned char mac[6];
> - unsigned int reg, frequency;
> + unsigned int frequency;
> +
> +#if defined(CONFIG_CMD_NET)
> + unsigned int reg;
> char *s, *e;
> char i2c_mac[20];
> + unsigned char mac[6];
> +#endif
>
> if ((argc > 3) || (argc < 2)) {
> cmd_usage(cmdtp);
> @@ -244,6 +253,8 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc,
> char *argv[])
> }
>
> return 0;
> +
> +#if defined(CONFIG_CMD_NET)
> } else if (!strcmp(argv[1], "ethaddr")) {
>
> s = argv[2];
> @@ -255,6 +266,7 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc,
> char *argv[])
> write_mac(mac);
>
> return 0;
> +#endif
> } else if (!strcmp(argv[1], "print")) {
>
> if (chip->cpufreq == -1)
> @@ -274,13 +286,14 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int
> argc, char *argv[])
> else
> printf("DDR Type= Not Known\n");
>
> +#if defined(CONFIG_CMD_NET)
> if (!i2c_read_mac(mac)) {
> sprintf(i2c_mac, "%pM", mac);
> printf("Ethaddr (from i2c mem) = %s\n", i2c_mac);
> } else {
> printf("Ethaddr (from i2c mem) = Not set\n");
> }
> -
> +#endif
> printf("Xloader Rev = %s\n", chip->version);
>
> return 0;
> @@ -293,4 +306,7 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc,
> char *argv[])
> U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
> "configure chip",
> "chip_config cpufreq/ddrfreq frequency\n"
> +#if defined(CONFIG_CMD_NET)
> +"chip_config ethaddr XX:XX:XX:XX:XX:XX"
> +#endif
> "chip_config print");
May want to add '\n''s at end of help strings.
Fine otherwise.
Tom
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Re: [U-Boot] [PATCH 4/4] SPEAr : macb driver support added for spear310 and spear320
Vipin KUMAR wrote:
> Signed-off-by: Vipin Kumar
> ---
> board/spear/spear310/spear310.c |9 -
> board/spear/spear320/spear320.c |6 +-
> include/asm-arm/arch-spear/clk.h | 27 +++
> include/configs/spear3xx.h | 21 +
> 4 files changed, 61 insertions(+), 2 deletions(-)
> create mode 100644 include/asm-arm/arch-spear/clk.h
>
> diff --git a/board/spear/spear310/spear310.c b/board/spear/spear310/spear310.c
> index 2c35a55..6f5c52a 100755
> --- a/board/spear/spear310/spear310.c
> +++ b/board/spear/spear310/spear310.c
> @@ -61,5 +61,12 @@ int board_nand_init(struct nand_chip *nand)
>
> int board_eth_init(bd_t *bis)
> {
> - return spear_mii_initialize(0);
> + spear_mii_initialize(0);
> +
> + macb_eth_initialize(0, (void *)SPR310_MACB0_BASE, SPR310_MACB0_PHY);
> + macb_eth_initialize(1, (void *)SPR310_MACB1_BASE, SPR310_MACB1_PHY);
> + macb_eth_initialize(2, (void *)SPR310_MACB2_BASE, SPR310_MACB2_PHY);
> + macb_eth_initialize(3, (void *)SPR310_MACB3_BASE, SPR310_MACB3_PHY);
> +
> + return 0;
> }
> diff --git a/board/spear/spear320/spear320.c b/board/spear/spear320/spear320.c
> index a804123..e9d8f9f 100755
> --- a/board/spear/spear320/spear320.c
> +++ b/board/spear/spear320/spear320.c
> @@ -61,5 +61,9 @@ int board_nand_init(struct nand_chip *nand)
>
> int board_eth_init(bd_t *bis)
> {
> - return spear_mii_initialize(0);
> + spear_mii_initialize(0);
> +
> + macb_eth_initialize(0, (void *)SPR320_MACB0_BASE, SPR320_MACB0_PHY);
> +
> + return 0;
> }
> diff --git a/include/asm-arm/arch-spear/clk.h
> b/include/asm-arm/arch-spear/clk.h
> new file mode 100644
> index 000..343c6ce
> --- /dev/null
> +++ b/include/asm-arm/arch-spear/clk.h
> @@ -0,0 +1,27 @@
> +/*
> + * (C) Copyright 2009
> + * Vipin Kumar, STMicroelectronics,
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
> +{
> + return 8300;
> +}
These seems like overkill but supports the macb driver..
Ok
> diff --git a/include/configs/spear3xx.h b/include/configs/spear3xx.h
> index b69e734..3bf01b5 100755
> --- a/include/configs/spear3xx.h
> +++ b/include/configs/spear3xx.h
> @@ -44,6 +44,27 @@
> /* Ethernet configuration */
> #define CONFIG_SPEAR_ALTDESC
>
> +#if defined(CONFIG_SPEAR310)
> +#define CONFIG_MACB 1
> +#define CONFIG_MACB_SEARCH_PHY 1
> +
> +#define SPR310_MACB0_BASE0xB000
> +#define SPR310_MACB1_BASE0xB080
> +#define SPR310_MACB2_BASE0xB100
> +#define SPR310_MACB3_BASE0xB180
> +#define SPR310_MACB0_PHY 0x01
> +#define SPR310_MACB1_PHY 0x03
> +#define SPR310_MACB2_PHY 0x05
> +#define SPR310_MACB3_PHY 0x07
> +
> +#elif defined(CONFIG_SPEAR320)
> +#define CONFIG_MACB 1
> +#define CONFIG_MACB_SEARCH_PHY 1
> +
> +#define SPR320_MACB0_BASE0xAA00
> +#define SPR320_MACB0_PHY 0x01
> +#endif
> +
> /* Serial Configuration (PL011) */
> #define CONFIG_SYS_SERIAL0 0xD000
>
The non CONFIG_* #defines should be in asm/arch-spear/hardware.h or
another appropriate arch *.h
Tom
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Re: [U-Boot] [PATCH] [ARM] Convert at91 watchdog driver to new SoC access
Alexander Holler wrote: > Hello, > > Am 23.03.2010 16:58, schrieb Tom: >> Achim Ehrlich wrote: >>> This converts the at91 watchdog driver to new c structure >>> type to access registers of the SoC >>> >>> Signed-off-by: Achim Ehrlich >> Applied to arm/next > > Maybe this should go to the current branch because the watchdog-driver > currently doesn't compile for an at91sam9263-ek board. > CONFIG_AT91_LEGACY is already off for this board. > > Regards, Wolfgang, Can this go into 2010.03? Tom > > Alexander > ___ > U-Boot mailing list > U-Boot@lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [STATUS] v2010.03-rc3 is out
On Mar 28, 2010, at 3:13 PM, Wolfgang Denk wrote: > Hello all, > > U-Boot v2010.03-rc3 has been released. > > Please help testing, and send any feedback / last minute patches ASAP. > > I'm trying to keep the release date of March 31. Doesn't look like you pushed to master the v2010.03-rc3 commit. Also, I've got two patches that would be good to get into v2010.03 (but not critical). I'l hopefully have a pull request on Monday for them. - k ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v4] nios2: add altera cf reset
This patch toggles power to reset the cf card.
Signed-off-by: Thomas Chou
---
fix checkpatch.pl error
board/altera/common/cfide.c | 33 +
1 files changed, 33 insertions(+), 0 deletions(-)
create mode 100644 board/altera/common/cfide.c
diff --git a/board/altera/common/cfide.c b/board/altera/common/cfide.c
new file mode 100644
index 000..3e3c9ca
--- /dev/null
+++ b/board/altera/common/cfide.c
@@ -0,0 +1,33 @@
+/*
+ * Altera CF drvier
+ *
+ * (C) Copyright 2010, Thomas Chou
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include
+#include
+
+#if defined(CONFIG_IDE_RESET) && defined(CONFIG_SYS_CF_CTL_BASE)
+/* ide_set_reset for Altera CF interface */
+#define ALTERA_CF_CTL_STATUS 0
+#define ALTERA_CF_IDE_CTL 4
+#define ALTERA_CF_CTL_STATUS_PRESENT_MSK (0x1)
+#define ALTERA_CF_CTL_STATUS_POWER_MSK (0x2)
+#define ALTERA_CF_CTL_STATUS_RESET_MSK (0x4)
+#define ALTERA_CF_CTL_STATUS_IRQ_EN_MSK(0x8)
+#define ALTERA_CF_IDE_CTL_IRQ_EN_MSK (0x1)
+
+void ide_set_reset(int idereset)
+{
+ int i;
+ writel(idereset ? ALTERA_CF_CTL_STATUS_RESET_MSK :
+ ALTERA_CF_CTL_STATUS_POWER_MSK,
+ CONFIG_SYS_CF_CTL_BASE + ALTERA_CF_CTL_STATUS);
+ /* wait 500 ms for power to stabilize */
+ for (i=0; i<500; i++)
+ udelay(1000);
+}
+#endif
--
1.6.6.1
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[U-Boot] [PATCH 1/4] s5p6442: Support Samsung s5p6442 SoC
This patch adds support s5p6442 SoC. The s5p6442 SoC is ARM1176
processor.
Cc: Minkyu Kang
Cc: Kyungmin Park
Signed-off-by: Joonyoung Shim
---
cpu/arm1176/s5p64xx/Makefile | 52 +
cpu/arm1176/s5p64xx/clock.c | 163 +++
cpu/arm1176/s5p64xx/cpu_info.c | 58 ++
cpu/arm1176/s5p64xx/reset.S | 35 ++
cpu/arm1176/s5p64xx/timer.c | 204 ++
include/asm-arm/arch-s5p64xx/clk.h | 38 +++
include/asm-arm/arch-s5p64xx/clock.h | 69
include/asm-arm/arch-s5p64xx/cpu.h | 57 ++
include/asm-arm/arch-s5p64xx/gpio.h | 111 ++
include/asm-arm/arch-s5p64xx/power.h | 76 +
include/asm-arm/arch-s5p64xx/pwm.h | 58 ++
include/asm-arm/arch-s5p64xx/uart.h | 47
12 files changed, 968 insertions(+), 0 deletions(-)
create mode 100644 cpu/arm1176/s5p64xx/Makefile
create mode 100644 cpu/arm1176/s5p64xx/clock.c
create mode 100644 cpu/arm1176/s5p64xx/cpu_info.c
create mode 100644 cpu/arm1176/s5p64xx/reset.S
create mode 100644 cpu/arm1176/s5p64xx/timer.c
create mode 100644 include/asm-arm/arch-s5p64xx/clk.h
create mode 100644 include/asm-arm/arch-s5p64xx/clock.h
create mode 100644 include/asm-arm/arch-s5p64xx/cpu.h
create mode 100644 include/asm-arm/arch-s5p64xx/gpio.h
create mode 100644 include/asm-arm/arch-s5p64xx/power.h
create mode 100644 include/asm-arm/arch-s5p64xx/pwm.h
create mode 100644 include/asm-arm/arch-s5p64xx/uart.h
diff --git a/cpu/arm1176/s5p64xx/Makefile b/cpu/arm1176/s5p64xx/Makefile
new file mode 100644
index 000..625d8f5
--- /dev/null
+++ b/cpu/arm1176/s5p64xx/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, w...@denx.de.
+#
+# (C) Copyright 2008
+# Guennadi Liakhovetki, DENX Software Engineering,
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).a
+
+SOBJS = reset.o
+
+COBJS += clock.o
+COBJS += cpu_info.o
+COBJS += timer.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+
+all:$(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/cpu/arm1176/s5p64xx/clock.c b/cpu/arm1176/s5p64xx/clock.c
new file mode 100644
index 000..5fe0482
--- /dev/null
+++ b/cpu/arm1176/s5p64xx/clock.c
@@ -0,0 +1,163 @@
+/*
+ * Copyright (C) 2010 Samsung Electronics
+ * Minkyu Kang
+ * Joonyoung Shim
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+#include
+
+#ifndef CONFIG_SYS_CLK_FREQ_6442
+#define CONFIG_SYS_CLK_FREQ_6442 1200
+#endif
+
+unsigned long (*get_pclk)(void);
+unsigned long (*get_arm_clk)(void);
+unsigned long (*get_pll_clk)(int);
+
+/* s5p6442: return pll clock frequency */
+static unsigned long s5p6442_get_pll_clk(int pllreg)
+{
+ struct s5p6442_clock *clk = (struct s5p6442_clock *)S5P64XX_CLOCK_BASE;
+ unsigned long r, m, p, s, mask, fout;
+ unsigned int freq;
+
+ switch (pllreg) {
+ case APLL:
+ r = readl(&clk->apll_con);
+ break;
+ case MPLL:
+
[U-Boot] [PATCH 2/4] s5p6442: Support onenand driver
This patch is for onenand support of s5p6442 SoC.
Cc: Minkyu Kang
Cc: Kyungmin Park
Signed-off-by: Joonyoung Shim
---
drivers/mtd/onenand/samsung.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index f2be687..cbcf83b 100644
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -67,7 +67,7 @@ do {
\
#define MAP_01 (0x1 << 24)
#define MAP_10 (0x2 << 24)
#define MAP_11 (0x3 << 24)
-#elif defined(CONFIG_S5PC1XX)
+#elif defined(CONFIG_S5PC1XX) || defined(CONFIG_S5P64XX)
#define MAP_00 (0x0 << 26)
#define MAP_01 (0x1 << 26)
#define MAP_10 (0x2 << 26)
@@ -121,7 +121,7 @@ static unsigned int s3c_mem_addr(int fba, int fpa, int fsa)
{
return (fba << 12) | (fpa << 6) | (fsa << 4);
}
-#elif defined(CONFIG_S5PC1XX)
+#elif defined(CONFIG_S5PC1XX) || defined(CONFIG_S5P64XX)
static unsigned int s3c_mem_addr(int fba, int fpa, int fsa)
{
return (fba << 13) | (fpa << 7) | (fsa << 5);
@@ -614,7 +614,7 @@ void s3c_onenand_init(struct mtd_info *mtd)
#if defined(CONFIG_S3C64XX)
onenand->base = (void *)0x7010;
onenand->ahb_addr = (void *)0x2000;
-#elif defined(CONFIG_S5PC1XX)
+#elif defined(CONFIG_S5PC1XX) || defined(CONFIG_S5P64XX)
onenand->base = (void *)0xE710;
onenand->ahb_addr = (void *)0xB000;
#endif
--
1.6.3.3
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[U-Boot] [PATCH 3/4] s5p6442: Support serial driver
This patch is for serial support of s5p6442 SoC.
Cc: Minkyu Kang
Cc: Kyungmin Park
Signed-off-by: Joonyoung Shim
---
common/serial.c |2 +-
drivers/serial/Makefile |1 +
drivers/serial/serial_s5p.c |5 +
include/serial.h|2 +-
4 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/common/serial.c b/common/serial.c
index 94e1921..385c42b 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -69,7 +69,7 @@ struct serial_device *__default_serial_console (void)
#else
#error "CONFIG_SERIAL? missing."
#endif
-#elif defined(CONFIG_S5PC1XX)
+#elif defined(CONFIG_S5PC1XX) || defined(CONFIG_S5P64XX)
#if defined(CONFIG_SERIAL0)
return &s5p_serial0_device;
#elif defined(CONFIG_SERIAL1)
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 71392e6..110b7e1 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -34,6 +34,7 @@ COBJS-$(CONFIG_SYS_NS16550) += ns16550.o
COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o
COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
COBJS-$(CONFIG_S5PC1XX) += serial_s5p.o
+COBJS-$(CONFIG_S5P64XX) += serial_s5p.o
COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o
COBJS-$(CONFIG_CLPS7111_SERIAL) += serial_clps7111.o
COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o
diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
index 68b8d01..1e7426d 100644
--- a/drivers/serial/serial_s5p.c
+++ b/drivers/serial/serial_s5p.c
@@ -31,10 +31,15 @@ static inline struct s5p_uart *s5p_get_base_uart(int
dev_index)
{
u32 offset = dev_index * sizeof(struct s5p_uart);
+#ifdef CONFIG_S5PC1XX
if (cpu_is_s5pc100())
return (struct s5p_uart *)(S5PC100_UART_BASE + offset);
else
return (struct s5p_uart *)(S5PC110_UART_BASE + offset);
+#elif CONFIG_S5P64XX
+ if (cpu_is_s5p6442())
+ return (struct s5p_uart *)(S5P6442_UART_BASE + offset);
+#endif
}
/*
diff --git a/include/serial.h b/include/serial.h
index 4caf790..bf15212 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -43,7 +43,7 @@ extern struct serial_device s3c24xx_serial1_device;
extern struct serial_device s3c24xx_serial2_device;
#endif
-#if defined(CONFIG_S5PC1XX)
+#if defined(CONFIG_S5PC1XX) || defined(CONFIG_S5P64XX)
extern struct serial_device s5p_serial0_device;
extern struct serial_device s5p_serial1_device;
extern struct serial_device s5p_serial2_device;
--
1.6.3.3
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[U-Boot] [PATCH 4/4] s5p6442: Add support SMDK6442 board
This patch adds the new board SMDK6442 that uses s5p6442 SoC. Cc: Minkyu Kang Cc: Kyungmin Park Signed-off-by: Joonyoung Shim --- MAKEALL|1 + Makefile |3 + board/samsung/smdk6442/Makefile| 55 +++ board/samsung/smdk6442/config.mk |6 + board/samsung/smdk6442/lowlevel_init.S | 202 ++ board/samsung/smdk6442/mem_setup.S | 175 +++ board/samsung/smdk6442/onenand.c | 41 ++ board/samsung/smdk6442/smdk6442.c | 54 +++ include/configs/smdk6442.h | 242 9 files changed, 779 insertions(+), 0 deletions(-) create mode 100644 board/samsung/smdk6442/Makefile create mode 100644 board/samsung/smdk6442/config.mk create mode 100644 board/samsung/smdk6442/lowlevel_init.S create mode 100644 board/samsung/smdk6442/mem_setup.S create mode 100644 board/samsung/smdk6442/onenand.c create mode 100644 board/samsung/smdk6442/smdk6442.c create mode 100644 include/configs/smdk6442.h diff --git a/MAKEALL b/MAKEALL index beacb5f..e3a0b49 100755 --- a/MAKEALL +++ b/MAKEALL @@ -626,6 +626,7 @@ LIST_ARM11="\ mx31pdk_nand\ qong\ smdk6400\ + smdk6442\ " # diff --git a/Makefile b/Makefile index d801e25..eeebb13 100644 --- a/Makefile +++ b/Makefile @@ -3329,6 +3329,9 @@ smdk6400_config : unconfig fi @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk +smdk6442_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm1176 smdk6442 samsung s5p64xx + # # i386 # diff --git a/board/samsung/smdk6442/Makefile b/board/samsung/smdk6442/Makefile new file mode 100644 index 000..9700ffb --- /dev/null +++ b/board/samsung/smdk6442/Makefile @@ -0,0 +1,55 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, w...@denx.de. +# +# (C) Copyright 2008 +# Guennadi Liakhovetki, DENX Software Engineering, +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).a + +COBJS-y:= smdk6442.o +COBJS-$(CONFIG_SAMSUNG_ONENAND)+= onenand.o +SOBJS := lowlevel_init.o + +SRCS:= $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(SOBJS) $(OBJS) + $(AR) $(ARFLAGS) $@ $(SOBJS) $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/samsung/smdk6442/config.mk b/board/samsung/smdk6442/config.mk new file mode 100644 index 000..9c39c8a --- /dev/null +++ b/board/samsung/smdk6442/config.mk @@ -0,0 +1,6 @@ +# +# Copyright (C) 2010 Samsung Elecgtronics +# Minkyu Kang +# + +TEXT_BASE = 0x3480 diff --git a/board/samsung/smdk6442/lowlevel_init.S b/board/samsung/smdk6442/lowlevel_init.S new file mode 100644 index 000..3b8e368 --- /dev/null +++ b/board/samsung/smdk6442/lowlevel_init.S @@ -0,0 +1,202 @@ +/* + * Copyright (C) 2010 Samsung Electronics + * Minkyu Kang + * Joonyoung Shim + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +
Re: [U-Boot] [PATCH 1/4] SPEAr : SMI erase and write timeouts increased
On 3/29/2010 3:21 AM, Tom wrote:
> Vipin KUMAR wrote:
>> SMI driver fails because of low timeout values. Increasing the erase
>> and write
>> timeouts to 3 seconds
>
> This is a huge timeout change.
> 2ms to 3000ms.
> If something goes wrong, it will seem like the board is hung.
> Is this ok?
>
2ms timeout itself was a mistake. 3 sec is OK. Offcourse, 3 secs are
required only when something goes wrong
>>
>> Signed-off-by: Vipin Kumar
>> ---
>> drivers/mtd/spr_smi.c|8
>> include/asm-arm/arch-spear/spr_smi.h |6 +++---
>> 2 files changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/mtd/spr_smi.c b/drivers/mtd/spr_smi.c
>> index 9a70a19..189ee6d 100755
>> --- a/drivers/mtd/spr_smi.c
>> +++ b/drivers/mtd/spr_smi.c
>> @@ -60,11 +60,11 @@ static struct flash_dev flash_ids[] = {
>> */
>> static void smi_wait_xfer_finish(int timeout)
>> {
>> -while (timeout--) {
>> +do {
>> if (readl(&smicntl->smi_sr) & TFF)
>> break;
>> udelay(1000);
>> -}
>> +} while (timeout--);
>
> This changes the function to wait at least 1ms even if timeout == 0.
> Why was the original logic changed?
>
Earlier a value of 2 was reading the status register only once. This I
felt is more appropriate since the status register is read every ms and
at least once.
>> }
>>
>> /*
>> @@ -215,11 +215,11 @@ static int smi_write_enable(int bank)
>> /* Restore the CTRL REG1 state */
>> writel(ctrlreg1, &smicntl->smi_cr1);
>>
>> -while (timeout--) {
>> +do {
>> if (smi_read_sr(bank) & (1 << (bank + WM_SHIFT)))
>> break;
>> udelay(1000);
>> -}
>> +} while (timeout--);
>>
>> if (timeout)
>> return 0;
>> diff --git a/include/asm-arm/arch-spear/spr_smi.h
>> b/include/asm-arm/arch-spear/spr_smi.h
>> index 06df745..e2e5e8f 100755
>> --- a/include/asm-arm/arch-spear/spr_smi.h
>> +++ b/include/asm-arm/arch-spear/spr_smi.h
>> @@ -108,8 +108,8 @@ struct flash_dev {
>> ushort sector_count;
>> };
>>
>> -#define SFLASH_PAGE_SIZE0x100/* flash page size */
>> -#define XFER_FINISH_TOUT2/* xfer finish timeout */
>> -#define WMODE_TOUT2/* write enable timeout */
>> +#define SFLASH_PAGE_SIZE0x100/* flash page size */
>> +#define XFER_FINISH_TOUT(3 * CONFIG_SYS_HZ)
>> +#define WMODE_TOUT(3 * CONFIG_SYS_HZ)
>>
>> #endif
>
> Tom
>
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Re: [U-Boot] [PATCH 2/4] SPEAr : Placing ethaddr write and read within CONFIG_CMD_NET
On 3/29/2010 4:08 AM, Tom wrote:
> Vipin KUMAR wrote:
>> ethaddr can be optionally read from i2c memory. So, chip_config
>> command supports
>> reading/writing hw mac id into i2c memory. Placing this code within
>> CONFIG_CMD_NET as this would only be needed when network interface is
>> configured
>>
>> Signed-off-by: Vipin Kumar
>> ---
>> board/spear/common/spr_misc.c | 22 +++---
>> 1 files changed, 19 insertions(+), 3 deletions(-)
>>
>> diff --git a/board/spear/common/spr_misc.c
>> b/board/spear/common/spr_misc.c
>> index e356912..935b2fa 100755
>> --- a/board/spear/common/spr_misc.c
>> +++ b/board/spear/common/spr_misc.c
>> @@ -37,6 +37,9 @@
>>
>> DECLARE_GLOBAL_DATA_PTR;
>> static struct chip_data chip_data;
>> +#if defined(CONFIG_CMD_NET)
>> +static int i2c_read_mac(uchar *);
>> +#endif
>>
>> int dram_init(void)
>> {
>> @@ -166,6 +169,7 @@ int spear_board_init(ulong mach_type)
>> return 0;
>> }
>>
>> +#if defined(CONFIG_CMD_NET)
>> static int i2c_read_mac(uchar *buffer)
>> {
>> u8 buf[2];
>> @@ -205,15 +209,20 @@ static int write_mac(uchar *mac)
>> puts("I2C EEPROM writing failed \n");
>> return -1;
>> }
>> +#endif
>>
>> int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
>> {
>> void (*sram_setfreq) (unsigned int, unsigned int);
>> struct chip_data *chip = &chip_data;
>> -unsigned char mac[6];
>> -unsigned int reg, frequency;
>> +unsigned int frequency;
>> +
>> +#if defined(CONFIG_CMD_NET)
>> +unsigned int reg;
>> char *s, *e;
>> char i2c_mac[20];
>> +unsigned char mac[6];
>> +#endif
>>
>> if ((argc > 3) || (argc < 2)) {
>> cmd_usage(cmdtp);
>> @@ -244,6 +253,8 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int
>> argc, char *argv[])
>> }
>>
>> return 0;
>> +
>> +#if defined(CONFIG_CMD_NET)
>> } else if (!strcmp(argv[1], "ethaddr")) {
>>
>> s = argv[2];
>> @@ -255,6 +266,7 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int
>> argc, char *argv[])
>> write_mac(mac);
>>
>> return 0;
>> +#endif
>> } else if (!strcmp(argv[1], "print")) {
>>
>> if (chip->cpufreq == -1)
>> @@ -274,13 +286,14 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag,
>> int argc, char *argv[])
>> else
>> printf("DDR Type= Not Known\n");
>>
>> +#if defined(CONFIG_CMD_NET)
>> if (!i2c_read_mac(mac)) {
>> sprintf(i2c_mac, "%pM", mac);
>> printf("Ethaddr (from i2c mem) = %s\n", i2c_mac);
>> } else {
>> printf("Ethaddr (from i2c mem) = Not set\n");
>> }
>> -
>> +#endif
>> printf("Xloader Rev = %s\n", chip->version);
>>
>> return 0;
>> @@ -293,4 +306,7 @@ int do_chip_config(cmd_tbl_t *cmdtp, int flag, int
>> argc, char *argv[])
>> U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
>> "configure chip",
>> "chip_config cpufreq/ddrfreq frequency\n"
>> +#if defined(CONFIG_CMD_NET)
>> + "chip_config ethaddr XX:XX:XX:XX:XX:XX"
>> +#endif
>> "chip_config print");
>
> May want to add '\n''s at end of help strings.
> Fine otherwise.
OK. I would incorporate this in patchset v2
Thanks
Regards
Vipin
> Tom
>
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Re: [U-Boot] [PATCH 4/4] SPEAr : macb driver support added for spear310 and spear320
On 3/29/2010 4:10 AM, Tom wrote:
> Vipin KUMAR wrote:
>> Signed-off-by: Vipin Kumar
>> ---
>> board/spear/spear310/spear310.c |9 -
>> board/spear/spear320/spear320.c |6 +-
>> include/asm-arm/arch-spear/clk.h | 27 +++
>> include/configs/spear3xx.h | 21 +
>> 4 files changed, 61 insertions(+), 2 deletions(-)
>> create mode 100644 include/asm-arm/arch-spear/clk.h
>>
>> diff --git a/board/spear/spear310/spear310.c
>> b/board/spear/spear310/spear310.c
>> index 2c35a55..6f5c52a 100755
>> --- a/board/spear/spear310/spear310.c
>> +++ b/board/spear/spear310/spear310.c
>> @@ -61,5 +61,12 @@ int board_nand_init(struct nand_chip *nand)
>>
>> int board_eth_init(bd_t *bis)
>> {
>> -return spear_mii_initialize(0);
>> +spear_mii_initialize(0);
>> +
>> +macb_eth_initialize(0, (void *)SPR310_MACB0_BASE, SPR310_MACB0_PHY);
>> +macb_eth_initialize(1, (void *)SPR310_MACB1_BASE, SPR310_MACB1_PHY);
>> +macb_eth_initialize(2, (void *)SPR310_MACB2_BASE, SPR310_MACB2_PHY);
>> +macb_eth_initialize(3, (void *)SPR310_MACB3_BASE, SPR310_MACB3_PHY);
>> +
>> +return 0;
>> }
>> diff --git a/board/spear/spear320/spear320.c
>> b/board/spear/spear320/spear320.c
>> index a804123..e9d8f9f 100755
>> --- a/board/spear/spear320/spear320.c
>> +++ b/board/spear/spear320/spear320.c
>> @@ -61,5 +61,9 @@ int board_nand_init(struct nand_chip *nand)
>>
>> int board_eth_init(bd_t *bis)
>> {
>> -return spear_mii_initialize(0);
>> +spear_mii_initialize(0);
>> +
>> +macb_eth_initialize(0, (void *)SPR320_MACB0_BASE, SPR320_MACB0_PHY);
>> +
>> +return 0;
>> }
>> diff --git a/include/asm-arm/arch-spear/clk.h
>> b/include/asm-arm/arch-spear/clk.h
>> new file mode 100644
>> index 000..343c6ce
>> --- /dev/null
>> +++ b/include/asm-arm/arch-spear/clk.h
>> @@ -0,0 +1,27 @@
>> +/*
>> + * (C) Copyright 2009
>> + * Vipin Kumar, STMicroelectronics,
>> + *
>> + * See file CREDITS for list of people who contributed to this
>> + * project.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License as
>> + * published by the Free Software Foundation; either version 2 of
>> + * the License, or (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, write to the Free Software
>> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
>> + * MA 02111-1307 USA
>> + */
>> +
>> +static inline unsigned long get_macb_pclk_rate(unsigned int dev_id)
>> +{
>> +return 8300;
>> +}
> These seems like overkill but supports the macb driver..
> Ok
overkillhmm
actually, there is not clock framework as such that's why had to hard
code the value
>> diff --git a/include/configs/spear3xx.h b/include/configs/spear3xx.h
>> index b69e734..3bf01b5 100755
>> --- a/include/configs/spear3xx.h
>> +++ b/include/configs/spear3xx.h
>> @@ -44,6 +44,27 @@
>> /* Ethernet configuration */
>> #define CONFIG_SPEAR_ALTDESC
>>
>> +#if defined(CONFIG_SPEAR310)
>> +#define CONFIG_MACB1
>> +#define CONFIG_MACB_SEARCH_PHY1
>> +
>> +#define SPR310_MACB0_BASE0xB000
>> +#define SPR310_MACB1_BASE0xB080
>> +#define SPR310_MACB2_BASE0xB100
>> +#define SPR310_MACB3_BASE0xB180
>> +#define SPR310_MACB0_PHY0x01
>> +#define SPR310_MACB1_PHY0x03
>> +#define SPR310_MACB2_PHY0x05
>> +#define SPR310_MACB3_PHY0x07
>> +
>> +#elif defined(CONFIG_SPEAR320)
>> +#define CONFIG_MACB1
>> +#define CONFIG_MACB_SEARCH_PHY1
>> +
>> +#define SPR320_MACB0_BASE0xAA00
>> +#define SPR320_MACB0_PHY0x01
>> +#endif
>> +
>> /* Serial Configuration (PL011) */
>> #define CONFIG_SYS_SERIAL00xD000
>>
> The non CONFIG_* #defines should be in asm/arch-spear/hardware.h or
> another appropriate arch *.h
>
OK, find the changes in patchset v2
Thanks and Regards
Vipin
> Tom
>
>
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Re: [U-Boot] [PATCH 4/4] s5p6442: Add support SMDK6442 board
Dear Joonyoung Shim,
On 29 March 2010 11:56, Joonyoung Shim wrote:
> This patch adds the new board SMDK6442 that uses s5p6442 SoC.
>
> Cc: Minkyu Kang
> Cc: Kyungmin Park
> Signed-off-by: Joonyoung Shim
> ---
> MAKEALL | 1 +
> Makefile | 3 +
> board/samsung/smdk6442/Makefile | 55 +++
> board/samsung/smdk6442/config.mk | 6 +
> board/samsung/smdk6442/lowlevel_init.S | 202 ++
> board/samsung/smdk6442/mem_setup.S | 175 +++
> board/samsung/smdk6442/onenand.c | 41 ++
> board/samsung/smdk6442/smdk6442.c | 54 +++
> include/configs/smdk6442.h | 242
>
> 9 files changed, 779 insertions(+), 0 deletions(-)
> create mode 100644 board/samsung/smdk6442/Makefile
> create mode 100644 board/samsung/smdk6442/config.mk
> create mode 100644 board/samsung/smdk6442/lowlevel_init.S
> create mode 100644 board/samsung/smdk6442/mem_setup.S
> create mode 100644 board/samsung/smdk6442/onenand.c
> create mode 100644 board/samsung/smdk6442/smdk6442.c
> create mode 100644 include/configs/smdk6442.h
Please add smdk6442 at MAINTAINERS entry.
> diff --git a/board/samsung/smdk6442/config.mk
> b/board/samsung/smdk6442/config.mk
> new file mode 100644
> index 000..9c39c8a
> --- /dev/null
> +++ b/board/samsung/smdk6442/config.mk
> @@ -0,0 +1,6 @@
> +#
> +# Copyright (C) 2010 Samsung Elecgtronics
Is Elecgtronics typo?
> +# Minkyu Kang
> +#
> +
> +TEXT_BASE = 0x3480
> diff --git a/board/samsung/smdk6442/smdk6442.c
> b/board/samsung/smdk6442/smdk6442.c
> new file mode 100644
> index 000..bb8d469
> --- /dev/null
> +++ b/board/samsung/smdk6442/smdk6442.c
> @@ -0,0 +1,54 @@
> +/*
> + * Copyright (C) 2010 Samsung Electronics
> + * Minkyu Kang
> + * Joonyoung Shim
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int board_init(void)
> +{
> + gd->bd->bi_arch_number = MACH_TYPE_SMDK6442;
> + gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
> +
> + return 0;
> +}
> +
> +int dram_init(void)
> +{
> + gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
> + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
> +
> + gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
> + gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_DISPLAY_BOARDINFO
> +int checkboard(void)
> +{
> + printf("Board:\t6442\n");
Please fix it to SMDK6442.
> + return 0;
> +}
> +#endif
Thanks
Minkyu Kang
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Re: [U-Boot] [PATCH 3/4] s5p6442: Support serial driver
Dear Joonyoung Shim,
On 29 March 2010 11:56, Joonyoung Shim wrote:
> This patch is for serial support of s5p6442 SoC.
>
> Cc: Minkyu Kang
> Cc: Kyungmin Park
> Signed-off-by: Joonyoung Shim
> ---
> common/serial.c | 2 +-
> drivers/serial/Makefile | 1 +
> drivers/serial/serial_s5p.c | 5 +
> include/serial.h | 2 +-
> 4 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/common/serial.c b/common/serial.c
> index 94e1921..385c42b 100644
> --- a/common/serial.c
> +++ b/common/serial.c
> @@ -69,7 +69,7 @@ struct serial_device *__default_serial_console (void)
> #else
> #error "CONFIG_SERIAL? missing."
> #endif
> -#elif defined(CONFIG_S5PC1XX)
> +#elif defined(CONFIG_S5PC1XX) || defined(CONFIG_S5P64XX)
> #if defined(CONFIG_SERIAL0)
> return &s5p_serial0_device;
> #elif defined(CONFIG_SERIAL1)
> diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
> index 71392e6..110b7e1 100644
> --- a/drivers/serial/Makefile
> +++ b/drivers/serial/Makefile
> @@ -34,6 +34,7 @@ COBJS-$(CONFIG_SYS_NS16550) += ns16550.o
> COBJS-$(CONFIG_DRIVER_S3C4510_UART) += s3c4510b_uart.o
> COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
> COBJS-$(CONFIG_S5PC1XX) += serial_s5p.o
> +COBJS-$(CONFIG_S5P64XX) += serial_s5p.o
> COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial.o
> COBJS-$(CONFIG_CLPS7111_SERIAL) += serial_clps7111.o
> COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o
> diff --git a/drivers/serial/serial_s5p.c b/drivers/serial/serial_s5p.c
> index 68b8d01..1e7426d 100644
> --- a/drivers/serial/serial_s5p.c
> +++ b/drivers/serial/serial_s5p.c
> @@ -31,10 +31,15 @@ static inline struct s5p_uart *s5p_get_base_uart(int
> dev_index)
> {
> u32 offset = dev_index * sizeof(struct s5p_uart);
>
> +#ifdef CONFIG_S5PC1XX
> if (cpu_is_s5pc100())
> return (struct s5p_uart *)(S5PC100_UART_BASE + offset);
> else
> return (struct s5p_uart *)(S5PC110_UART_BASE + offset);
> +#elif CONFIG_S5P64XX
> + if (cpu_is_s5p6442())
> + return (struct s5p_uart *)(S5P6442_UART_BASE + offset);
need else or return.
> +#endif
> }
>
> /*
> diff --git a/include/serial.h b/include/serial.h
> index 4caf790..bf15212 100644
> --- a/include/serial.h
> +++ b/include/serial.h
> @@ -43,7 +43,7 @@ extern struct serial_device s3c24xx_serial1_device;
> extern struct serial_device s3c24xx_serial2_device;
> #endif
>
> -#if defined(CONFIG_S5PC1XX)
> +#if defined(CONFIG_S5PC1XX) || defined(CONFIG_S5P64XX)
> extern struct serial_device s5p_serial0_device;
> extern struct serial_device s5p_serial1_device;
> extern struct serial_device s5p_serial2_device;
> --
> 1.6.3.3
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Thanks
Minkyu Kang
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Re: [U-Boot] [PATCH 1/4] s5p6442: Support Samsung s5p6442 SoC
Dear Joonyoung Shim,
On 29 March 2010 11:56, Joonyoung Shim wrote:
> This patch adds support s5p6442 SoC. The s5p6442 SoC is ARM1176
> processor.
>
> Cc: Minkyu Kang
> Cc: Kyungmin Park
> Signed-off-by: Joonyoung Shim
> ---
> cpu/arm1176/s5p64xx/Makefile | 52 +
> cpu/arm1176/s5p64xx/clock.c | 163 +++
> cpu/arm1176/s5p64xx/cpu_info.c | 58 ++
> cpu/arm1176/s5p64xx/reset.S | 35 ++
> cpu/arm1176/s5p64xx/timer.c | 204
> ++
> include/asm-arm/arch-s5p64xx/clk.h | 38 +++
> include/asm-arm/arch-s5p64xx/clock.h | 69
> include/asm-arm/arch-s5p64xx/cpu.h | 57 ++
> include/asm-arm/arch-s5p64xx/gpio.h | 111 ++
> include/asm-arm/arch-s5p64xx/power.h | 76 +
> include/asm-arm/arch-s5p64xx/pwm.h | 58 ++
> include/asm-arm/arch-s5p64xx/uart.h | 47
> 12 files changed, 968 insertions(+), 0 deletions(-)
> create mode 100644 cpu/arm1176/s5p64xx/Makefile
> create mode 100644 cpu/arm1176/s5p64xx/clock.c
> create mode 100644 cpu/arm1176/s5p64xx/cpu_info.c
> create mode 100644 cpu/arm1176/s5p64xx/reset.S
> create mode 100644 cpu/arm1176/s5p64xx/timer.c
> create mode 100644 include/asm-arm/arch-s5p64xx/clk.h
> create mode 100644 include/asm-arm/arch-s5p64xx/clock.h
> create mode 100644 include/asm-arm/arch-s5p64xx/cpu.h
> create mode 100644 include/asm-arm/arch-s5p64xx/gpio.h
> create mode 100644 include/asm-arm/arch-s5p64xx/power.h
> create mode 100644 include/asm-arm/arch-s5p64xx/pwm.h
> create mode 100644 include/asm-arm/arch-s5p64xx/uart.h
>
> diff --git a/cpu/arm1176/s5p64xx/clock.c b/cpu/arm1176/s5p64xx/clock.c
> new file mode 100644
> index 000..5fe0482
> --- /dev/null
> +++ b/cpu/arm1176/s5p64xx/clock.c
> @@ -0,0 +1,163 @@
> +/*
> + * Copyright (C) 2010 Samsung Electronics
> + * Minkyu Kang
> + * Joonyoung Shim
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +
> +#ifndef CONFIG_SYS_CLK_FREQ_6442
> +#define CONFIG_SYS_CLK_FREQ_6442 1200
> +#endif
> +
> +unsigned long (*get_pclk)(void);
> +unsigned long (*get_arm_clk)(void);
> +unsigned long (*get_pll_clk)(int);
> +
> +/* s5p6442: return pll clock frequency */
> +static unsigned long s5p6442_get_pll_clk(int pllreg)
> +{
> + struct s5p6442_clock *clk = (struct s5p6442_clock
> *)S5P64XX_CLOCK_BASE;
> + unsigned long r, m, p, s, mask, fout;
> + unsigned int freq;
> +
> + switch (pllreg) {
> + case APLL:
> + r = readl(&clk->apll_con);
> + break;
> + case MPLL:
> + r = readl(&clk->mpll_con);
> + break;
> + case EPLL:
> + r = readl(&clk->epll_con);
> + break;
> + case VPLL:
> + r = readl(&clk->vpll_con);
> + break;
> + default:
> + printf("Unsupported PLL (%d)\n", pllreg);
> + return 0;
> + }
> +
> + /*
> + * APLL_CON: MIDV [25:16]
> + * MPLL_CON: MIDV [25:16]
> + * EPLL_CON: MIDV [24:16]
> + * VPLL_CON: MIDV [24:16]
> + */
> + if (pllreg == APLL || pllreg == MPLL)
> + mask = 0x3ff;
> + else
> + mask = 0x1ff;
> +
> + m = (r >> 16) & mask;
> +
> + /* PDIV [13:8] */
> + p = (r >> 8) & 0x3f;
> + /* SDIV [2:0] */
> + s = r & 0x7;
> +
> + freq = CONFIG_SYS_CLK_FREQ_6442;
> + if (pllreg == APLL) {
> + if (s < 1)
> + s = 1;
> + /* FOUT = MDIV * FIN / (PDIV * 2^(SDIV - 1)) */
> + fout = m * (freq / (p * (1 << (s - 1;
> + } else {
> + /* FOUT = MDIV * FIN / (PDIV * 2^SDIV) */
> + fout = m * (freq / (p * (1 << s)));
> + }
> +
> + return fout;
> +}
> +
> +/* s5p6442: return ARM clock frequency */
> +static unsigned long s5p6442_get_arm_clk(void)
> +{
> + struct s5p6442_clock *clk = (struct s5p6442_clock
> *)S5P64XX_CLOCK_BASE;
> + unsigned long d
