svn commit: r223673 - head/sys/nfs

2011-06-29 Thread Grzegorz Bernacki
Author: gber
Date: Wed Jun 29 15:17:29 2011
New Revision: 223673
URL: http://svn.freebsd.org/changeset/base/223673

Log:
  Set proper root device name when legacy NFS client is compiled into kernel.
  
  Approved by: cognet (mentor)

Modified:
  head/sys/nfs/bootp_subr.c

Modified: head/sys/nfs/bootp_subr.c
==
--- head/sys/nfs/bootp_subr.c   Wed Jun 29 14:47:20 2011(r223672)
+++ head/sys/nfs/bootp_subr.c   Wed Jun 29 15:17:29 2011(r223673)
@@ -44,6 +44,7 @@
 __FBSDID("$FreeBSD$");
 
 #include "opt_bootp.h"
+#include "opt_nfs.h"
 
 #include 
 #include 
@@ -1699,6 +1700,9 @@ bootpc_init(void)
}
 
rootdevnames[0] = "nfs:";
+#ifdef NFSCLIENT
+   rootdevnames[1] = "oldnfs:";
+#endif
mountopts(&nd->root_args, NULL);
 
for (ifctx = gctx->interfaces; ifctx != NULL; ifctx = ifctx->next)
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svn commit: r250291 - in head/sys: arm/mv boot/fdt/dts dev/cesa

2013-05-06 Thread Grzegorz Bernacki
Author: gber
Date: Mon May  6 13:34:36 2013
New Revision: 250291
URL: http://svnweb.freebsd.org/changeset/base/250291

Log:
  Move initialization of CESA decoding windows from common section
  to driver specific files.
  
  - window initialization is done during device attach
  - CESA TDMA decoding windows values are set based on DTS,
   not copied from CPU registers
  - remove unnecessary virtual mapping
  - update dts file
  
  Obtained from: Semihalf

Modified:
  head/sys/arm/mv/common.c
  head/sys/arm/mv/mv_machdep.c
  head/sys/arm/mv/mvwin.h
  head/sys/boot/fdt/dts/db78460.dts
  head/sys/dev/cesa/cesa.c
  head/sys/dev/cesa/cesa.h

Modified: head/sys/arm/mv/common.c
==
--- head/sys/arm/mv/common.cSun May  5 22:42:10 2013(r250290)
+++ head/sys/arm/mv/common.cMon May  6 13:34:36 2013(r250291)
@@ -83,7 +83,7 @@ static int decode_win_usb_valid(void);
 static int decode_win_eth_valid(void);
 static int decode_win_pcie_valid(void);
 static int decode_win_sata_valid(void);
-static int decode_win_cesa_valid(void);
+
 static int decode_win_idma_valid(void);
 static int decode_win_xor_valid(void);
 
@@ -93,11 +93,10 @@ static void decode_win_cpu_setup(void);
 static void decode_win_usb_setup(u_long);
 static void decode_win_eth_setup(u_long);
 static void decode_win_sata_setup(u_long);
-static void decode_win_cesa_setup(u_long);
+
 static void decode_win_idma_setup(u_long);
 static void decode_win_xor_setup(u_long);
 
-static void decode_win_cesa_dump(u_long);
 static void decode_win_usb_dump(u_long);
 static void decode_win_eth_dump(u_long base);
 static void decode_win_idma_dump(u_long base);
@@ -127,7 +126,6 @@ struct soc_node_spec {
 };
 
 static struct soc_node_spec soc_nodes[] = {
-   { "mrvl,cesa", &decode_win_cesa_setup, &decode_win_cesa_dump },
{ "mrvl,ge", &decode_win_eth_setup, &decode_win_eth_dump },
{ "mrvl,usb-ehci", &decode_win_usb_setup, &decode_win_usb_dump },
{ "mrvl,sata", &decode_win_sata_setup, NULL },
@@ -143,7 +141,6 @@ struct fdt_pm_mask_entry fdt_pm_mask_tab
{ "mrvl,usb-ehci",  CPU_PM_CTRL_USB(0) },
{ "mrvl,usb-ehci",  CPU_PM_CTRL_USB(1) },
{ "mrvl,usb-ehci",  CPU_PM_CTRL_USB(2) },
-   { "mrvl,cesa",  CPU_PM_CTRL_CRYPTO },
{ "mrvl,xor",   CPU_PM_CTRL_XOR },
{ "mrvl,sata",  CPU_PM_CTRL_SATA },
 
@@ -529,7 +526,7 @@ soc_decode_win(void)
if (!decode_win_cpu_valid() || !decode_win_usb_valid() ||
!decode_win_eth_valid() || !decode_win_idma_valid() ||
!decode_win_pcie_valid() || !decode_win_sata_valid() ||
-   !decode_win_cesa_valid() || !decode_win_xor_valid())
+   !decode_win_xor_valid())
return (EINVAL);
 
decode_win_cpu_setup();
@@ -537,7 +534,7 @@ soc_decode_win(void)
if (!decode_win_usb_valid() ||
!decode_win_eth_valid() || !decode_win_idma_valid() ||
!decode_win_pcie_valid() || !decode_win_sata_valid() ||
-   !decode_win_cesa_valid() || !decode_win_xor_valid())
+   !decode_win_xor_valid())
return (EINVAL);
 #endif
if (MV_DUMP_WIN)
@@ -570,11 +567,6 @@ WIN_REG_BASE_IDX_RD(win_usb, br, MV_WIN_
 WIN_REG_BASE_IDX_WR(win_usb, cr, MV_WIN_USB_CTRL)
 WIN_REG_BASE_IDX_WR(win_usb, br, MV_WIN_USB_BASE)
 
-WIN_REG_BASE_IDX_RD(win_cesa, cr, MV_WIN_CESA_CTRL)
-WIN_REG_BASE_IDX_RD(win_cesa, br, MV_WIN_CESA_BASE)
-WIN_REG_BASE_IDX_WR(win_cesa, cr, MV_WIN_CESA_CTRL)
-WIN_REG_BASE_IDX_WR(win_cesa, br, MV_WIN_CESA_BASE)
-
 WIN_REG_BASE_IDX_RD(win_eth, br, MV_WIN_ETH_BASE)
 WIN_REG_BASE_IDX_RD(win_eth, sz, MV_WIN_ETH_SIZE)
 WIN_REG_BASE_IDX_RD(win_eth, har, MV_WIN_ETH_REMAP)
@@ -1791,98 +1783,6 @@ decode_win_xor_dump(u_long base)
 #endif
 
 /**
- * CESA TDMA windows routines
- **/
-#if defined(SOC_MV_KIRKWOOD) || defined(SOC_MV_DISCOVERY)
-/*
- * Dump CESA TDMA decode windows.
- */
-static void
-decode_win_cesa_dump(u_long base)
-{
-   int i;
-
-   if (pm_is_disabled(CPU_PM_CTRL_CRYPTO))
-   return;
-
-   for (i = 0; i < MV_WIN_CESA_MAX; i++)
-   printf("CESA window#%d: c 0x%08x, b 0x%08x\n", i,
-   win_cesa_cr_read(base, i), win_cesa_br_read(base, i));
-}
-
-
-/*
- * Set CESA TDMA decode windows.
- */
-static void
-decode_win_cesa_setup(u_long base)
-{
-   uint32_t br, cr;
-   int i, j;
-
-   if (pm_is_disabled(CPU_PM_CTRL_CRYPTO))
-   return;
-
-   /* Disable and clear all CESA windows */
-   for (i = 0; i < MV_WIN_CESA_MAX; i++) {
-   win_cesa_cr_write(base, i, 0);
-   win_cesa_br_write(base, i, 0);
-   }
-
-   /* Only access to active DRAM banks is required. */
-   for (i = 0; i < MV_WIN_DDR_MAX; i

svn commit: r250292 - in head/sys/arm/mv: . armadaxp

2013-05-06 Thread Grzegorz Bernacki
Author: gber
Date: Mon May  6 13:52:49 2013
New Revision: 250292
URL: http://svnweb.freebsd.org/changeset/base/250292

Log:
  Initialize L2 cache for Armada XP.
  
  Obtained from:Semihalf

Modified:
  head/sys/arm/mv/armadaxp/armadaxp.c
  head/sys/arm/mv/armadaxp/std.armadaxp
  head/sys/arm/mv/mv_machdep.c

Modified: head/sys/arm/mv/armadaxp/armadaxp.c
==
--- head/sys/arm/mv/armadaxp/armadaxp.c Mon May  6 13:34:36 2013
(r250291)
+++ head/sys/arm/mv/armadaxp/armadaxp.c Mon May  6 13:52:49 2013
(r250292)
@@ -36,6 +36,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
 #include 
 #include 
 
@@ -51,6 +52,33 @@ __FBSDID("$FreeBSD$");
 
 static uint32_t count_l2clk(void);
 
+#define ARMADAXP_L2_BASE   (MV_BASE + 0x8000)
+#define ARMADAXP_L2_CTRL   0x100
+#define L2_ENABLE  (1 << 0)
+#define ARMADAXP_L2_AUX_CTRL   0x104
+#define L2_WBWT_MODE_MASK  (3 << 0)
+#define L2_WBWT_MODE_PAGE  0
+#define L2_WBWT_MODE_WB1
+#define L2_WBWT_MODE_WT2
+#define L2_REP_STRAT_MASK  (3 << 27)
+#define L2_REP_STRAT_LSFR  (1 << 27)
+#define L2_REP_STRAT_SEMIPLRU  (3 << 27)
+
+#define ARMADAXP_L2_CNTR_CTRL  0x200
+#define ARMADAXP_L2_CNTR_CONF(x)   (0x204 + (x) * 0xc)
+#define ARMADAXP_L2_CNTR2_VAL_LOW  (0x208 + (x) * 0xc)
+#define ARMADAXP_L2_CNTR2_VAL_HI   (0x20c + (x) * 0xc)
+
+#define ARMADAXP_L2_INT_CAUSE  0x220
+
+#define ARMADAXP_L2_SYNC_BARRIER   0x700
+#define ARMADAXP_L2_INV_WAY0x778
+#define ARMADAXP_L2_CLEAN_WAY  0x7BC
+#define ARMADAXP_L2_FLUSH_PHYS 0x7F0
+#define ARMADAXP_L2_FLUSH_WAY  0x7FC
+
+#define COHER_FABRIC_CFU   0x228
+
 /* XXX Make gpio driver optional and remove it */
 struct resource_spec mv_gpio_res[] = {
{ SYS_RES_MEMORY,   0,  RF_ACTIVE },
@@ -160,3 +188,76 @@ get_l2clk(void)
return (l2clk_freq);
 }
 
+void armadaxp_l2_init(void);
+void armadaxp_l2_idcache_inv_all(void);
+
+#define ALL_WAYS   0x
+
+/* L2 cache configuration registers */
+static uint32_t
+read_l2_cache(uint32_t reg)
+{
+
+   return (bus_space_read_4(fdtbus_bs_tag, ARMADAXP_L2_BASE, reg));
+}
+
+static void
+write_l2_cache(uint32_t reg, uint32_t val)
+{
+
+   bus_space_write_4(fdtbus_bs_tag, ARMADAXP_L2_BASE, reg, val);
+}
+
+void
+armadaxp_l2_idcache_inv_all(void)
+{
+   write_l2_cache(ARMADAXP_L2_INV_WAY, ALL_WAYS);
+}
+
+void
+armadaxp_l2_init(void)
+{
+   u_int32_t reg;
+
+   /* Set L2 policy */
+   reg = read_l2_cache(ARMADAXP_L2_AUX_CTRL);
+   reg &= ~(L2_WBWT_MODE_MASK);
+   reg &= ~(L2_REP_STRAT_MASK);
+   reg |= L2_REP_STRAT_SEMIPLRU;
+   reg |= L2_WBWT_MODE_WT;
+   write_l2_cache(ARMADAXP_L2_AUX_CTRL, reg);
+
+   /* Invalidate l2 cache */
+   armadaxp_l2_idcache_inv_all();
+
+   /* Clear pending L2 interrupts */
+   write_l2_cache(ARMADAXP_L2_INT_CAUSE, 0x1ff);
+
+   /* Enable Cache and TLB maintenance broadcast */
+   __asm__ __volatile__ ("mrc p15, 1, %0, c15, c2, 0" : "=r"(reg));
+   reg |= (1 << 8);
+   __asm__ __volatile__ ("mcr p15, 1, %0, c15, c2, 0" : :"r"(reg));
+
+   /* Enable l2 cache */
+   reg = read_l2_cache(ARMADAXP_L2_CTRL);
+   write_l2_cache(ARMADAXP_L2_CTRL, reg | L2_ENABLE);
+
+   /*
+* For debug purposes
+* Configure and enable counter
+*/
+   write_l2_cache(ARMADAXP_L2_CNTR_CONF(0), 0xf | (4 << 2));
+   write_l2_cache(ARMADAXP_L2_CNTR_CONF(1), 0xf | (2 << 2));
+   write_l2_cache(ARMADAXP_L2_CNTR_CTRL, 0x303);
+
+   /*
+* Enable Cache maintenance operation propagation in coherency fabric
+* Change point of coherency and point of unification to DRAM.
+*/
+   reg = bus_space_read_4(fdtbus_bs_tag, MV_MBUS_BRIDGE_BASE,
+   COHER_FABRIC_CFU);
+   reg |= (1 << 17) | (1 << 18);
+   bus_space_write_4(fdtbus_bs_tag, MV_MBUS_BRIDGE_BASE, COHER_FABRIC_CFU,
+   reg);
+}
+

Modified: head/sys/arm/mv/armadaxp/std.armadaxp
==
--- head/sys/arm/mv/armadaxp/std.armadaxp   Mon May  6 13:34:36 2013
(r250291)
+++ head/sys/arm/mv/armadaxp/std.armadaxp   Mon May  6 13:52:49 2013
(r250292)
@@ -13,3 +13,5 @@ options   KERNPHYSADDR=0x00f0
 optionsKERNVIRTADDR=0xc0f0
 optionsPHYSADDR=0x
 optionsSTARTUP_PAGETABLE_ADDR=0x0010
+
+optionsARM_L2_PIPT

Modified: head/sys/arm/mv/mv_machdep.c
==
--- head/sys/arm/mv/mv_machdep.cMon May  6 13:34:36 2013
(r250291)
+++ head/sys/arm/mv/mv_machdep.c   

svn commit: r250293 - in head/sys/arm: arm mv mv/armadaxp

2013-05-06 Thread Grzegorz Bernacki
Author: gber
Date: Mon May  6 14:12:36 2013
New Revision: 250293
URL: http://svnweb.freebsd.org/changeset/base/250293

Log:
  Properly initialize Armada XP MP subsystem.
  
  - correct setting of Auxiliary Control Register for MP mode
  - correct setting of Auxiliarty Debug registers
  - cleanup management of memory contains bootup code
  - early initialization of Coherency Fabric (MP and not-MP mode)
  - enable Snoop Filtering
  
  Obtained from:Semihalf

Modified:
  head/sys/arm/arm/cpufunc_asm_pj4b.S
  head/sys/arm/arm/locore.S
  head/sys/arm/arm/mp_machdep.c
  head/sys/arm/mv/armadaxp/armadaxp.c
  head/sys/arm/mv/armadaxp/armadaxp_mp.c
  head/sys/arm/mv/mv_machdep.c

Modified: head/sys/arm/arm/cpufunc_asm_pj4b.S
==
--- head/sys/arm/arm/cpufunc_asm_pj4b.S Mon May  6 13:52:49 2013
(r250292)
+++ head/sys/arm/arm/cpufunc_asm_pj4b.S Mon May  6 14:12:36 2013
(r250293)
@@ -37,6 +37,10 @@ __FBSDID("$FreeBSD$");
 .Lpj4b_cache_line_size:
.word   _C_LABEL(arm_pdcache_line_size)
 
+.Lpj4b_sf_ctrl_reg:
+   .word   0xf1021820
+
+
 ENTRY(pj4b_setttb)
/* Cache synchronization is not required as this core has PIPT caches */
mcr p15, 0, r1, c7, c10, 4  /* drain the write buffer */
@@ -198,13 +202,42 @@ ENTRY(get_core_id)
 END(get_core_id)
 
 ENTRY(pj4b_config)
+
+   /* Set Auxiliary Debug Modes Control 0 register */
+   mrc p15, 1, r0, c15, c1, 0
+   /* ARMADAXP errata fix: ARM-CPU-6136 */
+   bic r0, r0, #(1 << 12)  /* LDSTM first issue is single word */
+
+   orr r0, r0, #(1 << 22)  /* DVM_WAKEUP disable */
+   mcr p15, 1, r0, c15, c1, 0
+
+   /* Set Auxiliary Debug Modes Control 1 register */
+   mrc p15, 1, r0, c15, c1, 1
+   /* ARMADAXP errata fix: ARM-CPU-6409 */
+   bic r0, r0, #(1 << 2)   /* Disable static branch prediction */
+
+   orr r0, r0, #(1 << 5)   /* STREX backoff disable */
+   orr r0, r0, #(1 << 8)   /* Internal parity handling disable */
+   orr r0, r0, #(1 << 16)  /* Disable data transfer for clean line 
*/
+   mcr p15, 1, r0, c15, c1, 1
+
+   /* Set Auxiliary Function Modes Control 0 register */
+   mrc p15, 1, r0, c15, c2, 0
+#if defined(SMP)
+   orr r0, r0, #(1 << 1)   /* SMP/nAMP enabled (coherency) */
+#endif
+   orr r0, r0, #(1 << 2)   /* L1 parite enable */
+   orr r0, r0, #(1 << 8)   /* Cache and TLB maintenance broadcast 
enable */
+   mcr p15, 1, r0, c15, c2, 0
+
/* Set Auxiliary Debug Modes Control 2 register */
mrc p15, 1, r0, c15, c1, 2
-   bic r0, r0, #(1 << 23)
-   orr r0, r0, #(1 << 25)
-   orr r0, r0, #(1 << 27)
-   orr r0, r0, #(1 << 29)
-   orr r0, r0, #(1 << 30)
+   bic r0, r0, #(1 << 23)  /* Enable fast LDR */
+   orr r0, r0, #(1 << 25)  /* Intervention Interleave disable */
+   orr r0, r0, #(1 << 27)  /* Critical word first sequencing 
disable */
+   orr r0, r0, #(1 << 29)  /* Disable MO device read / write */
+   orr r0, r0, #(1 << 30)  /* L1 cache strict round-robin 
replacement policy*/
+   orr r0, r0, #(1 << 31)  /* Enable write evict */
mcr p15, 1, r0, c15, c1, 2
 #if defined(SMP)
/* Set SMP mode in Auxiliary Control Register */
@@ -212,6 +245,18 @@ ENTRY(pj4b_config)
orr r0, r0, #(1 << 5)
mcr p15, 0, r0, c1, c0, 1
 #endif
+
+   /* Load CPU number */
+   mrc p15, 0, r0, c0, c0, 5
+   and r0, r0, #0xf
+
+   /* SF Enable and invalidate */
+   ldr r1, .Lpj4b_sf_ctrl_reg
+   ldr r2, [r1, r0, lsl #8]
+   orr r2, r2, #(1 << 0)
+   bic r2, r2, #(1 << 8)
+   str r2, [r1, r0, lsl #8]
+
RET
 END(pj4b_config)
 

Modified: head/sys/arm/arm/locore.S
==
--- head/sys/arm/arm/locore.S   Mon May  6 13:52:49 2013(r250292)
+++ head/sys/arm/arm/locore.S   Mon May  6 14:12:36 2013(r250293)
@@ -265,7 +265,11 @@ mmu_init_table:
/* map VA 0xc000..0xc3ff to PA */
MMU_INIT(KERNBASE, PHYSADDR, 64, 
L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW))
MMU_INIT(0x4800, 0x4800, 1, 
L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW))
-#endif
+#if defined(CPU_MV_PJ4B)
+   /* map VA 0xf100..0xd000 to PA */
+   MMU_INIT(0xf100, 0xd000, 1, 
L1_TYPE_S|L1_SHARED|L1_S_B|L1_S_AP(AP_KRW))
+#endif /* CPU_MV_PJ4B */
+#endif /* SMP */
.word 0 /* end of table */
 #endif
 .Lstart:

Modified: head/sys/arm/arm/mp_machdep.c
==
--- head/sys/arm/arm/mp_machdep.c   Mon May  6 13:52:49 2013
(r250292)
+++ head/sys/arm/arm/mp_machdep.c   Mon May 

svn commit: r250294 - head/sys/arm/arm

2013-05-06 Thread Grzegorz Bernacki
Author: gber
Date: Mon May  6 14:27:46 2013
New Revision: 250294
URL: http://svnweb.freebsd.org/changeset/base/250294

Log:
  Avoid calling pcpu_init() simultaneously.
  
  pcpu_init() updates queue, so cannot be called by multiple cores
  at the same time
  
  Obtained from:Semihalf

Modified:
  head/sys/arm/arm/mp_machdep.c

Modified: head/sys/arm/arm/mp_machdep.c
==
--- head/sys/arm/arm/mp_machdep.c   Mon May  6 14:12:36 2013
(r250293)
+++ head/sys/arm/arm/mp_machdep.c   Mon May  6 14:27:46 2013
(r250294)
@@ -173,8 +173,15 @@ init_secondary(int cpu)
 
pc = &__pcpu[cpu];
set_pcpu(pc);
-   pcpu_init(pc, cpu, sizeof(struct pcpu));
 
+   /*
+* pcpu_init() updates queue, so it should not be executed in parallel
+* on several cores
+*/
+   while(mp_naps < (cpu - 1))
+   ;
+
+   pcpu_init(pc, cpu, sizeof(struct pcpu));
dpcpu_init(dpcpu[cpu - 1], cpu);
 
/* Provide stack pointers for other processor modes. */
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svn commit: r250295 - head/sys/arm/mv

2013-05-06 Thread Grzegorz Bernacki
Author: gber
Date: Mon May  6 14:54:17 2013
New Revision: 250295
URL: http://svnweb.freebsd.org/changeset/base/250295

Log:
  Disable decoding windows with no FDT entry.
  
  - On ARMADAXP B0 (GP development board) we are not able to use PCI due to
 whole 32-bit address space used by 4GB of RAM memory.
  - Change is required to destroy unnecessary window to free address space
 for PCI and other devices
  - Fix offset value for SDRAM decoding windows
  
  Obtained from:Semihalf

Modified:
  head/sys/arm/mv/common.c
  head/sys/arm/mv/mvvar.h
  head/sys/arm/mv/mvwin.h

Modified: head/sys/arm/mv/common.c
==
--- head/sys/arm/mv/common.cMon May  6 14:27:46 2013(r250294)
+++ head/sys/arm/mv/common.cMon May  6 14:54:17 2013(r250295)
@@ -89,6 +89,7 @@ static int decode_win_xor_valid(void);
 
 #ifndef SOC_MV_FREY
 static void decode_win_cpu_setup(void);
+static int decode_win_sdram_fixup(void);
 #endif
 static void decode_win_usb_setup(u_long);
 static void decode_win_eth_setup(u_long);
@@ -522,6 +523,11 @@ soc_decode_win(void)
/* Retrieve our ID: some windows facilities vary between SoC models */
soc_id(&dev, &rev);
 
+#ifdef SOC_MV_ARMADAXP
+   if ((err = decode_win_sdram_fixup()) != 0)
+   return(err);
+#endif
+
 #ifndef SOC_MV_FREY
if (!decode_win_cpu_valid() || !decode_win_usb_valid() ||
!decode_win_eth_valid() || !decode_win_idma_valid() ||
@@ -617,6 +623,8 @@ WIN_REG_BASE_IDX_WR(win_sata, br, MV_WIN
 #ifndef SOC_MV_DOVE
 WIN_REG_IDX_RD(ddr, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE)
 WIN_REG_IDX_RD(ddr, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE)
+WIN_REG_IDX_WR(ddr, br, MV_WIN_DDR_BASE, MV_DDR_CADR_BASE)
+WIN_REG_IDX_WR(ddr, sz, MV_WIN_DDR_SIZE, MV_DDR_CADR_BASE)
 #else
 /*
  * On 88F6781 (Dove) SoC DDR Controller is accessed through
@@ -871,6 +879,48 @@ decode_win_cpu_setup(void)
cpu_wins[i].size, cpu_wins[i].remap);
 
 }
+
+static int
+decode_win_sdram_fixup(void)
+{
+   struct mem_region mr[FDT_MEM_REGIONS];
+   uint8_t window_valid[MV_WIN_DDR_MAX];
+   int mr_cnt, memsize, err, i, j;
+   uint32_t valid_win_num = 0;
+
+   /* Grab physical memory regions information from device tree. */
+   err = fdt_get_mem_regions(mr, &mr_cnt, &memsize);
+   if (err != 0)
+   return (err);
+
+   for (i = 0; i < MV_WIN_DDR_MAX; i++)
+   window_valid[i] = 0;
+
+   /* Try to match entries from device tree with settings from u-boot */
+   for (i = 0; i < mr_cnt; i++) {
+   for (j = 0; j < MV_WIN_DDR_MAX; j++) {
+   if (ddr_is_active(j) &&
+   (ddr_base(j) == mr[i].mr_start) &&
+   (ddr_size(j) == mr[i].mr_size)) {
+   window_valid[j] = 1;
+   valid_win_num++;
+   }
+   }
+   }
+
+   if (mr_cnt != valid_win_num)
+   return (EINVAL);
+
+   /* Destroy windows without corresponding device tree entry */
+   for (j = 0; j < MV_WIN_DDR_MAX; j++) {
+   if (ddr_is_active(j) && (window_valid[j] != 1)) {
+   printf("Disabling SDRAM decoding window: %d\n", j);
+   ddr_disable(j);
+   }
+   }
+
+   return (0);
+}
 #endif
 /*
  * Check if we're able to cover all active DDR banks.
@@ -907,6 +957,14 @@ ddr_is_active(int i)
return (0);
 }
 
+void
+ddr_disable(int i)
+{
+
+   ddr_sz_write(i, 0);
+   ddr_br_write(i, 0);
+}
+
 uint32_t
 ddr_base(int i)
 {

Modified: head/sys/arm/mv/mvvar.h
==
--- head/sys/arm/mv/mvvar.h Mon May  6 14:27:46 2013(r250294)
+++ head/sys/arm/mv/mvvar.h Mon May  6 14:54:17 2013(r250295)
@@ -97,6 +97,7 @@ int decode_win_overlap(int, int, const s
 int win_cpu_can_remap(int);
 void decode_win_pcie_setup(u_long);
 
+void ddr_disable(int i);
 int ddr_is_active(int i);
 uint32_t ddr_base(int i);
 uint32_t ddr_size(int i);

Modified: head/sys/arm/mv/mvwin.h
==
--- head/sys/arm/mv/mvwin.h Mon May  6 14:27:46 2013(r250294)
+++ head/sys/arm/mv/mvwin.h Mon May  6 14:54:17 2013(r250295)
@@ -122,6 +122,8 @@
 #define MV_DDR_CADR_BASE   (MV_AXI_BASE + 0x100)
 #elif defined(SOC_MV_LOKIPLUS)
 #define MV_DDR_CADR_BASE   (MV_BASE + 0xF1500)
+#elif defined(SOC_MV_ARMADAXP)
+#define MV_DDR_CADR_BASE   (MV_BASE + 0x20180)
 #else
 #define MV_DDR_CADR_BASE   (MV_BASE + 0x1500)
 #endif
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svn commit: r250296 - head/sys/arm/arm

2013-05-06 Thread Grzegorz Bernacki
Author: gber
Date: Mon May  6 14:57:02 2013
New Revision: 250296
URL: http://svnweb.freebsd.org/changeset/base/250296

Log:
  Correct comment about initial VA=>PA mapping

Modified:
  head/sys/arm/arm/locore.S

Modified: head/sys/arm/arm/locore.S
==
--- head/sys/arm/arm/locore.S   Mon May  6 14:54:17 2013(r250295)
+++ head/sys/arm/arm/locore.S   Mon May  6 14:57:02 2013(r250296)
@@ -266,7 +266,7 @@ mmu_init_table:
MMU_INIT(KERNBASE, PHYSADDR, 64, 
L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW))
MMU_INIT(0x4800, 0x4800, 1, 
L1_TYPE_S|L1_SHARED|L1_S_C|L1_S_AP(AP_KRW))
 #if defined(CPU_MV_PJ4B)
-   /* map VA 0xf100..0xd000 to PA */
+   /* map VA 0xf100..0xf110 to PA 0xd000 */
MMU_INIT(0xf100, 0xd000, 1, 
L1_TYPE_S|L1_SHARED|L1_S_B|L1_S_AP(AP_KRW))
 #endif /* CPU_MV_PJ4B */
 #endif /* SMP */
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svn commit: r250297 - in head/sys/arm: arm include

2013-05-06 Thread Grzegorz Bernacki
Author: gber
Date: Mon May  6 15:30:34 2013
New Revision: 250297
URL: http://svnweb.freebsd.org/changeset/base/250297

Log:
  Fix L2 PTE access permissions management.
  
  Keep following access permissions:
  
  APX AP Kernel User
   1  01   R N
   1  10   R R
   0  01  R/WN
   0  11  R/W   R/W
  
  Avoid using reserved in ARMv6 APX|AP settings:
  - In case of unprivileged (user) access without permission to write,
the access permission bits were being set to reserved for ARMv6
(but valid for ARMv7) value of APX|AP = 111.
  
  Fix-up faulting userland accesses properly:
  - Wrong condition statement in pmap_fault_fixup() caused that
any genuine, unprivileged access was being fixed-up instead of
just skip doing anything and return. Staring from now we ensure
proper reaction for illicit user accesses.
  
  L2_S_PROT_R and L2_S_PROT_U names might be misleading as they do not
  reflect real permission levels. It will be clarified in following
  patches (switch to AP[2:1] permissions model).
  
  Obtained from: Semihalf

Modified:
  head/sys/arm/arm/pmap-v6.c
  head/sys/arm/include/pmap.h

Modified: head/sys/arm/arm/pmap-v6.c
==
--- head/sys/arm/arm/pmap-v6.c  Mon May  6 14:57:02 2013(r250296)
+++ head/sys/arm/arm/pmap-v6.c  Mon May  6 15:30:34 2013(r250297)
@@ -983,6 +983,7 @@ pmap_set_prot(pt_entry_t *ptep, vm_prot_
if (!(prot & VM_PROT_EXECUTE))
*ptep |= L2_XN;
 
+   *ptep |= L2_APX;
*ptep |= L2_S_PROT_R;
 
if (user)
@@ -990,6 +991,8 @@ pmap_set_prot(pt_entry_t *ptep, vm_prot_
 
if (prot & VM_PROT_WRITE)
*ptep &= ~(L2_APX);
+   else if (user)
+   *ptep &= ~(L2_S_PROT_R);
 }
 
 /*
@@ -1216,7 +1219,7 @@ pmap_fault_fixup(pmap_t pm, vm_offset_t 
/*
 * Catch a userland access to the vector page mapped at 0x0
 */
-   if (user && ((pte & L2_S_PROT_MASK) == L2_S_PROT_U))
+   if (user && !(pte & L2_S_PROT_U))
goto out;
if (va == vector_page)
goto out;
@@ -2649,7 +2652,10 @@ do_l2b_alloc:
npte |= L2_TYPE_INV;
}
 
+   npte |= L2_APX;
npte |= L2_S_PROT_R;
+   if (user)
+   npte |= L2_S_PROT_U;
 
if (prot & VM_PROT_WRITE) {
npte &= ~(L2_APX);
@@ -2657,11 +2663,8 @@ do_l2b_alloc:
if (m != NULL &&
(m->oflags & VPO_UNMANAGED) == 0)
vm_page_aflag_set(m, PGA_WRITEABLE);
-   }
-
-   if (user)
-   npte |= L2_S_PROT_U;
-
+   } else if (user)
+   npte &= ~(L2_S_PROT_R);
 
if (!(prot & VM_PROT_EXECUTE) && m)
npte |= L2_XN;

Modified: head/sys/arm/include/pmap.h
==
--- head/sys/arm/include/pmap.h Mon May  6 14:57:02 2013(r250296)
+++ head/sys/arm/include/pmap.h Mon May  6 15:30:34 2013(r250297)
@@ -352,7 +352,7 @@ extern int pmap_needs_pte_sync;
 #elif (ARM_MMU_V6 + ARM_MMU_V7) != 0
 
 #defineL2_S_PROT_U (L2_AP0(2)) /* user access 
*/
-#defineL2_S_PROT_R (L2_APX|L2_AP0(1))  /* read access 
*/
+#defineL2_S_PROT_R (L2_AP0(1)) /* read access 
*/
 
 #defineL2_S_PROT_MASK  (L2_S_PROT_U|L2_S_PROT_R)
 #defineL2_S_WRITABLE(pte)  (!(pte & L2_APX))
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svn commit: r250299 - head/sys/arm/arm

2013-05-06 Thread Grzegorz Bernacki
Author: gber
Date: Mon May  6 16:11:53 2013
New Revision: 250299
URL: http://svnweb.freebsd.org/changeset/base/250299

Log:
  Fix page reference emulation on ARMv6 and v7
  
  Submitted by: Zbigniew Bodek
  Obtained from: Semihalf

Modified:
  head/sys/arm/arm/pmap-v6.c

Modified: head/sys/arm/arm/pmap-v6.c
==
--- head/sys/arm/arm/pmap-v6.c  Mon May  6 15:58:53 2013(r250298)
+++ head/sys/arm/arm/pmap-v6.c  Mon May  6 16:11:53 2013(r250299)
@@ -2649,6 +2649,7 @@ do_l2b_alloc:
/*
 * Need to do page referenced emulation.
 */
+   npte &= ~L2_TYPE_MASK;
npte |= L2_TYPE_INV;
}
 
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Re: svn commit: r250294 - head/sys/arm/arm

2013-05-06 Thread Grzegorz Bernacki
In my opinion this is the simplest way to do it, however if you think it 
should be done other way I can change it.


grzesiek

On 05/06/13 20:45, Adrian Chadd wrote:

.. is this really the only way to do this reliably?



adrian

On 6 May 2013 07:27, Grzegorz Bernacki  wrote:

Author: gber
Date: Mon May  6 14:27:46 2013
New Revision: 250294
URL: http://svnweb.freebsd.org/changeset/base/250294

Log:
   Avoid calling pcpu_init() simultaneously.

   pcpu_init() updates queue, so cannot be called by multiple cores
   at the same time

   Obtained from:Semihalf

Modified:
   head/sys/arm/arm/mp_machdep.c

Modified: head/sys/arm/arm/mp_machdep.c
==
--- head/sys/arm/arm/mp_machdep.c   Mon May  6 14:12:36 2013
(r250293)
+++ head/sys/arm/arm/mp_machdep.c   Mon May  6 14:27:46 2013
(r250294)
@@ -173,8 +173,15 @@ init_secondary(int cpu)

 pc =&__pcpu[cpu];
 set_pcpu(pc);
-   pcpu_init(pc, cpu, sizeof(struct pcpu));

+   /*
+* pcpu_init() updates queue, so it should not be executed in parallel
+* on several cores
+*/
+   while(mp_naps<  (cpu - 1))
+   ;
+
+   pcpu_init(pc, cpu, sizeof(struct pcpu));
 dpcpu_init(dpcpu[cpu - 1], cpu);

 /* Provide stack pointers for other processor modes. */


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svn commit: r250324 - head/sys/arm/mv

2013-05-06 Thread Grzegorz Bernacki
Author: gber
Date: Tue May  7 06:42:07 2013
New Revision: 250324
URL: http://svnweb.freebsd.org/changeset/base/250324

Log:
  decode_win_sdram_fixup() function should be declared, defined and used
  only by Armada XP
  
  Obtained from:Semihalf

Modified:
  head/sys/arm/mv/common.c

Modified: head/sys/arm/mv/common.c
==
--- head/sys/arm/mv/common.cTue May  7 05:40:20 2013(r250323)
+++ head/sys/arm/mv/common.cTue May  7 06:42:07 2013(r250324)
@@ -89,6 +89,8 @@ static int decode_win_xor_valid(void);
 
 #ifndef SOC_MV_FREY
 static void decode_win_cpu_setup(void);
+#endif
+#ifdef SOC_MV_ARMADAXP
 static int decode_win_sdram_fixup(void);
 #endif
 static void decode_win_usb_setup(u_long);
@@ -879,7 +881,9 @@ decode_win_cpu_setup(void)
cpu_wins[i].size, cpu_wins[i].remap);
 
 }
+#endif
 
+#ifdef SOC_MV_ARMADAXP
 static int
 decode_win_sdram_fixup(void)
 {
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svn commit: r250634 - in head/sys: arm/arm arm/include conf

2013-05-14 Thread Grzegorz Bernacki
Author: gber
Date: Tue May 14 09:47:58 2013
New Revision: 250634
URL: http://svnweb.freebsd.org/changeset/base/250634

Log:
  Port the new PV entry allocator from amd64/i386/mips to armv6/v7.
  
  PV entries are now roughly half the size.
  Instead of using a shared UMA zone for 28 byte pv entries
  (two 8-byte tailq nodes, a 4 byte pointer, a 4 byte address and 4 byte
  flags), we allocate a page at a time per process.
  This provides 252 pv entries per process (actually, per pmap address space)
  and eliminates one of the 8-byte tailq entries since we now can track
  per-process pv entries implicitly.
  The pointer to the pmap can be eliminated by doing address arithmetic to
  find the metadata on the page headers to find a single pointer shared by
  all 252 entries. There is an 8-int bitmap for the freelist of those 252
  entries.
  When in serious low memory condition, allocation of another pv_chunk is
  possible by freeing some pages in pmap_pv_reclaim().
  
  Added pv_entry/pv_chunk related statistics to pmap.
  pv_entry/pv_chunk statistics can be accessed via sysctl vm.pmap.
  
  Ported PTE freelist of KVA allocation and maintenance from i386.
  Using an idea from Stephan Uphoff, use the empty pte's that correspond
  to the unused kva in the pv memory block to thread a freelist through.
  This allows us to free pages that used to be used for pv entry chunks
  since we can now track holes in the kva memory block.
  
  As both ARM pmap.c and pmap-v6.c use the same header and pv_entry, pmap and
  md_page structures are different, it was needed to separate code designed
  for ARMv6/7 from the one for other ARMs.
  
  Submitted by: Zbigniew Bodek 
  Reviewed by:  alc
  Sponsored by: The FreeBSD Foundation, Semihalf

Modified:
  head/sys/arm/arm/pmap-v6.c
  head/sys/arm/include/pmap.h
  head/sys/conf/options.arm

Modified: head/sys/arm/arm/pmap-v6.c
==
--- head/sys/arm/arm/pmap-v6.c  Tue May 14 03:21:13 2013(r250633)
+++ head/sys/arm/arm/pmap-v6.c  Tue May 14 09:47:58 2013(r250634)
@@ -141,6 +141,7 @@
 /* Include header files */
 
 #include "opt_vm.h"
+#include "opt_pmap.h"
 
 #include 
 __FBSDID("$FreeBSD$");
@@ -158,6 +159,7 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 #include 
+#include 
 
 #include 
 #include 
@@ -193,6 +195,12 @@ int pmap_debug_level = 0;
 #define PMAP_INLINE __inline
 #endif  /* PMAP_DEBUG */
 
+#ifdef PV_STATS
+#define PV_STAT(x) do { x ; } while (0)
+#else
+#define PV_STAT(x) do { } while (0)
+#endif
+
 #ifdef ARM_L2_PIPT
 #define pmap_l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range((pa), 
(size))
 #define pmap_l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range((pa), 
(size))
@@ -206,8 +214,11 @@ extern struct pv_addr systempage;
 /*
  * Internal function prototypes
  */
-static void pmap_free_pv_entry (pv_entry_t);
-static pv_entry_t pmap_get_pv_entry(void);
+
+static voidpmap_free_pv_chunk(struct pv_chunk *pc);
+static voidpmap_free_pv_entry(pmap_t pmap, pv_entry_t pv);
+static pv_entry_t  pmap_get_pv_entry(pmap_t pmap, boolean_t try);
+static vm_page_t   pmap_pv_reclaim(pmap_t locked_pmap);
 
 static voidpmap_enter_locked(pmap_t, vm_offset_t, vm_page_t,
 vm_prot_t, boolean_t, int);
@@ -386,13 +397,73 @@ int   pmap_needs_pte_sync;
 
 #define pmap_is_current(pm)((pm) == pmap_kernel() || \
 curproc->p_vmspace->vm_map.pmap == (pm))
-static uma_zone_t pvzone = NULL;
+
+/*
+ * Data for the pv entry allocation mechanism
+ */
+static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
+static int pv_entry_count, pv_entry_max, pv_entry_high_water;
+static int shpgperproc = PMAP_SHPGPERPROC;
+
+struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
+int pv_maxchunks;  /* How many chunks we have KVA for */
+vm_offset_t pv_vafree; /* Freelist stored in the PTE */
+
+static __inline struct pv_chunk *
+pv_to_chunk(pv_entry_t pv)
+{
+
+   return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
+}
+
+#define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
+
+CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
+CTASSERT(_NPCM == 8);
+CTASSERT(_NPCPV == 252);
+
+#definePC_FREE0_6  0xul/* Free values for index 0 
through 6 */
+#definePC_FREE70x0ffful/* Free values for index 7 */
+
+static const uint32_t pc_freemask[_NPCM] = {
+   PC_FREE0_6, PC_FREE0_6, PC_FREE0_6,
+   PC_FREE0_6, PC_FREE0_6, PC_FREE0_6,
+   PC_FREE0_6, PC_FREE7
+};
+
+static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
+
+SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
+"Current number of pv entries");
+
+#ifdef PV_STATS
+static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
+
+SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLA

svn commit: r250695 - head/sys/arm/arm

2013-05-16 Thread Grzegorz Bernacki
Author: gber
Date: Thu May 16 09:43:04 2013
New Revision: 250695
URL: http://svnweb.freebsd.org/changeset/base/250695

Log:
  Fix L2 cache write-back invalidate for Sheeva core.
  
  Submitted by: Michal Dubiel
  Obtained from:Netasq, Semihalf

Modified:
  head/sys/arm/arm/cpufunc_asm_sheeva.S

Modified: head/sys/arm/arm/cpufunc_asm_sheeva.S
==
--- head/sys/arm/arm/cpufunc_asm_sheeva.S   Thu May 16 06:19:29 2013
(r250694)
+++ head/sys/arm/arm/cpufunc_asm_sheeva.S   Thu May 16 09:43:04 2013
(r250695)
@@ -377,9 +377,17 @@ ENTRY(sheeva_l2cache_wb_range)
 END(sheeva_l2cache_wb_range)
 
 ENTRY(sheeva_l2cache_wbinv_all)
+   /* Disable irqs */
+   mrs r1, cpsr
+   orr r2, r1, #I32_bit | F32_bit
+   msr cpsr_c, r2
+
mov r0, #0
mcr p15, 1, r0, c15, c9, 0  /* Clean L2 */
mcr p15, 1, r0, c15, c11, 0 /* Invalidate L2 */
+
+   msr cpsr_c, r1  /* Reenable irqs */
+
mcr p15, 0, r0, c7, c10, 4  /* drain the write buffer */
RET
 END(sheeva_l2cache_wbinv_all)
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svn commit: r250928 - in head/sys/arm: arm include

2013-05-23 Thread Grzegorz Bernacki
Author: gber
Date: Thu May 23 12:07:41 2013
New Revision: 250928
URL: http://svnweb.freebsd.org/changeset/base/250928

Log:
  Switch to AP[2:1] access permissions model. Store "referenced"
  bit in PTE.
  
  Enable Access Flag in CPU control. With AF enabled each valid mapping
  needs to have referenced bit in PTE set in order to be able to cache
  it in the TLB.
  
  AP[0] bit is to be used as reference flag.
  All access permissions are encoded by AP[2:1] wherein AP[1] is in fact
  "user enable" and AP[2](APX) is "write disable".
  
  All mappings are always set to be valid. Reference emulation is performed
  by setting/clearing reference flag in PTE.
  
  md.pvh_attrs are no longer necessary however pv_flags are still being used
  for now.
  
  Marking vm_page as "dirty" or "referenced" is being performed on:
  - page or flag fault servicing in pmap_fault_fixup(), basing on the fault
type
  - vm_fault servicing in pmap_enter() according to the desired protections
and faulty access type
  Redundant page marking has been removed as on ARM we know exactly when the
  particular page is referenced or is going to be written.
  
  Submitted by: Zbigniew Bodek 
  Sponsored by: The FreeBSD Foundation, Semihalf

Modified:
  head/sys/arm/arm/locore.S
  head/sys/arm/arm/pmap-v6.c
  head/sys/arm/arm/trap.c
  head/sys/arm/include/armreg.h
  head/sys/arm/include/pmap.h

Modified: head/sys/arm/arm/locore.S
==
--- head/sys/arm/arm/locore.S   Thu May 23 11:29:28 2013(r250927)
+++ head/sys/arm/arm/locore.S   Thu May 23 12:07:41 2013(r250928)
@@ -188,6 +188,7 @@ Lunmapped:
 #ifdef _ARM_ARCH_6
orr r0, r0, #(CPU_CONTROL_V6_EXTPAGE | CPU_CONTROL_UNAL_ENABLE)
orr r2, r2, #(CPU_CONTROL_AFLT_ENABLE)
+   orr r0, r0, #(CPU_CONTROL_AF_ENABLE)
 #endif
orr r0, r0, #(CPU_CONTROL_MMU_ENABLE)
mcr p15, 0, r0, c1, c0, 0

Modified: head/sys/arm/arm/pmap-v6.c
==
--- head/sys/arm/arm/pmap-v6.c  Thu May 23 11:29:28 2013(r250927)
+++ head/sys/arm/arm/pmap-v6.c  Thu May 23 12:07:41 2013(r250928)
@@ -220,8 +220,8 @@ static void pmap_free_pv_entry(pmap_t p
 static pv_entry_t  pmap_get_pv_entry(pmap_t pmap, boolean_t try);
 static vm_page_t   pmap_pv_reclaim(pmap_t locked_pmap);
 
-static voidpmap_enter_locked(pmap_t, vm_offset_t, vm_page_t,
-vm_prot_t, boolean_t, int);
+static voidpmap_enter_locked(pmap_t, vm_offset_t, vm_prot_t,
+vm_page_t, vm_prot_t, boolean_t, int);
 static vm_paddr_t  pmap_extract_locked(pmap_t pmap, vm_offset_t va);
 static voidpmap_alloc_l1(pmap_t);
 static voidpmap_free_l1(pmap_t);
@@ -902,10 +902,6 @@ pmap_clearbit(struct vm_page *pg, u_int 
 
if (maskbits & PVF_WRITE)
maskbits |= PVF_MOD;
-   /*
-* Clear saved attributes (modify, reference)
-*/
-   pg->md.pvh_attrs &= ~(maskbits & (PVF_MOD | PVF_REF));
 
if (TAILQ_EMPTY(&pg->md.pv_list)) {
rw_wunlock(&pvh_global_lock);
@@ -935,14 +931,13 @@ pmap_clearbit(struct vm_page *pg, u_int 
npte |= L2_APX;
}
 
-   if (maskbits & PVF_REF) {
+   if ((maskbits & PVF_REF) && L2_S_REFERENCED(opte)) {
/*
-* Make the PTE invalid so that we will take a
-* page fault the next time the mapping is
-* referenced.
+* Clear referenced flag in PTE so that we
+* will take a flag fault the next time the mapping
+* is referenced.
 */
-   npte &= ~L2_TYPE_MASK;
-   npte |= L2_TYPE_INV;
+   npte &= ~L2_S_REF;
}
 
CTR4(KTR_PMAP,"clearbit: pmap:%p bits:%x pte:%x->%x",
@@ -998,7 +993,6 @@ pmap_enter_pv(struct vm_page *pg, struct
pve->pv_flags = flags;
 
TAILQ_INSERT_HEAD(&pg->md.pv_list, pve, pv_list);
-   pg->md.pvh_attrs |= flags & (PVF_REF | PVF_MOD);
if (pve->pv_flags & PVF_WIRED)
++pm->pm_stats.wired_count;
vm_page_aflag_set(pg, PGA_REFERENCED);
@@ -1036,6 +1030,12 @@ vector_page_setprot(int prot)
l2b = pmap_get_l2_bucket(pmap_kernel(), vector_page);
 
ptep = &l2b->l2b_kva[l2pte_index(vector_page)];
+   /*
+* Set referenced flag.
+* Vectors' page is always desired
+* to be allowed to reside in TLB. 
+*/
+   *ptep |= L2_S_REF;
 
pmap_set_prot(ptep, prot|VM_PROT_EXECUTE, 0);
 
@@ -1052,16 +1052,15 @@ pmap_set_prot(pt_entry_t *ptep, vm_prot_
if (!(prot & VM_PROT_EXECUTE))
*ptep |= L2_XN;
 
+   /* Set defaults first - kernel read a

svn commit: r250929 - in head/sys/arm: arm include

2013-05-23 Thread Grzegorz Bernacki
Author: gber
Date: Thu May 23 12:15:23 2013
New Revision: 250929
URL: http://svnweb.freebsd.org/changeset/base/250929

Log:
  Improve, optimize and clean-up ARMv6/v7 memory management related code.
  
  Use pmap_find_pv if needed instead of multiplying its code throughout
  pmap-v6.
  
  Avoid possible NULL pointer dereference in pmap_enter_locked()
  When trying to get m->md.pv_memattr, make sure that m != NULL,
  in particular that vector_page is set to be NULL.
  
  Do not set PGA_REFERENCED flag in pmap_enter_pv().
  On ARM any new page reference will result in either entering the new
  mapping by calling pmap_enter, etc. or fixing-up the existing mapping in
  pmap_fault_fixup().
  Therefore we set PGA_REFERENCED flag in the earlier mentioned cases and
  setting it later in pmap_enter_pv() is just waste of cycles.
  
  Delete unused pm_pdir pointer from the pmap structure.
  
  Rearrange brackets in the fault cause detection in trap.c
  Place the brackets correctly in order to see course of the conditions
  instantaneously.
  
  Unify naming in pmap-v6.c and improve style
  Use naming common for whole pmap and compatible with other pmaps,
  improve style where possible:
  pm   -> pmap
  pg   -> m
  opg  -> om
  *pt  -> *ptep
  *pte -> *ptep
  *pde -> *pdep
  
  Submitted by:   Zbigniew Bodek 
  Sponsored by:   The FreeBSD Foundation, Semihalf

Modified:
  head/sys/arm/arm/pmap-v6.c
  head/sys/arm/arm/pmap.c
  head/sys/arm/arm/trap.c
  head/sys/arm/include/pmap.h

Modified: head/sys/arm/arm/pmap-v6.c
==
--- head/sys/arm/arm/pmap-v6.c  Thu May 23 12:07:41 2013(r250928)
+++ head/sys/arm/arm/pmap-v6.c  Thu May 23 12:15:23 2013(r250929)
@@ -563,7 +563,7 @@ pmap_pte_init_mmu_v6(void)
  * This is called at pmap creation time.
  */
 static void
-pmap_alloc_l1(pmap_t pm)
+pmap_alloc_l1(pmap_t pmap)
 {
struct l1_ttable *l1;
u_int8_t domain;
@@ -594,8 +594,8 @@ pmap_alloc_l1(pmap_t pm)
/*
 * Fix up the relevant bits in the pmap structure
 */
-   pm->pm_l1 = l1;
-   pm->pm_domain = domain + 1;
+   pmap->pm_l1 = l1;
+   pmap->pm_domain = domain + 1;
 }
 
 /*
@@ -603,9 +603,9 @@ pmap_alloc_l1(pmap_t pm)
  * This is called at pmap destruction time.
  */
 static void
-pmap_free_l1(pmap_t pm)
+pmap_free_l1(pmap_t pmap)
 {
-   struct l1_ttable *l1 = pm->pm_l1;
+   struct l1_ttable *l1 = pmap->pm_l1;
 
mtx_lock(&l1_lru_lock);
 
@@ -618,8 +618,8 @@ pmap_free_l1(pmap_t pm)
/*
 * Free up the domain number which was allocated to the pmap
 */
-   l1->l1_domain_free[pm->pm_domain - 1] = l1->l1_domain_first;
-   l1->l1_domain_first = pm->pm_domain - 1;
+   l1->l1_domain_free[pmap->pm_domain - 1] = l1->l1_domain_first;
+   l1->l1_domain_first = pmap->pm_domain - 1;
l1->l1_domain_use_count--;
 
/*
@@ -641,7 +641,7 @@ pmap_free_l1(pmap_t pm)
  * and VA, or NULL if no L2 bucket exists for the address.
  */
 static PMAP_INLINE struct l2_bucket *
-pmap_get_l2_bucket(pmap_t pm, vm_offset_t va)
+pmap_get_l2_bucket(pmap_t pmap, vm_offset_t va)
 {
struct l2_dtable *l2;
struct l2_bucket *l2b;
@@ -649,7 +649,7 @@ pmap_get_l2_bucket(pmap_t pm, vm_offset_
 
l1idx = L1_IDX(va);
 
-   if ((l2 = pm->pm_l2[L2_IDX(l1idx)]) == NULL ||
+   if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL ||
(l2b = &l2->l2_bucket[L2_BUCKET(l1idx)])->l2b_kva == NULL)
return (NULL);
 
@@ -669,7 +669,7 @@ pmap_get_l2_bucket(pmap_t pm, vm_offset_
  * the bucket/page in the meantime.
  */
 static struct l2_bucket *
-pmap_alloc_l2_bucket(pmap_t pm, vm_offset_t va)
+pmap_alloc_l2_bucket(pmap_t pmap, vm_offset_t va)
 {
struct l2_dtable *l2;
struct l2_bucket *l2b;
@@ -677,36 +677,36 @@ pmap_alloc_l2_bucket(pmap_t pm, vm_offse
 
l1idx = L1_IDX(va);
 
-   PMAP_ASSERT_LOCKED(pm);
+   PMAP_ASSERT_LOCKED(pmap);
rw_assert(&pvh_global_lock, RA_WLOCKED);
-   if ((l2 = pm->pm_l2[L2_IDX(l1idx)]) == NULL) {
+   if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
/*
 * No mapping at this address, as there is
 * no entry in the L1 table.
 * Need to allocate a new l2_dtable.
 */
-   PMAP_UNLOCK(pm);
+   PMAP_UNLOCK(pmap);
rw_wunlock(&pvh_global_lock);
if ((l2 = uma_zalloc(l2table_zone, M_NOWAIT)) == NULL) {
rw_wlock(&pvh_global_lock);
-   PMAP_LOCK(pm);
+   PMAP_LOCK(pmap);
return (NULL);
}
rw_wlock(&pvh_global_lock);
-   PMAP_LOCK(pm);
-   if (pm->pm_l2[L2_IDX(l1idx)] != NULL) {
+   PMAP_LOCK(pmap);
+   if (pmap->pm_l2[L2_IDX(l1idx)] != NULL) {
/*
  

svn commit: r250930 - in head/sys/arm: arm include

2013-05-23 Thread Grzegorz Bernacki
Author: gber
Date: Thu May 23 12:23:18 2013
New Revision: 250930
URL: http://svnweb.freebsd.org/changeset/base/250930

Log:
  Stop using PVF_MOD, PVF_REF & PVF_EXEC flags in pv_entry, use PTE.
  
  Using PVF_MOD, PVF_REF and PVF_EXEC is redundant as we can get the proper
  info from PTE bits.
  When the mapping is marked as executable and has been referenced we assume
  that it has been executed. Similarly, when the mapping is set to be writable
  and is referenced, it must have been due to write access to it.
  PVF_MOD and PVF_REF flags are kept just for pmap_clearbit() usage,
  to pass the information on which bit should be cleared.
  
  Submitted by:   Zbigniew Bodek 
  Sponsored by:   The FreeBSD Foundation, Semihalf

Modified:
  head/sys/arm/arm/pmap-v6.c
  head/sys/arm/include/pmap.h

Modified: head/sys/arm/arm/pmap-v6.c
==
--- head/sys/arm/arm/pmap-v6.c  Thu May 23 12:15:23 2013(r250929)
+++ head/sys/arm/arm/pmap-v6.c  Thu May 23 12:23:18 2013(r250930)
@@ -383,13 +383,13 @@ int   pmap_needs_pte_sync;
  * Macro to determine if a mapping might be resident in the
  * instruction cache and/or TLB
  */
-#definePV_BEEN_EXECD(f)  (((f) & (PVF_REF | PVF_EXEC)) == (PVF_REF | 
PVF_EXEC))
+#definePTE_BEEN_EXECD(pte)  (L2_S_EXECUTABLE(pte) && 
L2_S_REFERENCED(pte))
 
 /*
  * Macro to determine if a mapping might be resident in the
  * data cache and/or TLB
  */
-#definePV_BEEN_REFD(f)   (((f) & PVF_REF) != 0)
+#definePTE_BEEN_REFD(pte)   (L2_S_REFERENCED(pte))
 
 #ifndef PMAP_SHPGPERPROC
 #define PMAP_SHPGPERPROC 200
@@ -947,9 +947,9 @@ pmap_clearbit(struct vm_page *m, u_int m
*ptep = npte;
PTE_SYNC(ptep);
/* Flush the TLB entry if a current pmap. */
-   if (PV_BEEN_EXECD(oflags))
+   if (PTE_BEEN_EXECD(opte))
cpu_tlb_flushID_SE(pv->pv_va);
-   else if (PV_BEEN_REFD(oflags))
+   else if (PTE_BEEN_REFD(opte))
cpu_tlb_flushD_SE(pv->pv_va);
}
 
@@ -1358,7 +1358,6 @@ pmap_fault_fixup(pmap_t pmap, vm_offset_
}
 
vm_page_dirty(m);
-   pv->pv_flags |= PVF_REF | PVF_MOD;
 
/* Re-enable write permissions for the page */
pmap_set_prot(ptep, VM_PROT_WRITE, *ptep & L2_S_PROT_U);
@@ -1382,7 +1381,6 @@ pmap_fault_fixup(pmap_t pmap, vm_offset_
goto out;
 
vm_page_aflag_set(m, PGA_REFERENCED);
-   pv->pv_flags |= PVF_REF;
 
/* Mark the page "referenced" */
*ptep = pte | L2_S_REF;
@@ -2436,7 +2434,7 @@ pmap_remove_all(vm_page_t m)
struct l2_bucket *l2b;
boolean_t flush = FALSE;
pmap_t curpmap;
-   int flags = 0;
+   u_int is_exec = 0;
 
KASSERT((m->flags & PG_FICTITIOUS) == 0,
("pmap_remove_all: page %p is fictitious", m));
@@ -2455,19 +2453,19 @@ pmap_remove_all(vm_page_t m)
l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
KASSERT(l2b != NULL, ("No l2 bucket"));
ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
+   is_exec |= PTE_BEEN_EXECD(*ptep);
*ptep = 0;
if (pmap_is_current(pmap))
PTE_SYNC(ptep);
pmap_free_l2_bucket(pmap, l2b, 1);
pmap->pm_stats.resident_count--;
-   flags |= pv->pv_flags;
pmap_nuke_pv(m, pmap, pv);
pmap_free_pv_entry(pmap, pv);
PMAP_UNLOCK(pmap);
}
 
if (flush) {
-   if (PV_BEEN_EXECD(flags))
+   if (is_exec)
cpu_tlb_flushID();
else
cpu_tlb_flushD();
@@ -2545,7 +2543,7 @@ pmap_protect(pmap_t pmap, vm_offset_t sv
struct l2_bucket *l2b;
pt_entry_t *ptep, pte;
vm_offset_t next_bucket;
-   u_int flags;
+   u_int is_exec, is_refd;
int flush;
 
if ((prot & VM_PROT_READ) == 0) {
@@ -2570,7 +2568,7 @@ pmap_protect(pmap_t pmap, vm_offset_t sv
 */
 
flush = ((eva - sva) >= (PAGE_SIZE * 4)) ? 0 : -1;
-   flags = 0;
+   is_exec = is_refd = 0;
 
while (sva < eva) {
next_bucket = L2_NEXT_BUCKET(sva);
@@ -2588,25 +2586,24 @@ pmap_protect(pmap_t pmap, vm_offset_t sv
while (sva < next_bucket) {
if ((pte = *ptep) != 0 && L2_S_WRITABLE(pte)) {
struct vm_page *m;
-   u_int f;
 
m = PHYS_TO_VM_PAGE(l2pte_pa(pte));
pmap_set_prot(ptep, prot,
!(pmap == pmap_kernel()));
   

svn commit: r250931 - head/sys/arm/arm

2013-05-23 Thread Grzegorz Bernacki
Author: gber
Date: Thu May 23 12:24:46 2013
New Revision: 250931
URL: http://svnweb.freebsd.org/changeset/base/250931

Log:
  Rework and organize pmap_enter_locked() function.
  
  pmap_enter_locked() implementation was very ambiguous and confusing.
  Rearrange it so that each part of the mapping creation is separated.
  Avoid walking through the redundant conditions.
  Extract vector_page specific PTE setup from normal PTE setting.
  
  Submitted by:   Zbigniew Bodek 
  Sponsored by:   The FreeBSD Foundation, Semihalf

Modified:
  head/sys/arm/arm/pmap-v6.c

Modified: head/sys/arm/arm/pmap-v6.c
==
--- head/sys/arm/arm/pmap-v6.c  Thu May 23 12:23:18 2013(r250930)
+++ head/sys/arm/arm/pmap-v6.c  Thu May 23 12:24:46 2013(r250931)
@@ -2723,38 +2723,54 @@ do_l2b_alloc:
is_exec = is_refd = 0;
 
if (opte) {
-   /*
-* There is already a mapping at this address.
-* If the physical address is different, lookup the
-* vm_page.
-*/
-   if (l2pte_pa(opte) != pa)
-   om = PHYS_TO_VM_PAGE(l2pte_pa(opte));
-   else
-   om = m;
-   } else
-   om = NULL;
-
-   if ((prot & (VM_PROT_ALL)) || !m) {
-   /*
-* - The access type indicates that we don't need
-*   to do referenced emulation.
-* OR
-* - The physical page has already been referenced
-*   so no need to re-do referenced emulation here.
-*/
-   npte |= L2_S_REF;
+   if (l2pte_pa(opte) == pa) {
+   /*
+* We're changing the attrs of an existing mapping.
+*/
+   if (m != NULL)
+   pmap_modify_pv(m, pmap, va,
+   PVF_WRITE | PVF_WIRED, nflags);
+   is_exec |= PTE_BEEN_EXECD(opte);
+   is_refd |= PTE_BEEN_REFD(opte);
+   goto validate;
+   }
+   if ((om = PHYS_TO_VM_PAGE(l2pte_pa(opte {
+   /*
+* Replacing an existing mapping with a new one.
+* It is part of our managed memory so we
+* must remove it from the PV list
+*/
+   if ((pve = pmap_remove_pv(om, pmap, va))) {
+   is_exec |= PTE_BEEN_EXECD(opte);
+   is_refd |= PTE_BEEN_REFD(opte);
+   
+   if (m && ((m->oflags & VPO_UNMANAGED)))
+   pmap_free_pv_entry(pmap, pve);
+   }
+   }
 
-   if (m != NULL &&
-   (m->oflags & VPO_UNMANAGED) == 0)
-   vm_page_aflag_set(m, PGA_REFERENCED);
} else {
/*
-* Need to do page referenced emulation.
+* Keep the stats up to date
 */
-   npte &= ~L2_S_REF;
+   l2b->l2b_occupancy++;
+   pmap->pm_stats.resident_count++;
}
 
+   /*
+* Enter on the PV list if part of our managed memory.
+*/
+   if ((m && !(m->oflags & VPO_UNMANAGED))) {
+   if ((!pve) && (pve = pmap_get_pv_entry(pmap, FALSE)) == NULL)
+   panic("pmap_enter: no pv entries");
+
+   KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
+   ("pmap_enter: managed mapping within the clean submap"));
+   KASSERT(pve != NULL, ("No pv"));
+   pmap_enter_pv(m, pve, pmap, va, nflags);
+   }
+
+validate:
/* Make the new PTE valid */
npte |= L2_S_PROTO;
 #ifdef SMP
@@ -2763,78 +2779,48 @@ do_l2b_alloc:
/* Set defaults first - kernel read access */
npte |= L2_APX;
npte |= L2_S_PROT_R;
+   /* Set "referenced" flag */
+   npte |= L2_S_REF;
 
/* Now tune APs as desired */
if (user)
npte |= L2_S_PROT_U;
-
-   if (prot & VM_PROT_WRITE) {
-   npte &= ~(L2_APX);
-
-   if (m != NULL && (m->oflags & VPO_UNMANAGED) == 0) {
-   vm_page_aflag_set(m, PGA_WRITEABLE);
+   /*
+* If this is not a vector_page
+* then continue setting mapping parameters
+*/
+   if (m != NULL) {
+   if (prot & (VM_PROT_ALL)) {
+   if ((m->oflags & VPO_UNMANAGED) == 0)
+   vm_page_aflag_set(m, PGA_REFERENCED);
+   } else {
/*
-* The access type and permissions indicate 
-* that the page will be wr

svn commit: r251022 - head/sys/dev/nand

2013-05-26 Thread Grzegorz Bernacki
Author: gber
Date: Mon May 27 06:24:31 2013
New Revision: 251022
URL: http://svnweb.freebsd.org/changeset/base/251022

Log:
  Fix ONFI chip detection.
  
  Submitted by: Alexander Fedorov 

Modified:
  head/sys/dev/nand/nand.h
  head/sys/dev/nand/nandbus.c

Modified: head/sys/dev/nand/nand.h
==
--- head/sys/dev/nand/nand.hMon May 27 03:09:26 2013(r251021)
+++ head/sys/dev/nand/nand.hMon May 27 06:24:31 2013(r251022)
@@ -219,7 +219,7 @@ struct onfi_params {
uint16_tvendor_rev;
uint8_t vendor_spec[8];
uint16_tcrc;
-};
+}__attribute__((packed));
 
 struct nand_ecc_data {
int eccsize;/* Number of data bytes per ECC step */

Modified: head/sys/dev/nand/nandbus.c
==
--- head/sys/dev/nand/nandbus.c Mon May 27 03:09:26 2013(r251021)
+++ head/sys/dev/nand/nandbus.c Mon May 27 06:24:31 2013(r251022)
@@ -331,7 +331,7 @@ static int
 nand_probe_onfi(device_t bus, uint8_t *onfi_compliant)
 {
device_t nfc;
-   char onfi_id[] = {'o', 'n', 'f', 'i', '\0'};
+   char onfi_id[] = {'O', 'N', 'F', 'I', '\0'};
int i;
 
nand_debug(NDBG_BUS,"probing ONFI");
___
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svn commit: r251370 - head/sys/arm/arm

2013-06-04 Thread Grzegorz Bernacki
Author: gber
Date: Tue Jun  4 09:21:18 2013
New Revision: 251370
URL: http://svnweb.freebsd.org/changeset/base/251370

Log:
  Implement pmap_copy() for ARMv6/v7.
  
  Copy the given range of mappings from the source map to the
  destination map, thereby reducing the number of VM faults on fork.
  
  Submitted by:   Zbigniew Bodek 
  Sponsored by:   The FreeBSD Foundation, Semihalf

Modified:
  head/sys/arm/arm/pmap-v6.c

Modified: head/sys/arm/arm/pmap-v6.c
==
--- head/sys/arm/arm/pmap-v6.c  Tue Jun  4 07:37:06 2013(r251369)
+++ head/sys/arm/arm/pmap-v6.c  Tue Jun  4 09:21:18 2013(r251370)
@@ -2966,6 +2966,126 @@ void
 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
 vm_size_t len, vm_offset_t src_addr)
 {
+   struct l2_bucket *l2b_src, *l2b_dst;
+   struct pv_entry *pve;
+   vm_offset_t addr;
+   vm_offset_t end_addr;
+   vm_offset_t next_bucket;
+   u_int flags;
+   boolean_t l2b_alloc;
+
+   CTR4(KTR_PMAP, "%s: VA = 0x%08x, len = 0x%08x. Will %s\n", __func__,
+   src_addr, len, (dst_addr != src_addr) ? "exit" : "copy");
+
+   if (dst_addr != src_addr)
+   return;
+
+   rw_wlock(&pvh_global_lock);
+   if (dst_pmap < src_pmap) {
+   PMAP_LOCK(dst_pmap);
+   PMAP_LOCK(src_pmap);
+   } else {
+   PMAP_LOCK(src_pmap);
+   PMAP_LOCK(dst_pmap);
+   }
+
+   end_addr = src_addr + len;
+   addr = src_addr;
+   /*
+* Iterate through all used l2_buckets in a given range.
+*/
+   while (addr < end_addr) {
+   pt_entry_t *src_ptep, *dst_ptep;
+   pt_entry_t src_pte;
+
+   next_bucket = L2_NEXT_BUCKET(addr);
+   /*
+* If the next bucket VA is out of the
+* copy range then set it to end_addr in order
+* to copy all mappings until the given limit.
+*/ 
+   if (next_bucket > end_addr)
+   next_bucket = end_addr;
+
+   l2b_src = pmap_get_l2_bucket(src_pmap, addr);
+   if (l2b_src == NULL) {
+   addr = next_bucket;
+   continue;
+   }
+   src_ptep = &l2b_src->l2b_kva[l2pte_index(addr)];
+
+   while (addr < next_bucket) {
+   vm_page_t srcmpte;
+
+   src_pte = *src_ptep;
+   srcmpte = PHYS_TO_VM_PAGE(l2pte_pa(src_pte));
+   /*
+* We only virtual copy managed pages
+*/
+   if (srcmpte && (srcmpte->oflags & VPO_UNMANAGED) == 0) {
+   l2b_alloc = FALSE;
+   l2b_dst = pmap_get_l2_bucket(dst_pmap, addr);
+   /*
+* Check if the allocation of another
+* l2_bucket is necessary.
+*/
+   if (l2b_dst == NULL) {
+   l2b_dst = pmap_alloc_l2_bucket(dst_pmap,
+   addr);
+   l2b_alloc = TRUE;
+   }
+   if (l2b_dst == NULL)
+   goto out;
+
+   dst_ptep = &l2b_dst->l2b_kva[l2pte_index(addr)];
+
+   if (*dst_ptep == 0 &&
+   (pve = pmap_get_pv_entry(dst_pmap, TRUE))) {
+   /*
+* Check whether the source mapping is
+* writable and set the proper flag
+* for a copied mapping so that right
+* permissions could be set on the
+* access fault.
+*/
+   flags = 0;
+   if ((src_pte & L2_APX) == 0)
+   flags = PVF_WRITE;
+   pmap_enter_pv(srcmpte, pve, dst_pmap,
+   addr, flags);
+   /*
+* Clear the modified and
+* accessed (referenced) flags
+* and don't set the wired flag
+* during the copy.
+*/
+   *dst_ptep = src_pte;
+   *dst_ptep &= ~L2_S_REF;
+ 

svn commit: r251371 - head/sys/arm/mv

2013-06-04 Thread Grzegorz Bernacki
Author: gber
Date: Tue Jun  4 09:33:03 2013
New Revision: 251371
URL: http://svnweb.freebsd.org/changeset/base/251371

Log:
  Fix the passing of time on Armada XP.
  
  In order to become independent of Coherency Fabric frequency, configure
  Timer and Watchdog to operate in 25MHz mode.
  
  Submitted by: Zbigniew Bodek 

Modified:
  head/sys/arm/mv/mvreg.h
  head/sys/arm/mv/timer.c

Modified: head/sys/arm/mv/mvreg.h
==
--- head/sys/arm/mv/mvreg.h Tue Jun  4 09:21:18 2013(r251370)
+++ head/sys/arm/mv/mvreg.h Tue Jun  4 09:33:03 2013(r251371)
@@ -215,6 +215,10 @@
 #define CPU_TIMER1_AUTO0x0008
 #define CPU_TIMER_WD_EN0x0010
 #define CPU_TIMER_WD_AUTO  0x0020
+/* 25MHz mode is Armada XP - specific */
+#define CPU_TIMER_WD_25MHZ_EN  0x0400
+#define CPU_TIMER0_25MHZ_EN0x0800
+#define CPU_TIMER1_25MHZ_EN0x1000
 #define CPU_TIMER0_REL 0x10
 #define CPU_TIMER0 0x14
 

Modified: head/sys/arm/mv/timer.c
==
--- head/sys/arm/mv/timer.c Tue Jun  4 09:21:18 2013(r251370)
+++ head/sys/arm/mv/timer.c Tue Jun  4 09:33:03 2013(r251371)
@@ -56,7 +56,7 @@ __FBSDID("$FreeBSD$");
 #define MAX_WATCHDOG_TICKS (0x)
 
 #if defined(SOC_MV_ARMADAXP)
-#define MV_CLOCK_SRC   get_l2clk()
+#define MV_CLOCK_SRC   2500/* Timers' 25MHz mode */
 #else
 #define MV_CLOCK_SRC   get_tclk()
 #endif
@@ -323,6 +323,9 @@ mv_watchdog_enable(void)
 
val = mv_get_timer_control();
val |= CPU_TIMER_WD_EN | CPU_TIMER_WD_AUTO;
+#if defined(SOC_MV_ARMADAXP)
+   val |= CPU_TIMER_WD_25MHZ_EN;
+#endif
mv_set_timer_control(val);
 }
 
@@ -440,6 +443,10 @@ mv_setup_timers(void)
val = mv_get_timer_control();
val &= ~(CPU_TIMER0_EN | CPU_TIMER0_AUTO);
val |= CPU_TIMER1_EN | CPU_TIMER1_AUTO;
+#if defined(SOC_MV_ARMADAXP)
+   /* Enable 25MHz mode */
+   val |= CPU_TIMER0_25MHZ_EN | CPU_TIMER1_25MHZ_EN;
+#endif
mv_set_timer_control(val);
timers_initialized = 1;
 }
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svn commit: r258387 - head/sys/dev/nand

2013-11-20 Thread Grzegorz Bernacki
Author: gber
Date: Wed Nov 20 11:10:23 2013
New Revision: 258387
URL: http://svnweb.freebsd.org/changeset/base/258387

Log:
  Split raw reading/programming into smaller chunks to avoid allocating too
  big chunk of kernel memory. Validate size of data. Add error handling to
  avoid calling copyout() when data has not been read correctly.
  
  Reviewed by:zbb
  Reported by:x90c 
  MFC after:  2 days

Modified:
  head/sys/dev/nand/nand_cdev.c
  head/sys/dev/nand/nand_geom.c

Modified: head/sys/dev/nand/nand_cdev.c
==
--- head/sys/dev/nand/nand_cdev.c   Wed Nov 20 11:09:12 2013
(r258386)
+++ head/sys/dev/nand/nand_cdev.c   Wed Nov 20 11:10:23 2013
(r258387)
@@ -294,19 +294,39 @@ nand_ioctl(struct cdev *dev, u_long cmd,
 struct thread *td)
 {
struct nand_chip *chip;
+   struct chip_geom  *cg;
struct nand_oob_rw *oob_rw = NULL;
struct nand_raw_rw *raw_rw = NULL;
device_t nandbus;
+   size_t bufsize, len, raw_size;
+   off_t off;
uint8_t *buf = NULL;
int ret = 0;
uint8_t status;
 
chip = (struct nand_chip *)dev->si_drv1;
+   cg = &chip->chip_geom;
nandbus = device_get_parent(chip->dev);
 
if ((cmd == NAND_IO_RAW_READ) || (cmd == NAND_IO_RAW_PROG)) {
raw_rw = (struct nand_raw_rw *)data;
-   buf = malloc(raw_rw->len, M_NAND, M_WAITOK);
+   raw_size =  cg->pgs_per_blk * (cg->page_size + cg->oob_size);
+
+   /* Check if len is not bigger than chip size */
+   if (raw_rw->len > raw_size)
+   return (EFBIG);
+
+   /*
+* Do not ask for too much memory, in case of large transfers
+* read/write in 16-pages chunks
+*/
+   bufsize = 16 * (cg->page_size + cg->oob_size);
+   if (raw_rw->len < bufsize)
+   bufsize = raw_rw->len;
+
+   buf = malloc(bufsize, M_NAND, M_WAITOK);
+   len = raw_rw->len;
+   off = 0;
}
switch(cmd) {
case NAND_IO_ERASE:
@@ -335,19 +355,37 @@ nand_ioctl(struct cdev *dev, u_long cmd,
break;
 
case NAND_IO_RAW_PROG:
-   ret = copyin(raw_rw->data, buf, raw_rw->len);
-   if (ret)
-   break;
-   ret = nand_prog_pages_raw(chip, raw_rw->off, buf,
-   raw_rw->len);
+   while (len > 0) {
+   if (len < bufsize)
+   bufsize = len;
+   ret = copyin(raw_rw->data + off, buf, bufsize);
+   if (ret)
+   break;
+   ret = nand_prog_pages_raw(chip, raw_rw->off + off, buf,
+   bufsize);
+   if (ret)
+   break;
+   len -= bufsize;
+   off += bufsize;
+   }
break;
 
case NAND_IO_RAW_READ:
-   ret = nand_read_pages_raw(chip, raw_rw->off, buf,
-   raw_rw->len);
-   if (ret)
-   break;
-   ret = copyout(buf, raw_rw->data, raw_rw->len);
+   while (len > 0) {
+   if (len < bufsize)
+   bufsize = len;
+
+   ret = nand_read_pages_raw(chip, raw_rw->off + off, buf,
+   bufsize);
+   if (ret)
+   break;
+
+   ret = copyout(buf, raw_rw->data + off, bufsize);
+   if (ret)
+   break;
+   len -= bufsize;
+   off += bufsize;
+   }
break;
 
case NAND_IO_PAGE_STAT:

Modified: head/sys/dev/nand/nand_geom.c
==
--- head/sys/dev/nand/nand_geom.c   Wed Nov 20 11:09:12 2013
(r258386)
+++ head/sys/dev/nand/nand_geom.c   Wed Nov 20 11:10:23 2013
(r258387)
@@ -193,20 +193,41 @@ nand_ioctl(struct disk *ndisk, u_long cm
 struct thread *td)
 {
struct nand_chip *chip;
+   struct chip_geom  *cg;
struct nand_oob_rw *oob_rw = NULL;
struct nand_raw_rw *raw_rw = NULL;
device_t nandbus;
+   size_t bufsize, len, raw_size;
+   off_t off;
uint8_t *buf = NULL;
int ret = 0;
uint8_t status;
 
chip = (struct nand_chip *)ndisk->d_drv1;
+   cg = &chip->chip_geom;
nandbus = device_get_parent(chip->dev);
 
if ((cmd == NAND_IO_RAW_READ) || (cmd == NAND_IO_RAW_PROG)) {
raw_rw = (struct nand_raw_rw *)data;
-   buf = malloc(raw_rw->len, M_NAND, M_WAITOK

svn commit: r258425 - head/sys/dev/nand

2013-11-21 Thread Grzegorz Bernacki
Author: gber
Date: Thu Nov 21 09:19:14 2013
New Revision: 258425
URL: http://svnweb.freebsd.org/changeset/base/258425

Log:
  Unbreak compilation with GCC.

Modified:
  head/sys/dev/nand/nand_cdev.c
  head/sys/dev/nand/nand_geom.c

Modified: head/sys/dev/nand/nand_cdev.c
==
--- head/sys/dev/nand/nand_cdev.c   Thu Nov 21 06:54:28 2013
(r258424)
+++ head/sys/dev/nand/nand_cdev.c   Thu Nov 21 09:19:14 2013
(r258425)
@@ -298,7 +298,8 @@ nand_ioctl(struct cdev *dev, u_long cmd,
struct nand_oob_rw *oob_rw = NULL;
struct nand_raw_rw *raw_rw = NULL;
device_t nandbus;
-   size_t bufsize, len, raw_size;
+   size_t bufsize = 0, len = 0;
+   size_t raw_size;
off_t off;
uint8_t *buf = NULL;
int ret = 0;

Modified: head/sys/dev/nand/nand_geom.c
==
--- head/sys/dev/nand/nand_geom.c   Thu Nov 21 06:54:28 2013
(r258424)
+++ head/sys/dev/nand/nand_geom.c   Thu Nov 21 09:19:14 2013
(r258425)
@@ -197,7 +197,8 @@ nand_ioctl(struct disk *ndisk, u_long cm
struct nand_oob_rw *oob_rw = NULL;
struct nand_raw_rw *raw_rw = NULL;
device_t nandbus;
-   size_t bufsize, len, raw_size;
+   size_t bufsize = 0, len = 0;
+   size_t raw_size;
off_t off;
uint8_t *buf = NULL;
int ret = 0;
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Re: svn commit: r258387 - head/sys/dev/nand

2013-11-21 Thread Grzegorz Bernacki
Hi,

Thanks for information. Fix has been committed.

regards,
grzesiek


2013/11/20 John-Mark Gurney 

> Grzegorz Bernacki wrote this message on Wed, Nov 20, 2013 at 11:10 +:
> > Author: gber
> > Date: Wed Nov 20 11:10:23 2013
> > New Revision: 258387
> > URL: http://svnweb.freebsd.org/changeset/base/258387
> >
> > Log:
> >   Split raw reading/programming into smaller chunks to avoid allocating
> too
> >   big chunk of kernel memory. Validate size of data. Add error handling
> to
> >   avoid calling copyout() when data has not been read correctly.
> >
> >   Reviewed by:zbb
> >   Reported by:x90c 
> >   MFC after:  2 days
> >
> > Modified:
> >   head/sys/dev/nand/nand_cdev.c
> >   head/sys/dev/nand/nand_geom.c
>
> Looks like this change errors w/ gcc:
>
> http://tinderbox.freebsd.org/tinderbox-head-noclang-build-HEAD-armv6-arm.brief
>
> --
>   John-Mark Gurney  Voice: +1 415 225 5579
>
>  "All that I will do, has been done, All that I have, has not."
>
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svn commit: r235469 - head/sys/kern

2012-05-15 Thread Grzegorz Bernacki
Author: gber
Date: Tue May 15 09:55:15 2012
New Revision: 235469
URL: http://svn.freebsd.org/changeset/base/235469

Log:
  Do not call bremfree for managed buffers.
  
  Calling bremfree for these buffers results in panic:
  "bremfree: buffer %p not on a queue."
  
  Approved by: kib

Modified:
  head/sys/kern/vfs_bio.c

Modified: head/sys/kern/vfs_bio.c
==
--- head/sys/kern/vfs_bio.c Tue May 15 09:37:22 2012(r235468)
+++ head/sys/kern/vfs_bio.c Tue May 15 09:55:15 2012(r235469)
@@ -2640,8 +2640,8 @@ loop:
if (bp != NULL) {
int lockflags;
/*
-* Buffer is in-core.  If the buffer is not busy, it must
-* be on a queue.
+* Buffer is in-core.  If the buffer is not busy nor managed,
+* it must be on a queue.
 */
lockflags = LK_EXCLUSIVE | LK_SLEEPFAIL | LK_INTERLOCK;
 
@@ -2671,9 +2671,13 @@ loop:
bp->b_flags &= ~B_CACHE;
else if ((bp->b_flags & (B_VMIO | B_INVAL)) == 0)
bp->b_flags |= B_CACHE;
-   BO_LOCK(bo);
-   bremfree(bp);
-   BO_UNLOCK(bo);
+   if (bp->b_flags & B_MANAGED)
+   MPASS(bp->b_qindex == QUEUE_NONE);
+   else {
+   BO_LOCK(bo);
+   bremfree(bp);
+   BO_UNLOCK(bo);
+   }
 
/*
 * check for size inconsistancies for non-VMIO case.
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svn commit: r235537 - in head: etc/mtree include lib lib/libnandfs lib/libstand sbin sbin/nandfs sbin/newfs_nandfs share/man/man4 share/man/man5 share/mk sys/boot/arm/uboot sys/boot/i386/loader sys...

2012-05-17 Thread Grzegorz Bernacki
Author: gber
Date: Thu May 17 10:11:18 2012
New Revision: 235537
URL: http://svn.freebsd.org/changeset/base/235537

Log:
  Import work done under project/nand (@235533) into head.
  
  The NAND Flash environment consists of several distinct components:
- NAND framework (drivers harness for NAND controllers and NAND chips)
- NAND simulator (NANDsim)
- NAND file system (NAND FS)
- Companion tools and utilities
- Documentation (manual pages)
  
  This work is still experimental. Please use with caution.
  
  Obtained from: Semihalf
  Supported by:  FreeBSD Foundation, Juniper Networks

Added:
  head/lib/libnandfs/
  head/lib/libnandfs/Makefile   (contents, props changed)
  head/lib/libnandfs/libnandfs.h   (contents, props changed)
  head/lib/libnandfs/nandfs.c   (contents, props changed)
  head/lib/libstand/nandfs.c   (contents, props changed)
  head/sbin/nandfs/
  head/sbin/nandfs/Makefile   (contents, props changed)
  head/sbin/nandfs/lssnap.c   (contents, props changed)
  head/sbin/nandfs/mksnap.c   (contents, props changed)
  head/sbin/nandfs/nandfs.8   (contents, props changed)
  head/sbin/nandfs/nandfs.c   (contents, props changed)
  head/sbin/nandfs/nandfs.h   (contents, props changed)
  head/sbin/nandfs/rmsnap.c   (contents, props changed)
  head/sbin/newfs_nandfs/
  head/sbin/newfs_nandfs/Makefile   (contents, props changed)
  head/sbin/newfs_nandfs/newfs_nandfs.8   (contents, props changed)
  head/sbin/newfs_nandfs/newfs_nandfs.c   (contents, props changed)
  head/share/man/man4/nand.4   (contents, props changed)
  head/share/man/man4/nandsim.4   (contents, props changed)
  head/share/man/man5/nandfs.5   (contents, props changed)
  head/sys/dev/nand/
  head/sys/dev/nand/nand.c   (contents, props changed)
  head/sys/dev/nand/nand.h   (contents, props changed)
  head/sys/dev/nand/nand_bbt.c   (contents, props changed)
  head/sys/dev/nand/nand_cdev.c   (contents, props changed)
  head/sys/dev/nand/nand_dev.h   (contents, props changed)
  head/sys/dev/nand/nand_ecc_pos.h   (contents, props changed)
  head/sys/dev/nand/nand_generic.c   (contents, props changed)
  head/sys/dev/nand/nand_geom.c   (contents, props changed)
  head/sys/dev/nand/nand_id.c   (contents, props changed)
  head/sys/dev/nand/nand_if.m   (contents, props changed)
  head/sys/dev/nand/nandbus.c   (contents, props changed)
  head/sys/dev/nand/nandbus.h   (contents, props changed)
  head/sys/dev/nand/nandbus_if.m   (contents, props changed)
  head/sys/dev/nand/nandsim.c   (contents, props changed)
  head/sys/dev/nand/nandsim.h   (contents, props changed)
  head/sys/dev/nand/nandsim_chip.c   (contents, props changed)
  head/sys/dev/nand/nandsim_chip.h   (contents, props changed)
  head/sys/dev/nand/nandsim_ctrl.c   (contents, props changed)
  head/sys/dev/nand/nandsim_log.c   (contents, props changed)
  head/sys/dev/nand/nandsim_log.h   (contents, props changed)
  head/sys/dev/nand/nandsim_swap.c   (contents, props changed)
  head/sys/dev/nand/nandsim_swap.h   (contents, props changed)
  head/sys/dev/nand/nfc_if.m   (contents, props changed)
  head/sys/dev/nand/nfc_mv.c   (contents, props changed)
  head/sys/fs/nandfs/
  head/sys/fs/nandfs/bmap.c   (contents, props changed)
  head/sys/fs/nandfs/bmap.h   (contents, props changed)
  head/sys/fs/nandfs/nandfs.h   (contents, props changed)
  head/sys/fs/nandfs/nandfs_alloc.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_bmap.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_buffer.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_cleaner.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_cpfile.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_dat.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_dir.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_fs.h   (contents, props changed)
  head/sys/fs/nandfs/nandfs_ifile.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_mount.h   (contents, props changed)
  head/sys/fs/nandfs/nandfs_segment.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_subr.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_subr.h   (contents, props changed)
  head/sys/fs/nandfs/nandfs_sufile.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_vfsops.c   (contents, props changed)
  head/sys/fs/nandfs/nandfs_vnops.c   (contents, props changed)
  head/sys/modules/nandfs/
  head/sys/modules/nandfs/Makefile   (contents, props changed)
  head/sys/modules/nandsim/
  head/sys/modules/nandsim/Makefile   (contents, props changed)
  head/tools/build/options/WITHOUT_NAND   (contents, props changed)
  head/tools/build/options/WITH_NAND   (contents, props changed)
  head/usr.sbin/nandsim/
  head/usr.sbin/nandsim/Makefile   (contents, props changed)
  head/usr.sbin/nandsim/nandsim.8   (contents, props changed)
  head/usr.sbin/nandsim/nandsim.c   (contents, props changed)
  head/usr.sbin/nandsim/nandsim_cfgparse.c   (contents, props changed)
  head/usr.sbin/nandsim/nandsim_cfgparse.h   (c

svn commit: r235545 - head/share/man/man4

2012-05-17 Thread Grzegorz Bernacki
Author: gber
Date: Thu May 17 11:53:38 2012
New Revision: 235545
URL: http://svn.freebsd.org/changeset/base/235545

Log:
  Removed repeated content from man page.

Modified:
  head/share/man/man4/nandsim.4

Modified: head/share/man/man4/nandsim.4
==
--- head/share/man/man4/nandsim.4   Thu May 17 11:50:12 2012
(r235544)
+++ head/share/man/man4/nandsim.4   Thu May 17 11:53:38 2012
(r235545)
@@ -90,95 +90,3 @@ kernel driver was developed by
 .An Grzegorz Bernacki .
 This manual page was written by
 .An Rafal Jaworowski .
-.\"
-.\" Copyright (c) 2012 The FreeBSD Foundation
-.\" All rights reserved.
-.\"
-.\" This documentation was written by Semihalf under sponsorship from
-.\" the FreeBSD Foundation.
-.\"
-.\" Redistribution and use in source and binary forms, with or without
-.\" modification, are permitted provided that the following conditions
-.\" are met:
-.\" 1. Redistributions of source code must retain the above copyright
-.\"notice, this list of conditions and the following disclaimer.
-.\" 2. Redistributions in binary form must reproduce the above copyright
-.\"notice, this list of conditions and the following disclaimer in the
-.\"documentation and/or other materials provided with the distribution.
-.\"
-.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
-.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-.\" ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
-.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-.\" SUCH DAMAGE.
-.\"
-.\" $FreeBSD$
-.\"
-.Dd March 8, 2012
-.Dt NANDSIM 4
-.Os
-.Sh NAME
-.Nm nandsim
-.Nd NAND Flash simulator driver
-.Sh SYNOPSIS
-.Cd "device nand"
-.Cd "device nandsim"
-.Cd "options ALQ"
-.Sh DESCRIPTION
-The
-.Nm
-is part of the
-.Fx
-NAND framework
-.Xr nand 4
-and can be characterized with the following highlights:
-.Bl -bullet
-.It
-plugs into the
-.Xr nand 4
-framework APIs as if it were a hardware controller (hanging on the nexus bus)
-with real NAND chips connected to it
-.It
-physically part of the kernel code (either statically linked into the kernel
-image or built as a module)
-.It
-controlled with a user space program
-.Xr nandsim 8
-.El
-.Pp
-From the user perspective, the
-.Nm
-allows for imitating ONFI-compliant NAND Flash devices as if they were
-attached to the system via a virtual controller.
-.Pp
-Some
-.Nm
-features rely on the ability to log contents to a file, which is achieved
-through the
-.Xr alq 9
-facility.
-.Sh SEE ALSO
-.Xr nand 4 ,
-.Xr nandsim.conf 5 ,
-.Xr nandsim 8
-.Sh STANDARDS
-Open NAND Flash Interface Working Group
-.Pq Vt ONFI .
-.Sh HISTORY
-The
-.Nm
-support first appeared in
-.Fx 10.0 .
-.Sh AUTHOR
-The
-.Nm
-kernel driver was developed by
-.An Grzegorz Bernacki .
-This manual page was written by
-.An Rafal Jaworowski .
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svn commit: r235607 - head/usr.sbin/nandsim

2012-05-18 Thread Grzegorz Bernacki
Author: gber
Date: Fri May 18 14:12:17 2012
New Revision: 235607
URL: http://svn.freebsd.org/changeset/base/235607

Log:
  Add missing include.

Modified:
  head/usr.sbin/nandsim/nandsim_cfgparse.c

Modified: head/usr.sbin/nandsim/nandsim_cfgparse.c
==
--- head/usr.sbin/nandsim/nandsim_cfgparse.cFri May 18 12:51:48 2012
(r235606)
+++ head/usr.sbin/nandsim/nandsim_cfgparse.cFri May 18 14:12:17 2012
(r235607)
@@ -23,6 +23,8 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  */
+
+#include 
 __FBSDID("$FreeBSD$");
 
 #include 
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svn commit: r235609 - in head/sys: arm/conf arm/include arm/mv arm/mv/discovery boot/fdt/dts boot/uboot/lib

2012-05-18 Thread Grzegorz Bernacki
Author: gber
Date: Fri May 18 14:41:14 2012
New Revision: 235609
URL: http://svn.freebsd.org/changeset/base/235609

Log:
  Add architecture dependent code to support NAND Framework on Marvell SoCs.
  
  Obtained from: Semihalf
  Supported by:  FreeBSD Foundation, Juniper Networks

Added:
  head/sys/boot/fdt/dts/bindings-localbus.txt   (contents, props changed)
Modified:
  head/sys/arm/conf/DB-78XXX
  head/sys/arm/conf/DB-88F6XXX
  head/sys/arm/conf/SHEEVAPLUG
  head/sys/arm/include/fdt.h
  head/sys/arm/mv/discovery/discovery.c
  head/sys/arm/mv/files.mv
  head/sys/arm/mv/mv_machdep.c
  head/sys/arm/mv/mvwin.h
  head/sys/boot/fdt/dts/db78100.dts
  head/sys/boot/fdt/dts/db88f6281.dts
  head/sys/boot/fdt/dts/sheevaplug.dts
  head/sys/boot/uboot/lib/api_public.h
  head/sys/boot/uboot/lib/glue.c

Modified: head/sys/arm/conf/DB-78XXX
==
--- head/sys/arm/conf/DB-78XXX  Fri May 18 14:29:54 2012(r235608)
+++ head/sys/arm/conf/DB-78XXX  Fri May 18 14:41:14 2012(r235609)
@@ -17,6 +17,7 @@ options   SCHED_4BSD  #4BSD scheduler
 optionsINET#InterNETworking
 optionsINET6   #IPv6 communications protocols
 optionsFFS #Berkeley Fast Filesystem
+optionsNANDFS  #NAND Filesystem
 optionsNFSCL   #New Network Filesystem Client
 optionsNFSLOCKD#Network Lock Manager
 optionsNFS_ROOT#NFS usable as /, requires NFSCL
@@ -82,6 +83,10 @@ device   ds133x
 # SATA
 device mvs
 
+# NAND
+device nand
+
 # Flattened Device Tree
 optionsFDT
+optionsFDT_DTB_STATIC
 makeoptionsFDT_DTS_FILE=db78100.dts

Modified: head/sys/arm/conf/DB-88F6XXX
==
--- head/sys/arm/conf/DB-88F6XXXFri May 18 14:29:54 2012
(r235608)
+++ head/sys/arm/conf/DB-88F6XXXFri May 18 14:41:14 2012
(r235609)
@@ -17,6 +17,7 @@ options   SCHED_4BSD  #4BSD scheduler
 optionsINET#InterNETworking
 optionsINET6   #IPv6 communications protocols
 optionsFFS #Berkeley Fast Filesystem
+optionsNANDFS  #NAND Filesystem
 optionsNFSCL   #New Network Filesystem Client
 optionsNFSLOCKD#Network Lock Manager
 optionsNFS_ROOT#NFS usable as /, requires NFSCL
@@ -85,6 +86,10 @@ device   iicbus
 # SATA
 device mvs
 
+# NAND
+device nand
+
 # Flattened Device Tree
 optionsFDT
+optionsFDT_DTB_STATIC
 makeoptionsFDT_DTS_FILE=db88f6281.dts

Modified: head/sys/arm/conf/SHEEVAPLUG
==
--- head/sys/arm/conf/SHEEVAPLUGFri May 18 14:29:54 2012
(r235608)
+++ head/sys/arm/conf/SHEEVAPLUGFri May 18 14:41:14 2012
(r235609)
@@ -17,6 +17,7 @@ options   SCHED_4BSD  #4BSD scheduler
 optionsINET#InterNETworking
 optionsINET6   #IPv6 communications protocols
 optionsFFS #Berkeley Fast Filesystem
+optionsNANDFS  #NAND Filesystem
 optionsNFSCL   #New Network Filesystem Client
 optionsNFSLOCKD#Network Lock Manager
 optionsNFS_ROOT#NFS usable as /, requires NFSCL
@@ -72,6 +73,9 @@ devicescbus
 device pass
 device da
 
+# NAND
+device nand
+
 # Flattened Device Tree
 optionsFDT
 optionsFDT_DTB_STATIC

Modified: head/sys/arm/include/fdt.h
==
--- head/sys/arm/include/fdt.h  Fri May 18 14:29:54 2012(r235608)
+++ head/sys/arm/include/fdt.h  Fri May 18 14:41:14 2012(r235609)
@@ -57,6 +57,7 @@ struct mem_region {
vm_size_t   mr_size;
 };
 
+int fdt_localbus_devmap(phandle_t, struct pmap_devmap *, int, int *);
 int fdt_pci_devmap(phandle_t, struct pmap_devmap *devmap, vm_offset_t,
 vm_offset_t);
 

Modified: head/sys/arm/mv/discovery/discovery.c
==
--- head/sys/arm/mv/discovery/discovery.c   Fri May 18 14:29:54 2012
(r235608)
+++ head/sys/arm/mv/discovery/discovery.c   Fri May 18 14:41:14 2012
(r235609)
@@ -43,6 +43,30 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+/*
+ * Virtual address space layout:
+ * -
+ * 0x_ - 0xBFFF_   : User Process (3 GB)
+ * 0xC000_ - virtual_avail : Kernel Reserved (text, data, page tables,
+ * : st

svn commit: r235611 - head/sys/arm/mv

2012-05-18 Thread Grzegorz Bernacki
Author: gber
Date: Fri May 18 15:25:43 2012
New Revision: 235611
URL: http://svn.freebsd.org/changeset/base/235611

Log:
  Add localbus driver for Marvell's platforms.
  
  Obtained from: Semihalf
  Supported by:  FreeBSD Foundation, Juniper Networks

Added:
  head/sys/arm/mv/mv_localbus.c   (contents, props changed)

Added: head/sys/arm/mv/mv_localbus.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/arm/mv/mv_localbus.c   Fri May 18 15:25:43 2012
(r235611)
@@ -0,0 +1,493 @@
+/*-
+ * Copyright (c) 2012 Semihalf.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include "opt_platform.h"
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#include 
+#include 
+#include 
+
+#include "dev/fdt/fdt_common.h"
+#include "ofw_bus_if.h"
+
+#include 
+
+#define DEBUG
+#undef DEBUG
+
+#ifdef DEBUG
+#define debugf(fmt, args...) do { printf("%s(): ", __func__);  \
+printf(fmt,##args); } while (0)
+#else
+#define debugf(fmt, args...)
+#endif
+
+#define MV_LOCALBUS_MAX_BANKS  8
+#define MV_LOCALBUS_MAX_BANK_CELLS 4
+
+static MALLOC_DEFINE(M_LOCALBUS, "localbus", "localbus devices information");
+
+struct localbus_bank {
+   vm_offset_t va; /* VA of the bank */
+   vm_paddr_t  pa; /* physical address of the bank */
+   vm_size_t   size;   /* bank size */
+   uint8_t mapped; /* device memory has mapping */
+};
+
+struct localbus_softc {
+   device_tsc_dev;
+   bus_space_handle_t  sc_bsh;
+   bus_space_tag_t sc_bst;
+   int sc_rid;
+
+   struct localbus_bank*sc_banks;
+};
+
+struct localbus_devinfo {
+   struct ofw_bus_devinfo  di_ofw;
+   struct resource_listdi_res;
+   int di_bank;
+};
+
+struct localbus_va_entry {
+   int8_t  bank;
+   vm_offset_t va;
+   vm_size_t   size;
+};
+
+/*
+ * Prototypes.
+ */
+static int localbus_probe(device_t);
+static int localbus_attach(device_t);
+static int localbus_print_child(device_t, device_t);
+
+static struct resource *localbus_alloc_resource(device_t, device_t, int,
+int *, u_long, u_long, u_long, u_int);
+static struct resource_list *localbus_get_resource_list(device_t, device_t);
+
+static ofw_bus_get_devinfo_t localbus_get_devinfo;
+
+/*
+ * Bus interface definition.
+ */
+static device_method_t localbus_methods[] = {
+   /* Device interface */
+   DEVMETHOD(device_probe, localbus_probe),
+   DEVMETHOD(device_attach,localbus_attach),
+   DEVMETHOD(device_detach,bus_generic_detach),
+   DEVMETHOD(device_shutdown,  bus_generic_shutdown),
+   DEVMETHOD(device_suspend,   bus_generic_suspend),
+   DEVMETHOD(device_resume,bus_generic_resume),
+
+   /* Bus interface */
+   DEVMETHOD(bus_print_child,  localbus_print_child),
+   DEVMETHOD(bus_alloc_resource,   localbus_alloc_resource),
+   DEVMETHOD(bus_release_resource, bus_generic_release_resource),
+   DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
+   DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
+   DEVMETHOD(bus_setup_intr,   bus_generic_setup_intr),
+   DEVMETHOD(bus_teardown_intr,bus_generic_teardown_intr),
+   DEVMETHOD(bus_get_resource_list, localbus_get_resource_list),
+
+   /* OFW bus interface */
+   DEVMETHOD(ofw_bus_get_devinfo,  localbus_get_devinfo),
+  

svn commit: r235778 - in head/sys: boot/fdt/dts conf dev/fdt geom sys

2012-05-22 Thread Grzegorz Bernacki
Author: gber
Date: Tue May 22 08:33:14 2012
New Revision: 235778
URL: http://svn.freebsd.org/changeset/base/235778

Log:
  Add a new geom class which allows to divide NAND Flash chip
  into partitions.
  
  Partitions are created based on data in dts file which are
  extracted and interpreted by slicer.
  
  Obtained from: Semihalf
  Supported by:  FreeBSD Foundation, Juniper Networks

Added:
  head/sys/dev/fdt/fdt_slicer.c   (contents, props changed)
  head/sys/geom/geom_flashmap.c   (contents, props changed)
  head/sys/sys/slicer.h   (contents, props changed)
Modified:
  head/sys/boot/fdt/dts/sheevaplug.dts
  head/sys/conf/files
  head/sys/dev/fdt/fdt_common.h

Modified: head/sys/boot/fdt/dts/sheevaplug.dts
==
--- head/sys/boot/fdt/dts/sheevaplug.dtsTue May 22 07:23:41 2012
(r235777)
+++ head/sys/boot/fdt/dts/sheevaplug.dtsTue May 22 08:33:14 2012
(r235778)
@@ -88,7 +88,16 @@
bank-width = <2>;
device-width = <1>;
 
+   slice@0 {
+   reg = <0x0 0x20>;
+   label = "u-boot";
+   read-only;
+   };
 
+   slice@20 {
+   reg = <0x20 0x1fe0>;
+   label = "root";
+   };
};
};
 

Modified: head/sys/conf/files
==
--- head/sys/conf/files Tue May 22 07:23:41 2012(r235777)
+++ head/sys/conf/files Tue May 22 08:33:14 2012(r235778)
@@ -1223,6 +1223,7 @@ dev/fatm/if_fatm.coptional fatm pci
 dev/fb/splash.coptional splash
 dev/fdt/fdt_common.c   optional fdt
 dev/fdt/fdt_pci.c  optional fdt pci
+dev/fdt/fdt_slicer.c   optional fdt cfi | fdt nand
 dev/fdt/fdt_static_dtb.S   optional fdt fdt_dtb_static
 dev/fdt/fdtbus.c   optional fdt
 dev/fdt/simplebus.coptional fdt
@@ -2388,6 +2389,7 @@ geom/geom_disk.c  standard
 geom/geom_dump.c   standard
 geom/geom_event.c  standard
 geom/geom_fox.coptional geom_fox
+geom/geom_flashmap.c   optional fdt cfi | fdt nand
 geom/geom_io.c standard
 geom/geom_kern.c   standard
 geom/geom_map.coptional geom_map

Modified: head/sys/dev/fdt/fdt_common.h
==
--- head/sys/dev/fdt/fdt_common.h   Tue May 22 07:23:41 2012
(r235777)
+++ head/sys/dev/fdt/fdt_common.h   Tue May 22 08:33:14 2012
(r235778)
@@ -32,6 +32,7 @@
 #ifndef _FDT_COMMON_H_
 #define _FDT_COMMON_H_
 
+#include 
 #include 
 #include 
 #include 

Added: head/sys/dev/fdt/fdt_slicer.c
==
--- /dev/null   00:00:00 1970   (empty, because file is newly added)
+++ head/sys/dev/fdt/fdt_slicer.c   Tue May 22 08:33:14 2012
(r235778)
@@ -0,0 +1,115 @@
+/*-
+ * Copyright (c) 2012 Semihalf.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include 
+__FBSDID("$FreeBSD$");
+
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include 
+
+#define DEBUG
+#undef DEBUG
+
+#ifdef DEBUG
+#define debugf(fmt, args...) do { printf("%s(): ", __func__);  \
+printf(fmt,##args); } while (0)
+#else
+#define debugf(fmt, args...)
+#endif
+
+int
+flash_fill_slices(device_t dev, struct flash_slice 

svn commit: r235779 - head/sys/boot/fdt/dts

2012-05-22 Thread Grzegorz Bernacki
Author: gber
Date: Tue May 22 09:27:57 2012
New Revision: 235779
URL: http://svn.freebsd.org/changeset/base/235779

Log:
  Divide nand flash for DB6281 into two partitions. One for u-boot
  and second one for general use.
  
  Obtained from: Semihalf
  Supported by:  FreeBSD Foundation, Juniper Networks

Modified:
  head/sys/boot/fdt/dts/db88f6281.dts

Modified: head/sys/boot/fdt/dts/db88f6281.dts
==
--- head/sys/boot/fdt/dts/db88f6281.dts Tue May 22 08:33:14 2012
(r235778)
+++ head/sys/boot/fdt/dts/db88f6281.dts Tue May 22 09:27:57 2012
(r235779)
@@ -89,7 +89,16 @@
bank-width = <2>;
device-width = <1>;
 
+   slice@0 {
+   reg = <0x0 0x20>;
+   label = "u-boot";
+   read-only;
+   };
 
+   slice@20 {
+   reg = <0x20 0x7e0>;
+   label = "root";
+   };
};
};
 
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svn commit: r235907 - head/sys/arm/arm

2012-05-24 Thread Grzegorz Bernacki
Author: gber
Date: Thu May 24 12:38:24 2012
New Revision: 235907
URL: http://svn.freebsd.org/changeset/base/235907

Log:
  ARMs don't have motherboards.
  
  Obtained from:Semihalf

Modified:
  head/sys/arm/arm/nexus.c

Modified: head/sys/arm/arm/nexus.c
==
--- head/sys/arm/arm/nexus.cThu May 24 12:28:11 2012(r235906)
+++ head/sys/arm/arm/nexus.cThu May 24 12:38:24 2012(r235907)
@@ -160,7 +160,7 @@ nexus_print_child(device_t bus, device_t
int retval = 0;
 
retval += bus_print_child_header(bus, child);
-   retval += printf(" on motherboard\n");  /* XXX "motherboard", ick */
+   retval += printf("\n");
 
return (retval);
 }
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svn commit: r235908 - head/sys/arm/arm

2012-05-24 Thread Grzegorz Bernacki
Author: gber
Date: Thu May 24 12:41:57 2012
New Revision: 235908
URL: http://svn.freebsd.org/changeset/base/235908

Log:
  Return Supervisor SP and LR registers instead of User ones while in KDB 
thread.
  
  Obtained from: Semihalf

Modified:
  head/sys/arm/arm/gdb_machdep.c

Modified: head/sys/arm/arm/gdb_machdep.c
==
--- head/sys/arm/arm/gdb_machdep.c  Thu May 24 12:38:24 2012
(r235907)
+++ head/sys/arm/arm/gdb_machdep.c  Thu May 24 12:41:57 2012
(r235908)
@@ -54,8 +54,12 @@ gdb_cpu_getreg(int regnum, size_t *regsz
*regsz = gdb_cpu_regsz(regnum);
 
if (kdb_thread == curthread) {
-   if (regnum < 15)
+   if (regnum < 13)
return (&kdb_frame->tf_r0 + regnum);
+   if (regnum == 13)
+   return (&kdb_frame->tf_svc_sp);
+   if (regnum == 14)
+   return (&kdb_frame->tf_svc_lr);
if (regnum == 15)
return (&kdb_frame->tf_pc);
if (regnum == 25)
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svn commit: r235975 - head/usr.bin/gprof

2012-05-24 Thread Grzegorz Bernacki
Author: gber
Date: Fri May 25 06:48:42 2012
New Revision: 235975
URL: http://svn.freebsd.org/changeset/base/235975

Log:
  Fix resolving symbol names on ARM.
  
  On ARM, binutils are adding '$a' symbols in the symbol table for
  every function (in addition to normal symbol). When gprof(1) looks
  up symbol name, it often reads '$a' instead of proper function name,
  because it find it first. With this fix, when read symbol name
  begins with '$' and previous symbol has the same address, it will
  use previous symbol name (which is proper function name).
  
  Obtained from:Semihalf

Modified:
  head/usr.bin/gprof/lookup.c

Modified: head/usr.bin/gprof/lookup.c
==
--- head/usr.bin/gprof/lookup.c Fri May 25 06:41:08 2012(r235974)
+++ head/usr.bin/gprof/lookup.c Fri May 25 06:48:42 2012(r235975)
@@ -66,6 +66,12 @@ nllookup( address )
printf( "[nllookup] %d (%d) probes\n" , probes , nname-1 );
}
 #  endif /* DEBUG */
+#if defined(__arm__)
+   if (nl[middle].name[0] == '$' &&
+   nl[middle-1].value == nl[middle].value)
+   middle--;
+#endif
+
return &nl[ middle ];
}
if ( nl[ middle ].value > address ) {
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svn commit: r236307 - head/sys/arm/include

2012-05-30 Thread Grzegorz Bernacki
Author: gber
Date: Wed May 30 13:31:08 2012
New Revision: 236307
URL: http://svn.freebsd.org/changeset/base/236307

Log:
  Flush D and I caches after setting a breakpoint.
  
  Reviewed by: imp
  Obtained from: Semihalf

Modified:
  head/sys/arm/include/kdb.h

Modified: head/sys/arm/include/kdb.h
==
--- head/sys/arm/include/kdb.h  Wed May 30 13:00:43 2012(r236306)
+++ head/sys/arm/include/kdb.h  Wed May 30 13:31:08 2012(r236307)
@@ -46,11 +46,14 @@ kdb_cpu_set_singlestep(void)
 static __inline void
 kdb_cpu_sync_icache(unsigned char *addr, size_t size)
 {
+
+   cpu_icache_sync_all();
 }
 
 static __inline void
 kdb_cpu_trap(int type, int code)
 {
+
cpu_idcache_wbinv_all();
 }
 
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svn commit: r236308 - head/sys/arm/arm

2012-05-30 Thread Grzegorz Bernacki
Author: gber
Date: Wed May 30 13:33:27 2012
New Revision: 236308
URL: http://svn.freebsd.org/changeset/base/236308

Log:
  Print userspace backtrace for current thread.
  
  Reviewed by:  imp
  Obtained from:Semihalf

Modified:
  head/sys/arm/arm/db_trace.c

Modified: head/sys/arm/arm/db_trace.c
==
--- head/sys/arm/arm/db_trace.c Wed May 30 13:31:08 2012(r236307)
+++ head/sys/arm/arm/db_trace.c Wed May 30 13:33:27 2012(r236308)
@@ -79,14 +79,13 @@ __FBSDID("$FreeBSD$");
  */
 
 static void
-db_stack_trace_cmd(db_expr_t addr, db_expr_t count)
+db_stack_trace_cmd(db_expr_t addr, db_expr_t count, boolean_t kernel_only)
 {
u_int32_t   *frame, *lastframe;
c_db_sym_t sym;
const char *name;
db_expr_t value;
db_expr_t offset;
-   boolean_t   kernel_only = TRUE;
int scp_offset;
 
frame = (u_int32_t *)addr;
@@ -196,8 +195,11 @@ db_trace_thread(struct thread *thr, int 
 {
struct pcb *ctx;
 
-   ctx = kdb_thr_ctx(thr);
-   db_stack_trace_cmd(ctx->un_32.pcb32_r11, -1);
+   if (thr != curthread) {
+   ctx = kdb_thr_ctx(thr);
+   db_stack_trace_cmd(ctx->un_32.pcb32_r11, -1, TRUE);
+   } else
+   db_trace_self();
return (0);
 }
 
@@ -207,5 +209,5 @@ db_trace_self(void)
db_addr_t addr;
 
addr = (db_addr_t)__builtin_frame_address(0);
-   db_stack_trace_cmd(addr, -1);
+   db_stack_trace_cmd(addr, -1, FALSE);
 }
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svn commit: r236549 - head/sys/modules

2012-06-04 Thread Grzegorz Bernacki
Author: gber
Date: Mon Jun  4 08:40:14 2012
New Revision: 236549
URL: http://svn.freebsd.org/changeset/base/236549

Log:
  Restore changes accidentally removed in r235537.
  
  Noticed by:   avg

Modified:
  head/sys/modules/Makefile

Modified: head/sys/modules/Makefile
==
--- head/sys/modules/Makefile   Mon Jun  4 07:54:53 2012(r236548)
+++ head/sys/modules/Makefile   Mon Jun  4 08:40:14 2012(r236549)
@@ -338,6 +338,7 @@ SUBDIR= ${_3dfx} \
vx \
${_vxge} \
wb \
+   ${_wbwd} \
${_wi} \
wlan \
wlan_acl \
@@ -521,6 +522,7 @@ _stg=   stg
 _streams=  streams
 _svr4= svr4
 _vxge= vxge
+_wbwd= wbwd
 _wi=   wi
 _xe=   xe
 .if ${MK_ZFS} != "no" || defined(ALL_MODULES)
@@ -716,6 +718,7 @@ _viawd= viawd
 _virtio=   virtio
 _vxge= vxge
 _x86bios=  x86bios
+_wbwd= wbwd
 _wi=   wi
 _wpi=  wpi
 .if ${MK_SOURCELESS_UCODE} != "no"
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Re: svn commit: r235537 - in head: etc/mtree include lib lib/libnandfs lib/libstand sbin sbin/nandfs sbin/newfs_nandfs share/man/man4 share/man/man5 share/mk sys/boot/arm/uboot sys/boot/i386/loader sy

2012-06-04 Thread Grzegorz Bernacki

On 06/02/12 20:43, Andriy Gapon wrote:

on 17/05/2012 13:11 Grzegorz Bernacki said the following:

Author: gber
Date: Thu May 17 10:11:18 2012
New Revision: 235537
URL: http://svn.freebsd.org/changeset/base/235537

Log:
   Import work done under project/nand (@235533) into head.

   The NAND Flash environment consists of several distinct components:
 - NAND framework (drivers harness for NAND controllers and NAND chips)
 - NAND simulator (NANDsim)
 - NAND file system (NAND FS)
 - Companion tools and utilities
 - Documentation (manual pages)

   This work is still experimental. Please use with caution.

   Obtained from: Semihalf
   Supported by:  FreeBSD Foundation, Juniper Networks

[snip]

   head/sys/modules/Makefile


Looks like this commit has unintentionally [?] removed wbwd-related lines from
sys/modules/Makefile.  Please fix.


Hi Andriy,

Sorry about that. Fixed in r236549.

regards,
grzesiek
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svn commit: r240484 - head/sys/dev/fdt

2012-09-14 Thread Grzegorz Bernacki
Author: gber
Date: Fri Sep 14 09:33:35 2012
New Revision: 240484
URL: http://svn.freebsd.org/changeset/base/240484

Log:
  Set busaddr and bussize to 0 when fdt_get_range() fails.
  
  Obtained from:Semihalf

Modified:
  head/sys/dev/fdt/fdt_common.c

Modified: head/sys/dev/fdt/fdt_common.c
==
--- head/sys/dev/fdt/fdt_common.c   Fri Sep 14 08:11:59 2012
(r240483)
+++ head/sys/dev/fdt/fdt_common.c   Fri Sep 14 09:33:35 2012
(r240484)
@@ -431,7 +431,10 @@ fdt_reg_to_rl(phandle_t node, struct res
 
if (fdt_addrsize_cells(OF_parent(node), &addr_cells, &size_cells) != 0)
return (ENXIO);
-   fdt_get_range(OF_parent(node), 0, &busaddr, &bussize);
+   if (fdt_get_range(OF_parent(node), 0, &busaddr, &bussize)) {
+   busaddr = 0;
+   bussize = 0;
+   }
 
tuple_size = sizeof(pcell_t) * (addr_cells + size_cells);
tuples = OF_getprop_alloc(node, "reg", tuple_size, (void **)®);
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svn commit: r240485 - head/sys/dev/fdt

2012-09-14 Thread Grzegorz Bernacki
Author: gber
Date: Fri Sep 14 09:36:35 2012
New Revision: 240485
URL: http://svn.freebsd.org/changeset/base/240485

Log:
  Add fdt_get_unit() function.
  
  Obtained from:Semihalf

Modified:
  head/sys/dev/fdt/fdt_common.c
  head/sys/dev/fdt/fdt_common.h

Modified: head/sys/dev/fdt/fdt_common.c
==
--- head/sys/dev/fdt/fdt_common.c   Fri Sep 14 09:33:35 2012
(r240484)
+++ head/sys/dev/fdt/fdt_common.c   Fri Sep 14 09:36:35 2012
(r240485)
@@ -697,3 +697,14 @@ fdt_get_mem_regions(struct mem_region *m
 out:
return (rv);
 }
+
+int
+fdt_get_unit(device_t dev)
+{
+   const char * name;
+
+   name = ofw_bus_get_name(dev);
+   name = strchr(name, '@') + 1;
+
+   return (strtol(name,NULL,0));
+}

Modified: head/sys/dev/fdt/fdt_common.h
==
--- head/sys/dev/fdt/fdt_common.h   Fri Sep 14 09:33:35 2012
(r240484)
+++ head/sys/dev/fdt/fdt_common.h   Fri Sep 14 09:36:35 2012
(r240485)
@@ -110,5 +110,6 @@ int fdt_pci_route_intr(int, int, int, in
 int fdt_ranges_verify(pcell_t *, int, int, int, int);
 int fdt_reg_to_rl(phandle_t, struct resource_list *);
 int fdt_pm(phandle_t);
+int fdt_get_unit(device_t);
 
 #endif /* _FDT_COMMON_H_ */
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svn commit: r240486 - in head/sys/arm: arm include

2012-09-14 Thread Grzegorz Bernacki
Author: gber
Date: Fri Sep 14 09:38:54 2012
New Revision: 240486
URL: http://svn.freebsd.org/changeset/base/240486

Log:
  Support identification of new PJ4B cores.
  
  Obtained from:Semihalf

Modified:
  head/sys/arm/arm/cpufunc.c
  head/sys/arm/arm/identcpu.c
  head/sys/arm/include/armreg.h

Modified: head/sys/arm/arm/cpufunc.c
==
--- head/sys/arm/arm/cpufunc.c  Fri Sep 14 09:36:35 2012(r240485)
+++ head/sys/arm/arm/cpufunc.c  Fri Sep 14 09:38:54 2012(r240486)
@@ -1415,6 +1415,7 @@ set_cpufuncs()
 #if defined(CPU_MV_PJ4B)
if (cputype == CPU_ID_MV88SV581X_V6 ||
cputype == CPU_ID_MV88SV581X_V7 ||
+   cputype == CPU_ID_MV88SV584X_V7 ||
cputype == CPU_ID_ARM_88SV581X_V6 ||
cputype == CPU_ID_ARM_88SV581X_V7) {
if (cpu_pfr(0) & ARM_PFR0_THUMBEE_MASK)
@@ -1425,8 +1426,8 @@ set_cpufuncs()
get_cachetype_cp15();
pmap_pte_init_mmu_v6();
goto out;
-   } else if (cputype == CPU_ID_ARM_88SV584X ||
-   cputype == CPU_ID_MV88SV584X) {
+   } else if (cputype == CPU_ID_ARM_88SV584X_V6 ||
+   cputype == CPU_ID_MV88SV584X_V6) {
cpufuncs = pj4bv6_cpufuncs;
get_cachetype_cp15();
pmap_pte_init_mmu_v6();

Modified: head/sys/arm/arm/identcpu.c
==
--- head/sys/arm/arm/identcpu.c Fri Sep 14 09:36:35 2012(r240485)
+++ head/sys/arm/arm/identcpu.c Fri Sep 14 09:38:54 2012(r240486)
@@ -321,9 +321,11 @@ const struct cpuidtab cpuids[] = {
  generic_steppings },
{ CPU_ID_ARM_88SV581X_V7, CPU_CLASS_MARVELL,"Sheeva 88SV581x",
  generic_steppings },
-   { CPU_ID_MV88SV584X,CPU_CLASS_MARVELL,  "Sheeva 88SV584x",
+   { CPU_ID_MV88SV584X_V6, CPU_CLASS_MARVELL,  "Sheeva 88SV584x",
  generic_steppings },
-   { CPU_ID_ARM_88SV584X,  CPU_CLASS_MARVELL,  "Sheeva 88SV584x",
+   { CPU_ID_ARM_88SV584X_V6, CPU_CLASS_MARVELL,"Sheeva 88SV584x",
+ generic_steppings },
+   { CPU_ID_MV88SV584X_V7, CPU_CLASS_MARVELL,  "Sheeva 88SV584x",
  generic_steppings },
 
{ 0, CPU_CLASS_NONE, NULL, NULL }

Modified: head/sys/arm/include/armreg.h
==
--- head/sys/arm/include/armreg.h   Fri Sep 14 09:36:35 2012
(r240485)
+++ head/sys/arm/include/armreg.h   Fri Sep 14 09:38:54 2012
(r240486)
@@ -170,11 +170,12 @@
 
 #define CPU_ID_MV88SV581X_V6   0x560F5810 /* Marvell Sheeva 88SV581x 
v6 Core */
 #define CPU_ID_MV88SV581X_V7   0x561F5810 /* Marvell Sheeva 88SV581x 
v7 Core */
-#define CPU_ID_MV88SV584X  0x561F5840 /* Marvell Sheeva 88SV584x 
v6 Core */
+#define CPU_ID_MV88SV584X_V6   0x561F5840 /* Marvell Sheeva 88SV584x 
v6 Core */
+#define CPU_ID_MV88SV584X_V7   0x562F5840 /* Marvell Sheeva 88SV584x 
v7 Core */
 /* Marvell's CPUIDs with ARM ID in implementor field */
 #define CPU_ID_ARM_88SV581X_V6 0x410fb760 /* Marvell Sheeva 88SV581x 
v6 Core */
 #define CPU_ID_ARM_88SV581X_V7 0x413FC080 /* Marvell Sheeva 88SV581x 
v7 Core */
-#define CPU_ID_ARM_88SV584X0x410FB024 /* Marvell Sheeva 88SV584x 
v6 Core */
+#define CPU_ID_ARM_88SV584X_V6 0x410FB020 /* Marvell Sheeva 88SV584x 
v6 Core */
 
 #defineCPU_ID_FA5260x66015260
 #defineCPU_ID_FA626TE  0x66056260
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svn commit: r240487 - head/sys/dev/fdt

2012-09-14 Thread Grzegorz Bernacki
Author: gber
Date: Fri Sep 14 09:45:13 2012
New Revision: 240487
URL: http://svn.freebsd.org/changeset/base/240487

Log:
  If virtual addresses are not set use one to one mapping.
  Do not map memory and IO space at address 0.
  
  Obtained from: Semihalf

Modified:
  head/sys/dev/fdt/fdt_pci.c

Modified: head/sys/dev/fdt/fdt_pci.c
==
--- head/sys/dev/fdt/fdt_pci.c  Fri Sep 14 09:38:54 2012(r240486)
+++ head/sys/dev/fdt/fdt_pci.c  Fri Sep 14 09:45:13 2012(r240487)
@@ -341,14 +341,14 @@ fdt_pci_devmap(phandle_t node, struct pm
if ((error = fdt_pci_ranges_decode(node, &io_space, &mem_space)) != 0)
return (error);
 
-   devmap->pd_va = io_va;
+   devmap->pd_va = (io_va ? io_va : io_space.base_parent);
devmap->pd_pa = io_space.base_parent;
devmap->pd_size = io_space.len;
devmap->pd_prot = VM_PROT_READ | VM_PROT_WRITE;
devmap->pd_cache = PTE_NOCACHE;
devmap++;
 
-   devmap->pd_va = mem_va;
+   devmap->pd_va = (mem_va ? mem_va : mem_space.base_parent);
devmap->pd_pa = mem_space.base_parent;
devmap->pd_size = mem_space.len;
devmap->pd_prot = VM_PROT_READ | VM_PROT_WRITE;
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svn commit: r240488 - in head/sys: arm/conf arm/include arm/mv arm/mv/armadaxp boot/fdt/dts

2012-09-14 Thread Grzegorz Bernacki
Author: gber
Date: Fri Sep 14 09:55:19 2012
New Revision: 240488
URL: http://svn.freebsd.org/changeset/base/240488

Log:
  Add support for Armada XP A0.
  
  - Add functions to calculate clocks instead using hardcoded values
  - Update reset and timers functions
  - Update number of interrupts
  - Change name of platform from db88f78100 to db78460
  - Correct DRAM size and PCI IRQ routing in dts file.
  
  Obtained from:Semihalf

Added:
  head/sys/boot/fdt/dts/db78460.dts   (contents, props changed)
Deleted:
  head/sys/boot/fdt/dts/db88f78160.dts
Modified:
  head/sys/arm/conf/ARMADAXP
  head/sys/arm/include/intr.h
  head/sys/arm/mv/armadaxp/armadaxp.c
  head/sys/arm/mv/common.c
  head/sys/arm/mv/mvreg.h
  head/sys/arm/mv/mvvar.h
  head/sys/arm/mv/mvwin.h
  head/sys/arm/mv/timer.c

Modified: head/sys/arm/conf/ARMADAXP
==
--- head/sys/arm/conf/ARMADAXP  Fri Sep 14 09:45:13 2012(r240487)
+++ head/sys/arm/conf/ARMADAXP  Fri Sep 14 09:55:19 2012(r240488)
@@ -99,4 +99,4 @@ devicevlan
 #FDT
 optionsFDT
 optionsFDT_DTB_STATIC
-makeoptionsFDT_DTS_FILE=db88f78160.dts
+makeoptionsFDT_DTS_FILE=db78460.dts

Modified: head/sys/arm/include/intr.h
==
--- head/sys/arm/include/intr.h Fri Sep 14 09:45:13 2012(r240487)
+++ head/sys/arm/include/intr.h Fri Sep 14 09:55:19 2012(r240488)
@@ -54,6 +54,8 @@
 #define NIRQ   128
 #elif defined(CPU_ARM11)
 #define NIRQ   128
+#elif defined(SOC_MV_ARMADAXP)
+#define NIRQ   148
 #else
 #define NIRQ   32
 #endif

Modified: head/sys/arm/mv/armadaxp/armadaxp.c
==
--- head/sys/arm/mv/armadaxp/armadaxp.c Fri Sep 14 09:45:13 2012
(r240487)
+++ head/sys/arm/mv/armadaxp/armadaxp.c Fri Sep 14 09:55:19 2012
(r240488)
@@ -34,6 +34,7 @@ __FBSDID("$FreeBSD$");
 #include 
 
 #include 
+#include 
 
 #include 
 #include 
@@ -43,24 +44,120 @@ __FBSDID("$FreeBSD$");
 
 #include 
 
+#define CPU_FREQ_FIELD(sar)(((0x01 & (sar >> 52)) << 3) | \
+   (0x07 & (sar >> 21)))
+#define FAB_FREQ_FIELD(sar)(((0x01 & (sar >> 51)) << 4) | \
+   (0x0F & (sar >> 24)))
+
+static uint32_t count_l2clk(void);
+
+/* XXX Make gpio driver optional and remove it */
 struct resource_spec mv_gpio_res[] = {
{ SYS_RES_MEMORY,   0,  RF_ACTIVE },
{ SYS_RES_IRQ,  0,  RF_ACTIVE },
{ -1, 0 }
 };
 
+struct vco_freq_ratio {
+   uint8_t vco_cpu;/* VCO to CLK0(CPU) clock ratio */
+   uint8_t vco_l2c;/* VCO to NB(L2 cache) clock ratio */
+   uint8_t vco_hcl;/* VCO to HCLK(DDR controller) clock ratio */
+   uint8_t vco_ddr;/* VCO to DR(DDR memory) clock ratio */
+};
+
+static struct vco_freq_ratio freq_conf_table[] = {
+/*00*/ { 1, 1,  4,  2 },
+/*01*/ { 1, 2,  2,  2 },
+/*02*/ { 2, 2,  6,  3 },
+/*03*/ { 2, 2,  3,  3 },
+/*04*/ { 1, 2,  3,  3 },
+/*05*/ { 1, 2,  4,  2 },
+/*06*/ { 1, 1,  2,  2 },
+/*07*/ { 2, 3,  6,  6 },
+/*08*/ { 2, 3,  5,  5 },
+/*09*/ { 1, 2,  6,  3 },
+/*10*/ { 2, 4, 10,  5 },
+/*11*/ { 1, 3,  6,  6 },
+/*12*/ { 1, 2,  5,  5 },
+/*13*/ { 1, 3,  6,  3 },
+/*14*/ { 1, 2,  5,  5 },
+/*15*/ { 2, 2,  5,  5 },
+/*16*/ { 1, 1,  3,  3 },
+/*17*/ { 2, 5, 10, 10 },
+/*18*/ { 1, 3,  8,  4 },
+/*19*/ { 1, 1,  2,  1 },
+/*20*/ { 2, 3,  6,  3 },
+/*21*/ { 1, 2,  8,  4 },
+/*22*/ { 2, 5, 10,  5 }
+};
+
+static uint16_tcpu_clock_table[] = {
+1000, 1066, 1200, 1333, 1500, 1666, 1800, 2000, 600,  667,  800,  1600,
+2133, 2200, 2400 };
+
 uint32_t
 get_tclk(void)
 {
+   uint32_t cputype;
 
-   return (TCLK_200MHZ);
+   cputype = cpufunc_id();
+   cputype &= CPU_ID_CPU_MASK;
+
+   if (cputype == CPU_ID_MV88SV584X_V7)
+   return (TCLK_250MHZ);
+   else
+   return (TCLK_200MHZ);
+}
+
+static uint32_t
+count_l2clk(void)
+{
+   uint64_t sar_reg;
+   uint32_t freq_vco, freq_l2clk;
+   uint8_t  sar_cpu_freq, sar_fab_freq, array_size;
+
+   /* Get value of the SAR register and process it */
+   sar_reg = get_sar_value();
+   sar_cpu_freq = CPU_FREQ_FIELD(sar_reg);
+   sar_fab_freq = FAB_FREQ_FIELD(sar_reg);
+
+   /* Check if CPU frequency field has correct value */
+   array_size = sizeof(cpu_clock_table) / sizeof(cpu_clock_table[0]);
+   if (sar_cpu_freq >= array_size)
+   panic("Reserved value in cpu frequency configuration field: "
+   "%d", sar_cpu_freq);
+
+   /* Check if fabric frequency field has correct value */
+   array_size = sizeof(freq_conf_table) / sizeof(freq_conf_table[0]);
+   if (sar_fab_freq >= array_size)
+   panic("Reserved value in fabric frequency configuration 

svn commit: r240489 - head/sys/arm/mv

2012-09-14 Thread Grzegorz Bernacki
Author: gber
Date: Fri Sep 14 09:57:41 2012
New Revision: 240489
URL: http://svn.freebsd.org/changeset/base/240489

Log:
  pci: Implement new memory and io space allocator for PCI.
  
  Cleanup code and move initializing bridge into separate function.
  Add checking of PCI mode (RC or endpoint).
  
  Obtained from:Semihalf

Modified:
  head/sys/arm/mv/mv_pci.c
  head/sys/arm/mv/mvwin.h

Modified: head/sys/arm/mv/mv_pci.c
==
--- head/sys/arm/mv/mv_pci.cFri Sep 14 09:55:19 2012(r240488)
+++ head/sys/arm/mv/mv_pci.cFri Sep 14 09:57:41 2012(r240489)
@@ -1,6 +1,7 @@
 /*-
  * Copyright (c) 2008 MARVELL INTERNATIONAL LTD.
  * Copyright (c) 2010 The FreeBSD Foundation
+ * Copyright (c) 2010-2012 Semihalf
  * All rights reserved.
  *
  * Developed by Semihalf.
@@ -89,18 +90,19 @@ __FBSDID("$FreeBSD$");
 #define PCIE_REG_STATUS0x1A04
 #define PCIE_REG_IRQ_MASK  0x1910
 
-#define STATUS_LINK_DOWN   1
-#define STATUS_BUS_OFFS8
-#define STATUS_BUS_MASK(0xFF << STATUS_BUS_OFFS)
-#define STATUS_DEV_OFFS16
-#define STATUS_DEV_MASK(0x1F << STATUS_DEV_OFFS)
-
-#define P2P_CONF_BUS_OFFS  16
-#define P2P_CONF_BUS_MASK  (0xFF << P2P_CONF_BUS_OFFS)
-#define P2P_CONF_DEV_OFFS  24
-#define P2P_CONF_DEV_MASK  (0x1F << P2P_CONF_DEV_OFFS)
+#define PCIE_CONTROL_ROOT_CMPLX(1 << 1)
+#define PCIE_CONTROL_HOT_RESET (1 << 24)
 
-#define PCI_VENDORID_MRVL  0x11AB
+#define PCIE_LINK_TIMEOUT  100
+
+#define PCIE_STATUS_LINK_DOWN  1
+#define PCIE_STATUS_DEV_OFFS   16
+
+/* Minimum PCI Memory and I/O allocations taken from PCI spec (in bytes) */
+#define PCI_MIN_IO_ALLOC   4
+#define PCI_MIN_MEM_ALLOC  16
+
+#define BITS_PER_UINT32(NBBY * sizeof(uint32_t))
 
 struct mv_pcib_softc {
device_tsc_dev;
@@ -108,15 +110,16 @@ struct mv_pcib_softc {
struct rman sc_mem_rman;
bus_addr_t  sc_mem_base;
bus_addr_t  sc_mem_size;
-   bus_addr_t  sc_mem_alloc;   /* Next allocation. */
-   int sc_mem_win_target;
+   uint32_tsc_mem_map[MV_PCI_MEM_SLICE_SIZE /
+   (PCI_MIN_MEM_ALLOC * BITS_PER_UINT32)];
+   int sc_win_target;
int sc_mem_win_attr;
 
struct rman sc_io_rman;
bus_addr_t  sc_io_base;
bus_addr_t  sc_io_size;
-   bus_addr_t  sc_io_alloc;/* Next allocation. */
-   int sc_io_win_target;
+   uint32_tsc_io_map[MV_PCI_IO_SLICE_SIZE /
+   (PCI_MIN_IO_ALLOC * BITS_PER_UINT32)];
int sc_io_win_attr;
 
struct resource *sc_res;
@@ -127,6 +130,7 @@ struct mv_pcib_softc {
int sc_busnr;   /* Host bridge bus number */
int sc_devnr;   /* Host bridge device number */
int sc_type;
+   int sc_mode;/* Endpoint / Root Complex */
 
struct fdt_pci_intr sc_intr_info;
 };
@@ -143,7 +147,8 @@ static int mv_pcib_init_all_bars(struct 
 static void mv_pcib_init_bridge(struct mv_pcib_softc *, int, int, int);
 static int mv_pcib_intr_info(phandle_t, struct mv_pcib_softc *);
 static inline void pcib_write_irq_mask(struct mv_pcib_softc *, uint32_t);
-
+static void mv_pcib_enable(struct mv_pcib_softc *, uint32_t);
+static int mv_pcib_mem_init(struct mv_pcib_softc *);
 
 /* Forward prototypes */
 static int mv_pcib_probe(device_t);
@@ -185,7 +190,7 @@ static device_method_t mv_pcib_methods[]
DEVMETHOD(pcib_read_config, mv_pcib_read_config),
DEVMETHOD(pcib_write_config,mv_pcib_write_config),
DEVMETHOD(pcib_route_interrupt, mv_pcib_route_interrupt),
-
+   
/* OFW bus interface */
DEVMETHOD(ofw_bus_get_compat,   ofw_bus_gen_get_compat),
DEVMETHOD(ofw_bus_get_model,ofw_bus_gen_get_model),
@@ -230,40 +235,30 @@ mv_pcib_attach(device_t self)
 {
struct mv_pcib_softc *sc;
phandle_t node, parnode;
-   uint32_t val;
+   uint32_t val, unit;
int err;
 
sc = device_get_softc(self);
sc->sc_dev = self;
+   unit = fdt_get_unit(self);
+
 
node = ofw_bus_get_node(self);
parnode = OF_parent(node);
if (fdt_is_compatible(node, "mrvl,pcie")) {
sc->sc_type = MV_TYPE_PCIE;
-   sc->sc_mem_win_target = MV_WIN_PCIE_TARGET(0);
-   sc->sc_mem_win_attr = MV_WIN_PCIE_MEM_ATTR(0);
-   sc->sc_io_win_target = MV_WIN_PCIE_TARGET(0);
-   sc->sc_io_win_attr = MV_WIN_PCIE_IO_ATTR(0);
-#ifdef SOC_MV_ORION
+   sc->sc_win_target = MV_WIN_PCIE_TARGET(unit);
+   sc->sc_mem_win_attr = MV_WIN_PCIE_MEM_ATTR(unit);
+   sc->sc_io_win_attr = MV

svn commit: r240490 - in head/sys/arm: conf mv/armadaxp

2012-09-14 Thread Grzegorz Bernacki
Author: gber
Date: Fri Sep 14 09:59:27 2012
New Revision: 240490
URL: http://svn.freebsd.org/changeset/base/240490

Log:
  Enable PCI for Armada XP
  
  Obtained from:Semihalf

Modified:
  head/sys/arm/conf/ARMADAXP
  head/sys/arm/mv/armadaxp/armadaxp.c

Modified: head/sys/arm/conf/ARMADAXP
==
--- head/sys/arm/conf/ARMADAXP  Fri Sep 14 09:57:41 2012(r240489)
+++ head/sys/arm/conf/ARMADAXP  Fri Sep 14 09:59:27 2012(r240490)
@@ -96,6 +96,9 @@ options   HZ=1000
 optionsDEVICE_POLLING
 device vlan
 
+#PCI/PCIE
+device pci
+
 #FDT
 optionsFDT
 optionsFDT_DTB_STATIC

Modified: head/sys/arm/mv/armadaxp/armadaxp.c
==
--- head/sys/arm/mv/armadaxp/armadaxp.c Fri Sep 14 09:57:41 2012
(r240489)
+++ head/sys/arm/mv/armadaxp/armadaxp.c Fri Sep 14 09:59:27 2012
(r240490)
@@ -160,11 +160,3 @@ get_l2clk(void)
return (l2clk_freq);
 }
 
-int
-fdt_pci_devmap(phandle_t node, struct pmap_devmap *devmap, vm_offset_t io_va,
-vm_offset_t mem_va)
-{
-
-   return (0);
-}
-
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svn commit: r240491 - head/sys/arm/mv

2012-09-14 Thread Grzegorz Bernacki
Author: gber
Date: Fri Sep 14 10:01:52 2012
New Revision: 240491
URL: http://svn.freebsd.org/changeset/base/240491

Log:
  Remove unused structure fields
  
  Obtained from:Semihalf

Modified:
  head/sys/arm/mv/mpic.c

Modified: head/sys/arm/mv/mpic.c
==
--- head/sys/arm/mv/mpic.c  Fri Sep 14 09:59:27 2012(r240490)
+++ head/sys/arm/mv/mpic.c  Fri Sep 14 10:01:52 2012(r240491)
@@ -76,8 +76,6 @@ struct mv_mpic_softc {
bus_space_handle_t  mpic_bsh;
bus_space_tag_t cpu_bst;
bus_space_handle_t  cpu_bsh;
-   int mpic_high_regs;
-   int mpic_error_regs;
 };
 
 static struct resource_spec mv_mpic_spec[] = {
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svn commit: r240492 - in head/sys: arm/include arm/mv boot/fdt/dts

2012-09-14 Thread Grzegorz Bernacki
Author: gber
Date: Fri Sep 14 10:05:01 2012
New Revision: 240492
URL: http://svn.freebsd.org/changeset/base/240492

Log:
  Add support for MSI in interrupt controlller.
  
  MSI are implemented via software interrupt. PCIe cards will write
  into software interrupt register which will cause inbound shared
  interrupt which will be interpreted as a MSI.
  
  Obtained from:Marvell, Semihalf

Modified:
  head/sys/arm/include/intr.h
  head/sys/arm/mv/mpic.c
  head/sys/arm/mv/mvvar.h
  head/sys/boot/fdt/dts/db78460.dts

Modified: head/sys/arm/include/intr.h
==
--- head/sys/arm/include/intr.h Fri Sep 14 10:01:52 2012(r240491)
+++ head/sys/arm/include/intr.h Fri Sep 14 10:05:01 2012(r240492)
@@ -55,7 +55,12 @@
 #elif defined(CPU_ARM11)
 #define NIRQ   128
 #elif defined(SOC_MV_ARMADAXP)
-#define NIRQ   148
+#define MAIN_IRQ_NUM   116
+#define ERR_IRQ_NUM32
+#define ERR_IRQ(MAIN_IRQ_NUM)
+#define MSI_IRQ_NUM32
+#define MSI_IRQ(ERR_IRQ + ERR_IRQ_NUM)
+#define NIRQ   (MAIN_IRQ_NUM + ERR_IRQ_NUM + MSI_IRQ_NUM)
 #else
 #define NIRQ   32
 #endif

Modified: head/sys/arm/mv/mpic.c
==
--- head/sys/arm/mv/mpic.c  Fri Sep 14 10:01:52 2012(r240491)
+++ head/sys/arm/mv/mpic.c  Fri Sep 14 10:05:01 2012(r240492)
@@ -1,6 +1,7 @@
 /*-
  * Copyright (c) 2006 Benno Rice.
  * Copyright (C) 2007-2011 MARVELL INTERNATIONAL LTD.
+ * Copyright (c) 2012 Semihalf.
  * All rights reserved.
  *
  * Developed by Semihalf.
@@ -46,23 +47,34 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
+
 #include 
 #include 
+#include 
+
+#ifdef DEBUG
+#define debugf(fmt, args...) do { printf("%s(): ", __func__);  \
+printf(fmt,##args); } while (0)
+#else
+#define debugf(fmt, args...)
+#endif
 
-#define IRQ_ERR4
-#define MAIN_IRQS  116
+#define MPIC_INT_ERR   4
+#define MPIC_INT_MSI   96
 
 #define IRQ_MASK   0x3ff
 
 #define MPIC_CTRL  0x0
 #define MPIC_SOFT_INT  0x4
+#define MPIC_SOFT_INT_DRBL1(1 << 5)
 #define MPIC_ERR_CAUSE 0x20
 #define MPIC_ISE   0x30
 #define MPIC_ICE   0x34
 
 
-#define MPIC_IN_DOORBELL   0x78
-#define MPIC_IN_DOORBELL_MASK  0x7c
+#define MPIC_IN_DRBL   0x78
+#define MPIC_IN_DRBL_MASK  0x7c
 #define MPIC_CTP   0xb0
 #define MPIC_CTP   0xb0
 #define MPIC_IIACK 0xb4
@@ -71,16 +83,20 @@ __FBSDID("$FreeBSD$");
 #define MPIC_ERR_MASK  0xec0
 
 struct mv_mpic_softc {
-   struct resource *   mpic_res[2];
+   device_tsc_dev;
+   struct resource *   mpic_res[3];
bus_space_tag_t mpic_bst;
bus_space_handle_t  mpic_bsh;
bus_space_tag_t cpu_bst;
bus_space_handle_t  cpu_bsh;
+   bus_space_tag_t drbl_bst;
+   bus_space_handle_t  drbl_bsh;
 };
 
 static struct resource_spec mv_mpic_spec[] = {
{ SYS_RES_MEMORY,   0,  RF_ACTIVE },
{ SYS_RES_MEMORY,   1,  RF_ACTIVE },
+   { SYS_RES_MEMORY,   2,  RF_ACTIVE },
{ -1, 0 }
 };
 
@@ -92,14 +108,21 @@ static int mv_mpic_probe(device_t);
 static int mv_mpic_attach(device_t);
 uint32_t   mv_mpic_get_cause(void);
 uint32_t   mv_mpic_get_cause_err(void);
+uint32_t   mv_mpic_get_msi(void);
 static voidarm_mask_irq_err(uintptr_t);
 static voidarm_unmask_irq_err(uintptr_t);
+static voidarm_unmask_msi(void);
 
 #define MPIC_CPU_WRITE(softc, reg, val) \
 bus_space_write_4((softc)->cpu_bst, (softc)->cpu_bsh, (reg), (val))
 #define MPIC_CPU_READ(softc, reg) \
 bus_space_read_4((softc)->cpu_bst, (softc)->cpu_bsh, (reg))
 
+#define MPIC_DRBL_WRITE(softc, reg, val) \
+bus_space_write_4((softc)->drbl_bst, (softc)->drbl_bsh, (reg), (val))
+#define MPIC_DRBL_READ(softc, reg) \
+bus_space_read_4((softc)->drbl_bst, (softc)->drbl_bsh, (reg))
+
 static int
 mv_mpic_probe(device_t dev)
 {
@@ -123,6 +146,8 @@ mv_mpic_attach(device_t dev)
return (ENXIO);
mv_mpic_sc = sc;
 
+   sc->sc_dev = dev;
+
error = bus_alloc_resources(dev, mv_mpic_spec, sc->mpic_res);
if (error) {
device_printf(dev, "could not allocate resources\n");
@@ -135,10 +160,15 @@ mv_mpic_attach(device_t dev)
sc->cpu_bst = rman_get_bustag(sc->mpic_res[1]);
sc->cpu_bsh = rman_get_bushandle(sc->mpic_res[1]);
 
+   sc->drbl_bst = rman_get_bustag(sc->mpic_res[2]);
+   sc->drbl_bsh = rman_get_bushandle(sc->mpic_res[2]);
+
bus_space_write_4(mv_mpic_sc->mpic_bst, mv_mpic_sc->mpic_bsh,
MPIC_CTRL, 1);
MPIC_CPU_WRITE(mv_mpic_sc, MPIC_CTP, 0)

svn commit: r240493 - head/sys/arm/mv

2012-09-14 Thread Grzegorz Bernacki
Author: gber
Date: Fri Sep 14 10:06:56 2012
New Revision: 240493
URL: http://svn.freebsd.org/changeset/base/240493

Log:
  Implement MSI support.
  
  MSI are implemented via Inbound Shared Doorbell 1 interrupts. Interrupts
  are triggered by writing to Software Triggered Interrupt registeri (PCIe
  card using physical address of this register in BAR0 space). There are 32
  interrupts available. It can be increased by using Doorbell 2 and
  Doorbell 3 registers to 96 interrupts.
  
  Obtained from:Marvell, Semihalf

Modified:
  head/sys/arm/mv/mv_pci.c

Modified: head/sys/arm/mv/mv_pci.c
==
--- head/sys/arm/mv/mv_pci.cFri Sep 14 10:05:01 2012(r240492)
+++ head/sys/arm/mv/mv_pci.cFri Sep 14 10:06:56 2012(r240493)
@@ -53,6 +53,8 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#include 
+
 #include 
 #include 
 
@@ -73,6 +75,12 @@ __FBSDID("$FreeBSD$");
 #include 
 #include 
 
+#ifdef DEBUG
+#define debugf(fmt, args...) do { printf(fmt,##args); } while (0)
+#else
+#define debugf(fmt, args...)
+#endif
+
 #define PCI_CFG_ENA(1 << 31)
 #define PCI_CFG_BUS(bus)   (((bus) & 0xff) << 16)
 #define PCI_CFG_DEV(dev)   (((dev) & 0x1f) << 11)
@@ -81,7 +89,6 @@ __FBSDID("$FreeBSD$");
 
 #define PCI_REG_CFG_ADDR   0x0C78
 #define PCI_REG_CFG_DATA   0x0C7C
-#define PCI_REG_P2P_CONF   0x1D14
 
 #define PCIE_REG_CFG_ADDR  0x18F8
 #define PCIE_REG_CFG_DATA  0x18FC
@@ -127,6 +134,9 @@ struct mv_pcib_softc {
bus_space_tag_t sc_bst;
int sc_rid;
 
+   struct mtx  sc_msi_mtx;
+   uint32_tsc_msi_bitmap;
+
int sc_busnr;   /* Host bridge bus number */
int sc_devnr;   /* Host bridge device number */
int sc_type;
@@ -166,6 +176,11 @@ static uint32_t mv_pcib_read_config(devi
 static void mv_pcib_write_config(device_t, u_int, u_int, u_int, u_int,
 uint32_t, int);
 static int mv_pcib_route_interrupt(device_t, device_t, int);
+#if defined(SOC_MV_ARMADAXP)
+static int mv_pcib_alloc_msi(device_t, device_t, int, int, int *);
+static int mv_pcib_map_msi(device_t, device_t, int, uint64_t *, uint32_t *);
+static int mv_pcib_release_msi(device_t, device_t, int, int *);
+#endif
 
 /*
  * Bus interface definitions.
@@ -190,7 +205,13 @@ static device_method_t mv_pcib_methods[]
DEVMETHOD(pcib_read_config, mv_pcib_read_config),
DEVMETHOD(pcib_write_config,mv_pcib_write_config),
DEVMETHOD(pcib_route_interrupt, mv_pcib_route_interrupt),
-   
+
+#if defined(SOC_MV_ARMADAXP)
+   DEVMETHOD(pcib_alloc_msi,   mv_pcib_alloc_msi),
+   DEVMETHOD(pcib_release_msi, mv_pcib_release_msi),
+   DEVMETHOD(pcib_map_msi, mv_pcib_map_msi),
+#endif
+
/* OFW bus interface */
DEVMETHOD(ofw_bus_get_compat,   ofw_bus_gen_get_compat),
DEVMETHOD(ofw_bus_get_model,ofw_bus_gen_get_model),
@@ -318,6 +339,7 @@ mv_pcib_attach(device_t self)
device_add_child(self, "pci_ep", -1);
}
 
+   mtx_init(&sc->sc_msi_mtx, "msi_mtx", NULL, MTX_DEF);
return (bus_generic_attach(self));
 
 error:
@@ -927,3 +949,80 @@ mv_pcib_intr_info(phandle_t node, struct
return (0);
 }
 
+#if defined(SOC_MV_ARMADAXP)
+static int
+mv_pcib_map_msi(device_t dev, device_t child, int irq, uint64_t *addr,
+uint32_t *data)
+{
+   struct mv_pcib_softc *sc;
+
+   sc = device_get_softc(dev);
+   irq = irq - MSI_IRQ;
+
+   /* validate parameters */
+   if (isclr(&sc->sc_msi_bitmap, irq)) {
+   device_printf(dev, "invalid MSI 0x%x\n", irq);
+   return (EINVAL);
+   }
+
+   mv_msi_data(irq, addr, data);
+
+   debugf("%s: irq: %d addr: %jx data: %x\n",
+   __func__, irq, *addr, *data);
+
+   return (0);
+}
+
+static int
+mv_pcib_alloc_msi(device_t dev, device_t child, int count,
+int maxcount __unused, int *irqs)
+{
+   struct mv_pcib_softc *sc;
+   u_int start = 0, i;
+
+   if (powerof2(count) == 0 || count > MSI_IRQ_NUM)
+   return (EINVAL);
+
+   sc = device_get_softc(dev);
+   mtx_lock(&sc->sc_msi_mtx);
+
+   for (start = 0; (start + count) < MSI_IRQ_NUM; start++) {
+   for (i = start; i < start + count; i++) {
+   if (isset(&sc->sc_msi_bitmap, i))
+   break;
+   }
+   if (i == start + count)
+   break;
+   }
+
+   if ((start + count) == MSI_IRQ_NUM) {
+   mtx_unlock(&sc->sc_msi_mtx);
+   return (ENXIO);
+   }
+
+   for (i = start; i < start + count; i++) {
+   setbit(&sc->sc_msi_bitmap, i);
+   irqs[i] = MSI_IRQ + i;
+   }
+   debugf("%s: start: %x count: %x\n", __func__, sta

Re: svn commit: r240484 - head/sys/dev/fdt

2012-09-14 Thread Grzegorz Bernacki

On 09/14/12 16:16, Aleksandr Rybalko wrote:

On Fri, 14 Sep 2012 09:33:35 + (UTC)
Grzegorz Bernacki  wrote:


Author: gber
Date: Fri Sep 14 09:33:35 2012
New Revision: 240484
URL: http://svn.freebsd.org/changeset/base/240484

Log:
   Set busaddr and bussize to 0 when fdt_get_range() fails.


Why bussize is 0?


I though that setting it to 0 makes sense, since we do not use
this variable in this function and setting it to some value could be 
confused. I could skip setting it, but I also thought it could cause 
confusion :). If you think that setting it to other value or remove it 
will be better please let me know and I will change it.


thanks
grzesiek
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Re: svn commit: r240484 - head/sys/dev/fdt

2012-09-17 Thread Grzegorz Bernacki

On 09/16/12 01:27, Aleksandr Rybalko wrote:

On Fri, 14 Sep 2012 18:41:13 +0200
Grzegorz Bernacki  wrote:


On 09/14/12 16:16, Aleksandr Rybalko wrote:

On Fri, 14 Sep 2012 09:33:35 + (UTC)
Grzegorz Bernacki   wrote:


Author: gber
Date: Fri Sep 14 09:33:35 2012
New Revision: 240484
URL: http://svn.freebsd.org/changeset/base/240484

Log:
Set busaddr and bussize to 0 when fdt_get_range() fails.


Why bussize is 0?


I though that setting it to 0 makes sense, since we do not use
this variable in this function and setting it to some value could be
confused. I could skip setting it, but I also thought it could cause
confusion :). If you think that setting it to other value or remove
it will be better please let me know and I will change it.

thanks
grzesiek


Yeah, indeed, false alarm. Sorry for noise.

But it will be very nice to hear developers opinion about ePAPR1.1 row
(about "range" property):
"If the property is not present in a bus node, it is assumed that no
mapping exists between children of the node and the parent address
space."

Assuming since in most cases root node have no "ranges" property, but
his child "SOC" have that property with defaults (0x0 x 0x).
So nodes which have property "ranges" or not, must be processed same
way. Right?

WBW


Hi,

I am not quite sure that I understand your question. What nodes are you 
referring to and what to you mean by processing them the same way?


regards,
grzesiek
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svn commit: r241157 - head/lib/libstand

2012-10-03 Thread Grzegorz Bernacki
Author: gber
Date: Wed Oct  3 10:06:48 2012
New Revision: 241157
URL: http://svn.freebsd.org/changeset/base/241157

Log:
  Correct detection of a superblock.
  
  Obtained from:Smartcom Bulgaria AD

Modified:
  head/lib/libstand/nandfs.c

Modified: head/lib/libstand/nandfs.c
==
--- head/lib/libstand/nandfs.c  Wed Oct  3 05:42:15 2012(r241156)
+++ head/lib/libstand/nandfs.c  Wed Oct  3 10:06:48 2012(r241157)
@@ -175,7 +175,7 @@ static int
 nandfs_find_super_block(struct nandfs *fs, struct open_file *f)
 {
struct nandfs_super_block *sb;
-   int i, j, n;
+   int i, j, n, s;
int sectors_to_read, error;
 
sb = malloc(fs->nf_sectorsize);
@@ -196,23 +196,22 @@ nandfs_find_super_block(struct nandfs *f
continue;
}
n = fs->nf_sectorsize / sizeof(struct nandfs_super_block);
+   s = 0;
if ((i * fs->nf_sectorsize) % fs->nf_fsdata->f_erasesize == 0) {
if (fs->nf_sectorsize == sizeof(struct nandfs_fsdata))
continue;
else {
-   sb += (sizeof(struct nandfs_fsdata) /
-   sizeof(struct nandfs_super_block));
-   n -= (sizeof(struct nandfs_fsdata) /
+   s += (sizeof(struct nandfs_fsdata) /
sizeof(struct nandfs_super_block));
}
}
 
-   for (j = 0; j < n; j++) {
+   for (j = s; j < n; j++) {
if (!nandfs_check_superblock_crc(fs->nf_fsdata, &sb[j]))
continue;
-   NANDFS_DEBUG("magic %x wtime %jd\n", sb->s_magic,
-   sb->s_wtime);
-   if (sb[j].s_wtime > fs->nf_sb->s_wtime)
+   NANDFS_DEBUG("magic %x wtime %jd, lastcp 0x%jx\n",
+   sb[j].s_magic, sb[j].s_wtime, sb[j].s_last_cno);
+   if (sb[j].s_last_cno > fs->nf_sb->s_last_cno)
memcpy(fs->nf_sb, &sb[j], sizeof(*fs->nf_sb));
}
}
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svn commit: r246205 - head/sys/kern

2013-02-01 Thread Grzegorz Bernacki
Author: gber
Date: Fri Feb  1 11:39:03 2013
New Revision: 246205
URL: http://svnweb.freebsd.org/changeset/base/246205

Log:
  Get time of next event from other cores only if SMP is already started.
  
  Reviewed by: mav
  Obtained from: Semihalf

Modified:
  head/sys/kern/kern_clocksource.c

Modified: head/sys/kern/kern_clocksource.c
==
--- head/sys/kern/kern_clocksource.cFri Feb  1 10:26:31 2013
(r246204)
+++ head/sys/kern/kern_clocksource.cFri Feb  1 11:39:03 2013
(r246205)
@@ -317,14 +317,16 @@ getnextevent(struct bintime *event)
nonidle = !state->idle;
if ((timer->et_flags & ET_FLAGS_PERCPU) == 0) {
 #ifdef SMP
-   CPU_FOREACH(cpu) {
-   if (curcpu == cpu)
-   continue;
-   state = DPCPU_ID_PTR(cpu, timerstate);
-   nonidle += !state->idle;
-   if (bintime_cmp(event, &state->nextevent, >)) {
-   *event = state->nextevent;
-   c = cpu;
+   if (smp_started) {
+   CPU_FOREACH(cpu) {
+   if (curcpu == cpu)
+   continue;
+   state = DPCPU_ID_PTR(cpu, timerstate);
+   nonidle += !state->idle;
+   if (bintime_cmp(event, &state->nextevent, >)) {
+   *event = state->nextevent;
+   c = cpu;
+   }
}
}
 #endif
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svn commit: r252694 - head/sys/arm/arm

2013-07-04 Thread Grzegorz Bernacki
Author: gber
Date: Thu Jul  4 10:38:14 2013
New Revision: 252694
URL: http://svnweb.freebsd.org/changeset/base/252694

Log:
  Fix modified bit emulation for ARMv6/v7
  
  When doing pmap_enter_locked(), enable write permission only when access
  type indicates attempt to write. Otherwise, leave the page read only but
  mark it writable in pv_flags.
  
  This will result in:
  1. Marking page writable during pmap_enter() but only when ensured that it
 will be written right away so that we will not get redundant permissions
 fault on write attempt.
  2. Keeping page read only when it is permitted to be written but there was
 no actual write attempt. Hence, we will get permissions fault on write
 access and mark page writable in pmap_fault_fixup() what will indicate
 modification status.
  
  Submitted by:   Zbigniew Bodek 
  Sponsored by:   The FreeBSD Foundation, Semihalf

Modified:
  head/sys/arm/arm/pmap-v6.c

Modified: head/sys/arm/arm/pmap-v6.c
==
--- head/sys/arm/arm/pmap-v6.c  Thu Jul  4 08:59:34 2013(r252693)
+++ head/sys/arm/arm/pmap-v6.c  Thu Jul  4 10:38:14 2013(r252694)
@@ -2801,8 +2801,13 @@ validate:
}
 
if (prot & VM_PROT_WRITE) {
-   /* Write enable */
-   npte &= ~(L2_APX);
+   /*
+* Enable write permission if the access type
+* indicates write intention. Emulate modified
+* bit otherwise.
+*/
+   if ((access & VM_PROT_WRITE) != 0)
+   npte &= ~(L2_APX);
 
if ((m->oflags & VPO_UNMANAGED) == 0) {
vm_page_aflag_set(m, PGA_WRITEABLE);
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svn commit: r252695 - head/sys/arm/arm

2013-07-04 Thread Grzegorz Bernacki
Author: gber
Date: Thu Jul  4 10:40:24 2013
New Revision: 252695
URL: http://svnweb.freebsd.org/changeset/base/252695

Log:
  Remove redundant clearing of the PGA_WRITEABLE flag in
  pmap_remove_all()
  
  This flag should already be cleared by pmap_nuke_pv()
  
  Submitted by:   Zbigniew Bodek 
  Sponsored by:   The FreeBSD Foundation, Semihalf

Modified:
  head/sys/arm/arm/pmap-v6.c

Modified: head/sys/arm/arm/pmap-v6.c
==
--- head/sys/arm/arm/pmap-v6.c  Thu Jul  4 10:38:14 2013(r252694)
+++ head/sys/arm/arm/pmap-v6.c  Thu Jul  4 10:40:24 2013(r252695)
@@ -2470,7 +2470,6 @@ pmap_remove_all(vm_page_t m)
else
cpu_tlb_flushD();
}
-   vm_page_aflag_clear(m, PGA_WRITEABLE);
rw_wunlock(&pvh_global_lock);
 }
 
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