[Qemu-devel] [PATCH] hw/pxa2xx_dma.c
The following patch fixes the problem that DMA transfers are not performed when
the DCSR_STOPINTR bit is set.
--
Thorsten
Index: hw/pxa2xx_dma.c
===
RCS file: /sources/qemu/qemu/hw/pxa2xx_dma.c,v
retrieving revision 1.5
diff -u -r1.5 pxa2xx_dma.c
--- hw/pxa2xx_dma.c 11 Nov 2007 19:47:58 - 1.5
+++ hw/pxa2xx_dma.c 15 Nov 2007 09:28:22 -
@@ -186,7 +186,8 @@
s->running = 1;
for (c = 0; c < s->channels; c ++) {
ch = &s->chan[c];
-
+
+ch->state &= ~DCSR_STOPINTR;
while ((ch->state & DCSR_RUN) && !(ch->state & DCSR_STOPINTR)) {
/* Test for pending requests */
if ((ch->cmd & (DCMD_FLOWSRC | DCMD_FLOWTRG)) && !ch->request)
[Qemu-devel] [PATCH] Gumstix board support
Hi. The following patch adds support for Gumstix connex boards. A working flash
image (after unpacking) is
http://omnibus.uni-freiburg.de/~zitteret/files/qemu/flash.bz2
Comments?
--
Thorsten
Index: Makefile.target
===
RCS file: /sources/qemu/qemu/Makefile.target,v
retrieving revision 1.223
diff -u -r1.223 Makefile.target
--- Makefile.target 11 Nov 2007 14:26:46 - 1.223
+++ Makefile.target 15 Nov 2007 09:28:21 -
@@ -499,6 +499,7 @@
VL_OBJS+= arm-semi.o
VL_OBJS+= pxa2xx.o pxa2xx_pic.o pxa2xx_gpio.o pxa2xx_timer.o pxa2xx_dma.o
VL_OBJS+= pxa2xx_lcd.o pxa2xx_mmci.o pxa2xx_pcmcia.o max111x.o max7310.o
+VL_OBJS+= pflash_cfi01.o gumstix.o
VL_OBJS+= spitz.o ads7846.o ide.o serial.o nand.o ecc.o wm8750.o
VL_OBJS+= omap.o omap_lcdc.o omap1_clk.o omap_mmc.o omap_i2c.o
VL_OBJS+= palm.o tsc210x.o
Index: vl.c
===
RCS file: /sources/qemu/qemu/vl.c,v
retrieving revision 1.361
diff -u -r1.361 vl.c
--- vl.c11 Nov 2007 20:14:28 - 1.361
+++ vl.c15 Nov 2007 09:28:22 -
@@ -7435,6 +7435,7 @@
qemu_register_machine(&palmte_machine);
qemu_register_machine(&lm3s811evb_machine);
qemu_register_machine(&lm3s6965evb_machine);
+qemu_register_machine(&connex_machine);
#elif defined(TARGET_SH4)
qemu_register_machine(&shix_machine);
qemu_register_machine(&r2d_machine);
@@ -8260,7 +8261,8 @@
if (!linux_boot && net_boot == 0 &&
hd_filename[0] == '\0' &&
(cdrom_index >= 0 && hd_filename[cdrom_index] == '\0') &&
-fd_filename[0] == '\0')
+fd_filename[0] == '\0' &&
+pflash_filename[0] == '\0')
help(1);
/* boot to floppy or the default cd if no hard disk defined yet */
Index: vl.h
===
RCS file: /sources/qemu/qemu/vl.h,v
retrieving revision 1.295
diff -u -r1.295 vl.h
--- vl.h11 Nov 2007 17:56:38 - 1.295
+++ vl.h15 Nov 2007 09:28:22 -
@@ -1254,6 +1254,9 @@
extern QEMUMachine borzoipda_machine;
extern QEMUMachine terrierpda_machine;
+/* gumstix.c */
+extern QEMUMachine connex_machine;
+
/* palm.c */
extern QEMUMachine palmte_machine;
Index: hw/gumstix.c
===
RCS file: hw/gumstix.c
diff -N hw/gumstix.c
--- /dev/null 1 Jan 1970 00:00:00 -
+++ hw/gumstix.c 15 Nov 2007 09:28:22 -
@@ -0,0 +1,73 @@
+/*
+ * Gumstix Platforms
+ *
+ * Copyright (c) 2007 by Thorsten Zitterell <[EMAIL PROTECTED]>
+ *
+ * Code based on spitz platform by Andrzej Zaborowski <[EMAIL PROTECTED]>
+ *
+ * This code is licensed under the GNU GPL v2.
+ */
+
+#include "vl.h"
+
+static void connex_smc_irq(void *opaque, int line, int level)
+{
+ /* Interrupt line of NIC is connected to GPIO line 36 */
+struct pxa2xx_state_s *cpu = (struct pxa2xx_state_s *) opaque;
+pxa2xx_gpio_set(cpu->gpio, 36, level);
+}
+
+/* Board init. */
+enum gumstix_model_e { connex };
+
+static void gumstix_common_init(int ram_size, int vga_ram_size,
+DisplayState *ds, const char *kernel_filename,
+const char *kernel_cmdline, const char *initrd_filename,
+const char *cpu_model, enum gumstix_model_e model)
+{
+ struct pxa2xx_state_s *cpu;
+
+ uint32_t gumstix_rom = 0x0200;
+ uint32_t gumstix_ram = 0x0800;
+
+ if (ram_size < (gumstix_ram + gumstix_rom + PXA2XX_INTERNAL_SIZE)) {
+ fprintf(stderr, "This platform requires %i bytes of memory\n",
+ gumstix_ram + gumstix_rom +
PXA2XX_INTERNAL_SIZE);
+ exit(1);
+ }
+
+ cpu = pxa255_init(gumstix_ram, ds);
+
+ if (pflash_table[0] == NULL) {
+ fprintf(stderr, "A flash image must be given with the 'pflash'
parameter\n");
+ exit(1);
+ }
+
+ if (!pflash_register(0x, gumstix_ram + PXA2XX_INTERNAL_SIZE,
pflash_table[0], 128*1024, 128, 2, 0, 0, 0, 0)) {
+ fprintf(stderr, "qemu: Error register flash memory.\n");
+ exit(1);
+ }
+
+ cpu->env->regs[15] = 0x;
+
+ qemu_irq *irq = qemu_allocate_irqs(connex_smc_irq, cpu, 1);
+ smc91c111_init(&nd_table[0], 0x04000300, *irq);
+}
+
+static void connex_init(int ram_size, int vga_ram_size,
+const char *boot_device, DisplayState *ds,
+const char **fd_filename, int snapshot,
+const char *kernel_filename, const char *kernel_cmdline,
+const char *initrd_filename, const char *cpu_model)
+{
+gumstix_common_init(ram_size, vga_ram_size, ds, ker
[Qemu-devel] [PATCH] hw/pxa2xx_gpio.c
This patch avoids crashing of QEMU when applications (e.g pxaregs) read the GPCR
register.
Index: pxa2xx_gpio.c
===
RCS file: /sources/qemu/qemu/hw/pxa2xx_gpio.c,v
retrieving revision 1.5
diff -u -r1.5 pxa2xx_gpio.c
--- pxa2xx_gpio.c 4 Oct 2007 19:41:17 - 1.5
+++ pxa2xx_gpio.c 16 Nov 2007 15:08:00 -
@@ -157,6 +157,11 @@
printf("%s: Read from a write-only register " REG_FMT "\n",
__FUNCTION__, offset);
return s->gpsr[bank]; /* Return last written value. */
+
+case GPCR: /* GPIO Pin-Output Clear registers */
+printf("%s: Read from a write-only register " REG_FMT "\n",
+__FUNCTION__, offset);
+return 0; /* Reading specified as unpredictable in documentation
*/
case GRER: /* GPIO Rising-Edge Detect Enable registers */
return s->rising[bank];
Re: [Qemu-devel] [PATCH] hw/pxa2xx_dma.c
Can you check if the following change would make the gumstix NIC work too? In my understanding of the specs it's more correct, but I'm not sure. It works!
[Qemu-devel] [PATCH] hw/pflash_cfi01.c
Patch to catch wrong/unknown command sequences.
Index: hw/pflash_cfi01.c
===
RCS file: /sources/qemu/qemu/hw/pflash_cfi01.c,v
retrieving revision 1.2
diff -u -r1.2 pflash_cfi01.c
--- hw/pflash_cfi01.c 17 Nov 2007 17:14:45 - 1.2
+++ hw/pflash_cfi01.c 17 Nov 2007 18:51:04 -
@@ -353,6 +353,8 @@
pfl->counter--;
break;
+default:
+goto error_flash;
}
return;
case 3: /* Confirm mode */
@@ -361,11 +363,14 @@
if (cmd == 0xd0) {
pfl->wcycle = 0;
pfl->status |= 0x80;
-break;
} else {
DPRINTF("%s: unknown command for \"write block\"\n", __func__);
PFLASH_BUG("Write block confirm");
+goto reset_flash;
}
+break;
+default:
+goto error_flash;
}
return;
default:
[Qemu-devel] [PATCH] Gumstix verdex support
Patch to add gumstix verdex board support.
Index: vl.c
===
RCS file: /sources/qemu/qemu/vl.c,v
retrieving revision 1.365
diff -u -r1.365 vl.c
--- vl.c 17 Nov 2007 17:14:38 - 1.365
+++ vl.c 17 Nov 2007 18:54:56 -
@@ -7451,6 +7451,7 @@
qemu_register_machine(&lm3s811evb_machine);
qemu_register_machine(&lm3s6965evb_machine);
qemu_register_machine(&connex_machine);
+qemu_register_machine(&verdex_machine);
#elif defined(TARGET_SH4)
qemu_register_machine(&shix_machine);
qemu_register_machine(&r2d_machine);
Index: hw/boards.h
===
RCS file: /sources/qemu/qemu/hw/boards.h,v
retrieving revision 1.1
diff -u -r1.1 boards.h
--- hw/boards.h 17 Nov 2007 17:14:40 - 1.1
+++ hw/boards.h 17 Nov 2007 18:54:56 -
@@ -77,6 +77,7 @@
/* gumstix.c */
extern QEMUMachine connex_machine;
+extern QEMUMachine verdex_machine;
/* stellaris.c */
extern QEMUMachine lm3s811evb_machine;
Index: hw/gumstix.c
===
RCS file: /sources/qemu/qemu/hw/gumstix.c,v
retrieving revision 1.3
diff -u -r1.3 gumstix.c
--- hw/gumstix.c 17 Nov 2007 17:14:42 - 1.3
+++ hw/gumstix.c 17 Nov 2007 18:54:56 -
@@ -7,6 +7,29 @@
*
* This code is licensed under the GNU GPL v2.
*/
+
+/*
+ * Example usage:
+ *
+ * connex:
+ * ===
+ * create image:
+ * # dd of=flash bs=1k count=16k if=/dev/zero
+ * # dd of=flash bs=1k conv=notrunc if=u-boot.bin
+ * # dd of=flash bs=1k conv=notrunc seek=256 if=rootfs.arm_nofpu.jffs2
+ * start it:
+ * # qemu-system-arm -M connex -pflash flash -monitor null -nographic
+ *
+ * verdex:
+ * ===
+ * create image:
+ * # dd of=flash bs=1k count=32k if=/dev/zero
+ * # dd of=flash bs=1k conv=notrunc if=u-boot.bin
+ * # dd of=flash bs=1k conv=notrunc seek=256 if=rootfs.arm_nofpu.jffs2
+ * # dd of=flash bs=1k conv=notrunc seek=31744 if=uImage
+ * start it:
+ * # qemu-system-arm -M verdex -pflash flash -monitor null -nographic -m 289
+ */
#include "hw.h"
#include "pxa.h"
@@ -16,26 +39,24 @@
#include "devices.h"
#include "boards.h"
-/* Board init. */
-enum gumstix_model_e { connex };
-
-static void gumstix_common_init(int ram_size, int vga_ram_size,
-DisplayState *ds, const char *kernel_filename,
-const char *kernel_cmdline, const char *initrd_filename,
-const char *cpu_model, enum gumstix_model_e model)
+static void connex_init(int ram_size, int vga_ram_size,
+const char *boot_device, DisplayState *ds,
+const char **fd_filename, int snapshot,
+const char *kernel_filename, const char *kernel_cmdline,
+const char *initrd_filename, const char *cpu_model)
{
struct pxa2xx_state_s *cpu;
-uint32_t gumstix_rom = 0x0200;
-uint32_t gumstix_ram = 0x0800;
+uint32_t connex_rom = 0x0100;
+uint32_t connex_ram = 0x0400;
-if (ram_size < (gumstix_ram + gumstix_rom + PXA2XX_INTERNAL_SIZE)) {
+if (ram_size < (connex_ram + connex_rom + PXA2XX_INTERNAL_SIZE)) {
fprintf(stderr, "This platform requires %i bytes of memory\n",
-gumstix_ram + gumstix_rom + PXA2XX_INTERNAL_SIZE);
+connex_ram + connex_rom + PXA2XX_INTERNAL_SIZE);
exit(1);
}
-cpu = pxa255_init(gumstix_ram, ds);
+cpu = pxa255_init(connex_ram, ds);
if (pflash_table[0] == NULL) {
fprintf(stderr, "A flash image must be given with the "
@@ -43,7 +64,7 @@
exit(1);
}
-if (!pflash_register(0x, gumstix_ram + PXA2XX_INTERNAL_SIZE,
+if (!pflash_register(0x, connex_ram + PXA2XX_INTERNAL_SIZE,
pflash_table[0], 128 * 1024, 128, 2, 0, 0, 0, 0)) {
fprintf(stderr, "qemu: Error register flash memory.\n");
exit(1);
@@ -56,18 +77,53 @@
pxa2xx_gpio_in_get(cpu->gpio)[36]);
}
-static void connex_init(int ram_size, int vga_ram_size,
+static void verdex_init(int ram_size, int vga_ram_size,
const char *boot_device, DisplayState *ds,
const char **fd_filename, int snapshot,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
-gumstix_common_init(ram_size, vga_ram_size, ds, kernel_filename,
-kernel_cmdline, initrd_filename, cpu_model, connex);
+struct pxa2xx_state_s *cpu;
+
+uint32_t verdex_rom = 0x0200;
+uint32_t verdex_ram = 0x1000;
+
+if (ram_size < (verdex_ram + verdex_rom + PXA2XX_INTERNAL_SIZE)) {
+fprintf(stderr, "This platform requires %i bytes of memory\n",
+verdex_ram + verdex_rom + PXA2XX_INTERNAL_SIZE);
+exit(1);
+}
+
+cpu = pxa270_init(verdex_ram, ds, "pxa270-c0");
+
+if (pflash_table[0] == NULL) {
+fprintf(
Re: [Qemu-devel] [PATCH] Gumstix verdex support
Hi. andrzej zaborowski wrote: On 17/11/2007, Thorsten Zitterell <[EMAIL PROTECTED]> wrote: Patch to add gumstix verdex board support. The code has: +/* Interrupt line of NIC is connected to GPIO line 49 */ +smc91c111_init(&nd_table[0], 0x04000300, +pxa2xx_gpio_in_get(cpu->gpio)[99]); Should it be 49 or 99? 99 is right. Regarding the usage example, I think not many people will look into the code for this kind of information, it would be of more use in the mailing list archives and optionally the docs. I will give better documentation and provide example images for the docs soon. Do these boards have an LCD? If not, you can pass NULL as the "ds" parameter to pxa2xx_init() I think (not tested). I see that -nographic is used in both examples. There are optional LCDs for both connex and verdex boards. I do not have one so I could not test how they are supposed to work on the real hardware. However, booting a Gumstix image in QEMU shows graphical output with the company logo when not using "-nographic". -- Thorsten
[Qemu-devel] smc91x irq patch
Hi,
I am working on a Gumstix system [1] emulation for QEMU which is based
on a Intel XScale processor. The board has an expansion card for network
support which is a smc91x compatible NIC. However, the irq line is not
directly connected to the processor's interrupt controller but to an
GPIO which triggers an irq when a level edge is detected.
The attached patch allows to give an arbitrary function as irq handler
for the smc91c111 driver - in my case a function which sets the
corresponding GPIO line.
Btw, I already put a preliminary version of the Gumstix system emulation
online [2] - many components are only partly implemented (DMA, GPIO,
PIC, flash ...). However, I can boot a flash image and log into the
Linux system.
Could you apply this patch? I have seen that other functions allow
giving an irq handler, too.
Thanks,
Thorsten
[1] www.gumstix.com
[2] http://www.bitmux.org/qemu.html
diff -upr qemu.orig/hw/integratorcp.c qemu.patches/hw/integratorcp.c
--- qemu.orig/hw/integratorcp.c 2006-07-18 18:13:25.361172000 +0200
+++ qemu.patches/hw/integratorcp.c 2006-07-18 18:31:18.151219000 +0200
@@ -501,7 +501,7 @@ static void integratorcp_init(int ram_si
if (nd_table[0].vlan) {
if (nd_table[0].model == NULL
|| strcmp(nd_table[0].model, "smc91c111") == 0) {
-smc91c111_init(&nd_table[0], 0xc800, pic, 27);
+smc91c111_init(&pic_set_irq_new,&nd_table[0], 0xc800, pic, 27);
} else {
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd_table[0].model);
exit (1);
diff -upr qemu.orig/hw/smc91c111.c qemu.patches/hw/smc91c111.c
--- qemu.orig/hw/smc91c111.c2006-07-18 18:13:25.98242 +0200
+++ qemu.patches/hw/smc91c111.c 2006-07-18 18:33:13.13023 +0200
@@ -26,6 +26,7 @@ typedef struct {
uint16_t ercv;
void *pic;
int irq;
+SetIRQFunc *set_irq;
int bank;
int packet_num;
int tx_alloc;
@@ -86,7 +87,7 @@ static void smc91c111_update(smc91c111_s
if (s->tx_fifo_done_len != 0)
s->int_level |= INT_TX;
level = (s->int_level & s->int_mask) != 0;
-pic_set_irq_new(s->pic, s->irq, level);
+(*s->set_irq)(s->pic, s->irq, level);
}
/* Try to allocate a packet. Returns 0x80 on failure. */
@@ -692,7 +693,7 @@ static CPUWriteMemoryFunc *smc91c111_wri
smc91c111_writel
};
-void smc91c111_init(NICInfo *nd, uint32_t base, void *pic, int irq)
+void smc91c111_init(SetIRQFunc *set_irq, NICInfo *nd, uint32_t base, void
*pic, int irq)
{
smc91c111_state *s;
int iomemtype;
@@ -704,6 +705,8 @@ void smc91c111_init(NICInfo *nd, uint32_
s->base = base;
s->pic = pic;
s->irq = irq;
+s->set_irq = set_irq;
+
memcpy(s->macaddr, nd->macaddr, 6);
smc91c111_reset(s);
diff -upr qemu.orig/hw/versatilepb.c qemu.patches/hw/versatilepb.c
--- qemu.orig/hw/versatilepb.c 2006-07-18 18:13:26.170931000 +0200
+++ qemu.patches/hw/versatilepb.c 2006-07-18 18:31:06.742434000 +0200
@@ -370,7 +370,7 @@ static void versatile_init(int ram_size,
if (!nd->model)
nd->model = done_smc ? "rtl8139" : "smc91c111";
if (strcmp(nd->model, "smc91c111") == 0) {
-smc91c111_init(nd, 0x1001, sic, 25);
+smc91c111_init(&pic_set_irq_new,nd, 0x1001, sic, 25);
} else {
pci_nic_init(pci_bus, nd);
}
diff -upr qemu.orig/vl.h qemu.patches/vl.h
--- qemu.orig/vl.h 2006-07-18 18:13:24.653227000 +0200
+++ qemu.patches/vl.h 2006-07-18 18:32:46.190286000 +0200
@@ -1094,7 +1094,7 @@ void ps2_queue(void *, int b);
void ps2_keyboard_set_translation(void *opaque, int mode);
/* smc91c111.c */
-void smc91c111_init(NICInfo *, uint32_t, void *, int);
+void smc91c111_init(SetIRQFunc *set_irq, NICInfo *, uint32_t, void *, int);
/* pl110.c */
void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int);
___
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Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] Run Qemu ARM system without MMU (MMUless)
Tieu Ma Dau wrote:
If I want to run Qemu ARM system to simulate a system without MMU (MMU
less), how can I do?
Thanks for your responses and best reagards,
Tieu
Hi,
according to target-arm/helper.c the MMU is enabled/disabled with
coprocessor 15.
if ((env->cp15.c1_sys & 1) == 0) {
/* MMU diusabled. */
*phys_ptr = address;
*prot = PAGE_READ | PAGE_WRITE;
} else {
/* Pagetable walk. */
}
It is disabled when QEMU starts...
--
Thorsten
___
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[Qemu-devel] ARM XScale extension
Hi,
the attached file includes preliminary support for the Intel XScale CPU.
I have also written code which emulates a Gumstix [1] system in QEMU -
based on this processor - and got a Linux kernel up and running.
Could you please apply this patch to CVS?
Comments?
I will send further patches if this is all right so far...
--
Thorsten
[1] http://www.gumstix.org
diff -u -r qemu.orig/target-arm/cpu.h qemu.new/target-arm/cpu.h
--- qemu.orig/target-arm/cpu.h 2006-02-20 01:33:36.0 +0100
+++ qemu.new/target-arm/cpu.h 2006-10-04 22:11:15.532962000 +0200
@@ -47,6 +47,8 @@
typedef struct CPUARMState {
/* Regs for current mode. */
uint32_t regs[16];
+/* Accumulator for XScale, by now only ACC0 supported */
+uint64_t acc[8];
/* Frequently accessed CPSR bits are stored separately for efficiently.
This contains all the other bits. Use cpsr_{read,write} to accless
the whole CPSR. */
@@ -69,6 +71,14 @@
uint32_t QF; /* 0 or 1 */
int thumb; /* 0 = arm mode, 1 = thumb mode */
+
+/* System control coprocessor (cp14) */
+struct {
+uint32_t pmnc; /* Performance Monitor Control Register */
+uint32_t ccnt; /* Clock Counter Register */
+uint32_t pmn0; /* Performance Count Register 0 */
+uint32_t pmn1; /* Performance Count Register 1 */
+} cp14;
/* System control coprocessor (cp15) */
struct {
@@ -200,7 +210,8 @@
enum arm_features {
ARM_FEATURE_VFP,
-ARM_FEATURE_AUXCR /* ARM1026 Auxiliary control register. */
+ARM_FEATURE_AUXCR, /* ARM1026 Auxiliary control register. */
+ARM_FEATURE_XSCALE /* Intel XScale extensions */
};
static inline int arm_feature(CPUARMState *env, int feature)
@@ -212,6 +223,7 @@
#define ARM_CPUID_ARM1026 0x4106a262
#define ARM_CPUID_ARM926 0x41069265
+#define ARM_CPUID_PXA255 0x69052d00
#if defined(CONFIG_USER_ONLY)
#define TARGET_PAGE_BITS 12
diff -u -r qemu.orig/target-arm/exec.h qemu.new/target-arm/exec.h
--- qemu.orig/target-arm/exec.h 2005-11-26 11:38:39.0 +0100
+++ qemu.new/target-arm/exec.h 2006-07-05 16:00:25.0 +0200
@@ -53,6 +53,8 @@
void cpu_lock(void);
void cpu_unlock(void);
+void helper_set_cp14(CPUState *, uint32_t, uint32_t);
+uint32_t helper_get_cp14(CPUState *, uint32_t);
void helper_set_cp15(CPUState *, uint32_t, uint32_t);
uint32_t helper_get_cp15(CPUState *, uint32_t);
diff -u -r qemu.orig/target-arm/helper.c qemu.new/target-arm/helper.c
--- qemu.orig/target-arm/helper.c 2006-09-09 16:36:26.0 +0200
+++ qemu.new/target-arm/helper.c 2006-10-04 22:12:11.995788000 +0200
@@ -40,6 +40,9 @@
{
env->cp15.c0_cpuid = id;
switch (id) {
+case ARM_CPUID_PXA255:
+set_feature(env, ARM_FEATURE_XSCALE);
+break;
case ARM_CPUID_ARM926:
set_feature(env, ARM_FEATURE_VFP);
env->vfp.xregs[ARM_VFP_FPSID] = 0x41011090;
@@ -322,13 +325,17 @@
phys_addr = (desc & 0xf000) | (address & 0xfff);
ap = (desc >> (4 + ((address >> 13) & 6))) & 3;
break;
-case 3: /* 1k page. */
-if (type == 1) {
-/* Page translation fault. */
-code = 7;
-goto do_fault;
+case 3: /* 1k page. */
+if (arm_feature(env, ARM_FEATURE_XSCALE)) {
+phys_addr = (desc & 0xf000) | (address & 0xfff);
+} else {
+if (type == 1) {
+/* Page translation fault. */
+code = 7;
+goto do_fault;
+}
+phys_addr = (desc & 0xfc00) | (address & 0x3ff);
}
-phys_addr = (desc & 0xfc00) | (address & 0x3ff);
ap = (desc >> 4) & 3;
break;
default:
@@ -391,6 +398,62 @@
return phys_addr;
}
+void helper_set_cp14(CPUState *env, uint32_t insn, uint32_t val)
+{
+uint32_t op2;
+
+op2 = (insn >> 5) & 7;
+switch ((insn >> 16) & 0xf) {
+case 0: /* Performance Monitor Control Register */
+env->cp14.pmnc = val;
+printf("Performance registers unsupported!\n");
+break;
+case 1: /* Performance Monitor Control Register */
+env->cp14.ccnt = val;
+printf("Performance registers unsupported!\n");
+break;
+case 2: /* Performance Monitor Control Register 0 */
+env->cp14.pmn0 = val;
+printf("Performance registers unsupported!\n");
+break;
+case 3: /* Performance Monitor Control Register 1 */
+env->cp14.pmn1 = val;
+printf("Performance registers unsupported!\n");
+break;
+}
+return;
+bad_reg:
+/* ??? For debugging only. Should raise illegal instruction exception. */
+cpu_abort(env, "Unimplemented cp14 register read\n");
+return;
+}
+
+uint32_t helper_get_cp14(CPUState *e
Re: [Qemu-devel] ARM XScale extension
Hi, Lennert Buytenhek wrote: > On Wed, Oct 04, 2006 at 11:49:23PM +0200, Thorsten Zitterell wrote: > >> the attached file includes preliminary support for the Intel XScale CPU. > You don't seem to truncate acc0 to 40 bits? The DSP coprocessor in > non-iWMMXt xscale cores does truncate, and some future version of Linux > (2.6.20?) might use this as a test to determine whether the CPU we're > running on is iWMMXt-capable or not: I want to emulate the PXA255. Probably the best way to differentiate between both cases is to have a new feature like "ARM_FEATURE_IWMMXT" depending on the cpu id. -- Thorsten ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
