Re: [PATCH 07/12] rust: pl011: only leave embedded object initialization in instance_init
On Fri, Dec 20, 2024 at 03:29:49PM +0100, Paolo Bonzini wrote: > Date: Fri, 20 Dec 2024 15:29:49 +0100 > From: Paolo Bonzini > Subject: [PATCH 07/12] rust: pl011: only leave embedded object > initialization in instance_init > X-Mailer: git-send-email 2.47.1 > > Leave IRQ and MMIO initialization to instance_post_init. In Rust the > two callbacks are more distinct, because only instance_post_init has a > fully initialized object available. > > While at it, add a wrapper for sysbus_init_mmio so that accesses to > the SysBusDevice correctly use shared references. > > Signed-off-by: Paolo Bonzini > --- > rust/hw/char/pl011/src/device.rs | 18 ++ > rust/qemu-api/src/sysbus.rs | 12 > 2 files changed, 22 insertions(+), 8 deletions(-) > Reviewed-by: Zhao Liu
Re: [PATCH 06/12] rust: qom: move device_id to PL011 class side
On Fri, Dec 20, 2024 at 03:29:48PM +0100, Paolo Bonzini wrote:
> Date: Fri, 20 Dec 2024 15:29:48 +0100
> From: Paolo Bonzini
> Subject: [PATCH 06/12] rust: qom: move device_id to PL011 class side
> X-Mailer: git-send-email 2.47.1
>
> There is no need to monkeypatch DeviceId::Luminary into the
> already-initialized
> PL011State. Instead, now that we can define a class hierarchy, we can define
> PL011Class and make device_id a field in there.
>
> There is also no need anymore to have "Arm" as zero, so change DeviceId into a
> wrapper for the array; all it does is provide an Index implementation
> because arrays can only be indexed by usize.
>
> Signed-off-by: Paolo Bonzini
> ---
> rust/hw/char/pl011/src/device.rs | 59 +++-
> 1 file changed, 28 insertions(+), 31 deletions(-)
...
> impl DeviceId {
> -const PL011_ID_ARM: [c_uchar; 8] = [0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0,
> 0x05, 0xb1];
> -const PL011_ID_LUMINARY: [c_uchar; 8] = [0x11, 0x00, 0x18, 0x01, 0x0d,
> 0xf0, 0x05, 0xb1];
> +const ARM: Self = Self(&[0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05,
> 0xb1]);
> +const LUMINARY: Self = Self(&[0x11, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05,
> 0xb1]);
> }
>
It seems you didn't choose to hardcode device ID to save 3 lines of code :)
Both are fine for me,
Reviewed-by: Zhao Liu
Re: [PATCH 08/12] rust: qom: make INSTANCE_POST_INIT take a shared reference
On Fri, Dec 20, 2024 at 03:29:50PM +0100, Paolo Bonzini wrote: > Date: Fri, 20 Dec 2024 15:29:50 +0100 > From: Paolo Bonzini > Subject: [PATCH 08/12] rust: qom: make INSTANCE_POST_INIT take a shared > reference > X-Mailer: git-send-email 2.47.1 > > Signed-off-by: Paolo Bonzini > --- > rust/hw/char/pl011/src/device.rs | 4 ++-- > rust/qemu-api/src/qom.rs | 8 ++-- > 2 files changed, 4 insertions(+), 8 deletions(-) > Reviewed-by: Zhao Liu
Re: [PULL 1/6] target/loongarch: Fix vldi inst
On 2024/12/25 下午7:32, Philippe Mathieu-Daudé wrote: Hi Bibo, On 25/12/24 03:40, Bibo Mao wrote: From: ghy <2247883...@qq.com> Is this authorship correct? Should it be: From: Guo Hongyu yes, this is better. Refer to the link below for a description of the vldi instructions: https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88 Fixed errors in vldi instruction implementation. Signed-off-by: Guo Hongyu to match the S-o-b? Guo Hongyu submits the first version with attachment, xianglai tests it and submit again with plain text. I added them both with S-o-b -:) What to do in this condition? Regards Bibo Mao Tested-by: Xianglai Li Signed-off-by: Xianglai Li Reviewed-by: Bibo Mao Signed-off-by: Bibo Mao --- target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Re: [PATCH 09/12] rust: qdev: expose inherited methods to subclasses of SysBusDevice
On Fri, Dec 20, 2024 at 03:29:51PM +0100, Paolo Bonzini wrote: > Date: Fri, 20 Dec 2024 15:29:51 +0100 > From: Paolo Bonzini > Subject: [PATCH 09/12] rust: qdev: expose inherited methods to subclasses > of SysBusDevice > X-Mailer: git-send-email 2.47.1 > > The ObjectDeref trait now provides all the magic that is required to fake > inheritance. Replace the "impl SysBusDevice" block of qemu_api::sysbus > with a trait, so that sysbus_init_irq() can be invoked as "self.init_irq()" > without any intermediate upcast. > > Signed-off-by: Paolo Bonzini > --- > rust/hw/char/pl011/src/device.rs | 6 ++ > rust/qemu-api/src/irq.rs | 3 +-- > rust/qemu-api/src/prelude.rs | 2 ++ > rust/qemu-api/src/sysbus.rs | 17 + > 4 files changed, 14 insertions(+), 14 deletions(-) Reviewed-by: Zhao Liu
Re: [PATCH 10/12] rust: qemu-api-macros: extend error reporting facility to parse errors
On Fri, Dec 20, 2024 at 03:29:52PM +0100, Paolo Bonzini wrote: > Date: Fri, 20 Dec 2024 15:29:52 +0100 > From: Paolo Bonzini > Subject: [PATCH 10/12] rust: qemu-api-macros: extend error reporting > facility to parse errors > X-Mailer: git-send-email 2.47.1 > > Generalize the CompileError tuple to an enum, that can be either an error > message or a parse error from syn. > > Signed-off-by: Paolo Bonzini > --- > rust/qemu-api-macros/src/lib.rs | 27 ++- > rust/qemu-api-macros/src/utils.rs | 26 ++ > 2 files changed, 36 insertions(+), 17 deletions(-) > create mode 100644 rust/qemu-api-macros/src/utils.rs > Reviewed-by: Zhao Liu
Re: [PATCH 11/12] rust: qemu-api-macros: add automatic TryFrom/TryInto derivation
On Fri, Dec 20, 2024 at 03:29:53PM +0100, Paolo Bonzini wrote: > Date: Fri, 20 Dec 2024 15:29:53 +0100 > From: Paolo Bonzini > Subject: [PATCH 11/12] rust: qemu-api-macros: add automatic TryFrom/TryInto > derivation > X-Mailer: git-send-email 2.47.1 > > This is going to be fairly common. Using a custom procedural macro > provides better error messages and automatically finds the right > type. > > Note that this is different from the same-named macro in the > derive_more crate. That one provides conversion from e.g. tuples > to enums with tuple variants, not from integers to enums. > > Signed-off-by: Paolo Bonzini > --- > rust/hw/char/pl011/src/lib.rs | 28 + > rust/qemu-api-macros/src/lib.rs | 74 - > 2 files changed, 73 insertions(+), 29 deletions(-) > This improvement is also very elegant. Reviewed-by: Zhao Liu
Re: [PATCH 12/12] rust: hide warnings for subprojects
On Fri, Dec 20, 2024 at 03:29:54PM +0100, Paolo Bonzini wrote: > Date: Fri, 20 Dec 2024 15:29:54 +0100 > From: Paolo Bonzini > Subject: [PATCH 12/12] rust: hide warnings for subprojects > X-Mailer: git-send-email 2.47.1 > > This matches cargo's own usage of "--cap-lints allow" when building > dependencies. +Add remove the unnecessary meson.build file. > Signed-off-by: Paolo Bonzini > --- > subprojects/arbitrary-int-1-rs.wrap | 3 +++ > subprojects/bilge-0.2-rs.wrap | 3 +++ > subprojects/bilge-impl-0.2-rs.wrap| 3 +++ > subprojects/either-1-rs.wrap | 3 +++ > subprojects/itertools-0.11-rs.wrap| 3 +++ > .../arbitrary-int-1-rs/meson.build| 1 + > .../packagefiles/bilge-0.2-rs/meson.build | 1 + > .../bilge-impl-0.2-rs/meson.build | 1 + > .../packagefiles/either-1-rs/meson.build | 1 + > .../itertools-0.11-rs/meson.build | 1 + > .../proc-macro-error-1-rs/meson.build | 1 + > .../proc-macro-error-attr-1-rs/meson.build| 1 + > .../packagefiles/proc-macro2-1-rs/meson.build | 1 + > .../packagefiles/quote-1-rs/meson.build | 1 + > subprojects/packagefiles/syn-2-rs/meson.build | 1 + > .../unicode-ident-1-rs/meson.build| 1 + > subprojects/proc-macro-error-1-rs.wrap| 3 +++ > subprojects/proc-macro-error-attr-1-rs.wrap | 3 +++ > subprojects/proc-macro2-1-rs.wrap | 3 +++ > subprojects/quote-1-rs.wrap | 3 +++ > subprojects/syn-2-rs.wrap | 3 +++ > subprojects/unicode-ident-1-rs.wrap | 3 +++ > subprojects/unicode-ident-1-rs/meson.build| 20 --- > 23 files changed, 44 insertions(+), 20 deletions(-) > delete mode 100644 subprojects/unicode-ident-1-rs/meson.build > Reviewed-by: Zhao Liu
Re: [PATCH 01/12] rust: qom: add ParentField
On Fri, Dec 20, 2024 at 03:29:43PM +0100, Paolo Bonzini wrote:
> Date: Fri, 20 Dec 2024 15:29:43 +0100
> From: Paolo Bonzini
> Subject: [PATCH 01/12] rust: qom: add ParentField
> X-Mailer: git-send-email 2.47.1
>
> Add a type that, together with the C function object_deinit, ensures the
> correct drop order for QOM objects relative to their superclasses.
>
> Right now it is not possible to implement the Drop trait for QOM classes
> that are defined in Rust, as the drop() function would not be called when
> the object goes away; instead what is called is ObjectImpl::INSTANCE_FINALIZE.
> It would be nice for INSTANCE_FINALIZE to just drop the object, but this has
> a problem: suppose you have
>
>pub struct MySuperclass {
>parent: DeviceState,
>field: Box,
>...
>}
>
>impl Drop for MySuperclass {
>...
>}
>
>pub struct MySubclass {
>parent: MySuperclass,
>...
>}
>
> and an instance_finalize implementation that is like
>
> unsafe extern "C" fn drop_object(obj: *mut Object) {
> unsafe { std::ptr::drop_in_place(obj.cast::()) }
> }
>
> When instance_finalize is called for MySubclass, it will walk the struct's
> list of fields and call the drop method for MySuperclass. Then, object_deinit
> recurses to the superclass and calls the same drop method again. This
> will cause double-freeing of the Box.
>
> What's happening here is that QOM wants to control the drop order of
> MySuperclass and MySubclass's fields. To do so, the parent field must
> be marked ManuallyDrop<>, which is quite ugly. Instead, add a wrapper
> type ParentField<> that is specific to QOM. This hides the implementation
> detail of *what* is special about the ParentField, and will also be easy
> to check in the #[derive(Object)] macro.
>
> Signed-off-by: Paolo Bonzini
> ---
> rust/hw/char/pl011/src/device.rs | 6 ++--
> rust/qemu-api/src/qom.rs | 56 +---
> rust/qemu-api/tests/tests.rs | 4 +--
> 3 files changed, 57 insertions(+), 9 deletions(-)
...
> unsafe extern "C" fn rust_instance_init(obj: *mut Object) {
> // SAFETY: obj is an instance of T, since rust_instance_init
> // is called from QOM core as the instance_init function
> @@ -151,8 +198,9 @@ fn as_ref(&self) -> &$parent {
> ///
> /// - the struct must be `#[repr(C)]`;
> ///
> -/// - the first field of the struct must be of the instance struct
> corresponding
> -/// to the superclass, which is `ObjectImpl::ParentType`
> +/// - the first field of the struct must be of type
> +/// [`ParentField`](ParentField), where `T` is the parent type
> +/// [`ObjectImpl::ParentType`]
> ///
> /// - likewise, the first field of the `Class` must be of the class struct
> /// corresponding to the superclass, which is
> `ObjectImpl::ParentType::Class`.
I think the "likewise" word should be deleted as well, since Class'
parent field doesn't need any wrapper because Class also doesn't have
finalize method. The remaining description is clear enough.
Others look good to me!
Reviewed-by: Zhao Liu
[PATCH v8 0/2] Support RISC-V CSR read/write in Qtest environment
These patches add functionality for unit testing RISC-V-specific registers. The first patch adds a Qtest backend, and the second implements a simple test. --- v8: - Delete RFC label. v7: - Fix build errors, add Reviewed-by, Acked-by. --- Ivan Klokov (2): target/riscv: Add RISC-V CSR qtest support tests/qtest: QTest example for RISC-V CSR register hw/riscv/riscv_hart.c| 56 tests/qtest/libqtest.c | 27 + tests/qtest/libqtest.h | 14 + tests/qtest/meson.build | 2 +- tests/qtest/riscv-csr-test.c | 56 5 files changed, 154 insertions(+), 1 deletion(-) create mode 100644 tests/qtest/riscv-csr-test.c -- 2.34.1
[PATCH v8 1/2] target/riscv: Add RISC-V CSR qtest support
The RISC-V architecture supports the creation of custom
CSR-mapped devices. It would be convenient to test them in the same way
as MMIO-mapped devices. To do this, a new call has been added
to read/write CSR registers.
Signed-off-by: Ivan Klokov
Acked-by: Fabiano Rosas
Reviewed-by: Daniel Henrique Barboza
---
hw/riscv/riscv_hart.c | 56 ++
tests/qtest/libqtest.c | 27
tests/qtest/libqtest.h | 14 +++
3 files changed, 97 insertions(+)
diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c
index bc9ffdd2d4..b8151682c0 100644
--- a/hw/riscv/riscv_hart.c
+++ b/hw/riscv/riscv_hart.c
@@ -22,6 +22,9 @@
#include "qapi/error.h"
#include "qemu/module.h"
#include "system/reset.h"
+#include "qemu/cutils.h"
+#include "sysemu/qtest.h"
+#include "sysemu/reset.h"
#include "hw/sysbus.h"
#include "target/riscv/cpu.h"
#include "hw/qdev-properties.h"
@@ -41,6 +44,55 @@ static void riscv_harts_cpu_reset(void *opaque)
cpu_reset(CPU(cpu));
}
+#ifndef CONFIG_USER_ONLY
+static void csr_call(char *cmd, uint64_t cpu_num, int csrno, uint64_t *val)
+{
+RISCVCPU *cpu = RISCV_CPU(cpu_by_arch_id(cpu_num));
+CPURISCVState *env = &cpu->env;
+
+int ret = RISCV_EXCP_NONE;
+if (strcmp(cmd, "get_csr") == 0) {
+ret = riscv_csrr(env, csrno, (target_ulong *)val);
+} else if (strcmp(cmd, "set_csr") == 0) {
+ret = riscv_csrrw(env, csrno, NULL, *(target_ulong *)val,
+MAKE_64BIT_MASK(0, TARGET_LONG_BITS));
+}
+
+g_assert(ret == RISCV_EXCP_NONE);
+}
+
+static bool csr_qtest_callback(CharBackend *chr, gchar **words)
+{
+if (strcmp(words[0], "csr") == 0) {
+
+uint64_t cpu;
+uint64_t val;
+int rc, csr;
+
+rc = qemu_strtou64(words[2], NULL, 0, &cpu);
+g_assert(rc == 0);
+rc = qemu_strtoi(words[3], NULL, 0, &csr);
+g_assert(rc == 0);
+rc = qemu_strtou64(words[4], NULL, 0, &val);
+g_assert(rc == 0);
+csr_call(words[1], cpu, csr, &val);
+
+qtest_send_prefix(chr);
+qtest_sendf(chr, "OK 0 "TARGET_FMT_lx"\n", (target_ulong)val);
+
+return true;
+}
+
+return false;
+}
+
+static void riscv_cpu_register_csr_qtest_callback(void)
+{
+static GOnce once;
+g_once(&once, (GThreadFunc)qtest_set_command_cb, csr_qtest_callback);
+}
+#endif
+
static bool riscv_hart_realize(RISCVHartArrayState *s, int idx,
char *cpu_type, Error **errp)
{
@@ -58,6 +110,10 @@ static void riscv_harts_realize(DeviceState *dev, Error
**errp)
s->harts = g_new0(RISCVCPU, s->num_harts);
+#ifndef CONFIG_USER_ONLY
+riscv_cpu_register_csr_qtest_callback();
+#endif
+
for (n = 0; n < s->num_harts; n++) {
if (!riscv_hart_realize(s, n, s->cpu_type, errp)) {
return;
diff --git a/tests/qtest/libqtest.c b/tests/qtest/libqtest.c
index 8de5f1fde3..4bc9643aad 100644
--- a/tests/qtest/libqtest.c
+++ b/tests/qtest/libqtest.c
@@ -1218,6 +1218,33 @@ uint64_t qtest_rtas_call(QTestState *s, const char *name,
return 0;
}
+static void qtest_rsp_csr(QTestState *s, uint64_t *val)
+{
+gchar **args;
+uint64_t ret;
+int rc;
+
+args = qtest_rsp_args(s, 3);
+
+rc = qemu_strtou64(args[1], NULL, 16, &ret);
+g_assert(rc == 0);
+rc = qemu_strtou64(args[2], NULL, 16, val);
+g_assert(rc == 0);
+
+g_strfreev(args);
+}
+
+uint64_t qtest_csr_call(QTestState *s, const char *name,
+ uint64_t cpu, int csr,
+ uint64_t *val)
+{
+qtest_sendf(s, "csr %s 0x%"PRIx64" %d 0x%"PRIx64"\n",
+name, cpu, csr, *val);
+
+qtest_rsp_csr(s, val);
+return 0;
+}
+
void qtest_add_func(const char *str, void (*fn)(void))
{
gchar *path = g_strdup_printf("/%s/%s", qtest_get_arch(), str);
diff --git a/tests/qtest/libqtest.h b/tests/qtest/libqtest.h
index f23d80e9e5..cd35e11d4c 100644
--- a/tests/qtest/libqtest.h
+++ b/tests/qtest/libqtest.h
@@ -600,6 +600,20 @@ uint64_t qtest_rtas_call(QTestState *s, const char *name,
uint32_t nargs, uint64_t args,
uint32_t nret, uint64_t ret);
+/**
+ * qtest_csr_call:
+ * @s: #QTestState instance to operate on.
+ * @name: name of the command to call.
+ * @cpu: hart number.
+ * @csr: CSR number.
+ * @val: Value for reading/writing.
+ *
+ * Call an RISC-V CSR read/write function
+ */
+uint64_t qtest_csr_call(QTestState *s, const char *name,
+ uint64_t cpu, int csr,
+ unsigned long *val);
+
/**
* qtest_bufread:
* @s: #QTestState instance to operate on.
--
2.34.1
[PATCH v8 2/2] tests/qtest: QTest example for RISC-V CSR register
Added demo for reading CSR register from qtest environment.
Signed-off-by: Ivan Klokov
Reviewed-by: Fabiano Rosas
Reviewed-by: Daniel Henrique Barboza
---
tests/qtest/meson.build | 2 +-
tests/qtest/riscv-csr-test.c | 56
2 files changed, 57 insertions(+), 1 deletion(-)
create mode 100644 tests/qtest/riscv-csr-test.c
diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index c5a70021c5..7eb1199d91 100644
--- a/tests/qtest/meson.build
+++ b/tests/qtest/meson.build
@@ -273,7 +273,7 @@ qtests_s390x = \
qtests_riscv32 = \
(config_all_devices.has_key('CONFIG_SIFIVE_E_AON') ?
['sifive-e-aon-watchdog-test'] : [])
-qtests_riscv64 = \
+qtests_riscv64 = ['riscv-csr-test'] + \
(unpack_edk2_blobs ? ['bios-tables-test'] : [])
qos_test_ss = ss.source_set()
diff --git a/tests/qtest/riscv-csr-test.c b/tests/qtest/riscv-csr-test.c
new file mode 100644
index 00..ff5c29e6c6
--- /dev/null
+++ b/tests/qtest/riscv-csr-test.c
@@ -0,0 +1,56 @@
+/*
+ * QTest testcase for RISC-V CSRs
+ *
+ * Copyright (c) 2024 Syntacore.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ * for more details.
+ */
+
+#include "qemu/osdep.h"
+#include "libqtest.h"
+
+#define CSR_MVENDORID 0xf11
+#define CSR_MISELECT0x350
+
+static void run_test_csr(void)
+{
+uint64_t res;
+uint64_t val = 0;
+
+QTestState *qts = qtest_init("-machine virt -cpu veyron-v1");
+
+res = qtest_csr_call(qts, "get_csr", 0, CSR_MVENDORID, &val);
+
+g_assert_cmpint(res, ==, 0);
+g_assert_cmpint(val, ==, 0x61f);
+
+val = 0xff;
+res = qtest_csr_call(qts, "set_csr", 0, CSR_MISELECT, &val);
+
+g_assert_cmpint(res, ==, 0);
+
+val = 0;
+res = qtest_csr_call(qts, "get_csr", 0, CSR_MISELECT, &val);
+
+g_assert_cmpint(res, ==, 0);
+g_assert_cmpint(val, ==, 0xff);
+
+qtest_quit(qts);
+}
+
+int main(int argc, char **argv)
+{
+g_test_init(&argc, &argv, NULL);
+
+qtest_add_func("/cpu/csr", run_test_csr);
+
+return g_test_run();
+}
--
2.34.1
Re: [PATCH 1/5] aspeed: Make sdhci_attach_drive and write_boot_rom public
On 25/12/24 03:03, Steven Lee via wrote:
sdhci_attach_drive and write_boot_rom functions may be used by
the aspeed machine supporting co-processors.
Signed-off-by: Steven Lee
---
hw/arm/aspeed.c | 4 ++--
include/hw/arm/aspeed.h | 6 ++
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index cbeacb214c..bba224c357 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -10,7 +10,9 @@
#define ARM_ASPEED_H
#include "hw/boards.h"
+#include "hw/sd/sdhci.h"
#include "qom/object.h"
+#include "system/blockdev.h"
typedef struct AspeedMachineState AspeedMachineState;
@@ -41,5 +43,9 @@ struct AspeedMachineClass {
uint32_t uart_default;
};
+void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo, bool emmc,
+ bool boot_emmc);
Indent is off.
+void write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size,
+ Error **errp);
Ditto.
Pre-existing, functions taking Error as last argument should return a
boolean indicating whether error occurred or not.
Fixing indentation:
Reviewed-by: Philippe Mathieu-Daudé
Re: [PATCH 4/5] aspeed: Introduce ast2700-fc machine
Hi Steven, On 25/12/24 03:03, Steven Lee via wrote: This patch introduces a new machine, ast2700-fc, which supports all cores available in the AST27x0 SoC. In this machine - The first 4 cores are Cortex-A35 cores. - CPU 4 is designated as the SSP core. - CPU 5 is designated as the TSP core. Test Step: wget https://github.com/stevenlee7189/zephyr/releases/download/1.0.0/ast2700-ssp.elf wget https://github.com/stevenlee7189/zephyr/releases/download/1.0.0/ast2700-tsp.elf wget https://github.com/stevenlee7189/zephyr/releases/download/1.0.0/bl31.bin wget https://github.com/stevenlee7189/zephyr/releases/download/1.0.0/tee-raw.bin wget https://github.com/stevenlee7189/zephyr/releases/download/1.0.0/u-boot-nodtb.bin wget https://github.com/stevenlee7189/zephyr/releases/download/1.0.0/u-boot.dtb wget https://github.com/stevenlee7189/zephyr/releases/download/1.0.0/image-bmc.tar.zst tar --zstd -xvf image-bmc.tar.zst qemu-system-aarch64 -machine ast2700fc \ -device loader,force-raw=on,addr=0x4,file=u-boot-nodtb.bin \ -device loader,force-raw=on,addr=$((0x4 + 748896)),file=u-boot.dtb\ -device loader,force-raw=on,addr=0x43000,file=bl31.bin\ -device loader,force-raw=on,addr=0x43008,file=tee-raw.bin\ -device loader,file=ast2700-ssp.elf,cpu-num=4 \ -device loader,file=ast2700-tsp.elf,cpu-num=5 \ -device loader,cpu-num=0,addr=0x43000 \ -device loader,cpu-num=1,addr=0x43000 \ -device loader,cpu-num=2,addr=0x43000 \ -device loader,cpu-num=3,addr=0x43000 \ -m 1G \ -drive file=image-bmc,if=mtd,format=raw \ -serial pty -serial pty -serial pty \ -S -nographic char device redirected to /dev/pts/51 (label serial0) char device redirected to /dev/pts/52 (label serial1) char device redirected to /dev/pts/53 (label serial2) tio /dev/pts/51 tio /dev/pts/52 tio /dev/pts/53 (qemu) c Could we have a functional test included in this series please? Signed-off-by: Steven Lee --- hw/arm/aspeed_ast27x0-fc.c | 211 hw/arm/meson.build | 4 +- include/hw/arm/aspeed_soc.h | 12 ++ 3 files changed, 226 insertions(+), 1 deletion(-) create mode 100644 hw/arm/aspeed_ast27x0-fc.c
Re: [PULL 1/6] target/loongarch: Fix vldi inst
Hi Bibo, On 25/12/24 03:40, Bibo Mao wrote: From: ghy <2247883...@qq.com> Is this authorship correct? Should it be: From: Guo Hongyu Refer to the link below for a description of the vldi instructions: https://jia.je/unofficial-loongarch-intrinsics-guide/lsx/misc/#synopsis_88 Fixed errors in vldi instruction implementation. Signed-off-by: Guo Hongyu to match the S-o-b? Tested-by: Xianglai Li Signed-off-by: Xianglai Li Reviewed-by: Bibo Mao Signed-off-by: Bibo Mao --- target/loongarch/tcg/insn_trans/trans_vec.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
[PATCH] qemu-ga: Optimize freeze-hook script logic of logging error
Make sure the error log of fsfreeze hooks
when freeze/thaw/snapshot could be logged
to system logs if the default logfile of
qga can't be written or other situations
Signed-off-by: Dehan Meng
---
scripts/qemu-guest-agent/fsfreeze-hook | 36 +++---
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/scripts/qemu-guest-agent/fsfreeze-hook
b/scripts/qemu-guest-agent/fsfreeze-hook
index 13aafd4845..c1feb6f5ce 100755
--- a/scripts/qemu-guest-agent/fsfreeze-hook
+++ b/scripts/qemu-guest-agent/fsfreeze-hook
@@ -19,15 +19,43 @@ is_ignored_file() {
return 1
}
+USE_SYSLOG=0
+# if log file is not writable, fallback to syslog
+[ ! -w "$LOGFILE" ] && USE_SYSLOG=1
+# try to update log file and fallback to syslog if it fails
+touch "$LOGFILE" &>/dev/null || USE_SYSLOG=1
+
+# Ensure the log file is writable, fallback to syslog if not
+log_message() {
+local message="$1"
+if [ "$USE_SYSLOG" -eq 0 ]; then
+printf "%s: %s\n" "$(date)" "$message" >>"$LOGFILE"
+else
+logger -t qemu-ga-freeze-hook "$message"
+fi
+}
+
# Iterate executables in directory "fsfreeze-hook.d" with the specified args
[ ! -d "$FSFREEZE_D" ] && exit 0
+
for file in "$FSFREEZE_D"/* ; do
is_ignored_file "$file" && continue
[ -x "$file" ] || continue
-printf "$(date): execute $file $@\n" >>$LOGFILE
-"$file" "$@" >>$LOGFILE 2>&1
-STATUS=$?
-printf "$(date): $file finished with status=$STATUS\n" >>$LOGFILE
+
+log_message "Executing $file $@"
+if [ "$USE_SYSLOG" -eq 0 ]; then
+"$file" "$@" >>"$LOGFILE" 2>&1
+STATUS=$?
+else
+"$file" "$@" 2>&1 | logger -t qemu-ga-freeze-hook
+STATUS=${PIPESTATUS[0]}
+fi
+
+if [ $STATUS -ne 0 ]; then
+log_message "Error: $file finished with status=$STATUS"
+else
+log_message "$file finished successfully"
+fi
done
exit 0
--
2.40.1
Re: [PULL 00/72] tcg patch queue
Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/10.0 for any user-visible changes. signature.asc Description: PGP signature
Re: [PATCH 02/12] rust: add a utility module for compile-time type checks
On Fri, Dec 20, 2024 at 03:29:44PM +0100, Paolo Bonzini wrote: > Date: Fri, 20 Dec 2024 15:29:44 +0100 > From: Paolo Bonzini > Subject: [PATCH 02/12] rust: add a utility module for compile-time type > checks > X-Mailer: git-send-email 2.47.1 > > It is relatively common in the low-level qemu_api code to assert that > a field of a struct has a specific type; for example, it can be used > to ensure that the fields match what the qemu_api and C code expects > for safety. > > Signed-off-by: Paolo Bonzini > --- > rust/qemu-api/meson.build | 1 + > rust/qemu-api/src/assertions.rs | 90 + > rust/qemu-api/src/lib.rs| 1 + > 3 files changed, 92 insertions(+) > create mode 100644 rust/qemu-api/src/assertions.rs > Very useful! Previously I found qdev property macro lacks such type check, but I falied to think of a good way to implement type_check in Rust, and glad to see the correct approach! Besides qdev property, I think vmstate also needs this. And I think we can make the examples as the unit tests. Reviewed-by: Zhao Liu
Re: [PATCH 03/12] rust: macros: check that the first field of a #[derive(Object)] struct is a ParentField
On Fri, Dec 20, 2024 at 03:29:45PM +0100, Paolo Bonzini wrote: > Date: Fri, 20 Dec 2024 15:29:45 +0100 > From: Paolo Bonzini > Subject: [PATCH 03/12] rust: macros: check that the first field of a > #[derive(Object)] struct is a ParentField > X-Mailer: git-send-email 2.47.1 > > Signed-off-by: Paolo Bonzini > --- > rust/qemu-api-macros/src/lib.rs | 61 +++-- > 1 file changed, 36 insertions(+), 25 deletions(-) Good idea! Reviewed-by: Zhao Liu
Re: [PULL 00/17] vfio queue
Hello Stefan, On 12/25/24 14:31, Stefan Hajnoczi wrote: Hi Cédric, Please take a look at the following 32-bit CI failure: Drat. I didn't check 32-bit ... Sorry about that. I will resend. Thanks, C.
Re: [PULL 00/17] vfio queue
Hi Cédric,
Please take a look at the following 32-bit CI failure:
i686-linux-gnu-gcc -m32 -Ilibqemu-x86_64-softmmu.a.p -I. -I.. -Itarget/i386
-I../target/i386 -Isubprojects/libvduse -I../subprojects/libvduse -Iqapi
-Itrace -Iui -Iui/shader -I/usr/include/capstone -I/usr/include/p11-kit-1
-I/usr/include/pixman-1 -I/usr/include/libpng16 -I/usr/include/spice-server
-I/usr/include/spice-1 -I/usr/include/SDL2 -I/usr/include/glib-2.0
-I/usr/lib/i386-linux-gnu/glib-2.0/include -I/usr/include/libmount
-I/usr/include/blkid -I/usr/include/gio-unix-2.0 -I/usr/include/slirp
-I/usr/include/gtk-3.0 -I/usr/include/pango-1.0 -I/usr/include/harfbuzz
-I/usr/include/freetype2 -I/usr/include/fribidi -I/usr/include/cairo
-I/usr/include/gdk-pixbuf-2.0 -I/usr/include/i386-linux-gnu
-I/usr/include/atk-1.0 -I/usr/include/at-spi2-atk/2.0 -I/usr/include/at-spi-2.0
-I/usr/include/dbus-1.0 -I/usr/lib/i386-linux-gnu/dbus-1.0/include
-I/usr/include/vte-2.91 -I/usr/include/virgl -I/usr/include/cacard
-I/usr/include/nss -I/usr/include/nspr -I/usr/include/PCSC
-I/usr/include/libusb-1.0 -I/usr/include/pipewire-0.3 -I/usr/include/spa-0.2
-I/usr/include/fuse3 -I/usr/include/uuid -fdiagnostics-color=auto -Wall
-Winvalid-pch -Werror -std=gnu11 -O2 -g -fstack-protector-strong -Wempty-body
-Wendif-labels -Wexpansion-to-defined -Wformat-security -Wformat-y2k
-Wignored-qualifiers -Wimplicit-fallthrough=2 -Winit-self
-Wmissing-format-attribute -Wmissing-prototypes -Wnested-externs
-Wold-style-declaration -Wold-style-definition -Wredundant-decls -Wshadow=local
-Wstrict-prototypes -Wtype-limits -Wundef -Wvla -Wwrite-strings
-Wno-missing-include-dirs -Wno-psabi -Wno-shift-negative-value -isystem
/builds/qemu-project/qemu/linux-headers -isystem linux-headers -iquote .
-iquote /builds/qemu-project/qemu -iquote /builds/qemu-project/qemu/include
-iquote /builds/qemu-project/qemu/host/include/i386 -iquote
/builds/qemu-project/qemu/host/include/generic -iquote
/builds/qemu-project/qemu/tcg/i386 -msse2 -mfpmath=sse -D_GNU_SOURCE
-D_LARGEFILE_SOURCE -fno-strict-aliasing -fno-common -fwrapv
-ftrivial-auto-var-init=zero -fzero-call-used-regs=used-gpr -fPIE
-D_FILE_OFFSET_BITS=64 -D__USE_FILE_OFFSET64 -D__USE_LARGEFILE64
-DUSE_POSIX_ACLS=1 -pthread -D_DEFAULT_SOURCE -D_XOPEN_SOURCE=600
-DNCURSES_WIDECHAR=1 -D_REENTRANT -DSTRUCT_IOVEC_DEFINED
-isystem../linux-headers -isystemlinux-headers -DCOMPILING_PER_TARGET
'-DCONFIG_TARGET="x86_64-softmmu-config-target.h"'
'-DCONFIG_DEVICES="x86_64-softmmu-config-devices.h"' -MD -MQ
libqemu-x86_64-softmmu.a.p/hw_vfio_igd.c.o -MF
libqemu-x86_64-softmmu.a.p/hw_vfio_igd.c.o.d -o
libqemu-x86_64-softmmu.a.p/hw_vfio_igd.c.o -c ../hw/vfio/igd.c
../hw/vfio/igd.c: In function ‘vfio_igd_pci_config_read’:
../hw/vfio/igd.c:438:18: error: format ‘%lx’ expects argument of type ‘long
unsigned int’, but argument 2 has type ‘uint64_t’ {aka ‘long long unsigned
int’} [-Werror=format=]
438 | hw_error("igd: unsupported pci config read at %lx, size %u",
| ^~
439 | offset, size);
| ~~
| |
| uint64_t {aka long long unsigned int}
../hw/vfio/igd.c: In function ‘vfio_igd_pci_config_write’:
../hw/vfio/igd.c:463:18: error: format ‘%lx’ expects argument of type ‘long
unsigned int’, but argument 2 has type ‘uint64_t’ {aka ‘long long unsigned
int’} [-Werror=format=]
463 | hw_error("igd: unsupported pci config write at %lx, size %u",
| ^~~
464 | offset, size);
| ~~
| |
| uint64_t {aka long long unsigned int}
cc1: all warnings being treated as errors
https://gitlab.com/qemu-project/qemu/-/jobs/8722428394#L6317
Once the issue has been resolved, please send a new revision of this
pull request. Thanks!
Stefan
signature.asc
Description: PGP signature
Re: [PATCH 04/12] rust: macros: check that #[derive(Object)] requires #[repr(C)]
On Fri, Dec 20, 2024 at 03:29:46PM +0100, Paolo Bonzini wrote: > Date: Fri, 20 Dec 2024 15:29:46 +0100 > From: Paolo Bonzini > Subject: [PATCH 04/12] rust: macros: check that #[derive(Object)] requires > #[repr(C)] > X-Mailer: git-send-email 2.47.1 > > Signed-off-by: Paolo Bonzini > --- > rust/qemu-api-macros/src/lib.rs | 2 ++ > 1 file changed, 2 insertions(+) > LGTM, Reviewed-by: Zhao Liu (I think this patch would be best placed before patch 3. What do you think?)
