Re: [PATCH v5 2/3] target/riscv: Add stimecmp support

2022-06-08 Thread Alistair Francis
On Mon, Jun 6, 2022 at 2:23 AM Atish Patra  wrote:
>
> On Thu, Jun 2, 2022 at 12:02 AM Alistair Francis  wrote:
> >
> > On Wed, Jun 1, 2022 at 4:16 AM Atish Patra  wrote:
> > >
> > > stimecmp allows the supervisor mode to update stimecmp CSR directly
> > > to program the next timer interrupt. This CSR is part of the Sstc
> > > extension which was ratified recently.
> > >
> > > Signed-off-by: Atish Patra 
> > > ---
> > >  target/riscv/cpu.c |  8 
> > >  target/riscv/cpu.h |  5 ++
> > >  target/riscv/cpu_bits.h|  4 ++
> > >  target/riscv/csr.c | 81 +++
> > >  target/riscv/machine.c |  1 +
> > >  target/riscv/meson.build   |  3 +-
> > >  target/riscv/time_helper.c | 98 ++
> > >  target/riscv/time_helper.h | 30 
> > >  8 files changed, 229 insertions(+), 1 deletion(-)
> > >  create mode 100644 target/riscv/time_helper.c
> > >  create mode 100644 target/riscv/time_helper.h
> > >
> > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> > > index 19f4e8294042..d58dd2f857a7 100644
> > > --- a/target/riscv/cpu.c
> > > +++ b/target/riscv/cpu.c
> > > @@ -23,6 +23,7 @@
> > >  #include "qemu/log.h"
> > >  #include "cpu.h"
> > >  #include "internals.h"
> > > +#include "time_helper.h"
> > >  #include "exec/exec-all.h"
> > >  #include "qapi/error.h"
> > >  #include "qemu/error-report.h"
> > > @@ -779,7 +780,12 @@ static void riscv_cpu_init(Object *obj)
> > >  #ifndef CONFIG_USER_ONLY
> > >  qdev_init_gpio_in(DEVICE(cpu), riscv_cpu_set_irq,
> > >IRQ_LOCAL_MAX + IRQ_LOCAL_GUEST_MAX);
> > > +
> > > +if (cpu->cfg.ext_sstc) {
> > > +riscv_timer_init(cpu);
> > > +}
> > >  #endif /* CONFIG_USER_ONLY */
> > > +
> > >  }
> > >
> > >  static Property riscv_cpu_properties[] = {
> > > @@ -806,6 +812,7 @@ static Property riscv_cpu_properties[] = {
> > >  DEFINE_PROP_BOOL("mmu", RISCVCPU, cfg.mmu, true),
> > >  DEFINE_PROP_BOOL("pmp", RISCVCPU, cfg.pmp, true),
> > >  DEFINE_PROP_BOOL("debug", RISCVCPU, cfg.debug, true),
> > > +DEFINE_PROP_BOOL("sstc", RISCVCPU, cfg.ext_sstc, true),
> >
> > Do we want this enabled by default?
> >
>
> sstc extension will result in performance improvements as it avoids
> the SBI calls & interrupt forwarding
> path. That's why I think it should be enabled by default.
>
> > >
> > >  DEFINE_PROP_STRING("priv_spec", RISCVCPU, cfg.priv_spec),
> > >  DEFINE_PROP_STRING("vext_spec", RISCVCPU, cfg.vext_spec),
> > > @@ -965,6 +972,7 @@ static void riscv_isa_string_ext(RISCVCPU *cpu, char 
> > > **isa_str, int max_str_len)
> > >  ISA_EDATA_ENTRY(zbs, ext_zbs),
> > >  ISA_EDATA_ENTRY(zve32f, ext_zve32f),
> > >  ISA_EDATA_ENTRY(zve64f, ext_zve64f),
> > > +ISA_EDATA_ENTRY(sstc, ext_sstc),
> > >  ISA_EDATA_ENTRY(svinval, ext_svinval),
> > >  ISA_EDATA_ENTRY(svnapot, ext_svnapot),
> > >  ISA_EDATA_ENTRY(svpbmt, ext_svpbmt),
> > > diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
> > > index 1119d5201066..9a5e02f217ba 100644
> > > --- a/target/riscv/cpu.h
> > > +++ b/target/riscv/cpu.h
> > > @@ -276,6 +276,9 @@ struct CPUArchState {
> > >  uint64_t mfromhost;
> > >  uint64_t mtohost;
> > >
> > > +/* Sstc CSRs */
> > > +uint64_t stimecmp;
> > > +
> > >  /* physical memory protection */
> > >  pmp_table_t pmp_state;
> > >  target_ulong mseccfg;
> > > @@ -329,6 +332,7 @@ struct CPUArchState {
> > >  float_status fp_status;
> > >
> > >  /* Fields from here on are preserved across CPU reset. */
> > > +QEMUTimer *stimer; /* Internal timer for S-mode interrupt */
> > >
> > >  hwaddr kernel_addr;
> > >  hwaddr fdt_addr;
> > > @@ -379,6 +383,7 @@ struct RISCVCPUConfig {
> > >  bool ext_counters;
> > >  bool ext_ifencei;
> > >  bool ext_icsr;
> > > +bool ext_sstc;
> > >  bool ext_svinval;
> > >  bool ext_svnapot;
> > >  bool ext_svpbmt;
> > > diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h
> > > index 4e5b630f5965..29d0e4a1be01 100644
> > > --- a/target/riscv/cpu_bits.h
> > > +++ b/target/riscv/cpu_bits.h
> > > @@ -215,6 +215,10 @@
> > >  #define CSR_STVAL   0x143
> > >  #define CSR_SIP 0x144
> > >
> > > +/* Sstc supervisor CSRs */
> > > +#define CSR_STIMECMP0x14D
> > > +#define CSR_STIMECMPH   0x15D
> > > +
> > >  /* Supervisor Protection and Translation */
> > >  #define CSR_SPTBR   0x180
> > >  #define CSR_SATP0x180
> > > diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> > > index 245f007e66e1..48d07911ae14 100644
> > > --- a/target/riscv/csr.c
> > > +++ b/target/riscv/csr.c
> > > @@ -21,6 +21,7 @@
> > >  #include "qemu/log.h"
> > >  #include "qemu/timer.h"
> > >  #include "cpu.h"
> > > +#include "time_helper.h"
> > >  #include "qemu/main-loop.h"
> > >  #include "exec/exec-all.h"
> > >  #include "sysemu/cpu-timers.h"
> > > @@ -537,6 +538,76 @@ 

Re: [PATCH v6 02/18] job.h: categorize fields in struct Job

2022-06-08 Thread Emanuele Giuseppe Esposito



Am 07/06/2022 um 17:41 schrieb Paolo Bonzini:
> On 6/7/22 15:20, Emanuele Giuseppe Esposito wrote:
>>
>>
>> Am 03/06/2022 um 18:00 schrieb Kevin Wolf:
>>> Am 14.03.2022 um 14:36 hat Emanuele Giuseppe Esposito geschrieben:
 Categorize the fields in struct Job to understand which ones
 need to be protected by the job mutex and which don't.

 Signed-off-by: Emanuele Giuseppe Esposito 
>>>
>>> I suppose it might be a result of moving things back and forth between
>>> patches, but this patch doesn't really define separate categories.
>>>
   include/qemu/job.h | 59
 ++
   1 file changed, 34 insertions(+), 25 deletions(-)

 diff --git a/include/qemu/job.h b/include/qemu/job.h
 index d1192ffd61..86ec46c09e 100644
 --- a/include/qemu/job.h
 +++ b/include/qemu/job.h
 @@ -40,27 +40,50 @@ typedef struct JobTxn JobTxn;
    * Long-running operation.
    */
   typedef struct Job {
 +
 +    /* Fields set at initialization (job_create), and never
 modified */
>>>
>>> This is clearly a comment starting a category, but I can't see any other
>>> comment indicating that another category would start.
>>>
   /** The ID of the job. May be NULL for internal jobs. */
   char *id;
   -    /** The type of this job. */
 +    /**
 + * The type of this job.
 + * All callbacks are called with job_mutex *not* held.
 + */
   const JobDriver *driver;
   -    /** Reference count of the block job */
 -    int refcnt;
 -
 -    /** Current state; See @JobStatus for details. */
 -    JobStatus status;
 -
 -    /** AioContext to run the job coroutine in */
 -    AioContext *aio_context;
 -
   /**
    * The coroutine that executes the job.  If not NULL, it is
 reentered when
    * busy is false and the job is cancelled.
 + * Initialized in job_start()
    */
   Coroutine *co;
   +    /** True if this job should automatically finalize itself */
 +    bool auto_finalize;
 +
 +    /** True if this job should automatically dismiss itself */
 +    bool auto_dismiss;
 +
 +    /** The completion function that will be called when the job
 completes.  */
 +    BlockCompletionFunc *cb;
 +
 +    /** The opaque value that is passed to the completion
 function.  */
 +    void *opaque;
 +
 +    /* ProgressMeter API is thread-safe */
 +    ProgressMeter progress;
 +
 +
>>>
>>> And the end of the series, this is where the cutoff is and the rest is:
>>>
>>>  /** Protected by job_mutex */
>>>
>>> With this in mind, it seems correct to me that everything above progress
>>> is indeed never changed after creating the job. Of course, it's hard to
>>> tell without looking at the final result, so if you have to respin for
>>> some reason, it would be good to mark the end of the section more
>>> clearly for the intermediate state to make sense.
>>
>> How can I do that? I left two empty lines in this patch, I don't know
>> what to use to signal the end of this category.
> 
> Can you already add "/** Protected by AioContext lock */" in this patch
> and then change it later?

Makes sense, thanks.

Emanuele
> 
> Paolo
> 




Re: [PATCH] ebpf: replace deprecated bpf_program__set_socket_filter

2022-06-08 Thread Jason Wang
On Tue, May 31, 2022 at 1:40 PM Zhang, Chen  wrote:
>
>
>
> > -Original Message-
> > From: Qemu-devel  > bounces+chen.zhang=intel@nongnu.org> On Behalf Of Haochen Tong
> > Sent: Saturday, May 28, 2022 3:07 AM
> > To: qemu-devel@nongnu.org
> > Cc: qemu-triv...@nongnu.org; Haochen Tong 
> > Subject: [PATCH] ebpf: replace deprecated bpf_program__set_socket_filter
> >
> > bpf_program__set_ functions have been deprecated since libbpf 0.8.
> > Replace with the equivalent bpf_program__set_type call to avoid a
> > deprecation warning.
> >
> > Signed-off-by: Haochen Tong 
>
> It looks good to me.
> By the way, add eBPF maintainers.
> Reviewed-by: Zhang Chen 

Applied.

Thanks

>
> Thanks
> Chen
>
> > ---
> >  ebpf/ebpf_rss.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/ebpf/ebpf_rss.c b/ebpf/ebpf_rss.c index 118c68da83..cee658c158
> > 100644
> > --- a/ebpf/ebpf_rss.c
> > +++ b/ebpf/ebpf_rss.c
> > @@ -49,7 +49,7 @@ bool ebpf_rss_load(struct EBPFRSSContext *ctx)
> >  goto error;
> >  }
> >
> > -bpf_program__set_socket_filter(rss_bpf_ctx-
> > >progs.tun_rss_steering_prog);
> > +bpf_program__set_type(rss_bpf_ctx->progs.tun_rss_steering_prog,
> > + BPF_PROG_TYPE_SOCKET_FILTER);
> >
> >  if (rss_bpf__load(rss_bpf_ctx)) {
> >  trace_ebpf_error("eBPF RSS", "can not load RSS program");
> > --
> > 2.36.1
> >
>




Re: [PATCH v8 00/12] hw/nvme: SR-IOV with Virtualization Enhancements

2022-06-08 Thread Klaus Jensen
On May  9 16:16, Lukasz Maniak wrote:
> Changes since v7:
> - Fixed description of hw/acpi: Make the PCI hot-plug aware of SR-IOV
> - Added description to docs: Add documentation for SR-IOV and
>   Virtualization Enhancements
> - Added Reviewed-by and Acked-by tags
> - Rebased on master
> 
> Lukasz Maniak (4):
>   hw/nvme: Add support for SR-IOV
>   hw/nvme: Add support for Primary Controller Capabilities
>   hw/nvme: Add support for Secondary Controller List
>   docs: Add documentation for SR-IOV and Virtualization Enhancements
> 
> Łukasz Gieryk (8):
>   hw/nvme: Implement the Function Level Reset
>   hw/nvme: Make max_ioqpairs and msix_qsize configurable in runtime
>   hw/nvme: Remove reg_size variable and update BAR0 size calculation
>   hw/nvme: Calculate BAR attributes in a function
>   hw/nvme: Initialize capability structures for primary/secondary
> controllers
>   hw/nvme: Add support for the Virtualization Management command
>   hw/nvme: Update the initalization place for the AER queue
>   hw/acpi: Make the PCI hot-plug aware of SR-IOV
> 
>  docs/system/devices/nvme.rst |  82 +
>  hw/acpi/pcihp.c  |   6 +-
>  hw/nvme/ctrl.c   | 673 ---
>  hw/nvme/ns.c |   2 +-
>  hw/nvme/nvme.h   |  55 ++-
>  hw/nvme/subsys.c |  75 +++-
>  hw/nvme/trace-events |   6 +
>  include/block/nvme.h |  65 
>  include/hw/pci/pci_ids.h |   1 +
>  9 files changed, 909 insertions(+), 56 deletions(-)
> 
> -- 
> 2.25.1
> 

Thanks!

Applied to nvme-next along with v3 of the CSTS fix.


signature.asc
Description: PGP signature


RE: [PATCH v7 01/13] multifd: Document the locking of MultiFD{Send/Recv}Params

2022-06-08 Thread Zhang, Chen



> -Original Message-
> From: Qemu-devel  bounces+chen.zhang=intel@nongnu.org> On Behalf Of Juan Quintela
> Sent: Tuesday, May 31, 2022 6:43 PM
> To: qemu-devel@nongnu.org
> Cc: Marcel Apfelbaum ; Philippe Mathieu-
> Daudé ; Yanan Wang ; Dr.
> David Alan Gilbert ; Juan Quintela
> ; Eduardo Habkost ; Peter
> Xu ; Leonardo Bras 
> Subject: [PATCH v7 01/13] multifd: Document the locking of
> MultiFD{Send/Recv}Params
> 
> Reorder the structures so we can know if the fields are:
> - Read only
> - Their own locking (i.e. sems)
> - Protected by 'mutex'
> - Only for the multifd channel
> 
> Signed-off-by: Juan Quintela 
> ---
>  migration/multifd.h | 90 ++---
>  1 file changed, 53 insertions(+), 37 deletions(-)
> 
> diff --git a/migration/multifd.h b/migration/multifd.h index
> 4d8d89e5e5..345cfdb50c 100644
> --- a/migration/multifd.h
> +++ b/migration/multifd.h
> @@ -65,7 +65,9 @@ typedef struct {
>  } MultiFDPages_t;
> 
>  typedef struct {
> -/* this fields are not changed once the thread is created */
> +/* Fiields are only written at creating/deletion time */

S/Fiields/Fields

Thanks
Chen

> +/* No lock required for them, they are read only */
> +
>  /* channel number */
>  uint8_t id;
>  /* channel thread name */
> @@ -74,39 +76,47 @@ typedef struct {
>  QemuThread thread;
>  /* communication channel */
>  QIOChannel *c;
> -/* sem where to wait for more work */
> -QemuSemaphore sem;
> -/* this mutex protects the following parameters */
> -QemuMutex mutex;
> -/* is this channel thread running */
> -bool running;
> -/* should this thread finish */
> -bool quit;
>  /* is the yank function registered */
>  bool registered_yank;
> +/* packet allocated len */
> +uint32_t packet_len;
> +/* multifd flags for sending ram */
> +int write_flags;
> +
> +/* sem where to wait for more work */
> +QemuSemaphore sem;
> +/* syncs main thread and channels */
> +QemuSemaphore sem_sync;
> +
> +/* this mutex protects the following parameters */
> +QemuMutex mutex;
> +/* is this channel thread running */
> +bool running;
> +/* should this thread finish */
> +bool quit;
> +/* multifd flags for each packet */
> +uint32_t flags;
> +/* global number of generated multifd packets */
> +uint64_t packet_num;
>  /* thread has work to do */
>  int pending_job;
> -/* array of pages to sent */
> +/* array of pages to sent.
> + * The owner of 'pages' depends of 'pending_job' value:
> + * pending_job == 0 -> migration_thread can use it.
> + * pending_job != 0 -> multifd_channel can use it.
> + */
>  MultiFDPages_t *pages;
> -/* packet allocated len */
> -uint32_t packet_len;
> +
> +/* thread local variables. No locking required */
> +
>  /* pointer to the packet */
>  MultiFDPacket_t *packet;
> -/* multifd flags for sending ram */
> -int write_flags;
> -/* multifd flags for each packet */
> -uint32_t flags;
>  /* size of the next packet that contains pages */
>  uint32_t next_packet_size;
> -/* global number of generated multifd packets */
> -uint64_t packet_num;
> -/* thread local variables */
>  /* packets sent through this channel */
>  uint64_t num_packets;
>  /* non zero pages sent through this channel */
>  uint64_t total_normal_pages;
> -/* syncs main thread and channels */
> -QemuSemaphore sem_sync;
>  /* buffers to send */
>  struct iovec *iov;
>  /* number of iovs used */
> @@ -120,7 +130,9 @@ typedef struct {
>  }  MultiFDSendParams;
> 
>  typedef struct {
> -/* this fields are not changed once the thread is created */
> +/* Fiields are only written at creating/deletion time */
> +/* No lock required for them, they are read only */
> +
>  /* channel number */
>  uint8_t id;
>  /* channel thread name */
> @@ -129,31 +141,35 @@ typedef struct {
>  QemuThread thread;
>  /* communication channel */
>  QIOChannel *c;
> +/* packet allocated len */
> +uint32_t packet_len;
> +
> +/* syncs main thread and channels */
> +QemuSemaphore sem_sync;
> +
>  /* this mutex protects the following parameters */
>  QemuMutex mutex;
>  /* is this channel thread running */
>  bool running;
>  /* should this thread finish */
>  bool quit;
> +/* multifd flags for each packet */
> +uint32_t flags;
> +/* global number of generated multifd packets */
> +uint64_t packet_num;
> +
> +/* thread local variables. No locking required */
> +
> +/* pointer to the packet */
> +MultiFDPacket_t *packet;
> +/* size of the next packet that contains pages */
> +uint32_t next_packet_size;
> +/* packets sent through this channel */
> +uint64_t num_packets;
>  /* ramblock host address */
>  uint8_t *host;
> -/* packet allocat

RE: [PATCH v7 05/13] multifd: Count the number of bytes sent correctly

2022-06-08 Thread Zhang, Chen



> -Original Message-
> From: Qemu-devel  bounces+chen.zhang=intel@nongnu.org> On Behalf Of Juan Quintela
> Sent: Tuesday, May 31, 2022 6:43 PM
> To: qemu-devel@nongnu.org
> Cc: Marcel Apfelbaum ; Philippe Mathieu-
> Daudé ; Yanan Wang ; Dr.
> David Alan Gilbert ; Juan Quintela
> ; Eduardo Habkost ; Peter
> Xu ; Leonardo Bras 
> Subject: [PATCH v7 05/13] multifd: Count the number of bytes sent correctly
> 
> Current code asumes that all pages are whole.  That is not true for example
> for compression already.  Fix it for creating a new field
> ->sent_bytes that includes it.
> 
> All ram_counters are used only from the migration thread, so we have two
> options:
> - put a mutex and fill everything when we sent it (not only ram_counters,
> also qemu_file->xfer_bytes).
> - Create a local variable that implements how much has been sent through
> each channel.  And when we push another packet, we "add" the previous
> stats.
> 
> I choose two due to less changes overall.  On the previous code we increase
> transferred and then we sent.  Current code goes the other way around.  It
> sents the data, and after the fact, it updates the counters.  Notice that each
> channel can have a maximum of half a megabyte of data without counting, so
> it is not very important.
> 
> Signed-off-by: Juan Quintela 
> ---
>  migration/multifd.h |  2 ++
>  migration/multifd.c | 14 ++
>  2 files changed, 8 insertions(+), 8 deletions(-)
> 
> diff --git a/migration/multifd.h b/migration/multifd.h index
> 71f49b4063..8a45dda58c 100644
> --- a/migration/multifd.h
> +++ b/migration/multifd.h
> @@ -102,6 +102,8 @@ typedef struct {
>  uint32_t flags;
>  /* global number of generated multifd packets */
>  uint64_t packet_num;
> +/* How many bytes have we sent on the last packet */
> +uint64_t sent_bytes;
>  /* thread has work to do */
>  int pending_job;
>  /* array of pages to sent.
> diff --git a/migration/multifd.c b/migration/multifd.c index
> 166246b9b7..eef47c274f 100644
> --- a/migration/multifd.c
> +++ b/migration/multifd.c
> @@ -394,7 +394,6 @@ static int multifd_send_pages(QEMUFile *f)
>  static int next_channel;
>  MultiFDSendParams *p = NULL; /* make happy gcc */
>  MultiFDPages_t *pages = multifd_send_state->pages;
> -uint64_t transferred;
> 
>  if (qatomic_read(&multifd_send_state->exiting)) {
>  return -1;
> @@ -429,10 +428,10 @@ static int multifd_send_pages(QEMUFile *f)
>  p->packet_num = multifd_send_state->packet_num++;
>  multifd_send_state->pages = p->pages;
>  p->pages = pages;
> -transferred = ((uint64_t) pages->num) * p->page_size + p->packet_len;
> -qemu_file_update_transfer(f, transferred);
> -ram_counters.multifd_bytes += transferred;
> -ram_counters.transferred += transferred;
> +ram_transferred_add(p->sent_bytes);
> +ram_counters.multifd_bytes += p->sent_bytes;
> +qemu_file_update_transfer(f, p->sent_bytes);
> +p->sent_bytes = 0;
>  qemu_mutex_unlock(&p->mutex);
>  qemu_sem_post(&p->sem);
> 
> @@ -605,9 +604,6 @@ int multifd_send_sync_main(QEMUFile *f)
>  p->packet_num = multifd_send_state->packet_num++;
>  p->flags |= MULTIFD_FLAG_SYNC;
>  p->pending_job++;
> -qemu_file_update_transfer(f, p->packet_len);
> -ram_counters.multifd_bytes += p->packet_len;
> -ram_counters.transferred += p->packet_len;
>  qemu_mutex_unlock(&p->mutex);
>  qemu_sem_post(&p->sem);
> 
> @@ -712,6 +708,8 @@ static void *multifd_send_thread(void *opaque)
>  }
> 
>  qemu_mutex_lock(&p->mutex);
> +p->sent_bytes += p->packet_len;;

Typo here about ";;" ? 

Thanks
Chen

> +p->sent_bytes += p->next_packet_size;
>  p->pending_job--;
>  qemu_mutex_unlock(&p->mutex);
> 
> --
> 2.35.3
> 




Re: [PATCH v3] hw/nvme: clean up CC register write logic

2022-06-08 Thread Łukasz Gieryk
On Tue, Jun 07, 2022 at 01:23:20PM +0200, Klaus Jensen wrote:
> From: Klaus Jensen 
> 
> The SRIOV series exposed an issued with how CC register writes are
> handled and how CSTS is set in response to that. Specifically, after
> applying the SRIOV series, the controller could end up in a state with
> CC.EN set to '1' but with CSTS.RDY cleared to '0', causing drivers to
> expect CSTS.RDY to transition to '1' but timing out.
> 
> Clean this up.
> 
> Signed-off-by: Klaus Jensen 
> Reviewed-by: Lukasz Maniak 
> ---
> v3:
>   * clear intms/intmc/cc regardless of reset type
> 
>  hw/nvme/ctrl.c | 38 --
>  1 file changed, 16 insertions(+), 22 deletions(-)
> 
> diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
> index 658584d417fe..a558f5cb29c1 100644
> --- a/hw/nvme/ctrl.c
> +++ b/hw/nvme/ctrl.c
> @@ -6190,10 +6190,15 @@ static void nvme_ctrl_reset(NvmeCtrl *n, 
> NvmeResetType rst)
>  
>  if (pci_is_vf(pci_dev)) {
>  sctrl = nvme_sctrl(n);
> +
>  stl_le_p(&n->bar.csts, sctrl->scs ? 0 : NVME_CSTS_FAILED);
>  } else {
>  stl_le_p(&n->bar.csts, 0);
>  }
> +
> +stl_le_p(&n->bar.intms, 0);
> +stl_le_p(&n->bar.intmc, 0);
> +stl_le_p(&n->bar.cc, 0);
>  }
>  
>  static void nvme_ctrl_shutdown(NvmeCtrl *n)
> @@ -6405,20 +6410,21 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr 
> offset, uint64_t data,
>  nvme_irq_check(n);
>  break;
>  case NVME_REG_CC:
> +stl_le_p(&n->bar.cc, data);
> +
>  trace_pci_nvme_mmio_cfg(data & 0x);
>  
> -/* Windows first sends data, then sends enable bit */
> -if (!NVME_CC_EN(data) && !NVME_CC_EN(cc) &&
> -!NVME_CC_SHN(data) && !NVME_CC_SHN(cc))
> -{
> -cc = data;
> +if (NVME_CC_SHN(data) && !(NVME_CC_SHN(cc))) {
> +trace_pci_nvme_mmio_shutdown_set();
> +nvme_ctrl_shutdown(n);
> +csts &= ~(CSTS_SHST_MASK << CSTS_SHST_SHIFT);
> +csts |= NVME_CSTS_SHST_COMPLETE;
> +} else if (!NVME_CC_SHN(data) && NVME_CC_SHN(cc)) {
> +trace_pci_nvme_mmio_shutdown_cleared();
> +csts &= ~(CSTS_SHST_MASK << CSTS_SHST_SHIFT);
>  }
>  
>  if (NVME_CC_EN(data) && !NVME_CC_EN(cc)) {
> -cc = data;
> -
> -/* flush CC since nvme_start_ctrl() needs the value */
> -stl_le_p(&n->bar.cc, cc);
>  if (unlikely(nvme_start_ctrl(n))) {
>  trace_pci_nvme_err_startfail();
>  csts = NVME_CSTS_FAILED;
> @@ -6429,22 +6435,10 @@ static void nvme_write_bar(NvmeCtrl *n, hwaddr 
> offset, uint64_t data,
>  } else if (!NVME_CC_EN(data) && NVME_CC_EN(cc)) {
>  trace_pci_nvme_mmio_stopped();
>  nvme_ctrl_reset(n, NVME_RESET_CONTROLLER);
> -cc = 0;
> -csts &= ~NVME_CSTS_READY;
> -}
>  
> -if (NVME_CC_SHN(data) && !(NVME_CC_SHN(cc))) {
> -trace_pci_nvme_mmio_shutdown_set();
> -nvme_ctrl_shutdown(n);
> -cc = data;
> -csts |= NVME_CSTS_SHST_COMPLETE;
> -} else if (!NVME_CC_SHN(data) && NVME_CC_SHN(cc)) {
> -trace_pci_nvme_mmio_shutdown_cleared();
> -csts &= ~NVME_CSTS_SHST_COMPLETE;
> -cc = data;
> +break;
>  }
>  
> -stl_le_p(&n->bar.cc, cc);
>  stl_le_p(&n->bar.csts, csts);
>  
>  break;
> -- 
> 2.36.1

Reviewed-by: Łukasz Gieryk 




Re: [PATCH v4 1/3] target/m68k: Eliminate m68k_semi_is_fseek

2022-06-08 Thread Laurent Vivier

Le 08/06/2022 à 00:26, Richard Henderson a écrit :

Reorg m68k_semi_return_* to gdb_syscall_complete_cb.
Use the 32-bit version normally, and the 64-bit version
for HOSTED_LSEEK.

Signed-off-by: Richard Henderson 
---
  target/m68k/m68k-semi.c | 55 +
  1 file changed, 23 insertions(+), 32 deletions(-)



Reviewed-by: Laurent Vivier 




Re: [PATCH v4 2/3] target/m68k: Make semihosting system only

2022-06-08 Thread Laurent Vivier

Le 08/06/2022 à 00:26, Richard Henderson a écrit :

While we had a call to do_m68k_semihosting in linux-user, it
wasn't actually reachable.  We don't include DISAS_INSN(halt)
as an instruction unless system mode.

Signed-off-by: Richard Henderson 
---
  linux-user/m68k/cpu_loop.c |  5 -
  target/m68k/m68k-semi.c| 36 
  target/m68k/meson.build|  6 --
  3 files changed, 4 insertions(+), 43 deletions(-)


Reviewed-by: Laurent Vivier 




Re: [PATCH v4 3/3] target/m68k: Use semihosting/syscalls.h

2022-06-08 Thread Laurent Vivier

Le 08/06/2022 à 00:26, Richard Henderson a écrit :

This separates guest file descriptors from host file descriptors,
and utilizes shared infrastructure for integration with gdbstub.

Signed-off-by: Richard Henderson 
---
  target/m68k/m68k-semi.c | 306 ++--
  1 file changed, 76 insertions(+), 230 deletions(-)



Reviewed-by: Laurent Vivier 




Re: [PATCH v4 0/3] target/m68k: semihosting cleanup

2022-06-08 Thread Laurent Vivier

Le 08/06/2022 à 00:26, Richard Henderson a écrit :

Based-on: <20220607204557.658541-1-richard.hender...@linaro.org>
("[PATCH v4 00/53] semihosting cleanup")

Changes for v4:
   * Split out of v2.
   * Convert host errno to gdb errno, which for m68k is guest errno.



How do you test semihosting on m68k?

Thanks,
Laurent



Re: [PATCH v5 15/45] block: refactor bdrv_remove_file_or_backing_child to bdrv_remove_child

2022-06-08 Thread Hanna Reitz

On 30.03.22 23:28, Vladimir Sementsov-Ogievskiy wrote:

Now the function can remove any child, so give it more common name.
Drop assertions and drop bs argument which becomes unused. Function
would be reused in a further commit.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  block.c | 22 --
  1 file changed, 8 insertions(+), 14 deletions(-)


Good!


diff --git a/block.c b/block.c
index 6b43e101a1..ea5687edc8 100644
--- a/block.c
+++ b/block.c


[...]


-static TransactionActionDrv bdrv_remove_filter_or_cow_child_drv = {
-.commit = bdrv_remove_filter_or_cow_child_commit,
+static TransactionActionDrv bdrv_remove_child_drv = {
+.commit = bdrv_remove_child_commit,
  };
  
  /*

   * A function to remove backing or file child of @bs.


I think it’d make sense to update this description here.


   * Function doesn't update permissions, caller is responsible for this.
   */
-static void bdrv_remove_file_or_backing_child(BlockDriverState *bs,
-  BdrvChild *child,
-  Transaction *tran)
+static void bdrv_remove_child(BdrvChild *child, Transaction *tran)
  {
-assert(child == bs->backing || child == bs->file);
-
  if (!child) {
  return;
  }





Re: [PATCH RFC 0/2] arm: enable MTE for QEMU + kvm

2022-06-08 Thread Cornelia Huck
On Thu, May 12 2022, Cornelia Huck  wrote:

> This series enables MTE for kvm guests, if the kernel supports it.
> Lightly tested while running under the simulator (the arm64/mte/
> kselftests pass... if you wait patiently :)
>
> A new cpu property "mte" (defaulting to on if possible) is introduced;
> for tcg, you still need to enable mte at the machine as well.
>
> I've hacked up some very basic qtests; not entirely sure if I'm going
> about it the right way.
>
> Some things to look out for:
> - Migration is not (yet) supported. I added a migration blocker if we
>   enable mte in the kvm case. AFAIK, there isn't any hardware available
>   yet that allows mte + kvm to be used (I think the latest Gravitons
>   implement mte, but no bare metal instances seem to be available), so
>   that should not have any impact on real world usage.

...so it seems there was a series some time ago related to MTE +
migration, which my initial search somehow managed to avoid.

https://lore.kernel.org/all/cajc+z1fzxsyb_zjit4+0utr-88vqql+-01xnmsefua-dxdy...@mail.gmail.com/
talks about some kernel changes needed in order to support postcopy; has
there been any update, as my search fu might be failing me again?

> - I'm not at all sure about the interaction between the virt machine 'mte'
>   prop and the cpu 'mte' prop. To keep things working with tcg as before,
>   a not-specified mte for the cpu should simply give us a guest without
>   mte if it wasn't specified for the machine. However, mte on the cpu
>   without mte on the machine should probably generate an error, but I'm not
>   sure how to detect that without breaking the silent downgrade to preserve
>   existing behaviour.
> - As I'm still new to arm, please don't assume that I know what I'm doing :)
>
>
> Cornelia Huck (2):
>   arm/kvm: enable MTE if available
>   qtests/arm: add some mte tests
>
>  target/arm/cpu.c   | 18 +++-
>  target/arm/cpu.h   |  4 ++
>  target/arm/cpu64.c | 78 ++
>  target/arm/kvm64.c |  5 +++
>  target/arm/kvm_arm.h   | 12 ++
>  target/arm/monitor.c   |  1 +
>  tests/qtest/arm-cpu-features.c | 31 ++
>  7 files changed, 137 insertions(+), 12 deletions(-)




Re: [PATCH v5 16/45] block: drop bdrv_detach_child()

2022-06-08 Thread Hanna Reitz

On 30.03.22 23:28, Vladimir Sementsov-Ogievskiy wrote:

The only caller is bdrv_root_unref_child(), let's just do the logic
directly in it. It simplifies further convertion of
bdrv_root_unref_child() to transaction action.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  block.c | 45 ++---
  1 file changed, 18 insertions(+), 27 deletions(-)


Reviewed-by: Hanna Reitz 




Re: [PATCH] util: NUMA aware memory preallocation

2022-06-08 Thread David Hildenbrand
On 11.05.22 11:34, Daniel P. Berrangé wrote:
> On Wed, May 11, 2022 at 11:31:23AM +0200, David Hildenbrand wrote:
 Long story short, management application has no way of learning
 TIDs of allocator threads so it can't make them run NUMA aware.
>>>
>>> This feels like the key issue. The preallocation threads are
>>> invisible to libvirt, regardless of whether we're doing coldplug
>>> or hotplug of memory-backends. Indeed the threads are invisible
>>> to all of QEMU, except the memory backend code.
>>>
>>> Conceptually we need 1 or more explicit worker threads, that we
>>> can assign CPU affinity to, and then QEMU can place jobs on them.
>>> I/O threads serve this role, but limited to blockdev work. We
>>> need a generalization of I/O threads, for arbitrary jobs that
>>> QEMU might want to farm out to specific numa nodes.
>>
>> At least the "-object iothread" thingy can already be used for actions
>> outside of blockdev. virtio-balloon uses one for free page hinting.
> 
> Ah that's good to know, so my idea probably isn't so much work as
> I thought it might be.

Looking into the details, iothreads are the wrong tool to use here.

I can imagine use cases where you'd want to perform preallcoation
* Only one some specific CPUs of a NUMA node (especially, not ones where 
  we pinned VCPUs)
* On CPUs that are on a different NUMA node then the actual backend 
  memory ... just thinking about all of the CPU-less nodes for PMEM and 
  CXL that we're starting to see.


So ideally, we'd let the user configure either
* Set of physical CPUs to use (low hanging fruit)
* Set of NUMA nodes to use (harder)
and allow libvirt to easily configure it similarly by pinning threads.

As CPU affinity is inherited when creating a new thread, so here is one
IMHO reasonable simple thing to get the job done and allow for such
flexibility.


Introduce a "thread-context" user-creatable object that is used to
configure CPU affinity.

Internally, thread-context creates exactly one thread called "TC $id".
That thread serves no purpose besides spawning new threads that inherit the
affinity.

Internal users (like preallocation, but we could reuse the same concept for 
other
non-io threads, such as userfaultfd, and some other potential non-io thread
users) simply use that thread context to spawn new threads.


Spawned threads get called "TC $id/$threadname", whereby $threadname is the
ordinary name supplied by the internal user. This could be used to identify
long-running threads if needed in the future.

It's worth nothing that this is not a thread pool.


a) Ordinary cmdline usage:

-object thread-context,id="tc1",cpus=0-9,cpus=12

QEMU tries setting the CPU affinity and fails if that's impossible.

-object 
memory-backend-file,...,prealloc=on,prealloc-threads=16,prealloc-thread-context=tc1

When a context is set, preallcoation code will use the thread-context to spawn 
threads.


b) Libvirt, ..., usage:

-object thread-context,id="tc1"

Then, libvirt identifies and sets the affinity for the "TC tc1" thread.

-object 
memory-backend-file,...,prealloc=on,prealloc-threads=16,prealloc-thread-context=tc1



thread-context can be reused for successive preallcoation etc, obviously.


-- 
Thanks,

David / dhildenb




Re: [PATCH v5 0/5] i386/pc: Fix creation of >= 1010G guests on AMD systems with IOMMU

2022-06-08 Thread Joao Martins
On 5/20/22 11:45, Joao Martins wrote:
> v4[5] -> v5:
> * Fixed the 32-bit build(s) (patch 1, Michael Tsirkin)
> * Fix wrong reference (patch 4) to TCG_PHYS_BITS in code comment and
> commit message;
> 
> ---
> 
> This series lets Qemu spawn i386 guests with >= 1010G with VFIO,
> particularly when running on AMD systems with an IOMMU.
> 
> Since Linux v5.4, VFIO validates whether the IOVA in DMA_MAP ioctl is valid 
> and it
> will return -EINVAL on those cases. On x86, Intel hosts aren't particularly
> affected by this extra validation. But AMD systems with IOMMU have a hole in
> the 1TB boundary which is *reserved* for HyperTransport I/O addresses located
> here: FD__h - FF__h. See IOMMU manual [1], specifically
> section '2.1.2 IOMMU Logical Topology', Table 3 on what those addresses mean.
> 
> VFIO DMA_MAP calls in this IOVA address range fall through this check and 
> hence return
>  -EINVAL, consequently failing the creation the guests bigger than 1010G. 
> Example
> of the failure:
> 
> qemu-system-x86_64: -device vfio-pci,host=:41:10.1,bootindex=-1: 
> VFIO_MAP_DMA: -22
> qemu-system-x86_64: -device vfio-pci,host=:41:10.1,bootindex=-1: vfio 
> :41:10.1: 
>   failed to setup container for group 258: memory listener initialization 
> failed:
>   Region pc.ram: vfio_dma_map(0x55ba53e7a9d0, 0x1, 
> 0xff3000, 0x7ed243e0) = -22 (Invalid argument)
> 
> Prior to v5.4, we could map to these IOVAs *but* that's still not the right 
> thing
> to do and could trigger certain IOMMU events (e.g. INVALID_DEVICE_REQUEST), or
> spurious guest VF failures from the resultant IOMMU target abort (see Errata 
> 1155[2])
> as documented on the links down below.
> 
> This small series tries to address that by dealing with this AMD-specific 1Tb 
> hole,
> but rather than dealing like the 4G hole, it instead relocates RAM above 4G
> to be above the 1T if the maximum RAM range crosses the HT reserved range.
> It is organized as following:
> 
> patch 1: Introduce a @above_4g_mem_start which defaults to 4 GiB as starting
>  address of the 4G boundary
> 
> patches 2-3: Move pci-host qdev creation to be before pc_memory_init(),
>to get accessing to pci_hole64_size. The actual pci-host
>initialization is kept as is, only the qdev_new.
> 
> patch 4: Change @above_4g_mem_start to 1TiB /if we are on AMD and the max
> possible address acrosses the HT region. Errors out if the phys-bits is too
> low, which is only the case for >=1010G configurations or something that
> crosses the HT region.
> 
> patch 5: Ensure valid IOVAs only on new machine types, but not older
> ones (<= v7.0.0)
> 
> The 'consequence' of this approach is that we may need more than the default
> phys-bits e.g. a guest with >1010G, will have most of its RAM after the 1TB
> address, consequently needing 41 phys-bits as opposed to the default of 40
> (TCG_PHYS_ADDR_BITS). Today there's already a precedent to depend on the user 
> to
> pick the right value of phys-bits (regardless of this series), so we warn in
> case phys-bits aren't enough. Finally, CMOS loosing its meaning of the above 
> 4G
> ram blocks, but it was mentioned over RFC that CMOS is only useful for very
> old seabios. 
> 
> Additionally, the reserved region is added to E820 if the relocation is done.
> 
> Alternative options considered (in RFC[0]):
> 
> a) Dealing with the 1T hole like the 4G hole -- which also represents what
> hardware closely does.
> 
> Thanks,
>   Joao
> 

Ping?

> Older Changelog,
> 
> v3[4] -> v4[5]:
> (changes in patch 4 and 5 only)
> * Rebased to 7.1.0, hence move compat machine attribute to <= 7.0.0 versions
> * Check guest vCPU vendor rather than host CPU vendor (Michael Tsirkin)
> * Squash previous patch 5 into patch 4 to tie in the phys-bits check
>   into the relocate-4g-start logic: We now error out if the phys-bits
>   aren't enough on configurations that require above-4g ram relocation. 
> (Michael Tsirkin)
> * Make the error message more explicit when phys-bits isn't enough to also
>   mention: "cannot avoid AMD HT range"
> * Add comments inside x86_update_above_4g_mem_start() explaining the
>   logic behind it. (Michael Tsirkin)
> * Tested on old guests old guests with Linux 2.6.32/3.10/4.14.35/4.1 based 
> kernels
>   alongside Win2008/2K12/2K16/2K19 on configs spanning 1T and 2T (Michael 
> Tsirkin)
>   Validated -numa topologies too as well as making sure qtests observe no 
> regressions;
> 
>  Notes from v4:
> 
> * the machine attribute that enables this new logic (see last patch)
> is called ::enforce_valid_iova since the RFC. Let me know if folks think it
> is poorly named, and whether something a bit more obvious is preferred
> (e.g. ::amd_relocate_1t).
> 
> * @mst one of the comments you said was to add "host checks" in vdpa/vfio 
> devices.
> In discussion with Alex and you over the last version of the patches it seems
> that we weren't keen on making this device-spe

Re: [PATCH v8 00/12] hw/nvme: SR-IOV with Virtualization Enhancements

2022-06-08 Thread Lukasz Maniak
On Wed, Jun 08, 2022 at 10:28:55AM +0200, Klaus Jensen wrote:
> On May  9 16:16, Lukasz Maniak wrote:
> > Changes since v7:
> > - Fixed description of hw/acpi: Make the PCI hot-plug aware of SR-IOV
> > - Added description to docs: Add documentation for SR-IOV and
> >   Virtualization Enhancements
> > - Added Reviewed-by and Acked-by tags
> > - Rebased on master
> > 
> > Lukasz Maniak (4):
> >   hw/nvme: Add support for SR-IOV
> >   hw/nvme: Add support for Primary Controller Capabilities
> >   hw/nvme: Add support for Secondary Controller List
> >   docs: Add documentation for SR-IOV and Virtualization Enhancements
> > 
> > Łukasz Gieryk (8):
> >   hw/nvme: Implement the Function Level Reset
> >   hw/nvme: Make max_ioqpairs and msix_qsize configurable in runtime
> >   hw/nvme: Remove reg_size variable and update BAR0 size calculation
> >   hw/nvme: Calculate BAR attributes in a function
> >   hw/nvme: Initialize capability structures for primary/secondary
> > controllers
> >   hw/nvme: Add support for the Virtualization Management command
> >   hw/nvme: Update the initalization place for the AER queue
> >   hw/acpi: Make the PCI hot-plug aware of SR-IOV
> > 
> >  docs/system/devices/nvme.rst |  82 +
> >  hw/acpi/pcihp.c  |   6 +-
> >  hw/nvme/ctrl.c   | 673 ---
> >  hw/nvme/ns.c |   2 +-
> >  hw/nvme/nvme.h   |  55 ++-
> >  hw/nvme/subsys.c |  75 +++-
> >  hw/nvme/trace-events |   6 +
> >  include/block/nvme.h |  65 
> >  include/hw/pci/pci_ids.h |   1 +
> >  9 files changed, 909 insertions(+), 56 deletions(-)
> > 
> > -- 
> > 2.25.1
> > 
> 
> Thanks!
> 
> Applied to nvme-next along with v3 of the CSTS fix.

Yay! That's great news.

Thank you :)



Re: [PATCH v5 17/45] block: drop bdrv_remove_filter_or_cow_child

2022-06-08 Thread Hanna Reitz

On 30.03.22 23:28, Vladimir Sementsov-Ogievskiy wrote:

Drop this simple wrapper used only in one place. We have too many graph
modifying functions even without it.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  block.c | 15 +--
  1 file changed, 1 insertion(+), 14 deletions(-)


Reviewed-by: Hanna Reitz 




[PATCH] target/mips: make SEMIHOSTING conditional on TCG

2022-06-08 Thread Alex Bennée
Previously SEMIHOSTING was always selected due to requirements in the
helper files. Since the original fix there has been refactoring in the
mips code to split TCG and KVM code. The recent semihosting
refactoring triggers the inverse build problem for KVM only mips
builds. Instead of selecting it in the common config make it optional
on TCG being enabled in the target Kconfig.

Signed-off-by: Alex Bennée 
Cc: Richard Henderson 
---
 configs/devices/mips-softmmu/common.mak | 3 ---
 target/mips/Kconfig | 1 +
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/configs/devices/mips-softmmu/common.mak 
b/configs/devices/mips-softmmu/common.mak
index d2202c839e..89906777ae 100644
--- a/configs/devices/mips-softmmu/common.mak
+++ b/configs/devices/mips-softmmu/common.mak
@@ -1,8 +1,5 @@
 # Common mips*-softmmu CONFIG defines
 
-# CONFIG_SEMIHOSTING is always required on this architecture
-CONFIG_SEMIHOSTING=y
-
 CONFIG_ISA_BUS=y
 CONFIG_PCI=y
 CONFIG_PCI_DEVICES=y
diff --git a/target/mips/Kconfig b/target/mips/Kconfig
index 6adf145354..4918fa42e9 100644
--- a/target/mips/Kconfig
+++ b/target/mips/Kconfig
@@ -1,5 +1,6 @@
 config MIPS
 bool
+select SEMIHOSTING if TCG
 
 config MIPS64
 bool
-- 
2.30.2




Re: [PATCH v5 18/45] block: bdrv_refresh_perms(): allow external tran

2022-06-08 Thread Hanna Reitz

On 30.03.22 23:28, Vladimir Sementsov-Ogievskiy wrote:

Allow passing external Transaction pointer, stop creating extra
Transaction objects.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  block.c | 31 ---
  1 file changed, 20 insertions(+), 11 deletions(-)


Reviewed-by: Hanna Reitz 




Re: [PATCH 2/3] target/mips: implement Octeon-specific BBIT instructions

2022-06-08 Thread Pavel Dovgalyuk

On 07.06.2022 20:06, Richard Henderson wrote:

On 6/7/22 01:59, Pavel Dovgalyuk wrote:

+# Branch on bit set or clear
+# BBIT0  110010 . . 
+# BBIT032    110110 . . 
+# BBIT1  111010 . . 
+# BBIT132    10 . . 
+
+BBIT 11 set:1 shift:1 10 rs:5 p:5 offset:16


shift + p are logically one field -- all you need to do is concatenate 
them.


%bbit_p 28:1 16:5
BBIT    11 set:1 . 10 rs:5 . offset:16  p=%bbit_p


Thank you.
I will make a new version soon.




+    if (ctx->hflags & MIPS_HFLAG_BMASK) {
+#ifdef MIPS_DEBUG_DISAS
+    LOG_DISAS("Branch in delay / forbidden slot at PC 0x"
+  TARGET_FMT_lx "\n", ctx->base.pc_next);
+#endif


Ifdef isn't needed -- it's always defined, even to 0.


+    tcg_gen_andi_tl(t0, t0, 1ULL << p);
+
+    /* Jump conditions */
+    if (a->set) {
+    tcg_gen_setcondi_tl(TCG_COND_NE, bcond, t0, 0);
+    } else {
+    tcg_gen_setcondi_tl(TCG_COND_EQ, bcond, t0, 0);
+    }


You don't need to produce a boolean, MIPS_HFLAG_BC tests for non-zero.  
Thus you can simplify this to


     p = tcg_constant_tl(1ull << a->p);
     if (a->set) {
     tcg_gen_and_tl(bcond, rs, p);
     } else {
     tcg_gen_andc_tl(bcond, p, rs);
     }


r~





Re: [PATCH v5 19/45] block: refactor bdrv_list_refresh_perms to allow any list of nodes

2022-06-08 Thread Hanna Reitz

On 30.03.22 23:28, Vladimir Sementsov-Ogievskiy wrote:

We are going to increase usage of collecting nodes in a list to then
update, and calling bdrv_topological_dfs() each time is not convenient,
and not correct as we are going to interleave graph modifying with
filling the node list.

So, let's switch to a function that takes any list of nodes, adds all
their subtrees and do topological sort. And finally, refresh
permissions.

While being here, make the function public, as we'll want to use it
from blockdev.c in near future.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  block.c | 51 ---
  1 file changed, 32 insertions(+), 19 deletions(-)

diff --git a/block.c b/block.c
index f3ed351360..9009f73534 100644
--- a/block.c
+++ b/block.c


[...]


@@ -2510,6 +2514,24 @@ static int bdrv_list_refresh_perms(GSList *list, 
BlockReopenQueue *q,
  return 0;
  }
  
+/*

+ * @list is any list of nodes. List is completed by all subtreees and


*subtrees

With that fixed:

Reviewed-by: Hanna Reitz 


+ * topologically sorted. It's not a problem if some node occurs in the @list
+ * several times.
+ */
+static int bdrv_list_refresh_perms(GSList *list, BlockReopenQueue *q,
+   Transaction *tran, Error **errp)
+{
+g_autoptr(GHashTable) found = g_hash_table_new(NULL, NULL);
+g_autoptr(GSList) refresh_list = NULL;
+
+for ( ; list; list = list->next) {
+refresh_list = bdrv_topological_dfs(refresh_list, found, list->data);
+}
+
+return bdrv_do_refresh_perms(refresh_list, q, tran, errp);
+}
+





[PATCH] edk2: Use TPM2_ENABLE and TPM2_CONFIG_ENABLE for newer edk2

2022-06-08 Thread Stefan Berger
Recent changes to edk2 switched the x86_64 build from using TPM_ENABLE
to TPM2_ENABLE and TPM1_ENABLE to be similar to the ARM build. Adapt
the QEMU edk2 Makefile to build with TPM2_ENABLE. QEMU v7.0.0 had lost
the TPM 2 support in edk2 and this restores it.

Signed-off-by: Stefan Berger 
---
 roms/Makefile.edk2 | 12 
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/roms/Makefile.edk2 b/roms/Makefile.edk2
index 485f2244b1..a6eb14f215 100644
--- a/roms/Makefile.edk2
+++ b/roms/Makefile.edk2
@@ -101,8 +101,7 @@ submodules:
-D NETWORK_IP6_ENABLE \
-D NETWORK_HTTP_BOOT_ENABLE \
-D NETWORK_TLS_ENABLE \
-   -D TPM_ENABLE \
-   -D TPM_CONFIG_ENABLE
+   -D TPM2_ENABLE
cp edk2/Build/OvmfIa32/$(target)_$(call toolchain,i386)/FV/OVMF_CODE.fd 
$@
 
 ../pc-bios/edk2-i386-secure-code.fd: submodules
@@ -113,8 +112,7 @@ submodules:
-D NETWORK_IP6_ENABLE \
-D NETWORK_HTTP_BOOT_ENABLE \
-D NETWORK_TLS_ENABLE \
-   -D TPM_ENABLE \
-   -D TPM_CONFIG_ENABLE \
+   -D TPM2_ENABLE \
-D SECURE_BOOT_ENABLE \
-D SMM_REQUIRE
cp edk2/Build/OvmfIa32/$(target)_$(call toolchain,i386)/FV/OVMF_CODE.fd 
$@
@@ -127,8 +125,7 @@ submodules:
-D NETWORK_IP6_ENABLE \
-D NETWORK_HTTP_BOOT_ENABLE \
-D NETWORK_TLS_ENABLE \
-   -D TPM_ENABLE \
-   -D TPM_CONFIG_ENABLE
+   -D TPM2_ENABLE
cp edk2/Build/OvmfX64/$(target)_$(call 
toolchain,x86_64)/FV/OVMF_CODE.fd $@
 
 ../pc-bios/edk2-x86_64-secure-code.fd: submodules
@@ -140,8 +137,7 @@ submodules:
-D NETWORK_IP6_ENABLE \
-D NETWORK_HTTP_BOOT_ENABLE \
-D NETWORK_TLS_ENABLE \
-   -D TPM_ENABLE \
-   -D TPM_CONFIG_ENABLE \
+   -D TPM2_ENABLE \
-D SECURE_BOOT_ENABLE \
-D SMM_REQUIRE
cp edk2/Build/Ovmf3264/$(target)_$(call 
toolchain,x86_64)/FV/OVMF_CODE.fd $@
-- 
2.35.3




Re: [PATCH v5 20/45] block: make permission update functions public

2022-06-08 Thread Hanna Reitz

On 30.03.22 23:28, Vladimir Sementsov-Ogievskiy wrote:

We'll need them in further commits in blockdev.c for new transaction
block-graph modifying API.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  block.c| 7 +++
  include/block/block-global-state.h | 4 
  2 files changed, 7 insertions(+), 4 deletions(-)


Reviewed-by: Hanna Reitz 




Re: [External] [PATCH v13 3/8] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX

2022-06-08 Thread Peter Xu
On Wed, Jun 08, 2022 at 02:37:28AM -0300, Leonardo Bras Soares Passos wrote:
> (1) is not an option, as the interface currently uses ret=1 to make
> sure MSG_ZEROCOPY is getting used,
> I added that so the user of qio_channel can switch off zero-copy if
> it's not getting used, and save some cpu.

Yes (1) is not, but could you explain what do you mean by making sure
MSG_ZEROCOPY being used?  Why is it relevant to the retval here?

I just figured it's a bit weird to return >0 here in flush().

> 
> (2) is not a problem, but I fail to see how useful that would be. Is
> the idea manually keeping track of flush happening?

Yes if we can check this up it'll be good enough to me.  The trace point
could help in some case in the future too to monitor the behavior of kernel
MSG_ERRQUEUE but if you don't like it then it's okay.

-- 
Peter Xu




Re: [PATCH v5 21/45] block: add bdrv_try_set_aio_context_tran transaction action

2022-06-08 Thread Hanna Reitz

On 30.03.22 23:28, Vladimir Sementsov-Ogievskiy wrote:

To be used in further commit.

Signed-off-by: Vladimir Sementsov-Ogievskiy 
---
  block.c | 48 
  1 file changed, 48 insertions(+)


Looking at bdrv_child_try_set_aio_context(), it looks like 
bdrv_can_set_aio_context() were supposed to be the .prepare action, and 
bdrv_set_aio_context_ignore() should be the .commit action.  Can we not 
use it that way?





Re: [PATCH v5 08/10] hmp: add filtering of statistics by provider

2022-06-08 Thread Dr. David Alan Gilbert
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> Allow the user to request statistics for a single provider of interest.
> Extracted from a patch by Mark Kanda.
> 
> Signed-off-by: Paolo Bonzini 

Reviewed-by: Dr. David Alan Gilbert 

> ---
>  hmp-commands-info.hx |  7 ---
>  monitor/hmp-cmds.c   | 39 ---
>  2 files changed, 36 insertions(+), 10 deletions(-)
> 
> diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx
> index 28757768f7..a67040443b 100644
> --- a/hmp-commands-info.hx
> +++ b/hmp-commands-info.hx
> @@ -897,9 +897,10 @@ ERST
>  
>  {
>  .name   = "stats",
> -.args_type  = "target:s",
> -.params = "target",
> -.help   = "show statistics; target is either vm or vcpu",
> +.args_type  = "target:s,provider:s?",
> +.params = "target [provider]",
> +.help   = "show statistics for the given target (vm or vcpu); 
> optionally filter by "
> +  "provider",
>  .cmd= hmp_info_stats,
>  },
>  
> diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c
> index c501d1fa2b..a71887e54c 100644
> --- a/monitor/hmp-cmds.c
> +++ b/monitor/hmp-cmds.c
> @@ -2300,6 +2300,7 @@ static StatsSchemaValueList *find_schema_value_list(
>  }
>  
>  static void print_stats_results(Monitor *mon, StatsTarget target,
> +bool show_provider,
>  StatsResult *result,
>  StatsSchemaList *schema)
>  {
> @@ -2314,8 +2315,10 @@ static void print_stats_results(Monitor *mon, 
> StatsTarget target,
>  return;
>  }
>  
> -monitor_printf(mon, "provider: %s\n",
> -   StatsProvider_str(result->provider));
> +if (show_provider) {
> +monitor_printf(mon, "provider: %s\n",
> +   StatsProvider_str(result->provider));
> +}
>  
>  for (stats_list = result->stats; stats_list;
>   stats_list = stats_list->next,
> @@ -2356,7 +2359,8 @@ static void print_stats_results(Monitor *mon, 
> StatsTarget target,
>  }
>  
>  /* Create the StatsFilter that is needed for an "info stats" invocation.  */
> -static StatsFilter *stats_filter(StatsTarget target, int cpu_index)
> +static StatsFilter *stats_filter(StatsTarget target, int cpu_index,
> + StatsProvider provider)
>  {
>  StatsFilter *filter = g_malloc0(sizeof(*filter));
>  
> @@ -2378,12 +2382,25 @@ static StatsFilter *stats_filter(StatsTarget target, 
> int cpu_index)
>  default:
>  break;
>  }
> +
> +if (provider == STATS_PROVIDER__MAX) {
> +return filter;
> +}
> +
> +/* "info stats" can only query either one or all the providers.  */
> +filter->has_providers = true;
> +filter->providers = g_new0(StatsRequestList, 1);
> +filter->providers->value = g_new0(StatsRequest, 1);
> +filter->providers->value->provider = provider;
>  return filter;
>  }
>  
>  void hmp_info_stats(Monitor *mon, const QDict *qdict)
>  {
>  const char *target_str = qdict_get_str(qdict, "target");
> +const char *provider_str = qdict_get_try_str(qdict, "provider");
> +
> +StatsProvider provider = STATS_PROVIDER__MAX;
>  StatsTarget target;
>  Error *err = NULL;
>  g_autoptr(StatsSchemaList) schema = NULL;
> @@ -2396,19 +2413,27 @@ void hmp_info_stats(Monitor *mon, const QDict *qdict)
>  monitor_printf(mon, "invalid stats target %s\n", target_str);
>  goto exit_no_print;
>  }
> +if (provider_str) {
> +provider = qapi_enum_parse(&StatsProvider_lookup, provider_str, -1, 
> &err);
> +if (err) {
> +monitor_printf(mon, "invalid stats provider %s\n", provider_str);
> +goto exit_no_print;
> +}
> +}
>  
> -schema = qmp_query_stats_schemas(false, STATS_PROVIDER__MAX, &err);
> +schema = qmp_query_stats_schemas(provider_str ? true : false,
> + provider, &err);
>  if (err) {
>  goto exit;
>  }
>  
>  switch (target) {
>  case STATS_TARGET_VM:
> -filter = stats_filter(target, -1);
> +filter = stats_filter(target, -1, provider);
>  break;
>  case STATS_TARGET_VCPU: {}
>  int cpu_index = monitor_get_cpu_index(mon);
> -filter = stats_filter(target, cpu_index);
> +filter = stats_filter(target, cpu_index, provider);
>  break;
>  default:
>  abort();
> @@ -2419,7 +2444,7 @@ void hmp_info_stats(Monitor *mon, const QDict *qdict)
>  goto exit;
>  }
>  for (entry = stats; entry; entry = entry->next) {
> -print_stats_results(mon, target, entry->value, schema);
> +print_stats_results(mon, target, provider_str == NULL, entry->value, 
> schema);
>  }
>  
>  exit:
> -- 
> 2.36.1
> 
> 
-- 
Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK




Re: [PATCH v5 07/10] qmp: add filtering of statistics by provider

2022-06-08 Thread Dr. David Alan Gilbert
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> Allow retrieving the statistics from a specific provider only.
> This can be used in the future by HMP commands such as "info
> sync-profile" or "info profile".  The next patch also adds
> filter-by-provider capabilities to the HMP equivalent of
> query-stats, "info stats".
> 
> Example:
> 
> { "execute": "query-stats",
>   "arguments": {
> "target": "vm",
> "providers": [
>   { "provider": "kvm" } ] } }
> 
> The QAPI is a bit more verbose than just a list of StatsProvider,
> so that it can be subsequently extended with filtering of statistics
> by name.
> 
> If a provider is specified more than once in the filter, each request
> will be included separately in the output.
> 
> Extracted from a patch by Mark Kanda.
> 
> Signed-off-by: Paolo Bonzini 

Reviewed-by: Dr. David Alan Gilbert 

> ---
> Here I removed the Reviewed-by because the effect of the new
> implementation is especially marekd when you have multiple filters.
> Before, all filters were evaluated first, and the callback was then
> run if there was a match.  Now, each filter is evaluated separately.
> 
>  accel/kvm/kvm-all.c |  3 ++-
>  include/monitor/stats.h |  4 +++-
>  monitor/hmp-cmds.c  |  2 +-
>  monitor/qmp-cmds.c  | 41 -
>  qapi/stats.json | 19 +--
>  5 files changed, 55 insertions(+), 14 deletions(-)
> 
> diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
> index d75fb3d95c..66c4ac1ac6 100644
> --- a/accel/kvm/kvm-all.c
> +++ b/accel/kvm/kvm-all.c
> @@ -2644,7 +2644,8 @@ static int kvm_init(MachineState *ms)
>  }
>  
>  if (kvm_check_extension(kvm_state, KVM_CAP_BINARY_STATS_FD)) {
> -add_stats_callbacks(query_stats_cb, query_stats_schemas_cb);
> +add_stats_callbacks(STATS_PROVIDER_KVM, query_stats_cb,
> +query_stats_schemas_cb);
>  }
>  
>  return 0;
> diff --git a/include/monitor/stats.h b/include/monitor/stats.h
> index 8c50feeaa9..80a523dd29 100644
> --- a/include/monitor/stats.h
> +++ b/include/monitor/stats.h
> @@ -17,10 +17,12 @@ typedef void SchemaRetrieveFunc(StatsSchemaList **result, 
> Error **errp);
>  /*
>   * Register callbacks for the QMP query-stats command.
>   *
> + * @provider: stats provider checked against QMP command arguments
>   * @stats_fn: routine to query stats:
>   * @schema_fn: routine to query stat schemas:
>   */
> -void add_stats_callbacks(StatRetrieveFunc *stats_fn,
> +void add_stats_callbacks(StatsProvider provider,
> + StatRetrieveFunc *stats_fn,
>   SchemaRetrieveFunc *schemas_fn);
>  
>  /*
> diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c
> index 55b83c0a3a..c501d1fa2b 100644
> --- a/monitor/hmp-cmds.c
> +++ b/monitor/hmp-cmds.c
> @@ -2397,7 +2397,7 @@ void hmp_info_stats(Monitor *mon, const QDict *qdict)
>  goto exit_no_print;
>  }
>  
> -schema = qmp_query_stats_schemas(&err);
> +schema = qmp_query_stats_schemas(false, STATS_PROVIDER__MAX, &err);
>  if (err) {
>  goto exit;
>  }
> diff --git a/monitor/qmp-cmds.c b/monitor/qmp-cmds.c
> index 5f8f1e620b..e49ab345d7 100644
> --- a/monitor/qmp-cmds.c
> +++ b/monitor/qmp-cmds.c
> @@ -445,6 +445,7 @@ HumanReadableText *qmp_x_query_irq(Error **errp)
>  }
>  
>  typedef struct StatsCallbacks {
> +StatsProvider provider;
>  StatRetrieveFunc *stats_cb;
>  SchemaRetrieveFunc *schemas_cb;
>  QTAILQ_ENTRY(StatsCallbacks) next;
> @@ -453,10 +454,12 @@ typedef struct StatsCallbacks {
>  static QTAILQ_HEAD(, StatsCallbacks) stats_callbacks =
>  QTAILQ_HEAD_INITIALIZER(stats_callbacks);
>  
> -void add_stats_callbacks(StatRetrieveFunc *stats_fn,
> +void add_stats_callbacks(StatsProvider provider,
> + StatRetrieveFunc *stats_fn,
>   SchemaRetrieveFunc *schemas_fn)
>  {
>  StatsCallbacks *entry = g_new(StatsCallbacks, 1);
> +entry->provider = provider;
>  entry->stats_cb = stats_fn;
>  entry->schemas_cb = schemas_fn;
>  
> @@ -465,12 +468,18 @@ void add_stats_callbacks(StatRetrieveFunc *stats_fn,
>  
>  static bool invoke_stats_cb(StatsCallbacks *entry,
>  StatsResultList **stats_results,
> -StatsFilter *filter,
> +StatsFilter *filter, StatsRequest *request,
>  Error **errp)
>  {
>  strList *targets = NULL;
>  ERRP_GUARD();
>  
> +if (request) {
> +if (request->provider != entry->provider) {
> +return true;
> +}
> +}
> +
>  switch (filter->target) {
>  case STATS_TARGET_VM:
>  break;
> @@ -500,27 +509,41 @@ StatsResultList *qmp_query_stats(StatsFilter *filter, 
> Error **errp)
>  {
>  StatsResultList *stats_results = NULL;
>  StatsCallbacks *entry;
> +StatsRequestList *request;
>  
>

Re: [PATCH v2 1/8] hw/cxl: Make the CXL fixed memory window setup a machine parameter.

2022-06-08 Thread Jonathan Cameron via
On Tue, 7 Jun 2022 15:37:02 -0700
Davidlohr Bueso  wrote:

> On Wed, 01 Jun 2022, Jonathan Cameron wrote:
> 
> >Paolo Bonzini requested this change to simplify the ongoing
> >effort to allow machine setup entirely via RPC.
> >
> >Includes shortening the command line form cxl-fixed-memory-window
> >to cxl-fmw as the command lines are extremely long even with this
> >change.
> >
> >The json change is needed to ensure that there is
> >a CXLFixedMemoryWindowOptionsList even though the actual
> >element in the json is never used. Similar to existing
> >SgxEpcProperties.
> >
> >Update cxl-test and bios-tables-test to reflect new parameters.
> >
> >Signed-off-by: Jonathan Cameron   
> 
> Reviewed-by: Davidlohr Bueso 

Thanks.

> 
> One thing missing however is updating qemu-options.hx - maybe fold
> in the below?

Excellent point. 

The original patch set has been rolling so long I'd forgotten we had
documentation in qemu-options.hx.

One comment inline though...
> 
> Thanks!
> 
> 8<---
> o
> diff --git a/qemu-options.hx b/qemu-options.hx
> index 60cf188da429..3bcf1247b88a 100644
> --- a/qemu-options.hx
> +++ b/qemu-options.hx
> @@ -127,10 +127,43 @@ SRST
>   ERST
>   
>   DEF("M", HAS_ARG, QEMU_OPTION_M,
> +"
> cxl-fmw.0.targets.0=firsttarget,cxl-fmw.0.targets.1=secondtarget,cxl-fmw.0.size=size[,cxl-fmw.0.interleave-granularity=granularity]\n"

This _M entry is odd, given it's just short hand for _machine.  So I'm thinking
it makes more sense to document this lot in the "machine" block further up the 
doc.
That particular entry has a different style to this one, so I'll modify this 
inline
with existing entries there.

Possibly someone should move the sgx entry over to machine as well.
+Cc Sean Chistopherson and Yan Zhong as that sgx-epc entry is from their patch 
set.
A quick glance through discussion of that patch didn't throw up a
reason for doing it as a separate entry, but I haven't dug deep.



>   "sgx-epc.0.memdev=memid,sgx-epc.0.node=numaid\n",
>   QEMU_ARCH_ALL)
>   
>   SRST
> +``cxl-fmw.0.targets.0=firsttarget,cxl-fmw.0.targets.1=secondtarget,cxl-fmw.0.size=size[,cxl-fmw.0.interleave-granularity=granularity]``
> +Define a CXL Fixed Memory Window (CFMW).
> +
> +Described in the CXL 2.0 ECN: CEDT CFMWS & QTG _DSM.
> +
> +They are regions of Host Physical Addresses (HPA) on a system which
> +may be interleaved across one or more CXL host bridges.  The system
> +software will assign particular devices into these windows and
> +configure the downstream Host-managed Device Memory (HDM) decoders
> +in root ports, switch ports and devices appropriately to meet the
> +interleave requirements before enabling the memory devices.
> +
> +``targets.X=firsttarget`` provides the mapping to CXL host bridges
> +which may be identified by the id provied in the -device entry.
> +Multiple entries are needed to specify all the targets when
> +the fixed memory window represents interleaved memory. X is the
> +target index from 0.
> +
> +``size=size`` sets the size of the CFMW. This must be a multiple of
> +256MiB. The region will be aligned to 256MiB but the location is
> +platform and configuration dependent.
> +
> +``interleave-granularity=granularity`` sets the granularity of
> +interleave. Default 256KiB. Only 256KiB, 512KiB, 1024KiB, 2048KiB
> +4096KiB, 8192KiB and 16384KiB granularities supported.
> +
> +Example:
> +
> +::
> +
> + -M 
> cxl-fmw.0.targets.0=cxl.0,cxl-fmw.0.targets.1=cxl.1,cxl-fmw.0.size=128G,cxl-fmw.0.interleave-granularity=512k
> +
>   ``sgx-epc.0.memdev=@var{memid},sgx-epc.0.node=@var{numaid}``
>   Define an SGX EPC section.
>   ERST
> @@ -467,44 +500,6 @@ SRST
>   -numa 
> hmat-cache,node-id=1,size=10K,level=1,associativity=direct,policy=write-back,line=8
>   ERST
>   
> -DEF("cxl-fixed-memory-window", HAS_ARG, QEMU_OPTION_cxl_fixed_memory_window,
> -"-cxl-fixed-memory-window 
> targets.0=firsttarget,targets.1=secondtarget,size=size[,interleave-granularity=granularity]\n",
> -QEMU_ARCH_ALL)
> -SRST
> -``-cxl-fixed-memory-window 
> targets.0=firsttarget,targets.1=secondtarget,size=size[,interleave-granularity=granularity]``
> -Define a CXL Fixed Memory Window (CFMW).
> -
> -Described in the CXL 2.0 ECN: CEDT CFMWS & QTG _DSM.
> -
> -They are regions of Host Physical Addresses (HPA) on a system which
> -may be interleaved across one or more CXL host bridges.  The system
> -software will assign particular devices into these windows and
> -configure the downstream Host-managed Device Memory (HDM) decoders
> -in root ports, switch ports and devices appropriately to meet the
> -interleave requirements before enabling the memory devices.
> -
> -``targets.X=firsttarget`` provides the mapping to CXL host bridges
> -which may be identified by the id provied in the -device entry.
> -Multiple entries are neede

[RFC v2 02/15] linux-headers: Import latest vfio.h and iommufd.h

2022-06-08 Thread Yi Liu
From: Eric Auger 

Imported from https://github.com/luxis1999/iommufd/tree/iommufd-v5.17-rc6

Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
---
 linux-headers/linux/iommufd.h | 223 ++
 linux-headers/linux/vfio.h|  84 +
 2 files changed, 307 insertions(+)
 create mode 100644 linux-headers/linux/iommufd.h

diff --git a/linux-headers/linux/iommufd.h b/linux-headers/linux/iommufd.h
new file mode 100644
index 00..6c3cd9e259
--- /dev/null
+++ b/linux-headers/linux/iommufd.h
@@ -0,0 +1,223 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES.
+ */
+#ifndef _IOMMUFD_H
+#define _IOMMUFD_H
+
+#include 
+#include 
+
+#define IOMMUFD_TYPE (';')
+
+/**
+ * DOC: General ioctl format
+ *
+ * The ioctl mechanims follows a general format to allow for extensibility. 
Each
+ * ioctl is passed in a structure pointer as the argument providing the size of
+ * the structure in the first u32. The kernel checks that any structure space
+ * beyond what it understands is 0. This allows userspace to use the backward
+ * compatible portion while consistently using the newer, larger, structures.
+ *
+ * ioctls use a standard meaning for common errnos:
+ *
+ *  - ENOTTY: The IOCTL number itself is not supported at all
+ *  - E2BIG: The IOCTL number is supported, but the provided structure has
+ *non-zero in a part the kernel does not understand.
+ *  - EOPNOTSUPP: The IOCTL number is supported, and the structure is
+ *understood, however a known field has a value the kernel does not
+ *understand or support.
+ *  - EINVAL: Everything about the IOCTL was understood, but a field is not
+ *correct.
+ *  - ENOENT: An ID or IOVA provided does not exist.
+ *  - ENOMEM: Out of memory.
+ *  - EOVERFLOW: Mathematics oveflowed.
+ *
+ * As well as additional errnos. within specific ioctls.
+ */
+enum {
+   IOMMUFD_CMD_BASE = 0x80,
+   IOMMUFD_CMD_DESTROY = IOMMUFD_CMD_BASE,
+   IOMMUFD_CMD_IOAS_ALLOC,
+   IOMMUFD_CMD_IOAS_IOVA_RANGES,
+   IOMMUFD_CMD_IOAS_MAP,
+   IOMMUFD_CMD_IOAS_COPY,
+   IOMMUFD_CMD_IOAS_UNMAP,
+   IOMMUFD_CMD_VFIO_IOAS,
+};
+
+/**
+ * struct iommu_destroy - ioctl(IOMMU_DESTROY)
+ * @size: sizeof(struct iommu_destroy)
+ * @id: iommufd object ID to destroy. Can by any destroyable object type.
+ *
+ * Destroy any object held within iommufd.
+ */
+struct iommu_destroy {
+   __u32 size;
+   __u32 id;
+};
+#define IOMMU_DESTROY _IO(IOMMUFD_TYPE, IOMMUFD_CMD_DESTROY)
+
+/**
+ * struct iommu_ioas_alloc - ioctl(IOMMU_IOAS_ALLOC)
+ * @size: sizeof(struct iommu_ioas_alloc)
+ * @flags: Must be 0
+ * @out_ioas_id: Output IOAS ID for the allocated object
+ *
+ * Allocate an IO Address Space (IOAS) which holds an IO Virtual Address (IOVA)
+ * to memory mapping.
+ */
+struct iommu_ioas_alloc {
+   __u32 size;
+   __u32 flags;
+   __u32 out_ioas_id;
+};
+#define IOMMU_IOAS_ALLOC _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_ALLOC)
+
+/**
+ * struct iommu_ioas_iova_ranges - ioctl(IOMMU_IOAS_IOVA_RANGES)
+ * @size: sizeof(struct iommu_ioas_iova_ranges)
+ * @ioas_id: IOAS ID to read ranges from
+ * @out_num_iovas: Output total number of ranges in the IOAS
+ * @__reserved: Must be 0
+ * @out_valid_iovas: Array of valid IOVA ranges. The array length is the 
smaller
+ *   of out_num_iovas or the length implied by size.
+ * @out_valid_iovas.start: First IOVA in the allowed range
+ * @out_valid_iovas.last: Inclusive last IOVA in the allowed range
+ *
+ * Query an IOAS for ranges of allowed IOVAs. Operation outside these ranges is
+ * not allowed. out_num_iovas will be set to the total number of iovas
+ * and the out_valid_iovas[] will be filled in as space permits.
+ * size should include the allocated flex array.
+ */
+struct iommu_ioas_iova_ranges {
+   __u32 size;
+   __u32 ioas_id;
+   __u32 out_num_iovas;
+   __u32 __reserved;
+   struct iommu_valid_iovas {
+   __aligned_u64 start;
+   __aligned_u64 last;
+   } out_valid_iovas[];
+};
+#define IOMMU_IOAS_IOVA_RANGES _IO(IOMMUFD_TYPE, IOMMUFD_CMD_IOAS_IOVA_RANGES)
+
+/**
+ * enum iommufd_ioas_map_flags - Flags for map and copy
+ * @IOMMU_IOAS_MAP_FIXED_IOVA: If clear the kernel will compute an appropriate
+ * IOVA to place the mapping at
+ * @IOMMU_IOAS_MAP_WRITEABLE: DMA is allowed to write to this mapping
+ * @IOMMU_IOAS_MAP_READABLE: DMA is allowed to read from this mapping
+ */
+enum iommufd_ioas_map_flags {
+   IOMMU_IOAS_MAP_FIXED_IOVA = 1 << 0,
+   IOMMU_IOAS_MAP_WRITEABLE = 1 << 1,
+   IOMMU_IOAS_MAP_READABLE = 1 << 2,
+};
+
+/**
+ * struct iommu_ioas_map - ioctl(IOMMU_IOAS_MAP)
+ * @size: sizeof(struct iommu_ioas_map)
+ * @flags: Combination of enum iommufd_ioas_map_flags
+ * @ioas_id: IOAS ID to change the mapping of
+ * @__reserved: Must be 0
+ * @user_va: Userspace pointer to start mapping from
+

[RFC v2 04/15] vfio: Add base container

2022-06-08 Thread Yi Liu
Abstract the VFIOContainer to be a base object. It is supposed to be
embedded by legacy VFIO container and later on, into the new iommufd
based container.

The base container implements generic code such as code related to
memory_listener and address space management. The VFIOContainerOps
implements callbacks that depend on the kernel user space being used.

'as.c' only manipulates the base container with wrapper functions that
calls the functions defined in VFIOContainerOps. Existing 'container.c'
code is converted to implement the legacy container ops functions.

Existing migration code only works with the legacy container.
Also 'spapr.c' isn't BE agnostic.

Below is the base container. It's named as VFIOContainer, old VFIOContainer
is replaced with VFIOLegacyContainer.

struct VFIOContainer {
VFIOContainerOps *ops;
VFIOAddressSpace *space;
MemoryListener listener;
Error *error;
bool initialized;
bool dirty_pages_supported;
uint64_t dirty_pgsizes;
uint64_t max_dirty_bitmap_size;
unsigned long pgsizes;
unsigned int dma_max_mappings;
QLIST_HEAD(, VFIOGuestIOMMU) giommu_list;
QLIST_HEAD(, VFIOHostDMAWindow) hostwin_list;
QLIST_HEAD(, VFIORamDiscardListener) vrdl_list;
QLIST_ENTRY(VFIOContainer) next;
};

struct VFIOLegacyContainer {
VFIOContainer bcontainer;
int fd; /* /dev/vfio/vfio, empowered by the attached groups */
MemoryListener prereg_listener;
unsigned iommu_type;
QLIST_HEAD(, VFIOGroup) group_list;
};

Co-authored-by: Eric Auger 
Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
---
v1 -> v2:
- Remove QOM for VFIOContainer object, use callback instead per David's
  comment.
- Rename container-obj.c/.h to be container-base.c/.h
---
 hw/vfio/as.c  |  48 +++---
 hw/vfio/container-base.c  | 154 +++
 hw/vfio/container.c   | 211 +++---
 hw/vfio/meson.build   |   1 +
 hw/vfio/migration.c   |   5 +-
 hw/vfio/pci.c |   4 +-
 hw/vfio/spapr.c   |  22 +--
 include/hw/vfio/vfio-common.h |  79 ++
 include/hw/vfio/vfio-container-base.h | 136 +
 9 files changed, 470 insertions(+), 190 deletions(-)
 create mode 100644 hw/vfio/container-base.c
 create mode 100644 include/hw/vfio/vfio-container-base.h

diff --git a/hw/vfio/as.c b/hw/vfio/as.c
index 01eb60105b..ec58914001 100644
--- a/hw/vfio/as.c
+++ b/hw/vfio/as.c
@@ -216,9 +216,9 @@ static void vfio_iommu_map_notify(IOMMUNotifier *n, 
IOMMUTLBEntry *iotlb)
  * of vaddr will always be there, even if the memory object is
  * destroyed and its backing memory munmap-ed.
  */
-ret = vfio_dma_map(container, iova,
-   iotlb->addr_mask + 1, vaddr,
-   read_only);
+ret = vfio_container_dma_map(container, iova,
+ iotlb->addr_mask + 1, vaddr,
+ read_only);
 if (ret) {
 error_report("vfio_dma_map(%p, 0x%"HWADDR_PRIx", "
  "0x%"HWADDR_PRIx", %p) = %d (%m)",
@@ -226,7 +226,8 @@ static void vfio_iommu_map_notify(IOMMUNotifier *n, 
IOMMUTLBEntry *iotlb)
  iotlb->addr_mask + 1, vaddr, ret);
 }
 } else {
-ret = vfio_dma_unmap(container, iova, iotlb->addr_mask + 1, iotlb);
+ret = vfio_container_dma_unmap(container, iova,
+   iotlb->addr_mask + 1, iotlb);
 if (ret) {
 error_report("vfio_dma_unmap(%p, 0x%"HWADDR_PRIx", "
  "0x%"HWADDR_PRIx") = %d (%m)",
@@ -243,12 +244,13 @@ static void 
vfio_ram_discard_notify_discard(RamDiscardListener *rdl,
 {
 VFIORamDiscardListener *vrdl = container_of(rdl, VFIORamDiscardListener,
 listener);
+VFIOContainer *container = vrdl->container;
 const hwaddr size = int128_get64(section->size);
 const hwaddr iova = section->offset_within_address_space;
 int ret;
 
 /* Unmap with a single call. */
-ret = vfio_dma_unmap(vrdl->container, iova, size , NULL);
+ret = vfio_container_dma_unmap(container, iova, size , NULL);
 if (ret) {
 error_report("%s: vfio_dma_unmap() failed: %s", __func__,
  strerror(-ret));
@@ -260,6 +262,7 @@ static int 
vfio_ram_discard_notify_populate(RamDiscardListener *rdl,
 {
 VFIORamDiscardListener *vrdl = container_of(rdl, VFIORamDiscardListener,
 listener);
+VFIOContainer *container = vrdl->container;
 const hwaddr end = section->offset_within_region +
int128_get64(section->size);
 hwaddr start, next, iova;
@@ -278,8 +281,8 @@ static int 
vfio_ram_discard_notify_populate(RamDiscardListener *rdl,
section->offset_within_address

[RFC v2 01/15] scripts/update-linux-headers: Add iommufd.h

2022-06-08 Thread Yi Liu
From: Eric Auger 

Update the script to import iommufd.h

Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
---
 scripts/update-linux-headers.sh | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh
index 839a5ec614..a89b83e6d6 100755
--- a/scripts/update-linux-headers.sh
+++ b/scripts/update-linux-headers.sh
@@ -160,7 +160,7 @@ done
 
 rm -rf "$output/linux-headers/linux"
 mkdir -p "$output/linux-headers/linux"
-for header in kvm.h vfio.h vfio_ccw.h vfio_zdev.h vhost.h \
+for header in kvm.h vfio.h iommufd.h vfio_ccw.h vfio_zdev.h vhost.h \
   psci.h psp-sev.h userfaultfd.h mman.h; do
 cp "$tmpdir/include/linux/$header" "$output/linux-headers/linux"
 done
-- 
2.27.0




[RFC v2 00/15] vfio: Adopt iommufd

2022-06-08 Thread Yi Liu
With the introduction of iommufd[1], the Linux kernel provides a generic
interface for userspace drivers to propagate their DMA mappings to kernel
for assigned devices. This series does the porting of the VFIO devices
onto the /dev/iommu uapi and let it coexist with the legacy implementation.
Other devices like vpda, vfio mdev and etc. are not considered yet.

At QEMU level, interactions with the /dev/iommu are abstracted by a new
iommufd object (compiled in with the CONFIG_IOMMUFD option).

Any QEMU device (e.g. vfio device) wishing to use /dev/iommu must be
linked with an iommufd object. In this series, the vfio-pci device is
granted with such capability:

It gets a new optional parameter named iommufd which allows to pass
an iommufd object:

-object iommufd,id=iommufd0
-device vfio-pci,host=:02:00.0,iommufd=iommufd0

Note the /dev/iommu can be externally opened by a management layer.
In such a case the fd is passed along with the iommufd object:

-object iommufd,id=iommufd0,fd=22
-device vfio-pci,host=:02:00.0,iommufd=iommufd0

If the fd parameter is not passed, the fd (/dev/iommu) is opened by QEMU.

If no iommufd option is passed to the vfio-pci device, iommufd is not
used and the end-user gets the behavior based on the legacy vfio iommu
interfaces:

-device vfio-pci,host=:02:00.0

While the legacy kernel interface is group-centric, the new iommufd
interface is device-centric, relying on device fd and iommufd.

To support both interfaces in the QEMU VFIO device we reworked the vfio
container abstraction so that the generic VFIO code can use either
backend.

The VFIOContainer object becomes a base object derived into
a) the legacy VFIO container and
b) the new iommufd based container.

The base object implements generic code such as code related to
memory_listener and address space management whereas the derived
objects implement callbacks specific to either BE, legacy and
iommufd. Indeed each backend has its own way to setup secure context
and dma management interface. The below diagram shows how it looks
like with both BEs.

VFIO   AddressSpace/Memory
+---+  +--+  +-+  +-+
|  pci  |  | platform |  |  ap |  | ccw |
+---+---+  ++-+  +--+--+  +--+--+ +--+
|   |   |||   AddressSpace   |
|   |   ||++-+
+---V---V---VV+   /
|   VFIOAddressSpace  | <+
|  |  |  MemoryListener
|  VFIOContainer list |
+---+++
||
||
+---V--++V--+
|   iommufd||vfio legacy|
|  container   || container |
+---+--+++--+
||
| /dev/iommu | /dev/vfio/vfio
| /dev/vfio/devices/vfioX| /dev/vfio/$group_id
Userspace  ||
===++
Kernel |  device fd |
+---+| group/container fd
| (BIND_IOMMUFD || (SET_CONTAINER/SET_IOMMU)
|  ATTACH_IOAS) || device fd
|   ||
|   +---VV-+
iommufd |   |vfio  |
(map/unmap  |   +-++---+
ioas_copy) | || map/unmap
| ||
 +--V--++-V--+  +--V+
 | iommfd core ||  device|  |  vfio iommu   |
 +-+++  +---+

[Secure Context setup]
- iommufd BE: uses device fd and iommufd to setup secure context
  (bind_iommufd, attach_ioas)
- vfio legacy BE: uses group fd and container fd to setup secure context
  (set_container, set_iommu)
[Device access]
- iommufd BE: device fd is opened through /dev/vfio/devices/vfioX
- vfio legacy BE: device fd is retrieved from group fd ioctl
[DMA Mapping flow]
- VFIOAddressSpace receives MemoryRegion add/del via MemoryListener
- VFIO populates DMA map/unmap via the container BEs
  *) iommufd BE: uses iommufd
  *) vfio legacy BE: uses container fd

Test done:
- PCI and Platform device were tested
- ccw and ap were only compile-tested
- limited device hotplug test
- vIOMMU test run for both legacy and iommufd backends (limited tests)

This series was co-developed by Eric Auger and me based on the iommufd 
exploration
kernel (https:/

[RFC v2 06/15] vfio/platform: Use vfio_[attach/detach]_device

2022-06-08 Thread Yi Liu
From: Eric Auger 

Let the vfio-platform device use vfio_attach_device() and
vfio_detach_device(), hence hiding the details of the used
IOMMU backend.

Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
---
 hw/vfio/platform.c | 42 ++
 1 file changed, 2 insertions(+), 40 deletions(-)

diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c
index 5af73f9287..3bcdc20667 100644
--- a/hw/vfio/platform.c
+++ b/hw/vfio/platform.c
@@ -529,12 +529,7 @@ static VFIODeviceOps vfio_platform_ops = {
  */
 static int vfio_base_device_init(VFIODevice *vbasedev, Error **errp)
 {
-VFIOGroup *group;
-VFIODevice *vbasedev_iter;
-char *tmp, group_path[PATH_MAX], *group_name;
-ssize_t len;
 struct stat st;
-int groupid;
 int ret;
 
 /* @sysfsdev takes precedence over @host */
@@ -557,47 +552,14 @@ static int vfio_base_device_init(VFIODevice *vbasedev, 
Error **errp)
 return -errno;
 }
 
-tmp = g_strdup_printf("%s/iommu_group", vbasedev->sysfsdev);
-len = readlink(tmp, group_path, sizeof(group_path));
-g_free(tmp);
-
-if (len < 0 || len >= sizeof(group_path)) {
-ret = len < 0 ? -errno : -ENAMETOOLONG;
-error_setg_errno(errp, -ret, "no iommu_group found");
-return ret;
-}
-
-group_path[len] = 0;
-
-group_name = basename(group_path);
-if (sscanf(group_name, "%d", &groupid) != 1) {
-error_setg_errno(errp, errno, "failed to read %s", group_path);
-return -errno;
-}
-
-trace_vfio_platform_base_device_init(vbasedev->name, groupid);
-
-group = vfio_get_group(groupid, &address_space_memory, errp);
-if (!group) {
-return -ENOENT;
-}
-
-QLIST_FOREACH(vbasedev_iter, &group->device_list, next) {
-if (strcmp(vbasedev_iter->name, vbasedev->name) == 0) {
-error_setg(errp, "device is already attached");
-vfio_put_group(group);
-return -EBUSY;
-}
-}
-ret = vfio_get_device(group, vbasedev->name, vbasedev, errp);
+ret = vfio_attach_device(vbasedev, &address_space_memory, errp);
 if (ret) {
-vfio_put_group(group);
 return ret;
 }
 
 ret = vfio_populate_device(vbasedev, errp);
 if (ret) {
-vfio_put_group(group);
+vfio_detach_device(vbasedev);
 }
 
 return ret;
-- 
2.27.0




[RFC v2 10/15] vfio/container-base: Introduce VFIOContainer reset callback

2022-06-08 Thread Yi Liu
From: Eric Auger 

Reset implementation depends on the container backend. Let's
introduce a VFIOContainer class function and register a generic
reset handler that will be able to call the right reset function
depending on the container type. Also, let's move the
registration/unregistration to a place that is not backend-specific
(first vfio address space created instead of the first group).

Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
---
 hw/vfio/as.c  | 18 ++
 hw/vfio/container-base.c  |  9 +
 hw/vfio/container.c   | 27 +++
 include/hw/vfio/vfio-container-base.h |  2 ++
 4 files changed, 44 insertions(+), 12 deletions(-)

diff --git a/hw/vfio/as.c b/hw/vfio/as.c
index 2c83b8e1fe..1a3ceb5e62 100644
--- a/hw/vfio/as.c
+++ b/hw/vfio/as.c
@@ -872,6 +872,18 @@ const MemoryListener vfio_memory_listener = {
 .log_sync = vfio_listener_log_sync,
 };
 
+void vfio_reset_handler(void *opaque)
+{
+VFIOAddressSpace *space;
+VFIOContainer *bcontainer;
+
+QLIST_FOREACH(space, &vfio_address_spaces, list) {
+ QLIST_FOREACH(bcontainer, &space->containers, next) {
+ vfio_container_reset(bcontainer);
+ }
+}
+}
+
 VFIOAddressSpace *vfio_get_address_space(AddressSpace *as)
 {
 VFIOAddressSpace *space;
@@ -887,6 +899,9 @@ VFIOAddressSpace *vfio_get_address_space(AddressSpace *as)
 space->as = as;
 QLIST_INIT(&space->containers);
 
+if (QLIST_EMPTY(&vfio_address_spaces)) {
+qemu_register_reset(vfio_reset_handler, NULL);
+}
 QLIST_INSERT_HEAD(&vfio_address_spaces, space, list);
 
 return space;
@@ -898,6 +913,9 @@ void vfio_put_address_space(VFIOAddressSpace *space)
 QLIST_REMOVE(space, list);
 g_free(space);
 }
+if (QLIST_EMPTY(&vfio_address_spaces)) {
+qemu_unregister_reset(vfio_reset_handler, NULL);
+}
 }
 
 static const VFIOContainerOps *
diff --git a/hw/vfio/container-base.c b/hw/vfio/container-base.c
index 6aaf0e0faa..a9f28e4b9d 100644
--- a/hw/vfio/container-base.c
+++ b/hw/vfio/container-base.c
@@ -58,6 +58,15 @@ int vfio_container_dma_unmap(VFIOContainer *container,
 return container->ops->dma_unmap(container, iova, size, iotlb);
 }
 
+int vfio_container_reset(VFIOContainer *container)
+{
+if (!container->ops->reset) {
+return -ENOENT;
+}
+
+return container->ops->reset(container);
+}
+
 void vfio_container_set_dirty_page_tracking(VFIOContainer *container,
 bool start)
 {
diff --git a/hw/vfio/container.c b/hw/vfio/container.c
index f303c08aa5..2d9704bc1a 100644
--- a/hw/vfio/container.c
+++ b/hw/vfio/container.c
@@ -465,12 +465,16 @@ vfio_legacy_container_del_section_window(VFIOContainer 
*bcontainer,
 }
 }
 
-void vfio_reset_handler(void *opaque)
+static int vfio_legacy_container_reset(VFIOContainer *bcontainer)
 {
+VFIOLegacyContainer *container = container_of(bcontainer,
+  VFIOLegacyContainer,
+  bcontainer);
 VFIOGroup *group;
 VFIODevice *vbasedev;
+int ret, final_ret = 0;
 
-QLIST_FOREACH(group, &vfio_group_list, next) {
+QLIST_FOREACH(group, &container->group_list, container_next) {
 QLIST_FOREACH(vbasedev, &group->device_list, next) {
 if (vbasedev->dev->realized) {
 vbasedev->ops->vfio_compute_needs_reset(vbasedev);
@@ -478,13 +482,19 @@ void vfio_reset_handler(void *opaque)
 }
 }
 
-QLIST_FOREACH(group, &vfio_group_list, next) {
+QLIST_FOREACH(group, &container->group_list, next) {
 QLIST_FOREACH(vbasedev, &group->device_list, next) {
 if (vbasedev->dev->realized && vbasedev->needs_reset) {
-vbasedev->ops->vfio_hot_reset_multi(vbasedev);
+ret = vbasedev->ops->vfio_hot_reset_multi(vbasedev);
+if (ret) {
+error_report("failed to reset %s (%d)",
+ vbasedev->name, ret);
+final_ret = ret;
+}
 }
 }
 }
+return final_ret;
 }
 
 static void vfio_kvm_device_add_group(VFIOGroup *group)
@@ -1010,10 +1020,6 @@ static VFIOGroup *vfio_get_group(int groupid, 
AddressSpace *as, Error **errp)
 goto close_fd_exit;
 }
 
-if (QLIST_EMPTY(&vfio_group_list)) {
-qemu_register_reset(vfio_reset_handler, NULL);
-}
-
 QLIST_INSERT_HEAD(&vfio_group_list, group, next);
 
 return group;
@@ -1042,10 +1048,6 @@ static void vfio_put_group(VFIOGroup *group)
 trace_vfio_put_group(group->fd);
 close(group->fd);
 g_free(group);
-
-if (QLIST_EMPTY(&vfio_group_list)) {
-qemu_unregister_reset(vfio_reset_handler, NULL);
-}
 }
 
 static int vfio_get_device(VFIOGroup *group, const char *name,
@@ -1295,6 +1297,7 @@ const VFIOContainerOps legacy_c

[RFC v2 08/15] vfio/ccw: Use vfio_[attach/detach]_device

2022-06-08 Thread Yi Liu
From: Eric Auger 

Let the vfio-ccw device use vfio_attach_device() and
vfio_detach_device(), hence hiding the details of the used
IOMMU backend.

Also now all the devices have been migrated to use the new
vfio_attach_device/vfio_detach_device API, let's turn the
legacy functions into static functions, local to container.c.

Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
---
 hw/vfio/ccw.c | 118 --
 hw/vfio/container.c   |   8 +--
 include/hw/vfio/vfio-common.h |   4 --
 3 files changed, 32 insertions(+), 98 deletions(-)

diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c
index 0354737666..6fde7849cc 100644
--- a/hw/vfio/ccw.c
+++ b/hw/vfio/ccw.c
@@ -579,27 +579,32 @@ static void vfio_ccw_put_region(VFIOCCWDevice *vcdev)
 g_free(vcdev->io_region);
 }
 
-static void vfio_ccw_put_device(VFIOCCWDevice *vcdev)
-{
-g_free(vcdev->vdev.name);
-vfio_put_base_device(&vcdev->vdev);
-}
-
-static void vfio_ccw_get_device(VFIOGroup *group, VFIOCCWDevice *vcdev,
-Error **errp)
+static void vfio_ccw_realize(DeviceState *dev, Error **errp)
 {
+CcwDevice *ccw_dev = DO_UPCAST(CcwDevice, parent_obj, dev);
+S390CCWDevice *cdev = DO_UPCAST(S390CCWDevice, parent_obj, ccw_dev);
+VFIOCCWDevice *vcdev = DO_UPCAST(VFIOCCWDevice, cdev, cdev);
+S390CCWDeviceClass *cdc = S390_CCW_DEVICE_GET_CLASS(cdev);
+VFIODevice *vbasedev = &vcdev->vdev;
+Error *err = NULL;
 char *name = g_strdup_printf("%x.%x.%04x", vcdev->cdev.hostid.cssid,
  vcdev->cdev.hostid.ssid,
  vcdev->cdev.hostid.devid);
-VFIODevice *vbasedev;
+int ret;
 
-QLIST_FOREACH(vbasedev, &group->device_list, next) {
-if (strcmp(vbasedev->name, name) == 0) {
-error_setg(errp, "vfio: subchannel %s has already been attached",
-   name);
-goto out_err;
+/* Call the class init function for subchannel. */
+if (cdc->realize) {
+cdc->realize(cdev, vcdev->vdev.sysfsdev, &err);
+if (err) {
+goto out_err_propagate;
 }
 }
+vbasedev->sysfsdev = g_strdup_printf("/sys/bus/css/devices/%s/%s",
+ name, cdev->mdevid);
+vbasedev->ops = &vfio_ccw_ops;
+vbasedev->type = VFIO_DEVICE_TYPE_CCW;
+vbasedev->name = name;
+vbasedev->dev = &vcdev->cdev.parent_obj.parent_obj;
 
 /*
  * All vfio-ccw devices are believed to operate in a way compatible with
@@ -609,80 +614,18 @@ static void vfio_ccw_get_device(VFIOGroup *group, 
VFIOCCWDevice *vcdev,
  * needs to be set before vfio_get_device() for vfio common to handle
  * ram_block_discard_disable().
  */
-vcdev->vdev.ram_block_discard_allowed = true;
-
-if (vfio_get_device(group, vcdev->cdev.mdevid, &vcdev->vdev, errp)) {
-goto out_err;
-}
-
-vcdev->vdev.ops = &vfio_ccw_ops;
-vcdev->vdev.type = VFIO_DEVICE_TYPE_CCW;
-vcdev->vdev.name = name;
-vcdev->vdev.dev = &vcdev->cdev.parent_obj.parent_obj;
-
-return;
-
-out_err:
-g_free(name);
-}
-
-static VFIOGroup *vfio_ccw_get_group(S390CCWDevice *cdev, Error **errp)
-{
-char *tmp, group_path[PATH_MAX];
-ssize_t len;
-int groupid;
 
-tmp = g_strdup_printf("/sys/bus/css/devices/%x.%x.%04x/%s/iommu_group",
-  cdev->hostid.cssid, cdev->hostid.ssid,
-  cdev->hostid.devid, cdev->mdevid);
-len = readlink(tmp, group_path, sizeof(group_path));
-g_free(tmp);
+vbasedev->ram_block_discard_allowed = true;
 
-if (len <= 0 || len >= sizeof(group_path)) {
-error_setg(errp, "vfio: no iommu_group found");
-return NULL;
-}
-
-group_path[len] = 0;
-
-if (sscanf(basename(group_path), "%d", &groupid) != 1) {
-error_setg(errp, "vfio: failed to read %s", group_path);
-return NULL;
-}
-
-return vfio_get_group(groupid, &address_space_memory, errp);
-}
-
-static void vfio_ccw_realize(DeviceState *dev, Error **errp)
-{
-VFIOGroup *group;
-CcwDevice *ccw_dev = DO_UPCAST(CcwDevice, parent_obj, dev);
-S390CCWDevice *cdev = DO_UPCAST(S390CCWDevice, parent_obj, ccw_dev);
-VFIOCCWDevice *vcdev = DO_UPCAST(VFIOCCWDevice, cdev, cdev);
-S390CCWDeviceClass *cdc = S390_CCW_DEVICE_GET_CLASS(cdev);
-Error *err = NULL;
-
-/* Call the class init function for subchannel. */
-if (cdc->realize) {
-cdc->realize(cdev, vcdev->vdev.sysfsdev, &err);
-if (err) {
-goto out_err_propagate;
-}
-}
-
-group = vfio_ccw_get_group(cdev, &err);
-if (!group) {
-goto out_group_err;
-}
-
-vfio_ccw_get_device(group, vcdev, &err);
-if (err) {
-goto out_device_err;
+ret = vfio_attach_device(vbasedev, &address_space_memory, errp);
+if (ret) {
+g_free(vbasedev->name);
+g_free(vbasedev->sysfsdev);
 }
 
 v

[RFC v2 05/15] vfio/container: Introduce vfio_[attach/detach]_device

2022-06-08 Thread Yi Liu
From: Eric Auger 

We want the VFIO devices to be able to use two different
IOMMU callbacks, the legacy VFIO one and the new iommufd one.

Introduce vfio_[attach/detach]_device which aim at hiding the
underlying IOMMU backend (IOCTLs, datatypes, ...).

Once vfio_attach_device completes, the device is attached
to a security context and its fd can be used. Conversely
When vfio_detach_device completes, the device has been
detached to the security context.

In this patch, only the vfio-pci device gets converted to use
the new API. Subsequent patches will handle other devices.

Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
---
 hw/vfio/container.c   | 65 +++
 hw/vfio/pci.c | 50 +++
 include/hw/vfio/vfio-common.h |  2 ++
 3 files changed, 72 insertions(+), 45 deletions(-)

diff --git a/hw/vfio/container.c b/hw/vfio/container.c
index dfc5183d5d..74e6eeba74 100644
--- a/hw/vfio/container.c
+++ b/hw/vfio/container.c
@@ -1218,6 +1218,71 @@ int vfio_eeh_as_op(AddressSpace *as, uint32_t op)
 return vfio_eeh_container_op(container, op);
 }
 
+static int vfio_device_groupid(VFIODevice *vbasedev, Error **errp)
+{
+char *tmp, group_path[PATH_MAX], *group_name;
+int ret, groupid;
+ssize_t len;
+
+tmp = g_strdup_printf("%s/iommu_group", vbasedev->sysfsdev);
+len = readlink(tmp, group_path, sizeof(group_path));
+g_free(tmp);
+
+if (len <= 0 || len >= sizeof(group_path)) {
+ret = len < 0 ? -errno : -ENAMETOOLONG;
+error_setg_errno(errp, -ret, "no iommu_group found");
+return ret;
+}
+
+group_path[len] = 0;
+
+group_name = basename(group_path);
+if (sscanf(group_name, "%d", &groupid) != 1) {
+error_setg_errno(errp, errno, "failed to read %s", group_path);
+return -errno;
+}
+return groupid;
+}
+
+int vfio_attach_device(VFIODevice *vbasedev, AddressSpace *as, Error **errp)
+{
+int groupid = vfio_device_groupid(vbasedev, errp);
+VFIODevice *vbasedev_iter;
+VFIOGroup *group;
+int ret;
+
+if (groupid < 0) {
+return groupid;
+}
+
+trace_vfio_realize(vbasedev->name, groupid);
+group = vfio_get_group(groupid, as, errp);
+if (!group) {
+return -1;
+}
+
+QLIST_FOREACH(vbasedev_iter, &group->device_list, next) {
+if (strcmp(vbasedev_iter->name, vbasedev->name) == 0) {
+error_setg(errp, "device is already attached");
+vfio_put_group(group);
+return -1;
+}
+}
+ret = vfio_get_device(group, vbasedev->name, vbasedev, errp);
+if (ret) {
+vfio_put_group(group);
+return -1;
+}
+
+return 0;
+}
+
+void vfio_detach_device(VFIODevice *vbasedev)
+{
+vfio_put_base_device(vbasedev);
+vfio_put_group(vbasedev->group);
+}
+
 const VFIOContainerOps legacy_container_ops = {
 .dma_map = vfio_dma_map,
 .dma_unmap = vfio_dma_unmap,
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index a9973a6d6a..9856d81819 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -2697,10 +2697,9 @@ static void vfio_populate_device(VFIOPCIDevice *vdev, 
Error **errp)
 
 static void vfio_put_device(VFIOPCIDevice *vdev)
 {
-g_free(vdev->vbasedev.name);
 g_free(vdev->msix);
 
-vfio_put_base_device(&vdev->vbasedev);
+vfio_detach_device(&vdev->vbasedev);
 }
 
 static void vfio_err_notifier_handler(void *opaque)
@@ -2847,13 +2846,9 @@ static void vfio_realize(PCIDevice *pdev, Error **errp)
 {
 VFIOPCIDevice *vdev = VFIO_PCI(pdev);
 VFIODevice *vbasedev = &vdev->vbasedev;
-VFIODevice *vbasedev_iter;
-VFIOGroup *group;
-char *tmp, *subsys, group_path[PATH_MAX], *group_name;
+char *tmp, *subsys;
 Error *err = NULL;
-ssize_t len;
 struct stat st;
-int groupid;
 int i, ret;
 bool is_mdev;
 
@@ -2882,39 +2877,6 @@ static void vfio_realize(PCIDevice *pdev, Error **errp)
 vbasedev->type = VFIO_DEVICE_TYPE_PCI;
 vbasedev->dev = DEVICE(vdev);
 
-tmp = g_strdup_printf("%s/iommu_group", vbasedev->sysfsdev);
-len = readlink(tmp, group_path, sizeof(group_path));
-g_free(tmp);
-
-if (len <= 0 || len >= sizeof(group_path)) {
-error_setg_errno(errp, len < 0 ? errno : ENAMETOOLONG,
- "no iommu_group found");
-goto error;
-}
-
-group_path[len] = 0;
-
-group_name = basename(group_path);
-if (sscanf(group_name, "%d", &groupid) != 1) {
-error_setg_errno(errp, errno, "failed to read %s", group_path);
-goto error;
-}
-
-trace_vfio_realize(vbasedev->name, groupid);
-
-group = vfio_get_group(groupid, pci_device_iommu_address_space(pdev), 
errp);
-if (!group) {
-goto error;
-}
-
-QLIST_FOREACH(vbasedev_iter, &group->device_list, next) {
-if (strcmp(vbasedev_iter->name, vbasedev->name) == 0) {
-error_setg(errp, "device is already attached");
-vfio_put_group(group)

[RFC v2 07/15] vfio/ap: Use vfio_[attach/detach]_device

2022-06-08 Thread Yi Liu
From: Eric Auger 

Let the vfio-ap device use vfio_attach_device() and
vfio_detach_device(), hence hiding the details of the used
IOMMU backend.

Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
---
 hw/vfio/ap.c | 62 
 1 file changed, 9 insertions(+), 53 deletions(-)

diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c
index e0dd561e85..286ac638e5 100644
--- a/hw/vfio/ap.c
+++ b/hw/vfio/ap.c
@@ -50,58 +50,17 @@ struct VFIODeviceOps vfio_ap_ops = {
 .vfio_compute_needs_reset = vfio_ap_compute_needs_reset,
 };
 
-static void vfio_ap_put_device(VFIOAPDevice *vapdev)
-{
-g_free(vapdev->vdev.name);
-vfio_put_base_device(&vapdev->vdev);
-}
-
-static VFIOGroup *vfio_ap_get_group(VFIOAPDevice *vapdev, Error **errp)
-{
-GError *gerror = NULL;
-char *symlink, *group_path;
-int groupid;
-
-symlink = g_strdup_printf("%s/iommu_group", vapdev->vdev.sysfsdev);
-group_path = g_file_read_link(symlink, &gerror);
-g_free(symlink);
-
-if (!group_path) {
-error_setg(errp, "%s: no iommu_group found for %s: %s",
-   TYPE_VFIO_AP_DEVICE, vapdev->vdev.sysfsdev, 
gerror->message);
-g_error_free(gerror);
-return NULL;
-}
-
-if (sscanf(basename(group_path), "%d", &groupid) != 1) {
-error_setg(errp, "vfio: failed to read %s", group_path);
-g_free(group_path);
-return NULL;
-}
-
-g_free(group_path);
-
-return vfio_get_group(groupid, &address_space_memory, errp);
-}
-
 static void vfio_ap_realize(DeviceState *dev, Error **errp)
 {
-int ret;
-char *mdevid;
-VFIOGroup *vfio_group;
 APDevice *apdev = AP_DEVICE(dev);
 VFIOAPDevice *vapdev = VFIO_AP_DEVICE(apdev);
+VFIODevice *vbasedev = &vapdev->vdev;
+int ret;
 
-vfio_group = vfio_ap_get_group(vapdev, errp);
-if (!vfio_group) {
-return;
-}
-
-vapdev->vdev.ops = &vfio_ap_ops;
-vapdev->vdev.type = VFIO_DEVICE_TYPE_AP;
-mdevid = basename(vapdev->vdev.sysfsdev);
-vapdev->vdev.name = g_strdup_printf("%s", mdevid);
-vapdev->vdev.dev = dev;
+vbasedev->name = g_path_get_basename(vbasedev->sysfsdev);
+vbasedev->ops = &vfio_ap_ops;
+vbasedev->type = VFIO_DEVICE_TYPE_AP;
+vbasedev->dev = dev;
 
 /*
  * vfio-ap devices operate in a way compatible with discarding of
@@ -111,7 +70,7 @@ static void vfio_ap_realize(DeviceState *dev, Error **errp)
  */
 vapdev->vdev.ram_block_discard_allowed = true;
 
-ret = vfio_get_device(vfio_group, mdevid, &vapdev->vdev, errp);
+ret = vfio_attach_device(vbasedev, &address_space_memory, errp);
 if (ret) {
 goto out_get_dev_err;
 }
@@ -119,18 +78,15 @@ static void vfio_ap_realize(DeviceState *dev, Error **errp)
 return;
 
 out_get_dev_err:
-vfio_ap_put_device(vapdev);
-vfio_put_group(vfio_group);
+vfio_detach_device(vbasedev);
 }
 
 static void vfio_ap_unrealize(DeviceState *dev)
 {
 APDevice *apdev = AP_DEVICE(dev);
 VFIOAPDevice *vapdev = VFIO_AP_DEVICE(apdev);
-VFIOGroup *group = vapdev->vdev.group;
 
-vfio_ap_put_device(vapdev);
-vfio_put_group(group);
+vfio_detach_device(&vapdev->vdev);
 }
 
 static Property vfio_ap_properties[] = {
-- 
2.27.0




[RFC v2 12/15] util/char_dev: Add open_cdev()

2022-06-08 Thread Yi Liu
/dev/vfio/devices/vfioX may not exist. In that case it is still possible
to open /dev/char/$major:$minor instead. Add helper function to abstract
the cdev open.

Suggested-by: Jason Gunthorpe 
Signed-off-by: Yi Liu 
---
 MAINTAINERS |  6 +
 include/qemu/char_dev.h | 16 
 util/chardev_open.c | 58 +
 util/meson.build|  1 +
 4 files changed, 81 insertions(+)
 create mode 100644 include/qemu/char_dev.h
 create mode 100644 util/chardev_open.c

diff --git a/MAINTAINERS b/MAINTAINERS
index c6aa4e7fd0..0b3ade4170 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3171,6 +3171,12 @@ S: Maintained
 F: include/qemu/iova-tree.h
 F: util/iova-tree.c
 
+cdev Open
+M: Yi Liu 
+S: Maintained
+F: include/qemu/char_dev.h
+F: util/chardev_open.c
+
 elf2dmp
 M: Viktor Prutyanov 
 S: Maintained
diff --git a/include/qemu/char_dev.h b/include/qemu/char_dev.h
new file mode 100644
index 00..79877fb24d
--- /dev/null
+++ b/include/qemu/char_dev.h
@@ -0,0 +1,16 @@
+/*
+ * QEMU Chardev Helper
+ *
+ * Copyright (C) 2022 Intel Corporation.
+ *
+ * Authors: Yi Liu 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#ifndef QEMU_CHARDEV_HELPERS_H
+#define QEMU_CHARDEV_HELPERS_H
+
+int open_cdev(const char *devpath, dev_t cdev);
+#endif
diff --git a/util/chardev_open.c b/util/chardev_open.c
new file mode 100644
index 00..133fad06ec
--- /dev/null
+++ b/util/chardev_open.c
@@ -0,0 +1,58 @@
+/*
+ * Copyright (C) 2022 Intel Corporation.
+ * Copyright (c) 2019, Mellanox Technologies. All rights reserved.
+ *
+ * Authors: Yi Liu 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ *
+ * Copied from 
https://github.com/linux-rdma/rdma-core/blob/master/util/open_cdev.c
+ *
+ */
+#ifndef _GNU_SOURCE
+#define _GNU_SOURCE
+#endif
+#include "qemu/osdep.h"
+#include "qemu/char_dev.h"
+
+static int open_cdev_internal(const char *path, dev_t cdev)
+{
+struct stat st;
+int fd;
+
+fd = qemu_open_old(path, O_RDWR);
+if (fd == -1)
+return -1;
+if (fstat(fd, &st) || !S_ISCHR(st.st_mode) ||
+(cdev != 0 && st.st_rdev != cdev)) {
+close(fd);
+return -1;
+}
+return fd;
+}
+
+static int open_cdev_robust(dev_t cdev)
+{
+char *devpath;
+int ret;
+
+/*
+ * This assumes that udev is being used and is creating the /dev/char/
+ * symlinks.
+ */
+devpath = g_strdup_printf("/dev/char/%u:%u", major(cdev), minor(cdev));
+ret = open_cdev_internal(devpath, cdev);
+g_free(devpath);
+return ret;
+}
+
+int open_cdev(const char *devpath, dev_t cdev)
+{
+int fd;
+
+fd = open_cdev_internal(devpath, cdev);
+if (fd == -1 && cdev != 0)
+return open_cdev_robust(cdev);
+return fd;
+}
diff --git a/util/meson.build b/util/meson.build
index 8f16018cd4..eff15d3826 100644
--- a/util/meson.build
+++ b/util/meson.build
@@ -95,4 +95,5 @@ if have_block
 util_ss.add(files('filemonitor-stub.c'))
   endif
   util_ss.add(when: 'CONFIG_LINUX', if_true: files('vfio-helpers.c'))
+  util_ss.add(when: 'CONFIG_LINUX', if_true: files('chardev_open.c'))
 endif
-- 
2.27.0




[RFC v2 13/15] vfio/iommufd: Implement the iommufd backend

2022-06-08 Thread Yi Liu
Add the iommufd backend. The IOMMUFD container class is implemented
based on the new /dev/iommu user API. This backend obviously depends
on CONFIG_IOMMUFD.

So far, the iommufd backend doesn't support live migration and
cache coherency yet due to missing support in the host kernel meaning
that only a subset of the container class callbacks is implemented.

Co-authored-by: Eric Auger 
Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
---
v1 -> v2:
- arbitrarily set bcontainer->pgsizes to 4K to fix interoperability
  with virtio-iommu (Nicolin)
- add tear down in iommufd_attach_device error path
- use cdev open for /dev/vfio/devices/vfioX open
---
 hw/vfio/as.c  |   2 +-
 hw/vfio/iommufd.c | 517 ++
 hw/vfio/meson.build   |   3 +
 hw/vfio/pci.c |  10 +
 hw/vfio/trace-events  |  11 +
 include/hw/vfio/vfio-common.h |  22 ++
 6 files changed, 564 insertions(+), 1 deletion(-)
 create mode 100644 hw/vfio/iommufd.c

diff --git a/hw/vfio/as.c b/hw/vfio/as.c
index 1a3ceb5e62..3ff9d4215f 100644
--- a/hw/vfio/as.c
+++ b/hw/vfio/as.c
@@ -42,7 +42,7 @@
 #include "migration/migration.h"
 #include "sysemu/tpm.h"
 
-static QLIST_HEAD(, VFIOAddressSpace) vfio_address_spaces =
+VFIOAddressSpaceList vfio_address_spaces =
 QLIST_HEAD_INITIALIZER(vfio_address_spaces);
 
 void vfio_host_win_add(VFIOContainer *container,
diff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c
new file mode 100644
index 00..7417c6ce44
--- /dev/null
+++ b/hw/vfio/iommufd.c
@@ -0,0 +1,517 @@
+/*
+ * iommufd container backend
+ *
+ * Copyright (C) 2022 Intel Corporation.
+ * Copyright Red Hat, Inc. 2022
+ *
+ * Authors: Yi Liu 
+ *  Eric Auger 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see .
+ */
+
+#include "qemu/osdep.h"
+#include 
+#include 
+
+#include "hw/vfio/vfio-common.h"
+#include "qemu/error-report.h"
+#include "trace.h"
+#include "qapi/error.h"
+#include "sysemu/iommufd.h"
+#include "hw/qdev-core.h"
+#include "sysemu/reset.h"
+#include "qemu/cutils.h"
+#include "qemu/char_dev.h"
+
+static bool iommufd_check_extension(VFIOContainer *bcontainer,
+VFIOContainerFeature feat)
+{
+switch (feat) {
+default:
+return false;
+};
+}
+
+static int iommufd_map(VFIOContainer *bcontainer, hwaddr iova,
+   ram_addr_t size, void *vaddr, bool readonly)
+{
+VFIOIOMMUFDContainer *container = container_of(bcontainer,
+   VFIOIOMMUFDContainer, 
bcontainer);
+
+return iommufd_backend_map_dma(container->be,
+   container->ioas_id,
+   iova, size, vaddr, readonly);
+}
+
+static int iommufd_unmap(VFIOContainer *bcontainer,
+ hwaddr iova, ram_addr_t size,
+ IOMMUTLBEntry *iotlb)
+{
+VFIOIOMMUFDContainer *container = container_of(bcontainer,
+   VFIOIOMMUFDContainer, 
bcontainer);
+
+/* TODO: Handle dma_unmap_bitmap with iotlb args (migration) */
+return iommufd_backend_unmap_dma(container->be,
+ container->ioas_id, iova, size);
+}
+
+static int vfio_get_devicefd(const char *sysfs_path, Error **errp)
+{
+long int ret = -ENOTTY;
+char *path, *vfio_dev_path = NULL, *vfio_path = NULL;
+DIR *dir;
+struct dirent *dent;
+gchar *contents;
+struct stat st;
+gsize length;
+int major, minor;
+dev_t vfio_devt;
+
+path = g_strdup_printf("%s/vfio-device", sysfs_path);
+if (stat(path, &st) < 0) {
+error_setg_errno(errp, errno, "no such host device");
+goto out_free_path;
+}
+
+dir = opendir(path);
+if (!dir) {
+error_setg_errno(errp, errno, "couldn't open dirrectory %s", path);
+goto out_free_path;
+}
+
+while ((dent = readdir(dir))) {
+if (!strncmp(dent->d_name, "vfio", 4)) {
+vfio_dev_path = g_strdup_printf("%s/%s/dev", path, dent->d_name);
+break;
+}
+}
+
+if (!vfio_dev_path) {
+error_setg(errp, "failed to find vfio-device/vfioX/dev");
+goto out_free_path;
+}
+
+if (!g_file_get_contents(vfio_dev_path, &contents, &length, NULL)) {
+error_setg(errp, "failed to load \"%s\""

[RFC v2 14/15] vfio/iommufd: Add IOAS_COPY_DMA support

2022-06-08 Thread Yi Liu
Compared with legacy vfio container BE, one of the benefits provided by
iommufd is to reduce the redundant page pinning on kernel side through
the usage of IOAS_COPY_DMA. For iommufd containers within the same address
space, IOVA mappings can be copied from a source container to destination
container.

To achieve this, move the vfio_memory_listener to be per address space.
In the memory listener callbacks, all the containers within the address
space will be looped. For the iommufd containers, QEMU uses IOAS_MAP_DMA
on the first one, and then uses IOAS_COPY_DMA to copy the IOVA mappings
from the first iommufd container to other iommufd containers within the
address space. For legacy containers, IOVA mapping is done by
VFIO_IOMMU_MAP_DMA.

Signed-off-by: Yi Liu 
---
 hw/vfio/as.c  | 117 ++
 hw/vfio/container-base.c  |  13 ++-
 hw/vfio/container.c   |  19 ++---
 hw/vfio/iommufd.c |  47 +--
 include/hw/vfio/vfio-common.h |   5 +-
 include/hw/vfio/vfio-container-base.h |   8 +-
 6 files changed, 167 insertions(+), 42 deletions(-)

diff --git a/hw/vfio/as.c b/hw/vfio/as.c
index 3ff9d4215f..56485f9299 100644
--- a/hw/vfio/as.c
+++ b/hw/vfio/as.c
@@ -405,16 +405,16 @@ static bool 
vfio_known_safe_misalignment(MemoryRegionSection *section)
 return true;
 }
 
-static void vfio_listener_region_add(MemoryListener *listener,
- MemoryRegionSection *section)
+static void vfio_container_region_add(VFIOContainer *container,
+  VFIOContainer **src_container,
+  MemoryRegionSection *section)
 {
-VFIOContainer *container = container_of(listener, VFIOContainer, listener);
 hwaddr iova, end;
 Int128 llend, llsize;
 void *vaddr;
 int ret;
 VFIOHostDMAWindow *hostwin;
-bool hostwin_found;
+bool hostwin_found, copy_dma_supported = false;
 Error *err = NULL;
 
 if (vfio_listener_skipped_section(section)) {
@@ -558,12 +558,25 @@ static void vfio_listener_region_add(MemoryListener 
*listener,
 }
 }
 
+copy_dma_supported = vfio_container_check_extension(container,
+VFIO_FEAT_DMA_COPY);
+
+if (copy_dma_supported && *src_container) {
+if (!vfio_container_dma_copy(*src_container, container,
+ iova, int128_get64(llsize),
+ section->readonly)) {
+return;
+} else {
+info_report("IOAS copy failed try map for container: %p", 
container);
+}
+}
+
 ret = vfio_container_dma_map(container, iova, int128_get64(llsize),
  vaddr, section->readonly);
 if (ret) {
-error_setg(&err, "vfio_dma_map(%p, 0x%"HWADDR_PRIx", "
-   "0x%"HWADDR_PRIx", %p) = %d (%m)",
-   container, iova, int128_get64(llsize), vaddr, ret);
+error_setg(&err, "vfio_container_dma_map(%p, 0x%"HWADDR_PRIx", "
+   "0x%"HWADDR_PRIx", %p) = %d (%m)", container, iova,
+   int128_get64(llsize), vaddr, ret);
 if (memory_region_is_ram_device(section->mr)) {
 /* Allow unexpected mappings not to be fatal for RAM devices */
 error_report_err(err);
@@ -572,6 +585,9 @@ static void vfio_listener_region_add(MemoryListener 
*listener,
 goto fail;
 }
 
+if (copy_dma_supported) {
+*src_container = container;
+}
 return;
 
 fail:
@@ -598,10 +614,22 @@ fail:
 }
 }
 
-static void vfio_listener_region_del(MemoryListener *listener,
+static void vfio_listener_region_add(MemoryListener *listener,
  MemoryRegionSection *section)
 {
-VFIOContainer *container = container_of(listener, VFIOContainer, listener);
+VFIOAddressSpace *space = container_of(listener,
+   VFIOAddressSpace, listener);
+VFIOContainer *container, *src_container;
+
+src_container = NULL;
+QLIST_FOREACH(container, &space->containers, next) {
+vfio_container_region_add(container, &src_container, section);
+}
+}
+
+static void vfio_container_region_del(VFIOContainer *container,
+  MemoryRegionSection *section)
+{
 hwaddr iova, end;
 Int128 llend, llsize;
 int ret;
@@ -707,18 +735,38 @@ static void vfio_listener_region_del(MemoryListener 
*listener,
 vfio_container_del_section_window(container, section);
 }
 
+static void vfio_listener_region_del(MemoryListener *listener,
+ MemoryRegionSection *section)
+{
+VFIOAddressSpace *space = container_of(listener,
+   VFIOAddressSpace, listener);
+VFIOContainer *container;
+
+QLIST_FOREACH(container, &space->containers, ne

[RFC v2 09/15] vfio/container-base: Introduce [attach/detach]_device container callbacks

2022-06-08 Thread Yi Liu
From: Eric Auger 

Let's turn attach/detach_device as container callbacks. That way,
their implementation can be easily customized for a given backend.

For the time being, only the legacy container is supported.

Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
---
 hw/vfio/as.c  | 30 +++
 hw/vfio/container.c   |  9 ++--
 hw/vfio/pci.c |  2 +-
 include/hw/vfio/vfio-common.h |  7 +++
 include/hw/vfio/vfio-container-base.h |  4 
 5 files changed, 49 insertions(+), 3 deletions(-)

diff --git a/hw/vfio/as.c b/hw/vfio/as.c
index ec58914001..2c83b8e1fe 100644
--- a/hw/vfio/as.c
+++ b/hw/vfio/as.c
@@ -899,3 +899,33 @@ void vfio_put_address_space(VFIOAddressSpace *space)
 g_free(space);
 }
 }
+
+static const VFIOContainerOps *
+vfio_get_container_ops(VFIOIOMMUBackendType be)
+{
+switch (be) {
+case VFIO_IOMMU_BACKEND_TYPE_LEGACY:
+return &legacy_container_ops;
+default:
+return NULL;
+}
+}
+
+int vfio_attach_device(VFIODevice *vbasedev, AddressSpace *as, Error **errp)
+{
+const VFIOContainerOps *ops;
+
+ops = vfio_get_container_ops(VFIO_IOMMU_BACKEND_TYPE_LEGACY);
+if (!ops) {
+return -ENOENT;
+}
+return ops->attach_device(vbasedev, as, errp);
+}
+
+void vfio_detach_device(VFIODevice *vbasedev)
+{
+if (!vbasedev->container) {
+return;
+}
+vbasedev->container->ops->detach_device(vbasedev);
+}
diff --git a/hw/vfio/container.c b/hw/vfio/container.c
index fbde5b0d31..f303c08aa5 100644
--- a/hw/vfio/container.c
+++ b/hw/vfio/container.c
@@ -1244,7 +1244,8 @@ static int vfio_device_groupid(VFIODevice *vbasedev, 
Error **errp)
 return groupid;
 }
 
-int vfio_attach_device(VFIODevice *vbasedev, AddressSpace *as, Error **errp)
+static int
+legacy_attach_device(VFIODevice *vbasedev, AddressSpace *as, Error **errp)
 {
 int groupid = vfio_device_groupid(vbasedev, errp);
 VFIODevice *vbasedev_iter;
@@ -1273,14 +1274,16 @@ int vfio_attach_device(VFIODevice *vbasedev, 
AddressSpace *as, Error **errp)
 vfio_put_group(group);
 return -1;
 }
+vbasedev->container = &group->container->bcontainer;
 
 return 0;
 }
 
-void vfio_detach_device(VFIODevice *vbasedev)
+static void legacy_detach_device(VFIODevice *vbasedev)
 {
 vfio_put_base_device(vbasedev);
 vfio_put_group(vbasedev->group);
+vbasedev->container = NULL;
 }
 
 const VFIOContainerOps legacy_container_ops = {
@@ -1292,4 +1295,6 @@ const VFIOContainerOps legacy_container_ops = {
 .add_window = vfio_legacy_container_add_section_window,
 .del_window = vfio_legacy_container_del_section_window,
 .check_extension = vfio_legacy_container_check_extension,
+.attach_device = legacy_attach_device,
+.detach_device = legacy_detach_device,
 };
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 9856d81819..07361a6fcd 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -3106,7 +3106,7 @@ static void vfio_realize(PCIDevice *pdev, Error **errp)
 }
 
 if (!pdev->failover_pair_id &&
-vfio_container_check_extension(&vbasedev->group->container->bcontainer,
+vfio_container_check_extension(vbasedev->container,
VFIO_FEAT_LIVE_MIGRATION)) {
 ret = vfio_migration_probe(vbasedev, errp);
 if (ret) {
diff --git a/include/hw/vfio/vfio-common.h b/include/hw/vfio/vfio-common.h
index 669d761728..635397d391 100644
--- a/include/hw/vfio/vfio-common.h
+++ b/include/hw/vfio/vfio-common.h
@@ -84,9 +84,15 @@ typedef struct VFIOLegacyContainer {
 
 typedef struct VFIODeviceOps VFIODeviceOps;
 
+typedef enum VFIOIOMMUBackendType {
+VFIO_IOMMU_BACKEND_TYPE_LEGACY = 0,
+VFIO_IOMMU_BACKEND_TYPE_IOMMUFD = 1,
+} VFIOIOMMUBackendType;
+
 typedef struct VFIODevice {
 QLIST_ENTRY(VFIODevice) next;
 struct VFIOGroup *group;
+VFIOContainer *container;
 char *sysfsdev;
 char *name;
 DeviceState *dev;
@@ -98,6 +104,7 @@ typedef struct VFIODevice {
 bool ram_block_discard_allowed;
 bool enable_migration;
 VFIODeviceOps *ops;
+VFIOIOMMUBackendType be;
 unsigned int num_irqs;
 unsigned int num_regions;
 unsigned int flags;
diff --git a/include/hw/vfio/vfio-container-base.h 
b/include/hw/vfio/vfio-container-base.h
index fa5d7fcb85..71df8743fb 100644
--- a/include/hw/vfio/vfio-container-base.h
+++ b/include/hw/vfio/vfio-container-base.h
@@ -66,6 +66,8 @@ typedef struct VFIOHostDMAWindow {
 QLIST_ENTRY(VFIOHostDMAWindow) hostwin_next;
 } VFIOHostDMAWindow;
 
+typedef struct VFIODevice VFIODevice;
+
 typedef struct VFIOContainerOps {
 /* required */
 bool (*check_extension)(VFIOContainer *container,
@@ -88,6 +90,8 @@ typedef struct VFIOContainerOps {
   Error **errp);
 void (*del_window)(VFIOContainer *container,
MemoryRegionSection *section);
+int (*attach_device)(VFIODev

[RFC v2 11/15] backends/iommufd: Introduce the iommufd object

2022-06-08 Thread Yi Liu
From: Eric Auger 

Introduce an iommufd object which allows the interaction
with the host /dev/iommu device.

The /dev/iommu can have been already pre-opened outside of qemu,
in which case the fd can be passed directly along with the
iommufd object:

This allows the iommufd object to be shared accross several
subsystems (VFIO, VDPA, ...). For example, libvirt would open
the /dev/iommu once.

If no fd is passed along with the iommufd object, the /dev/iommu
is opened by the qemu code.

The CONFIG_IOMMUFD option must be set to compile this new object.

Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
Suggested-by: Alex Williamson 
---
 MAINTAINERS  |   7 ++
 backends/Kconfig |   5 +
 backends/iommufd.c   | 265 +++
 backends/meson.build |   1 +
 backends/trace-events|  12 ++
 include/sysemu/iommufd.h |  47 +++
 qapi/qom.json|  16 ++-
 qemu-options.hx  |  12 ++
 8 files changed, 364 insertions(+), 1 deletion(-)
 create mode 100644 backends/iommufd.c
 create mode 100644 include/sysemu/iommufd.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 5580a36b68..c6aa4e7fd0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1984,6 +1984,13 @@ F: hw/vfio/ap.c
 F: docs/system/s390x/vfio-ap.rst
 L: qemu-s3...@nongnu.org
 
+iommufd
+M: Yi Liu 
+M: Eric Auger 
+S: Supported
+F: backends/iommufd.c
+F: include/sysemu/iommufd.h
+
 vhost
 M: Michael S. Tsirkin 
 S: Supported
diff --git a/backends/Kconfig b/backends/Kconfig
index f35abc1609..aad57e8f53 100644
--- a/backends/Kconfig
+++ b/backends/Kconfig
@@ -1 +1,6 @@
 source tpm/Kconfig
+
+config IOMMUFD
+bool
+default y
+depends on LINUX
diff --git a/backends/iommufd.c b/backends/iommufd.c
new file mode 100644
index 00..6a66948d5d
--- /dev/null
+++ b/backends/iommufd.c
@@ -0,0 +1,265 @@
+/*
+ * iommufd container backend
+ *
+ * Copyright (C) 2022 Intel Corporation.
+ * Copyright Red Hat, Inc. 2022
+ *
+ * Authors: Yi Liu 
+ *  Eric Auger 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see .
+ */
+
+#include "qemu/osdep.h"
+#include "sysemu/iommufd.h"
+#include "qapi/error.h"
+#include "qapi/qmp/qerror.h"
+#include "qemu/module.h"
+#include "qom/object_interfaces.h"
+#include "qemu/error-report.h"
+#include "monitor/monitor.h"
+#include "trace.h"
+#include 
+#include 
+
+static void iommufd_backend_init(Object *obj)
+{
+IOMMUFDBackend *be = IOMMUFD_BACKEND(obj);
+
+be->fd = -1;
+be->users = 0;
+be->owned = true;
+qemu_mutex_init(&be->lock);
+}
+
+static void iommufd_backend_finalize(Object *obj)
+{
+IOMMUFDBackend *be = IOMMUFD_BACKEND(obj);
+
+if (be->owned) {
+close(be->fd);
+be->fd = -1;
+}
+}
+
+static void iommufd_backend_set_fd(Object *obj, const char *str, Error **errp)
+{
+IOMMUFDBackend *be = IOMMUFD_BACKEND(obj);
+int fd = -1;
+
+fd = monitor_fd_param(monitor_cur(), str, errp);
+if (fd == -1) {
+error_prepend(errp, "Could not parse remote object fd %s:", str);
+return;
+}
+qemu_mutex_lock(&be->lock);
+be->fd = fd;
+be->owned = false;
+qemu_mutex_unlock(&be->lock);
+trace_iommu_backend_set_fd(be->fd);
+}
+
+static void iommufd_backend_class_init(ObjectClass *oc, void *data)
+{
+object_class_property_add_str(oc, "fd", NULL, iommufd_backend_set_fd);
+}
+
+int iommufd_backend_connect(IOMMUFDBackend *be, Error **errp)
+{
+int fd, ret = 0;
+
+qemu_mutex_lock(&be->lock);
+if (be->users == UINT32_MAX) {
+error_setg(errp, "too many connections");
+ret = -E2BIG;
+goto out;
+}
+if (be->owned && !be->users) {
+fd = qemu_open_old("/dev/iommu", O_RDWR);
+if (fd < 0) {
+error_setg_errno(errp, errno, "/dev/iommu opening failed");
+ret = fd;
+goto out;
+}
+be->fd = fd;
+}
+be->users++;
+out:
+trace_iommufd_backend_connect(be->fd, be->owned,
+  be->users, ret);
+qemu_mutex_unlock(&be->lock);
+return ret;
+}
+
+void iommufd_backend_disconnect(IOMMUFDBackend *be)
+{
+qemu_mutex_lock(&be->lock);
+if (!be->users) {
+goto out;
+}
+be->users--;
+if (!be->users && be->owned) {
+close(be->fd);
+be->fd = -1;
+}
+out:
+trace_iommufd_backend_disconnect(be->fd, be->users);
+   

[RFC v2 15/15] vfio/as: Allow the selection of a given iommu backend

2022-06-08 Thread Yi Liu
From: Eric Auger 

Now we support two types of iommu backends, let's add the capability
to select one of them. This depends on whether an iommufd object has
been linked with the vfio-pci device:

if the user wants to use the legacy backend, it shall not
link the vfio-pci device with any iommufd object:

-device vfio-pci,host=:02:00.0

This is called the legacy mode/backend.

If the user wants to use the iommufd backend (/dev/iommu) it
shall pass an iommufd object id in the vfio-pci device options:

 -object iommufd,id=iommufd0
 -device vfio-pci,host=:02:00.0,iommufd=iommufd0

Note the /dev/iommu device may have been pre-opened by a
management tool such as libvirt. This mode is no more considered
for the legacy backend. So let's remove the "TODO" comment.

Signed-off-by: Eric Auger 
Signed-off-by: Yi Liu 
Suggested-by: Alex Williamson 
---
 hw/vfio/as.c  |  9 ++---
 hw/vfio/pci.c | 19 ++-
 2 files changed, 20 insertions(+), 8 deletions(-)

diff --git a/hw/vfio/as.c b/hw/vfio/as.c
index 56485f9299..e799750104 100644
--- a/hw/vfio/as.c
+++ b/hw/vfio/as.c
@@ -1007,6 +1007,8 @@ vfio_get_container_ops(VFIOIOMMUBackendType be)
 switch (be) {
 case VFIO_IOMMU_BACKEND_TYPE_LEGACY:
 return &legacy_container_ops;
+case VFIO_IOMMU_BACKEND_TYPE_IOMMUFD:
+return &iommufd_container_ops;
 default:
 return NULL;
 }
@@ -1016,9 +1018,10 @@ int vfio_attach_device(VFIODevice *vbasedev, 
AddressSpace *as, Error **errp)
 {
 const VFIOContainerOps *ops;
 
-ops = vfio_get_container_ops(VFIO_IOMMU_BACKEND_TYPE_LEGACY);
-if (!ops) {
-return -ENOENT;
+if (vbasedev->iommufd) {
+ops = vfio_get_container_ops(VFIO_IOMMU_BACKEND_TYPE_IOMMUFD);
+} else {
+ops = vfio_get_container_ops(VFIO_IOMMU_BACKEND_TYPE_LEGACY);
 }
 return ops->attach_device(vbasedev, as, errp);
 }
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 6d10e86331..7efd3382ca 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -42,6 +42,7 @@
 #include "qapi/error.h"
 #include "migration/blocker.h"
 #include "migration/qemu-file.h"
+#include "sysemu/iommufd.h"
 
 #define TYPE_VFIO_PCI_NOHOTPLUG "vfio-pci-nohotplug"
 
@@ -2852,6 +2853,13 @@ static void vfio_realize(PCIDevice *pdev, Error **errp)
 int i, ret;
 bool is_mdev;
 
+if (vbasedev->iommufd) {
+iommufd_backend_connect(vbasedev->iommufd, errp);
+if (*errp) {
+return;
+}
+}
+
 if (!vbasedev->sysfsdev) {
 if (!(~vdev->host.domain || ~vdev->host.bus ||
   ~vdev->host.slot || ~vdev->host.function)) {
@@ -3134,6 +3142,7 @@ error:
 static void vfio_instance_finalize(Object *obj)
 {
 VFIOPCIDevice *vdev = VFIO_PCI(obj);
+VFIODevice *vbasedev = &vdev->vbasedev;
 
 vfio_display_finalize(vdev);
 vfio_bars_finalize(vdev);
@@ -3146,6 +3155,9 @@ static void vfio_instance_finalize(Object *obj)
  *
  * g_free(vdev->igd_opregion);
  */
+if (vbasedev->iommufd) {
+iommufd_backend_disconnect(vbasedev->iommufd);
+}
 vfio_put_device(vdev);
 }
 
@@ -3281,11 +3293,8 @@ static Property vfio_pci_dev_properties[] = {
qdev_prop_nv_gpudirect_clique, uint8_t),
 DEFINE_PROP_OFF_AUTO_PCIBAR("x-msix-relocation", VFIOPCIDevice, msix_relo,
 OFF_AUTOPCIBAR_OFF),
-/*
- * TODO - support passed fds... is this necessary?
- * DEFINE_PROP_STRING("vfiofd", VFIOPCIDevice, vfiofd_name),
- * DEFINE_PROP_STRING("vfiogroupfd, VFIOPCIDevice, vfiogroupfd_name),
- */
+DEFINE_PROP_LINK("iommufd", VFIOPCIDevice, vbasedev.iommufd,
+ TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *),
 DEFINE_PROP_END_OF_LIST(),
 };
 
-- 
2.27.0




Re: [PATCH v3 07/10] block: Implement bdrv_{pread,pwrite,pwrite_zeroes}() using generated_co_wrapper

2022-06-08 Thread Stefan Hajnoczi
On Mon, Jun 06, 2022 at 05:10:38PM +0100, Alberto Faria wrote:
> Thanks for the feedback, and apologies for the delayed response.
> 
> On Mon, May 30, 2022 at 1:49 PM Stefan Hajnoczi  wrote:
> > If you find it's safe to change to -EINVAL then that's consistent with
> > how file I/O syscalls work and I think it would be nice.
> 
> Switching to -EINVAL on negative bytes sounds good to me, but perhaps
> it should be done as a separate series. For now, switching just
> bdrv_{pread,pwrite}() to -EIO will make them consistent with all of
> bdrv_{preadv,pwritev}() and bdrv_co_{pread,pwrite,preadv,pwritev}(),
> accomplishing the purpose of this series with less changes and
> auditing.
> 
> I can work on a subsequent series that changes -EIO to -EINVAL on
> negative bytes for all the bdrv_...() and blk_...() functions.
> 
> Would this make sense?

Yes, that's fine. My main concern is that callers have been audited when
errnos are changed. If you switch bdrv_{pread,pwrite}() to -EIO and have
audited callers, then I'm happy.

Consistent -EINVAL would be nice in the future, but I think it's lower
priority and it doesn't have to be done any time soon.

Stefan


signature.asc
Description: PGP signature


[PATCH v4] hw/cxl: Fix missing write mask for HDM decoder target list registers

2022-06-08 Thread Jonathan Cameron via
Without being able to write these registers, no interleaving is possible.
More refined checks of HDM register state on commit to follow.

Signed-off-by: Jonathan Cameron 
Reviewed-by: Ben Widawsky 
---
v4: (Ben Widawsky review responses - thanks!)
 - Expand list of matched types for 'skip' usages (with more restrictive
   write mask) to include all CXL device types (type 3, type 1/2 and LD).
   We only emulate type 3 so far but good for the function implementation
   to be correct for the other types.
 - Added Ben's RB.
 
 hw/cxl/cxl-component-utils.c | 13 +++--
 1 file changed, 11 insertions(+), 2 deletions(-)

diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c
index 7985c9bfca..3edd303a33 100644
--- a/hw/cxl/cxl-component-utils.c
+++ b/hw/cxl/cxl-component-utils.c
@@ -154,7 +154,8 @@ static void ras_init_common(uint32_t *reg_state, uint32_t 
*write_msk)
 reg_state[R_CXL_RAS_ERR_CAP_CTRL] = 0x00;
 }
 
-static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk)
+static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk,
+enum reg_type type)
 {
 int decoder_count = 1;
 int i;
@@ -174,6 +175,14 @@ static void hdm_init_common(uint32_t *reg_state, uint32_t 
*write_msk)
 write_msk[R_CXL_HDM_DECODER0_SIZE_LO + i * 0x20] = 0xf000;
 write_msk[R_CXL_HDM_DECODER0_SIZE_HI + i * 0x20] = 0x;
 write_msk[R_CXL_HDM_DECODER0_CTRL + i * 0x20] = 0x13ff;
+if (type == CXL2_DEVICE ||
+type == CXL2_TYPE3_DEVICE ||
+type == CXL2_LOGICAL_DEVICE) {
+write_msk[R_CXL_HDM_DECODER0_TARGET_LIST_LO + i * 0x20] = 
0xf000;
+} else {
+write_msk[R_CXL_HDM_DECODER0_TARGET_LIST_LO + i * 0x20] = 
0x;
+}
+write_msk[R_CXL_HDM_DECODER0_TARGET_LIST_HI + i * 0x20] = 0x;
 }
 }
 
@@ -239,7 +248,7 @@ void cxl_component_register_init_common(uint32_t 
*reg_state, uint32_t *write_msk
 }
 
 init_cap_reg(HDM, 5, 1);
-hdm_init_common(reg_state, write_msk);
+hdm_init_common(reg_state, write_msk, type);
 
 if (caps < 5) {
 return;
-- 
2.32.0




Re: [PATCH v5 09/10] qmp: add filtering of statistics by name

2022-06-08 Thread Dr. David Alan Gilbert
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> Allow retrieving only a subset of statistics.  This can be useful
> for example in order to plot a subset of the statistics many times
> a second.
> 
> KVM publishes ~40 statistics for each vCPU on x86; retrieving and
> serializing all of them would be useless
> 
> Another use will be in HMP in the following patch; implementing the
> filter in the backend is easy enough that it was deemed okay to make
> this a public interface.
> 
> Example:
> 
> { "execute": "query-stats",
>   "arguments": {
> "target": "vcpu",
> "vcpus": [ "/machine/unattached/device[2]",
>"/machine/unattached/device[4]" ],
> "providers": [
>   { "provider": "kvm",
> "names": [ "l1d_flush", "exits" ] } } }
> 
> { "return": {
> "vcpus": [
>   { "path": "/machine/unattached/device[2]"
> "providers": [
>   { "provider": "kvm",
> "stats": [ { "name": "l1d_flush", "value": 41213 },
>{ "name": "exits", "value": 74291 } ] } ] },
>   { "path": "/machine/unattached/device[4]"
> "providers": [
>   { "provider": "kvm",
> "stats": [ { "name": "l1d_flush", "value": 16132 },
>{ "name": "exits", "value": 57922 } ] } ] } ] } }
> 
> Extracted from a patch by Mark Kanda.
> 
> Signed-off-by: Paolo Bonzini 

Reviewed-by: Dr. David Alan Gilbert 

> ---
>  accel/kvm/kvm-all.c | 17 +++--
>  include/monitor/stats.h |  2 +-
>  monitor/qmp-cmds.c  |  7 ++-
>  qapi/stats.json |  6 +-
>  4 files changed, 23 insertions(+), 9 deletions(-)
> 
> diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
> index 66c4ac1ac6..f90f0602bc 100644
> --- a/accel/kvm/kvm-all.c
> +++ b/accel/kvm/kvm-all.c
> @@ -2312,7 +2312,7 @@ bool kvm_dirty_ring_enabled(void)
>  }
>  
>  static void query_stats_cb(StatsResultList **result, StatsTarget target,
> -   strList *targets, Error **errp);
> +   strList *names, strList *targets, Error **errp);
>  static void query_stats_schemas_cb(StatsSchemaList **result, Error **errp);
>  
>  static int kvm_init(MachineState *ms)
> @@ -3713,6 +3713,7 @@ typedef struct StatsArgs {
>  StatsResultList **stats;
>  StatsSchemaList **schema;
>  } result;
> +strList *names;
>  Error **errp;
>  } StatsArgs;
>  
> @@ -3921,7 +3922,7 @@ static StatsDescriptors 
> *find_stats_descriptors(StatsTarget target, int stats_fd
>  }
>  
>  static void query_stats(StatsResultList **result, StatsTarget target,
> -int stats_fd, Error **errp)
> +strList *names, int stats_fd, Error **errp)
>  {
>  struct kvm_stats_desc *kvm_stats_desc;
>  struct kvm_stats_header *kvm_stats_header;
> @@ -3963,6 +3964,9 @@ static void query_stats(StatsResultList **result, 
> StatsTarget target,
>  
>  /* Add entry to the list */
>  stats = (void *)stats_data + pdesc->offset;
> +if (!apply_str_list_filter(pdesc->name, names)) {
> +continue;
> +}
>  stats_list = add_kvmstat_entry(pdesc, stats, stats_list, errp);
>  }
>  
> @@ -4024,8 +4028,8 @@ static void query_stats_vcpu(CPUState *cpu, 
> run_on_cpu_data data)
>  error_propagate(kvm_stats_args->errp, local_err);
>  return;
>  }
> -query_stats(kvm_stats_args->result.stats, STATS_TARGET_VCPU, stats_fd,
> -kvm_stats_args->errp);
> +query_stats(kvm_stats_args->result.stats, STATS_TARGET_VCPU,
> +kvm_stats_args->names, stats_fd, kvm_stats_args->errp);
>  close(stats_fd);
>  }
>  
> @@ -4046,7 +4050,7 @@ static void query_stats_schema_vcpu(CPUState *cpu, 
> run_on_cpu_data data)
>  }
>  
>  static void query_stats_cb(StatsResultList **result, StatsTarget target,
> -   strList *targets, Error **errp)
> +   strList *names, strList *targets, Error **errp)
>  {
>  KVMState *s = kvm_state;
>  CPUState *cpu;
> @@ -4060,7 +4064,7 @@ static void query_stats_cb(StatsResultList **result, 
> StatsTarget target,
>  error_setg_errno(errp, errno, "KVM errno, stats: ioctl failed");
>  return;
>  }
> -query_stats(result, target, stats_fd, errp);
> +query_stats(result, target, names, stats_fd, errp);
>  close(stats_fd);
>  break;
>  }
> @@ -4068,6 +4072,7 @@ static void query_stats_cb(StatsResultList **result, 
> StatsTarget target,
>  {
>  StatsArgs stats_args;
>  stats_args.result.stats = result;
> +stats_args.names = names;
>  stats_args.errp = errp;
>  CPU_FOREACH(cpu) {
>  if (!apply_str_list_filter(cpu->parent_obj.canonical_path, 
> targets)) {
> diff --git a/include/monitor/stats.h b/include/monitor/stats.h
> index 80a523dd29..fcf0983154 100644
> --- a/include/monitor/stats.h
> +++ b/include/monitor/sta

Re: [PATCH v5 10/10] hmp: add filtering of statistics by name

2022-06-08 Thread Dr. David Alan Gilbert
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> Allow the user to request only a specific subset of statistics.
> This can be useful when working on a feature or optimization that is
> known to affect that statistic.
> 
> Extracted from a patch by Mark Kanda.
> 
> Signed-off-by: Paolo Bonzini 

I think that's OK, if you repost please fix up the commit message with
examples of the command with and without names.


Reviewed-by: Dr. David Alan Gilbert 

Dave

> ---
>  hmp-commands-info.hx |  8 
>  monitor/hmp-cmds.c   | 35 ++-
>  2 files changed, 30 insertions(+), 13 deletions(-)
> 
> diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx
> index a67040443b..3ffa24bd67 100644
> --- a/hmp-commands-info.hx
> +++ b/hmp-commands-info.hx
> @@ -897,10 +897,10 @@ ERST
>  
>  {
>  .name   = "stats",
> -.args_type  = "target:s,provider:s?",
> -.params = "target [provider]",
> -.help   = "show statistics for the given target (vm or vcpu); 
> optionally filter by "
> -  "provider",
> +.args_type  = "target:s,names:s?,provider:s?",
> +.params = "target [names] [provider]",
> +.help   = "show statistics for the given target (vm or vcpu); 
> optionally filter by"
> +  "name (comma-separated list, or * for all) and 
> provider",
>  .cmd= hmp_info_stats,
>  },
>  
> diff --git a/monitor/hmp-cmds.c b/monitor/hmp-cmds.c
> index a71887e54c..8775f69ff1 100644
> --- a/monitor/hmp-cmds.c
> +++ b/monitor/hmp-cmds.c
> @@ -2359,10 +2359,12 @@ static void print_stats_results(Monitor *mon, 
> StatsTarget target,
>  }
>  
>  /* Create the StatsFilter that is needed for an "info stats" invocation.  */
> -static StatsFilter *stats_filter(StatsTarget target, int cpu_index,
> - StatsProvider provider)
> +static StatsFilter *stats_filter(StatsTarget target, const char *names,
> + int cpu_index, StatsProvider provider)
>  {
>  StatsFilter *filter = g_malloc0(sizeof(*filter));
> +StatsProvider provider_idx;
> +StatsRequestList *request_list = NULL;
>  
>  filter->target = target;
>  switch (target) {
> @@ -2383,15 +2385,29 @@ static StatsFilter *stats_filter(StatsTarget target, 
> int cpu_index,
>  break;
>  }
>  
> -if (provider == STATS_PROVIDER__MAX) {
> +if (!names && provider == STATS_PROVIDER__MAX) {
>  return filter;
>  }
>  
> -/* "info stats" can only query either one or all the providers.  */
> +/*
> + * "info stats" can only query either one or all the providers.  Querying
> + * by name, but not by provider, requires the creation of one filter per
> + * provider.
> + */
> +for (provider_idx = 0; provider_idx < STATS_PROVIDER__MAX; 
> provider_idx++) {
> +if (provider == STATS_PROVIDER__MAX || provider == provider_idx) {
> +StatsRequest *request = g_new0(StatsRequest, 1);
> +request->provider = provider_idx;
> +if (names && !g_str_equal(names, "*")) {
> +request->has_names = true;
> +request->names = strList_from_comma_list(names);
> +}
> +QAPI_LIST_PREPEND(request_list, request);
> +}
> +}
> +
>  filter->has_providers = true;
> -filter->providers = g_new0(StatsRequestList, 1);
> -filter->providers->value = g_new0(StatsRequest, 1);
> -filter->providers->value->provider = provider;
> +filter->providers = request_list;
>  return filter;
>  }
>  
> @@ -2399,6 +2415,7 @@ void hmp_info_stats(Monitor *mon, const QDict *qdict)
>  {
>  const char *target_str = qdict_get_str(qdict, "target");
>  const char *provider_str = qdict_get_try_str(qdict, "provider");
> +const char *names = qdict_get_try_str(qdict, "names");
>  
>  StatsProvider provider = STATS_PROVIDER__MAX;
>  StatsTarget target;
> @@ -2429,11 +2446,11 @@ void hmp_info_stats(Monitor *mon, const QDict *qdict)
>  
>  switch (target) {
>  case STATS_TARGET_VM:
> -filter = stats_filter(target, -1, provider);
> +filter = stats_filter(target, names, -1, provider);
>  break;
>  case STATS_TARGET_VCPU: {}
>  int cpu_index = monitor_get_cpu_index(mon);
> -filter = stats_filter(target, cpu_index, provider);
> +filter = stats_filter(target, names, cpu_index, provider);
>  break;
>  default:
>  abort();
> -- 
> 2.36.1
> 
-- 
Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK




[PATCH v2 00/35] pc/q35: refactor ISA and SMBUS AML generation

2022-06-08 Thread Igor Mammedov


Changelog:
  since v1:
* add tis 2.0  clarification to commit message (Ani Sinha)
* rebase on top of pci tree
* pick up acks

Series is excerpt form larger refactoring that does
the same for PCI devices, but it's too large at this
point, so I've split off a relatively self-contained
ISA/SMBUS patches into a smaller separate series, and
PCI refactoring will follow up on top of this series
using the same AcpiDevAmlIf interface.

Series consolidates and unifies how pc/q35 machine
generates AML for ISA and SMBUS devices. It adds
a new more generic interface 'AcpiDevAmlIf' that
replaces ISA specific ISADeviceClass::build_aml
hook and should allow to use the same approach
(i.e. ask a device to provide its own AML) but
not limited to ISA bus.
Series applies AcpiDevAmlIf interface to a few
ISA devices that were already using
ISADeviceClass::build_aml and to devices /tpm,
applesmc,pvpanic,ipmi/ that were generated in
custom way. The AML generation for the later
class is normalized to behave like any other
ISA device that were using ISADeviceClass::build_aml
and converted to interface 'AcpiDevAmlIf'.
It simplifies process of building DSDT and
eliminates custom probing/wiring for those devices
as AML for them is generated at the time ISA/SMBUS
is enumerated.

Changes to DSDT tables QEMU generates are mostly
contextual where devices scattered across DSDT
are consolidated under respective device that
hosts bus they are attached to.

PS:
 + series adds several ACPI tests for devices
   that were missing them.

Igor Mammedov (35):
  acpi: add interface to build device specific AML
  acpi: make isa_build_aml() support AcpiDevAmlIf interface
  acpi: fdc-isa: replace ISADeviceClass::build_aml with
AcpiDevAmlIfClass:build_dev_aml
  acpi: parallel port: replace ISADeviceClass::build_aml with
AcpiDevAmlIfClass:build_dev_aml
  acpi: serial-is: replace ISADeviceClass::build_aml with
AcpiDevAmlIfClass:build_dev_aml
  acpi: mc146818rtc: replace ISADeviceClass::build_aml with
AcpiDevAmlIfClass:build_dev_aml
  acpi: pckbd: replace ISADeviceClass::build_aml with
AcpiDevAmlIfClass:build_dev_aml
  isa-bus: drop no longer used ISADeviceClass::build_aml
  tests: acpi: add and whitelist DSDT.ipmismbus expected blob
  tests: acpi: q35: add test for smbus-ipmi device
  tests: acpi: update expected blob DSDT.ipmismbus
  tests: acpi: whitelist DSDT.ipmismbus expected blob
  ipmi: acpi: use relative path to resource source
  tests: acpi: update expected DSDT.ipmismbus blob
  acpi: ich9-smb: add support for AcpiDevAmlIf interface
  acpi: ipmi: use AcpiDevAmlIf interface to build IPMI device
descriptors
  q35: acpi: drop not needed PCMachineClass::do_not_add_smb_acpi
  tests: acpi: white-list to be re-factored pc/q35 DSDT
  acpi: pc: isa bridge: use AcpiDevAmlIf interface to build ISA device
descriptors
  acpi: q35: isa bridge: use AcpiDevAmlIf interface to build ISA device
descriptors
  tests: acpi: update expected blobs
  tests: acpi: add and white-list DSDT.applesmc expected blob
  tests: acpi: add applesmc testcase
  acpi: applesmc: use AcpiDevAmlIfClass:build_dev_aml to provide
device's AML
  tests: acpi: update expected blobs
  tests: acpi: white-lists expected DSDT.pvpanic-isa blob
  tests: acpi: add pvpanic-isa: testcase
  acpi: pvpanic-isa: use AcpiDevAmlIfClass:build_dev_aml to provide
device's AML
  tests: acpi: update expected DSDT.pvpanic-isa blob
  tests: acpi: white-list DSDT.tis.tpm2/DSDT.tis.tpm12 expected blobs
  acpi: pc/q35: tpm-tis: fix TPM device scope
  acpi: pc/q35: remove not needed 'if' condition on pci bus
  acpi: tpm-tis: use AcpiDevAmlIfClass:build_dev_aml to provide device's
AML
  tests: acpi: update expected DSDT.tis.tpm2/DSDT.tis.tpm12 blobs
  x86: acpi-build: do not include hw/isa/isa.h directly

 include/hw/acpi/acpi_aml_interface.h  |  40 ++
 include/hw/acpi/ipmi.h|   9 +-
 include/hw/i386/pc.h  |   1 -
 include/hw/isa/isa.h  |  15 ---
 include/hw/misc/pvpanic.h |   9 --
 hw/acpi/acpi_interface.c  |   8 ++
 hw/acpi/ipmi-stub.c   |   2 +-
 hw/acpi/ipmi.c|  53 +++-
 hw/acpi/meson.build   |   2 +-
 hw/block/fdc-isa.c|  16 ++-
 hw/char/parallel.c|  14 ++-
 hw/char/serial-isa.c  |  14 ++-
 hw/i2c/smbus_ich9.c   |  15 +++
 hw/i386/acpi-build.c  | 171 ++
 hw/i386/pc_piix.c |   1 -
 hw/i386/pc_q35.c  |   1 -
 hw/input/pckbd.c  |  14 ++-
 hw/ipmi/isa_ipmi_bt.c |   4 +
 hw/ipmi/isa_ipmi_kcs.c|   4 +
 hw/ipmi/smbus_ipmi.c  |   4 +
 hw/isa/isa-bus.c  |   9 +-
 hw/isa/lpc_ich9.c |  19 +++
 hw/isa/piix3.c|  17 +++
 hw/misc/applesmc.c|  

[PATCH v2 03/35] acpi: fdc-isa: replace ISADeviceClass::build_aml with AcpiDevAmlIfClass:build_dev_aml

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 hw/block/fdc-isa.c   | 16 ++--
 hw/i386/acpi-build.c |  1 -
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/hw/block/fdc-isa.c b/hw/block/fdc-isa.c
index fa20450747..fee1ca68a8 100644
--- a/hw/block/fdc-isa.c
+++ b/hw/block/fdc-isa.c
@@ -32,7 +32,7 @@
 #include "qapi/error.h"
 #include "qemu/error-report.h"
 #include "qemu/timer.h"
-#include "hw/acpi/aml-build.h"
+#include "hw/acpi/acpi_aml_interface.h"
 #include "hw/irq.h"
 #include "hw/isa/isa.h"
 #include "hw/qdev-properties.h"
@@ -214,9 +214,9 @@ int cmos_get_fd_drive_type(FloppyDriveType fd0)
 return val;
 }
 
-static void fdc_isa_build_aml(ISADevice *isadev, Aml *scope)
+static void build_fdc_aml(AcpiDevAmlIf *adev, Aml *scope)
 {
-FDCtrlISABus *isa = ISA_FDC(isadev);
+FDCtrlISABus *isa = ISA_FDC(adev);
 Aml *dev;
 Aml *crs;
 int i;
@@ -241,7 +241,7 @@ static void fdc_isa_build_aml(ISADevice *isadev, Aml *scope)
 aml_append(dev, aml_name_decl("_CRS", crs));
 
 for (i = 0; i < MIN(MAX_FD, ACPI_FDE_MAX_FD); i++) {
-FloppyDriveType type = isa_fdc_get_drive_type(isadev, i);
+FloppyDriveType type = isa_fdc_get_drive_type(ISA_DEVICE(adev), i);
 
 if (type < FLOPPY_DRIVE_TYPE_NONE) {
 fde_buf[i] = cpu_to_le32(1);  /* drive present */
@@ -283,14 +283,14 @@ static Property isa_fdc_properties[] = {
 static void isabus_fdc_class_init(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
-ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
+AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
 
 dc->desc = "virtual floppy controller";
 dc->realize = isabus_fdc_realize;
 dc->fw_name = "fdc";
 dc->reset = fdctrl_external_reset_isa;
 dc->vmsd = &vmstate_isa_fdc;
-isa->build_aml = fdc_isa_build_aml;
+adevc->build_dev_aml = build_fdc_aml;
 device_class_set_props(dc, isa_fdc_properties);
 set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
 }
@@ -313,6 +313,10 @@ static const TypeInfo isa_fdc_info = {
 .instance_size = sizeof(FDCtrlISABus),
 .class_init= isabus_fdc_class_init,
 .instance_init = isabus_fdc_instance_init,
+.interfaces = (InterfaceInfo[]) {
+{ TYPE_ACPI_DEV_AML_IF },
+{ },
+},
 };
 
 static void isa_fdc_register_types(void)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index c125939ed6..1449832aa9 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -40,7 +40,6 @@
 #include "hw/acpi/bios-linker-loader.h"
 #include "hw/isa/isa.h"
 #include "hw/input/i8042.h"
-#include "hw/block/fdc.h"
 #include "hw/acpi/memory_hotplug.h"
 #include "sysemu/tpm.h"
 #include "hw/acpi/tpm.h"
-- 
2.31.1




[PATCH v2 01/35] acpi: add interface to build device specific AML

2022-06-08 Thread Igor Mammedov
There is already ISADeviceClass::build_aml() callback which
builds device specific AML blob for some ISA devices.
To extend the same idea to other devices, add TYPE_ACPI_DEV_AML_IF
Interface that will provide a more generic callback which
will be used not only for ISA but other devices. It will
allow get rid of some data-mining and ad-hoc AML building,
by asking device(s) to generate its own AML blob like it's
done for ISA devices.

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 include/hw/acpi/acpi_aml_interface.h | 40 
 hw/acpi/acpi_interface.c |  8 ++
 hw/acpi/meson.build  |  2 +-
 3 files changed, 49 insertions(+), 1 deletion(-)
 create mode 100644 include/hw/acpi/acpi_aml_interface.h

diff --git a/include/hw/acpi/acpi_aml_interface.h 
b/include/hw/acpi/acpi_aml_interface.h
new file mode 100644
index 00..ab76f0e55d
--- /dev/null
+++ b/include/hw/acpi/acpi_aml_interface.h
@@ -0,0 +1,40 @@
+#ifndef ACPI_AML_INTERFACE_H
+#define ACPI_AML_INTERFACE_H
+
+#include "qom/object.h"
+#include "hw/acpi/aml-build.h"
+
+#define TYPE_ACPI_DEV_AML_IF "acpi-dev-aml-interface"
+typedef struct AcpiDevAmlIfClass AcpiDevAmlIfClass;
+DECLARE_CLASS_CHECKERS(AcpiDevAmlIfClass, ACPI_DEV_AML_IF, 
TYPE_ACPI_DEV_AML_IF)
+#define ACPI_DEV_AML_IF(obj) \
+ INTERFACE_CHECK(AcpiDevAmlIf, (obj), TYPE_ACPI_DEV_AML_IF)
+
+typedef struct AcpiDevAmlIf AcpiDevAmlIf;
+typedef void (*dev_aml_fn)(AcpiDevAmlIf *adev, Aml *scope);
+
+/**
+ * AcpiDevAmlIfClass:
+ *
+ * build_dev_aml: adds device specific AML blob to provided scope
+ *
+ * Interface is designed for providing generic callback that builds device
+ * specific AML blob.
+ */
+struct AcpiDevAmlIfClass {
+/*  */
+InterfaceClass parent_class;
+
+/*  */
+dev_aml_fn build_dev_aml;
+};
+
+static inline void call_dev_aml_func(DeviceState *dev, Aml *scope)
+{
+if (object_dynamic_cast(OBJECT(dev), TYPE_ACPI_DEV_AML_IF)) {
+AcpiDevAmlIfClass *klass = ACPI_DEV_AML_IF_GET_CLASS(dev);
+klass->build_dev_aml(ACPI_DEV_AML_IF(dev), scope);
+}
+}
+
+#endif
diff --git a/hw/acpi/acpi_interface.c b/hw/acpi/acpi_interface.c
index 6583917b8e..c668d361f6 100644
--- a/hw/acpi/acpi_interface.c
+++ b/hw/acpi/acpi_interface.c
@@ -1,5 +1,6 @@
 #include "qemu/osdep.h"
 #include "hw/acpi/acpi_dev_interface.h"
+#include "hw/acpi/acpi_aml_interface.h"
 #include "qemu/module.h"
 
 void acpi_send_event(DeviceState *dev, AcpiEventStatusBits event)
@@ -18,8 +19,15 @@ static void register_types(void)
 .parent= TYPE_INTERFACE,
 .class_size = sizeof(AcpiDeviceIfClass),
 };
+static const TypeInfo acpi_dev_aml_if_info = {
+.name  = TYPE_ACPI_DEV_AML_IF,
+.parent= TYPE_INTERFACE,
+.class_size = sizeof(AcpiDevAmlIfClass),
+};
+
 
 type_register_static(&acpi_dev_if_info);
+type_register_static(&acpi_dev_aml_if_info);
 }
 
 type_init(register_types)
diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build
index cea2f5f93a..f8c820ca94 100644
--- a/hw/acpi/meson.build
+++ b/hw/acpi/meson.build
@@ -29,7 +29,7 @@ acpi_ss.add(when: 'CONFIG_PC', if_false: 
files('acpi-x86-stub.c'))
 if have_tpm
   acpi_ss.add(files('tpm.c'))
 endif
-softmmu_ss.add(when: 'CONFIG_ACPI', if_false: files('acpi-stub.c', 
'aml-build-stub.c', 'ghes-stub.c'))
+softmmu_ss.add(when: 'CONFIG_ACPI', if_false: files('acpi-stub.c', 
'aml-build-stub.c', 'ghes-stub.c', 'acpi_interface.c'))
 softmmu_ss.add_all(when: 'CONFIG_ACPI', if_true: acpi_ss)
 softmmu_ss.add(when: 'CONFIG_ALL', if_true: files('acpi-stub.c', 
'aml-build-stub.c',
   'acpi-x86-stub.c', 
'ipmi-stub.c', 'ghes-stub.c',
-- 
2.31.1




[PATCH v2 04/35] acpi: parallel port: replace ISADeviceClass::build_aml with AcpiDevAmlIfClass:build_dev_aml

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 hw/char/parallel.c | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/char/parallel.c b/hw/char/parallel.c
index f735a6cd7f..1c9ca47820 100644
--- a/hw/char/parallel.c
+++ b/hw/char/parallel.c
@@ -28,7 +28,7 @@
 #include "qemu/module.h"
 #include "chardev/char-parallel.h"
 #include "chardev/char-fe.h"
-#include "hw/acpi/aml-build.h"
+#include "hw/acpi/acpi_aml_interface.h"
 #include "hw/irq.h"
 #include "hw/isa/isa.h"
 #include "hw/qdev-properties.h"
@@ -570,9 +570,9 @@ static void parallel_isa_realizefn(DeviceState *dev, Error 
**errp)
  s, "parallel");
 }
 
-static void parallel_isa_build_aml(ISADevice *isadev, Aml *scope)
+static void parallel_isa_build_aml(AcpiDevAmlIf *adev, Aml *scope)
 {
-ISAParallelState *isa = ISA_PARALLEL(isadev);
+ISAParallelState *isa = ISA_PARALLEL(adev);
 Aml *dev;
 Aml *crs;
 
@@ -645,11 +645,11 @@ static Property parallel_isa_properties[] = {
 static void parallel_isa_class_initfn(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
-ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
+AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
 
 dc->realize = parallel_isa_realizefn;
 dc->vmsd = &vmstate_parallel_isa;
-isa->build_aml = parallel_isa_build_aml;
+adevc->build_dev_aml = parallel_isa_build_aml;
 device_class_set_props(dc, parallel_isa_properties);
 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
 }
@@ -659,6 +659,10 @@ static const TypeInfo parallel_isa_info = {
 .parent= TYPE_ISA_DEVICE,
 .instance_size = sizeof(ISAParallelState),
 .class_init= parallel_isa_class_initfn,
+.interfaces = (InterfaceInfo[]) {
+{ TYPE_ACPI_DEV_AML_IF },
+{ },
+},
 };
 
 static void parallel_register_types(void)
-- 
2.31.1




[PATCH v2 11/35] tests: acpi: update expected blob DSDT.ipmismbus

2022-06-08 Thread Igor Mammedov
basic q35 DSDT with an extra device node:

  Device (MI1)
{
Name (_HID, EisaId ("IPI0001"))  // _HID: Hardware ID
Name (_STR, "ipmi_smbus")  // _STR: Description String
Name (_UID, One)  // _UID: Unique ID
Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
{
  I2cSerialBusV2 (0x, ControllerInitiated, 0x000186A0,
  AddressingMode7Bit, "\\_SB.PCI0.SMB0",
  0x00, ResourceProducer, , Exclusive,
  )
})
Name (_IFT, 0x04)  // _IFT: IPMI Interface Type
Name (_SRV, 0x0200)  // _SRV: IPMI Spec Revision
}

Signed-off-by: Igor Mammedov 
---
 tests/qtest/bios-tables-test-allowed-diff.h |   1 -
 tests/data/acpi/q35/DSDT.ipmismbus  | Bin 0 -> 8391 bytes
 2 files changed, 1 deletion(-)

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index b4687d1cc8..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,2 +1 @@
 /* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/q35/DSDT.ipmismbus",
diff --git a/tests/data/acpi/q35/DSDT.ipmismbus 
b/tests/data/acpi/q35/DSDT.ipmismbus
index 
e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..07ba873b79caadd73ed9721fcbeee84c57676e2a
 100644
GIT binary patch
literal 8391
zcmb7JOKcm*8J^`!tL0K!Qk3OaY{E{`M+%3s^JhY
z_y6rLX27<-bna|z1|Qz)Z7~AvZ3UJ^2Tp0O>leG7zH2qz
zTHfqdYo1-WZ<%J-6-QCCTku-U>~7RNmR+6cuK8~4_G`@bt}G85@xe}d!E!qFe_s0b
z?CD>Aapmp8y%I{g>CR>9?cOf?(LyqjM}zucCeK5L!+c!@Ea28TX>9F0bQ7KhAv
zmpOG)s4SV)W~nVz8qh|nI{VdTyUuLJ?thnLvCd70;)Rz=4KLShdEH$0xvt+Xuz*^6
z0X1#D*R!17(Ee=DV}o9DG&*3zxz7fh?6;dX`}hCi2kgL_7kx`xb05u8U+#a$VvM0T
zPhOzj(0F(HCu@G8%ZC`{&!Q{MT5COG^(@<2nSVMefrRSxpIIq-0E=rBMeoroS?0L4
zSTTC6#|)!lTw~YpdoF@%o&MwXwT(m8{DQ_Zt@t?_p-%teYO}p8bH~K>HZ-hbr7Ffd
z(RZSzd2XL)zUZ#i4>@t5F`832526pE%sl6C&J(S+d)S*~c>Q?lfCbDj&oKi-)JQ)Z
zqy47qw~gdI+cI%!C~z@$8##P=xz4^{x{O)yH`~I6OH$w#^QFr;QEb#(M)JO(QQ#IE
z8}(eX=DnQj7{yh0g=L>;x~0pJ&UuPPqhN;+!MnyTqa2+dQ1b!HK2-o`8j5lS^wkTo
zy{wmLdVYOwxEfB4`_KRVKmN1t)jwPMrheitZatt}ufNe7o*!Ii!xMvDD}ovD0l$xI
z+_ocjkd7KR>5JW68ZHj5TQfl>9$_iA8T4*#GIp?OHfwH~W$iA0jbMi&=hIgVx>+3e
z8$OYnt#&iBa$`S}jN$HNtBsWs6UPRQ%PeD4yA?rDkwFwem1R;f^aC?V;KGPl0M3bX
zoCl~3iHZCi8{te~!-$v?8eyCXC}$!hCVIoMQO=Y-h%#bIXjCu(5OxxgvJF^b{?UsGok5BaHfPNbe#xQoim!w8BOPmt`niE)6{gD
znod*KiBQ#vCy+AIvzpFXT_-|Sr={t%G@X{N6QQazsp(8=I+MCigsM(F3zh3>YdURR
zCqh+cO4FIrbf$Ej2vwbPn$9^*=bWw+p{jFU(>br{oY!?CRCPLqMyP%xF3@n$C=_6QQbeLDRXQ>0HotB2;x|HJw>aXI9sVP}RAp>0H!wF6ufF
zsydHpI*(~OkLfxQsygu|fxAyWhn6&*OS(>ks?Ot@&f}WSO(lj!`%?
zPy{F|f+zx66b34A+>#7NEZIK;MFsTGKoLr5Fi?S&2C6{GKn3*BKoO!h(m(|^jHsq+
zpaObmpa{_;j)j2=Y#4`0?L_Wpa`W-7^uKV$y`
zEN8+%6(|{~fN~}oC_Az;Y%GRDqI#3Mglifg+ST
zVW0xbnJ`cVN(L&RoJj_XQ0jz%3M^;BKouw%sDN@N87M-j69y``0?L_Wpa`W-7^uKf}LawZulLa7r5ibyd~M5=)zR1FlNVxS5W2C6X0Kouq#
zsKSJSDohxt!XyJ#m}H;|69%d)R`Lm~^^j|8iYS4Oz(QK_3;JE8W`f};ZGa1%i)=P9;rmqTpRn6=|Z5^ut!`b((
z{T(c_%pO?D>@&4>w>1kuE1#aTlAk2lEMEzFm))i|D~|74@cxc9&*%u9XkqDPbq4PU
z1-ay5W4VSFgG_YWPam@uKAB^)QMen!^PAyGjMa{g>1U()qM5=9b5an
zWuDff7!YoY$4gzmo>Jc9<-M`;-Vx=!uzYE}eC!d*
zmz44)UcNL|zH~(SQdqt`UOxT^<;zO>GA~~qD_=gMd^s#%884rBgz^=oe1(^7MBCJK6Z0~or^5@#L^{znHQmHK!xAvfGbs#jB@^jH+thRu^CqjO
z!>h_fI?*;Y-NZat)YIYpWg?wuo0@LozCNa>!%NLXI?*;Y-Nb#mq^HB1&O|!Vrl)fX
z=EDW;zBl97i`ZSsp9@-eZ>4sFH+H)>-q_l^akw5&yB$wj
z=Rbvg;}6?J2{!zQ4z6PL_X3&f1c_Sd#yWA6aY
zM+@{{+m_wA`9lf{Eax^$4a2Q9e8X+kUox=Fo~N&}!J@8P_pp?oA!O9`ORG7+y+S*O
z742H1W(JHJF}E&V<%5O}iB6^pZnKupFXyQnVtXo{O}p*#E0Li!*kK>J`FwsiTTNh(
zpfKAxfA#5@+(03rB!CwA$D2_sV7=kV!T1T15LokA+@CnJx^mFV*5f4W(Fz&ksgPl6
z{%rY}>$?r}2pOi^C|$`!MgiLnjB8(dnZY$9VAlep7qHDQSMA>ndd8h?H1&e*@seEd
zcq1;#aOuu?D=y3SSHs!CrZqyDuYzgkhmTK;99{Qd`xf6^`~1Y7QsRUJ|p_VzT^Y@fo+&*H}KrU=Ube9U?0XQ
z>{K!KU%r*g&(q8IXhbjH^ocNSlh?#%*&oCi_IvHjJ?#E|C(hh^@%B^L7!I?EHX1G3
zX~V#2ABt%!)Qw?q#9lbxXD(oH#G{egm1m;Z9!-k(1pZ9SC2|Ra@26glHLJ~*7-HJ2
zewYMsYPjROaBMa#|

[PATCH v2 02/35] acpi: make isa_build_aml() support AcpiDevAmlIf interface

2022-06-08 Thread Igor Mammedov
To allow incremental conversion from ISADeviceClass::build_aml
to AcpiDevAmlIf, add support for the later without removing
the former. Once conversion is complete, another commit will
drop ISADeviceClass::build_aml related code.

Signed-off-by: Igor Mammedov 
Reviewed-by: Ani Sinha 
Acked-by: Gerd Hoffmann 
---
 hw/isa/isa-bus.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c
index cd5ad3687d..237e2cee12 100644
--- a/hw/isa/isa-bus.c
+++ b/hw/isa/isa-bus.c
@@ -24,6 +24,7 @@
 #include "hw/sysbus.h"
 #include "sysemu/sysemu.h"
 #include "hw/isa/isa.h"
+#include "hw/acpi/acpi_aml_interface.h"
 
 static ISABus *isabus;
 
@@ -196,8 +197,12 @@ void isa_build_aml(ISABus *bus, Aml *scope)
 QTAILQ_FOREACH(kid, &bus->parent_obj.children, sibling) {
 dev = ISA_DEVICE(kid->child);
 dc = ISA_DEVICE_GET_CLASS(dev);
+bool has_build_dev_aml = !!object_dynamic_cast(OBJECT(dev),
+   TYPE_ACPI_DEV_AML_IF);
 if (dc->build_aml) {
 dc->build_aml(dev, scope);
+} else if (has_build_dev_aml) {
+call_dev_aml_func(DEVICE(dev), scope);
 }
 }
 }
-- 
2.31.1




[PATCH v2 20/35] acpi: q35: isa bridge: use AcpiDevAmlIf interface to build ISA device descriptors

2022-06-08 Thread Igor Mammedov
replaces adhoc build_isa_devices_aml() with generic AcpiDevAmlIf
way to build bridge AML including all devices that are attached
to its ISA bus.

Later when PCI is converted to AcpiDevAmlIf, build_q35_isa_bridge()
will also be dropped since PCI parts itself will take care of
building device prologue/epilogue AML for each enumerated PCI device.

Expected AML change is contextual, where ISA devices are moved from
separately declared _SB.PCI0.ISA scope, directly under Device(ISA)
node.

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 hw/i386/acpi-build.c | 30 +++---
 hw/isa/lpc_ich9.c| 19 +++
 2 files changed, 30 insertions(+), 19 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f903f30b7e..f7f1671407 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -864,20 +864,6 @@ static Aml *build_vmbus_device_aml(VMBusBridge 
*vmbus_bridge)
 return dev;
 }
 
-static void build_isa_devices_aml(Aml *table)
-{
-bool ambiguous;
-Object *obj = object_resolve_path_type("", TYPE_ISA_BUS, &ambiguous);
-Aml *scope;
-
-assert(obj && !ambiguous);
-
-scope = aml_scope("_SB.PCI0.ISA");
-isa_build_aml(ISA_BUS(obj), scope);
-
-aml_append(table, scope);
-}
-
 static void build_dbg_aml(Aml *table)
 {
 Aml *field;
@@ -1263,15 +1249,22 @@ static void build_q35_isa_bridge(Aml *table)
 {
 Aml *dev;
 Aml *scope;
+Object *obj;
+bool ambiguous;
+
+/*
+ * temporarily fish out isa bridge, build_q35_isa_bridge() will be dropped
+ * once PCI is converted to AcpiDevAmlIf and would be ble to generate
+ * AML for bridge itself
+ */
+obj = object_resolve_path_type("", TYPE_ICH9_LPC_DEVICE, &ambiguous);
+assert(obj && !ambiguous);
 
 scope =  aml_scope("_SB.PCI0");
 dev = aml_device("ISA");
 aml_append(dev, aml_name_decl("_ADR", aml_int(0x001F)));
 
-/* ICH9 PCI to ISA irq remapping */
-aml_append(dev, aml_operation_region("PIRQ", AML_PCI_CONFIG,
- aml_int(0x60), 0x0C));
-
+call_dev_aml_func(DEVICE(obj), dev);
 aml_append(scope, dev);
 aml_append(table, scope);
 }
@@ -1531,7 +1524,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 build_hpet_aml(dsdt);
 }
 build_q35_isa_bridge(dsdt);
-build_isa_devices_aml(dsdt);
 if (pm->pcihp_bridge_en) {
 build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
 }
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 5f143dca17..4553b5925b 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -50,6 +50,7 @@
 #include "hw/core/cpu.h"
 #include "hw/nvram/fw_cfg.h"
 #include "qemu/cutils.h"
+#include "hw/acpi/acpi_aml_interface.h"
 
 /*/
 /* ICH9 LPC PCI to ISA bridge */
@@ -803,12 +804,28 @@ static void ich9_send_gpe(AcpiDeviceIf *adev, 
AcpiEventStatusBits ev)
 acpi_send_gpe_event(&s->pm.acpi_regs, s->pm.irq, ev);
 }
 
+static void build_ich9_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
+{
+BusChild *kid;
+ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
+BusState *bus = BUS(s->isa_bus);
+
+/* ICH9 PCI to ISA irq remapping */
+aml_append(scope, aml_operation_region("PIRQ", AML_PCI_CONFIG,
+   aml_int(0x60), 0x0C));
+
+QTAILQ_FOREACH(kid, &bus->children, sibling) {
+call_dev_aml_func(DEVICE(kid->child), scope);
+}
+}
+
 static void ich9_lpc_class_init(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_CLASS(klass);
+AcpiDevAmlIfClass *amldevc = ACPI_DEV_AML_IF_CLASS(klass);
 
 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
 dc->reset = ich9_lpc_reset;
@@ -833,6 +850,7 @@ static void ich9_lpc_class_init(ObjectClass *klass, void 
*data)
 adevc->ospm_status = ich9_pm_ospm_status;
 adevc->send_event = ich9_send_gpe;
 adevc->madt_cpu = pc_madt_cpu_entry;
+amldevc->build_dev_aml = build_ich9_isa_aml;
 }
 
 static const TypeInfo ich9_lpc_info = {
@@ -845,6 +863,7 @@ static const TypeInfo ich9_lpc_info = {
 { TYPE_HOTPLUG_HANDLER },
 { TYPE_ACPI_DEVICE_IF },
 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+{ TYPE_ACPI_DEV_AML_IF },
 { }
 }
 };
-- 
2.31.1




[PATCH v2 08/35] isa-bus: drop no longer used ISADeviceClass::build_aml

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 include/hw/isa/isa.h |  1 -
 hw/isa/isa-bus.c | 12 +---
 2 files changed, 1 insertion(+), 12 deletions(-)

diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h
index 034d706ba1..5c5a3d43a7 100644
--- a/include/hw/isa/isa.h
+++ b/include/hw/isa/isa.h
@@ -64,7 +64,6 @@ struct IsaDmaClass {
 
 struct ISADeviceClass {
 DeviceClass parent_class;
-void (*build_aml)(ISADevice *dev, Aml *scope);
 };
 
 struct ISABus {
diff --git a/hw/isa/isa-bus.c b/hw/isa/isa-bus.c
index 237e2cee12..1bee1a47f1 100644
--- a/hw/isa/isa-bus.c
+++ b/hw/isa/isa-bus.c
@@ -191,19 +191,9 @@ ISADevice *isa_vga_init(ISABus *bus)
 void isa_build_aml(ISABus *bus, Aml *scope)
 {
 BusChild *kid;
-ISADevice *dev;
-ISADeviceClass *dc;
 
 QTAILQ_FOREACH(kid, &bus->parent_obj.children, sibling) {
-dev = ISA_DEVICE(kid->child);
-dc = ISA_DEVICE_GET_CLASS(dev);
-bool has_build_dev_aml = !!object_dynamic_cast(OBJECT(dev),
-   TYPE_ACPI_DEV_AML_IF);
-if (dc->build_aml) {
-dc->build_aml(dev, scope);
-} else if (has_build_dev_aml) {
-call_dev_aml_func(DEVICE(dev), scope);
-}
+call_dev_aml_func(DEVICE(kid->child), scope);
 }
 }
 
-- 
2.31.1




[PATCH v2 22/35] tests: acpi: add and white-list DSDT.applesmc expected blob

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
---
 tests/qtest/bios-tables-test-allowed-diff.h | 1 +
 tests/data/acpi/q35/DSDT.applesmc   | 0
 2 files changed, 1 insertion(+)
 create mode 100644 tests/data/acpi/q35/DSDT.applesmc

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..e893029d87 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,2 @@
 /* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/q35/DSDT.applesmc",
diff --git a/tests/data/acpi/q35/DSDT.applesmc 
b/tests/data/acpi/q35/DSDT.applesmc
new file mode 100644
index 00..e69de29bb2
-- 
2.31.1




[PATCH v2 12/35] tests: acpi: whitelist DSDT.ipmismbus expected blob

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
---
 tests/qtest/bios-tables-test-allowed-diff.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..b4687d1cc8 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,2 @@
 /* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/q35/DSDT.ipmismbus",
-- 
2.31.1




[PATCH v2 13/35] ipmi: acpi: use relative path to resource source

2022-06-08 Thread Igor Mammedov
smbus-ipmi AML description needs to specify a path to its parent
node in _CRS. The rest of IPMI inplementations (ISA based)
do not need path at all. Instead of passing through a full path
use relative path to point to smbus-ipmi's parent node, it will
let follow up patches to create IPMI device AML in a generic
way instead of current ad-hoc way. (i.e. AML will be generated
the same way it's done for other ISA device, and smbus will be
converted to generate AML for its slave devices the same way
as ISA)

expected AML change:
 Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
 {
I2cSerialBusV2 (0x, ControllerInitiated, 0x000186A0,
-   AddressingMode7Bit, "\\_SB.PCI0.SMB0",
+   AddressingMode7Bit, "^",
0x00, ResourceProducer, , Exclusive,
)
  })

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 include/hw/acpi/ipmi.h |  2 +-
 hw/acpi/ipmi-stub.c|  2 +-
 hw/acpi/ipmi.c | 12 ++--
 hw/i386/acpi-build.c   |  4 ++--
 4 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/include/hw/acpi/ipmi.h b/include/hw/acpi/ipmi.h
index c14ad682ac..c38483565c 100644
--- a/include/hw/acpi/ipmi.h
+++ b/include/hw/acpi/ipmi.h
@@ -16,6 +16,6 @@
  * bus matches the given bus.  The resource is the ACPI resource that
  * contains the IPMI device, this is required for the I2C CRS.
  */
-void build_acpi_ipmi_devices(Aml *table, BusState *bus, const char *resource);
+void build_acpi_ipmi_devices(Aml *table, BusState *bus);
 
 #endif /* HW_ACPI_IPMI_H */
diff --git a/hw/acpi/ipmi-stub.c b/hw/acpi/ipmi-stub.c
index 8634fb325c..f525f71c2d 100644
--- a/hw/acpi/ipmi-stub.c
+++ b/hw/acpi/ipmi-stub.c
@@ -10,6 +10,6 @@
 #include "qemu/osdep.h"
 #include "hw/acpi/ipmi.h"
 
-void build_acpi_ipmi_devices(Aml *table, BusState *bus, const char *resource)
+void build_acpi_ipmi_devices(Aml *table, BusState *bus)
 {
 }
diff --git a/hw/acpi/ipmi.c b/hw/acpi/ipmi.c
index 96e48eba15..c30b44fcf5 100644
--- a/hw/acpi/ipmi.c
+++ b/hw/acpi/ipmi.c
@@ -13,7 +13,7 @@
 #include "hw/acpi/acpi.h"
 #include "hw/acpi/ipmi.h"
 
-static Aml *aml_ipmi_crs(IPMIFwInfo *info, const char *resource)
+static Aml *aml_ipmi_crs(IPMIFwInfo *info)
 {
 Aml *crs = aml_resource_template();
 
@@ -49,7 +49,7 @@ static Aml *aml_ipmi_crs(IPMIFwInfo *info, const char 
*resource)
 break;
 case IPMI_MEMSPACE_SMBUS:
 aml_append(crs, aml_i2c_serial_bus_device(info->base_address,
-  resource));
+  "^"));
 break;
 default:
 abort();
@@ -62,7 +62,7 @@ static Aml *aml_ipmi_crs(IPMIFwInfo *info, const char 
*resource)
 return crs;
 }
 
-static Aml *aml_ipmi_device(IPMIFwInfo *info, const char *resource)
+static Aml *aml_ipmi_device(IPMIFwInfo *info)
 {
 Aml *dev;
 uint16_t version = ((info->ipmi_spec_major_revision << 8)
@@ -75,14 +75,14 @@ static Aml *aml_ipmi_device(IPMIFwInfo *info, const char 
*resource)
 aml_append(dev, aml_name_decl("_STR", aml_string("ipmi_%s",
  info->interface_name)));
 aml_append(dev, aml_name_decl("_UID", aml_int(info->uuid)));
-aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info, resource)));
+aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info)));
 aml_append(dev, aml_name_decl("_IFT", aml_int(info->interface_type)));
 aml_append(dev, aml_name_decl("_SRV", aml_int(version)));
 
 return dev;
 }
 
-void build_acpi_ipmi_devices(Aml *scope, BusState *bus, const char *resource)
+void build_acpi_ipmi_devices(Aml *scope, BusState *bus)
 {
 
 BusChild *kid;
@@ -102,6 +102,6 @@ void build_acpi_ipmi_devices(Aml *scope, BusState *bus, 
const char *resource)
 iic = IPMI_INTERFACE_GET_CLASS(obj);
 memset(&info, 0, sizeof(info));
 iic->get_fwinfo(ii, &info);
-aml_append(scope, aml_ipmi_device(&info, resource));
+aml_append(scope, aml_ipmi_device(&info));
 }
 }
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 1449832aa9..88506d563f 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -873,7 +873,7 @@ static void build_isa_devices_aml(Aml *table)
 assert(obj && !ambiguous);
 
 scope = aml_scope("_SB.PCI0.ISA");
-build_acpi_ipmi_devices(scope, BUS(obj), "\\_SB.PCI0.ISA");
+build_acpi_ipmi_devices(scope, BUS(obj));
 isa_build_aml(ISA_BUS(obj), scope);
 
 aml_append(table, scope);
@@ -1406,7 +1406,7 @@ static void build_smb0(Aml *table, I2CBus *smbus, int 
devnr, int func)
 Aml *dev = aml_device("SMB0");
 
 aml_append(dev, aml_name_decl("_ADR", aml_int(devnr << 16 | func)));
-build_acpi_ipmi_devices(dev, BUS(smbus), "\\_SB.PCI0.SMB0");
+build_acpi_ipmi_devices(dev, BUS(smbus));
 aml_append(scope, dev);
 aml_append(table, scope);
 }
-- 
2.31.1




[PATCH v2 07/35] acpi: pckbd: replace ISADeviceClass::build_aml with AcpiDevAmlIfClass:build_dev_aml

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 hw/input/pckbd.c | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c
index 4efdf75620..45c40fe3f3 100644
--- a/hw/input/pckbd.c
+++ b/hw/input/pckbd.c
@@ -29,7 +29,7 @@
 #include "qapi/error.h"
 #include "hw/isa/isa.h"
 #include "migration/vmstate.h"
-#include "hw/acpi/aml-build.h"
+#include "hw/acpi/acpi_aml_interface.h"
 #include "hw/input/ps2.h"
 #include "hw/irq.h"
 #include "hw/input/i8042.h"
@@ -767,9 +767,9 @@ static void i8042_realizefn(DeviceState *dev, Error **errp)
 qemu_register_reset(kbd_reset, s);
 }
 
-static void i8042_build_aml(ISADevice *isadev, Aml *scope)
+static void i8042_build_aml(AcpiDevAmlIf *adev, Aml *scope)
 {
-ISAKBDState *isa_s = I8042(isadev);
+ISAKBDState *isa_s = I8042(adev);
 Aml *kbd;
 Aml *mou;
 Aml *crs;
@@ -807,12 +807,12 @@ static Property i8042_properties[] = {
 static void i8042_class_initfn(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
-ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
+AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
 
 device_class_set_props(dc, i8042_properties);
 dc->realize = i8042_realizefn;
 dc->vmsd = &vmstate_kbd_isa;
-isa->build_aml = i8042_build_aml;
+adevc->build_dev_aml = i8042_build_aml;
 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
 }
 
@@ -822,6 +822,10 @@ static const TypeInfo i8042_info = {
 .instance_size = sizeof(ISAKBDState),
 .instance_init = i8042_initfn,
 .class_init= i8042_class_initfn,
+.interfaces = (InterfaceInfo[]) {
+{ TYPE_ACPI_DEV_AML_IF },
+{ },
+},
 };
 
 static void i8042_register_types(void)
-- 
2.31.1




[PATCH v2 05/35] acpi: serial-is: replace ISADeviceClass::build_aml with AcpiDevAmlIfClass:build_dev_aml

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 hw/char/serial-isa.c | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c
index 7a7ed239cd..141a6cb168 100644
--- a/hw/char/serial-isa.c
+++ b/hw/char/serial-isa.c
@@ -27,7 +27,7 @@
 #include "qapi/error.h"
 #include "qemu/module.h"
 #include "sysemu/sysemu.h"
-#include "hw/acpi/aml-build.h"
+#include "hw/acpi/acpi_aml_interface.h"
 #include "hw/char/serial.h"
 #include "hw/isa/isa.h"
 #include "hw/qdev-properties.h"
@@ -83,9 +83,9 @@ static void serial_isa_realizefn(DeviceState *dev, Error 
**errp)
 isa_register_ioport(isadev, &s->io, isa->iobase);
 }
 
-static void serial_isa_build_aml(ISADevice *isadev, Aml *scope)
+static void serial_isa_build_aml(AcpiDevAmlIf *adev, Aml *scope)
 {
-ISASerialState *isa = ISA_SERIAL(isadev);
+ISASerialState *isa = ISA_SERIAL(adev);
 Aml *dev;
 Aml *crs;
 
@@ -122,11 +122,11 @@ static Property serial_isa_properties[] = {
 static void serial_isa_class_initfn(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
-ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
+AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
 
 dc->realize = serial_isa_realizefn;
 dc->vmsd = &vmstate_isa_serial;
-isa->build_aml = serial_isa_build_aml;
+adevc->build_dev_aml = serial_isa_build_aml;
 device_class_set_props(dc, serial_isa_properties);
 set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
 }
@@ -146,6 +146,10 @@ static const TypeInfo serial_isa_info = {
 .instance_size = sizeof(ISASerialState),
 .instance_init = serial_isa_initfn,
 .class_init= serial_isa_class_initfn,
+.interfaces = (InterfaceInfo[]) {
+{ TYPE_ACPI_DEV_AML_IF },
+{ },
+},
 };
 
 static void serial_register_types(void)
-- 
2.31.1




[PATCH v2 09/35] tests: acpi: add and whitelist DSDT.ipmismbus expected blob

2022-06-08 Thread Igor Mammedov
.. which will be used by follow up smbus-ipmi test-case

Signed-off-by: Igor Mammedov 
---
 tests/qtest/bios-tables-test-allowed-diff.h | 1 +
 tests/data/acpi/q35/DSDT.ipmismbus  | 0
 2 files changed, 1 insertion(+)
 create mode 100644 tests/data/acpi/q35/DSDT.ipmismbus

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..b4687d1cc8 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,2 @@
 /* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/q35/DSDT.ipmismbus",
diff --git a/tests/data/acpi/q35/DSDT.ipmismbus 
b/tests/data/acpi/q35/DSDT.ipmismbus
new file mode 100644
index 00..e69de29bb2
-- 
2.31.1




[PATCH v2 14/35] tests: acpi: update expected DSDT.ipmismbus blob

2022-06-08 Thread Igor Mammedov
expected AML change:
 Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
 {
I2cSerialBusV2 (0x, ControllerInitiated, 0x000186A0,
-   AddressingMode7Bit, "\\_SB.PCI0.SMB0",
+   AddressingMode7Bit, "^",
0x00, ResourceProducer, , Exclusive,
)
  })

Signed-off-by: Igor Mammedov 
---
 tests/qtest/bios-tables-test-allowed-diff.h |   1 -
 tests/data/acpi/q35/DSDT.ipmismbus  | Bin 8391 -> 8378 bytes
 2 files changed, 1 deletion(-)

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index b4687d1cc8..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,2 +1 @@
 /* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/q35/DSDT.ipmismbus",
diff --git a/tests/data/acpi/q35/DSDT.ipmismbus 
b/tests/data/acpi/q35/DSDT.ipmismbus
index 
07ba873b79caadd73ed9721fcbeee84c57676e2a..415fe08a407690c0e118743d872de79d22f01a4c
 100644
GIT binary patch
delta 85
zcmX@^xXY2tCD80n^Yqk0Lq6G-v9sr

delta 98
zcmdnxc-)c8CD$MJ|5
sqMMx9CjXGsR#xLu?vrC+1VW%jHiiXlAVv&OqaH}39!S?_OQ}XS01jdo-v9sr

-- 
2.31.1




[PATCH v2 23/35] tests: acpi: add applesmc testcase

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 tests/qtest/bios-tables-test.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index d896840270..7d238218ca 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1625,6 +1625,17 @@ static void test_acpi_q35_slic(void)
 free_test_data(&data);
 }
 
+static void test_acpi_q35_applesmc(void)
+{
+test_data data = {
+.machine = MACHINE_Q35,
+.variant = ".applesmc",
+};
+
+test_acpi_one("-device isa-applesmc", &data);
+free_test_data(&data);
+}
+
 static void test_oem_fields(test_data *data)
 {
 int i;
@@ -1783,6 +1794,7 @@ int main(int argc, char *argv[])
 qtest_add_func("acpi/q35/acpihmat", test_acpi_q35_tcg_acpi_hmat);
 qtest_add_func("acpi/piix4/acpierst", test_acpi_piix4_acpi_erst);
 qtest_add_func("acpi/q35/acpierst", test_acpi_q35_acpi_erst);
+qtest_add_func("acpi/q35/applesmc", test_acpi_q35_applesmc);
 qtest_add_func("acpi/microvm", test_acpi_microvm_tcg);
 qtest_add_func("acpi/microvm/usb", test_acpi_microvm_usb_tcg);
 qtest_add_func("acpi/microvm/rtc", test_acpi_microvm_rtc_tcg);
-- 
2.31.1




[PATCH v2 17/35] q35: acpi: drop not needed PCMachineClass::do_not_add_smb_acpi

2022-06-08 Thread Igor Mammedov
by default we do not version ACPI AML as it's considered
a part of firmware. Drop do_not_add_smb_acpi that blocked
SMBUS AML description on 3.1 and older machine types without
providing justification.

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
we can keep this bit if anyone can prove/report adverse effect
on VM.
---
 include/hw/i386/pc.h | 1 -
 hw/i386/acpi-build.c | 2 +-
 hw/i386/pc_piix.c| 1 -
 hw/i386/pc_q35.c | 1 -
 4 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index ffcac5121e..dee38cfac4 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -104,7 +104,6 @@ struct PCMachineClass {
 bool rsdp_in_ram;
 int legacy_acpi_table_size;
 unsigned acpi_data_size;
-bool do_not_add_smb_acpi;
 int pci_root_uid;
 
 /* SMBIOS compat: */
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 5b963cca32..d943354999 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1530,7 +1530,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
 }
 build_q35_pci0_int(dsdt);
-if (pcms->smbus && !pcmc->do_not_add_smb_acpi) {
+if (pcms->smbus) {
 build_smb0(dsdt, ICH9_SMB_DEV, ICH9_SMB_FUNC);
 }
 }
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 578e537b35..7f777f7aed 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -564,7 +564,6 @@ static void pc_i440fx_3_1_machine_options(MachineClass *m)
 
 pc_i440fx_4_0_machine_options(m);
 m->is_default = false;
-pcmc->do_not_add_smb_acpi = true;
 m->smbus_no_migration_support = true;
 m->alias = NULL;
 pcmc->pvh_enabled = false;
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 42eb8b9707..f96cbd04e2 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -514,7 +514,6 @@ static void pc_q35_3_1_machine_options(MachineClass *m)
 
 pc_q35_4_0_machine_options(m);
 m->default_kernel_irqchip_split = false;
-pcmc->do_not_add_smb_acpi = true;
 m->smbus_no_migration_support = true;
 m->alias = NULL;
 pcmc->pvh_enabled = false;
-- 
2.31.1




[PATCH v2 10/35] tests: acpi: q35: add test for smbus-ipmi device

2022-06-08 Thread Igor Mammedov
expected new device node:

Device (MI1)
{
Name (_HID, EisaId ("IPI0001"))  // _HID: Hardware ID
Name (_STR, "ipmi_smbus")  // _STR: Description String
Name (_UID, One)  // _UID: Unique ID
Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
{
I2cSerialBusV2 (0x, ControllerInitiated, 0x000186A0,
AddressingMode7Bit, "\\_SB.PCI0.SMB0",
0x00, ResourceProducer, , Exclusive,
)
})
Name (_IFT, 0x04)  // _IFT: IPMI Interface Type
Name (_SRV, 0x0200)  // _SRV: IPMI Spec Revision
}

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 tests/qtest/bios-tables-test.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index a4a46e97f0..d896840270 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -955,6 +955,21 @@ static void test_acpi_q35_tcg_ipmi(void)
 free_test_data(&data);
 }
 
+static void test_acpi_q35_tcg_smbus_ipmi(void)
+{
+test_data data;
+
+memset(&data, 0, sizeof(data));
+data.machine = MACHINE_Q35;
+data.variant = ".ipmismbus";
+data.required_struct_types = ipmi_required_struct_types;
+data.required_struct_types_len = ARRAY_SIZE(ipmi_required_struct_types);
+test_acpi_one("-device ipmi-bmc-sim,id=bmc0"
+  " -device smbus-ipmi,bmc=bmc0",
+  &data);
+free_test_data(&data);
+}
+
 static void test_acpi_piix4_tcg_ipmi(void)
 {
 test_data data;
@@ -1743,6 +1758,7 @@ int main(int argc, char *argv[])
 qtest_add_func("acpi/q35/mmio64", test_acpi_q35_tcg_mmio64);
 qtest_add_func("acpi/piix4/ipmi", test_acpi_piix4_tcg_ipmi);
 qtest_add_func("acpi/q35/ipmi", test_acpi_q35_tcg_ipmi);
+qtest_add_func("acpi/q35/smbus/ipmi", test_acpi_q35_tcg_smbus_ipmi);
 qtest_add_func("acpi/piix4/cpuhp", test_acpi_piix4_tcg_cphp);
 qtest_add_func("acpi/q35/cpuhp", test_acpi_q35_tcg_cphp);
 qtest_add_func("acpi/piix4/memhp", test_acpi_piix4_tcg_memhp);
-- 
2.31.1




[PATCH v2 26/35] tests: acpi: white-lists expected DSDT.pvpanic-isa blob

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
---
 tests/qtest/bios-tables-test-allowed-diff.h | 1 +
 tests/data/acpi/q35/DSDT.pvpanic-isa| 0
 2 files changed, 1 insertion(+)
 create mode 100644 tests/data/acpi/q35/DSDT.pvpanic-isa

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..d5cd7aa4f5 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,2 @@
 /* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/q35/DSDT.pvpanic-isa",
diff --git a/tests/data/acpi/q35/DSDT.pvpanic-isa 
b/tests/data/acpi/q35/DSDT.pvpanic-isa
new file mode 100644
index 00..e69de29bb2
-- 
2.31.1




[PATCH v2 24/35] acpi: applesmc: use AcpiDevAmlIfClass:build_dev_aml to provide device's AML

2022-06-08 Thread Igor Mammedov
  .. and clean up not longer needed conditionals in DSTD build
code. applesmc AML will be fetched and included when ISA bridge
will build its own AML code (incl. attached devices).

Expected AML change:
the device under separate _SB.PCI0.ISA scope is moved directly
under Device(ISA) node.

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 include/hw/isa/isa.h | 14 --
 hw/i386/acpi-build.c | 22 --
 hw/misc/applesmc.c   | 29 +
 3 files changed, 29 insertions(+), 36 deletions(-)

diff --git a/include/hw/isa/isa.h b/include/hw/isa/isa.h
index 5c5a3d43a7..6f9380007d 100644
--- a/include/hw/isa/isa.h
+++ b/include/hw/isa/isa.h
@@ -16,20 +16,6 @@ OBJECT_DECLARE_TYPE(ISADevice, ISADeviceClass, ISA_DEVICE)
 #define TYPE_ISA_BUS "ISA"
 OBJECT_DECLARE_SIMPLE_TYPE(ISABus, ISA_BUS)
 
-#define TYPE_APPLE_SMC "isa-applesmc"
-#define APPLESMC_MAX_DATA_LENGTH   32
-#define APPLESMC_PROP_IO_BASE "iobase"
-
-static inline uint16_t applesmc_port(void)
-{
-Object *obj = object_resolve_path_type("", TYPE_APPLE_SMC, NULL);
-
-if (obj) {
-return object_property_get_uint(obj, APPLESMC_PROP_IO_BASE, NULL);
-}
-return 0;
-}
-
 #define TYPE_ISADMA "isa-dma"
 
 typedef struct IsaDmaClass IsaDmaClass;
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f7f1671407..b96705c688 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -121,7 +121,6 @@ typedef struct AcpiMiscInfo {
 const unsigned char *dsdt_code;
 unsigned dsdt_size;
 uint16_t pvpanic_port;
-uint16_t applesmc_io_base;
 } AcpiMiscInfo;
 
 typedef struct AcpiBuildPciBusHotplugState {
@@ -307,7 +306,6 @@ static void acpi_get_misc_info(AcpiMiscInfo *info)
 info->tpm_version = tpm_get_version(tpm_find());
 #endif
 info->pvpanic_port = pvpanic_port();
-info->applesmc_io_base = applesmc_port();
 }
 
 /*
@@ -1800,26 +1798,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 aml_append(dsdt, scope);
 }
 
-if (misc->applesmc_io_base) {
-scope = aml_scope("\\_SB.PCI0.ISA");
-dev = aml_device("SMC");
-
-aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0001")));
-/* device present, functioning, decoding, not shown in UI */
-aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
-
-crs = aml_resource_template();
-aml_append(crs,
-aml_io(AML_DECODE16, misc->applesmc_io_base, 
misc->applesmc_io_base,
-   0x01, APPLESMC_MAX_DATA_LENGTH)
-);
-aml_append(crs, aml_irq_no_flags(6));
-aml_append(dev, aml_name_decl("_CRS", crs));
-
-aml_append(scope, dev);
-aml_append(dsdt, scope);
-}
-
 if (misc->pvpanic_port) {
 scope = aml_scope("\\_SB.PCI0.ISA");
 
diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c
index 81cd6b6423..5f9c742e50 100644
--- a/hw/misc/applesmc.c
+++ b/hw/misc/applesmc.c
@@ -37,10 +37,14 @@
 #include "qemu/module.h"
 #include "qemu/timer.h"
 #include "qom/object.h"
+#include "hw/acpi/acpi_aml_interface.h"
 
 /* #define DEBUG_SMC */
 
 #define APPLESMC_DEFAULT_IOBASE0x300
+#define TYPE_APPLE_SMC "isa-applesmc"
+#define APPLESMC_MAX_DATA_LENGTH   32
+#define APPLESMC_PROP_IO_BASE "iobase"
 
 enum {
 APPLESMC_DATA_PORT   = 0x00,
@@ -347,14 +351,35 @@ static Property applesmc_isa_properties[] = {
 DEFINE_PROP_END_OF_LIST(),
 };
 
+static void build_applesmc_aml(AcpiDevAmlIf *adev, Aml *scope)
+{
+Aml *crs;
+AppleSMCState *s = APPLE_SMC(adev);
+uint32_t iobase = s->iobase;
+Aml *dev = aml_device("SMC");
+
+aml_append(dev, aml_name_decl("_HID", aml_eisaid("APP0001")));
+/* device present, functioning, decoding, not shown in UI */
+aml_append(dev, aml_name_decl("_STA", aml_int(0xB)));
+crs = aml_resource_template();
+aml_append(crs,
+aml_io(AML_DECODE16, iobase, iobase, 0x01, APPLESMC_MAX_DATA_LENGTH)
+);
+aml_append(crs, aml_irq_no_flags(6));
+aml_append(dev, aml_name_decl("_CRS", crs));
+aml_append(scope, dev);
+}
+
 static void qdev_applesmc_class_init(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
+AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
 
 dc->realize = applesmc_isa_realize;
 dc->reset = qdev_applesmc_isa_reset;
 device_class_set_props(dc, applesmc_isa_properties);
 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+adevc->build_dev_aml = build_applesmc_aml;
 }
 
 static const TypeInfo applesmc_isa_info = {
@@ -362,6 +387,10 @@ static const TypeInfo applesmc_isa_info = {
 .parent= TYPE_ISA_DEVICE,
 .instance_size = sizeof(AppleSMCState),
 .class_init= qdev_applesmc_class_init,
+.interfaces = (InterfaceInfo[]) {
+{ TYPE_ACPI_DEV_AML_IF },
+{ },
+},
 };
 
 static void applesmc_register_types(void)
-- 
2.31.1




[PATCH v2 18/35] tests: acpi: white-list to be re-factored pc/q35 DSDT

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
---
 tests/qtest/bios-tables-test-allowed-diff.h | 31 +
 1 file changed, 31 insertions(+)

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..d95f4b25c4 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,32 @@
 /* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/pc/DSDT",
+"tests/data/acpi/pc/DSDT.acpierst",
+"tests/data/acpi/pc/DSDT.acpihmat",
+"tests/data/acpi/pc/DSDT.bridge",
+"tests/data/acpi/pc/DSDT.cphp",
+"tests/data/acpi/pc/DSDT.dimmpxm",
+"tests/data/acpi/pc/DSDT.hpbridge",
+"tests/data/acpi/pc/DSDT.ipmikcs",
+"tests/data/acpi/pc/DSDT.memhp",
+"tests/data/acpi/pc/DSDT.nohpet",
+"tests/data/acpi/pc/DSDT.numamem",
+"tests/data/acpi/pc/DSDT.roothp",
+"tests/data/acpi/pc/DSDT.hpbrroot",
+"tests/data/acpi/q35/DSDT",
+"tests/data/acpi/q35/DSDT.acpierst",
+"tests/data/acpi/q35/DSDT.acpihmat",
+"tests/data/acpi/q35/DSDT.bridge",
+"tests/data/acpi/q35/DSDT.cphp",
+"tests/data/acpi/q35/DSDT.dimmpxm",
+"tests/data/acpi/q35/DSDT.ipmibt",
+"tests/data/acpi/q35/DSDT.ivrs",
+"tests/data/acpi/q35/DSDT.memhp",
+"tests/data/acpi/q35/DSDT.mmio64",
+"tests/data/acpi/q35/DSDT.multi-bridge",
+"tests/data/acpi/q35/DSDT.nohpet",
+"tests/data/acpi/q35/DSDT.numamem",
+"tests/data/acpi/q35/DSDT.tis.tpm12",
+"tests/data/acpi/q35/DSDT.tis.tpm2",
+"tests/data/acpi/q35/DSDT.viot",
+"tests/data/acpi/q35/DSDT.xapic",
+"tests/data/acpi/q35/DSDT.ipmismbus",
-- 
2.31.1




[PATCH v2 28/35] acpi: pvpanic-isa: use AcpiDevAmlIfClass:build_dev_aml to provide device's AML

2022-06-08 Thread Igor Mammedov
.. and clean up not longer needed conditionals in DSTD build code
pvpanic-isa AML will be fetched and included when ISA bridge will
build its own AML code (including attached devices).

Expected AML change:
   the device under separate _SB.PCI0.ISA scope is moved directly
   under Device(ISA) node.

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 include/hw/misc/pvpanic.h |  9 -
 hw/i386/acpi-build.c  | 37 --
 hw/misc/pvpanic-isa.c | 42 +++
 3 files changed, 42 insertions(+), 46 deletions(-)

diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 7f16cc9b16..e520566ab0 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -33,13 +33,4 @@ struct PVPanicState {
 
 void pvpanic_setup_io(PVPanicState *s, DeviceState *dev, unsigned size);
 
-static inline uint16_t pvpanic_port(void)
-{
-Object *o = object_resolve_path_type("", TYPE_PVPANIC_ISA_DEVICE, NULL);
-if (!o) {
-return 0;
-}
-return object_property_get_uint(o, PVPANIC_IOPORT_PROP, NULL);
-}
-
 #endif
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index b96705c688..bbe02b068e 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -31,7 +31,6 @@
 #include "hw/cxl/cxl.h"
 #include "hw/core/cpu.h"
 #include "target/i386/cpu.h"
-#include "hw/misc/pvpanic.h"
 #include "hw/timer/hpet.h"
 #include "hw/acpi/acpi-defs.h"
 #include "hw/acpi/acpi.h"
@@ -120,7 +119,6 @@ typedef struct AcpiMiscInfo {
 #endif
 const unsigned char *dsdt_code;
 unsigned dsdt_size;
-uint16_t pvpanic_port;
 } AcpiMiscInfo;
 
 typedef struct AcpiBuildPciBusHotplugState {
@@ -305,7 +303,6 @@ static void acpi_get_misc_info(AcpiMiscInfo *info)
 #ifdef CONFIG_TPM
 info->tpm_version = tpm_get_version(tpm_find());
 #endif
-info->pvpanic_port = pvpanic_port();
 }
 
 /*
@@ -1798,40 +1795,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 aml_append(dsdt, scope);
 }
 
-if (misc->pvpanic_port) {
-scope = aml_scope("\\_SB.PCI0.ISA");
-
-dev = aml_device("PEVT");
-aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
-
-crs = aml_resource_template();
-aml_append(crs,
-aml_io(AML_DECODE16, misc->pvpanic_port, misc->pvpanic_port, 1, 1)
-);
-aml_append(dev, aml_name_decl("_CRS", crs));
-
-aml_append(dev, aml_operation_region("PEOR", AML_SYSTEM_IO,
-  aml_int(misc->pvpanic_port), 1));
-field = aml_field("PEOR", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
-aml_append(field, aml_named_field("PEPT", 8));
-aml_append(dev, field);
-
-/* device present, functioning, decoding, shown in UI */
-aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
-
-method = aml_method("RDPT", 0, AML_NOTSERIALIZED);
-aml_append(method, aml_store(aml_name("PEPT"), aml_local(0)));
-aml_append(method, aml_return(aml_local(0)));
-aml_append(dev, method);
-
-method = aml_method("WRPT", 1, AML_NOTSERIALIZED);
-aml_append(method, aml_store(aml_arg(0), aml_name("PEPT")));
-aml_append(dev, method);
-
-aml_append(scope, dev);
-aml_append(dsdt, scope);
-}
-
 sb_scope = aml_scope("\\_SB");
 {
 Object *pci_host;
diff --git a/hw/misc/pvpanic-isa.c b/hw/misc/pvpanic-isa.c
index b84d4d458d..ccec50f61b 100644
--- a/hw/misc/pvpanic-isa.c
+++ b/hw/misc/pvpanic-isa.c
@@ -22,6 +22,7 @@
 #include "qom/object.h"
 #include "hw/isa/isa.h"
 #include "standard-headers/linux/pvpanic.h"
+#include "hw/acpi/acpi_aml_interface.h"
 
 OBJECT_DECLARE_SIMPLE_TYPE(PVPanicISAState, PVPANIC_ISA_DEVICE)
 
@@ -63,6 +64,41 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error 
**errp)
 isa_register_ioport(d, &ps->mr, s->ioport);
 }
 
+static void build_pvpanic_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
+{
+Aml *crs, *field, *method;
+PVPanicISAState *s = PVPANIC_ISA_DEVICE(adev);
+Aml *dev = aml_device("PEVT");
+
+aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+
+crs = aml_resource_template();
+aml_append(crs,
+aml_io(AML_DECODE16, s->ioport, s->ioport, 1, 1)
+);
+aml_append(dev, aml_name_decl("_CRS", crs));
+
+aml_append(dev, aml_operation_region("PEOR", AML_SYSTEM_IO,
+  aml_int(s->ioport), 1));
+field = aml_field("PEOR", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
+aml_append(field, aml_named_field("PEPT", 8));
+aml_append(dev, field);
+
+/* device present, functioning, decoding, shown in UI */
+aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
+
+method = aml_method("RDPT", 0, AML_NOTSERIALIZED);
+aml_append(method, aml_store(aml_name("PEPT"), aml_local(0)));
+aml_append(method, aml_return(aml_local(0)));
+aml_append(dev, method);
+
+method = aml_meth

[PATCH v2 21/35] tests: acpi: update expected blobs

2022-06-08 Thread Igor Mammedov
Expected AML change:
ISA devices under separate _SB.PCI0.ISA scope are moved
directly under Device(ISA) node.

Example from PC machine, and q35 have similar changes:

 {
 Name (_ADR, 0x0001)  // _ADR: Address
 OperationRegion (P40C, PCI_Config, 0x60, 0x04)
-}
-}
-
-Scope (_SB.PCI0.ISA)
-{
-Device (KBD)
-{
-Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard 
(101/102-key, PS/2 Mouse) */)  // _HID: Hardware ID
-Name (_STA, 0x0F)  // _STA: Status
-Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
+Device (KBD)
 {
-IO (Decode16,
-0x0060, // Range Minimum
-0x0060, // Range Maximum
-0x01,   // Alignment
-0x01,   // Length
-)
-IO (Decode16,
-0x0064, // Range Minimum
-0x0064, // Range Maximum
-0x01,   // Alignment
-0x01,   // Length
-)
-IRQNoFlags ()
-{1}
-})
-}
-
-Device (MOU)
-{
-Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */)  // _HID: 
Hardware ID
-Name (_STA, 0x0F)  // _STA: Status
-Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
-{
-IRQNoFlags ()
-{12}
-})
-}
+Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard 
(101/102-key, PS/2 Mouse) */)  // _HID: Hardware ID
+Name (_STA, 0x0F)  // _STA: Status
+Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource 
Settings
+{
+IO (Decode16,
+0x0060, // Range Minimum
+0x0060, // Range Maximum
+0x01,   // Alignment
+0x01,   // Length
+)
+IO (Decode16,
+0x0064, // Range Minimum
+0x0064, // Range Maximum
+0x01,   // Alignment
+0x01,   // Length
+)
+IRQNoFlags ()
+{1}
+})
+}

-Device (FDC0)
-{
-Name (_HID, EisaId ("PNP0700"))  // _HID: Hardware ID
-Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
-{
-IO (Decode16,
-0x03F2, // Range Minimum
-0x03F2, // Range Maximum
-0x00,   // Alignment
-0x04,   // Length
-)
-IO (Decode16,
-0x03F7, // Range Minimum
-0x03F7, // Range Maximum
-0x00,   // Alignment
-0x01,   // Length
-)
-IRQNoFlags ()
-{6}
-DMA (Compatibility, NotBusMaster, Transfer8, )
-{2}
-})
-Device (FLPA)
+Device (MOU)
 {
-Name (_ADR, Zero)  // _ADR: Address
-Name (_FDI, Package (0x10)  // _FDI: Floppy Drive Information
+Name (_HID, EisaId ("PNP0F13") /* PS/2 Mouse */)  // _HID: 
Hardware ID
+Name (_STA, 0x0F)  // _STA: Status
+Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource 
Settings
 {
-Zero,
-0x05,
-0x4F,
-0x30,
-One,
-0xAF,
-0x02,
-0x25,
-0x02,
-0x12,
-0x1B,
-0xFF,
-0x6C,
-0xF6,
-0x0F,
-0x08
+IRQNoFlags ()
+{12}
 })
 }

-Name (_FDE, Buffer (0x14)  // _FDE: Floppy Disk Enumerate
+Device (FDC0)
 {
-/*  */  0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  
// 
-/* 0008 */  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,  
// 
-/* 0010 */  0x02, 0x00, 0x00, 0x00   
// 
-})
-}
+Name (_HID, EisaId ("PNP0700"))  // _HID: Hardware ID
+

[PATCH v2 15/35] acpi: ich9-smb: add support for AcpiDevAmlIf interface

2022-06-08 Thread Igor Mammedov
wire AcpiDevAmlIf interface to build ich9-smb and its slave
devices AML. It will be used by followup patches to switch
from creating AML in ad-hoc way to a more systematic one
that will scan present devices and ask them to provide
their AML code like it's done with ISA devices.

This patch is a partial conversion, as it only fetches
AML from slave devices attached to its I2C bus.

The conversion will be completed when PCI bus is
switched to use AcpiDevAmlIf and build_smb0() could be
dropped.

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 hw/i2c/smbus_ich9.c | 15 +++
 1 file changed, 15 insertions(+)

diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c
index 44dd5653b7..ee50ba1f2c 100644
--- a/hw/i2c/smbus_ich9.c
+++ b/hw/i2c/smbus_ich9.c
@@ -29,6 +29,7 @@
 
 #include "hw/i386/ich9.h"
 #include "qom/object.h"
+#include "hw/acpi/acpi_aml_interface.h"
 
 OBJECT_DECLARE_SIMPLE_TYPE(ICH9SMBState, ICH9_SMB_DEVICE)
 
@@ -94,10 +95,22 @@ static void ich9_smbus_realize(PCIDevice *d, Error **errp)
  &s->smb.io);
 }
 
+static void build_ich9_smb_aml(AcpiDevAmlIf *adev, Aml *scope)
+{
+BusChild *kid;
+ICH9SMBState *s = ICH9_SMB_DEVICE(adev);
+BusState *bus = BUS(s->smb.smbus);
+
+QTAILQ_FOREACH(kid, &bus->children, sibling) {
+call_dev_aml_func(DEVICE(kid->child), scope);
+}
+}
+
 static void ich9_smb_class_init(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
 
 k->vendor_id = PCI_VENDOR_ID_INTEL;
 k->device_id = PCI_DEVICE_ID_INTEL_ICH9_6;
@@ -112,6 +125,7 @@ static void ich9_smb_class_init(ObjectClass *klass, void 
*data)
  * pc_q35_init()
  */
 dc->user_creatable = false;
+adevc->build_dev_aml = build_ich9_smb_aml;
 }
 
 static void ich9_smb_set_irq(PMSMBus *pmsmb, bool enabled)
@@ -143,6 +157,7 @@ static const TypeInfo ich9_smb_info = {
 .class_init = ich9_smb_class_init,
 .interfaces = (InterfaceInfo[]) {
 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+{ TYPE_ACPI_DEV_AML_IF },
 { },
 },
 };
-- 
2.31.1




[PATCH v2 27/35] tests: acpi: add pvpanic-isa: testcase

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 tests/qtest/bios-tables-test.c | 12 
 1 file changed, 12 insertions(+)

diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 7d238218ca..56498bbcc8 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1636,6 +1636,17 @@ static void test_acpi_q35_applesmc(void)
 free_test_data(&data);
 }
 
+static void test_acpi_q35_pvpanic_isa(void)
+{
+test_data data = {
+.machine = MACHINE_Q35,
+.variant = ".pvpanic-isa",
+};
+
+test_acpi_one("-device pvpanic", &data);
+free_test_data(&data);
+}
+
 static void test_oem_fields(test_data *data)
 {
 int i;
@@ -1795,6 +1806,7 @@ int main(int argc, char *argv[])
 qtest_add_func("acpi/piix4/acpierst", test_acpi_piix4_acpi_erst);
 qtest_add_func("acpi/q35/acpierst", test_acpi_q35_acpi_erst);
 qtest_add_func("acpi/q35/applesmc", test_acpi_q35_applesmc);
+qtest_add_func("acpi/q35/pvpanic-isa", test_acpi_q35_pvpanic_isa);
 qtest_add_func("acpi/microvm", test_acpi_microvm_tcg);
 qtest_add_func("acpi/microvm/usb", test_acpi_microvm_usb_tcg);
 qtest_add_func("acpi/microvm/rtc", test_acpi_microvm_rtc_tcg);
-- 
2.31.1




[PATCH v2 16/35] acpi: ipmi: use AcpiDevAmlIf interface to build IPMI device descriptors

2022-06-08 Thread Igor Mammedov
convert ad-hoc way we use to generate AML for ISA/SMB IPMI devices
to a generic approach (i.e. make devices provide its own AML blobs
like it is done with other ISA devices (ex. KBD))

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 include/hw/acpi/ipmi.h |  9 ++--
 hw/acpi/ipmi-stub.c|  2 +-
 hw/acpi/ipmi.c | 49 +-
 hw/i386/acpi-build.c   | 17 ++-
 hw/ipmi/isa_ipmi_bt.c  |  4 
 hw/ipmi/isa_ipmi_kcs.c |  4 
 hw/ipmi/smbus_ipmi.c   |  4 
 7 files changed, 42 insertions(+), 47 deletions(-)

diff --git a/include/hw/acpi/ipmi.h b/include/hw/acpi/ipmi.h
index c38483565c..6c8079c97a 100644
--- a/include/hw/acpi/ipmi.h
+++ b/include/hw/acpi/ipmi.h
@@ -9,13 +9,8 @@
 #ifndef HW_ACPI_IPMI_H
 #define HW_ACPI_IPMI_H
 
-#include "hw/acpi/aml-build.h"
+#include "hw/acpi/acpi_aml_interface.h"
 
-/*
- * Add ACPI IPMI entries for all registered IPMI devices whose parent
- * bus matches the given bus.  The resource is the ACPI resource that
- * contains the IPMI device, this is required for the I2C CRS.
- */
-void build_acpi_ipmi_devices(Aml *table, BusState *bus);
+void build_ipmi_dev_aml(AcpiDevAmlIf *adev, Aml *scope);
 
 #endif /* HW_ACPI_IPMI_H */
diff --git a/hw/acpi/ipmi-stub.c b/hw/acpi/ipmi-stub.c
index f525f71c2d..befaf0a882 100644
--- a/hw/acpi/ipmi-stub.c
+++ b/hw/acpi/ipmi-stub.c
@@ -10,6 +10,6 @@
 #include "qemu/osdep.h"
 #include "hw/acpi/ipmi.h"
 
-void build_acpi_ipmi_devices(Aml *table, BusState *bus)
+void build_ipmi_dev_aml(AcpiDevAmlIf *adev, Aml *scope)
 {
 }
diff --git a/hw/acpi/ipmi.c b/hw/acpi/ipmi.c
index c30b44fcf5..a20e57d465 100644
--- a/hw/acpi/ipmi.c
+++ b/hw/acpi/ipmi.c
@@ -62,46 +62,27 @@ static Aml *aml_ipmi_crs(IPMIFwInfo *info)
 return crs;
 }
 
-static Aml *aml_ipmi_device(IPMIFwInfo *info)
+void build_ipmi_dev_aml(AcpiDevAmlIf *adev, Aml *scope)
 {
 Aml *dev;
-uint16_t version = ((info->ipmi_spec_major_revision << 8)
-| (info->ipmi_spec_minor_revision << 4));
+IPMIFwInfo info = {};
+IPMIInterface *ii = IPMI_INTERFACE(adev);
+IPMIInterfaceClass *iic = IPMI_INTERFACE_GET_CLASS(ii);
+uint16_t version;
 
-assert(info->ipmi_spec_minor_revision <= 15);
+iic->get_fwinfo(ii, &info);
+assert(info.ipmi_spec_minor_revision <= 15);
+version = ((info.ipmi_spec_major_revision << 8)
+  | (info.ipmi_spec_minor_revision << 4));
 
-dev = aml_device("MI%d", info->uuid);
+dev = aml_device("MI%d", info.uuid);
 aml_append(dev, aml_name_decl("_HID", aml_eisaid("IPI0001")));
 aml_append(dev, aml_name_decl("_STR", aml_string("ipmi_%s",
- info->interface_name)));
-aml_append(dev, aml_name_decl("_UID", aml_int(info->uuid)));
-aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(info)));
-aml_append(dev, aml_name_decl("_IFT", aml_int(info->interface_type)));
+ info.interface_name)));
+aml_append(dev, aml_name_decl("_UID", aml_int(info.uuid)));
+aml_append(dev, aml_name_decl("_CRS", aml_ipmi_crs(&info)));
+aml_append(dev, aml_name_decl("_IFT", aml_int(info.interface_type)));
 aml_append(dev, aml_name_decl("_SRV", aml_int(version)));
 
-return dev;
-}
-
-void build_acpi_ipmi_devices(Aml *scope, BusState *bus)
-{
-
-BusChild *kid;
-
-QTAILQ_FOREACH(kid, &bus->children,  sibling) {
-IPMIInterface *ii;
-IPMIInterfaceClass *iic;
-IPMIFwInfo info;
-Object *obj = object_dynamic_cast(OBJECT(kid->child),
-  TYPE_IPMI_INTERFACE);
-
-if (!obj) {
-continue;
-}
-
-ii = IPMI_INTERFACE(obj);
-iic = IPMI_INTERFACE_GET_CLASS(obj);
-memset(&info, 0, sizeof(info));
-iic->get_fwinfo(ii, &info);
-aml_append(scope, aml_ipmi_device(&info));
-}
+aml_append(scope, dev);
 }
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 88506d563f..5b963cca32 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -39,6 +39,7 @@
 #include "hw/nvram/fw_cfg.h"
 #include "hw/acpi/bios-linker-loader.h"
 #include "hw/isa/isa.h"
+#include "hw/acpi/acpi_aml_interface.h"
 #include "hw/input/i8042.h"
 #include "hw/acpi/memory_hotplug.h"
 #include "sysemu/tpm.h"
@@ -73,7 +74,6 @@
 #include "hw/i386/intel_iommu.h"
 #include "hw/virtio/virtio-iommu.h"
 
-#include "hw/acpi/ipmi.h"
 #include "hw/acpi/hmat.h"
 #include "hw/acpi/viot.h"
 #include "hw/acpi/cxl.h"
@@ -873,7 +873,6 @@ static void build_isa_devices_aml(Aml *table)
 assert(obj && !ambiguous);
 
 scope = aml_scope("_SB.PCI0.ISA");
-build_acpi_ipmi_devices(scope, BUS(obj));
 isa_build_aml(ISA_BUS(obj), scope);
 
 aml_append(table, scope);
@@ -1400,13 +1399,21 @@ static Aml *build_q35_osc_method(bool 
enable_native_pcie_hotplug)
 return method;
 }
 
-static void build_smb0(Aml *table, I2CBus *smbus

[PATCH v2 32/35] acpi: pc/q35: remove not needed 'if' condition on pci bus

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
Reviewed-by: Ani Sinha 
Acked-by: Gerd Hoffmann 
---
 hw/i386/acpi-build.c | 10 ++
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 6b496480d2..1204b6da05 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1797,16 +1797,10 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 
 sb_scope = aml_scope("\\_SB");
 {
-Object *pci_host;
-PCIBus *bus = NULL;
-
-pci_host = acpi_get_i386_pci_host();
+Object *pci_host = acpi_get_i386_pci_host();
 
 if (pci_host) {
-bus = PCI_HOST_BRIDGE(pci_host)->bus;
-}
-
-if (bus) {
+PCIBus *bus = PCI_HOST_BRIDGE(pci_host)->bus;
 Aml *scope = aml_scope("PCI0");
 /* Scan all PCI buses. Generate tables to support hotplug. */
 build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en);
-- 
2.31.1




[PATCH v2 29/35] tests: acpi: update expected DSDT.pvpanic-isa blob

2022-06-08 Thread Igor Mammedov
@@ -145,6 +145,37 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC", 
0x0001)
 {
 Name (_ADR, 0x001F)  // _ADR: Address
 OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
+Device (PEVT)
+{
+Name (_HID, "QEMU0001")  // _HID: Hardware ID
+Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource 
Settings
+{
+IO (Decode16,
+0x0505, // Range Minimum
+0x0505, // Range Maximum
+0x01,   // Alignment
+0x01,   // Length
+)
+})
+OperationRegion (PEOR, SystemIO, 0x0505, One)
+Field (PEOR, ByteAcc, NoLock, Preserve)
+{
+PEPT,   8
+}
+
+Name (_STA, 0x0F)  // _STA: Status
+Method (RDPT, 0, NotSerialized)
+{
+Local0 = PEPT /* \_SB_.PCI0.ISA_.PEVT.PEPT */
+Return (Local0)
+}
+
+Method (WRPT, 1, NotSerialized)
+{
+PEPT = Arg0
+}
+}
+
 Device (KBD)
 {
 Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard 
(101/102-key, PS/2 Mouse) */)  // _HID: Hardware ID
@@ -3246,40 +3277,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC", 
0x0001)
 }
 }

-Scope (\_SB.PCI0.ISA)
-{
-Device (PEVT)
-{
-Name (_HID, "QEMU0001")  // _HID: Hardware ID
-Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
-{
-IO (Decode16,
-0x0505, // Range Minimum
-0x0505, // Range Maximum
-0x01,   // Alignment
-0x01,   // Length
-)
-})
-OperationRegion (PEOR, SystemIO, 0x0505, One)
-Field (PEOR, ByteAcc, NoLock, Preserve)
-{
-PEPT,   8
-}
-
-Name (_STA, 0x0F)  // _STA: Status
-Method (RDPT, 0, NotSerialized)
-{
-Local0 = PEPT /* \_SB_.PCI0.ISA_.PEVT.PEPT */
-Return (Local0)
-}
-
-Method (WRPT, 1, NotSerialized)
-{
-PEPT = Arg0
-}
-}
-}
-
 Scope (\_SB)
 {
 Scope (PCI0)

Signed-off-by: Igor Mammedov 
---
 tests/qtest/bios-tables-test-allowed-diff.h |   1 -
 tests/data/acpi/q35/DSDT.pvpanic-isa| Bin 0 -> 8375 bytes
 2 files changed, 1 deletion(-)

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index d5cd7aa4f5..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,2 +1 @@
 /* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/q35/DSDT.pvpanic-isa",
diff --git a/tests/data/acpi/q35/DSDT.pvpanic-isa 
b/tests/data/acpi/q35/DSDT.pvpanic-isa
index 
e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..cc545b5d2505246d33f83d2482273968aa1be032
 100644
GIT binary patch
literal 8375
zcmb7JOKcm*8J^`!tK~{sQk3LZY{E&?~(R|lb;iIo;;J&VO^}
z)XzV^_)huW&;I#~+pk+G0M6mBiNEJ#xAeAd5ed_Z*mY;~~sS)V@^Wez=w
zBPzLTiz2FO_2BjH{)=9_?D96w1+AdumR8X&w;krrSf@T-Va%q^q2Hf|!{J}WEpu)#
zr)dh6zF80aj#Ozt8>#B<)q_rx*^J%)Hp^1on-0Z`FZ(U87__}!vG9B^?37tdB~eU8
z+wVn|6AkQ7`w{C$+2Qbj4dy@XZ?oTR+w9-}OCPWUYeBRvXU%^!OKrLTElV+m*3?&?
zrshzGclXzp8)3P}I~ff)gT@4n_GZG0EE}Ve3H+Bud*?R&=2oe6D0$AZYDOAA!?-~t
zf1_<=5n(Ry`@j!67)7+(S}4r7y`aNlDvJ)Hf_9f@D-TiaxL1$Igof5Oi(6Ej*
zS2NyCzMC}7vwOVebM8j-kdp=)V>E^HAo(E4%(D*XJlXEJhpowuW(BW0W-&9&vkblD
zv~mwSelKvtj*-1*TP6ma0v7|aRm8A&BB-L`V_cPL@WU3
z#WT(WREESv{T!R%OkhV5F(ov?I1^CLL`Y1uhGUbQDO-?a#FWsaU;@gS2#G1PV6_S?
zuP4Qs5}FcB*?5Gi&a|d8&6yIK7EIZAgsRSrrZdBt5}MI9&fI%jpA2vwbyrqj}NTDnezs?MyYGpp&$>N*jsI`Mv0#?#hx
z+PY4Js?Ir0=bWZD>pBstIu|sZ3!2UaT_-|Sr=#g~G@XvF6QQaz
zr|HaTI&->CgsRTGrZcbU%u8LB#AprTsNgn=qhGEjul70EymN}VuJf#pmX
zr~)Me6;Pg&3>2Z%2?G^a&V+#~P%=;fAz;Y%GRDqI#3Mglifg+ST
zVW0xbnJ`cVN(L&RoJj_XQ0jz%3M^;BKouw%sDN@N87M-j69y``0?L_Wpa`W-7^uKf}LawZulLa7r5DzKah16818paRO7WS|J8P8g`bawZH^
zfs%m=C})y^B9uB|paRR8Fi-_b1}dPONd}5g>V$zJQVbN4YM=;J14XD9sKSJSDoip^
zg-HggFkzqy69%d<$v_n*8K}a9fhtTGsKO)zRhVR;3KIsZFkzqylMGa0l7T8r7$_n+
zx-d{g7%|?NWS|H!3^F99>{}QpBH6bvP(-qC$v_dxz9j=ihz+O{Jy<9k*nR%b>H+;j
zdN)IV%H5kkc_vB!rP6*1?V%V!d$SD3-K@~XrHf}W?C5OzbYG=QjV^Vwu-MqdZopvn
zeQR$QTQ{=@R<`hLW7BQV0?;ny=B?}}88*xJmu|4zRA!}dZN%^IS__Qs(1y_R3gxY@U4Q>=h+@g=epzeQNefVS4sTcfU#6
z#ReTV5l7ms#3Q74mGmx8?~bK+k4W#1(tBg#Eo^9gXZ4%>Ag{Ue>{Ea
z5z_lgdY`BF$I|;pr1wYZtK;d@kC48qq_6Vy)v@%|Bhpt#>1*TZGmntIrlha&^tG|{
zwIkBkM(OM0>1Q4xeO*ak=jrQX>FY^|C^SFM0f-
zbv>$Xd>LCgy*hkrOjIYzrdBtxF7tYI_yC!xPLxfpZepEb3z*iK6o#*oi

[PATCH v2 30/35] tests: acpi: white-list DSDT.tis.tpm2/DSDT.tis.tpm12 expected blobs

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
Acked-by: Ani Sinha 
---
 tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..7b3bf9a207 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,3 @@
 /* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/q35/DSDT.tis.tpm2",
+"tests/data/acpi/q35/DSDT.tis.tpm12",
-- 
2.31.1




[PATCH v2 06/35] acpi: mc146818rtc: replace ISADeviceClass::build_aml with AcpiDevAmlIfClass:build_dev_aml

2022-06-08 Thread Igor Mammedov
Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 hw/rtc/mc146818rtc.c | 14 +-
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c
index f235c2ddbe..ef9765bb8f 100644
--- a/hw/rtc/mc146818rtc.c
+++ b/hw/rtc/mc146818rtc.c
@@ -26,7 +26,7 @@
 #include "qemu/cutils.h"
 #include "qemu/module.h"
 #include "qemu/bcd.h"
-#include "hw/acpi/aml-build.h"
+#include "hw/acpi/acpi_aml_interface.h"
 #include "hw/irq.h"
 #include "hw/qdev-properties.h"
 #include "hw/qdev-properties-system.h"
@@ -1017,9 +1017,9 @@ static void rtc_reset_hold(Object *obj)
 qemu_irq_lower(s->irq);
 }
 
-static void rtc_build_aml(ISADevice *isadev, Aml *scope)
+static void rtc_build_aml(AcpiDevAmlIf *adev, Aml *scope)
 {
-RTCState *s = MC146818_RTC(isadev);
+RTCState *s = MC146818_RTC(adev);
 Aml *dev;
 Aml *crs;
 
@@ -1043,13 +1043,13 @@ static void rtc_class_initfn(ObjectClass *klass, void 
*data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
 ResettableClass *rc = RESETTABLE_CLASS(klass);
-ISADeviceClass *isa = ISA_DEVICE_CLASS(klass);
+AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
 
 dc->realize = rtc_realizefn;
 dc->vmsd = &vmstate_rtc;
 rc->phases.enter = rtc_reset_enter;
 rc->phases.hold = rtc_reset_hold;
-isa->build_aml = rtc_build_aml;
+adevc->build_dev_aml = rtc_build_aml;
 device_class_set_props(dc, mc146818rtc_properties);
 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
 }
@@ -1059,6 +1059,10 @@ static const TypeInfo mc146818rtc_info = {
 .parent= TYPE_ISA_DEVICE,
 .instance_size = sizeof(RTCState),
 .class_init= rtc_class_initfn,
+.interfaces = (InterfaceInfo[]) {
+{ TYPE_ACPI_DEV_AML_IF },
+{ },
+},
 };
 
 static void mc146818rtc_register_types(void)
-- 
2.31.1




[PATCH v2 34/35] tests: acpi: update expected DSDT.tis.tpm2/DSDT.tis.tpm12 blobs

2022-06-08 Thread Igor Mammedov
expected move of tmp-tis device description directly under
Device(ISA) node.

for tpm-tis 2.0:

  @@ -145,6 +145,189 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC", 
0x0001)
   {
   Name (_ADR, 0x001F)  // _ADR: Address
   OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
  +Device (TPM)
  +{
  +Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */)  // 
_HID: Hardware ID
  +Name (_STR, "TPM 2.0 Device")  // _STR: Description String
  +Name (_UID, One)  // _UID: Unique ID
  +Name (_STA, 0x0F)  // _STA: Status
...
  +}

  @@ -3281,189 +3464,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC", 
0x0001)
   Method (PCNT, 0, NotSerialized)
   {
   }
  -
  -Device (TPM)
  -{
  -Name (_HID, "MSFT0101" /* TPM 2.0 Security Device */)  // 
_HID: Hardware ID
  -Name (_STR, "TPM 2.0 Device")  // _STR: Description String
  -Name (_UID, One)  // _UID: Unique ID
  -Name (_STA, 0x0F)  // _STA: Status
...
  -}

for tpm-tis 1.2:

  @@ -145,6 +145,188 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC", 
0x0001)
   {
   Name (_ADR, 0x001F)  // _ADR: Address
   OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
  +Device (TPM)
  +{
  +Name (_HID, EisaId ("PNP0C31"))  // _HID: Hardware ID
  +Name (_UID, One)  // _UID: Unique ID
  +Name (_STA, 0x0F)  // _STA: Status
...
  +}

  @@ -3281,188 +3463,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC", 
0x0001)
   Method (PCNT, 0, NotSerialized)
   {
   }
  -
  -Device (ISA.TPM)
  -{
  -Name (_HID, EisaId ("PNP0C31"))  // _HID: Hardware ID
  -Name (_UID, One)  // _UID: Unique ID
  -Name (_STA, 0x0F)  // _STA: Status
...
  -}

Signed-off-by: Igor Mammedov 
Acked-by: Ani Sinha 
---
 tests/qtest/bios-tables-test-allowed-diff.h |   2 --
 tests/data/acpi/q35/DSDT.tis.tpm12  | Bin 8885 -> 8880 bytes
 tests/data/acpi/q35/DSDT.tis.tpm2   | Bin 8906 -> 8906 bytes
 3 files changed, 2 deletions(-)

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index 7b3bf9a207..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,3 +1 @@
 /* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/q35/DSDT.tis.tpm2",
-"tests/data/acpi/q35/DSDT.tis.tpm12",
diff --git a/tests/data/acpi/q35/DSDT.tis.tpm12 
b/tests/data/acpi/q35/DSDT.tis.tpm12
index 
0b5c97fdb5da8b7b55d6b5f2af498a447fda7bf8..a97d884c50485f848054c6ac95ecfa055ff59e5b
 100644
GIT binary patch
delta 89
zcmdn$y1|vpCDCo#F$WJq@Cp+yp#>9pgFT9bJNW7#QRk
vq8kD{g94ej61aFa$Fi`>ak*;6fK&_kYEI5ka^Z|_a#hs>Y1z!rg5>c

diff --git a/tests/data/acpi/q35/DSDT.tis.tpm2 
b/tests/data/acpi/q35/DSDT.tis.tpm2
index 
4e16b126cc1c32f2346078fa69c5261c245d15e8..1f5392919b5ea69696b49ff13aab5c37d0615919
 100644
GIT binary patch
delta 85
zcmX@*ddii{CDCo#F$WJq@Cp+yp#>9pgFT9bJNW7#QRk
nq8kD{g94ej61aFam$R_Sad~OSfK&@OX-{rba@owyl*0r7A8!`n

-- 
2.31.1




[PATCH v2 31/35] acpi: pc/q35: tpm-tis: fix TPM device scope

2022-06-08 Thread Igor Mammedov
tpm-tis 2.0, is not a PCI device but ISA one, move it
under ISA scope to fix incorrect placement.

Fixes: 24cf5413aa0 (acpi: Make TPM 2.0 with TIS available as MSFT0101)
Signed-off-by: Igor Mammedov 
Reviewed-by: Ani Sinha 
Acked-by: Gerd Hoffmann 
---
 hw/i386/acpi-build.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index bbe02b068e..6b496480d2 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1813,15 +1813,14 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 
 #ifdef CONFIG_TPM
 if (TPM_IS_TIS_ISA(tpm)) {
+dev = aml_device("ISA.TPM");
 if (misc->tpm_version == TPM_VERSION_2_0) {
-dev = aml_device("TPM");
 aml_append(dev, aml_name_decl("_HID",
   aml_string("MSFT0101")));
 aml_append(dev,
aml_name_decl("_STR",
  aml_string("TPM 2.0 Device")));
 } else {
-dev = aml_device("ISA.TPM");
 aml_append(dev, aml_name_decl("_HID",
   aml_eisaid("PNP0C31")));
 }
-- 
2.31.1




[PATCH v2 35/35] x86: acpi-build: do not include hw/isa/isa.h directly

2022-06-08 Thread Igor Mammedov
the last remaining dependency on ISA in acpi-build.c
is iapc_boot_arch_8042() which pulls in in isa.h
in its own header hw/input/i8042.h. Clean up
not longer needed direct inclusion of isa.h in
acpi-build.c

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 hw/i386/acpi-build.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 0b65fc99cd..f41e14a469 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -37,7 +37,6 @@
 #include "hw/acpi/cpu.h"
 #include "hw/nvram/fw_cfg.h"
 #include "hw/acpi/bios-linker-loader.h"
-#include "hw/isa/isa.h"
 #include "hw/acpi/acpi_aml_interface.h"
 #include "hw/input/i8042.h"
 #include "hw/acpi/memory_hotplug.h"
-- 
2.31.1




[PATCH v2 19/35] acpi: pc: isa bridge: use AcpiDevAmlIf interface to build ISA device descriptors

2022-06-08 Thread Igor Mammedov
replaces ad-hoc build_isa_devices_aml() with generic AcpiDevAmlIf
way to build bridge AML including all devices that are attached to
its ISA bus.

Later when PCI is converted to AcpiDevAmlIf, build_piix4_isa_bridge()
will also be dropped since PCI parts itself will take care of
building device prologue/epilogue AML for each enumerated PCI
device.

Expected AML change is contextual, where ISA devices are moved
from separately declared _SB.PCI0.ISA scope , directly under
Device(ISA) node.

Signed-off-by: Igor Mammedov 
Acked-by: Gerd Hoffmann 
---
 hw/i386/acpi-build.c | 16 +++-
 hw/isa/piix3.c   | 17 +
 2 files changed, 28 insertions(+), 5 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index d943354999..f903f30b7e 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1280,15 +1280,22 @@ static void build_piix4_isa_bridge(Aml *table)
 {
 Aml *dev;
 Aml *scope;
+Object *obj;
+bool ambiguous;
+
+/*
+ * temporarily fish out isa bridge, build_piix4_isa_bridge() will be 
dropped
+ * once PCI is converted to AcpiDevAmlIf and would be ble to generate
+ * AML for bridge itself
+ */
+obj = object_resolve_path_type("", TYPE_PIIX3_PCI_DEVICE, &ambiguous);
+assert(obj && !ambiguous);
 
 scope =  aml_scope("_SB.PCI0");
 dev = aml_device("ISA");
 aml_append(dev, aml_name_decl("_ADR", aml_int(0x0001)));
 
-/* PIIX PCI to ISA irq remapping */
-aml_append(dev, aml_operation_region("P40C", AML_PCI_CONFIG,
- aml_int(0x60), 0x04));
-
+call_dev_aml_func(DEVICE(obj), dev);
 aml_append(scope, dev);
 aml_append(table, scope);
 }
@@ -1476,7 +1483,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 build_hpet_aml(dsdt);
 }
 build_piix4_isa_bridge(dsdt);
-build_isa_devices_aml(dsdt);
 if (pm->pcihp_bridge_en || pm->pcihp_root_en) {
 build_x86_acpi_pci_hotplug(dsdt, pm->pcihp_io_base);
 }
diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c
index dab901c9ad..bfccd666d4 100644
--- a/hw/isa/piix3.c
+++ b/hw/isa/piix3.c
@@ -32,6 +32,7 @@
 #include "sysemu/reset.h"
 #include "sysemu/runstate.h"
 #include "migration/vmstate.h"
+#include "hw/acpi/acpi_aml_interface.h"
 
 #define XEN_PIIX_NUM_PIRQS  128ULL
 
@@ -286,10 +287,24 @@ static void piix3_realize(PCIDevice *dev, Error **errp)
 qemu_register_reset(piix3_reset, d);
 }
 
+static void build_pci_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
+{
+BusChild *kid;
+BusState *bus = qdev_get_child_bus(DEVICE(adev), "isa.0");
+
+/* PIIX PCI to ISA irq remapping */
+aml_append(scope, aml_operation_region("P40C", AML_PCI_CONFIG,
+ aml_int(0x60), 0x04));
+QTAILQ_FOREACH(kid, &bus->children, sibling) {
+call_dev_aml_func(DEVICE(kid->child), scope);
+}
+}
+
 static void pci_piix3_class_init(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
+AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
 
 dc->desc= "ISA bridge";
 dc->vmsd= &vmstate_piix3;
@@ -304,6 +319,7 @@ static void pci_piix3_class_init(ObjectClass *klass, void 
*data)
  * pc_piix.c's pc_init1()
  */
 dc->user_creatable = false;
+adevc->build_dev_aml = build_pci_isa_aml;
 }
 
 static const TypeInfo piix3_pci_type_info = {
@@ -314,6 +330,7 @@ static const TypeInfo piix3_pci_type_info = {
 .class_init = pci_piix3_class_init,
 .interfaces = (InterfaceInfo[]) {
 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
+{ TYPE_ACPI_DEV_AML_IF },
 { },
 },
 };
-- 
2.31.1




[PATCH v2 33/35] acpi: tpm-tis: use AcpiDevAmlIfClass:build_dev_aml to provide device's AML

2022-06-08 Thread Igor Mammedov
.. and clean up not longer needed conditionals in DSTD build code
tpm-tis AML will be fetched and included when ISA bridge will
build its own AML code (including attached devices).

Expected AML change:
the device under separate _SB.PCI0.ISA scope is moved directly
under Device(ISA) node.

Signed-off-by: Igor Mammedov 
Reviewed-by: Ani Sinha 
Acked-by: Gerd Hoffmann 
---
 hw/i386/acpi-build.c | 34 --
 hw/tpm/tpm_tis_isa.c | 32 
 2 files changed, 32 insertions(+), 34 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 1204b6da05..0b65fc99cd 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -1804,40 +1804,6 @@ build_dsdt(GArray *table_data, BIOSLinker *linker,
 Aml *scope = aml_scope("PCI0");
 /* Scan all PCI buses. Generate tables to support hotplug. */
 build_append_pci_bus_devices(scope, bus, pm->pcihp_bridge_en);
-
-#ifdef CONFIG_TPM
-if (TPM_IS_TIS_ISA(tpm)) {
-dev = aml_device("ISA.TPM");
-if (misc->tpm_version == TPM_VERSION_2_0) {
-aml_append(dev, aml_name_decl("_HID",
-  aml_string("MSFT0101")));
-aml_append(dev,
-   aml_name_decl("_STR",
- aml_string("TPM 2.0 Device")));
-} else {
-aml_append(dev, aml_name_decl("_HID",
-  aml_eisaid("PNP0C31")));
-}
-aml_append(dev, aml_name_decl("_UID", aml_int(1)));
-
-aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
-crs = aml_resource_template();
-aml_append(crs, aml_memory32_fixed(TPM_TIS_ADDR_BASE,
-   TPM_TIS_ADDR_SIZE, AML_READ_WRITE));
-/*
-FIXME: TPM_TIS_IRQ=5 conflicts with PNP0C0F irqs,
-Rewrite to take IRQ from TPM device model and
-fix default IRQ value there to use some unused IRQ
- */
-/* aml_append(crs, aml_irq_no_flags(TPM_TIS_IRQ)); */
-aml_append(dev, aml_name_decl("_CRS", crs));
-
-tpm_build_ppi_acpi(tpm, dev);
-
-aml_append(scope, dev);
-}
-#endif
-
 aml_append(sb_scope, scope);
 }
 }
diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c
index 3477afd735..91e3792248 100644
--- a/hw/tpm/tpm_tis_isa.c
+++ b/hw/tpm/tpm_tis_isa.c
@@ -30,6 +30,7 @@
 #include "tpm_prop.h"
 #include "tpm_tis.h"
 #include "qom/object.h"
+#include "hw/acpi/acpi_aml_interface.h"
 
 struct TPMStateISA {
 /*< private >*/
@@ -138,10 +139,39 @@ static void tpm_tis_isa_realizefn(DeviceState *dev, Error 
**errp)
 }
 }
 
+static void build_tpm_tis_isa_aml(AcpiDevAmlIf *adev, Aml *scope)
+{
+Aml *dev, *crs;
+TPMStateISA *isadev = TPM_TIS_ISA(adev);
+TPMIf *ti = TPM_IF(isadev);
+
+dev = aml_device("TPM");
+if (tpm_tis_isa_get_tpm_version(ti) == TPM_VERSION_2_0) {
+aml_append(dev, aml_name_decl("_HID", aml_string("MSFT0101")));
+aml_append(dev, aml_name_decl("_STR", aml_string("TPM 2.0 Device")));
+} else {
+aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0C31")));
+}
+aml_append(dev, aml_name_decl("_UID", aml_int(1)));
+aml_append(dev, aml_name_decl("_STA", aml_int(0xF)));
+crs = aml_resource_template();
+aml_append(crs, aml_memory32_fixed(TPM_TIS_ADDR_BASE, TPM_TIS_ADDR_SIZE,
+  AML_READ_WRITE));
+/*
+ * FIXME: TPM_TIS_IRQ=5 conflicts with PNP0C0F irqs,
+ * fix default TPM_TIS_IRQ value there to use some unused IRQ
+ */
+/* aml_append(crs, aml_irq_no_flags(isadev->state.irq_num)); */
+aml_append(dev, aml_name_decl("_CRS", crs));
+tpm_build_ppi_acpi(ti, dev);
+aml_append(scope, dev);
+}
+
 static void tpm_tis_isa_class_init(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
 TPMIfClass *tc = TPM_IF_CLASS(klass);
+AcpiDevAmlIfClass *adevc = ACPI_DEV_AML_IF_CLASS(klass);
 
 device_class_set_props(dc, tpm_tis_isa_properties);
 dc->vmsd  = &vmstate_tpm_tis_isa;
@@ -151,6 +181,7 @@ static void tpm_tis_isa_class_init(ObjectClass *klass, void 
*data)
 tc->request_completed = tpm_tis_isa_request_completed;
 tc->get_version = tpm_tis_isa_get_tpm_version;
 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+adevc->build_dev_aml = build_tpm_tis_isa_aml;
 }
 
 static const TypeInfo tpm_tis_isa_info = {
@@ -161,6 +192,7 @@ static const TypeInfo tpm_tis_isa_info = {
 .class_init  = tpm_tis_isa_class_init,
 .interfaces = (InterfaceInfo[]) {
 { TYPE_TPM_IF },
+{ TYPE_ACPI_DEV_AML_IF },
 { }
 }
 };
-- 
2.31.1




[PATCH v2] MAINTAINERS: change Ben Widawsky's email address

2022-06-08 Thread Ben Widawsky via
ben.widaw...@intel.com will stop working on 2022-06-20, change it to my
personal email address.

Update .mailmap to handle previously authored commits.

Acked-by: Jonathan Cameron 
Signed-off-by: Ben Widawsky 

---
v2:
  Fix typo in commit message
  change author to b...@bwidawsk.net from @intel.com
  Swap mailmap direction (Jonathan)
---
 .mailmap| 1 +
 MAINTAINERS | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/.mailmap b/.mailmap
index 8c326709cfab..e92e268b9230 100644
--- a/.mailmap
+++ b/.mailmap
@@ -54,6 +54,7 @@ Aleksandar Rikalo  

 Aleksandar Rikalo  
 Alexander Graf  
 Anthony Liguori  Anthony Liguori 
+Ben Widawsky  
 Christian Borntraeger  
 Filip Bozuta  
 Frederic Konrad  
diff --git a/MAINTAINERS b/MAINTAINERS
index 5580a36b68e1..89da5755116b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -2574,7 +2574,7 @@ F: qapi/transaction.json
 T: git https://repo.or.cz/qemu/armbru.git block-next
 
 Compute Express Link
-M: Ben Widawsky 
+M: Ben Widawsky 
 M: Jonathan Cameron 
 S: Supported
 F: hw/cxl/

base-commit: 9b1f58854959c5a9bdb347e3e04c252ab7fc9ef5
-- 
2.36.1




[PATCH v2 25/35] tests: acpi: update expected blobs

2022-06-08 Thread Igor Mammedov
@@ -145,6 +145,23 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC", 
0x0001)
 {
 Name (_ADR, 0x001F)  // _ADR: Address
 OperationRegion (PIRQ, PCI_Config, 0x60, 0x0C)
+Device (SMC)
+{
+Name (_HID, EisaId ("APP0001"))  // _HID: Hardware ID
+Name (_STA, 0x0B)  // _STA: Status
+Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource 
Settings
+{
+IO (Decode16,
+0x0300, // Range Minimum
+0x0300, // Range Maximum
+0x01,   // Alignment
+0x20,   // Length
+)
+IRQNoFlags ()
+{6}
+})
+}
+
 Device (KBD)
 {
 Name (_HID, EisaId ("PNP0303") /* IBM Enhanced Keyboard 
(101/102-key, PS/2 Mouse) */)  // _HID: Hardware ID
@@ -3246,26 +3263,6 @@ DefinitionBlock ("", "DSDT", 1, "BOCHS ", "BXPC", 
0x0001)
 }
 }

-Scope (\_SB.PCI0.ISA)
-{
-Device (SMC)
-{
-Name (_HID, EisaId ("APP0001"))  // _HID: Hardware ID
-Name (_STA, 0x0B)  // _STA: Status
-Name (_CRS, ResourceTemplate ()  // _CRS: Current Resource Settings
-{
-IO (Decode16,
-0x0300, // Range Minimum
-0x0300, // Range Maximum
-0x01,   // Alignment
-0x20,   // Length
-)
-IRQNoFlags ()
-{6}
-})
-}
-}
-
 Scope (\_SB)
 {
 Scope (PCI0)

Signed-off-by: Igor Mammedov 
---
 tests/qtest/bios-tables-test-allowed-diff.h |   1 -
 tests/data/acpi/q35/DSDT.applesmc   | Bin 0 -> 8320 bytes
 2 files changed, 1 deletion(-)

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index e893029d87..dfb8523c8b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,2 +1 @@
 /* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/q35/DSDT.applesmc",
diff --git a/tests/data/acpi/q35/DSDT.applesmc 
b/tests/data/acpi/q35/DSDT.applesmc
index 
e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..00092aacc6ce44dd8792b00a0fa183e5b06d33c6
 100644
GIT binary patch
literal 8320
zcmb7JOKcm*8J^`!tL0K!Qk3OaY{E&)_r?xN%s)PQXYx!=g
zYz~?&&#oL;ra5rMS<)O-ye=~bn=OwO*X9Q6ft$MXI&;0ttD{bOxRYP9oPPUX7rs4v
z`lT-}zf-yQ^MC&0&g)hRfb;lk;_ros4&eu(btW7+za3sTJ|sH7wmMq+?T}vEV}%AEI@
z(>8_5n%VSgJ*m=wHd58!ZTh`7vl%=1F3VE=TMorbFV{L=$?tlDQt`P#(5tYBTEd8$
zw%!jdCmh+I4MR2zv*YnT8!db`++x4mvf01?m)>Xl)}rWJ-dgy0p89g|9ZNBW-c*WD
zQFmy-`+MF}E2s?kAfp3k(HXzh-AGuWW%u`<4B9TP(M`!X%z%ns#mb7jj+JW|EXk5a
z>D)_5+uwWUQq_ymm4hV25jyV0acj9@ge+u+(J-#DYxsLE!C8;B*EbJYi%S~Iw9@Bj
z0Q-CA*Zkh99JrKt9OC}O6?lK%O}?8n&2zgv^Lcl@eaJ}zjlrJ5xu3kBWac@Ca~|*Z
zq~gj!Hom<)b;Kf!z&U1M1UvZ$Be?6kLC?tEvn>;Mjsh1WyII1)EA@AS+C@x~zuOk>
zYnB4HTCQEhg=(kWHL?eSMuA)HY_>~&%X_8NH>zvyC02agcWW0D{YNPpkE0zzMDH2b
z8Rh8zfSUJN@repJvrv>PqC*&C!=jh*y`a4?T8n4S!Snz4Pw?#f?ax-eX`lG3+m0yL
z8@~!ij}C9J(TU-8D}f2}A%DzlJk?{ipHCXM=)mr-jFyKtthuO=POu!?io)AljO}lk
ze#@=1qCLQ0Bif#Sf?yOluD
zkUC}$!hCVIoMNzRl#
zNHStdXi_i%FS`?h={^XF>BZQS8uO&aJgGAgs?1Xw^OVLs
zr85z#%+nh4w8lKGGZCuHM>OUm8uJmIiBM&p;Y{f=XE;;7G*E$!BdVzysDK_CC_?mzV_~2I8%ME54kZH>P#LN^VW1){
zXTm@gC>bb1>562a2&GOKsK9b23{-)VfeI+ENd}5g>V$y`EN8+%6(|{~fN~}oC_`0?L_Wpa`W-7^uKf}LawZulLa7r5DzKah16818paRO7WS|J8P8g`bawZH^
zfs%m=C})y^B9uB|paRR8Fi-_b1}dPONd}5g>V$y`EN8+%6(|{~fN~}oC_Az;Y%GRDqI#3Mglifg+STVW0xbnJ`cVN(L&RoJj_XQ0jz%
zB2o+#k!qj_RRcw+7^uR8fhtTgP=!ebsxV=o3KIsZFv&m_CK;&0gn=qd7^uP|167!0
zpb8TPsxV=o3X=>}VUmF=Oc*F4d3Rx;h;YaFV3L6%#BGovG3D68KoQBYg@GcHV@n2#
zP>wAbC_=0xogBbI*~lL9e^&SDAJV%S`cvuO`sve2`Y)9hMrbj_@VgroIPON34lW%$
zlVNFQqeka-IyC6eG>c2E4Xg%?=0C7@cd!OCzi(xW&$Kq&?mPh9a(=_a-Yc6rMpEmtuh+%At-20=G4?(D>Upz_onSFcV~$KuKN
zu3lBDS9$d+`lnW}7H3zl_V?PPU97ZWH89q0B_5)@tCV+nd3U0`dqjCRF7HieC8p_HH%LAVknC@a3R&Oh2_>{*Vn%8l<$!Tom^>p~wm`W$wW~Q5(mjyi?K0v0@iME;P
zrsf%zfN7pdVfZSUN+;T8rkk2KMLiupRi@I3wwdXs=E1U_4&N_R=|tPibW_juF+CkV
zYNpbOwwdXsp3@aQ9lms?(up=bopb8JdiLI8(5_-92D>hH5*q@}`io-oqG?@uIw>~}
z{BA9fPpO5;32(}|{${E9<~z|FH-A}r>$SJvy!qDlYj3l@;reTr;-@udSqp2$^()+FA*4
zuhJ`Ft+~}{nGvH#JoOi@a6Rad=wz2drF*k5K<`FVXw^O@ZNQ@)49U0fY^a{gkM#Qc~Mi{ZJFW2nf3`67dZ8U|^_GC#e
zc(M^UWwi47WGimV_E)3%;g&T{jU3(gX!|zxaf{vDLa**VKYDfw#-9w_
zzHKWRO$`h#f_HP9_8n^}vGGU=ud;2r|Ot(7wDPB{KpT|1JAX&Pfs^yK)ce*XDyRqwSm4v
ziwoFO?PW;}+qr(DcnXuJ;nxPW@_81|c$!G`OgZZ*y2K}bJg3UfvEomFU1c;7hwlfm
zW2H3sZin|&LpbeaF;n@b5Z_9@n6>_VJI4}OBEWA<2kaQ$x9{7AiFO0;B>cX`<@@$w
zoWmXxWB=uQu>3lG7LUjDSxmnK({^V~Y-9aVTw#CEuH3`6?RVnJy%+C1fgRmAn`ooa
zqCGGSoc5!bHYwc{21jgS^9|w(21mRasa<&|Y8$Eiomk40G6vu2yqNNvepd`J?J_?|
zf

[PATCH untested] tests/tcg: disable xtensa-linux-user again

2022-06-08 Thread Paolo Bonzini
The move from tests/tcg/configure.sh started enabling the container image
for xtensa-linux-user, which fails because the compiler does not have
the full set of headers.  The cause is the "xtensa*-softmmu)" case
in tests/tcg/configure.sh which became just "xtensa*)" in the new
probe_target_compiler shell function.  Look out for xtensa*-linux-user
and do not configure it.

Reported-by: Alex Bennée 
Signed-off-by: Paolo Bonzini 
---
 configure | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/configure b/configure
index 7d021a4014..e9822ff56c 100755
--- a/configure
+++ b/configure
@@ -1923,7 +1923,6 @@ probe_target_compiler() {
 container_cross_prefix=x86_64-linux-gnu-
 ;;
   xtensa*)
-# FIXME: xtensa-linux-user?
 container_hosts=x86_64
 container_image=debian-xtensa-cross
 
@@ -2352,6 +2351,10 @@ for target in $target_list; do
   probe_target_compiler ${arch}
 
   case $target in
+xtensa*-linux-user)
+  # the toolchain is not complete with headers, only build softmmu tests
+  continue
+  ;;
 *-softmmu)
   test -f $source_path/tests/tcg/$arch/Makefile.softmmu-target || continue
   qemu="qemu-system-$arch"
-- 
2.36.1




Re: [PATCH] edk2: Use TPM2_ENABLE and TPM2_CONFIG_ENABLE for newer edk2

2022-06-08 Thread Marc-André Lureau
Hi

On Wed, Jun 8, 2022 at 3:33 PM Stefan Berger  wrote:
>
> Recent changes to edk2 switched the x86_64 build from using TPM_ENABLE

You can quote the relevant change: commit 4de8d61bcec ("OvmfPkg:
rework TPM configuration")

> to TPM2_ENABLE and TPM1_ENABLE to be similar to the ARM build. Adapt
> the QEMU edk2 Makefile to build with TPM2_ENABLE. QEMU v7.0.0 had lost
> the TPM 2 support in edk2 and this restores it.
>
> Signed-off-by: Stefan Berger 

Reviewed-by: Marc-André Lureau 

> ---
>  roms/Makefile.edk2 | 12 
>  1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/roms/Makefile.edk2 b/roms/Makefile.edk2
> index 485f2244b1..a6eb14f215 100644
> --- a/roms/Makefile.edk2
> +++ b/roms/Makefile.edk2
> @@ -101,8 +101,7 @@ submodules:
> -D NETWORK_IP6_ENABLE \
> -D NETWORK_HTTP_BOOT_ENABLE \
> -D NETWORK_TLS_ENABLE \
> -   -D TPM_ENABLE \
> -   -D TPM_CONFIG_ENABLE
> +   -D TPM2_ENABLE
> cp edk2/Build/OvmfIa32/$(target)_$(call 
> toolchain,i386)/FV/OVMF_CODE.fd $@
>
>  ../pc-bios/edk2-i386-secure-code.fd: submodules
> @@ -113,8 +112,7 @@ submodules:
> -D NETWORK_IP6_ENABLE \
> -D NETWORK_HTTP_BOOT_ENABLE \
> -D NETWORK_TLS_ENABLE \
> -   -D TPM_ENABLE \
> -   -D TPM_CONFIG_ENABLE \
> +   -D TPM2_ENABLE \
> -D SECURE_BOOT_ENABLE \
> -D SMM_REQUIRE
> cp edk2/Build/OvmfIa32/$(target)_$(call 
> toolchain,i386)/FV/OVMF_CODE.fd $@
> @@ -127,8 +125,7 @@ submodules:
> -D NETWORK_IP6_ENABLE \
> -D NETWORK_HTTP_BOOT_ENABLE \
> -D NETWORK_TLS_ENABLE \
> -   -D TPM_ENABLE \
> -   -D TPM_CONFIG_ENABLE
> +   -D TPM2_ENABLE
> cp edk2/Build/OvmfX64/$(target)_$(call 
> toolchain,x86_64)/FV/OVMF_CODE.fd $@
>
>  ../pc-bios/edk2-x86_64-secure-code.fd: submodules
> @@ -140,8 +137,7 @@ submodules:
> -D NETWORK_IP6_ENABLE \
> -D NETWORK_HTTP_BOOT_ENABLE \
> -D NETWORK_TLS_ENABLE \
> -   -D TPM_ENABLE \
> -   -D TPM_CONFIG_ENABLE \
> +   -D TPM2_ENABLE \
> -D SECURE_BOOT_ENABLE \
> -D SMM_REQUIRE
> cp edk2/Build/Ovmf3264/$(target)_$(call 
> toolchain,x86_64)/FV/OVMF_CODE.fd $@
> --
> 2.35.3
>




Re: [PATCH v5 02/10] kvm: Support for querying fd-based stats

2022-06-08 Thread Paolo Bonzini

On 6/7/22 19:44, Dr. David Alan Gilbert wrote:


+return NULL;
+}
+descriptors->kvm_stats_header = kvm_stats_header;
+descriptors->kvm_stats_desc = kvm_stats_desc;
+descriptors->ident = g_strdup(ident);


There's something that confuses me here; you check your set of
descriptors above to find any with the matching ident, and if you've
already got it you return it; OK.  Now, if you don't match then you
read some stats and store it with that ident - but I don't see
when you read the stats from the fd, what makes it read the stats that
correspond to 'ident' ?


If you mean why not some other source, each source has a different file 
descriptor:


+int stats_fd = kvm_vcpu_ioctl(cpu, KVM_GET_STATS_FD, NULL);

but the descriptors are consistent every time KVM_GET_STATS_FD is 
called, so basically "ident" can be used as a cache key.


If you mean how does it access the right stat, here it uses the offset
field in the descriptor

ret = pread(stats_fd, stats_data, size_data, 
kvm_stats_header->data_offset);

...
for (i = 0; i < kvm_stats_header->num_desc; ++i) {
uint64_t *stats;
pdesc = (void *)kvm_stats_desc + i * size_desc;

/* Add entry to the list */
stats = (void *)stats_data + pdesc->offset;

Paolo



Re: [PATCH] configure: ignore --make

2022-06-08 Thread Matheus Kowalczuk Ferst
On 07/06/2022 07:49, Paolo Bonzini wrote:
> Setting the MAKE variable to a GNU Make executable does not really have
> any effect: if a non-GNU Make is used, the QEMU Makefile will fail to
> parse.  Just remove everything related to --make and $make as dead code.
> 
> Signed-off-by: Paolo Bonzini 
> ---

Hi Paolo,

On a clean build on FreeBSD with this patch, I got:

../meson.build:3641:0: ERROR: Key MAKE is not in dict

So it seems that we need to remove the use of MAKE in meson.build too.

>   configure | 16 +---
>   1 file changed, 1 insertion(+), 15 deletions(-)
> 
> diff --git a/configure b/configure
> index ce81419629..154e041b8e 100755
> --- a/configure
> +++ b/configure
> @@ -493,20 +493,16 @@ gnu/kfreebsd)
>   ;;
>   freebsd)
> bsd="yes"
> -  make="${MAKE-gmake}"
> # needed for kinfo_getvmmap(3) in libutil.h
>   ;;
>   dragonfly)
> bsd="yes"
> -  make="${MAKE-gmake}"
>   ;;
>   netbsd)
> bsd="yes"
> -  make="${MAKE-gmake}"
>   ;;
>   openbsd)
> bsd="yes"
> -  make="${MAKE-gmake}"
>   ;;
>   darwin)
> bsd="yes"
> @@ -517,7 +513,6 @@ darwin)
>   ;;
>   sunos)
> solaris="yes"
> -  make="${MAKE-gmake}"
>   # needed for CMSG_ macros in sys/socket.h
> QEMU_CFLAGS="-D_XOPEN_SOURCE=600 $QEMU_CFLAGS"
>   # needed for TIOCWIN* defines in termios.h
> @@ -628,8 +623,6 @@ case "$cpu" in
>   CPU_CFLAGS="-m64 -mcpu=ultrasparc" ;;
>   esac
> 
> -: ${make=${MAKE-make}}
> -
>   # We prefer python 3.x. A bare 'python' is traditionally
>   # python 2.x, but some distros have it as python 3.x, so
>   # we check that too
> @@ -709,7 +702,7 @@ for opt do
> ;;
> --objcc=*) objcc="$optarg"
> ;;
> -  --make=*) make="$optarg"
> +  --make=*)
> ;;
> --install=*)
> ;;
> @@ -1024,7 +1017,6 @@ Advanced options (experts only):
> --cross-cc-ARCH=CC   use compiler when building ARCH guest test cases
> --cross-cc-cflags-ARCH=  use compiler flags when building ARCH guest tests
> --cross-prefix-ARCH=PREFIX cross compiler prefix when building ARCH guest 
> test cases
> -  --make=MAKE  use specified make [$make]
> --python=PYTHON  use specified python [$python]
> --meson=MESONuse specified meson [$meson]
> --ninja=NINJAuse specified ninja [$ninja]
> @@ -1079,10 +1071,6 @@ if test -z "$python"
>   then
>   error_exit "Python not found. Use --python=/path/to/python"
>   fi
> -if ! has "$make"
> -then
> -error_exit "GNU make ($make) not found"
> -fi

Also, we will not have this error at configure-time anymore, but I 
suppose that *BSD users will identify the problem if they try to build 
with non-gnu make.

> 
>   # Note that if the Python conditional here evaluates True we will exit
>   # with status 1 which is a shell 'false' value.
> @@ -2409,7 +2397,6 @@ if test "$container" != no; then
>   echo "ENGINE=$container" >> $config_host_mak
>   fi
>   echo "ROMS=$roms" >> $config_host_mak
> -echo "MAKE=$make" >> $config_host_mak
>   echo "PYTHON=$python" >> $config_host_mak
>   echo "GENISOIMAGE=$genisoimage" >> $config_host_mak
>   echo "MESON=$meson" >> $config_host_mak
> @@ -2740,7 +2727,6 @@ preserve_env CXXFLAGS
>   preserve_env LD
>   preserve_env LDFLAGS
>   preserve_env LD_LIBRARY_PATH
> -preserve_env MAKE
>   preserve_env NM
>   preserve_env OBJCFLAGS
>   preserve_env OBJCOPY
> --
> 2.36.1
> 
> 

-- 
Matheus K. Ferst
Instituto de Pesquisas ELDORADO 
Analista de Software
Aviso Legal - Disclaimer 

Re: [PULL v1 0/2] Merge tpm 2022/06/07 v1

2022-06-08 Thread Richard Henderson

On 6/7/22 18:00, Stefan Berger wrote:

Hi!

The patches in this PR resolve several Coverity issues and mark a memory
region with TPM response data as dirty so that it does not get lost during
migration.

Stefan


Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/7.1 as 
appropriate.


r~




The following changes since commit 7077fcb9b68f058809c9dd9fd1dacae1881e886c:

   Merge tag 'vmbus-maint-20220530' of https://github.com/maciejsszmigiero/qemu 
into staging (2022-05-30 12:40:36 -0700)

are available in the Git repository at:

   https://github.com/stefanberger/qemu-tpm.git tags/pull-tpm-2022-06-07-1

for you to fetch changes up to e37a0ef4605e5d2041785ff3fc89ca6021faf7a0:

   tpm_crb: mark command buffer as dirty on request completion (2022-06-07 
20:37:25 -0400)

Anthony PERARD (1):
   tpm_crb: mark command buffer as dirty on request completion

Peter Maydell (1):
   hw/tpm/tpm_tis_common.c: Assert that locty is in range

  hw/tpm/tpm_crb.c| 1 +
  hw/tpm/tpm_tis_common.c | 7 ++-
  2 files changed, 7 insertions(+), 1 deletion(-)






Re: [PATCH v5 06/10] hmp: add basic "info stats" implementation

2022-06-08 Thread Paolo Bonzini

On 6/7/22 20:35, Dr. David Alan Gilbert wrote:

+monitor_printf(mon, "%s", iec_binary_prefix(value->exponent));

OK that's better; but it's a shame the limits don't come from something
shared; iec_binary_prefix goes upto 60 and si_prefix goes way below -9

Reviewed-by: Dr. David Alan Gilbert



I can remove the limits altogether, and consider it a bug of the 
provider if they're not respected, but it's a bit ugly to have an 
assertion failure in that case.


Paolo



Re: [PATCH v5 02/10] kvm: Support for querying fd-based stats

2022-06-08 Thread Dr. David Alan Gilbert
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> On 6/7/22 19:44, Dr. David Alan Gilbert wrote:
> 
> > > +return NULL;
> > > +}
> > > +descriptors->kvm_stats_header = kvm_stats_header;
> > > +descriptors->kvm_stats_desc = kvm_stats_desc;
> > > +descriptors->ident = g_strdup(ident);
> > 
> > There's something that confuses me here; you check your set of
> > descriptors above to find any with the matching ident, and if you've
> > already got it you return it; OK.  Now, if you don't match then you
> > read some stats and store it with that ident - but I don't see
> > when you read the stats from the fd, what makes it read the stats that
> > correspond to 'ident' ?
> 
> If you mean why not some other source, each source has a different file
> descriptor:
> 
> +int stats_fd = kvm_vcpu_ioctl(cpu, KVM_GET_STATS_FD, NULL);
> 
> but the descriptors are consistent every time KVM_GET_STATS_FD is called, so
> basically "ident" can be used as a cache key.

Ah OK, this is what I was after; it's a little weird that the caller
does the ioctl to get the stats-fd, but it does the lookup internally
with current_cpu for the ident.

Some comments would help!

Dave

> If you mean how does it access the right stat, here it uses the offset
> field in the descriptor
> 
> ret = pread(stats_fd, stats_data, size_data,
> kvm_stats_header->data_offset);
> ...
> for (i = 0; i < kvm_stats_header->num_desc; ++i) {
> uint64_t *stats;
> pdesc = (void *)kvm_stats_desc + i * size_desc;
> 
> /* Add entry to the list */
> stats = (void *)stats_data + pdesc->offset;
> 
> Paolo
> 
-- 
Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK




Re: [PATCH v4 0/3] target/m68k: semihosting cleanup

2022-06-08 Thread Richard Henderson

On 6/8/22 02:36, Laurent Vivier wrote:

Le 08/06/2022 à 00:26, Richard Henderson a écrit :

Based-on: <20220607204557.658541-1-richard.hender...@linaro.org>
("[PATCH v4 00/53] semihosting cleanup")

Changes for v4:
   * Split out of v2.
   * Convert host errno to gdb errno, which for m68k is guest errno.



How do you test semihosting on m68k?


I have only compiled this.  I had been working on adding something to tests/tcg/m68k/, 
which is where those halt patches came from, but haven't finished.



r~



[PATCH v3 1/8] hw/cxl: Make the CXL fixed memory window setup a machine parameter.

2022-06-08 Thread Jonathan Cameron via
Paolo Bonzini requested this change to simplify the ongoing
effort to allow machine setup entirely via RPC.

Includes shortening the command line form cxl-fixed-memory-window
to cxl-fmw as the command lines are extremely long even with this
change.

The json change is needed to ensure that there is
a CXLFixedMemoryWindowOptionsList even though the actual
element in the json is never used. Similar to existing
SgxEpcProperties.

Update qemu-options.hx to reflect that this is now a -machine
parameter.  The bulk of -M / -machine parameters are documented
under machine, so use that in preference to M.

Update cxl-test and bios-tables-test to reflect new parameters.

Signed-off-by: Jonathan Cameron 
Reviewed-by: Ben Widawsky 
Reviewed-by: Davidlohr Bueso 
---
 docs/system/devices/cxl.rst |  4 +-
 hw/core/machine.c   | 22 -
 hw/cxl/cxl-host-stubs.c |  6 +--
 hw/cxl/cxl-host.c   | 72 ++--
 hw/i386/pc.c|  3 ++
 hw/pci-bridge/pci_expander_bridge.c |  2 +-
 include/hw/boards.h |  1 +
 include/hw/cxl/cxl.h|  7 +--
 include/hw/cxl/cxl_host.h   | 21 +
 qapi/machine.json   | 13 +
 qemu-options.hx | 73 ++---
 softmmu/vl.c| 44 -
 tests/qtest/bios-tables-test.c  |  4 +-
 tests/qtest/cxl-test.c  |  4 +-
 14 files changed, 150 insertions(+), 126 deletions(-)

diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst
index 9293cbf01a..bcbfe8c490 100644
--- a/docs/system/devices/cxl.rst
+++ b/docs/system/devices/cxl.rst
@@ -251,7 +251,7 @@ A very simple setup with just one directly attached CXL 
Type 3 device::
   -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
   -device cxl-rp,port=0,bus=cxl.1,id=root_port13,chassis=0,slot=2 \
   -device cxl-type3,bus=root_port13,memdev=cxl-mem1,lsa=cxl-lsa1,id=cxl-pmem0 \
-  -cxl-fixed-memory-window targets.0=cxl.1,size=4G
+  -M cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.size=4G
 
 A setup suitable for 4 way interleave. Only one fixed window provided, to 
enable 2 way
 interleave across 2 CXL host bridges.  Each host bridge has 2 CXL Root Ports, 
with
@@ -277,7 +277,7 @@ the CXL Type3 device directly attached (no switches).::
   -device cxl-type3,bus=root_port15,memdev=cxl-mem3,lsa=cxl-lsa3,id=cxl-pmem2 \
   -device cxl-rp,port=1,bus=cxl.2,id=root_port16,chassis=0,slot=6 \
   -device cxl-type3,bus=root_port16,memdev=cxl-mem4,lsa=cxl-lsa4,id=cxl-pmem3 \
-  -cxl-fixed-memory-window 
targets.0=cxl.1,targets.1=cxl.2,size=4G,interleave-granularity=8k
+  -M 
cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.targets.1=cxl.2,cxl-fmw.0.size=4G,cxl-fmw.0.interleave-granularity=8k
 
 Kernel Configuration Options
 
diff --git a/hw/core/machine.c b/hw/core/machine.c
index c53548d0b1..2e589d99e9 100644
--- a/hw/core/machine.c
+++ b/hw/core/machine.c
@@ -629,20 +629,6 @@ static void machine_set_nvdimm_persistence(Object *obj, 
const char *value,
 nvdimms_state->persistence_string = g_strdup(value);
 }
 
-static bool machine_get_cxl(Object *obj, Error **errp)
-{
-MachineState *ms = MACHINE(obj);
-
-return ms->cxl_devices_state->is_enabled;
-}
-
-static void machine_set_cxl(Object *obj, bool value, Error **errp)
-{
-MachineState *ms = MACHINE(obj);
-
-ms->cxl_devices_state->is_enabled = value;
-}
-
 void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type)
 {
 QAPI_LIST_PREPEND(mc->allowed_dynamic_sysbus_devices, g_strdup(type));
@@ -929,8 +915,6 @@ static void machine_class_init(ObjectClass *oc, void *data)
 mc->default_ram_size = 128 * MiB;
 mc->rom_file_has_mr = true;
 
-/* Few machines support CXL, so default to off */
-mc->cxl_supported = false;
 /* numa node memory size aligned on 8MB by default.
  * On Linux, each node's border has to be 8MB aligned
  */
@@ -1092,13 +1076,7 @@ static void machine_initfn(Object *obj)
 }
 
 if (mc->cxl_supported) {
-Object *obj = OBJECT(ms);
-
 ms->cxl_devices_state = g_new0(CXLState, 1);
-object_property_add_bool(obj, "cxl", machine_get_cxl, machine_set_cxl);
-object_property_set_description(obj, "cxl",
-"Set on/off to enable/disable "
-"CXL instantiation");
 }
 
 if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) {
diff --git a/hw/cxl/cxl-host-stubs.c b/hw/cxl/cxl-host-stubs.c
index 24465a52ab..de3e8894d5 100644
--- a/hw/cxl/cxl-host-stubs.c
+++ b/hw/cxl/cxl-host-stubs.c
@@ -6,11 +6,9 @@
 #include "qemu/osdep.h"
 #include "qapi/error.h"
 #include "hw/cxl/cxl.h"
-
-void cxl_fixed_memory_window_config(MachineState *ms,
-CXLFixedMemoryWindowOptions *object,
-Error **errp) {};
+#include "hw/cxl/c

[PATCH v3 0/8] hw/cxl: Move CXL emulation options and state to machines.

2022-06-08 Thread Jonathan Cameron via
Changes since v2: (reviews from Davidlohr and Ben - thanks!)
- Update qemu-options.hx to reflect that cxl-fmw is now a machine
  property. (Davidlohr Bueso)
- Pick up David (patch 1) and Ben's RBs (all).

Changes since v1 (thanks to Paolo Bonzini)
* Update 'description' of cxl-fmw as suggested to mention it's an array.
* Add a wrapper cxl_hook_up_pxb_registers() to cxl-host.c as it'll be common
  for all machines using CXL with PXB.

V1 Cover letter:

Currently the only machine with CXL support upstream is i386/pc but arm/virt
patches have been posted and once this is merged an updated series will
follow. Switch support is queued behind this as well because they both
include documentation updates.

Paolo Bonzini highlighted a couple of issues with the current CXL
emulation code.

* Top level parameter rather than machine for fixed memory windows

  The --cxl-fixed-memory-window top level command line parameters won't play
  well with efforts to make it possible to instantiate entire machines via
  RPC. Better to move these to be machine configuration.  This change is
  relatively straight forward, but does result in very long command lines
  (cannot break fixed window setup into multiple -M entries).

* Move all CXL stuff to machine specific code and helpers

  To simplify the various interactions between machine setup and host
  bridges etc, currently various CXL steps are called from the generic
  core/machine.c and softmmu/vl.c + there are CXL elements in MachineState.

  Much of this is straight forward to do with one exception:
  The CXL pci_expander_bridge host bridges require MMIO register space.
  This series does this by walking the bus and filling the register space
  in via the machine_done callback. This is similar to the walk done for
  identifying host bridges in the ACPI building code but it is rather ugly
  and postpones rejection of PXB_CXL instances where cxl=off (default).

All comments welcome, but the first patch at least changes the command-line
so to avoid have to add backwards compatibility code, it would be great
to merge that before 7.1 is released.

Thanks,

Jonathan

Jonathan Cameron (8):
  hw/cxl: Make the CXL fixed memory window setup a machine parameter.
  hw/acpi/cxl: Pass in the CXLState directly rather than MachineState
  hw/cxl: Push linking of CXL targets into i386/pc rather than in
machine.c
  tests/acpi: Allow modification of q35 CXL CEDT table.
  pci/pci_expander_bridge: For CXL HB delay the HB register memory
region setup.
  tests/acpi: Update q35/CEDT.cxl for new memory addresses.
  hw/cxl: Move the CXLState from MachineState to machine type specific
state.
  hw/machine: Drop cxl_supported flag as no longer useful

 docs/system/devices/cxl.rst |   4 +-
 hw/acpi/cxl.c   |   9 +-
 hw/core/machine.c   |  28 --
 hw/cxl/cxl-host-stubs.c |   9 +-
 hw/cxl/cxl-host.c   | 100 ++--
 hw/i386/acpi-build.c|   8 +-
 hw/i386/pc.c|  31 +++---
 hw/pci-bridge/meson.build   |   5 +-
 hw/pci-bridge/pci_expander_bridge.c |  32 ---
 hw/pci-bridge/pci_expander_bridge_stubs.c   |  14 +++
 include/hw/acpi/cxl.h   |   5 +-
 include/hw/boards.h |   3 +-
 include/hw/cxl/cxl.h|   9 +-
 include/hw/cxl/cxl_host.h   |  23 +
 include/hw/i386/pc.h|   2 +
 include/hw/pci-bridge/pci_expander_bridge.h |  12 +++
 qapi/machine.json   |  13 +++
 qemu-options.hx |  73 +++---
 softmmu/vl.c|  46 -
 tests/data/acpi/q35/CEDT.cxl| Bin 184 -> 184 bytes
 tests/qtest/bios-tables-test.c  |   4 +-
 tests/qtest/cxl-test.c  |   4 +-
 22 files changed, 256 insertions(+), 178 deletions(-)
 create mode 100644 hw/pci-bridge/pci_expander_bridge_stubs.c
 create mode 100644 include/hw/cxl/cxl_host.h
 create mode 100644 include/hw/pci-bridge/pci_expander_bridge.h

-- 
2.32.0




Re: [PATCH untested] tests/tcg: disable xtensa-linux-user again

2022-06-08 Thread Alex Bennée


Paolo Bonzini  writes:

> The move from tests/tcg/configure.sh started enabling the container image
> for xtensa-linux-user, which fails because the compiler does not have
> the full set of headers.  The cause is the "xtensa*-softmmu)" case
> in tests/tcg/configure.sh which became just "xtensa*)" in the new
> probe_target_compiler shell function.  Look out for xtensa*-linux-user
> and do not configure it.
>
> Reported-by: Alex Bennée 
> Signed-off-by: Paolo Bonzini 

Queued to testing/next, thanks.

-- 
Alex Bennée



[PATCH v3 6/8] tests/acpi: Update q35/CEDT.cxl for new memory addresses.

2022-06-08 Thread Jonathan Cameron via
The CEDT table includes addreses of host bridge registers.
There are allocated in a different order due to the previous
patch, so update to the table is needed.

Signed-off-by: Jonathan Cameron 
Reviewed-by: Ben Widawsky 
---
 tests/data/acpi/q35/CEDT.cxl| Bin 184 -> 184 bytes
 tests/qtest/bios-tables-test-allowed-diff.h |   1 -
 2 files changed, 1 deletion(-)

diff --git a/tests/data/acpi/q35/CEDT.cxl b/tests/data/acpi/q35/CEDT.cxl
index 
b8fa06b00e65712e91e0a5ea0d9277e0146d1c00..ff8203af070241bd23dd0eb8a51460692bb7d229
 100644
GIT binary patch
delta 18
acmdnNxPx(m*~Boui7rAD&G;s!ga80Nd

[PATCH v3 8/8] hw/machine: Drop cxl_supported flag as no longer useful

2022-06-08 Thread Jonathan Cameron via
As all the CXL elements have moved to boards that support
CXL, there is no need to maintain a top level flag.

Signed-off-by: Jonathan Cameron 
Reviewed-by: Ben Widawsky 
---
 hw/i386/pc.c| 1 -
 include/hw/boards.h | 1 -
 2 files changed, 2 deletions(-)

diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index a0c0d69698..1b6067ff22 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1804,7 +1804,6 @@ static void pc_machine_class_init(ObjectClass *oc, void 
*data)
 mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;
 mc->nvdimm_supported = true;
 mc->smp_props.dies_supported = true;
-mc->cxl_supported = true;
 mc->default_ram_id = "pc.ram";
 
 object_class_property_add(oc, PC_MACHINE_MAX_RAM_BELOW_4G, "size",
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 031f5f884d..d94edcef28 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -269,7 +269,6 @@ struct MachineClass {
 bool ignore_boot_device_suffixes;
 bool smbus_no_migration_support;
 bool nvdimm_supported;
-bool cxl_supported;
 bool numa_mem_supported;
 bool auto_enable_numa;
 SMPCompatProps smp_props;
-- 
2.32.0




[PATCH v3 2/8] hw/acpi/cxl: Pass in the CXLState directly rather than MachineState

2022-06-08 Thread Jonathan Cameron via
Refactoring step on path to moving all CXL state out of
MachineState.

Signed-off-by: Jonathan Cameron 
Reviewed-by: Ben Widawsky 
---
 hw/acpi/cxl.c | 9 -
 hw/i386/acpi-build.c  | 4 ++--
 include/hw/acpi/cxl.h | 5 +++--
 3 files changed, 9 insertions(+), 9 deletions(-)

diff --git a/hw/acpi/cxl.c b/hw/acpi/cxl.c
index 31d5235136..2bf8c07993 100644
--- a/hw/acpi/cxl.c
+++ b/hw/acpi/cxl.c
@@ -65,9 +65,8 @@ static void cedt_build_chbs(GArray *table_data, PXBDev *cxl)
  * Interleave ways encoding in CXL 2.0 ECN: 3, 6, 12 and 16-way memory
  * interleaving.
  */
-static void cedt_build_cfmws(GArray *table_data, MachineState *ms)
+static void cedt_build_cfmws(GArray *table_data, CXLState *cxls)
 {
-CXLState *cxls = ms->cxl_devices_state;
 GList *it;
 
 for (it = cxls->fixed_windows; it; it = it->next) {
@@ -129,9 +128,9 @@ static int cxl_foreach_pxb_hb(Object *obj, void *opaque)
 return 0;
 }
 
-void cxl_build_cedt(MachineState *ms, GArray *table_offsets, GArray 
*table_data,
+void cxl_build_cedt(GArray *table_offsets, GArray *table_data,
 BIOSLinker *linker, const char *oem_id,
-const char *oem_table_id)
+const char *oem_table_id, CXLState *cxl_state)
 {
 Aml *cedt;
 AcpiTable table = { .sig = "CEDT", .rev = 1, .oem_id = oem_id,
@@ -144,7 +143,7 @@ void cxl_build_cedt(MachineState *ms, GArray 
*table_offsets, GArray *table_data,
 /* reserve space for CEDT header */
 
 object_child_foreach_recursive(object_get_root(), cxl_foreach_pxb_hb, 
cedt);
-cedt_build_cfmws(cedt->buf, ms);
+cedt_build_cfmws(cedt->buf, cxl_state);
 
 /* copy AML table into ACPI tables blob and patch header there */
 g_array_append_vals(table_data, cedt->buf->data, cedt->buf->len);
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index c125939ed6..2e3b1dd9a2 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2712,8 +2712,8 @@ void acpi_build(AcpiBuildTables *tables, MachineState 
*machine)
   x86ms->oem_id, x86ms->oem_table_id);
 }
 if (machine->cxl_devices_state->is_enabled) {
-cxl_build_cedt(machine, table_offsets, tables_blob, tables->linker,
-   x86ms->oem_id, x86ms->oem_table_id);
+cxl_build_cedt(table_offsets, tables_blob, tables->linker,
+   x86ms->oem_id, x86ms->oem_table_id, 
machine->cxl_devices_state);
 }
 
 acpi_add_table(table_offsets, tables_blob);
diff --git a/include/hw/acpi/cxl.h b/include/hw/acpi/cxl.h
index 0c496538c0..acf4418886 100644
--- a/include/hw/acpi/cxl.h
+++ b/include/hw/acpi/cxl.h
@@ -19,10 +19,11 @@
 #define HW_ACPI_CXL_H
 
 #include "hw/acpi/bios-linker-loader.h"
+#include "hw/cxl/cxl.h"
 
-void cxl_build_cedt(MachineState *ms, GArray *table_offsets, GArray 
*table_data,
+void cxl_build_cedt(GArray *table_offsets, GArray *table_data,
 BIOSLinker *linker, const char *oem_id,
-const char *oem_table_id);
+const char *oem_table_id, CXLState *cxl_state);
 void build_cxl_osc_method(Aml *dev);
 
 #endif
-- 
2.32.0




[PATCH v3 4/8] tests/acpi: Allow modification of q35 CXL CEDT table.

2022-06-08 Thread Jonathan Cameron via
Needed to allow memory address changes as a result of next patch.

Signed-off-by: Jonathan Cameron 
Reviewed-by: Ben Widawsky 
---
 tests/qtest/bios-tables-test-allowed-diff.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/qtest/bios-tables-test-allowed-diff.h 
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..effa58b75b 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,2 @@
 /* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/q35/CEDT.cxl",
-- 
2.32.0




  1   2   3   >