Re: [PATCH v3 0/4] modify CPU model info

[no-reply]

Patchew URL: 
https://patchew.org/QEMU/20200410063555.2309-1-chenyi.qi...@intel.com/



Hi,

This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.

=== TEST SCRIPT BEGIN ===
#!/bin/bash
export ARCH=x86_64
make docker-image-fedora V=1 NETWORK=1
time make docker-test-debug@fedora TARGET_LIST=x86_64-softmmu J=14 NETWORK=1
=== TEST SCRIPT END ===

PASS 1 fdc-test /x86_64/fdc/cmos
PASS 2 fdc-test /x86_64/fdc/no_media_on_start
PASS 3 fdc-test /x86_64/fdc/read_without_media
==6579==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
PASS 4 fdc-test /x86_64/fdc/media_change
PASS 5 fdc-test /x86_64/fdc/sense_interrupt
PASS 6 fdc-test /x86_64/fdc/relative_seek
---
PASS 32 test-opts-visitor /visitor/opts/range/beyond
PASS 33 test-opts-visitor /visitor/opts/dict/unvisited
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  
tests/test-coroutine -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl 
--test-name="test-coroutine" 
==6598==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
==6598==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 
0x7ffe8a7c7000; bottom 0x7fbe30f82000; size: 0x004059845000 (276379750400)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 1 test-coroutine /basic/no-dangling-access
---
PASS 12 test-aio /aio/event/flush
PASS 13 test-aio /aio/event/wait/no-flush-cb
PASS 14 test-aio /aio/timer/schedule
==6613==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
PASS 15 test-aio /aio/coroutine/queue-chaining
PASS 16 test-aio /aio-gsource/flush
PASS 17 test-aio /aio-gsource/bh/schedule
---
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  
tests/test-aio-multithread -m=quick -k --tap < /dev/null | 
./scripts/tap-driver.pl --test-name="test-aio-multithread" 
PASS 13 fdc-test /x86_64/fdc/fuzz-registers
PASS 1 test-aio-multithread /aio/multi/lifecycle
==6618==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  
QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img 
tests/qtest/ide-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl 
--test-name="ide-test" 
==6635==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
PASS 2 test-aio-multithread /aio/multi/schedule
PASS 1 ide-test /x86_64/ide/identify
==6646==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
PASS 2 ide-test /x86_64/ide/flush
PASS 3 test-aio-multithread /aio/multi/mutex/contended
==6652==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
PASS 3 ide-test /x86_64/ide/bmdma/simple_rw
==6663==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
PASS 4 ide-test /x86_64/ide/bmdma/trim
==6669==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
PASS 4 test-aio-multithread /aio/multi/mutex/handoff
PASS 5 test-aio-multithread /aio/multi/mutex/mcs
PASS 6 test-aio-multithread /aio/multi/mutex/pthread
---
PASS 6 test-throttle /throttle/detach_attach
PASS 7 test-throttle /throttle/config_functions
PASS 8 test-throttle /throttle/accounting
==6686==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
PASS 9 test-throttle /throttle/groups
PASS 10 test-throttle /throttle/config/enabled
PASS 11 test-throttle /throttle/config/conflicting
---
PASS 14 test-throttle /throttle/config/max
PASS 15 test-throttle /throttle/config/iops_size
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  
tests/test-thread-pool -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl 
--test-name="test-thread-pool" 
==6690==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
PASS 1 test-thread-pool /thread-pool/submit
PASS 2 test-thread-pool /thread-pool/submit-aio
PASS 3 test-thread-pool /thread-pool/submit-co
PASS 4 test-thread-pool /thread-pool/submit-many
PASS 5 test-thread-pool /thread-pool/cancel
==6757==WARNING: ASan doesn't fully support makecontext/swapcontext functions 
and may produce false positives in some cases!
PASS 6 test-thread-pool /thread-pool/cancel-async
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  
tests/test-hbitmap -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl 
--test-name="test-h

Re: [PATCH v6 16/36] multi-process: remote process initialization

[Elena Ufimtseva]

On Thu, Apr 09, 2020 at 07:00:02PM +0100, Dr. David Alan Gilbert wrote:
> * elena.ufimts...@oracle.com (elena.ufimts...@oracle.com) wrote:
> > From: Jagannathan Raman 
> > 
> > Adds the handler to process message from QEMU,
> > Initialize remote process main loop, handles SYNC_SYSMEM
> > message by updating its "system_memory" container using
> > shared file descriptors received from QEMU.
> > 
> > Signed-off-by: John G Johnson 
> > Signed-off-by: Elena Ufimtseva 
> > Signed-off-by: Jagannathan Raman 
> > ---
> >  remote/remote-main.c | 87 
> >  1 file changed, 87 insertions(+)
> > 
> > diff --git a/remote/remote-main.c b/remote/remote-main.c
> > index ecf30e0cba..51595f3141 100644
> > --- a/remote/remote-main.c
> > +++ b/remote/remote-main.c
> > @@ -12,6 +12,7 @@
> >  #include "qemu-common.h"
> >  
> >  #include 
> > +#include 
> >  
> >  #include "qemu/module.h"
> >  #include "remote/pcihost.h"
> > @@ -19,12 +20,98 @@
> >  #include "hw/boards.h"
> >  #include "hw/qdev-core.h"
> >  #include "qemu/main-loop.h"
> > +#include "remote/memory.h"
> > +#include "io/mpqemu-link.h"
> > +#include "qapi/error.h"
> > +#include "qemu/main-loop.h"
> > +#include "sysemu/cpus.h"
> > +#include "qemu-common.h"
> > +#include "hw/pci/pci.h"
> > +#include "qemu/thread.h"
> > +#include "qemu/main-loop.h"
> > +#include "qemu/config-file.h"
> > +#include "sysemu/sysemu.h"
> > +#include "block/block.h"
> > +#include "exec/ramlist.h"
> > +
> > +static MPQemuLinkState *mpqemu_link;
> > +
> > +static void process_msg(GIOCondition cond, MPQemuLinkState *link,
> > +MPQemuChannel *chan)
> > +{
> > +MPQemuMsg *msg = NULL;
> > +Error *err = NULL;
> > +
> > +if ((cond & G_IO_HUP) || (cond & G_IO_ERR)) {
> > +goto finalize_loop;
> > +}
> > +
> > +msg = g_malloc0(sizeof(MPQemuMsg));
> > +
> > +if (mpqemu_msg_recv(msg, chan) < 0) {
> > +error_setg(&err, "Failed to receive message");
> > +goto finalize_loop;
> > +}
> > +
> > +switch (msg->cmd) {
> > +case INIT:
> > +break;
> > +default:
> > +error_setg(&err, "Unknown command");
> 
> Again this doesn't seem to have changed since my 4th March review where
> I asked for better error messages.
>

Hi Dave

Apologies, we have omitted it (and other patches you have commented on).
We will re-send the series with these addressed shortly plus the test build 
error fix.

Elena
> Dave
> 
> > +goto finalize_loop;
> > +}
> > +
> > +g_free(msg->data2);
> > +g_free(msg);
> > +
> > +return;
> > +
> > +finalize_loop:
> > +if (err) {
> > +error_report_err(err);
> > +}
> > +g_free(msg);
> > +mpqemu_link_finalize(mpqemu_link);
> > +mpqemu_link = NULL;
> > +}
> >  
> >  int main(int argc, char *argv[])
> >  {
> > +Error *err = NULL;
> > +
> >  module_call_init(MODULE_INIT_QOM);
> >  
> > +bdrv_init_with_whitelist();
> > +
> > +if (qemu_init_main_loop(&err)) {
> > +error_report_err(err);
> > +return -EBUSY;
> > +}
> > +
> > +qemu_init_cpu_loop();
> > +
> > +page_size_init();
> > +
> > +qemu_mutex_init(&ram_list.mutex);
> > +
> >  current_machine = 
> > MACHINE(REMOTE_MACHINE(object_new(TYPE_REMOTE_MACHINE)));
> >  
> > +mpqemu_link = mpqemu_link_create();
> > +if (!mpqemu_link) {
> > +printf("Could not create MPQemu link\n");
> > +return -1;
> > +}
> > +
> > +mpqemu_init_channel(mpqemu_link, &mpqemu_link->com, STDIN_FILENO);
> > +
> > +mpqemu_link_set_callback(mpqemu_link, process_msg);
> > +
> > +qdev_machine_creation_done();
> > +qemu_mutex_lock_iothread();
> > +qemu_run_machine_init_done_notifiers();
> > +qemu_mutex_unlock_iothread();
> > +
> > +mpqemu_start_coms(mpqemu_link, mpqemu_link->com);
> > +
> >  return 0;
> >  }
> > -- 
> > 2.25.GIT
> > 
> --
> Dr. David Alan Gilbert / dgilb...@redhat.com / Manchester, UK
> 

Re: [PATCH v4 06/30] qcow2: Add get_l2_entry() and set_l2_entry()

[Vladimir Sementsov-Ogievskiy]

17.03.2020 21:16, Alberto Garcia wrote:

The size of an L2 entry is 64 bits, but if we want to have subclusters
we need extended L2 entries. This means that we have to access L2
tables and slices differently depending on whether an image has
extended L2 entries or not.

This patch replaces all l2_slice[] accesses with calls to
get_l2_entry() and set_l2_entry().


and it replaces some l2_table[] as well.

I found one not-updated case, in qcow2-refcount.c:

   ret = bdrv_pwrite_sync(bs->file, l2e_offset,
  &l2_table[i], sizeof(uint64_t));

But on the other hand, if l2_table will be enhanced somehow, this should
be updated other way, as we don't get l2_entry, but write it...

Also, I don't quite like the naming: you'll update in further patch the 
interface

to be [gs]et_l2_entry and [gs]et_l2_bitmap..

But get_l2_entry, don't return the whole entry, only one half of it, same for 
set_l2_entry...

May be, good to make a comment above [gs]et_l2_entry definitions.

anyway,
Reviewed-by: Vladimir Sementsov-Ogievskiy 


--
Best regards,
Vladimir

Re: [PATCH] Fixed IPv6 payload lenght without jumbo option

[Andrew Melnichenko]

Ok, later - I'll prepare a new patch with length fix, segmentation and
checks.
For now, the current patch can be discarded.

On Fri, Apr 10, 2020 at 5:28 AM Jason Wang  wrote:

>
> On 2020/4/9 下午9:35, Andrew Melnichenko wrote:
> > > Do we support ipv6 segmentation then?
> > No, but - if the backend supports big frames there is an issue that
> > IPv6 plen doesn't have valid value.
> > Actually, It's a good idea to add IPv6 fragmentation - I would do it
> > later.
>
>
> Right, another question.
>
> E.g for virtio-net, we will do the following check:
>
>  if (!peer_has_vnet_hdr(n)) {
>  virtio_clear_feature(&features, VIRTIO_NET_F_CSUM);
>  virtio_clear_feature(&features, VIRTIO_NET_F_HOST_TSO4);
>  virtio_clear_feature(&features, VIRTIO_NET_F_HOST_TSO6);
>  virtio_clear_feature(&features, VIRTIO_NET_F_HOST_ECN);
>
>  virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_CSUM);
>  virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_TSO4);
>  virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_TSO6);
>  virtio_clear_feature(&features, VIRTIO_NET_F_GUEST_ECN);
>  }
>
> I think we should do something similar in e1000e. But I can only see
> disable_vnet parameter but not a checking of the ability of its peer.
>
> 1) when peer has vnet hdr, it supports receiving GSO packets, we don't
> need software segmentation.
> 2) when peer does not have vnet hdr, we need to use software path
> segmentation.
>
> This means we need:
>
> 1) check peer_has_vnet_hdr() and disable_vnet in net_pkt_send() before
> calling net_tx_pkt_sendv() and fallback to software segmentation
> 2) fix the ipv6 payload len
> 3) add the ipv6 software segmentation support
>
> It would be better if we can fix all of these issue in one series.
>
> Thanks
>
>
> >
> >
> > On Thu, Apr 9, 2020 at 6:15 AM Jason Wang  > > wrote:
> >
> >
> > On 2020/4/6 上午3:19, and...@daynix.com 
> > wrote:
> > > From: Andrew Melnychenko  > >
> > >
> > > Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1708065
> > > e1000e driver doesn't sets 'plen' field for IPv6 for big packets
> > > if TSO is enabled. Jumbo option isn't added yet, until
> > > qemu supports packets greater than 64K.
> > >
> > > Signed-off-by: Andrew Melnychenko  > >
> > > ---
> > >   hw/net/e1000e_core.c |  1 +
> > >   hw/net/net_tx_pkt.c  | 31 +++
> > >   hw/net/net_tx_pkt.h  |  7 +++
> > >   include/net/eth.h|  1 +
> > >   4 files changed, 40 insertions(+)
> > >
> > > diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c
> > > index d5676871fa..a1ec55598b 100644
> > > --- a/hw/net/e1000e_core.c
> > > +++ b/hw/net/e1000e_core.c
> > > @@ -656,6 +656,7 @@ e1000e_tx_pkt_send(E1000ECore *core, struct
> > e1000e_tx *tx, int queue_index)
> > >   NetClientState *queue = qemu_get_subqueue(core->owner_nic,
> > target_queue);
> > >
> > >   e1000e_setup_tx_offloads(core, tx);
> > > +net_tx_pkt_fix_ip6_payload_len(tx->tx_pkt);
> >
> >
> > A question here:
> >
> > I don't see any code that set ip6_plen during
> > net_tx_pkt_do_sw_fragmentation(). This is described in 7.3.6.2.1 and
> > 7.3.6.2.2 in the datasheet.
> >
> > And:
> >
> > 1) eth_setup_ip4_fragmentation() only deal with ipv4
> >
> > 2) eth_fix_ip4_checksum() assumes a ipv4 header
> >
> > Do we support ipv6 segmentation then?
> >
> > Thanks
> >
> >
> > >
> > >   net_tx_pkt_dump(tx->tx_pkt);
> > >
> > > diff --git a/hw/net/net_tx_pkt.c b/hw/net/net_tx_pkt.c
> > > index 162f802dd7..b05d554ac3 100644
> > > --- a/hw/net/net_tx_pkt.c
> > > +++ b/hw/net/net_tx_pkt.c
> > > @@ -635,3 +635,34 @@ bool net_tx_pkt_send_loopback(struct
> > NetTxPkt *pkt, NetClientState *nc)
> > >
> > >   return res;
> > >   }
> > > +
> > > +void net_tx_pkt_fix_ip6_payload_len(struct NetTxPkt *pkt)
> > > +{
> > > +/*
> > > + * If ipv6 payload length field is 0 - then there should be
> > Hop-by-Hop
> > > + * option for packets greater than 65,535.
> > > + * For packets with payload less than 65,535: fix 'plen'
> field.
> > > + * For now, qemu drops every packet with size greater 64K
> > > + * (see net_tx_pkt_send()) so, there is no reason to add
> > jumbo option to ip6
> > > + * hop-by-hop extension if it's missed
> > > + */
> > > +
> > > +struct iovec *l2 = &pkt->vec[NET_TX_PKT_L2HDR_FRAG];
> > > +if (eth_get_l3_proto(l2, 1, l2->iov_len) == ETH_P_IPV6) {
> > > +struct ip6_header *ip6 = (struct ip6_header *)
> pkt->l3_hdr;
> > > +/*
> > > + * TODO: if qemu would support >64K packets - add jumbo
> > option check
> > 

Re: [PATCH v4 08/30] qcow2: Add dummy has_subclusters() function

[Vladimir Sementsov-Ogievskiy]

17.03.2020 21:16, Alberto Garcia wrote:

This function will be used by the qcow2 code to check if an image has
subclusters or not.

At the moment this simply returns false. Once all patches needed for
subcluster support are ready then QEMU will be able to create and
read images with subclusters and this function will return the actual
value.

Signed-off-by: Alberto Garcia
Reviewed-by: Eric Blake
Reviewed-by: Max Reitz


Reviewed-by: Vladimir Sementsov-Ogievskiy 

--
Best regards,
Vladimir

Re: [PATCH] hax: Windows doesn't like posix device names

[Volker Rümelin]

> Is this relevant? Or should we drop HAX support for Windows? Personally
> I have no experience with hardware acceleration for QEMU on macOS.

There's another reason to keep hax for Windows. You can't enable the Hyper-V 
role on Windows 10 Home. Without hax and whpx there's no usable hypervisor left.

With best regards,
Volker

> Stefan
>
>
>

Re: [PATCH v4 07/30] qcow2: Document the Extended L2 Entries feature

[Vladimir Sementsov-Ogievskiy]

09.04.2020 18:12, Eric Blake wrote:

On 3/17/20 1:16 PM, Alberto Garcia wrote:

Subcluster allocation in qcow2 is implemented by extending the
existing L2 table entries and adding additional information to
indicate the allocation status of each subcluster.

This patch documents the changes to the qcow2 format and how they
affect the calculation of the L2 cache size.

Signed-off-by: Alberto Garcia 
---
  docs/interop/qcow2.txt | 68 --
  docs/qcow2-cache.txt   | 19 +++-
  2 files changed, 83 insertions(+), 4 deletions(-)




+== Extended L2 Entries ==
+
+An image uses Extended L2 Entries if bit 4 is set on the incompatible_features
+field of the header.
+
+In these images standard data clusters are divided into 32 subclusters of the
+same size. They are contiguous and start from the beginning of the cluster.
+Subclusters can be allocated independently and the L2 entry contains 
information
+indicating the status of each one of them. Compressed data clusters don't have
+subclusters so they are treated the same as in images without this feature.
+
+The size of an extended L2 entry is 128 bits so the number of entries per table
+is calculated using this formula:
+
+    l2_entries = (cluster_size / (2 * sizeof(uint64_t)))
+
+The first 64 bits have the same format as the standard L2 table entry described
+in the previous section, with the exception of bit 0 of the standard cluster
+descriptor.
+
+The last 64 bits contain a subcluster allocation bitmap with this format:
+
+Subcluster Allocation Bitmap (for standard clusters):
+
+    Bit  0 -  31:   Allocation status (one bit per subcluster)
+
+    1: the subcluster is allocated. In this case the
+   host cluster offset field must contain a valid
+   offset.
+    0: the subcluster is not allocated. In this case
+   read requests shall go to the backing file or
+   return zeros if there is no backing file data.


Hmm - raw external files are incompatible with backing files.  Should we also 
document that extended L2 entries are incompatible with raw external files?  
(The text here reminded me about it, but it would be the text earlier at the 
incompatible feature bits that we edit if we want that additional restriction; 
compare to the restriction in the autoclear bit 1).  After all, when raw 
external file is enabled, the entire image is allocated, at which point 
subclusters don't make much sense.


It still may cache information about zeroed subclusters: gives more detailed 
block-status. But we should mention somehow external files. Hm. not only for 
raw external files, but it is documented that cluster can't be unallocated when 
an external data file is used.



And in stating that, it looks like we have a pre-existing hole in that header 
bytes 8-15 don't mention the incompatibility with autoclear (when things are 
incompatible, it's best to mention the restriction from both sides, rather than 
only one of the sides, to make sure the reader notices the restriction 
regardless of which field they look up first). But tweaking that would be a 
separate patch.




--
Best regards,
Vladimir

Re: [PULL 08/13] softfloat: Fix BAD_SHIFT from normalizeFloatx80Subnormal

[Aleksandar Markovic]

17:55 Uto, 07.04.2020. Alex Bennée  је написао/ла:
>
> From: Richard Henderson 
>
> All other calls to normalize*Subnormal detect zero input before
> the call -- this is the only outlier.  This case can happen with
> +0.0 + +0.0 = +0.0 or -0.0 + -0.0 = -0.0, so return a zero of
> the correct sign.
>
> Reported-by: Coverity (CID 1421991)
> Signed-off-by: Richard Henderson 
> Signed-off-by: Alex Bennée 
> Message-Id: <20200327232042.10008-1-richard.hender...@linaro.org>
> Message-Id: <20200403191150.863-8-alex.ben...@linaro.org>
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 301ce3b537b..ae6ba718540 100644
> --- a/fpu/softfloat.c
> +++ b/fpu/softfloat.c
> @@ -5856,6 +5856,9 @@ static floatx80 addFloatx80Sigs(floatx80 a,
floatx80 b, flag zSign,
>  zSig1 = 0;
>  zSig0 = aSig + bSig;
>  if ( aExp == 0 ) {
> +if (zSig0 == 0) {
> +return packFloatx80(zSign, 0, 0);
> +}
>  normalizeFloatx80Subnormal( zSig0, &zExp, &zSig0 );
>  goto roundAndPack;
>  }
> --
> 2.20.1
>
>

We in MIPS have extensive FP tests, that certainly include many cases of
operations with +0 and -0. And they are all correct even before this patch.

Unfortunately, because of my current remote work, I don't havecthese tests
with me, and can't confirm if they work correctly, or perhaps are
unaffected at all.

Alex, from the commit message, it not clear if this is a fix of a bug (in
which case a test example would be useful to have, and the assesment on
what scenarios could be affected), or just a correction for some rare
condition that practically for all intents and purposes was never
triggered, or perhaps something third.

Alex, please explain this in more detail to me.

Secondly, and not related to this patch only, I see more and more patches
integrated into the main tree without "Reviewed-by:" tag. I don't think
this is the best way an open source community works. In my personal
opinion, this must stop.

Regards,
Aleksandar

Re: [PATCH v4 09/30] qcow2: Add subcluster-related fields to BDRVQcow2State

[Vladimir Sementsov-Ogievskiy]

17.03.2020 21:16, Alberto Garcia wrote:

This patch adds the following new fields to BDRVQcow2State:

- subclusters_per_cluster: Number of subclusters in a cluster
- subcluster_size: The size of each subcluster, in bytes
- subcluster_bits: No. of bits so 1 << subcluster_bits = subcluster_size

Images without subclusters are treated as if they had exactly one,


exactly one subcluster per cluster...


with subcluster_size = cluster_size.

Signed-off-by: Alberto Garcia 


Reviewed-by: Vladimir Sementsov-Ogievskiy 



--
Best regards,
Vladimir

Re: [PATCH v19 QEMU 4/4] memory: Do not allow direct write access to rom_device regions

[Paolo Bonzini]

On 10/04/20 05:41, Alexander Duyck wrote:
> From: Alexander Duyck 
> 
> According to the documentation in memory.h a ROM memory region will be
> backed by RAM for reads, but is supposed to go through a callback for
> writes. Currently we were not checking for the existence of the rom_device
> flag when determining if we could perform a direct write or not.
> 
> To correct that add a check to memory_region_is_direct so that if the
> memory region has the rom_device flag set we will return false for all
> checks where is_write is set.
> 
> Signed-off-by: Alexander Duyck 
> ---
>  include/exec/memory.h |4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index 1614d9a02c0c..e000bd2f97b2 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
> @@ -2351,8 +2351,8 @@ void address_space_write_cached_slow(MemoryRegionCache 
> *cache,
>  static inline bool memory_access_is_direct(MemoryRegion *mr, bool is_write)
>  {
>  if (is_write) {
> -return memory_region_is_ram(mr) &&
> -   !mr->readonly && !memory_region_is_ram_device(mr);
> +return memory_region_is_ram(mr) && !mr->readonly &&
> +   !mr->rom_device && !memory_region_is_ram_device(mr);
>  } else {
>  return (memory_region_is_ram(mr) && 
> !memory_region_is_ram_device(mr)) ||
> memory_region_is_romd(mr);
> 

Good catch.  I queued this up for 5.0.

Thanks,

Paolo

Re: [PATCH v1 07/11] configure: disable PIE for Windows builds

[Philippe Mathieu-Daudé]

On 4/9/20 11:15 PM, Alex Bennée wrote:

It seems on some compilers the test can pass but still give you
broken binaries.

[AJB untested - please could windows users test]

Fixes: d2cd29e30736
Fixes: https://bugs.launchpad.net/qemu/+bug/1871798
Cc: Bug 1871798 <1871...@bugs.launchpad.net>
Cc: James Le Cuirot 
Signed-off-by: Alex Bennée 
---
  configure | 1 +
  1 file changed, 1 insertion(+)

diff --git a/configure b/configure
index a207cce82bc..e9c5f630c14 100755
--- a/configure
+++ b/configure
@@ -807,6 +807,7 @@ MINGW32*)
  audio_drv_list=""
fi
supported_os="yes"
+  pie="no"
  ;;
  GNU/kFreeBSD)
bsd="yes"



Reviewed-by: Philippe Mathieu-Daudé 

Re: [PATCH v1 06/11] configure: redirect sphinx-build check to config.log

[Philippe Mathieu-Daudé]

On 4/9/20 11:15 PM, Alex Bennée wrote:

Otherwise it's hard to debug whats going on.

Signed-off-by: Alex Bennée 
---
  configure | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/configure b/configure
index 233c671aaa9..a207cce82bc 100755
--- a/configure
+++ b/configure
@@ -4936,7 +4936,7 @@ has_sphinx_build() {
  # sphinx-build doesn't exist at all or if it is too old.
  mkdir -p "$TMPDIR1/sphinx"
  touch "$TMPDIR1/sphinx/index.rst"
-"$sphinx_build" -c "$source_path/docs" -b html "$TMPDIR1/sphinx" 
"$TMPDIR1/sphinx/out" >/dev/null 2>&1
+"$sphinx_build" -c "$source_path/docs" -b html "$TMPDIR1/sphinx" "$TMPDIR1/sphinx/out" 
>> config.log 2>&1
  }
  
  # Check if tools are available to build documentation.




Reviewed-by: Philippe Mathieu-Daudé 

Re: [PATCH v1 05/11] tests/docker: add docs FEATURE flag and use for test-misc

[Philippe Mathieu-Daudé]

On 4/9/20 11:15 PM, Alex Bennée wrote:

The test-misc docker test fails on a number of images which don't have
the prerequisites to build the docs. Use the FEATURES flag so we can
skip those tests.

As the sphinx test fails to detect whatever feature we need to get
hxtool to work we drop them from debian9 so the windows build doesn't
attempt to build the docs.

Signed-off-by: Alex Bennée 
---
  tests/docker/dockerfiles/debian10.docker   | 2 ++
  tests/docker/dockerfiles/debian9.docker| 2 --
  tests/docker/dockerfiles/fedora.docker | 2 +-
  tests/docker/dockerfiles/travis.docker | 2 +-
  tests/docker/dockerfiles/ubuntu.docker | 2 +-
  tests/docker/dockerfiles/ubuntu1804.docker | 2 +-
  tests/docker/test-misc | 2 ++
  7 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/tests/docker/dockerfiles/debian10.docker 
b/tests/docker/dockerfiles/debian10.docker
index 2fcdc406e83..0769700a416 100644
--- a/tests/docker/dockerfiles/debian10.docker
+++ b/tests/docker/dockerfiles/debian10.docker
@@ -34,3 +34,5 @@ RUN apt update && \
  python3-sphinx \
  texinfo \
  $(apt-get -s build-dep qemu | egrep ^Inst | fgrep '[all]' | cut -d\  
-f2)
+
+ENV FEATURES docs
diff --git a/tests/docker/dockerfiles/debian9.docker 
b/tests/docker/dockerfiles/debian9.docker
index 92edbbf0f48..08cc970feb1 100644
--- a/tests/docker/dockerfiles/debian9.docker
+++ b/tests/docker/dockerfiles/debian9.docker
@@ -30,6 +30,4 @@ RUN apt update && \
  pkg-config \
  psmisc \
  python3 \
-python3-sphinx \
-texinfo \
  $(apt-get -s build-dep qemu | egrep ^Inst | fgrep '[all]' | cut -d\  
-f2)
diff --git a/tests/docker/dockerfiles/fedora.docker 
b/tests/docker/dockerfiles/fedora.docker
index 4bd2c953af8..179575ecaaa 100644
--- a/tests/docker/dockerfiles/fedora.docker
+++ b/tests/docker/dockerfiles/fedora.docker
@@ -103,4 +103,4 @@ ENV QEMU_CONFIGURE_OPTS --python=/usr/bin/python3
  RUN dnf install -y $PACKAGES
  RUN rpm -q $PACKAGES | sort > /packages.txt
  ENV PATH $PATH:/usr/libexec/python3-sphinx/
-ENV FEATURES mingw clang pyyaml asan
+ENV FEATURES mingw clang pyyaml asan docs
diff --git a/tests/docker/dockerfiles/travis.docker 
b/tests/docker/dockerfiles/travis.docker
index e8eb48dccfd..591282561bc 100644
--- a/tests/docker/dockerfiles/travis.docker
+++ b/tests/docker/dockerfiles/travis.docker
@@ -13,5 +13,5 @@ RUN apt-get -y install device-tree-compiler python3 
python3-yaml dh-autoreconf g
  # Travis tools require PhantomJS / Neo4j / Maven accessible
  # in their PATH (QEMU build won't access them).
  ENV PATH 
/usr/local/phantomjs/bin:/usr/local/phantomjs:/usr/local/neo4j-3.2.7/bin:/usr/local/maven-3.5.2/bin:/usr/local/cmake-3.9.2/bin:/usr/local/clang-5.0.0/bin:/usr/local/sbin:/usr/local/bin:/usr/sbin:/usr/bin:/sbin:/bin
-ENV FEATURES clang pyyaml
+ENV FEATURES clang pyyaml docs
  USER travis
diff --git a/tests/docker/dockerfiles/ubuntu.docker 
b/tests/docker/dockerfiles/ubuntu.docker
index b6c7b41..eeb3b22bf20 100644
--- a/tests/docker/dockerfiles/ubuntu.docker
+++ b/tests/docker/dockerfiles/ubuntu.docker
@@ -68,4 +68,4 @@ ENV PACKAGES flex bison \
  RUN apt-get update && \
  DEBIAN_FRONTEND=noninteractive apt-get -y install $PACKAGES
  RUN dpkg -l $PACKAGES | sort > /packages.txt
-ENV FEATURES clang pyyaml sdl2
+ENV FEATURES clang pyyaml sdl2 docs
diff --git a/tests/docker/dockerfiles/ubuntu1804.docker 
b/tests/docker/dockerfiles/ubuntu1804.docker
index 1efedeef995..f66b06f4cff 100644
--- a/tests/docker/dockerfiles/ubuntu1804.docker
+++ b/tests/docker/dockerfiles/ubuntu1804.docker
@@ -54,7 +54,7 @@ ENV PACKAGES flex bison \
  RUN apt-get update && \
  DEBIAN_FRONTEND=noninteractive apt-get -y install $PACKAGES
  RUN dpkg -l $PACKAGES | sort > /packages.txt
-ENV FEATURES clang pyyaml sdl2
+ENV FEATURES clang pyyaml sdl2 docs
  
  # https://bugs.launchpad.net/qemu/+bug/1838763

  ENV QEMU_CONFIGURE_OPTS --disable-libssh
diff --git a/tests/docker/test-misc b/tests/docker/test-misc
index d480afedca7..cc94a738dd0 100755
--- a/tests/docker/test-misc
+++ b/tests/docker/test-misc
@@ -14,6 +14,8 @@
  
  . common.rc
  
+requires docs


TIL 'requires' macro. Clean fix.

Reviewed-by: Philippe Mathieu-Daudé 


+
  cd "$BUILD_DIR"
  
  # build everything else but QEMU

Re: [PATCH v1 02/11] exec/cpu-all: Use bool for have_guest_base

[Philippe Mathieu-Daudé]

On 4/9/20 11:15 PM, Alex Bennée wrote:

From: Richard Henderson 

Signed-off-by: Richard Henderson 
Signed-off-by: Alex Bennée 
---
  include/exec/cpu-all.h | 2 +-
  bsd-user/main.c| 4 ++--
  linux-user/main.c  | 4 ++--
  3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h
index 49384bb66a5..b4fb5832c4a 100644
--- a/include/exec/cpu-all.h
+++ b/include/exec/cpu-all.h
@@ -159,7 +159,7 @@ static inline void tswap64s(uint64_t *s)
   * This allows the guest address space to be offset to a convenient location.
   */
  extern unsigned long guest_base;
-extern int have_guest_base;
+extern bool have_guest_base;
  extern unsigned long reserved_va;
  
  #if HOST_LONG_BITS <= TARGET_VIRT_ADDR_SPACE_BITS

diff --git a/bsd-user/main.c b/bsd-user/main.c
index 770c2b267ad..aef5531628a 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -42,7 +42,7 @@
  int singlestep;
  unsigned long mmap_min_addr;
  unsigned long guest_base;
-int have_guest_base;
+bool have_guest_base;
  unsigned long reserved_va;
  
  static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX;

@@ -828,7 +828,7 @@ int main(int argc, char **argv)
  }
  } else if (!strcmp(r, "B")) {
 guest_base = strtol(argv[optind++], NULL, 0);
-   have_guest_base = 1;
+   have_guest_base = true;
  } else if (!strcmp(r, "drop-ld-preload")) {
  (void) envlist_unsetenv(envlist, "LD_PRELOAD");
  } else if (!strcmp(r, "bsd")) {
diff --git a/linux-user/main.c b/linux-user/main.c
index 1d20a83d4e8..90ad365b439 100644
--- a/linux-user/main.c
+++ b/linux-user/main.c
@@ -59,7 +59,7 @@ static const char *cpu_type;
  static const char *seed_optarg;
  unsigned long mmap_min_addr;
  unsigned long guest_base;
-int have_guest_base;
+bool have_guest_base;
  
  /*

   * Used to implement backwards-compatibility for the `-strace`, and
@@ -334,7 +334,7 @@ static void handle_arg_cpu(const char *arg)
  static void handle_arg_guest_base(const char *arg)
  {
  guest_base = strtol(arg, NULL, 0);
-have_guest_base = 1;
+have_guest_base = true;
  }
  
  static void handle_arg_reserved_va(const char *arg)




Reviewed-by: Philippe Mathieu-Daudé 

Re: [PATCH v1 10/11] linux-user: fix /proc/self/stat handling

[Philippe Mathieu-Daudé]

Cc'ing Ludovic in case he can test with Guix-HPC.

On 4/9/20 11:15 PM, Alex Bennée wrote:

In the original bug report long files names in Guix caused
/proc/self/stat be truncated without the trailing ") " as specified in
proc manpage which says:
 (2) comm  %s
The  filename of the executable, in parentheses.  This
is visible whether or not the  executable  is  swapped
out.

Additionally it should only be reporting the executable name rather
than the full path. Fix both these failings while cleaning up the code
to use GString to build up the reported values. As the whole function
is cleaned up also adjust the white space to the current coding style.

Message-ID: 
Reported-by: Brice Goglin 
Cc: Philippe_Mathieu-Daudé 
Signed-off-by: Alex Bennée 
---
  linux-user/syscall.c | 43 +++
  1 file changed, 19 insertions(+), 24 deletions(-)

diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 6495ddc4cda..674f70e70a5 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -7295,34 +7295,29 @@ static int open_self_stat(void *cpu_env, int fd)
  {
  CPUState *cpu = env_cpu((CPUArchState *)cpu_env);
  TaskState *ts = cpu->opaque;
-abi_ulong start_stack = ts->info->start_stack;
+g_autoptr(GString) buf = g_string_new(NULL);
  int i;
  
  for (i = 0; i < 44; i++) {

-  char buf[128];
-  int len;
-  uint64_t val = 0;
-
-  if (i == 0) {
-/* pid */
-val = getpid();
-snprintf(buf, sizeof(buf), "%"PRId64 " ", val);
-  } else if (i == 1) {
-/* app name */
-snprintf(buf, sizeof(buf), "(%s) ", ts->bprm->argv[0]);
-  } else if (i == 27) {
-/* stack bottom */
-val = start_stack;
-snprintf(buf, sizeof(buf), "%"PRId64 " ", val);
-  } else {
-/* for the rest, there is MasterCard */
-snprintf(buf, sizeof(buf), "0%c", i == 43 ? '\n' : ' ');
-  }
+if (i == 0) {
+/* pid */
+g_string_printf(buf, FMT_pid " ", getpid());
+} else if (i == 1) {
+/* app name */
+gchar *bin = g_strrstr(ts->bprm->argv[0], "/");
+bin = bin ? bin + 1 : ts->bprm->argv[0];
+g_string_printf(buf, "(%.15s) ", bin);


15 or 125? 15 seems short. From your previous test I understood it was 
124, for 
sizeof("cat_with9_12345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890___40").



+} else if (i == 27) {
+/* stack bottom */
+g_string_printf(buf, TARGET_ABI_FMT_ld " ", ts->info->start_stack);
+} else {
+/* for the rest, there is MasterCard */
+g_string_printf(buf, "0%c", i == 43 ? '\n' : ' ');
+}
  
-  len = strlen(buf);

-  if (write(fd, buf, len) != len) {
-  return -1;
-  }
+if (write(fd, buf->str, buf->len) != buf->len) {
+return -1;
+}
  }
  
  return 0;

Re: [PATCH v12 2/3] qcow2: Allow writing compressed data of multiple clusters

[Alberto Garcia]

On Thu 09 Apr 2020 08:39:12 PM CEST, Vladimir Sementsov-Ogievskiy wrote:
>> Because of this a test cannot expect that running the same commands on
>> an empty image produces always the same results.
>> 
>> Is this something that we should be concerned about?
>
> Parallel writing compressed clusters is significant improvement, as it
> allow compressing in really parallel threads.

I see, I just wasn't sure if you were aware of this side effect.

> So, I don't think we should make specific workaround for
> testing... What exactly is the case?

I noticed this while writing some tests for the subcluster allocation
feature, but this is not a problem for me. Many of our iotests make
assumptions about the location of L2 and refcount tables so changing
those would break a lot of them. This thing only changes the offset of
the compressed data clusters (and their L2 entries), but as far as I'm
aware no one relies on them being predictable. I just need to make sure
that I don't do it either.

Berto

Re: [PATCH v12 2/3] qcow2: Allow writing compressed data of multiple clusters

[Vladimir Sementsov-Ogievskiy]

10.04.2020 14:12, Alberto Garcia wrote:

On Thu 09 Apr 2020 08:39:12 PM CEST, Vladimir Sementsov-Ogievskiy wrote:

Because of this a test cannot expect that running the same commands on
an empty image produces always the same results.

Is this something that we should be concerned about?


Parallel writing compressed clusters is significant improvement, as it
allow compressing in really parallel threads.


I see, I just wasn't sure if you were aware of this side effect.


No, we didn't thought about it, so good to know, thanks.




So, I don't think we should make specific workaround for
testing... What exactly is the case?


I noticed this while writing some tests for the subcluster allocation
feature, but this is not a problem for me. Many of our iotests make
assumptions about the location of L2 and refcount tables so changing
those would break a lot of them. This thing only changes the offset of
the compressed data clusters (and their L2 entries), but as far as I'm
aware no one relies on them being predictable. I just need to make sure
that I don't do it either.



OK. I had similar problems (because of asynchronicity) with existing iotests
in may series for backup. As I remember, I had to add options to just disable
asynchronicity for some tests. So, if needed, we can add some options for
qcow2 (which can be used to justify number of parallel requests, not only to
disable them at all). Still, of course, it's better to avoid testing only
sequential IO when it is async without options.



--
Best regards,
Vladimir

[PATCH v25 04/10] ACPI: Build related register address fields via hardware error fw_cfg blob

[Dongjiu Geng]

This patch builds error_block_address and read_ack_register fields
in hardware errors table , the error_block_address points to Generic
Error Status Block(GESB) via bios_linker. The max size for one GESB
is 1kb, For more detailed information, please refer to
document: docs/specs/acpi_hest_ghes.rst

Now we only support one Error source, if necessary, we can extend to
support more.

Suggested-by: Laszlo Ersek 
Signed-off-by: Xiang Zheng 
Reviewed-by: Jonathan Cameron 
Reviewed-by: Igor Mammedov 
Signed-off-by: Dongjiu Geng 
---
change since v24:
1.move acpi_add_table() to the patch that adds acpi_build_hest()
---
 default-configs/arm-softmmu.mak |  1 +
 hw/acpi/Kconfig |  4 ++
 hw/acpi/Makefile.objs   |  1 +
 hw/acpi/aml-build.c |  2 +
 hw/acpi/ghes.c  | 89 +
 hw/arm/virt-acpi-build.c|  5 +++
 include/hw/acpi/aml-build.h |  1 +
 include/hw/acpi/ghes.h  | 28 +
 8 files changed, 131 insertions(+)
 create mode 100644 hw/acpi/ghes.c
 create mode 100644 include/hw/acpi/ghes.h

diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.mak
index 36a0e89..8fc09a4 100644
--- a/default-configs/arm-softmmu.mak
+++ b/default-configs/arm-softmmu.mak
@@ -42,3 +42,4 @@ CONFIG_FSL_IMX7=y
 CONFIG_FSL_IMX6UL=y
 CONFIG_SEMIHOSTING=y
 CONFIG_ALLWINNER_H3=y
+CONFIG_ACPI_APEI=y
diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig
index 54209c6..1932f66 100644
--- a/hw/acpi/Kconfig
+++ b/hw/acpi/Kconfig
@@ -28,6 +28,10 @@ config ACPI_HMAT
 bool
 depends on ACPI
 
+config ACPI_APEI
+bool
+depends on ACPI
+
 config ACPI_PCI
 bool
 depends on ACPI && PCI
diff --git a/hw/acpi/Makefile.objs b/hw/acpi/Makefile.objs
index 777da07..28c5ddb 100644
--- a/hw/acpi/Makefile.objs
+++ b/hw/acpi/Makefile.objs
@@ -8,6 +8,7 @@ common-obj-$(CONFIG_ACPI_NVDIMM) += nvdimm.o
 common-obj-$(CONFIG_ACPI_VMGENID) += vmgenid.o
 common-obj-$(CONFIG_ACPI_HW_REDUCED) += generic_event_device.o
 common-obj-$(CONFIG_ACPI_HMAT) += hmat.o
+common-obj-$(CONFIG_ACPI_APEI) += ghes.o
 common-obj-$(call lnot,$(CONFIG_ACPI_X86)) += acpi-stub.o
 common-obj-$(call lnot,$(CONFIG_PC)) += acpi-x86-stub.o
 
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 2c3702b..3681ec6 100644
--- a/hw/acpi/aml-build.c
+++ b/hw/acpi/aml-build.c
@@ -1578,6 +1578,7 @@ void acpi_build_tables_init(AcpiBuildTables *tables)
 tables->table_data = g_array_new(false, true /* clear */, 1);
 tables->tcpalog = g_array_new(false, true /* clear */, 1);
 tables->vmgenid = g_array_new(false, true /* clear */, 1);
+tables->hardware_errors = g_array_new(false, true /* clear */, 1);
 tables->linker = bios_linker_loader_init();
 }
 
@@ -1588,6 +1589,7 @@ void acpi_build_tables_cleanup(AcpiBuildTables *tables, 
bool mfre)
 g_array_free(tables->table_data, true);
 g_array_free(tables->tcpalog, mfre);
 g_array_free(tables->vmgenid, mfre);
+g_array_free(tables->hardware_errors, mfre);
 }
 
 /*
diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c
new file mode 100644
index 000..e1b3f8f
--- /dev/null
+++ b/hw/acpi/ghes.c
@@ -0,0 +1,89 @@
+/*
+ * Support for generating APEI tables and recording CPER for Guests
+ *
+ * Copyright (c) 2020 HUAWEI TECHNOLOGIES CO., LTD.
+ *
+ * Author: Dongjiu Geng 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see .
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/units.h"
+#include "hw/acpi/ghes.h"
+#include "hw/acpi/aml-build.h"
+
+#define ACPI_GHES_ERRORS_FW_CFG_FILE"etc/hardware_errors"
+#define ACPI_GHES_DATA_ADDR_FW_CFG_FILE "etc/hardware_errors_addr"
+
+/* The max size in bytes for one error block */
+#define ACPI_GHES_MAX_RAW_DATA_LENGTH   (1 * KiB)
+
+/* Now only support ARMv8 SEA notification type error source */
+#define ACPI_GHES_ERROR_SOURCE_COUNT1
+
+/*
+ * Build table for the hardware error fw_cfg blob.
+ * Initialize "etc/hardware_errors" and "etc/hardware_errors_addr" fw_cfg 
blobs.
+ * See docs/specs/acpi_hest_ghes.rst for blobs format.
+ */
+void build_ghes_error_table(GArray *hardware_errors, BIOSLinker *linker)
+{
+int i, error_status_block_offset;
+
+/* Build error_block_address */
+for (i = 0; i < ACPI_GHES_ERROR_SOURCE_COUNT; i++) {
+build_append_int_noprefix(hardware_errors, 0, sizeof(uint64_t));
+}
+
+/* Build read_ack_regi

[PATCH v25 01/10] acpi: nvdimm: change NVDIMM_UUID_LE to a common macro

[Dongjiu Geng]

The little end UUID is used in many places, so make
NVDIMM_UUID_LE to a common macro to convert the UUID
to a little end array.

Reviewed-by: Xiang Zheng 
Signed-off-by: Dongjiu Geng 
---
 hw/acpi/nvdimm.c| 10 +++---
 include/qemu/uuid.h |  9 +
 2 files changed, 12 insertions(+), 7 deletions(-)

diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index eb6a37b..a747c63 100644
--- a/hw/acpi/nvdimm.c
+++ b/hw/acpi/nvdimm.c
@@ -27,6 +27,7 @@
  */
 
 #include "qemu/osdep.h"
+#include "qemu/uuid.h"
 #include "hw/acpi/acpi.h"
 #include "hw/acpi/aml-build.h"
 #include "hw/acpi/bios-linker-loader.h"
@@ -34,18 +35,13 @@
 #include "hw/mem/nvdimm.h"
 #include "qemu/nvdimm-utils.h"
 
-#define NVDIMM_UUID_LE(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \
-   { (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
- (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff,  \
- (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }
-
 /*
  * define Byte Addressable Persistent Memory (PM) Region according to
  * ACPI 6.0: 5.2.25.1 System Physical Address Range Structure.
  */
 static const uint8_t nvdimm_nfit_spa_uuid[] =
-  NVDIMM_UUID_LE(0x66f0d379, 0xb4f3, 0x4074, 0xac, 0x43, 0x0d, 0x33,
- 0x18, 0xb7, 0x8c, 0xdb);
+  UUID_LE(0x66f0d379, 0xb4f3, 0x4074, 0xac, 0x43, 0x0d, 0x33,
+  0x18, 0xb7, 0x8c, 0xdb);
 
 /*
  * NVDIMM Firmware Interface Table
diff --git a/include/qemu/uuid.h b/include/qemu/uuid.h
index 129c45f..c55541b 100644
--- a/include/qemu/uuid.h
+++ b/include/qemu/uuid.h
@@ -34,6 +34,15 @@ typedef struct {
 };
 } QemuUUID;
 
+/**
+ * convert UUID to little-endian array
+ * The input parameter is the member of  UUID
+ */
+#define UUID_LE(a, b, c, d0, d1, d2, d3, d4, d5, d6, d7) \
+  { (a) & 0xff, ((a) >> 8) & 0xff, ((a) >> 16) & 0xff, ((a) >> 24) & 0xff, \
+ (b) & 0xff, ((b) >> 8) & 0xff, (c) & 0xff, ((c) >> 8) & 0xff,  \
+ (d0), (d1), (d2), (d3), (d4), (d5), (d6), (d7) }
+
 #define UUID_FMT "%02hhx%02hhx%02hhx%02hhx-" \
  "%02hhx%02hhx-%02hhx%02hhx-" \
  "%02hhx%02hhx-" \
-- 
1.8.3.1

[PATCH v25 10/10] MAINTAINERS: Add ACPI/HEST/GHES entries

[Dongjiu Geng]

I and Xiang are willing to review the APEI-related patches and
volunteer as the reviewers for the HEST/GHES part.

Signed-off-by: Dongjiu Geng 
Signed-off-by: Xiang Zheng 
Reviewed-by: Philippe Mathieu-Daudé 
Acked-by: Michael S. Tsirkin 
---
 MAINTAINERS | 9 +
 1 file changed, 9 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 7cb53ec..70726f9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1511,6 +1511,15 @@ F: tests/qtest/bios-tables-test.c
 F: tests/qtest/acpi-utils.[hc]
 F: tests/data/acpi/
 
+ACPI/HEST/GHES
+R: Dongjiu Geng 
+R: Xiang Zheng 
+L: qemu-...@nongnu.org
+S: Maintained
+F: hw/acpi/ghes.c
+F: include/hw/acpi/ghes.h
+F: docs/specs/acpi_hest_ghes.rst
+
 ppc4xx
 M: David Gibson 
 L: qemu-...@nongnu.org
-- 
1.8.3.1

[PATCH v25 02/10] hw/arm/virt: Introduce a RAS machine option

[Dongjiu Geng]

RAS Virtualization feature is not supported now, so
add a RAS machine option and disable it by default.

Reviewed-by: Peter Maydell 
Signed-off-by: Dongjiu Geng 
Signed-off-by: Xiang Zheng 
Reviewed-by: Jonathan Cameron 
---
 hw/arm/virt.c | 23 +++
 include/hw/arm/virt.h |  1 +
 2 files changed, 24 insertions(+)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 7dc96ab..20409b9 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -1960,6 +1960,20 @@ static void virt_set_acpi(Object *obj, Visitor *v, const 
char *name,
 visit_type_OnOffAuto(v, name, &vms->acpi, errp);
 }
 
+static bool virt_get_ras(Object *obj, Error **errp)
+{
+VirtMachineState *vms = VIRT_MACHINE(obj);
+
+return vms->ras;
+}
+
+static void virt_set_ras(Object *obj, bool value, Error **errp)
+{
+VirtMachineState *vms = VIRT_MACHINE(obj);
+
+vms->ras = value;
+}
+
 static char *virt_get_gic_version(Object *obj, Error **errp)
 {
 VirtMachineState *vms = VIRT_MACHINE(obj);
@@ -2284,6 +2298,15 @@ static void virt_instance_init(Object *obj)
 "Valid values are none and smmuv3",
 NULL);
 
+/* Default disallows RAS instantiation */
+vms->ras = false;
+object_property_add_bool(obj, "ras", virt_get_ras,
+ virt_set_ras, NULL);
+object_property_set_description(obj, "ras",
+"Set on/off to enable/disable reporting 
host memory errors "
+"to a KVM guest using ACPI and guest 
external abort exceptions",
+NULL);
+
 vms->irqmap = a15irqmap;
 
 virt_flash_create(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 60b2f52..6401662 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -131,6 +131,7 @@ typedef struct {
 bool highmem_ecam;
 bool its;
 bool virt;
+bool ras;
 OnOffAuto acpi;
 VirtGICType gic_version;
 VirtIOMMUType iommu;
-- 
1.8.3.1

[PATCH v25 00/10] Add ARMv8 RAS virtualization support in QEMU

[Dongjiu Geng]

In the ARMv8 platform, the CPU error types includes synchronous external 
abort(SEA)
and SError Interrupt (SEI). If exception happens in guest, host does not know 
the detailed
information of guest, so it is expected that guest can do the recovery. For 
example, if an
exception happens in a guest user-space application, host does not know which 
application
encounters errors, only guest knows it.

For the ARMv8 SEA/SEI, KVM or host kernel delivers SIGBUS to notify userspace.
After user space gets the notification, it will record the CPER into guest GHES
buffer and inject an exception or IRQ to guest.

In the current implementation, if the type of SIGBUS is BUS_MCEERR_AR, we will
treat it as a synchronous exception, and notify guest with ARMv8 SEA
notification type after recording CPER into guest.

A) This series of patches are based on Qemu 4.2, which include two parts:
1. Generate APEI/GHES table.
2. Handle the SIGBUS signal, record the CPER in runtime and fill it into guest
   memory, then notify guest according to the type of SIGBUS.

B) The solution was suggested by James(james.mo...@arm.com); The APEI part 
solution was suggested by Laszlo(ler...@redhat.com). Show some discussions in 
[1].

C) This series of patches have already been tested on ARM64 platform with RAS
feature enabled:
1. Show the APEI part verification result in [2].
2. Show the SIGBUS of BUS_MCEERR_AR handling verification result in [3].

D) Add 'ras' option in command Line to enable guest RAS error recovery feature, 
For example:
KVM model: ./qemu-system-aarch64 --enable-kvm -cpu host --bios QEMU_EFI.fd_new  
-machine virt,gic-version=3,ras,kernel-irqchip=on
-smp 4 -nographic -kernel Image  -append "rdinit=/init console=ttyAMA0 mem=512M 
root=/dev/ram0" -initrd guestfs_new.cpio.gz
TCG model: ./qemu-system-aarch64 -cpu cortex-a57 --bios QEMU_EFI.fd_new  
-machine virt,gic-version=3,ras,kernel-irqchip=on  -smp 4
-nographic -kernel Image  -append "rdinit=/init console=ttyAMA0 mem=512M 
root=/dev/ram0" -initrd guestfs_new.cpio.gz
---
Change since v23:
1. fix a warning for uuid

Change since v22:
1. Using 1 * KiB instead of 0x400 to define max size of one error block
2. Make the alignment to 8 bytes in bios_linker_loader_alloc()
3. Change "Copyright (c) 2019" to "Copyright (c) 2020" in file header
4. Fix some code style warnings/errors and add some comments in code
5. Address Jonathan's comments to easily support CCIX error injection
6. Add vmstate_ghes_state .subsections in vmstate_acpi_ged

Change since v21:
1. Make the user-facing 'ras' option description more clearly to address 
Peter's comments.
2. Update the doc description in "docs/specs/acpi_hest_ghes.rst"
3. Split HEST/GHES patches to more patches to make the review easily
4. Using source_id to index the location to save the CPER.
5. Optimize and simplify the logic to build HEST/GHES table to address 
Igor/Michael/Beata comments.
6. make ghes_addr_le a part of GED device.

Change since v20:
1. Move some implementation details from acpi_ghes.h to acpi_ghes.c
2. Add the reviewers for the ACPI/APEI/GHES part

Change since v19:
1. Fix clang compile error
2. Fix sphinx build error

Change since v18:
1. Fix some code-style and typo/grammar problems.
2. Remove no_ras in the VirtMachineClass struct.
3. Convert documentation to rst format.
4. Simplize the code and add comments for some magic value.
5. Move kvm_inject_arm_sea() function into the patch where it's used.
6. Register the reset handler(kvm_unpoison_all()) in the kvm_init() function.

Change since v17:
1. Improve some commit messages and comments.
2. Fix some code-style problems.
3. Add a *ras* machine option.
4. Move HEST/GHES related structures and macros into "hw/acpi/acpi_ghes.*".
5. Move HWPoison page functions into "include/sysemu/kvm_int.h".
6. Fix some bugs.
7. Improve the design document.

Change since v16:
1. check whether ACPI table is enabled when handling the memory error in the 
SIGBUS handler.

Change since v15:
1. Add a doc-comment in the proper format for 'include/exec/ram_addr.h'
2. Remove write_part_cpustate_to_list() because there is another bug fix patch
   has been merged "arm: Allow system registers for KVM guests to be changed by 
QEMU code"
3. Add some comments for kvm_inject_arm_sea() in 'target/arm/kvm64.c'
4. Compare the arm_current_el() return value to 0,1,2,3, not to PSTATE_MODE_* 
constants.
5. Change the RAS support wasn't introduced before 4.1 QEMU version.
6. Move the no_ras flag  patch to begin in this series

Change since v14:
1. Remove the BUS_MCEERR_AO handling logic because this asynchronous signal was 
masked by main thread
2. Address some Igor Mammedov's comments(ACPI part)
   1) change the comments for the enum AcpiHestNotifyType definition and remove 
ditto in patch 1
   2) change some patch commit messages and separate "APEI GHES table 
generation" patch to more patches.
3. Address some peter's comments(arm64 Synchronous External Abort injection)
   1) change some code notes
   2) usin

[PATCH v25 06/10] ACPI: Record the Generic Error Status Block address

[Dongjiu Geng]

Record the GHEB address via fw_cfg file, when recording
a error to CPER, it will use this address to find out
Generic Error Data Entries and write the error.

In order to avoid migration failure, make hardware
error table address to a part of GED device instead
of global variable, then this address will be migrated
to target QEMU.

Acked-by: Xiang Zheng 
Signed-off-by: Dongjiu Geng 
---
change since v24:
1. Use s->ghes_state.ghes_addr_le to check in ghes_needed()
2. Using hardware_error->len instead of request_block_size to calculate in 
acpi_ghes_add_fw_cfg()
3. Remove assert(vms->acpi_dev) be build APEI table
4. Directly use ACPI_GED(vms->acpi_dev) instead of ACPI_GED(vms->acpi_dev)
---
 hw/acpi/generic_event_device.c | 19 +++
 hw/acpi/ghes.c | 14 ++
 hw/arm/virt-acpi-build.c   |  8 
 include/hw/acpi/generic_event_device.h |  2 ++
 include/hw/acpi/ghes.h |  6 ++
 5 files changed, 49 insertions(+)

diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index 021ed2b..1491291 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -234,6 +234,24 @@ static const VMStateDescription vmstate_ged_state = {
 }
 };
 
+static bool ghes_needed(void *opaque)
+{
+AcpiGedState *s = opaque;
+return s->ghes_state.ghes_addr_le;
+}
+
+static const VMStateDescription vmstate_ghes_state = {
+.name = "acpi-ged/ghes",
+.version_id = 1,
+.minimum_version_id = 1,
+.needed = ghes_needed,
+.fields  = (VMStateField[]) {
+VMSTATE_STRUCT(ghes_state, AcpiGedState, 1,
+   vmstate_ghes_state, AcpiGhesState),
+VMSTATE_END_OF_LIST()
+}
+};
+
 static const VMStateDescription vmstate_acpi_ged = {
 .name = "acpi-ged",
 .version_id = 1,
@@ -244,6 +262,7 @@ static const VMStateDescription vmstate_acpi_ged = {
 },
 .subsections = (const VMStateDescription * []) {
 &vmstate_memhp_state,
+&vmstate_ghes_state,
 NULL
 }
 };
diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c
index 091fd87..e74af23 100644
--- a/hw/acpi/ghes.c
+++ b/hw/acpi/ghes.c
@@ -24,6 +24,8 @@
 #include "hw/acpi/ghes.h"
 #include "hw/acpi/aml-build.h"
 #include "qemu/error-report.h"
+#include "hw/acpi/generic_event_device.h"
+#include "hw/nvram/fw_cfg.h"
 
 #define ACPI_GHES_ERRORS_FW_CFG_FILE"etc/hardware_errors"
 #define ACPI_GHES_DATA_ADDR_FW_CFG_FILE "etc/hardware_errors_addr"
@@ -213,3 +215,15 @@ void acpi_build_hest(GArray *table_data, BIOSLinker 
*linker)
 build_header(linker, table_data, (void *)(table_data->data + hest_start),
 "HEST", table_data->len - hest_start, 1, NULL, NULL);
 }
+
+void acpi_ghes_add_fw_cfg(AcpiGhesState *ags, FWCfgState *s,
+  GArray *hardware_error)
+{
+/* Create a read-only fw_cfg file for GHES */
+fw_cfg_add_file(s, ACPI_GHES_ERRORS_FW_CFG_FILE, hardware_error->data,
+hardware_error->len);
+
+/* Create a read-write fw_cfg file for Address */
+fw_cfg_add_file_callback(s, ACPI_GHES_DATA_ADDR_FW_CFG_FILE, NULL, NULL,
+NULL, &(ags->ghes_addr_le), sizeof(ags->ghes_addr_le), false);
+}
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index f611bce..2726aac 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -911,6 +911,7 @@ void virt_acpi_setup(VirtMachineState *vms)
 {
 AcpiBuildTables tables;
 AcpiBuildState *build_state;
+AcpiGedState *acpi_ged_state;
 
 if (!vms->fw_cfg) {
 trace_virt_acpi_setup();
@@ -941,6 +942,13 @@ void virt_acpi_setup(VirtMachineState *vms)
 fw_cfg_add_file(vms->fw_cfg, ACPI_BUILD_TPMLOG_FILE, tables.tcpalog->data,
 acpi_data_len(tables.tcpalog));
 
+if (vms->ras) {
+assert(vms->acpi_dev);
+acpi_ged_state = ACPI_GED(vms->acpi_dev);
+acpi_ghes_add_fw_cfg(&acpi_ged_state->ghes_state,
+ vms->fw_cfg, tables.hardware_errors);
+}
+
 build_state->rsdp_mr = acpi_add_rom_blob(virt_acpi_build_update,
  build_state, tables.rsdp,
  ACPI_BUILD_RSDP_FILE, 0);
diff --git a/include/hw/acpi/generic_event_device.h 
b/include/hw/acpi/generic_event_device.h
index d157eac..037d2b5 100644
--- a/include/hw/acpi/generic_event_device.h
+++ b/include/hw/acpi/generic_event_device.h
@@ -61,6 +61,7 @@
 
 #include "hw/sysbus.h"
 #include "hw/acpi/memory_hotplug.h"
+#include "hw/acpi/ghes.h"
 
 #define ACPI_POWER_BUTTON_DEVICE "PWRB"
 
@@ -95,6 +96,7 @@ typedef struct AcpiGedState {
 GEDState ged_state;
 uint32_t ged_event_bitmap;
 qemu_irq irq;
+AcpiGhesState ghes_state;
 } AcpiGedState;
 
 void build_ged_aml(Aml *table, const char* name, HotplugHandler *hotplug_dev,
diff --git a/include/hw/acpi/ghes.h b/include/hw/acpi/ghes.h
index 18debd8..a3420fc 100644
-

[PATCH v25 05/10] ACPI: Build Hardware Error Source Table

[Dongjiu Geng]

This patch builds Hardware Error Source Table(HEST) via fw_cfg blobs.
Now it only supports ARMv8 SEA, a type of Generic Hardware Error
Source version 2(GHESv2) error source. Afterwards, we can extend
the supported types if needed. For the CPER section, currently it
is memory section because kernel mainly wants userspace to handle
the memory errors.

This patch follows the spec ACPI 6.2 to build the Hardware Error
Source table. For more detailed information, please refer to
document: docs/specs/acpi_hest_ghes.rst

build_ghes_hw_error_notification() helper will help to add Hardware
Error Notification to ACPI tables without using packed C structures
and avoid endianness issues as API doesn't need explicit conversion.

Signed-off-by: Xiang Zheng 
Signed-off-by: Dongjiu Geng 
---
change since v24:
1. Add acpi_add_table() before acpi_build_hest()
2. Pass NULL for oem_table_id in build_header() to build Hardware
   Error Source Table header
---
 hw/acpi/ghes.c   | 126 +++
 hw/arm/virt-acpi-build.c |   2 +
 include/hw/acpi/ghes.h   |  39 +++
 3 files changed, 167 insertions(+)

diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c
index e1b3f8f..091fd87 100644
--- a/hw/acpi/ghes.c
+++ b/hw/acpi/ghes.c
@@ -23,6 +23,7 @@
 #include "qemu/units.h"
 #include "hw/acpi/ghes.h"
 #include "hw/acpi/aml-build.h"
+#include "qemu/error-report.h"
 
 #define ACPI_GHES_ERRORS_FW_CFG_FILE"etc/hardware_errors"
 #define ACPI_GHES_DATA_ADDR_FW_CFG_FILE "etc/hardware_errors_addr"
@@ -33,6 +34,42 @@
 /* Now only support ARMv8 SEA notification type error source */
 #define ACPI_GHES_ERROR_SOURCE_COUNT1
 
+/* Generic Hardware Error Source version 2 */
+#define ACPI_GHES_SOURCE_GENERIC_ERROR_V2   10
+
+/* Address offset in Generic Address Structure(GAS) */
+#define GAS_ADDR_OFFSET 4
+
+/*
+ * Hardware Error Notification
+ * ACPI 4.0: 17.3.2.7 Hardware Error Notification
+ * Composes dummy Hardware Error Notification descriptor of specified type
+ */
+static void build_ghes_hw_error_notification(GArray *table, const uint8_t type)
+{
+/* Type */
+build_append_int_noprefix(table, type, 1);
+/*
+ * Length:
+ * Total length of the structure in bytes
+ */
+build_append_int_noprefix(table, 28, 1);
+/* Configuration Write Enable */
+build_append_int_noprefix(table, 0, 2);
+/* Poll Interval */
+build_append_int_noprefix(table, 0, 4);
+/* Vector */
+build_append_int_noprefix(table, 0, 4);
+/* Switch To Polling Threshold Value */
+build_append_int_noprefix(table, 0, 4);
+/* Switch To Polling Threshold Window */
+build_append_int_noprefix(table, 0, 4);
+/* Error Threshold Value */
+build_append_int_noprefix(table, 0, 4);
+/* Error Threshold Window */
+build_append_int_noprefix(table, 0, 4);
+}
+
 /*
  * Build table for the hardware error fw_cfg blob.
  * Initialize "etc/hardware_errors" and "etc/hardware_errors_addr" fw_cfg 
blobs.
@@ -87,3 +124,92 @@ void build_ghes_error_table(GArray *hardware_errors, 
BIOSLinker *linker)
 bios_linker_loader_write_pointer(linker, ACPI_GHES_DATA_ADDR_FW_CFG_FILE,
 0, sizeof(uint64_t), ACPI_GHES_ERRORS_FW_CFG_FILE, 0);
 }
+
+/* Build Generic Hardware Error Source version 2 (GHESv2) */
+static void build_ghes_v2(GArray *table_data, int source_id, BIOSLinker 
*linker)
+{
+uint64_t address_offset;
+/*
+ * Type:
+ * Generic Hardware Error Source version 2(GHESv2 - Type 10)
+ */
+build_append_int_noprefix(table_data, ACPI_GHES_SOURCE_GENERIC_ERROR_V2, 
2);
+/* Source Id */
+build_append_int_noprefix(table_data, source_id, 2);
+/* Related Source Id */
+build_append_int_noprefix(table_data, 0x, 2);
+/* Flags */
+build_append_int_noprefix(table_data, 0, 1);
+/* Enabled */
+build_append_int_noprefix(table_data, 1, 1);
+
+/* Number of Records To Pre-allocate */
+build_append_int_noprefix(table_data, 1, 4);
+/* Max Sections Per Record */
+build_append_int_noprefix(table_data, 1, 4);
+/* Max Raw Data Length */
+build_append_int_noprefix(table_data, ACPI_GHES_MAX_RAW_DATA_LENGTH, 4);
+
+address_offset = table_data->len;
+/* Error Status Address */
+build_append_gas(table_data, AML_AS_SYSTEM_MEMORY, 0x40, 0,
+ 4 /* QWord access */, 0);
+bios_linker_loader_add_pointer(linker, ACPI_BUILD_TABLE_FILE,
+address_offset + GAS_ADDR_OFFSET, sizeof(uint64_t),
+ACPI_GHES_ERRORS_FW_CFG_FILE, source_id * sizeof(uint64_t));
+
+switch (source_id) {
+case ACPI_HEST_SRC_ID_SEA:
+/*
+ * Notification Structure
+ * Now only enable ARMv8 SEA notification type
+ */
+build_ghes_hw_error_notification(table_data, ACPI_GHES_NOTIFY_SEA);
+break;
+default:
+error_report("Not support this error source");
+abort();
+}
+
+/* Error Status Block Length */
+build_append_int_no

[PATCH v25 09/10] target-arm: kvm64: handle SIGBUS signal from kernel or KVM

[Dongjiu Geng]

Add a SIGBUS signal handler. In this handler, it checks the SIGBUS type,
translates the host VA delivered by host to guest PA, then fills this PA
to guest APEI GHES memory, then notifies guest according to the SIGBUS
type.

When guest accesses the poisoned memory, it will generate a Synchronous
External Abort(SEA). Then host kernel gets an APEI notification and calls
memory_failure() to unmapped the affected page in stage 2, finally
returns to guest.

Guest continues to access the PG_hwpoison page, it will trap to KVM as
stage2 fault, then a SIGBUS_MCEERR_AR synchronous signal is delivered to
Qemu, Qemu records this error address into guest APEI GHES memory and
notifes guest using Synchronous-External-Abort(SEA).

In order to inject a vSEA, we introduce the kvm_inject_arm_sea() function
in which we can setup the type of exception and the syndrome information.
When switching to guest, the target vcpu will jump to the synchronous
external abort vector table entry.

The ESR_ELx.DFSC is set to synchronous external abort(0x10), and the
ESR_ELx.FnV is set to not valid(0x1), which will tell guest that FAR is
not valid and hold an UNKNOWN value. These values will be set to KVM
register structures through KVM_SET_ONE_REG IOCTL.

Signed-off-by: Dongjiu Geng 
Signed-off-by: Xiang Zheng 
Reviewed-by: Michael S. Tsirkin 
Acked-by: Xiang Zheng 
Reviewed-by: Peter Maydell 
---
 include/sysemu/kvm.h|  3 +-
 target/arm/cpu.h|  4 +++
 target/arm/helper.c |  2 +-
 target/arm/internals.h  |  5 ++--
 target/arm/kvm64.c  | 77 +
 target/arm/tlb_helper.c |  2 +-
 target/i386/cpu.h   |  2 ++
 7 files changed, 89 insertions(+), 6 deletions(-)

diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index 141342d..3b22504 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -379,8 +379,7 @@ bool kvm_vcpu_id_is_valid(int vcpu_id);
 /* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */
 unsigned long kvm_arch_vcpu_id(CPUState *cpu);
 
-#ifdef TARGET_I386
-#define KVM_HAVE_MCE_INJECTION 1
+#ifdef KVM_HAVE_MCE_INJECTION
 void kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr);
 #endif
 
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 8b9f296..6a9838d 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -28,6 +28,10 @@
 /* ARM processors have a weak memory model */
 #define TCG_GUEST_DEFAULT_MO  (0)
 
+#ifdef TARGET_AARCH64
+#define KVM_HAVE_MCE_INJECTION 1
+#endif
+
 #define EXCP_UDEF1   /* undefined instruction */
 #define EXCP_SWI 2   /* software interrupt */
 #define EXCP_PREFETCH_ABORT  3
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 163c91a..b2c30f2 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -3517,7 +3517,7 @@ static uint64_t do_ats_write(CPUARMState *env, uint64_t 
value,
  * Report exception with ESR indicating a fault due to a
  * translation table walk for a cache maintenance instruction.
  */
-syn = syn_data_abort_no_iss(current_el == target_el,
+syn = syn_data_abort_no_iss(current_el == target_el, 0,
 fi.ea, 1, fi.s1ptw, 1, fsc);
 env->exception.vaddress = value;
 env->exception.fsr = fsr;
diff --git a/target/arm/internals.h b/target/arm/internals.h
index e633aff..37c22a9 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -451,13 +451,14 @@ static inline uint32_t syn_insn_abort(int same_el, int 
ea, int s1ptw, int fsc)
 | ARM_EL_IL | (ea << 9) | (s1ptw << 7) | fsc;
 }
 
-static inline uint32_t syn_data_abort_no_iss(int same_el,
+static inline uint32_t syn_data_abort_no_iss(int same_el, int fnv,
  int ea, int cm, int s1ptw,
  int wnr, int fsc)
 {
 return (EC_DATAABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)
| ARM_EL_IL
-   | (ea << 9) | (cm << 8) | (s1ptw << 7) | (wnr << 6) | fsc;
+   | (fnv << 10) | (ea << 9) | (cm << 8) | (s1ptw << 7)
+   | (wnr << 6) | fsc;
 }
 
 static inline uint32_t syn_data_abort_with_iss(int same_el,
diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
index be5b31c..d53f7f2 100644
--- a/target/arm/kvm64.c
+++ b/target/arm/kvm64.c
@@ -28,6 +28,9 @@
 #include "sysemu/kvm_int.h"
 #include "kvm_arm.h"
 #include "internals.h"
+#include "hw/acpi/acpi.h"
+#include "hw/acpi/ghes.h"
+#include "hw/arm/virt.h"
 
 static bool have_guest_debug;
 
@@ -893,6 +896,30 @@ int kvm_arm_cpreg_level(uint64_t regidx)
 return KVM_PUT_RUNTIME_STATE;
 }
 
+/* Callers must hold the iothread mutex lock */
+static void kvm_inject_arm_sea(CPUState *c)
+{
+ARMCPU *cpu = ARM_CPU(c);
+CPUARMState *env = &cpu->env;
+CPUClass *cc = CPU_GET_CLASS(c);
+uint32_t esr;
+bool same_el;
+
+c->exception_index = EXCP_DATA_ABORT;
+env->exception.target_el = 1;
+
+

[PATCH v25 08/10] ACPI: Record Generic Error Status Block(GESB) table

[Dongjiu Geng]

kvm_arch_on_sigbus_vcpu() error injection uses source_id as
index in etc/hardware_errors to find out Error Status Data
Block entry corresponding to error source. So supported source_id
values should be assigned here and not be changed afterwards to
make sure that guest will write error into expected Error Status
Data Block.

Before QEMU writes a new error to ACPI table, it will check whether
previous error has been acknowledged. If not acknowledged, the new
errors will be ignored and not be recorded. For the errors section
type, QEMU simulate it to memory section error.

Signed-off-by: Dongjiu Geng 
Signed-off-by: Xiang Zheng 
---
change since v24:
1. Using g_array_append_vals() to replace build_append_int_noprefix() to build 
FRU Text.
2. Remove the judgement that judge whether acpi_ged_state is NULL.
3. Add le64_to_cpu() to error_block_address
---
 hw/acpi/ghes.c | 219 +
 include/hw/acpi/ghes.h |   1 +
 2 files changed, 220 insertions(+)

diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c
index e74af23..a3ab2e4 100644
--- a/hw/acpi/ghes.c
+++ b/hw/acpi/ghes.c
@@ -26,6 +26,7 @@
 #include "qemu/error-report.h"
 #include "hw/acpi/generic_event_device.h"
 #include "hw/nvram/fw_cfg.h"
+#include "qemu/uuid.h"
 
 #define ACPI_GHES_ERRORS_FW_CFG_FILE"etc/hardware_errors"
 #define ACPI_GHES_DATA_ADDR_FW_CFG_FILE "etc/hardware_errors_addr"
@@ -43,6 +44,36 @@
 #define GAS_ADDR_OFFSET 4
 
 /*
+ * The total size of Generic Error Data Entry
+ * ACPI 6.1/6.2: 18.3.2.7.1 Generic Error Data,
+ * Table 18-343 Generic Error Data Entry
+ */
+#define ACPI_GHES_DATA_LENGTH   72
+
+/* The memory section CPER size, UEFI 2.6: N.2.5 Memory Error Section */
+#define ACPI_GHES_MEM_CPER_LENGTH   80
+
+/* Masks for block_status flags */
+#define ACPI_GEBS_UNCORRECTABLE 1
+
+/*
+ * Total size for Generic Error Status Block except Generic Error Data Entries
+ * ACPI 6.2: 18.3.2.7.1 Generic Error Data,
+ * Table 18-380 Generic Error Status Block
+ */
+#define ACPI_GHES_GESB_SIZE 20
+
+/*
+ * Values for error_severity field
+ */
+enum AcpiGenericErrorSeverity {
+ACPI_CPER_SEV_RECOVERABLE = 0,
+ACPI_CPER_SEV_FATAL = 1,
+ACPI_CPER_SEV_CORRECTED = 2,
+ACPI_CPER_SEV_NONE = 3,
+};
+
+/*
  * Hardware Error Notification
  * ACPI 4.0: 17.3.2.7 Hardware Error Notification
  * Composes dummy Hardware Error Notification descriptor of specified type
@@ -73,6 +104,138 @@ static void build_ghes_hw_error_notification(GArray 
*table, const uint8_t type)
 }
 
 /*
+ * Generic Error Data Entry
+ * ACPI 6.1: 18.3.2.7.1 Generic Error Data
+ */
+static void acpi_ghes_generic_error_data(GArray *table,
+const uint8_t *section_type, uint32_t error_severity,
+uint8_t validation_bits, uint8_t flags,
+uint32_t error_data_length, QemuUUID fru_id,
+uint64_t time_stamp)
+{
+const uint8_t fru_text[20] = {0};
+
+/* Section Type */
+g_array_append_vals(table, section_type, 16);
+
+/* Error Severity */
+build_append_int_noprefix(table, error_severity, 4);
+/* Revision */
+build_append_int_noprefix(table, 0x300, 2);
+/* Validation Bits */
+build_append_int_noprefix(table, validation_bits, 1);
+/* Flags */
+build_append_int_noprefix(table, flags, 1);
+/* Error Data Length */
+build_append_int_noprefix(table, error_data_length, 4);
+
+/* FRU Id */
+g_array_append_vals(table, fru_id.data, ARRAY_SIZE(fru_id.data));
+
+/* FRU Text */
+g_array_append_vals(table, fru_text, sizeof(fru_text));
+
+/* Timestamp */
+build_append_int_noprefix(table, time_stamp, 8);
+}
+
+/*
+ * Generic Error Status Block
+ * ACPI 6.1: 18.3.2.7.1 Generic Error Data
+ */
+static void acpi_ghes_generic_error_status(GArray *table, uint32_t 
block_status,
+uint32_t raw_data_offset, uint32_t raw_data_length,
+uint32_t data_length, uint32_t error_severity)
+{
+/* Block Status */
+build_append_int_noprefix(table, block_status, 4);
+/* Raw Data Offset */
+build_append_int_noprefix(table, raw_data_offset, 4);
+/* Raw Data Length */
+build_append_int_noprefix(table, raw_data_length, 4);
+/* Data Length */
+build_append_int_noprefix(table, data_length, 4);
+/* Error Severity */
+build_append_int_noprefix(table, error_severity, 4);
+}
+
+/* UEFI 2.6: N.2.5 Memory Error Section */
+static void acpi_ghes_build_append_mem_cper(GArray *table,
+uint64_t error_physical_addr)
+{
+/*
+ * Memory Error Record
+ */
+
+/* Validation Bits */
+build_append_int_noprefix(table,
+  (1ULL << 14) | /* Type Valid */
+  (1ULL << 1) /* Physical Address Valid */,
+  8);
+/* Error Status */
+build_append_int_noprefix(table, 0, 8);
+/* Physical Address */

[PATCH v25 07/10] KVM: Move hwpoison page related functions into kvm-all.c

[Dongjiu Geng]

kvm_hwpoison_page_add() and kvm_unpoison_all() will both
be used by X86 and ARM platforms, so moving them into
"accel/kvm/kvm-all.c" to avoid duplicate code.

For architectures that don't use the poison-list functionality
the reset handler will harmlessly do nothing, so let's register
the kvm_unpoison_all() function in the generic kvm_init() function.

Reviewed-by: Peter Maydell 
Signed-off-by: Dongjiu Geng 
Signed-off-by: Xiang Zheng 
Acked-by: Xiang Zheng 
---
 accel/kvm/kvm-all.c  | 36 
 include/sysemu/kvm_int.h | 12 
 target/i386/kvm.c| 36 
 3 files changed, 48 insertions(+), 36 deletions(-)

diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 439a4ef..36be117 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -44,6 +44,7 @@
 #include "qapi/visitor.h"
 #include "qapi/qapi-types-common.h"
 #include "qapi/qapi-visit-common.h"
+#include "sysemu/reset.h"
 
 #include "hw/boards.h"
 
@@ -883,6 +884,39 @@ int kvm_vm_check_extension(KVMState *s, unsigned int 
extension)
 return ret;
 }
 
+typedef struct HWPoisonPage {
+ram_addr_t ram_addr;
+QLIST_ENTRY(HWPoisonPage) list;
+} HWPoisonPage;
+
+static QLIST_HEAD(, HWPoisonPage) hwpoison_page_list =
+QLIST_HEAD_INITIALIZER(hwpoison_page_list);
+
+static void kvm_unpoison_all(void *param)
+{
+HWPoisonPage *page, *next_page;
+
+QLIST_FOREACH_SAFE(page, &hwpoison_page_list, list, next_page) {
+QLIST_REMOVE(page, list);
+qemu_ram_remap(page->ram_addr, TARGET_PAGE_SIZE);
+g_free(page);
+}
+}
+
+void kvm_hwpoison_page_add(ram_addr_t ram_addr)
+{
+HWPoisonPage *page;
+
+QLIST_FOREACH(page, &hwpoison_page_list, list) {
+if (page->ram_addr == ram_addr) {
+return;
+}
+}
+page = g_new(HWPoisonPage, 1);
+page->ram_addr = ram_addr;
+QLIST_INSERT_HEAD(&hwpoison_page_list, page, list);
+}
+
 static uint32_t adjust_ioeventfd_endianness(uint32_t val, uint32_t size)
 {
 #if defined(HOST_WORDS_BIGENDIAN) != defined(TARGET_WORDS_BIGENDIAN)
@@ -2085,6 +2119,8 @@ static int kvm_init(MachineState *ms)
 s->kernel_irqchip_split = mc->default_kernel_irqchip_split ? 
ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
 }
 
+qemu_register_reset(kvm_unpoison_all, NULL);
+
 if (s->kernel_irqchip_allowed) {
 kvm_irqchip_create(s);
 }
diff --git a/include/sysemu/kvm_int.h b/include/sysemu/kvm_int.h
index ac2d1f8..c660a70 100644
--- a/include/sysemu/kvm_int.h
+++ b/include/sysemu/kvm_int.h
@@ -42,4 +42,16 @@ void kvm_memory_listener_register(KVMState *s, 
KVMMemoryListener *kml,
   AddressSpace *as, int as_id);
 
 void kvm_set_max_memslot_size(hwaddr max_slot_size);
+
+/**
+ * kvm_hwpoison_page_add:
+ *
+ * Parameters:
+ *  @ram_addr: the address in the RAM for the poisoned page
+ *
+ * Add a poisoned page to the list
+ *
+ * Return: None.
+ */
+void kvm_hwpoison_page_add(ram_addr_t ram_addr);
 #endif
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 4901c6d..34f8387 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -24,7 +24,6 @@
 #include "sysemu/sysemu.h"
 #include "sysemu/hw_accel.h"
 #include "sysemu/kvm_int.h"
-#include "sysemu/reset.h"
 #include "sysemu/runstate.h"
 #include "kvm_i386.h"
 #include "hyperv.h"
@@ -533,40 +532,6 @@ uint64_t kvm_arch_get_supported_msr_feature(KVMState *s, 
uint32_t index)
 }
 }
 
-
-typedef struct HWPoisonPage {
-ram_addr_t ram_addr;
-QLIST_ENTRY(HWPoisonPage) list;
-} HWPoisonPage;
-
-static QLIST_HEAD(, HWPoisonPage) hwpoison_page_list =
-QLIST_HEAD_INITIALIZER(hwpoison_page_list);
-
-static void kvm_unpoison_all(void *param)
-{
-HWPoisonPage *page, *next_page;
-
-QLIST_FOREACH_SAFE(page, &hwpoison_page_list, list, next_page) {
-QLIST_REMOVE(page, list);
-qemu_ram_remap(page->ram_addr, TARGET_PAGE_SIZE);
-g_free(page);
-}
-}
-
-static void kvm_hwpoison_page_add(ram_addr_t ram_addr)
-{
-HWPoisonPage *page;
-
-QLIST_FOREACH(page, &hwpoison_page_list, list) {
-if (page->ram_addr == ram_addr) {
-return;
-}
-}
-page = g_new(HWPoisonPage, 1);
-page->ram_addr = ram_addr;
-QLIST_INSERT_HEAD(&hwpoison_page_list, page, list);
-}
-
 static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap,
  int *max_banks)
 {
@@ -2180,7 +2145,6 @@ int kvm_arch_init(MachineState *ms, KVMState *s)
 fprintf(stderr, "e820_add_entry() table is full\n");
 return ret;
 }
-qemu_register_reset(kvm_unpoison_all, NULL);
 
 shadow_mem = object_property_get_int(OBJECT(s), "kvm-shadow-mem", 
&error_abort);
 if (shadow_mem != -1) {
-- 
1.8.3.1

[PATCH v25 03/10] docs: APEI GHES generation and CPER record description

[Dongjiu Geng]

Add APEI/GHES detailed design document

Signed-off-by: Dongjiu Geng 
Signed-off-by: Xiang Zheng 
Reviewed-by: Michael S. Tsirkin 
Reviewed-by: Igor Mammedov 
---
 docs/specs/acpi_hest_ghes.rst | 110 ++
 docs/specs/index.rst  |   1 +
 2 files changed, 111 insertions(+)
 create mode 100644 docs/specs/acpi_hest_ghes.rst

diff --git a/docs/specs/acpi_hest_ghes.rst b/docs/specs/acpi_hest_ghes.rst
new file mode 100644
index 000..68f1fbe
--- /dev/null
+++ b/docs/specs/acpi_hest_ghes.rst
@@ -0,0 +1,110 @@
+APEI tables generating and CPER record
+==
+
+..
+   Copyright (c) 2020 HUAWEI TECHNOLOGIES CO., LTD.
+
+   This work is licensed under the terms of the GNU GPL, version 2 or later.
+   See the COPYING file in the top-level directory.
+
+Design Details
+--
+
+::
+
+ etc/acpi/tables   etc/hardware_errors
+     ===
+  + +--+++
+  | | HEST | +->|error_block_address1
|--+
+  | +--+ |  ++ 
 |
+  | | GHES1| | +--->|error_block_address2
|--+-+
+  | +--+ | |++ 
 | |
+  | | .| | ||  ..| 
 | |
+  | | error_status_address-+-+ |-+ 
 | |
+  | | .|   |   +--->|error_block_addressN
|--+-+---+
+  | | read_ack_register+-+ |   |++ 
 | |   |
+  | | read_ack_preserve| +-+---+--->| read_ack_register1 | 
 | |   |
+  | | read_ack_write   |   |   |++ 
 | |   |
+  + +--+   | +-+--->| read_ack_register2 | 
 | |   |
+  | | GHES2|   | | |++ 
 | |   |
+  + +--+   | | ||   .| 
 | |   |
+  | | .|   | | |++ 
 | |   |
+  | | error_status_address-+---+ | | +->| read_ack_registerN | 
 | |   |
+  | | .| | | |  ++ 
 | |   |
+  | | read_ack_register+-+ | |  |Generic Error Status Block 
1|<-+ |   |
+  | | read_ack_preserve|   | |  |-++-+ 
   |   |
+  | | read_ack_write   |   | |  | |  CPER  | | 
   |   |
+  + +--|   | |  | |  CPER  | | 
   |   |
+  | | ...  |   | |  | |    | | 
   |   |
+  + +--+   | |  | |  CPER  | | 
   |   |
+  | | GHESN|   | |  |-++-| 
   |   |
+  + +--+   | |  |Generic Error Status Block 
2|<---+   |
+  | | .|   | |  |-++-+ 
   |
+  | | error_status_address-+---+ |  | |   CPER | | 
   |
+  | | .| |  | |   CPER | | 
   |
+  | | read_ack_register+-+  | |    | | 
   |
+  | | read_ack_preserve|| |   CPER | | 
   |
+  | | read_ack_write   |+-++-+ 
   |
+  + +--+| .. | 
   |
+|+ 
   |
+|Generic Error Status Block N 
|<--+
+|-+-+-+
+| |  CPER   | |
+| |  CPER   | |
+| |     | |
+| |  CPER   | |
++-+-+-+
+
+
+(1) QEMU generates the ACPI HEST table. This table goes in the current
+"etc/acpi/tables" fw_cfg blob. Each error source has different
+notification types.
+
+(2) A new fw_cfg blob called "etc/hardware_errors" is introduced. QEMU
+also needs to populate this blob. The "etc/hardware_errors" fw_cfg blob
+contains an address registers table and an Error Status Data Block table.
+
+(3) The address registers table contains N Error Block Address entries
+and N Read Ack Registe

Re: [PATCH v4 07/30] qcow2: Document the Extended L2 Entries feature

[Alberto Garcia]

On Thu 09 Apr 2020 05:12:16 PM CEST, Eric Blake wrote:
> Hmm - raw external files are incompatible with backing files.  Should
> we also document that extended L2 entries are incompatible with raw
> external files?

Ok, I can also add additional checks to forbid creating such images.

Berto

[PATCH for-5.0] qcow2: Add incompatibility note between backing files and raw external data files

[Alberto Garcia]

Backing files and raw external data files are mutually exclusive.
The documentation of the raw external data bit (in autoclear_features)
already indicates that, but we should also mention it on the other
side.

Suggested-by: Eric Blake 
Signed-off-by: Alberto Garcia 
---
 docs/interop/qcow2.txt | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/docs/interop/qcow2.txt b/docs/interop/qcow2.txt
index 640e0eca40..298a031310 100644
--- a/docs/interop/qcow2.txt
+++ b/docs/interop/qcow2.txt
@@ -25,6 +25,9 @@ The first cluster of a qcow2 image contains the file header:
 is stored (NB: The string is not null terminated). 0 if the
 image doesn't have a backing file.
 
+Note: backing files are incompatible with raw external data
+files (auto-clear feature bit 1).
+
  16 - 19:   backing_file_size
 Length of the backing file name in bytes. Must not be
 longer than 1023 bytes. Undefined if the image doesn't have
-- 
2.20.1

Re: [PATCH v1] nrf51: Fix last GPIO CNF address

[Peter Maydell]

On Fri, 10 Apr 2020 at 04:42, Andrew Jeffery  wrote:
> IIRC Phil wanted to enable sub-word accesses to the sample value
> registers but I didn't want to spread logic dealing with different access
> widths through the model. We already had a mechanism to describe the
> model's  supported access sizes (as opposed to the valid access sizes
> allowed by hardware) in the `impl` member of the MemoryRegionOps, so
> I was trying to use that, but it didn't work as I needed.
>
> The accesses generated at the point of the guest MMIO need to be
> expanded to the access width supported by the model and then the
> resulting data trimmed again upon returning the data (in the case of a
> read) via the MMIO operation.
>
> So the intent was less about unaligned accesses than enabling models
> implementations that only have to handle certain-sized access widths.
> It happens to help the unaligned access case as well.

Yeah, we definitely could do with improving things here, it is annoying
to have to write code for handling some of the oddball cases when you
have just one register that allows byte accesses or whatever.
The thing I have in the back of my mind as a concern is that we have
had several "is this a buffer overrun" questions where the answer has
been "it can't be, because the core code doesn't allow a call to the
read/write function for a 4 byte access where the address is not 4-aligned,
so my_byte_array[addr] is always in-bounds".
So if we change the core code we need to make sure we don't
inadvertently remove a restriction that was protecting us from a guest
escape...

-- PMM

Re: [PATCH v1 10/11] linux-user: fix /proc/self/stat handling

[Alex Bennée]

That was by inspection on my system which seems to truncate a lot earlier.
It would be nice to find where in the Linux kernel it is output but I
failed to grep the relevant function last night.

On Fri, 10 Apr 2020, 12:11 Philippe Mathieu-Daudé, 
wrote:

> Cc'ing Ludovic in case he can test with Guix-HPC.
>
> On 4/9/20 11:15 PM, Alex Bennée wrote:
> > In the original bug report long files names in Guix caused
> > /proc/self/stat be truncated without the trailing ") " as specified in
> > proc manpage which says:
> >  (2) comm  %s
> > The  filename of the executable, in parentheses.  This
> > is visible whether or not the  executable  is  swapped
> > out.
> >
> > Additionally it should only be reporting the executable name rather
> > than the full path. Fix both these failings while cleaning up the code
> > to use GString to build up the reported values. As the whole function
> > is cleaned up also adjust the white space to the current coding style.
> >
> > Message-ID: 
> > Reported-by: Brice Goglin 
> > Cc: Philippe_Mathieu-Daudé 
> > Signed-off-by: Alex Bennée 
> > ---
> >   linux-user/syscall.c | 43 +++
> >   1 file changed, 19 insertions(+), 24 deletions(-)
> >
> > diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> > index 6495ddc4cda..674f70e70a5 100644
> > --- a/linux-user/syscall.c
> > +++ b/linux-user/syscall.c
> > @@ -7295,34 +7295,29 @@ static int open_self_stat(void *cpu_env, int fd)
> >   {
> >   CPUState *cpu = env_cpu((CPUArchState *)cpu_env);
> >   TaskState *ts = cpu->opaque;
> > -abi_ulong start_stack = ts->info->start_stack;
> > +g_autoptr(GString) buf = g_string_new(NULL);
> >   int i;
> >
> >   for (i = 0; i < 44; i++) {
> > -  char buf[128];
> > -  int len;
> > -  uint64_t val = 0;
> > -
> > -  if (i == 0) {
> > -/* pid */
> > -val = getpid();
> > -snprintf(buf, sizeof(buf), "%"PRId64 " ", val);
> > -  } else if (i == 1) {
> > -/* app name */
> > -snprintf(buf, sizeof(buf), "(%s) ", ts->bprm->argv[0]);
> > -  } else if (i == 27) {
> > -/* stack bottom */
> > -val = start_stack;
> > -snprintf(buf, sizeof(buf), "%"PRId64 " ", val);
> > -  } else {
> > -/* for the rest, there is MasterCard */
> > -snprintf(buf, sizeof(buf), "0%c", i == 43 ? '\n' : ' ');
> > -  }
> > +if (i == 0) {
> > +/* pid */
> > +g_string_printf(buf, FMT_pid " ", getpid());
> > +} else if (i == 1) {
> > +/* app name */
> > +gchar *bin = g_strrstr(ts->bprm->argv[0], "/");
> > +bin = bin ? bin + 1 : ts->bprm->argv[0];
> > +g_string_printf(buf, "(%.15s) ", bin);
>
> 15 or 125? 15 seems short. From your previous test I understood it was
> 124, for
>
> sizeof("cat_with9_12345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890___40").
>
> > +} else if (i == 27) {
> > +/* stack bottom */
> > +g_string_printf(buf, TARGET_ABI_FMT_ld " ",
> ts->info->start_stack);
> > +} else {
> > +/* for the rest, there is MasterCard */
> > +g_string_printf(buf, "0%c", i == 43 ? '\n' : ' ');
> > +}
> >
> > -  len = strlen(buf);
> > -  if (write(fd, buf, len) != len) {
> > -  return -1;
> > -  }
> > +if (write(fd, buf->str, buf->len) != buf->len) {
> > +return -1;
> > +}
> >   }
> >
> >   return 0;
> >
>
>

Re: [Qemu-devel] Should memory hotplug work with vhost-user backends?

[Raphael Norwitz]

On Wed, Jul 03, 2019 at 11:04:31AM +0100, Stefan Hajnoczi wrote:
> On Tue, Jul 02, 2019 at 10:08:54PM +, Raphael Norwitz wrote:
> > For background I am trying to work around a ram slot limit imposed by the 
> > vhost-user protocol. We are having trouble reconciling the comment here: 
> > https://github.com/qemu/qemu/blob/master/hw/virtio/vhost-user.c#L333  that 
> > “For non-vring specific requests, like VHOST_USER_SET_MEM_TABLE., we just 
> > need to send it once the first time” and the high level implementation of 
> > memory hot-add, which calls set_mem_table every time a VM hot adds memory.
> > 
> > A few questions:
> > 1.
> > What exactly is the check `if 
> > (vhost_user_one_time_request(msg->hdr.request) && dev->vq_index != 0)` for? 
> > In the message for commit b931bfbf042983f311b3b09894d8030b2755a638, which 
> > introduced the check, I see it says “non-vring specific messages[, which 
> > should] be sent only once” and gives VHOST_USER_SET_MEM_TABLE as an example 
> > one such message. The `vhost_user_one_time_request()` call clearly checks 
> > whether this type of message is the kind of message is supposed to be sent 
> > once of which VHOST_USER_SET_MEM_TABLE is one. Why, then, does this commit 
> > add the check if `dev->vq_index != 0`? It seems like there is a latent 
> > assumption that after the first call dev->vq_index should be set to some 
> > value greater than one, however for many cases such as vhost-user-scsi 
> > devices we can see this is clearly not the case 
> > https://github.com/qemu/qemu/blob/master/hw/scsi/vhost-user-scsi.c#L95. Is 
> > this check then ‘broken’ for such devices?
> > 
> > 2.
> > If this check is indeed broken for such devices, and set_mem_table call is 
> > only supposed to be run once for such devices, is the ability to call it 
> > multiple times technically a bug for devices such as vhost-user-scsci 
> > devices? If so, this would imply that the existing ability to hot add 
> > memory to vhost-user-scsi devices is by extension technically a 
> > bug/unintended behavior. Is this the case?
> 
> Hi Raphael,
> David Gilbert and I recently came to the conclusion that memory hotplug
> is not safe in vhost-user device backends built using libvhost-user.

Hi David, Sefan,

Just want to follow up here. Sorry - I know this was a while ago.

I am looking to add postcopy migration support for my patch set lifting
the vhost-user max ram slots limitation
(https://lists.gnu.org/archive/html/qemu-devel/2020-01/msg06641.html)
and it seems the most convienient way to do this would be to add support
for my new protocol feature in libvhost-user and then test with
vhost-user-bridge.

I've briefly looked through the libvhost-user code and the hot-add path
looks safe enough to me (or at least no more broken than the regular
vhost-user memory hot-add path).

Can you elaborate a little more about why memory hot-add is unsafe with
vhost-user device backends built with libvhost-user, as opposed to those
using the raw vhost-user protocol semantics?


Thanks,
Raphael

> 
> It's likely that memory hotplug hasn't been fully thought through at the
> protocol specification and QEMU vhost-user master implementation levels
> either.
> 
> We didn't investigate deeper for the time being, but I'm not surprised
> that you've found inconsistencies.  The ability to hotplug memory is a
> valuable feature.  It will be necessary to get it working sooner or
> later.
> 
> Are you going to work on it?
> 
> Stefan

Re: [PATCH] MAINTAINERS: Add myself as vhost-user-blk maintainer

[Raphael Norwitz]

Ping

On Thu, Mar 26, 2020 at 04:47:35AM -0400, Raphael Norwitz wrote:
> As suggested by Michael, let's add me as a maintainer of
> vhost-user-blk and vhost-user-scsi.
> 
> CC: Michael S. Tsirkin 
> CC Peter Maydell 
> Signed-off-by: Raphael Norwitz 
> ---
>  MAINTAINERS | 12 
>  1 file changed, 12 insertions(+)
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index e580276..239ecc1 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1845,6 +1845,18 @@ F: hw/display/virtio-gpu*
>  F: hw/display/virtio-vga.*
>  F: include/hw/virtio/virtio-gpu.h
>  
> +vhost-user-blk
> +M: Raphael Norwitz 
> +S: Maintained
> +F: contrib/vhost-user-blk/
> +F: contrib/vhost-user-scsi/
> +F: hw/block/vhost-user-blk.c
> +F: hw/scsi/vhost-user-scsi.c
> +F: hw/virtio/vhost-user-blk-pci.c
> +F: hw/virtio/vhost-user-scsi-pci.c
> +F: include/hw/virtio/vhost-user-blk.h
> +F: include/hw/virtio/vhost-user-scsi.h
> +
>  vhost-user-gpu
>  M: Marc-André Lureau 
>  M: Gerd Hoffmann 
> -- 
> 1.8.3.1

Re: [PATCH v1 10/11] linux-user: fix /proc/self/stat handling

[Philippe Mathieu-Daudé]

On 4/10/20 2:33 PM, Alex Bennée wrote:
That was by inspection on my system which seems to truncate a lot 
earlier. It would be nice to find where in the Linux kernel it is output 
but I failed to grep the relevant function last night.


OK. Patch is correct with this value, so:
Reviewed-by: Philippe Mathieu-Daudé 



On Fri, 10 Apr 2020, 12:11 Philippe Mathieu-Daudé, > wrote:


Cc'ing Ludovic in case he can test with Guix-HPC.

On 4/9/20 11:15 PM, Alex Bennée wrote:
 > In the original bug report long files names in Guix caused
 > /proc/self/stat be truncated without the trailing ") " as
specified in
 > proc manpage which says:
 >      (2) comm  %s
 >             The  filename of the executable, in parentheses.  This
 >             is visible whether or not the  executable  is  swapped
 >             out.
 >
 > Additionally it should only be reporting the executable name rather
 > than the full path. Fix both these failings while cleaning up the
code
 > to use GString to build up the reported values. As the whole function
 > is cleaned up also adjust the white space to the current coding
style.
 >
 > Message-ID: mailto:fb4c55fa-d539-67ee-c6c9-de8fb63c8...@inria.fr>>
 > Reported-by: Brice Goglin mailto:brice.gog...@inria.fr>>
 > Cc: Philippe_Mathieu-Daudé mailto:phi...@redhat.com>>
 > Signed-off-by: Alex Bennée mailto:alex.ben...@linaro.org>>
 > ---
 >   linux-user/syscall.c | 43
+++
 >   1 file changed, 19 insertions(+), 24 deletions(-)
 >
 > diff --git a/linux-user/syscall.c b/linux-user/syscall.c
 > index 6495ddc4cda..674f70e70a5 100644
 > --- a/linux-user/syscall.c
 > +++ b/linux-user/syscall.c
 > @@ -7295,34 +7295,29 @@ static int open_self_stat(void *cpu_env,
int fd)
 >   {
 >       CPUState *cpu = env_cpu((CPUArchState *)cpu_env);
 >       TaskState *ts = cpu->opaque;
 > -    abi_ulong start_stack = ts->info->start_stack;
 > +    g_autoptr(GString) buf = g_string_new(NULL);
 >       int i;
 >
 >       for (i = 0; i < 44; i++) {
 > -      char buf[128];
 > -      int len;
 > -      uint64_t val = 0;
 > -
 > -      if (i == 0) {
 > -        /* pid */
 > -        val = getpid();
 > -        snprintf(buf, sizeof(buf), "%"PRId64 " ", val);
 > -      } else if (i == 1) {
 > -        /* app name */
 > -        snprintf(buf, sizeof(buf), "(%s) ", ts->bprm->argv[0]);
 > -      } else if (i == 27) {
 > -        /* stack bottom */
 > -        val = start_stack;
 > -        snprintf(buf, sizeof(buf), "%"PRId64 " ", val);
 > -      } else {
 > -        /* for the rest, there is MasterCard */
 > -        snprintf(buf, sizeof(buf), "0%c", i == 43 ? '\n' : ' ');
 > -      }
 > +        if (i == 0) {
 > +            /* pid */
 > +            g_string_printf(buf, FMT_pid " ", getpid());
 > +        } else if (i == 1) {
 > +            /* app name */
 > +            gchar *bin = g_strrstr(ts->bprm->argv[0], "/");
 > +            bin = bin ? bin + 1 : ts->bprm->argv[0];
 > +            g_string_printf(buf, "(%.15s) ", bin);

15 or 125? 15 seems short. From your previous test I understood it was
124, for

sizeof("cat_with9_12345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890___40").

 > +        } else if (i == 27) {
 > +            /* stack bottom */
 > +            g_string_printf(buf, TARGET_ABI_FMT_ld " ",
ts->info->start_stack);
 > +        } else {
 > +            /* for the rest, there is MasterCard */


Already 23 years =)


 > +            g_string_printf(buf, "0%c", i == 43 ? '\n' : ' ');
 > +        }
 >
 > -      len = strlen(buf);
 > -      if (write(fd, buf, len) != len) {
 > -          return -1;
 > -      }
 > +        if (write(fd, buf->str, buf->len) != buf->len) {
 > +            return -1;
 > +        }
 >       }
 >
 >       return 0;
 >

Re: [PATCH v4 20/30] qcow2: Add subcluster support to discard_in_l2_slice()

[Alberto Garcia]

On Thu 09 Apr 2020 12:05:12 PM CEST, Max Reitz wrote:
>>  switch (qcow2_get_cluster_type(bs, old_l2_entry)) {
>>  case QCOW2_CLUSTER_UNALLOCATED:
>> -if (full_discard || !bs->backing) {
>> +if (full_discard) {
>> +/* If the image has extended L2 entries we can only
>> + * skip this operation if the L2 bitmap is zero. */
>> +uint64_t bitmap = has_subclusters(s) ?
>> +get_l2_bitmap(s, l2_slice, l2_index + i) : 0;
>
> Isn’t this bitmap only valid for standard clusters?  In this case, the
> whole cluster is unallocated, so the bitmap shouldn’t be relevant,
> AFAIU.

I'm not sure if I follow you.

An unallocated cluster can still have QCOW_OFLAG_SUB_ZERO set in some of
its subclusters. Those read as zeroes and the rest go to the backing
file.

After a full discard all subclusters should be completely deallocated so
those bits should be cleared.

If the bitmap is already 0 (the whole cluster is already unallocated) or
if the image does not have extended L2 entries (which also means that
the whole cluster is already unallocated) then we can skip the discard.

Berto

Feature and message numbers missing in vhost-user.c

[Raphael Norwitz]

Hi MST,

I see that a new feature, VHOST_USER_PROTOCOL_F_INBAND_NOTIFICATIONS
(https://git.qemu.org/?p=qemu.git;a=blob;f=docs/interop/vhost-user.rst;h=3b1b6602c77932101e1e3b098e35c2497f5b0260;hb=HEAD#l817),
and corresponding VHOST_USER_VRING_KICK
(https://git.qemu.org/?p=qemu.git;a=blob;f=docs/interop/vhost-user.rst;h=3b1b6602c77932101e1e3b098e35c2497f5b0260;hb=HEAD#l1252)
message has been added to the documentation for the vhost-user protocol
and seem to be added in libvhost-user. However I don’t see the feature
or message number reserved in the core vhost-user code
(https://git.qemu.org/?p=qemu.git;a=blob;f=hw/virtio/vhost-user.c;h=08e7e63790e5bcfae6cd31bf9ccd32c3a7347f4e;hb=HEAD#l47)

I understand these features are mostly for simulation, but surely
the numbers for these features should at least be reserved as more
features and messages are frequently being added.

Is this an oversight? With the aim of preventing future confusion should
I send a patch to add them in /hw/virtio/vhost-user.c?

Thanks,
Raphael

Re: [PATCH v2] Makefile: libfdt: build only the strict necessary

[Philippe Mathieu-Daudé]

On 4/9/20 6:33 PM, Philippe Mathieu-Daudé wrote:

Hi Claudio,

On 4/9/20 2:43 PM, Claudio Fontana wrote:

when building dtc/libfdt, we were previously using dtc/Makefile,
which tries to build some artifacts that are not needed,
and can complain on stderr about the absence of tools that
are not required to build just libfdt.

Instead, build only the strict necessary to get libfdt.a .

Remove the subdir-dtc "compatibility gunk" for recursion,
since we are not recursing anymore.

Signed-off-by: Claudio Fontana 
---
  Makefile  | 23 +--
  configure |  6 +-
  rules.mak |  2 ++
  3 files changed, 16 insertions(+), 15 deletions(-)

v1 -> v2:

* fix error generated when running UNCHECKED_GOALS without prior 
configure,
   for example during make docker-image-fedora. Without configure, 
DSOSUF is
   empty, and the module pattern rule in rules.mak that uses this 
variable

   can match too much; provide a default in the Makefile to avoid it.

* only attempt to build the archive when there is a non-empty list of 
objects.
   This could be done in general for the %.a: pattern in rules.mak, 
but maybe

   there are valid reasons to build an empty .a?

* removed some intermediate variables that did not add much value
   (LIBFDT_srcdir, LIBFDT_archive)

Tested locally with 3 VPATH configurations (no-, VPATH, VPATH in src 
subdir),
and with docker-image-fedora, docker-test-debug@fedora that failed 
before.


diff --git a/Makefile b/Makefile
index 84ef881600..92bc853b5f 100644
--- a/Makefile
+++ b/Makefile
@@ -4,6 +4,10 @@ ifneq ($(words $(subst :, ,$(CURDIR))), 1)
    $(error main directory cannot contain spaces nor colons)
  endif
+# some pattern rules in rules.mak are confused by an empty DSOSUF,
+# and UNCHECKED_GOALS for testing (docker-) can run without prior 
configure.

+DSOSUF ?= ".so"
+
  # Always point to the root of the build tree (needs GNU make).
  BUILD_DIR=$(CURDIR)
@@ -526,15 +530,16 @@ $(SOFTMMU_FUZZ_RULES): $(edk2-decompressed)
  $(TARGET_DIRS_RULES):
  $(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $(dir $@) 
V="$(V)" TARGET_DIR="$(dir $@)" $(notdir $@),)
-DTC_MAKE_ARGS=-I$(SRC_PATH)/dtc VPATH=$(SRC_PATH)/dtc -C dtc V="$(V)" 
LIBFDT_srcdir=$(SRC_PATH)/dtc/libfdt

-DTC_CFLAGS=$(CFLAGS) $(QEMU_CFLAGS)
-DTC_CPPFLAGS=-I$(BUILD_DIR)/dtc -I$(SRC_PATH)/dtc 
-I$(SRC_PATH)/dtc/libfdt

-
-.PHONY: dtc/all
-dtc/all: .git-submodule-status dtc/libfdt dtc/tests


I'm getting:

config-host.mak is out-of-date, running configure
make: *** No rule to make target 'dtc/all', needed by 'config-host.h'. 
Stop.


On second try it works.


FYI same happens when going back (previous this patch applied) but there 
is nothing we can do to prevent that afaik:


config-host.mak is out-of-date, running configure
make: *** No rule to make target 'libfdt', needed by 'config-host.h'.  Stop.



Instead of alarming users, we could keep this target as a silent no-op, 
then remove it after some time.


For the rest, patch looks good, nice cleanup!

Regards,

Phil.

-    $(call quiet-command,$(MAKE) $(DTC_MAKE_ARGS) 
CPPFLAGS="$(DTC_CPPFLAGS)" CFLAGS="$(DTC_CFLAGS)" 
LDFLAGS="$(QEMU_LDFLAGS)" ARFLAGS="$(ARFLAGS)" CC="$(CC)" AR="$(AR)" 
LD="$(LD)" $(SUBDIR_MAKEFLAGS) libfdt/libfdt.a,)

+LIBFDT_objdir = dtc/libfdt
+-include $(SRC_PATH)/dtc/libfdt/Makefile.libfdt
+LIBFDT_objects = $(addprefix $(LIBFDT_objdir)/, $(LIBFDT_OBJS))
+.PHONY: libfdt
+libfdt: .git-submodule-status $(LIBFDT_objdir)/libfdt.a
+$(LIBFDT_objdir)/libfdt.a: $(LIBFDT_objects)
+    $(if $(LIBFDT_objects),$(call quiet-command,rm -f $@ && $(AR) rcs 
$@ $^,"AR","$(TARGET_DIR)$@"),)

-dtc/%: .git-submodule-status
+$(LIBFDT_objects): | $(LIBFDT_objdir)
+$(LIBFDT_objdir): .git-submodule-status
  @mkdir -p $@
  # Overriding CFLAGS causes us to lose defines added in the 
sub-makefile.

@@ -563,7 +568,6 @@ slirp/all: .git-submodule-status
  # Compatibility gunk to keep make working across the rename of targets
  # for recursion, to be removed some time after 4.1.
-subdir-dtc: dtc/all
  subdir-capstone: capstone/all
  subdir-slirp: slirp/all
@@ -821,7 +825,6 @@ distclean: clean
  rm -rf $$d || exit 1 ; \
  done
  rm -Rf .sdk
-    if test -f dtc/version_gen.h; then $(MAKE) $(DTC_MAKE_ARGS) 
clean; fi

  KEYMAPS=da en-gb  et  fr fr-ch  is  lt  no  pt-br  sv \
  ar  de en-us  fi  fr-be  hr it  lv  nl pl  
ru th \

diff --git a/configure b/configure
index 233c671aaa..36f83ffc5a 100755
--- a/configure
+++ b/configure
@@ -4278,10 +4278,6 @@ EOF
    if test -d "${source_path}/dtc/libfdt" || test -e 
"${source_path}/.git" ; then

    fdt=git
    mkdir -p dtc
-  if [ "$pwd_is_source_path" != "y" ] ; then
-  symlink "$source_path/dtc/Makefile" "dtc/Makefile"
-  symlink "$source_path/dtc/scripts" "dtc/scripts"
-  fi
    fdt_cflags="-I\$(SRC_PATH)/dtc/libfdt"
    fdt_ldflags="-L\$(BUILD_DIR)/dtc/libfdt"
    fdt_libs="$fdt_libs"
@@ -

Re: [PATCH v1 09/11] gdbstub: i386: Fix gdb_get_reg16() parameter to unbreak gdb

[Stefano Garzarella]

On Thu, Apr 09, 2020 at 10:15:27PM +0100, Alex Bennée wrote:
> From: Peter Xu 
> 
> We should only pass in gdb_get_reg16() with the GByteArray* object
> itself, no need to shift.  Without this patch, gdb remote attach will
> crash QEMU.
> 
> Fixes: a010bdbe719 ("extend GByteArray to read register helpers")
> Signed-off-by: Peter Xu 
> Reviewed-by: Philippe Mathieu-Daudé 
> Signed-off-by: Alex Bennée 
> Message-Id: <20200409164954.36902-3-pet...@redhat.com>
> ---
>  target/i386/gdbstub.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/target/i386/gdbstub.c b/target/i386/gdbstub.c
> index f3d23b614ee..b98a99500ae 100644
> --- a/target/i386/gdbstub.c
> +++ b/target/i386/gdbstub.c
> @@ -106,7 +106,7 @@ int x86_cpu_gdb_read_register(CPUState *cs, GByteArray 
> *mem_buf, int n)
>  } else if (n >= IDX_FP_REGS && n < IDX_FP_REGS + 8) {
>  floatx80 *fp = (floatx80 *) &env->fpregs[n - IDX_FP_REGS];
>  int len = gdb_get_reg64(mem_buf, cpu_to_le64(fp->low));
> -len += gdb_get_reg16(mem_buf + len, cpu_to_le16(fp->high));
> +len += gdb_get_reg16(mem_buf, cpu_to_le16(fp->high));
>  return len;
>  } else if (n >= IDX_XMM_REGS && n < IDX_XMM_REGS + CPU_NB_REGS) {
>  n -= IDX_XMM_REGS;
> -- 
> 2.20.1
> 
>

I had the following issue while attaching to qemu started with gdbserver
listening:

(gdb) target remote :1234
Remote debugging using :1234
Remote communication error.  Target disconnected.: Connection reset by peer.

$ qemu-system-x86_64 -m 1G -smp 4 ... -s
ERROR:qemu/gdbstub.c:1843:handle_read_all_regs: assertion failed: (len == 
gdbserver_state.mem_buf->len)
Bail out! ERROR:qemu/gdbstub.c:1843:handle_read_all_regs: assertion failed: 
(len == gdbserver_state.mem_buf->len)


Thanks to Philippe, I tried this patch and it solves my issue:

Tested-by: Stefano Garzarella 

Thanks,
Stefano

Re: [PATCH v1 10/11] linux-user: fix /proc/self/stat handling

[Brice Goglin]

Le 10/04/2020 à 14:33, Alex Bennée a écrit :
> That was by inspection on my system which seems to truncate a lot
> earlier. It would be nice to find where in the Linux kernel it is
> output but I failed to grep the relevant function last night.


It's in proc/array.c, do_task_stat() calls proc_task_name(). In the end,
it seems to use task->tcomm or task->comm which is limited by

#define TASK_COMM_LEN   16

Brice



>
> On Fri, 10 Apr 2020, 12:11 Philippe Mathieu-Daudé,  > wrote:
>
> Cc'ing Ludovic in case he can test with Guix-HPC.
>
> On 4/9/20 11:15 PM, Alex Bennée wrote:
> > In the original bug report long files names in Guix caused
> > /proc/self/stat be truncated without the trailing ") " as
> specified in
> > proc manpage which says:
> >      (2) comm  %s
> >             The  filename of the executable, in parentheses.  This
> >             is visible whether or not the  executable  is  swapped
> >             out.
> >
> > Additionally it should only be reporting the executable name rather
> > than the full path. Fix both these failings while cleaning up
> the code
> > to use GString to build up the reported values. As the whole
> function
> > is cleaned up also adjust the white space to the current coding
> style.
> >
> > Message-ID:  >
> > Reported-by: Brice Goglin  >
> > Cc: Philippe_Mathieu-Daudé  >
> > Signed-off-by: Alex Bennée  >
> > ---
> >   linux-user/syscall.c | 43
> +++
> >   1 file changed, 19 insertions(+), 24 deletions(-)
> >
> > diff --git a/linux-user/syscall.c b/linux-user/syscall.c
> > index 6495ddc4cda..674f70e70a5 100644
> > --- a/linux-user/syscall.c
> > +++ b/linux-user/syscall.c
> > @@ -7295,34 +7295,29 @@ static int open_self_stat(void *cpu_env,
> int fd)
> >   {
> >       CPUState *cpu = env_cpu((CPUArchState *)cpu_env);
> >       TaskState *ts = cpu->opaque;
> > -    abi_ulong start_stack = ts->info->start_stack;
> > +    g_autoptr(GString) buf = g_string_new(NULL);
> >       int i;
> >   
> >       for (i = 0; i < 44; i++) {
> > -      char buf[128];
> > -      int len;
> > -      uint64_t val = 0;
> > -
> > -      if (i == 0) {
> > -        /* pid */
> > -        val = getpid();
> > -        snprintf(buf, sizeof(buf), "%"PRId64 " ", val);
> > -      } else if (i == 1) {
> > -        /* app name */
> > -        snprintf(buf, sizeof(buf), "(%s) ", ts->bprm->argv[0]);
> > -      } else if (i == 27) {
> > -        /* stack bottom */
> > -        val = start_stack;
> > -        snprintf(buf, sizeof(buf), "%"PRId64 " ", val);
> > -      } else {
> > -        /* for the rest, there is MasterCard */
> > -        snprintf(buf, sizeof(buf), "0%c", i == 43 ? '\n' : ' ');
> > -      }
> > +        if (i == 0) {
> > +            /* pid */
> > +            g_string_printf(buf, FMT_pid " ", getpid());
> > +        } else if (i == 1) {
> > +            /* app name */
> > +            gchar *bin = g_strrstr(ts->bprm->argv[0], "/");
> > +            bin = bin ? bin + 1 : ts->bprm->argv[0];
> > +            g_string_printf(buf, "(%.15s) ", bin);
>
> 15 or 125? 15 seems short. From your previous test I understood it
> was
> 124, for
> 
> sizeof("cat_with9_12345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890___40").
>
> > +        } else if (i == 27) {
> > +            /* stack bottom */
> > +            g_string_printf(buf, TARGET_ABI_FMT_ld " ",
> ts->info->start_stack);
> > +        } else {
> > +            /* for the rest, there is MasterCard */
> > +            g_string_printf(buf, "0%c", i == 43 ? '\n' : ' ');
> > +        }
> >   
> > -      len = strlen(buf);
> > -      if (write(fd, buf, len) != len) {
> > -          return -1;
> > -      }
> > +        if (write(fd, buf->str, buf->len) != buf->len) {
> > +            return -1;
> > +        }
> >       }
> >   
> >       return 0;
> >
>

Re: [PATCH v1] nrf51: Fix last GPIO CNF address

[Andrew Jeffery]

On Fri, 10 Apr 2020, at 21:56, Peter Maydell wrote:
> On Fri, 10 Apr 2020 at 04:42, Andrew Jeffery  wrote:
> > IIRC Phil wanted to enable sub-word accesses to the sample value
> > registers but I didn't want to spread logic dealing with different access
> > widths through the model. We already had a mechanism to describe the
> > model's  supported access sizes (as opposed to the valid access sizes
> > allowed by hardware) in the `impl` member of the MemoryRegionOps, so
> > I was trying to use that, but it didn't work as I needed.
> >
> > The accesses generated at the point of the guest MMIO need to be
> > expanded to the access width supported by the model and then the
> > resulting data trimmed again upon returning the data (in the case of a
> > read) via the MMIO operation.
> >
> > So the intent was less about unaligned accesses than enabling models
> > implementations that only have to handle certain-sized access widths.
> > It happens to help the unaligned access case as well.
> 
> Yeah, we definitely could do with improving things here, it is annoying
> to have to write code for handling some of the oddball cases when you
> have just one register that allows byte accesses or whatever.
> The thing I have in the back of my mind as a concern is that we have
> had several "is this a buffer overrun" questions where the answer has
> been "it can't be, because the core code doesn't allow a call to the
> read/write function for a 4 byte access where the address is not 4-aligned,
> so my_byte_array[addr] is always in-bounds".
> So if we change the core code we need to make sure we don't
> inadvertently remove a restriction that was protecting us from a guest
> escape...

Oh for sure. The patch was very RFC, as mentioned I just sent it to check
whether I was on the right track or off in the weeds, and from there it has
hung around in Cedric's tree without much progress.

Feels like the time is right to sort the problem out properly, which might
mean starting from scratch to make sure we don't miss any of the details.

Andrew

Re: [Qemu devel PATCH v3 1/3] hw/net: Add Smartfusion2 emac block

[sundeep subbaraya]

Hi Jason,

On Thu, Apr 9, 2020 at 9:40 AM Jason Wang  wrote:
>
>
> On 2020/4/7 下午7:15, sundeep.l...@gmail.com wrote:
> > From: Subbaraya Sundeep 
> >
> > Modelled Ethernet MAC of Smartfusion2 SoC.
> > Micrel KSZ8051 PHY is present on Emcraft's
> > SOM kit hence same PHY is emulated.
> >
> > Signed-off-by: Subbaraya Sundeep 
> > ---
> >   MAINTAINERS|   2 +
> >   hw/net/Makefile.objs   |   1 +
> >   hw/net/msf2-emac.c | 556 
> > +
> >   include/hw/net/msf2-emac.h |  50 
> >   4 files changed, 609 insertions(+)
> >   create mode 100644 hw/net/msf2-emac.c
> >   create mode 100644 include/hw/net/msf2-emac.h
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 9d156d7..6a103f2 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -918,6 +918,8 @@ F: include/hw/arm/msf2-soc.h
> >   F: include/hw/misc/msf2-sysreg.h
> >   F: include/hw/timer/mss-timer.h
> >   F: include/hw/ssi/mss-spi.h
> > +F: hw/net/msf2-emac.c
> > +F: include/hw/net/msf2-emac.h
> >
> >   Emcraft M2S-FG484
> >   M: Subbaraya Sundeep 
> > diff --git a/hw/net/Makefile.objs b/hw/net/Makefile.objs
> > index af4d194..f2b7398 100644
> > --- a/hw/net/Makefile.objs
> > +++ b/hw/net/Makefile.objs
> > @@ -55,3 +55,4 @@ common-obj-$(CONFIG_ROCKER) += rocker/rocker.o 
> > rocker/rocker_fp.o \
> >   obj-$(call lnot,$(CONFIG_ROCKER)) += rocker/qmp-norocker.o
> >
> >   common-obj-$(CONFIG_CAN_BUS) += can/
> > +common-obj-$(CONFIG_MSF2) += msf2-emac.o
> > diff --git a/hw/net/msf2-emac.c b/hw/net/msf2-emac.c
> > new file mode 100644
> > index 000..cb80e19
> > --- /dev/null
> > +++ b/hw/net/msf2-emac.c
> > @@ -0,0 +1,556 @@
> > +/*
> > + * QEMU model of the Smartfusion2 Ethernet MAC.
> > + *
> > + * Copyright (c) 2020 Subbaraya Sundeep .
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a 
> > copy
> > + * of this software and associated documentation files (the "Software"), 
> > to deal
> > + * in the Software without restriction, including without limitation the 
> > rights
> > + * to use, copy, modify, merge, publish, distribute, sublicense, and/or 
> > sell
> > + * copies of the Software, and to permit persons to whom the Software is
> > + * furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice shall be included 
> > in
> > + * all copies or substantial portions of the Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 
> > OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 
> > OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
> > FROM,
> > + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 
> > IN
> > + * THE SOFTWARE.
> > + *
> > + * Refer to section Ethernet MAC in the document:
> > + * UG0331: SmartFusion2 Microcontroller Subsystem User Guide
> > + * Datasheet URL:
> > + * 
> > https://www.microsemi.com/document-portal/cat_view/56661-internal-documents/
> > + * 56758-soc?lang=en&limit=20&limitstart=220
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "qemu-common.h"
> > +#include "qemu/log.h"
> > +#include "exec/address-spaces.h"
> > +#include "hw/registerfields.h"
> > +#include "hw/net/msf2-emac.h"
> > +#include "hw/net/mii.h"
> > +#include "hw/irq.h"
> > +#include "net/net.h"
> > +#include "hw/qdev-properties.h"
> > +#include "migration/vmstate.h"
> > +
> > +REG32(CFG1, 0x0)
> > +REG32(CFG2, 0x4)
> > +REG32(IFG, 0x8)
> > +REG32(HALF_DUPLEX, 0xc)
> > +REG32(FRM_LEN, 0x10)
> > +REG32(MII_CMD, 0x24)
> > +REG32(MII_ADDR, 0x28)
> > +REG32(MII_CTL, 0x2c)
> > +REG32(MII_STS, 0x30)
> > +REG32(STA1, 0x40)
> > +REG32(STA2, 0x44)
> > +REG32(FIFO_CFG0, 0x48)
> > +REG32(DMA_TX_CTL, 0x180)
> > +REG32(DMA_TX_DESC, 0x184)
> > +REG32(DMA_TX_STATUS, 0x188)
> > +REG32(DMA_RX_CTL, 0x18c)
> > +REG32(DMA_RX_DESC, 0x190)
> > +REG32(DMA_RX_STATUS, 0x194)
> > +REG32(DMA_IRQ_MASK, 0x198)
> > +REG32(DMA_IRQ, 0x19c)
> > +
> > +FIELD(DMA, PKTCNT, 16, 8)
> > +
> > +#define R_DMA_PKT_TXRX  (1 << 0)
> > +#define DMA_TX_UNDERRUN (1 << 1)
> > +#define DMA_RX_OVERFLOW (1 << 2)
> > +
> > +#define EMPTY_MASK  (1 << 31)
> > +#define PKT_SIZE0x7FF
> > +
> > +#define CFG1_RESET  (1 << 31)
> > +#define CFG1_RX_EN  (1 << 2)
> > +#define CFG1_TX_EN  (1 << 0)
> > +
> > +#define DMA_TX_CTL_EN   (1 << 0)
> > +#define DMA_RX_CTL_EN   (1 << 0)
> > +
> > +#define MII_CMD_READ(1 << 0)
> > +
> > +#define PHYADDR 0x1
> > +#define MII_ADDR_MASK   0x1F
> > +#define PHY_ADDR_SHIFT  8
> > +#define MAX_PKT_SIZE2048
> > +
> > +typedef struct {
> > +uint3

Re: [RFC PATCH v2] target/ppc: Enable hardfloat for PPC

[Yonggang Luo]

Are this stable now? I'd like to see hard float to be landed:)

On Wed, Feb 19, 2020 at 1:19 AM BALATON Zoltan  wrote:

> While other targets take advantage of using host FPU to do floating
> point computations, this was disabled for PPC target because always
> clearing exception flags before every FP op made it slightly slower
> than emulating everyting with softfloat. To emulate some FPSCR bits,
> clearing of fp_status may be necessary (unless these could be handled
> e.g. using FP exceptions on host but there's no API for that in QEMU
> yet) but preserving at least the inexact flag makes hardfloat usable
> and faster than softfloat. Since most clients don't actually care
> about this flag, we can gain some speed trading some emulation
> accuracy.
>
> This patch implements a simple way to keep the inexact flag set for
> hardfloat while still allowing to revert to softfloat for workloads
> that need more accurate albeit slower emulation. (Set hardfloat
> property of CPU, i.e. -cpu name,hardfloat=false for that.) There may
> still be room for further improvement but this seems to increase
> floating point performance. Unfortunately the softfloat case is slower
> than before this patch so this patch only makes sense if the default
> is also set to enable hardfloat.
>
> Because of the above this patch at the moment is mainly for testing
> different workloads to evaluate how viable would this be in practice.
> Thus, RFC and not ready for merge yet.
>
> Signed-off-by: BALATON Zoltan 
> ---
> v2: use different approach to avoid needing if () in
> helper_reset_fpstatus() but this does not seem to change overhead
> much, also make it a single patch as adding the hardfloat option is
> only a few lines; with this we can use same value at other places where
> float_status is reset and maybe enable hardfloat for a few more places
> for a little more performance but not too much. With this I got:
>
> lame: 3:13, lame_vmx: 1:55 (this is probably within jitter though and
> still far from the results on real hardware) also tried mplayer test
> and got results between 144-146s (this test is more VMX bound).
>
> I've also done some profiling for hardfloat=true and false cases with
> this patch to see what are the hot functions. Results are:
>
> Overhead  Command  Symbol
> -cpu G4,hardfloat=false, lame:
>9.82%  qemu-system-ppc  [.] round_canonical
>8.35%  qemu-system-ppc  [.] soft_f64_muladd
>7.16%  qemu-system-ppc  [.] soft_f64_addsub
>5.27%  qemu-system-ppc  [.] float32_to_float64
>5.20%  qemu-system-ppc  [.] helper_compute_fprf_float64
>4.61%  qemu-system-ppc  [.] helper_frsp
>4.59%  qemu-system-ppc  [.] soft_f64_mul
>4.01%  qemu-system-ppc  [.] float_to_float.isra.26
>3.84%  qemu-system-ppc  [.] float64_classify
>2.97%  qemu-system-ppc  [.] do_float_check_status
>
> -cpu G4,hardfloat=false, lame_vmx:
> Overhead  Command  Symbol
>   10.04%  qemu-system-ppc  [.] float32_muladd
>9.49%  qemu-system-ppc  [.] helper_vperm
>6.10%  qemu-system-ppc  [.] round_canonical
>4.13%  qemu-system-ppc  [.] soft_f64_addsub
>3.23%  qemu-system-ppc  [.] helper_frsp
>3.13%  qemu-system-ppc  [.] soft_f64_muladd
>2.88%  qemu-system-ppc  [.] helper_vmaddfp
>2.69%  qemu-system-ppc  [.] float32_add
>2.60%  qemu-system-ppc  [.] float32_to_float64
>2.52%  qemu-system-ppc  [.] helper_compute_fprf_float64
>
> -cpu G4,hardfloat=true, lame:
>   11.59%  qemu-system-ppc  [.] round_canonical
>6.18%  qemu-system-ppc  [.] helper_compute_fprf_float64
>6.01%  qemu-system-ppc  [.] float32_to_float64
>4.58%  qemu-system-ppc  [.] float64_classify
>3.87%  qemu-system-ppc  [.] helper_frsp
>3.75%  qemu-system-ppc  [.] float_to_float.isra.26
>3.48%  qemu-system-ppc  [.] helper_todouble
>3.31%  qemu-system-ppc  [.] float64_muladd
>3.21%  qemu-system-ppc  [.] do_float_check_status
>3.01%  qemu-system-ppc  [.] float64_mul
>
> -cpu G4,hardfloat=true, lame_vmx:
>9.34%  qemu-system-ppc  [.] float32_muladd
>8.83%  qemu-system-ppc  [.] helper_vperm
>5.41%  qemu-system-ppc  [.] round_canonical
>4.51%  qemu-system-ppc  [.] page_collection_lock
>3.58%  qemu-system-ppc  [.] page_trylock_add.isra.17
>2.71%  qemu-system-ppc  [.] helper_vmaddfp
>2.53%  qemu-system-ppc  [.] float32_add
>2.30%  qemu-system-ppc  [.] helper_compute_fprf_float64
>2.21%  qemu-system-ppc  [.] float32_to_float64
>2.06%  qemu-system-ppc  [.] helper_frsp
>
> round_canonical seems to come up frequently in this with large overhead.
>
> Could those with better test cases or benchmarks give it a test please
> on different CPUs to see what else this would break?
>
> ---
> fpu/softfloat.c | 14 +++---
>  target/ppc/cpu.h|  2 ++
>  target/ppc/fpu_helper.c | 32 
>  target/ppc/translate_init.inc.c |  3 +++
>  4 files changed, 28 insertions(+), 23 deletions(-)
>
> diff --git

Re: [PATCH v2] Makefile: libfdt: build only the strict necessary

[Claudio Fontana]

Hello Philippe, Markus,

On 4/10/20 3:00 PM, Philippe Mathieu-Daudé wrote:
> On 4/9/20 6:33 PM, Philippe Mathieu-Daudé wrote:
>> Hi Claudio,
>>
>> On 4/9/20 2:43 PM, Claudio Fontana wrote:
>>> when building dtc/libfdt, we were previously using dtc/Makefile,
>>> which tries to build some artifacts that are not needed,
>>> and can complain on stderr about the absence of tools that
>>> are not required to build just libfdt.
>>>
>>> Instead, build only the strict necessary to get libfdt.a .
>>>
>>> Remove the subdir-dtc "compatibility gunk" for recursion,
>>> since we are not recursing anymore.
>>>
>>> Signed-off-by: Claudio Fontana 
>>> ---
>>>   Makefile  | 23 +--
>>>   configure |  6 +-
>>>   rules.mak |  2 ++
>>>   3 files changed, 16 insertions(+), 15 deletions(-)
>>>
>>> v1 -> v2:
>>>
>>> * fix error generated when running UNCHECKED_GOALS without prior 
>>> configure,
>>>    for example during make docker-image-fedora. Without configure, 
>>> DSOSUF is
>>>    empty, and the module pattern rule in rules.mak that uses this 
>>> variable
>>>    can match too much; provide a default in the Makefile to avoid it.
>>>
>>> * only attempt to build the archive when there is a non-empty list of 
>>> objects.
>>>    This could be done in general for the %.a: pattern in rules.mak, 
>>> but maybe
>>>    there are valid reasons to build an empty .a?
>>>
>>> * removed some intermediate variables that did not add much value
>>>    (LIBFDT_srcdir, LIBFDT_archive)
>>>
>>> Tested locally with 3 VPATH configurations (no-, VPATH, VPATH in src 
>>> subdir),
>>> and with docker-image-fedora, docker-test-debug@fedora that failed 
>>> before.
>>>
>>> diff --git a/Makefile b/Makefile
>>> index 84ef881600..92bc853b5f 100644
>>> --- a/Makefile
>>> +++ b/Makefile
>>> @@ -4,6 +4,10 @@ ifneq ($(words $(subst :, ,$(CURDIR))), 1)
>>>     $(error main directory cannot contain spaces nor colons)
>>>   endif
>>> +# some pattern rules in rules.mak are confused by an empty DSOSUF,
>>> +# and UNCHECKED_GOALS for testing (docker-) can run without prior 
>>> configure.
>>> +DSOSUF ?= ".so"
>>> +
>>>   # Always point to the root of the build tree (needs GNU make).
>>>   BUILD_DIR=$(CURDIR)
>>> @@ -526,15 +530,16 @@ $(SOFTMMU_FUZZ_RULES): $(edk2-decompressed)
>>>   $(TARGET_DIRS_RULES):
>>>   $(call quiet-command,$(MAKE) $(SUBDIR_MAKEFLAGS) -C $(dir $@) 
>>> V="$(V)" TARGET_DIR="$(dir $@)" $(notdir $@),)
>>> -DTC_MAKE_ARGS=-I$(SRC_PATH)/dtc VPATH=$(SRC_PATH)/dtc -C dtc V="$(V)" 
>>> LIBFDT_srcdir=$(SRC_PATH)/dtc/libfdt
>>> -DTC_CFLAGS=$(CFLAGS) $(QEMU_CFLAGS)
>>> -DTC_CPPFLAGS=-I$(BUILD_DIR)/dtc -I$(SRC_PATH)/dtc 
>>> -I$(SRC_PATH)/dtc/libfdt
>>> -
>>> -.PHONY: dtc/all
>>> -dtc/all: .git-submodule-status dtc/libfdt dtc/tests
>>
>> I'm getting:
>>
>> config-host.mak is out-of-date, running configure
>> make: *** No rule to make target 'dtc/all', needed by 'config-host.h'. 
>> Stop.
>>
>> On second try it works.
> 
> FYI same happens when going back (previous this patch applied) but there 
> is nothing we can do to prevent that afaik:

hmm maybe preserving the previous name for the phony rule "dtc/all" could make 
it work both forward and backward..
I'll try it in v3.

> 
> config-host.mak is out-of-date, running configure
> make: *** No rule to make target 'libfdt', needed by 'config-host.h'.  Stop.
> 
>>
>> Instead of alarming users, we could keep this target as a silent no-op, 
>> then remove it after some time.
>>
>> For the rest, patch looks good, nice cleanup!

I am tempted to remove the old compatibility gunks that are marked as "to be 
removed some time after 4.1" as the second patch in the series,
any thoughts? (Markus?)

Ciao,

Claudio

>>
>> Regards,
>>
>> Phil.
>>
>>> -    $(call quiet-command,$(MAKE) $(DTC_MAKE_ARGS) 
>>> CPPFLAGS="$(DTC_CPPFLAGS)" CFLAGS="$(DTC_CFLAGS)" 
>>> LDFLAGS="$(QEMU_LDFLAGS)" ARFLAGS="$(ARFLAGS)" CC="$(CC)" AR="$(AR)" 
>>> LD="$(LD)" $(SUBDIR_MAKEFLAGS) libfdt/libfdt.a,)
>>> +LIBFDT_objdir = dtc/libfdt
>>> +-include $(SRC_PATH)/dtc/libfdt/Makefile.libfdt
>>> +LIBFDT_objects = $(addprefix $(LIBFDT_objdir)/, $(LIBFDT_OBJS))
>>> +.PHONY: libfdt
>>> +libfdt: .git-submodule-status $(LIBFDT_objdir)/libfdt.a
>>> +$(LIBFDT_objdir)/libfdt.a: $(LIBFDT_objects)
>>> +    $(if $(LIBFDT_objects),$(call quiet-command,rm -f $@ && $(AR) rcs 
>>> $@ $^,"AR","$(TARGET_DIR)$@"),)
>>> -dtc/%: .git-submodule-status
>>> +$(LIBFDT_objects): | $(LIBFDT_objdir)
>>> +$(LIBFDT_objdir): .git-submodule-status
>>>   @mkdir -p $@
>>>   # Overriding CFLAGS causes us to lose defines added in the 
>>> sub-makefile.
>>> @@ -563,7 +568,6 @@ slirp/all: .git-submodule-status
>>>   # Compatibility gunk to keep make working across the rename of targets
>>>   # for recursion, to be removed some time after 4.1.
>>> -subdir-dtc: dtc/all
>>>   subdir-capstone: capstone/all
>>>   subdir-slirp: slirp/all
>>> @@ -821,7 +825,6 @@ distclean: clean
>>>   rm -rf $$d || exit 1 ; \
>>>   done
>>>   rm -Rf .sdk
>>> - 

Re: [PATCH v1 06/11] configure: redirect sphinx-build check to config.log

[Richard Henderson]

On 4/9/20 2:15 PM, Alex Bennée wrote:
> Otherwise it's hard to debug whats going on.
> 
> Signed-off-by: Alex Bennée 
> ---
>  configure | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson 


r~

Re: [PATCH 3/3] MAINTAINERS: Add myself as fulong2e co-maintainer

[Aleksandar Markovic]

04:39 Čet, 09.04.2020. Jiaxun Yang  је написао/ла:
>
> On Thu, 9 Apr 2020 10:17:46 +0800
> Huacai Chen  wrote:
>
> > Hi, Aleksandar,
> >
> > On Wed, Apr 8, 2020 at 11:30 PM Aleksandar Markovic
> >  wrote:
> > >
> > > 11:08 Sre, 08.04.2020. Huacai Chen  је
> > > написао/ла:
> > > >
> > > > I submitted the MIPS/fulong2e support about ten years ago, and
> > > > after that I became a MIPS kernel developer. Last year, Philippe
> > > > Mathieu- Daudé asked me that whether I can be a reviewer of
> > > > MIPS/fulong2e, and I promised that I will do some QEMU work in
> > > > the next year (i.e., 2020 and later). I think now (and also in
> > > > future) I can have some spare time, so I can finally do some real
> > > > work on QEMU/MIPS. And if possible, I hope I can be a
> > > > co-maintainer of MIPS/fulong2e.
> > > >
> > > > Cc: Jiaxun Yang 
> > > > Signed-off-by: Huacai Chen 
> > > > ---
> > > >  MAINTAINERS | 1 +
> > > >  1 file changed, 1 insertion(+)
> > > >
> > > > diff --git a/MAINTAINERS b/MAINTAINERS
> > > > index 642c8e0..3281ff2 100644
> > > > --- a/MAINTAINERS
> > > > +++ b/MAINTAINERS
> > > > @@ -1073,6 +1073,7 @@ F: hw/mips/mips_r4k.c
> > > >  Fulong 2E
> > > >  M: Philippe Mathieu-Daudé 
> > > >  M: Aleksandar Markovic 
> > > > +M: Huacai Chen 
> > > >  S: Odd Fixes
> > > >  F: hw/mips/mips_fulong2e.c
> > > >  F: hw/isa/vt82c686.c
> > > > --
> > > > 2.7.0
> > > >
> > >
> > > First of all, I want to express great pleasure and delight seing
> > > your series, and this patch in particular.
> > >
> > > A warm welcome to QEMU developers communities!
> > >
> > > We are currenyly very busy preparing QEMU 5.0 release, and
> > > additionaly, Easter holidays are in next few days or week
> > > (different parts od Christian world have different calendars), so,
> > > fot thay and other reasons, don't expect promot replies from us.
> > >
> > > I would also like to see Jiaxng at least having official reviewer
> > > status, but, of course, only if he wants that.
> > Thank you for your best wishes, I'm also very glad to see Jiaxun be
> > an reviewer.
>
> Thanks, but I was a primary school student at Loongson-2E's era, so I
> can do nothing with 2E.
>
> My experience with Loongson starts from 2F. And I'm more familiar with
> 2K and 3A.
>

OK, it makes sense. But, if you ever become wanting to be a reviewer for
Foolong 2e, just give me an email.

> I'm happy to contribute QEMU support for these platforms.
>

I am happy as well.

Best wishes and best health to you, people from China, and the whole
region!!

Yours,
Aleksandar

> Thanks.
>
> >
> > Regards,
> > Huacai
> > >
> > > Yours,
> > > and wishing you and all people from China best health!
> > >
> > > Aleksandar
>
> --
> Jiaxun Yang

Re: [PATCH v1 05/11] tests/docker: add docs FEATURE flag and use for test-misc

[Richard Henderson]

On 4/9/20 2:15 PM, Alex Bennée wrote:
> The test-misc docker test fails on a number of images which don't have
> the prerequisites to build the docs. Use the FEATURES flag so we can
> skip those tests.
> 
> As the sphinx test fails to detect whatever feature we need to get
> hxtool to work we drop them from debian9 so the windows build doesn't
> attempt to build the docs.
> 
> Signed-off-by: Alex Bennée 
> ---
>  tests/docker/dockerfiles/debian10.docker   | 2 ++
>  tests/docker/dockerfiles/debian9.docker| 2 --
>  tests/docker/dockerfiles/fedora.docker | 2 +-
>  tests/docker/dockerfiles/travis.docker | 2 +-
>  tests/docker/dockerfiles/ubuntu.docker | 2 +-
>  tests/docker/dockerfiles/ubuntu1804.docker | 2 +-
>  tests/docker/test-misc | 2 ++
>  7 files changed, 8 insertions(+), 6 deletions(-)

Reviewed-by: Richard Henderson 


r~

Re: [PATCH v1 07/11] configure: disable PIE for Windows builds

[Richard Henderson]

On 4/9/20 2:15 PM, Alex Bennée wrote:
> It seems on some compilers the test can pass but still give you
> broken binaries.
> 
> [AJB untested - please could windows users test]
> 
> Fixes: d2cd29e30736
> Fixes: https://bugs.launchpad.net/qemu/+bug/1871798
> Cc: Bug 1871798 <1871...@bugs.launchpad.net>
> Cc: James Le Cuirot 
> Signed-off-by: Alex Bennée 
> ---
>  configure | 1 +
>  1 file changed, 1 insertion(+)

Reviewed-by: Richard Henderson 


r~

Re: [PATCH v1 09/11] gdbstub: i386: Fix gdb_get_reg16() parameter to unbreak gdb

[Richard Henderson]

On 4/9/20 2:15 PM, Alex Bennée wrote:
> From: Peter Xu 
> 
> We should only pass in gdb_get_reg16() with the GByteArray* object
> itself, no need to shift.  Without this patch, gdb remote attach will
> crash QEMU.
> 
> Fixes: a010bdbe719 ("extend GByteArray to read register helpers")
> Signed-off-by: Peter Xu 
> Reviewed-by: Philippe Mathieu-Daudé 
> Signed-off-by: Alex Bennée 
> Message-Id: <20200409164954.36902-3-pet...@redhat.com>
> ---
>  target/i386/gdbstub.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Richard Henderson 


r~

Re: [PATCH v1 08/11] target/m68k/helper: Fix m68k_fpu_gdb_get_reg() use of GByteArray

[Richard Henderson]

On 4/9/20 2:15 PM, Alex Bennée wrote:
> From: Philippe Mathieu-Daudé 
> 
> Since a010bdbe719 the gdbstub API takes a GByteArray*. Unfortunately
> we forgot to update the gdb_get_reg*() calls. Do it now.
> 
> Fixes: a010bdbe719 ("extend GByteArray to read register helpers")
> Reported-by: Peter Xu 
> Signed-off-by: Philippe Mathieu-Daudé 
> Reviewed-by: Laurent Vivier 
> Reviewed-by: Peter Xu 
> Signed-off-by: Alex Bennée 
> Message-Id: <20200409172509.4078-1-phi...@redhat.com>
> ---
>  target/m68k/helper.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson 


r~

[Qemu devel PATCH v4 1/3] hw/net: Add Smartfusion2 emac block

[sundeep . lkml]

From: Subbaraya Sundeep 

Modelled Ethernet MAC of Smartfusion2 SoC.
Micrel KSZ8051 PHY is present on Emcraft's
SOM kit hence same PHY is emulated.

Signed-off-by: Subbaraya Sundeep 
---
 MAINTAINERS|   2 +
 hw/net/Makefile.objs   |   1 +
 hw/net/msf2-emac.c | 562 +
 include/hw/net/msf2-emac.h |  50 
 4 files changed, 615 insertions(+)
 create mode 100644 hw/net/msf2-emac.c
 create mode 100644 include/hw/net/msf2-emac.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 642c8e0..9d0ff20 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -919,6 +919,8 @@ F: include/hw/arm/msf2-soc.h
 F: include/hw/misc/msf2-sysreg.h
 F: include/hw/timer/mss-timer.h
 F: include/hw/ssi/mss-spi.h
+F: hw/net/msf2-emac.c
+F: include/hw/net/msf2-emac.h
 
 Emcraft M2S-FG484
 M: Subbaraya Sundeep 
diff --git a/hw/net/Makefile.objs b/hw/net/Makefile.objs
index af4d194..f2b7398 100644
--- a/hw/net/Makefile.objs
+++ b/hw/net/Makefile.objs
@@ -55,3 +55,4 @@ common-obj-$(CONFIG_ROCKER) += rocker/rocker.o 
rocker/rocker_fp.o \
 obj-$(call lnot,$(CONFIG_ROCKER)) += rocker/qmp-norocker.o
 
 common-obj-$(CONFIG_CAN_BUS) += can/
+common-obj-$(CONFIG_MSF2) += msf2-emac.o
diff --git a/hw/net/msf2-emac.c b/hw/net/msf2-emac.c
new file mode 100644
index 000..78593f4
--- /dev/null
+++ b/hw/net/msf2-emac.c
@@ -0,0 +1,562 @@
+/*
+ * QEMU model of the Smartfusion2 Ethernet MAC.
+ *
+ * Copyright (c) 2020 Subbaraya Sundeep .
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * Refer to section Ethernet MAC in the document:
+ * UG0331: SmartFusion2 Microcontroller Subsystem User Guide
+ * Datasheet URL:
+ * https://www.microsemi.com/document-portal/cat_view/56661-internal-documents/
+ * 56758-soc?lang=en&limit=20&limitstart=220
+ */
+
+#include "qemu/osdep.h"
+#include "qemu-common.h"
+#include "qemu/log.h"
+#include "exec/address-spaces.h"
+#include "hw/registerfields.h"
+#include "hw/net/msf2-emac.h"
+#include "hw/net/mii.h"
+#include "hw/irq.h"
+#include "net/net.h"
+#include "hw/qdev-properties.h"
+#include "migration/vmstate.h"
+
+REG32(CFG1, 0x0)
+REG32(CFG2, 0x4)
+REG32(IFG, 0x8)
+REG32(HALF_DUPLEX, 0xc)
+REG32(FRM_LEN, 0x10)
+REG32(MII_CMD, 0x24)
+REG32(MII_ADDR, 0x28)
+REG32(MII_CTL, 0x2c)
+REG32(MII_STS, 0x30)
+REG32(STA1, 0x40)
+REG32(STA2, 0x44)
+REG32(FIFO_CFG0, 0x48)
+REG32(DMA_TX_CTL, 0x180)
+REG32(DMA_TX_DESC, 0x184)
+REG32(DMA_TX_STATUS, 0x188)
+REG32(DMA_RX_CTL, 0x18c)
+REG32(DMA_RX_DESC, 0x190)
+REG32(DMA_RX_STATUS, 0x194)
+REG32(DMA_IRQ_MASK, 0x198)
+REG32(DMA_IRQ, 0x19c)
+
+FIELD(DMA, PKTCNT, 16, 8)
+
+#define R_DMA_PKT_TXRX  (1 << 0)
+#define DMA_TX_UNDERRUN (1 << 1)
+#define DMA_RX_OVERFLOW (1 << 2)
+
+#define EMPTY_MASK  (1 << 31)
+#define PKT_SIZE0x7FF
+
+#define CFG1_RESET  (1 << 31)
+#define CFG1_RX_EN  (1 << 2)
+#define CFG1_TX_EN  (1 << 0)
+#define CFG1_LB_EN  (1 << 8)
+
+#define DMA_TX_CTL_EN   (1 << 0)
+#define DMA_RX_CTL_EN   (1 << 0)
+
+#define MII_CMD_READ(1 << 0)
+
+#define PHYADDR 0x1
+#define MII_ADDR_MASK   0x1F
+#define PHY_ADDR_SHIFT  8
+#define MAX_PKT_SIZE2048
+
+typedef struct {
+uint32_t pktaddr;
+uint32_t pktsize;
+uint32_t next;
+} EmacDesc;
+
+static uint32_t emac_get_isr(MSF2EmacState *s)
+{
+uint32_t ier = s->regs[R_DMA_IRQ_MASK];
+uint32_t tx = s->regs[R_DMA_TX_STATUS] & 0xF;
+uint32_t rx = s->regs[R_DMA_RX_STATUS] & 0xF;
+uint32_t isr = (rx << 4) | tx;
+
+s->regs[R_DMA_IRQ] = ier & isr;
+return s->regs[R_DMA_IRQ];
+}
+
+static void emac_update_irq(MSF2EmacState *s)
+{
+bool intr = emac_get_isr(s);
+
+qemu_set_irq(s->irq, intr);
+}
+
+static void emac_load_desc(MSF2EmacState *s, EmacDesc *d, hwaddr desc)
+{
+address_space_read(&s->dma_as, desc, MEMTXATTRS_UNSPECIFIED,
+

[Qemu devel PATCH v4 2/3] msf2: Add EMAC block to SmartFusion2 SoC

[sundeep . lkml]

From: Subbaraya Sundeep 

With SmartFusion2 Ethernet MAC model in
place this patch adds the same to SoC.

Signed-off-by: Subbaraya Sundeep 
---
 hw/arm/msf2-soc.c | 21 -
 include/hw/arm/msf2-soc.h |  3 +++
 2 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index 588d643..2f2db6d 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -35,6 +35,7 @@
 
 #define MSF2_TIMER_BASE   0x40004000
 #define MSF2_SYSREG_BASE  0x40038000
+#define MSF2_EMAC_BASE0x40041000
 
 #define ENVM_BASE_ADDRESS 0x6000
 
@@ -55,6 +56,7 @@ static const uint32_t uart_addr[MSF2_NUM_UARTS] = { 
0x4000 , 0x4001 };
 static const int spi_irq[MSF2_NUM_SPIS] = { 2, 3 };
 static const int uart_irq[MSF2_NUM_UARTS] = { 10, 11 };
 static const int timer_irq[MSF2_NUM_TIMERS] = { 14, 15 };
+static const int emac_irq[MSF2_NUM_EMACS] = { 12 };
 
 static void do_sys_reset(void *opaque, int n, int level)
 {
@@ -81,6 +83,13 @@ static void m2sxxx_soc_initfn(Object *obj)
 sysbus_init_child_obj(obj, "spi[*]", &s->spi[i], sizeof(s->spi[i]),
   TYPE_MSS_SPI);
 }
+
+sysbus_init_child_obj(obj, "eth", &s->emac, sizeof(s->emac),
+  TYPE_MSS_EMAC);
+if (nd_table[0].used) {
+qemu_check_nic_model(&nd_table[0], TYPE_MSS_EMAC);
+qdev_set_nic_properties(DEVICE(&s->emac), &nd_table[0]);
+}
 }
 
 static void m2sxxx_soc_realize(DeviceState *dev_soc, Error **errp)
@@ -192,6 +201,17 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error 
**errp)
 g_free(bus_name);
 }
 
+dev = DEVICE(&s->emac);
+object_property_set_bool(OBJECT(&s->emac), true, "realized", &err);
+if (err != NULL) {
+error_propagate(errp, err);
+return;
+}
+busdev = SYS_BUS_DEVICE(dev);
+sysbus_mmio_map(busdev, 0, MSF2_EMAC_BASE);
+sysbus_connect_irq(busdev, 0,
+   qdev_get_gpio_in(armv7m, emac_irq[0]));
+
 /* Below devices are not modelled yet. */
 create_unimplemented_device("i2c_0", 0x40002000, 0x1000);
 create_unimplemented_device("dma", 0x40003000, 0x1000);
@@ -202,7 +222,6 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, Error 
**errp)
 create_unimplemented_device("can", 0x40015000, 0x1000);
 create_unimplemented_device("rtc", 0x40017000, 0x1000);
 create_unimplemented_device("apb_config", 0x4002, 0x1);
-create_unimplemented_device("emac", 0x40041000, 0x1000);
 create_unimplemented_device("usb", 0x40043000, 0x1000);
 }
 
diff --git a/include/hw/arm/msf2-soc.h b/include/hw/arm/msf2-soc.h
index 3cfe5c7..296ed03 100644
--- a/include/hw/arm/msf2-soc.h
+++ b/include/hw/arm/msf2-soc.h
@@ -29,12 +29,14 @@
 #include "hw/timer/mss-timer.h"
 #include "hw/misc/msf2-sysreg.h"
 #include "hw/ssi/mss-spi.h"
+#include "hw/net/msf2-emac.h"
 
 #define TYPE_MSF2_SOC "msf2-soc"
 #define MSF2_SOC(obj) OBJECT_CHECK(MSF2State, (obj), TYPE_MSF2_SOC)
 
 #define MSF2_NUM_SPIS 2
 #define MSF2_NUM_UARTS2
+#define MSF2_NUM_EMACS1
 
 /*
  * System timer consists of two programmable 32-bit
@@ -62,6 +64,7 @@ typedef struct MSF2State {
 MSF2SysregState sysreg;
 MSSTimerState timer;
 MSSSpiState spi[MSF2_NUM_SPIS];
+MSF2EmacState emac;
 } MSF2State;
 
 #endif
-- 
2.7.4

[Qemu devel PATCH v4 3/3] tests/boot_linux_console: Add ethernet test to SmartFusion2

[sundeep . lkml]

From: Subbaraya Sundeep 

In addition to simple serial test this patch uses ping
to test the ethernet block modelled in SmartFusion2 SoC.

Signed-off-by: Subbaraya Sundeep 
---
 tests/acceptance/boot_linux_console.py | 15 ++-
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/tests/acceptance/boot_linux_console.py 
b/tests/acceptance/boot_linux_console.py
index f825cd9..c6b06a1 100644
--- a/tests/acceptance/boot_linux_console.py
+++ b/tests/acceptance/boot_linux_console.py
@@ -336,13 +336,13 @@ class BootLinuxConsole(Test):
 """
 uboot_url = ('https://raw.githubusercontent.com/'
  'Subbaraya-Sundeep/qemu-test-binaries/'
- 'fa030bd77a014a0b8e360d3b7011df89283a2f0b/u-boot')
-uboot_hash = 'abba5d9c24cdd2d49cdc2a8aa92976cf20737eff'
+ 'fe371d32e50ca682391e1e70ab98c2942aeffb01/u-boot')
+uboot_hash = 'cbb8cbab970f594bf6523b9855be209c08374ae2'
 uboot_path = self.fetch_asset(uboot_url, asset_hash=uboot_hash)
 spi_url = ('https://raw.githubusercontent.com/'
'Subbaraya-Sundeep/qemu-test-binaries/'
-   'fa030bd77a014a0b8e360d3b7011df89283a2f0b/spi.bin')
-spi_hash = '85f698329d38de63aea6e884a86fbde70890a78a'
+   'fe371d32e50ca682391e1e70ab98c2942aeffb01/spi.bin')
+spi_hash = '65523a1835949b6f4553be96dec1b6a38fb05501'
 spi_path = self.fetch_asset(spi_url, asset_hash=spi_hash)
 
 self.vm.set_console()
@@ -352,7 +352,12 @@ class BootLinuxConsole(Test):
  '-drive', 'file=' + spi_path + ',if=mtd,format=raw',
  '-no-reboot')
 self.vm.launch()
-self.wait_for_console_pattern('init started: BusyBox')
+self.wait_for_console_pattern('Enter \'help\' for a list')
+
+exec_command_and_wait_for_pattern(self, 'ifconfig eth0 10.0.2.15',
+ 'eth0: link becomes ready')
+exec_command_and_wait_for_pattern(self, 'ping -c 3 10.0.2.2',
+'3 packets transmitted, 3 packets received, 0% packet loss')
 
 def do_test_arm_raspi2(self, uart_id):
 """
-- 
2.7.4

[Qemu devel PATCH v4 0/3] Add SmartFusion2 EMAC block

[sundeep . lkml]

From: Subbaraya Sundeep 

This patch set emulates Ethernet MAC block
present in Microsemi SmartFusion2 SoC.

v4:
  Added loop back as per Jason's comment 
v3:
  Added SmartFusion2 ethernet test to tests/acceptance
v2:
  No changes. Fixed Signed-off mail id in patch 2/2

Testing:

1. Download u-boot.bin, uImage and msf2-devkit.dtb from
   https://github.com/Subbaraya-Sundeep/qemu-test-binaries.git
2. Copy uImage and msf2-devkit.dtb to suitable Qemu tftp directory
3. Launch Qemu by
   ./arm-softmmu/qemu-system-arm -M emcraft-sf2 -serial mon:stdio -kernel \
   u-boot.bin -display none -nic user,tftp=

Example:
./arm-softmmu/qemu-system-arm -M emcraft-sf2 -serial mon:stdio -kernel u-boot 
-display none -nic user,tftp=/home/hyd1358/qemu_tftp

U-Boot 2010.03-0-ga7695d6 (Apr 04 2020 - 15:07:27)

CPU  : SmartFusion2 SoC (Cortex-M3 Hard IP)
Freqs: CORTEX-M3=142MHz,PCLK0=71MHz,PCLK1=71MHz
Board: M2S-FG484-SOM Rev 1A, www.emcraft.com
DRAM:  64 MB
*** Warning - bad CRC, using default environment

In:serial
Out:   serial
Err:   serial
Net:   M2S_MAC

Hit any key to stop autoboot:  3  0 

M2S-FG484-SOM> run netboot
Using M2S_MAC device
TFTP from server 10.0.2.2; our IP address is 10.0.2.15
Filename 'uImage'.
Load address: 0xa0007fc0
Loading: *#
 #
 #
 ###
done
Bytes transferred = 3681568 (382d20 hex)
Using M2S_MAC device
TFTP from server 10.0.2.2; our IP address is 10.0.2.15
Filename 'msf2-devkit.dtb'.
Load address: 0xa200
Loading: *#
done
Bytes transferred = 1712 (6b0 hex)
## Booting kernel from Legacy Image at a0007fc0 ...
   Image Name:   
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:3681504 Bytes =  3.5 MB
   Load Address: a0008000
   Entry Point:  a0008001
   Verifying Checksum ... OK
   Loading Kernel Image ... OK
OK

Starting kernel ...

[0.00] Booting Linux on physical CPU 0x0
[0.00] Linux version 4.5.0-gb0e5502-dirty (hyd1358@hyd1358) (gcc 
version 4.4.1 (Sourcery G++ Lite 2010q1-189) ) #85 PREEMPT Sat Apr 4 23:26:40 
IST 2020
[0.00] CPU: ARMv7-M [410fc231] revision 1 (ARMv7M), cr=
[0.00] CPU: unknown data cache, unknown instruction cache
[0.00] Machine model: Microsemi SmartFusion 2 development board
[0.00] bootconsole [earlycon0] enabled
[0.00] Built 1 zonelists in Zone order, mobility grouping on.  Total 
pages: 16256
[0.00] Kernel command line: console=ttyS0,115200n8 panic=10 
mem=64M@0xa000 earlyprintk
[0.00] PID hash table entries: 256 (order: -2, 1024 bytes)
[0.00] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
[0.00] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
[0.00] Memory: 61212K/65536K available (1612K kernel code, 75K rwdata, 
680K rodata, 1224K init, 120K bss, 4324K reserved, 0K cma-reserved)
[0.00] Virtual kernel memory layout:
[0.00] vector  : 0x - 0x1000   (   4 kB)
[0.00] fixmap  : 0xffc0 - 0xfff0   (3072 kB)
[0.00] vmalloc : 0x - 0x   (4095 MB)
[0.00] lowmem  : 0xa000 - 0xa400   (  64 MB)
[0.00] modules : 0xa000 - 0xa080   (   8 MB)
[0.00]   .text : 0xa0008000 - 0xa02453e8   (2293 kB)
[0.00]   .init : 0xa0246000 - 0xa0378000   (1224 kB)
[0.00]   .data : 0xa0378000 - 0xa038ace0   (  76 kB)
[0.00].bss : 0xa038ace0 - 0xa03a8ea0   ( 121 kB)
[0.00] SLUB: HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
[0.00] Preemptible hierarchical RCU implementation.
.
.
.
[0.445184] Found M2S MAC at 0x40041000, irq 18
[0.448810] libphy: msf2 MII bus: probed
[0.527047] ipip: IPv4 over IPv4 tunneling driver
[0.532367] NET: Registered protocol family 10
[0.542307] sit: IPv6 over IPv4 tunneling driver
[0.544655] NET: Registered protocol family 17
[0.565395] Freeing unused kernel memory: 1224K (a0246000 - a0378000)
init started: BusyBox v1.31.1 (2020-01-25 20:01:06 IST)
starting pid 26, tty '': '/etc/rc'
starting pid 31, tty '/dev/ttyS0': '/bin/hush -i'


BusyBox v1.31.1 (2020-01-25 20:01:06 IST) hush - the humble shell
Enter 'help' for a list of built-in commands.

/ # ifconfig eth0 10.0.2.15
[   11.116091] IPv6: ADDRCONF(NETDEV_UP): eth0: link is not ready
/ # [   11.653634] eth0: link up (100/full)
[   11.655246] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready

/ # ls
dev   proc  sys   etc   usr   bin   tmp   sbin  mnt   init
/ # tftp -gr uImage 10.0.2.2
[   40.780983] random: nonblocking pool is initialized
/ # ls
dev sys usr tmp mnt uImage
procetc bin sbininit
/ #


Subbaraya Sundeep (3):
  hw/net: Add Smartfusion2 emac block

Re: [PATCH v1 10/11] linux-user: fix /proc/self/stat handling

[Richard Henderson]

On 4/9/20 2:15 PM, Alex Bennée wrote:
> In the original bug report long files names in Guix caused
> /proc/self/stat be truncated without the trailing ") " as specified in
> proc manpage which says:
> (2) comm  %s
>The  filename of the executable, in parentheses.  This
>is visible whether or not the  executable  is  swapped
>out.
> 
> Additionally it should only be reporting the executable name rather
> than the full path. Fix both these failings while cleaning up the code
> to use GString to build up the reported values. As the whole function
> is cleaned up also adjust the white space to the current coding style.
> 
> Message-ID: 
> Reported-by: Brice Goglin 
> Cc: Philippe_Mathieu-Daudé 
> Signed-off-by: Alex Bennée 
> ---
>  linux-user/syscall.c | 43 +++
>  1 file changed, 19 insertions(+), 24 deletions(-)

Reviewed-by: Richard Henderson 


r~

Re: [PULL 08/13] softfloat: Fix BAD_SHIFT from normalizeFloatx80Subnormal

[Richard Henderson]

On 4/10/20 2:38 AM, Aleksandar Markovic wrote:
> 17:55 Uto, 07.04.2020. Alex Bennée  > је написао/ла:
>>
>> From: Richard Henderson  >
>>
>> All other calls to normalize*Subnormal detect zero input before
>> the call -- this is the only outlier.  This case can happen with
>> +0.0 + +0.0 = +0.0 or -0.0 + -0.0 = -0.0, so return a zero of
>> the correct sign.
>>
>> Reported-by: Coverity (CID 1421991)
>> Signed-off-by: Richard Henderson  >
>> Signed-off-by: Alex Bennée  >
>> Message-Id: <20200327232042.10008-1-richard.hender...@linaro.org
> >
>> Message-Id: <20200403191150.863-8-alex.ben...@linaro.org
> >
>>
>> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
>> index 301ce3b537b..ae6ba718540 100644
>> --- a/fpu/softfloat.c
>> +++ b/fpu/softfloat.c
>> @@ -5856,6 +5856,9 @@ static floatx80 addFloatx80Sigs(floatx80 a, floatx80 b,
> flag zSign,
>>          zSig1 = 0;
>>          zSig0 = aSig + bSig;
>>          if ( aExp == 0 ) {
>> +            if (zSig0 == 0) {
>> +                return packFloatx80(zSign, 0, 0);
>> +            }
>>              normalizeFloatx80Subnormal( zSig0, &zExp, &zSig0 );
>>              goto roundAndPack;
>>          }
>> --
>> 2.20.1
>>
>>
> 
> We in MIPS have extensive FP tests, that certainly include many cases of
> operations with +0 and -0. And they are all correct even before this patch.

This is for the 80-bit extended-double type, only used on x86 and m68k.  You
will not execute this path using MIPS.

> Alex, from the commit message, it not clear if this is a fix of a bug (in 
> which
> case a test example would be useful to have, and the assesment on what
> scenarios could be affected), or just a correction for some rare condition 
> that
> practically for all intents and purposes was never triggered, or perhaps
> something third.

This only avoids a Coverity out-of-range shift warning.

Beforehand, we executed 0 << 64, got 0 as the result (regardless of whether or
not the host truncates the shift count), and constructed the correctly signed
fp zero in the end.

There was more discussion about this in an earlier thread, associated with a
different patch for this same problem:

https://lists.nongnu.org/archive/html/qemu-devel/2020-03/msg08278.html


> Secondly, and not related to this patch only, I see more and more patches
> integrated into the main tree without "Reviewed-by:" tag. I don't think this 
> is
> the best way an open source community works. In my personal opinion, this must
> stop.

The only way to avoid this is to have more developers review code outside their
own bailiwick.  The patch has been on the list for two weeks and was pinged
twice.

Although why Alex didn't add his own R-b to my patch when merging it to his
branch, I don't know.


r~

Re: [PULL 08/13] softfloat: Fix BAD_SHIFT from normalizeFloatx80Subnormal

[Aleksandar Markovic]

17:17 Pet, 10.04.2020. Richard Henderson  је
написао/ла:
>
> On 4/10/20 2:38 AM, Aleksandar Markovic wrote:
> > 17:55 Uto, 07.04.2020. Alex Bennée  > > је написао/ла:
> >>
> >> From: Richard Henderson  > >
> >>
> >> All other calls to normalize*Subnormal detect zero input before
> >> the call -- this is the only outlier.  This case can happen with
> >> +0.0 + +0.0 = +0.0 or -0.0 + -0.0 = -0.0, so return a zero of
> >> the correct sign.
> >>
> >> Reported-by: Coverity (CID 1421991)
> >> Signed-off-by: Richard Henderson  > >
> >> Signed-off-by: Alex Bennée  > >
> >> Message-Id: <20200327232042.10008-1-richard.hender...@linaro.org
> > >
> >> Message-Id: <20200403191150.863-8-alex.ben...@linaro.org
> > >
> >>
> >> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> >> index 301ce3b537b..ae6ba718540 100644
> >> --- a/fpu/softfloat.c
> >> +++ b/fpu/softfloat.c
> >> @@ -5856,6 +5856,9 @@ static floatx80 addFloatx80Sigs(floatx80 a,
floatx80 b,
> > flag zSign,
> >>  zSig1 = 0;
> >>  zSig0 = aSig + bSig;
> >>  if ( aExp == 0 ) {
> >> +if (zSig0 == 0) {
> >> +return packFloatx80(zSign, 0, 0);
> >> +}
> >>  normalizeFloatx80Subnormal( zSig0, &zExp, &zSig0 );
> >>  goto roundAndPack;
> >>  }
> >> --
> >> 2.20.1
> >>
> >>
> >
> > We in MIPS have extensive FP tests, that certainly include many cases of
> > operations with +0 and -0. And they are all correct even before this
patch.
>
> This is for the 80-bit extended-double type, only used on x86 and m68k.
You
> will not execute this path using MIPS.
>

Thanks, Richard!

First and foremost, may health be with you and all people of United States
and all Americas!!

Yes, the fact that m68k also uses 80-bit FP arithmetic was known to me.
Though probably many people think 80-bit FP is limited to x86.

I was just afraid of some strange way that other targets may end up using
the function in question. But again, thanks for reassurances!

> > Alex, from the commit message, it not clear if this is a fix of a bug
(in which
> > case a test example would be useful to have, and the assesment on what
> > scenarios could be affected), or just a correction for some rare
condition that
> > practically for all intents and purposes was never triggered, or perhaps
> > something third.
>
> This only avoids a Coverity out-of-range shift warning.
>
> Beforehand, we executed 0 << 64, got 0 as the result (regardless of
whether or
> not the host truncates the shift count), and constructed the correctly
signed
> fp zero in the end.
>
> There was more discussion about this in an earlier thread, associated
with a
> different patch for this same problem:
>
> https://lists.nongnu.org/archive/html/qemu-devel/2020-03/msg08278.html
>

OK. I didn't have a chance to read this pattivular thread. Thanks for the
pointer!

>
> > Secondly, and not related to this patch only, I see more and more
patches
> > integrated into the main tree without "Reviewed-by:" tag. I don't think
this is
> > the best way an open source community works. In my personal opinion,
this must
> > stop.
>
> The only way to avoid this is to have more developers review code outside
their
> own bailiwick.  The patch has been on the list for two weeks and was
pinged
> twice.
>
> Although why Alex didn't add his own R-b to my patch when merging it to
his
> branch, I don't know.
>

I also have a very similar impression as yours, that Alex in fact reviewed
the patch (as if he implicitely gave R-B, but forgot to insert it in a
hurry, given these hectic days around 5.0 final release).

Best regards, and best wishes to all Sietlans, or wherever you happen to
live!

Aleksandar

>
> r~

Re: [PULL 08/13] softfloat: Fix BAD_SHIFT from normalizeFloatx80Subnormal

[Peter Maydell]

On Fri, 10 Apr 2020 at 16:17, Richard Henderson
 wrote:
> Although why Alex didn't add his own R-b to my patch when merging it to his
> branch, I don't know.

I think this is one of those areas where different submaintainers
have different work practices. Personally I distinguish "did I
actually review this" from "did I just put this into my tree and
rely on others doing the review" and use r-by for the former
and not on the latter (although obviously everything I put in
my tree I will have at least very very briefly looked over).
But I think some submaintainers don't bother to add r-by tags
for things they review in the process of assembling their
tree because they see it as implicit in the process.

thanks
-- PMM

Re: [PATCH v4 27/30] qcow2: Assert that expand_zero_clusters_in_l1() does not support subclusters

[Alberto Garcia]

On Thu 09 Apr 2020 12:27:36 PM CEST, Max Reitz wrote:
>> +=== Testing version downgrade with extended L2 entries ===
>> +
>> +Formatting 'TEST_DIR/t.IMGFMT', fmt=IMGFMT size=67108864
>> +qemu-img: Cannot downgrade an image with incompatible features 0x10 set
>
> This test fails in this commit, because extended_l2 is only available
> after the next commit.  The code changes and the test itself look good
> to me, though.

You're right, thanks! Since this one only adds an assertion I'll just
swap both commits.

Berto

[PATCH] hw/arm/virt: Add DT property /secure-chosen/kaslr-seed

[Jerome Forissier]

This commit generates a random seed to be used by the secure OS for
ASLR when the machine is secure. The seed is a 64-bit random value
exported via the DT in /secure-chosen/kaslr-seed. This interface is
used by OP-TEE [1].

[1] https://github.com/OP-TEE/optee_os/commit/ef262691fe0e

Signed-off-by: Jerome Forissier 
---
 hw/arm/virt.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 7dc96abf72c..42a6f84086f 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -77,6 +77,7 @@
 #include "hw/acpi/generic_event_device.h"
 #include "hw/virtio/virtio-iommu.h"
 #include "hw/char/pl011.h"
+#include "crypto/random.h"
 
 #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
 static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -1635,6 +1636,18 @@ static void finalize_gic_version(VirtMachineState *vms)
 }
 }
 
+static void create_secure_kaslr_seed(VirtMachineState *vms)
+{
+Error *err = NULL;
+uint64_t seed;
+
+if (qcrypto_random_bytes(&seed, sizeof(seed), &err)) {
+error_free(err);
+return;
+}
+qemu_fdt_setprop_u64(vms->fdt, "/secure-chosen", "kaslr-seed", seed);
+}
+
 static void machvirt_init(MachineState *machine)
 {
 VirtMachineState *vms = VIRT_MACHINE(machine);
@@ -1837,6 +1850,7 @@ static void machvirt_init(MachineState *machine)
 if (vms->secure) {
 create_secure_ram(vms, secure_sysmem);
 create_uart(vms, VIRT_SECURE_UART, secure_sysmem, serial_hd(1));
+create_secure_kaslr_seed(vms);
 }
 
 vms->highmem_ecam &= vms->highmem && (!firmware_loaded || aarch64);
-- 
2.20.1

[PATCH] hw/arm/virt: Add DT property /secure-chosen/kaslr-seed

[Jerome Forissier]

This commit generates a random seed to be used by the secure OS for
ASLR when the machine is secure. The seed is a 64-bit random value
exported via the DT in /secure-chosen/kaslr-seed. This interface is
used by OP-TEE [1].

[1] https://github.com/OP-TEE/optee_os/commit/ef262691fe0e

Signed-off-by: Jerome Forissier 
---
 hw/arm/virt.c | 14 ++
 1 file changed, 14 insertions(+)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 7dc96abf72c..42a6f84086f 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -77,6 +77,7 @@
 #include "hw/acpi/generic_event_device.h"
 #include "hw/virtio/virtio-iommu.h"
 #include "hw/char/pl011.h"
+#include "crypto/random.h"
 
 #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
 static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -1635,6 +1636,18 @@ static void finalize_gic_version(VirtMachineState *vms)
 }
 }
 
+static void create_secure_kaslr_seed(VirtMachineState *vms)
+{
+Error *err = NULL;
+uint64_t seed;
+
+if (qcrypto_random_bytes(&seed, sizeof(seed), &err)) {
+error_free(err);
+return;
+}
+qemu_fdt_setprop_u64(vms->fdt, "/secure-chosen", "kaslr-seed", seed);
+}
+
 static void machvirt_init(MachineState *machine)
 {
 VirtMachineState *vms = VIRT_MACHINE(machine);
@@ -1837,6 +1850,7 @@ static void machvirt_init(MachineState *machine)
 if (vms->secure) {
 create_secure_ram(vms, secure_sysmem);
 create_uart(vms, VIRT_SECURE_UART, secure_sysmem, serial_hd(1));
+create_secure_kaslr_seed(vms);
 }
 
 vms->highmem_ecam &= vms->highmem && (!firmware_loaded || aarch64);
-- 
2.20.1

[Bug 1872113] [NEW] qemu docs fails to build with Sphinx 3.0.x

[Stig-Ørjan Smelror]

Public bug reported:

We've just updated Sphinx to version 3.0.1 and qemu fails to build the
docs with this version.

Here's the relevant section in the build log.

CONFDIR="/etc/qemu" /usr/bin/sphinx-build-3  -W -b html -D version=4.2.92 -D 
release="4.2.92 (qemu-5.0.0-0.rc2.0.1.mga8)" -d .doctrees/devel-html 
/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/devel docs/devel
Running Sphinx v3.0.1
making output directory... done
building [mo]: targets for 0 po files that are out of date
building [html]: targets for 14 source files that are out of date
updating environment: [new config] 14 added, 0 changed, 0 removed
reading sources... [  7%] bitops
reading sources... [ 14%] decodetree
reading sources... [ 21%] index
reading sources... [ 28%] kconfig
reading sources... [ 35%] loads-stores
reading sources... [ 42%] memory
reading sources... [ 50%] migration
reading sources... [ 57%] reset
reading sources... [ 64%] s390-dasd-ipl
reading sources... [ 71%] secure-coding-practices
reading sources... [ 78%] stable-process
reading sources... [ 85%] tcg
reading sources... [ 92%] tcg-plugins
reading sources... [100%] testing

Warning, treated as error:
/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/../include/exec/memory.h:3:Type 
must be either just a name or a typedef-like declaration.
If just a name:
  Error in declarator or parameters
  Invalid C declaration: Expected identifier in nested name, got keyword: 
struct [error at 6]
struct MemoryListener
--^
If typedef-like declaration:
  Error in declarator or parameters
  Invalid C declaration: Expected identifier in nested name. [error at 21]
struct MemoryListener
-^

make: *** [Makefile:1095: docs/devel/index.html] Error 2
make: *** Waiting for unfinished jobs

I found this commit for memory.h that includes the section that faults.
https://github.com/qemu/qemu/commit/5d248213180749e674fbccbacc6ee9c38499abb3#diff-d892cbf314945b44699534cc1de4ebbd

You can see the whole build log here.
https://pkgsubmit.mageia.org/uploads/failure/cauldron/core/release/20200410161120.tv.duvel.699/log/qemu-5.0.0-0.rc2.0.1.mga8/build.0.20200410161338.log

System: Mageia Cauldron

** Affects: qemu
 Importance: Undecided
 Status: New

** Description changed:

  We've just updated Sphinx to version 3.0.1 and qemu fails to build the
  docs with this version.
  
  Here's the relevant section in the build log.
  
- CONFDIR="/etc/qemu" /usr/bin/sphinx-build-3  -W -b html -D version=4.2.92 -D 
release="4.2.92 (qemu-5.0.0-0.rc2.0.1.mga8)" -d .doctrees/devel-html 
/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/devel docs/devel 
+ CONFDIR="/etc/qemu" /usr/bin/sphinx-build-3  -W -b html -D version=4.2.92 -D 
release="4.2.92 (qemu-5.0.0-0.rc2.0.1.mga8)" -d .doctrees/devel-html 
/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/devel docs/devel
  Running Sphinx v3.0.1
  making output directory... done
  building [mo]: targets for 0 po files that are out of date
  building [html]: targets for 14 source files that are out of date
  updating environment: [new config] 14 added, 0 changed, 0 removed
  reading sources... [  7%] bitops
  reading sources... [ 14%] decodetree
  reading sources... [ 21%] index
  reading sources... [ 28%] kconfig
  reading sources... [ 35%] loads-stores
  reading sources... [ 42%] memory
  reading sources... [ 50%] migration
  reading sources... [ 57%] reset
  reading sources... [ 64%] s390-dasd-ipl
  reading sources... [ 71%] secure-coding-practices
  reading sources... [ 78%] stable-process
  reading sources... [ 85%] tcg
  reading sources... [ 92%] tcg-plugins
  reading sources... [100%] testing
  
- 
  Warning, treated as error:
  /home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/../include/exec/memory.h:3:Type 
must be either just a name or a typedef-like declaration.
  If just a name:
-   Error in declarator or parameters
-   Invalid C declaration: Expected identifier in nested name, got keyword: 
struct [error at 6]
- struct MemoryListener
- --^
+   Error in declarator or parameters
+   Invalid C declaration: Expected identifier in nested name, got keyword: 
struct [error at 6]
+ struct MemoryListener
+ --^
  If typedef-like declaration:
-   Error in declarator or parameters
-   Invalid C declaration: Expected identifier in nested name. [error at 21]
- struct MemoryListener
- -^
+   Error in declarator or parameters
+   Invalid C declaration: Expected identifier in nested name. [error at 21]
+ struct MemoryListener
+ -^
  
  make: *** [Makefile:1095: docs/devel/index.html] Error 2
  make: *** Waiting for unfinished jobs
  
  I found this commit for memory.h that includes the section that faults.
  
https://github.com/qemu/qemu/commit/5d248213180749e674fbccbacc6ee9c38499abb3#diff-d892cbf314945b44699534cc1de4ebbd
  
- You can see the whol build log here.
+ You can see the whole build log here.
  
https://pkgsubmit.mageia.org/uploads/failure/cauldr

Re: [RFC PATCH v2] target/ppc: Enable hardfloat for PPC

[BALATON Zoltan]

On Fri, 10 Apr 2020, 罗勇刚(Yonggang Luo) wrote:

Are this stable now? I'd like to see hard float to be landed:)


If you want to see hardfloat for PPC then you should read the replies to 
this patch which can be found here:


http://patchwork.ozlabs.org/patch/1240235/

to understand what's needed then try to implement the solution with FP 
exceptions cached in a global that maybe could work. I won't be able to do 
that as said here:


https://lists.nongnu.org/archive/html/qemu-ppc/2020-03/msg6.html

because I don't have time to learn all the details needed. I think others 
are in the same situation so unless somebody puts in the necessary effort 
this won't change.


Regards,
BALATON Zoltan

[Bug 1872113] Re: qemu docs fails to build with Sphinx 3.0.x

[Peter Maydell]

Hmm, that's not ideal. The C is valid C which the compiler accepts, so
I'm not sure what Sphinx is complaining about, and I don't have a system
with that new a version of Sphinx.

It does suggest that we ought to make our configure --enable-werror
/--disable-werror (and the code that makes the default be disable for
releases) control Sphinx's warnings-as-errors option as well as the
compiler's, which would at least mean that for released versions the
build doesn't fail entirely on Sphinx warnings.

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1872113

Title:
  qemu docs fails to build with Sphinx 3.0.x

Status in QEMU:
  New

Bug description:
  We've just updated Sphinx to version 3.0.1 and qemu fails to build the
  docs with this version.

  Here's the relevant section in the build log.

  CONFDIR="/etc/qemu" /usr/bin/sphinx-build-3  -W -b html -D version=4.2.92 -D 
release="4.2.92 (qemu-5.0.0-0.rc2.0.1.mga8)" -d .doctrees/devel-html 
/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/devel docs/devel
  Running Sphinx v3.0.1
  making output directory... done
  building [mo]: targets for 0 po files that are out of date
  building [html]: targets for 14 source files that are out of date
  updating environment: [new config] 14 added, 0 changed, 0 removed
  reading sources... [  7%] bitops
  reading sources... [ 14%] decodetree
  reading sources... [ 21%] index
  reading sources... [ 28%] kconfig
  reading sources... [ 35%] loads-stores
  reading sources... [ 42%] memory
  reading sources... [ 50%] migration
  reading sources... [ 57%] reset
  reading sources... [ 64%] s390-dasd-ipl
  reading sources... [ 71%] secure-coding-practices
  reading sources... [ 78%] stable-process
  reading sources... [ 85%] tcg
  reading sources... [ 92%] tcg-plugins
  reading sources... [100%] testing

  Warning, treated as error:
  /home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/../include/exec/memory.h:3:Type 
must be either just a name or a typedef-like declaration.
  If just a name:
    Error in declarator or parameters
    Invalid C declaration: Expected identifier in nested name, got keyword: 
struct [error at 6]
  struct MemoryListener
  --^
  If typedef-like declaration:
    Error in declarator or parameters
    Invalid C declaration: Expected identifier in nested name. [error at 21]
  struct MemoryListener
  -^

  make: *** [Makefile:1095: docs/devel/index.html] Error 2
  make: *** Waiting for unfinished jobs

  I found this commit for memory.h that includes the section that faults.
  
https://github.com/qemu/qemu/commit/5d248213180749e674fbccbacc6ee9c38499abb3#diff-d892cbf314945b44699534cc1de4ebbd

  You can see the whole build log here.
  
https://pkgsubmit.mageia.org/uploads/failure/cauldron/core/release/20200410161120.tv.duvel.699/log/qemu-5.0.0-0.rc2.0.1.mga8/build.0.20200410161338.log

  System: Mageia Cauldron

To manage notifications about this bug go to:
https://bugs.launchpad.net/qemu/+bug/1872113/+subscriptions

Re: [PULL 08/13] softfloat: Fix BAD_SHIFT from normalizeFloatx80Subnormal

[Aleksandar Markovic]

18:14 Pet, 10.04.2020. Peter Maydell  је
написао/ла:

> But I think some submaintainers don't bother to add r-by tags
> for things they review in the process of assembling their
> tree because they see it as implicit in the process.
>

I think that was precisely the case in this patch.

May I wish you, Peter, the best health, and thanks UK for giving the world
Dr. John Campbell from northern England, whose videos I watch every day
with the closest possible attention, and the highest admiration.

Aleksandar

> thanks
> -- PMM

[Bug 1872113] Re: qemu docs fails to build with Sphinx 3.0.x

[Stig-Ørjan Smelror]

One of our packaging gurus make a small change that removed the error
fails option.

# Don't treat warnings as errors when building docs with sphinx
sed -i -e '/SPHINX_BUILD/s/-W//' Makefile

The build completes now, however there are still errors.

CONFDIR="/etc/qemu" /usr/bin/sphinx-build-3   -b html -D version=4.2.92 -D 
release="4.2.92 (qemu-5.0.0-0.rc2.0.1.mga8)" -d .doctrees/devel-html 
/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/devel docs/devel 
Running Sphinx v3.0.1
making output directory... done
building [mo]: targets for 0 po files that are out of date
building [html]: targets for 14 source files that are out of date
updating environment: [new config] 14 added, 0 changed, 0 removed
reading sources... [  7%] bitops
reading sources... [ 14%] decodetree
reading sources... [ 21%] index
reading sources... [ 28%] kconfig
reading sources... [ 35%] loads-stores
reading sources... [ 42%] memory
reading sources... [ 50%] migration
reading sources... [ 57%] reset
reading sources... [ 64%] s390-dasd-ipl
reading sources... [ 71%] secure-coding-practices
reading sources... [ 78%] stable-process
reading sources... [ 85%] tcg
reading sources... [ 92%] tcg-plugins
reading sources... [100%] testing

/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/../include/exec/memory.h:3: 
WARNING: Type must be either just a name or a typedef-like declaration.
If just a name:
  Error in declarator or parameters
  Invalid C declaration: Expected identifier in nested name, got keyword: 
struct [error at 6]
struct MemoryListener
--^
If typedef-like declaration:
  Error in declarator or parameters
  Invalid C declaration: Expected identifier in nested name. [error at 21]
struct MemoryListener
-^

/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/../include/exec/memory.h:428: 
WARNING: Type must be either just a name or a typedef-like declaration.
If just a name:
  Error in declarator or parameters
  Invalid C declaration: Expected identifier in nested name, got keyword: 
struct [error at 6]
struct AddressSpace
--^
If typedef-like declaration:
  Error in declarator or parameters
  Invalid C declaration: Expected identifier in nested name. [error at 19]
struct AddressSpace
---^

/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/../include/exec/memory.h:673: 
WARNING: Type must be either just a name or a typedef-like declaration.
If just a name:
  Error in declarator or parameters
  Invalid C declaration: Expected identifier in nested name, got keyword: 
struct [error at 6]
struct MemoryRegionSection
--^
If typedef-like declaration:
  Error in declarator or parameters
  Invalid C declaration: Expected identifier in nested name. [error at 26]
struct MemoryRegionSection
--^

/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/../include/exec/memory.h:834: 
WARNING: Error in declarator or parameters
Invalid C declaration: Expecting "," or ")" in parameters, got "EOF". [error at 
208]
  void memory_region_init_resizeable_ram (MemoryRegion * mr, struct Object * 
owner, const char * name, uint64_t size, uint64_t max_size, void (*resized) 
(const char*, uint64_t length, void *host, Error ** errp)
  
^
looking for now-outdated files... none found
pickling environment... done
checking consistency... done
preparing documents... done
writing output... [  7%] bitops
writing output... [ 14%] decodetree
writing output... [ 21%] index
writing output... [ 28%] kconfig
writing output... [ 35%] loads-stores
writing output... [ 42%] memory
writing output... [ 50%] migration
writing output... [ 57%] reset
writing output... [ 64%] s390-dasd-ipl
writing output... [ 71%] secure-coding-practices
writing output... [ 78%] stable-process
writing output... [ 85%] tcg
writing output... [ 92%] tcg-plugins
writing output... [100%] testing

generating indices...  genindexdone
writing additional pages...  searchdone
copying static files... ... done
copying extra files... done
dumping search index in English (code: en)... done
dumping object inventory... done
build succeeded, 4 warnings.

The HTML pages are in docs/devel.

-- 
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1872113

Title:
  qemu docs fails to build with Sphinx 3.0.x

Status in QEMU:
  New

Bug description:
  We've just updated Sphinx to version 3.0.1 and qemu fails to build the
  docs with this version.

  Here's the relevant section in the build log.

  CONFDIR="/etc/qemu" /usr/bin/sphinx-build-3  -W -b html -D version=4.2.92 -D 
release="4.2.92 (qemu-5.0.0-0.rc2.0.1.mga8)" -d .doctrees/devel-html 
/home/iurt/rpmbuild/BUILD/qemu-5.0.0-rc2/docs/devel docs/devel
  Running Sphinx v3.0.1
  making output 

[PATCH] linux-user/sparc64: Translate flushw opcode

[LemonBoy]

>From 11d0cfe58d12e0f191b435ade88622cfceb2098a Mon Sep 17 00:00:00 2001
From: LemonBoy 
Date: Fri, 10 Apr 2020 22:55:26 +0200
Subject: [PATCH] linux-user/sparc64: Translate flushw opcode

The ifdef logic should unconditionally compile in the `xop == 0x2b` case
when targeting sparc64.

Fix the handling of window spill traps by keeping cansave into account
when calculating the new CWP.

Signed-off-by: Giuseppe Musacchio 
---
 bsd-user/main.c | 4 +++-
 linux-user/sparc/cpu_loop.c | 4 +++-
 target/sparc/translate.c| 2 ++
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/bsd-user/main.c b/bsd-user/main.c
index 770c2b267a..d6b1c997e3 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -413,7 +413,9 @@ static void save_window(CPUSPARCState *env)
 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
 env->wim = new_wim;
 #else
-save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
+/* cansave is zero if the spill trap handler is triggered by `save` and */
+/* nonzero if triggered by a `flushw` */
+save_window_offset(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2));
 env->cansave++;
 env->canrestore--;
 #endif
diff --git a/linux-user/sparc/cpu_loop.c b/linux-user/sparc/cpu_loop.c
index 7645cc04ca..20a7401126 100644
--- a/linux-user/sparc/cpu_loop.c
+++ b/linux-user/sparc/cpu_loop.c
@@ -69,7 +69,9 @@ static void save_window(CPUSPARCState *env)
 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
 env->wim = new_wim;
 #else
-save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
+/* cansave is zero if the spill trap handler is triggered by `save` and */
+/* nonzero if triggered by a `flushw` */
+save_window_offset(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2));
 env->cansave++;
 env->canrestore--;
 #endif
diff --git a/target/sparc/translate.c b/target/sparc/translate.c
index 9416a551cf..1a4efd4ed6 100644
--- a/target/sparc/translate.c
+++ b/target/sparc/translate.c
@@ -3663,6 +3663,8 @@ static void disas_sparc_insn(DisasContext * dc, unsigned 
int insn)
 #endif
 gen_store_gpr(dc, rd, cpu_tmp0);
 break;
+#endif
+#if defined(TARGET_SPARC64) || !defined(CONFIG_USER_ONLY)
 } else if (xop == 0x2b) { /* rdtbr / V9 flushw */
 #ifdef TARGET_SPARC64
 gen_helper_flushw(cpu_env);
-- 
2.20.1

[PATCH] module: increase dirs array size by one

[Bruce Rogers]

With the module upgrades code change, the statically sized dirs array
can now overflow. Increase it's size by one, according to the new
maximum possible usage.

Fixes: bd83c861c0 ("modules: load modules from versioned /var/run dir")
Signed-off-by: Bruce Rogers 
---
 util/module.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/module.c b/util/module.c
index 5f7896870a..e48d9aacc0 100644
--- a/util/module.c
+++ b/util/module.c
@@ -177,7 +177,7 @@ bool module_load_one(const char *prefix, const char 
*lib_name)
 char *version_dir;
 #endif
 const char *search_dir;
-char *dirs[4];
+char *dirs[5];
 char *module_name;
 int i = 0, n_dirs = 0;
 int ret;
-- 
2.26.0

[PATCH 1/2] net/colo-compare.c: Expose compare "max_queue_size" to users

[Zhang Chen]

From: Zhang Chen 

This patch allow users to set the "max_queue_size" according
to their environment.

Signed-off-by: Zhang Chen 
---
 net/colo-compare.c | 43 ++-
 qemu-options.hx|  5 +++--
 2 files changed, 45 insertions(+), 3 deletions(-)

diff --git a/net/colo-compare.c b/net/colo-compare.c
index 10c0239f9d..def60ff2ea 100644
--- a/net/colo-compare.c
+++ b/net/colo-compare.c
@@ -54,6 +54,7 @@ static NotifierList colo_compare_notifiers =
 static QemuMutex event_mtx;
 static QemuCond event_complete_cond;
 static int event_unhandled_count;
+static uint32_t max_queue_size;
 
 /*
  *  + CompareState ++
@@ -193,7 +194,7 @@ static void fill_pkt_tcp_info(void *data, uint32_t *max_ack)
  */
 static int colo_insert_packet(GQueue *queue, Packet *pkt, uint32_t *max_ack)
 {
-if (g_queue_get_length(queue) <= MAX_QUEUE_SIZE) {
+if (g_queue_get_length(queue) <= max_queue_size) {
 if (pkt->ip->ip_p == IPPROTO_TCP) {
 fill_pkt_tcp_info(pkt, max_ack);
 g_queue_insert_sorted(queue,
@@ -1051,6 +1052,37 @@ out:
 error_propagate(errp, local_err);
 }
 
+static void get_max_queue_size(Object *obj, Visitor *v,
+   const char *name, void *opaque,
+   Error **errp)
+{
+uint32_t value = max_queue_size;
+
+visit_type_uint32(v, name, &value, errp);
+}
+
+static void set_max_queue_size(Object *obj, Visitor *v,
+   const char *name, void *opaque,
+   Error **errp)
+{
+Error *local_err = NULL;
+uint32_t value;
+
+visit_type_uint32(v, name, &value, &local_err);
+if (local_err) {
+goto out;
+}
+if (!value) {
+error_setg(&local_err, "Property '%s.%s' requires a positive value",
+   object_get_typename(obj), name);
+goto out;
+}
+max_queue_size = value;
+
+out:
+error_propagate(errp, local_err);
+}
+
 static void compare_pri_rs_finalize(SocketReadState *pri_rs)
 {
 CompareState *s = container_of(pri_rs, CompareState, pri_rs);
@@ -1167,6 +1199,11 @@ static void colo_compare_complete(UserCreatable *uc, 
Error **errp)
 s->expired_scan_cycle = REGULAR_PACKET_CHECK_MS;
 }
 
+if (!max_queue_size) {
+/* Set default queue size to 1024 */
+max_queue_size = MAX_QUEUE_SIZE;
+}
+
 if (find_and_check_chardev(&chr, s->pri_indev, errp) ||
 !qemu_chr_fe_init(&s->chr_pri_in, chr, errp)) {
 return;
@@ -1270,6 +1307,10 @@ static void colo_compare_init(Object *obj)
 compare_get_expired_scan_cycle,
 compare_set_expired_scan_cycle, NULL, NULL, NULL);
 
+object_property_add(obj, "max_queue_size", "uint32",
+get_max_queue_size,
+set_max_queue_size, NULL, NULL, NULL);
+
 s->vnet_hdr = false;
 object_property_add_bool(obj, "vnet_hdr_support", compare_get_vnet_hdr,
  compare_set_vnet_hdr, NULL);
diff --git a/qemu-options.hx b/qemu-options.hx
index 16debd03cb..107ff3e71b 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -4615,7 +4615,7 @@ SRST
 stored. The file format is libpcap, so it can be analyzed with
 tools such as tcpdump or Wireshark.
 
-``-object 
colo-compare,id=id,primary_in=chardevid,secondary_in=chardevid,outdev=chardevid,iothread=id[,vnet_hdr_support][,notify_dev=id][,compare_timeout=@var{ms}][,expired_scan_cycle=@var{ms}``
+``-object 
colo-compare,id=id,primary_in=chardevid,secondary_in=chardevid,outdev=chardevid,iothread=id[,vnet_hdr_support][,notify_dev=id][,compare_timeout=@var{ms}][,expired_scan_cycle=@var{ms}][,max_queue_size=@var{size}]``
 Colo-compare gets packet from primary\_inchardevid and
 secondary\_inchardevid, than compare primary packet with
 secondary packet. If the packets are same, we will output
@@ -4627,7 +4627,8 @@ SRST
 vnet\_hdr\_len. Then compare\_timeout=@var{ms} determines the
 maximum delay colo-compare wait for the packet.
 The expired\_scan\_cycle=@var{ms} to set the period of scanning
-expired primary node network packets.
+expired primary node network packets. The max\_queue\_size=@var{size}
+is to set the max compare queue size depend on user environment.
 If you want to use Xen COLO, will need the notify\_dev to
 notify Xen colo-frame to do checkpoint.
 
-- 
2.17.1

[PATCH 0/2] net/colo-compare.c: Expose "max_queue_size" to users and clean up

[Zhang Chen]

From: Zhang Chen 

This series make a way to config COLO "max_queue_size" parameters according to
user's scenarios and environments and do some clean up for descriptions.

Zhang Chen (2):
  net/colo-compare.c: Expose compare "max_queue_size" to users
  qemu-options.hx: Clean up and fix typo for colo-compare

 net/colo-compare.c | 43 ++-
 qemu-options.hx| 33 +
 2 files changed, 59 insertions(+), 17 deletions(-)

-- 
2.17.1

[PATCH 2/2] qemu-options.hx: Clean up and fix typo for colo-compare

[Zhang Chen]

From: Zhang Chen 

Fix some typo and optimized some descriptions.

Signed-off-by: Zhang Chen 
---
 qemu-options.hx | 32 
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/qemu-options.hx b/qemu-options.hx
index 107ff3e71b..84368f15be 100644
--- a/qemu-options.hx
+++ b/qemu-options.hx
@@ -4616,24 +4616,24 @@ SRST
 tools such as tcpdump or Wireshark.
 
 ``-object 
colo-compare,id=id,primary_in=chardevid,secondary_in=chardevid,outdev=chardevid,iothread=id[,vnet_hdr_support][,notify_dev=id][,compare_timeout=@var{ms}][,expired_scan_cycle=@var{ms}][,max_queue_size=@var{size}]``
-Colo-compare gets packet from primary\_inchardevid and
-secondary\_inchardevid, than compare primary packet with
-secondary packet. If the packets are same, we will output
-primary packet to outdevchardevid, else we will notify
-colo-frame do checkpoint and send primary packet to
-outdevchardevid. In order to improve efficiency, we need to put
-the task of comparison in another thread. If it has the
-vnet\_hdr\_support flag, colo compare will send/recv packet with
-vnet\_hdr\_len. Then compare\_timeout=@var{ms} determines the
-maximum delay colo-compare wait for the packet.
-The expired\_scan\_cycle=@var{ms} to set the period of scanning
-expired primary node network packets. The max\_queue\_size=@var{size}
-is to set the max compare queue size depend on user environment.
-If you want to use Xen COLO, will need the notify\_dev to
+Colo-compare gets packet from primary\_in chardevid and
+secondary\_in, then compare whether the payload of primary packet
+and secondary packet are the same. If same, it will output
+primary packet to out\_dev, else it will notify COLO-framework to do
+checkpoint and send primary packet to out\_dev. In order to
+improve efficiency, we need to put the task of comparison in
+another iothread. If it has the vnet\_hdr\_support flag,
+colo compare will send/recv packet with vnet\_hdr\_len.
+The compare\_timeout=@var{ms} determines the maximum time of the
+colo-compare hold the packet. The expired\_scan\_cycle=@var{ms}
+is to set the period of scanning expired primary node network packets.
+The max\_queue\_size=@var{size} is to set the max compare queue
+size depend on user environment.
+If user want to use Xen COLO, need to add the notify\_dev to
 notify Xen colo-frame to do checkpoint.
 
-we must use it with the help of filter-mirror and
-filter-redirector.
+COLO-compare must be used with the help of filter-mirror,
+filter-redirector and filter-rewriter.
 
 ::
 
-- 
2.17.1

RE: [PATCH v5 1/1] colo-compare: Fix memory leak in packet_enqueue()

[Zhang, Chen]

> -Original Message-
> From: Derek Su 
> Sent: Friday, April 10, 2020 10:01 AM
> To: qemu-devel@nongnu.org
> Cc: Zhang, Chen ; lizhij...@cn.fujitsu.com;
> jasow...@redhat.com; ctch...@qnap.com; chy...@qnap.com;
> jwsu1...@gmail.com; Derek Su 
> Subject: [PATCH v5 1/1] colo-compare: Fix memory leak in packet_enqueue()
> 
> The patch is to fix the "pkt" memory leak in packet_enqueue().
> The allocated "pkt" needs to be freed if the colo compare primary or
> secondary queue is too big.
> 
> Replace the error_report of full queue with a trace event.
> 

Looks good for me. Thanks your contribution.

Reviewed-by: Zhang Chen 

Thanks
Zhang Chen

> Signed-off-by: Derek Su 
> ---
>  net/colo-compare.c | 23 +++
>  net/trace-events   |  1 +
>  2 files changed, 16 insertions(+), 8 deletions(-)
> 
> diff --git a/net/colo-compare.c b/net/colo-compare.c index
> 10c0239f9d..035e11d4d3 100644
> --- a/net/colo-compare.c
> +++ b/net/colo-compare.c
> @@ -122,6 +122,10 @@ enum {
>  SECONDARY_IN,
>  };
> 
> +static const char *colo_mode[] = {
> +[PRIMARY_IN] = "primary",
> +[SECONDARY_IN] = "secondary",
> +};
> 
>  static int compare_chr_send(CompareState *s,
>  const uint8_t *buf, @@ -217,6 +221,7 @@ static 
> int
> packet_enqueue(CompareState *s, int mode, Connection **con)
>  ConnectionKey key;
>  Packet *pkt = NULL;
>  Connection *conn;
> +int ret;
> 
>  if (mode == PRIMARY_IN) {
>  pkt = packet_new(s->pri_rs.buf, @@ -245,16 +250,18 @@ static int
> packet_enqueue(CompareState *s, int mode, Connection **con)
>  }
> 
>  if (mode == PRIMARY_IN) {
> -if (!colo_insert_packet(&conn->primary_list, pkt, &conn->pack)) {
> -error_report("colo compare primary queue size too big,"
> - "drop packet");
> -}
> +ret = colo_insert_packet(&conn->primary_list, pkt,
> + &conn->pack);
>  } else {
> -if (!colo_insert_packet(&conn->secondary_list, pkt, &conn->sack)) {
> -error_report("colo compare secondary queue size too big,"
> - "drop packet");
> -}
> +ret = colo_insert_packet(&conn->secondary_list, pkt,
> + &conn->sack);
>  }
> +
> +if (!ret) {
> +trace_colo_compare_drop_packet(colo_mode[mode],
> +"queue size too big, drop packet");
> +packet_destroy(pkt, NULL);
> +pkt = NULL;
> +}
> +
>  *con = conn;
> 
>  return 0;
> diff --git a/net/trace-events b/net/trace-events index
> 02c13fd0ba..fa49c71533 100644
> --- a/net/trace-events
> +++ b/net/trace-events
> @@ -12,6 +12,7 @@ colo_proxy_main(const char *chr) ": %s"
> 
>  # colo-compare.c
>  colo_compare_main(const char *chr) ": %s"
> +colo_compare_drop_packet(const char *queue, const char *chr) ": %s: %s"
>  colo_compare_udp_miscompare(const char *sta, int size) ": %s = %d"
>  colo_compare_icmp_miscompare(const char *sta, int size) ": %s = %d"
>  colo_compare_ip_info(int psize, const char *sta, const char *stb, int ssize,
> const char *stc, const char *std) "ppkt size = %d, ip_src = %s, ip_dst = %s,
> spkt size = %d, ip_src = %s, ip_dst = %s"
> --
> 2.17.1

RE: [PATCH RFC 2/9] target/riscv: Add target/riscv/kvm.c to place the public kvm interface

[Jiangyifei]

> -Original Message-
> From: Anup Patel [mailto:a...@brainfault.org]
> Sent: Tuesday, March 31, 2020 7:19 PM
> To: Jiangyifei 
> Cc: QEMU Developers ; open list:RISC-V
> ; Anup Patel ;
> Zhanghailiang ; Sagar Karandikar
> ; Bastian Koppelmann
> ; Zhangxiaofeng (F)
> ; Alistair Francis
> ; yinyipeng ; Palmer
> Dabbelt ; dengkai (A) 
> Subject: Re: [PATCH RFC 2/9] target/riscv: Add target/riscv/kvm.c to place the
> public kvm interface
> 
> On Tue, Mar 31, 2020 at 2:43 PM Anup Patel  wrote:
> >
> > On Fri, Mar 13, 2020 at 9:23 AM Yifei Jiang  wrote:
> > >
> > > Add target/riscv/kvm.c to place kvm_arch_* function needed by
> kvm/kvm-all.c.
> > > Meanwhile, add riscv64 kvm support to configure.
> >
> > This should be for both riscv64 and riscv32. The KVMTOOL compiles
> > perfectly fine for riscv32 (although not tested much) so there is no
> > harm is supporting both riscv64 and riscv32 from start itself.
> 
> For your reference, I have updated KVM RISC-V and KVMTOOL RISC-V repos
> at:
> https://github.com/kvm-riscv/linux.git (riscv_kvm_master branch)
> https://github.com/kvm-riscv/kvmtool.git (riscv_master branch)
> 
> Above repos work for both RV32 and RV64 systems.
> 
> Regards,
> Anup

Hi,

I will add riscv32 support and send v2 series. But I don't test completely, 
because it need time to build riscv32 QEMU and its dependent libraries.
Anyway, I will continue to build and test riscv32 QEMU.

By the way, I had a problem with start riscv64 vm at latest kvm-riscv version.
lastest version:
tcg qemu: https://github.com/qemu/qemu
linux: https://github.com/kvm-riscv/linux
opensbi: https://github.com/riscv/opensbi
kvmtool: https://github.com/kvm-riscv/kvmtool
when start vm with kvmtools or this qemu series, I received kernel panic.
Do you have this problem ?

[3.583963] Run /sbin/init as init process
[3.972264] rcS[44]: unhandled signal 11 code 0x1 at 0x003fc8d67170
[3.997398] CPU: 0 PID: 44 Comm: rcS Not tainted 
5.6.0-rc5-14036-g6e1e9fcf5f30 #2
[4.025143] epc: 003fc8d67170 ra : 00018c1c sp : 003fffb84e00
[4.051611]  gp : 00136648 tp : 003fd6086710 t0 : 
0003
[4.078223]  t1 : 0001792c t2 : 000b s0 : 
00018bf0
[4.105082]  s1 : 003fffa2fa70 a0 : 00019868 a1 : 
0002
[4.131824]  a2 : 003fffb84e08 a3 : 00104984 a4 : 
001049dc
[4.158209]  a5 : 003fd628e710 a6 : 003fffb84e00 a7 : 

[4.184756]  s2 : 003fffa2fa10 s3 : 00137010 s4 : 
0001
[4.211448]  s5 : 003fc8d65918 s6 : 0001 s7 : 
00112000
[4.238238]  s8 : 00136140 s9 :  s10: 

[4.264880]  s11:  t3 : 003fc8d67170 t4 : 
0002
[4.291543]  t5 : 003fd6282180 t6 : 
[4.311196] status: 4020 badaddr: 003fc8d67170 cause: 
000c
[4.348835] init[1]: unhandled signal 11 code 0x1 at 0x003fd6292468
[4.373718] CPU: 0 PID: 1 Comm: init Not tainted 
5.6.0-rc5-14036-g6e1e9fcf5f30 #2
[4.401344] epc: 003fd6292468 ra : 00102f88 sp : 003fffa2f960
[4.427814]  gp : 00136648 tp : 003fc8b50710 t0 : 
003fd629d170
[4.454199]  t1 : 0238 t2 : 001353f0 s0 : 
00124000
[4.480699]  s1 : 0008 a0 : 00123aa8 a1 : 
0006
[4.507352]  a2 :  a3 :  a4 : 

[4.533818]  a5 : f000 a6 : 003fc8d65918 a7 : 
0104
[4.560408]  s2 :  s3 :  s4 : 

[4.586966]  s5 : 002c s6 : 0003 s7 : 

[4.613331]  s8 : 00136140 s9 :  s10: 

[4.640006]  s11:  t3 : 003fd6292468 t4 : 
0002
[4.666372]  t5 : 003fc8b53dc8 t6 : 
[4.686124] status: 4020 badaddr: 003fd6292468 cause: 
000c
[4.715612] Kernel panic - not syncing: Attempted to kill init! 
exitcode=0x000b

Best Regards,
Yifei Jiang

[PATCH RFC v2 4/9] target/riscv: Implement kvm_arch_get_registers

[Yifei Jiang]

Get GPR CSR and FP registers from kvm by KVM_GET_ONE_REG ioctl.

Signed-off-by: Yifei Jiang 
Signed-off-by: Yipeng Yin 
---
 target/riscv/kvm.c | 144 -
 1 file changed, 143 insertions(+), 1 deletion(-)

diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index 3e8f8e7185..8d5069b9e9 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -50,13 +50,155 @@ static __u64 kvm_riscv_reg_id(__u64 type, __u64 idx)
 return id;
 }
 
+#define RISCV_CORE_REG(name)  kvm_riscv_reg_id(KVM_REG_RISCV_CORE, \
+ KVM_REG_RISCV_CORE_REG(name))
+
+#define RISCV_CSR_REG(name)  kvm_riscv_reg_id(KVM_REG_RISCV_CSR, \
+ KVM_REG_RISCV_CSR_REG(name))
+
+#define RISCV_FP_F_REG(idx)  kvm_riscv_reg_id(KVM_REG_RISCV_FP_F, idx)
+
+#define RISCV_FP_D_REG(idx)  kvm_riscv_reg_id(KVM_REG_RISCV_FP_D, idx)
+
+static int kvm_riscv_get_regs_core(CPUState *cs)
+{
+int ret = 0;
+int i;
+uint64_t reg;
+CPURISCVState *env = &RISCV_CPU(cs)->env;
+
+ret = kvm_get_one_reg(cs, RISCV_CORE_REG(regs.pc), ®);
+if (ret) {
+return ret;
+}
+env->pc = reg;
+
+for (i = 1; i < 32; i++) {
+__u64 id = kvm_riscv_reg_id(KVM_REG_RISCV_CORE, i);
+ret = kvm_get_one_reg(cs, id, ®);
+if (ret) {
+return ret;
+}
+env->gpr[i] = reg;
+}
+
+return ret;
+}
+
+static int kvm_riscv_get_regs_csr(CPUState *cs)
+{
+int ret = 0;
+uint64_t reg;
+CPURISCVState *env = &RISCV_CPU(cs)->env;
+
+ret = kvm_get_one_reg(cs, RISCV_CSR_REG(sstatus), ®);
+if (ret) {
+return ret;
+}
+env->mstatus = reg;
+
+ret = kvm_get_one_reg(cs, RISCV_CSR_REG(sie), ®);
+if (ret) {
+return ret;
+}
+env->mie = reg;
+
+ret = kvm_get_one_reg(cs, RISCV_CSR_REG(stvec), ®);
+if (ret) {
+return ret;
+}
+env->stvec = reg;
+
+ret = kvm_get_one_reg(cs, RISCV_CSR_REG(sscratch), ®);
+if (ret) {
+return ret;
+}
+env->sscratch = reg;
+
+ret = kvm_get_one_reg(cs, RISCV_CSR_REG(sepc), ®);
+if (ret) {
+return ret;
+}
+env->sepc = reg;
+
+ret = kvm_get_one_reg(cs, RISCV_CSR_REG(scause), ®);
+if (ret) {
+return ret;
+}
+env->scause = reg;
+
+ret = kvm_get_one_reg(cs, RISCV_CSR_REG(sip), ®);
+if (ret) {
+return ret;
+}
+env->mip = reg;
+
+ret = kvm_get_one_reg(cs, RISCV_CSR_REG(sstatus), ®);
+if (ret) {
+return ret;
+}
+env->satp = reg;
+
+return ret;
+}
+
+static int kvm_riscv_get_regs_fp(CPUState *cs)
+{
+int ret = 0;
+int i;
+CPURISCVState *env = &RISCV_CPU(cs)->env;
+
+if (riscv_has_ext(env, RVD)) {
+uint64_t reg;
+for (i = 0; i < 32; i++) {
+ret = kvm_get_one_reg(cs, RISCV_FP_D_REG(i), ®);
+if (ret) {
+return ret;
+}
+env->fpr[i] = reg;
+}
+return ret;
+}
+
+if (riscv_has_ext(env, RVF)) {
+uint32_t reg;
+for (i = 0; i < 32; i++) {
+ret = kvm_get_one_reg(cs, RISCV_FP_F_REG(i), ®);
+if (ret) {
+return ret;
+}
+env->fpr[i] = reg;
+}
+return ret;
+}
+
+return ret;
+}
+
 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
 KVM_CAP_LAST_INFO
 };
 
 int kvm_arch_get_registers(CPUState *cs)
 {
-return 0;
+int ret = 0;
+
+ret = kvm_riscv_get_regs_core(cs);
+if (ret) {
+return ret;
+}
+
+ret = kvm_riscv_get_regs_csr(cs);
+if (ret) {
+return ret;
+}
+
+ret = kvm_riscv_get_regs_fp(cs);
+if (ret) {
+return ret;
+}
+
+return ret;
 }
 
 int kvm_arch_put_registers(CPUState *cs, int level)
-- 
2.19.1

[PATCH RFC v2 0/9] Add riscv kvm accel support

[Yifei Jiang]

This series adds both riscv32 and riscv64 kvm support, It is based on
riscv_kvm_master branch at https://github.com/kvm-riscv/linux.

This series depends on above pending changes which haven't yet been
accepted, so this QEMU patch series is blocked until that dependency
has been dealt with, but is worth reviewing anyway.

Several steps to use this:
1. Build emulation
$ ./configure --target-list=riscv64-softmmu
$ make -j$(nproc)

2. Build kernel
riscv_kvm_master branch at https://github.com/kvm-riscv/linux

3. Build QEMU VM
I cross built in riscv toolchain.
$ PKG_CONFIG_LIBDIR=
$ export PKG_CONFIG_SYSROOT_DIR=
$ ./configure --target-list=riscv64-softmmu --enable-kvm \
--cross-prefix=riscv64-linux-gnu- --disable-libiscsi --disable-glusterfs \
--disable-libusb --disable-usb-redir --audio-drv-list= --disable-opengl \
--disable-libxml2
$ make -j$(nproc)

4. Start emulation
$ ./qemu-system-riscv64 -M virt -m 4096M -cpu rv64,x-h=true -nographic \
-name guest=riscv-hyp,debug-threads=on \
-smp 4 \
-kernel ./fw_jump.elf \
-device loader,file=./Image,addr=0x8020 \
-drive file=./hyp.img,format=raw,id=hd0 \
-device virtio-blk-device,drive=hd0 \
-append "root=/dev/vda rw console=ttyS0 earlycon=sbi"

5. Start kvm-acceled QEMU VM in emulation
$ ./qemu-system-riscv64 -M virt,accel=kvm -m 1024M -cpu host -nographic \
-name guest=riscv-guset \
 -smp 2 \
-kernel ./Image \
-drive file=./guest.img,format=raw,id=hd0 \
-device virtio-blk-device,drive=hd0 \
-append "root=/dev/vda rw console=ttyS0 earlycon=sbi"

Changes since RFC v1
1、Add separate SBI ecall interface header.
2、Add riscv32 kvm accel support.

Yifei Jiang (9):
  linux-header: Update linux/kvm.h
  target/riscv: Add target/riscv/kvm.c to place the public kvm interface
  target/riscv: Implement function kvm_arch_init_vcpu
  target/riscv: Implement kvm_arch_get_registers
  target/riscv: Implement kvm_arch_put_registers
  target/riscv: Support start kernel directly by KVM
  hw/riscv: PLIC update external interrupt by KVM when kvm enabled
  target/riscv: Handler KVM_EXIT_RISCV_SBI exit
  target/riscv: add host cpu type

 configure  |   1 +
 hw/riscv/sifive_plic.c |  31 +-
 hw/riscv/virt.c|  16 +-
 linux-headers/linux/kvm.h  |   8 +
 target/riscv/Makefile.objs |   1 +
 target/riscv/cpu.c |  10 +
 target/riscv/cpu.h |   4 +
 target/riscv/kvm.c | 501 +
 target/riscv/kvm_riscv.h   |  25 ++
 target/riscv/sbi_ecall_interface.h |  72 +
 10 files changed, 657 insertions(+), 12 deletions(-)
 create mode 100644 target/riscv/kvm.c
 create mode 100644 target/riscv/kvm_riscv.h
 create mode 100644 target/riscv/sbi_ecall_interface.h

-- 
2.19.1

[PATCH RFC v2 3/9] target/riscv: Implement function kvm_arch_init_vcpu

[Yifei Jiang]

Get isa info from kvm while kvm init.

Signed-off-by: Yifei Jiang 
Signed-off-by: Yipeng Yin 
---
 target/riscv/kvm.c | 26 +-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index 8c386d9acf..3e8f8e7185 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -38,6 +38,18 @@
 #include "qemu/log.h"
 #include "hw/loader.h"
 
+static __u64 kvm_riscv_reg_id(__u64 type, __u64 idx)
+{
+__u64 id = KVM_REG_RISCV | type | idx;
+
+#if defined(TARGET_RISCV32)
+id |= KVM_REG_SIZE_U32;
+#elif defined(TARGET_RISCV64)
+id |= KVM_REG_SIZE_U64;
+#endif
+return id;
+}
+
 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
 KVM_CAP_LAST_INFO
 };
@@ -79,7 +91,19 @@ void kvm_arch_init_irq_routing(KVMState *s)
 
 int kvm_arch_init_vcpu(CPUState *cs)
 {
-return 0;
+int ret = 0;
+uint64_t isa;
+RISCVCPU *cpu = RISCV_CPU(cs);
+__u64 id;
+
+id = kvm_riscv_reg_id(KVM_REG_RISCV_CONFIG, KVM_REG_RISCV_CONFIG_REG(isa));
+ret = kvm_get_one_reg(cs, id, &isa);
+if (ret) {
+return ret;
+}
+cpu->env.misa = isa;
+
+return ret;
 }
 
 int kvm_arch_msi_data_to_gsi(uint32_t data)
-- 
2.19.1

[PATCH RFC v2 2/9] target/riscv: Add target/riscv/kvm.c to place the public kvm interface

[Yifei Jiang]

Add target/riscv/kvm.c to place kvm_arch_* function needed by kvm/kvm-all.c.
Meanwhile, add kvm support in configure file.

Signed-off-by: Yifei Jiang 
Signed-off-by: Yipeng Yin 
---
 configure  |   1 +
 target/riscv/Makefile.objs |   1 +
 target/riscv/kvm.c | 128 +
 3 files changed, 130 insertions(+)
 create mode 100644 target/riscv/kvm.c

diff --git a/configure b/configure
index 233c671aaa..7114a1c64d 100755
--- a/configure
+++ b/configure
@@ -200,6 +200,7 @@ supported_kvm_target() {
 x86_64:i386 | x86_64:x86_64 | x86_64:x32 | \
 mips:mips | mipsel:mips | \
 ppc:ppc | ppc64:ppc | ppc:ppc64 | ppc64:ppc64 | ppc64:ppc64le | \
+riscv32:riscv32 | riscv64:riscv64 | \
 s390x:s390x)
 return 0
 ;;
diff --git a/target/riscv/Makefile.objs b/target/riscv/Makefile.objs
index ff651f69f6..7ea8f4c3da 100644
--- a/target/riscv/Makefile.objs
+++ b/target/riscv/Makefile.objs
@@ -1,5 +1,6 @@
 obj-y += translate.o op_helper.o cpu_helper.o cpu.o csr.o fpu_helper.o 
gdbstub.o
 obj-$(CONFIG_SOFTMMU) += pmp.o
+obj-$(CONFIG_KVM) += kvm.o
 
 ifeq ($(CONFIG_SOFTMMU),y)
 obj-y += monitor.o
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
new file mode 100644
index 00..8c386d9acf
--- /dev/null
+++ b/target/riscv/kvm.c
@@ -0,0 +1,128 @@
+/*
+ * RISC-V implementation of KVM hooks
+ *
+ * Copyright (c) 2020 Huawei Technologies Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include "qemu/osdep.h"
+#include 
+
+#include 
+
+#include "qemu-common.h"
+#include "qemu/timer.h"
+#include "qemu/error-report.h"
+#include "qemu/main-loop.h"
+#include "sysemu/sysemu.h"
+#include "sysemu/kvm.h"
+#include "sysemu/kvm_int.h"
+#include "cpu.h"
+#include "trace.h"
+#include "hw/pci/pci.h"
+#include "exec/memattrs.h"
+#include "exec/address-spaces.h"
+#include "hw/boards.h"
+#include "hw/irq.h"
+#include "qemu/log.h"
+#include "hw/loader.h"
+
+const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
+KVM_CAP_LAST_INFO
+};
+
+int kvm_arch_get_registers(CPUState *cs)
+{
+return 0;
+}
+
+int kvm_arch_put_registers(CPUState *cs, int level)
+{
+return 0;
+}
+
+int kvm_arch_release_virq_post(int virq)
+{
+return 0;
+}
+
+int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
+ uint64_t address, uint32_t data, PCIDevice *dev)
+{
+return 0;
+}
+
+int kvm_arch_destroy_vcpu(CPUState *cs)
+{
+return 0;
+}
+
+unsigned long kvm_arch_vcpu_id(CPUState *cpu)
+{
+return cpu->cpu_index;
+}
+
+void kvm_arch_init_irq_routing(KVMState *s)
+{
+}
+
+int kvm_arch_init_vcpu(CPUState *cs)
+{
+return 0;
+}
+
+int kvm_arch_msi_data_to_gsi(uint32_t data)
+{
+abort();
+}
+
+int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route,
+int vector, PCIDevice *dev)
+{
+return 0;
+}
+
+int kvm_arch_init(MachineState *ms, KVMState *s)
+{
+return 0;
+}
+
+int kvm_arch_irqchip_create(KVMState *s)
+{
+return 0;
+}
+
+int kvm_arch_process_async_events(CPUState *cs)
+{
+return 0;
+}
+
+void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
+{
+}
+
+MemTxAttrs kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
+{
+return MEMTXATTRS_UNSPECIFIED;
+}
+
+bool kvm_arch_stop_on_emulation_error(CPUState *cs)
+{
+return true;
+}
+
+int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
+{
+return 0;
+}
-- 
2.19.1

[PATCH RFC v2 5/9] target/riscv: Implement kvm_arch_put_registers

[Yifei Jiang]

Put GPR CSR and FP registers to kvm by KVM_SET_ONE_REG ioctl

Signed-off-by: Yifei Jiang 
Signed-off-by: Yipeng Yin 
---
 target/riscv/kvm.c | 136 -
 1 file changed, 135 insertions(+), 1 deletion(-)

diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index 8d5069b9e9..6dffda36bb 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -85,6 +85,31 @@ static int kvm_riscv_get_regs_core(CPUState *cs)
 return ret;
 }
 
+static int kvm_riscv_put_regs_core(CPUState *cs)
+{
+int ret = 0;
+int i;
+uint64_t reg;
+CPURISCVState *env = &RISCV_CPU(cs)->env;
+
+reg = env->pc;
+ret = kvm_set_one_reg(cs, RISCV_CORE_REG(regs.pc), ®);
+if (ret) {
+return ret;
+}
+
+for (i = 1; i < 32; i++) {
+__u64 id = kvm_riscv_reg_id(KVM_REG_RISCV_CORE, i);
+reg = env->gpr[i];
+ret = kvm_set_one_reg(cs, id, ®);
+if (ret) {
+return ret;
+}
+}
+
+return ret;
+}
+
 static int kvm_riscv_get_regs_csr(CPUState *cs)
 {
 int ret = 0;
@@ -142,6 +167,64 @@ static int kvm_riscv_get_regs_csr(CPUState *cs)
 return ret;
 }
 
+static int kvm_riscv_put_regs_csr(CPUState *cs)
+{
+int ret = 0;
+uint64_t reg;
+CPURISCVState *env = &RISCV_CPU(cs)->env;
+
+reg = env->mstatus;
+ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sstatus), ®);
+if (ret) {
+return ret;
+}
+
+reg = env->mie;
+ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sie), ®);
+if (ret) {
+return ret;
+}
+
+reg = env->stvec;
+ret = kvm_set_one_reg(cs, RISCV_CSR_REG(stvec), ®);
+if (ret) {
+return ret;
+}
+
+reg = env->sscratch;
+ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sscratch), ®);
+if (ret) {
+return ret;
+}
+
+reg = env->sepc;
+ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sepc), ®);
+if (ret) {
+return ret;
+}
+
+reg = env->scause;
+ret = kvm_set_one_reg(cs, RISCV_CSR_REG(scause), ®);
+if (ret) {
+return ret;
+}
+
+reg = env->mip;
+ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sip), ®);
+if (ret) {
+return ret;
+}
+
+reg = env->satp;
+ret = kvm_set_one_reg(cs, RISCV_CSR_REG(sstatus), ®);
+if (ret) {
+return ret;
+}
+
+return ret;
+}
+
+
 static int kvm_riscv_get_regs_fp(CPUState *cs)
 {
 int ret = 0;
@@ -175,6 +258,40 @@ static int kvm_riscv_get_regs_fp(CPUState *cs)
 return ret;
 }
 
+static int kvm_riscv_put_regs_fp(CPUState *cs)
+{
+int ret = 0;
+int i;
+CPURISCVState *env = &RISCV_CPU(cs)->env;
+
+if (riscv_has_ext(env, RVD)) {
+uint64_t reg;
+for (i = 0; i < 32; i++) {
+reg = env->fpr[i];
+ret = kvm_set_one_reg(cs, RISCV_FP_D_REG(i), ®);
+if (ret) {
+return ret;
+}
+}
+return ret;
+}
+
+if (riscv_has_ext(env, RVF)) {
+uint32_t reg;
+for (i = 0; i < 32; i++) {
+reg = env->fpr[i];
+ret = kvm_set_one_reg(cs, RISCV_FP_F_REG(i), ®);
+if (ret) {
+return ret;
+}
+}
+return ret;
+}
+
+return ret;
+}
+
+
 const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
 KVM_CAP_LAST_INFO
 };
@@ -203,7 +320,24 @@ int kvm_arch_get_registers(CPUState *cs)
 
 int kvm_arch_put_registers(CPUState *cs, int level)
 {
-return 0;
+int ret = 0;
+
+ret = kvm_riscv_put_regs_core(cs);
+if (ret) {
+return ret;
+}
+
+ret = kvm_riscv_put_regs_csr(cs);
+if (ret) {
+return ret;
+}
+
+ret = kvm_riscv_put_regs_fp(cs);
+if (ret) {
+return ret;
+}
+
+return ret;
 }
 
 int kvm_arch_release_virq_post(int virq)
-- 
2.19.1

[PATCH RFC v2 9/9] target/riscv: add host cpu type

[Yifei Jiang]

Currently, host cpu is inherited simply.

Signed-off-by: Yifei Jiang 
Signed-off-by: Yipeng Yin 
---
 target/riscv/cpu.c | 6 ++
 target/riscv/cpu.h | 1 +
 2 files changed, 7 insertions(+)

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 6a6af13ab9..e5b42c3a54 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -203,6 +203,10 @@ static void rv64imacu_nommu_cpu_init(Object *obj)
 set_feature(env, RISCV_FEATURE_PMP);
 }
 
+static void riscv_host_cpu_init(Object *obj)
+{
+}
+
 #endif
 
 static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
@@ -615,6 +619,7 @@ static const TypeInfo riscv_cpu_type_infos[] = {
 DEFINE_CPU(TYPE_RISCV_CPU_BASE32,   riscv_base32_cpu_init),
 DEFINE_CPU(TYPE_RISCV_CPU_SIFIVE_E31,   rv32imacu_nommu_cpu_init),
 DEFINE_CPU(TYPE_RISCV_CPU_SIFIVE_U34,   rv32gcsu_priv1_10_0_cpu_init),
+DEFINE_CPU(TYPE_RISCV_CPU_HOST, riscv_host_cpu_init),
 /* Depreacted */
 DEFINE_CPU(TYPE_RISCV_CPU_RV32IMACU_NOMMU,  rv32imacu_nommu_cpu_init),
 DEFINE_CPU(TYPE_RISCV_CPU_RV32GCSU_V1_09_1, rv32gcsu_priv1_09_1_cpu_init),
@@ -623,6 +628,7 @@ static const TypeInfo riscv_cpu_type_infos[] = {
 DEFINE_CPU(TYPE_RISCV_CPU_BASE64,   riscv_base64_cpu_init),
 DEFINE_CPU(TYPE_RISCV_CPU_SIFIVE_E51,   rv64imacu_nommu_cpu_init),
 DEFINE_CPU(TYPE_RISCV_CPU_SIFIVE_U54,   rv64gcsu_priv1_10_0_cpu_init),
+DEFINE_CPU(TYPE_RISCV_CPU_HOST, riscv_host_cpu_init),
 /* Deprecated */
 DEFINE_CPU(TYPE_RISCV_CPU_RV64IMACU_NOMMU,  rv64imacu_nommu_cpu_init),
 DEFINE_CPU(TYPE_RISCV_CPU_RV64GCSU_V1_09_1, rv64gcsu_priv1_09_1_cpu_init),
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index dcff112c5f..4901fd8061 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -39,6 +39,7 @@
 #define TYPE_RISCV_CPU_SIFIVE_E51   RISCV_CPU_TYPE_NAME("sifive-e51")
 #define TYPE_RISCV_CPU_SIFIVE_U34   RISCV_CPU_TYPE_NAME("sifive-u34")
 #define TYPE_RISCV_CPU_SIFIVE_U54   RISCV_CPU_TYPE_NAME("sifive-u54")
+#define TYPE_RISCV_CPU_HOST RISCV_CPU_TYPE_NAME("host")
 /* Deprecated */
 #define TYPE_RISCV_CPU_RV32IMACU_NOMMU  RISCV_CPU_TYPE_NAME("rv32imacu-nommu")
 #define TYPE_RISCV_CPU_RV32GCSU_V1_09_1 RISCV_CPU_TYPE_NAME("rv32gcsu-v1.9.1")
-- 
2.19.1

[PATCH RFC v2 7/9] hw/riscv: PLIC update external interrupt by KVM when kvm enabled

[Yifei Jiang]

Only support supervisor external interrupt currently.

Signed-off-by: Yifei Jiang 
Signed-off-by: Yipeng Yin 
---
 hw/riscv/sifive_plic.c   | 31 ++-
 target/riscv/kvm.c   | 19 +++
 target/riscv/kvm_riscv.h |  1 +
 3 files changed, 42 insertions(+), 9 deletions(-)

diff --git a/hw/riscv/sifive_plic.c b/hw/riscv/sifive_plic.c
index c1e04cbb98..ff5c18ed20 100644
--- a/hw/riscv/sifive_plic.c
+++ b/hw/riscv/sifive_plic.c
@@ -29,6 +29,8 @@
 #include "target/riscv/cpu.h"
 #include "sysemu/sysemu.h"
 #include "hw/riscv/sifive_plic.h"
+#include "sysemu/kvm.h"
+#include "kvm_riscv.h"
 
 #define RISCV_DEBUG_PLIC 0
 
@@ -145,15 +147,26 @@ static void sifive_plic_update(SiFivePLICState *plic)
 continue;
 }
 int level = sifive_plic_irqs_pending(plic, addrid);
-switch (mode) {
-case PLICMode_M:
-riscv_cpu_update_mip(RISCV_CPU(cpu), MIP_MEIP, 
BOOL_TO_MASK(level));
-break;
-case PLICMode_S:
-riscv_cpu_update_mip(RISCV_CPU(cpu), MIP_SEIP, 
BOOL_TO_MASK(level));
-break;
-default:
-break;
+if (kvm_enabled()) {
+if (mode == PLICMode_M) {
+continue;
+}
+#ifdef CONFIG_KVM
+kvm_riscv_set_irq(RISCV_CPU(cpu), IRQ_S_EXT, level);
+#endif
+} else {
+switch (mode) {
+case PLICMode_M:
+riscv_cpu_update_mip(RISCV_CPU(cpu),
+ MIP_MEIP, BOOL_TO_MASK(level));
+break;
+case PLICMode_S:
+riscv_cpu_update_mip(RISCV_CPU(cpu),
+ MIP_SEIP, BOOL_TO_MASK(level));
+break;
+default:
+break;
+}
 }
 }
 
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index b9aec66b69..0f429fd802 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -440,3 +440,22 @@ void kvm_riscv_reset_vcpu(RISCVCPU *cpu)
 env->gpr[11] = cpu->env.fdt_start; /* a1 */
 }
 
+void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level)
+{
+int ret;
+unsigned virq = level ? KVM_INTERRUPT_SET : KVM_INTERRUPT_UNSET;
+
+if (irq != IRQ_S_EXT) {
+return;
+}
+
+if (!kvm_enabled()) {
+return;
+}
+
+ret = kvm_vcpu_ioctl(CPU(cpu), KVM_INTERRUPT, &virq);
+if (ret < 0) {
+perror("Set irq failed");
+abort();
+}
+}
diff --git a/target/riscv/kvm_riscv.h b/target/riscv/kvm_riscv.h
index f38c82bf59..ed281bdce0 100644
--- a/target/riscv/kvm_riscv.h
+++ b/target/riscv/kvm_riscv.h
@@ -20,5 +20,6 @@
 #define QEMU_KVM_RISCV_H
 
 void kvm_riscv_reset_vcpu(RISCVCPU *cpu);
+void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level);
 
 #endif
-- 
2.19.1

[PATCH RFC v2 6/9] target/riscv: Support start kernel directly by KVM

[Yifei Jiang]

Get kernel and fdt start address in virt.c, and pass them to KVM
when cpu reset. In addition, add kvm_riscv.h to place riscv specific
interface.

Signed-off-by: Yifei Jiang 
Signed-off-by: Yipeng Yin 
---
 hw/riscv/virt.c  | 16 +---
 target/riscv/cpu.c   |  4 
 target/riscv/cpu.h   |  3 +++
 target/riscv/kvm.c   | 14 ++
 target/riscv/kvm_riscv.h | 24 
 5 files changed, 58 insertions(+), 3 deletions(-)
 create mode 100644 target/riscv/kvm_riscv.h

diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index 85ec9e22aa..d72eb782e4 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -42,6 +42,7 @@
 #include "exec/address-spaces.h"
 #include "hw/pci/pci.h"
 #include "hw/pci-host/gpex.h"
+#include "sysemu/kvm.h"
 
 #include 
 
@@ -480,6 +481,9 @@ static void riscv_virt_board_init(MachineState *machine)
 target_ulong start_addr = memmap[VIRT_DRAM].base;
 int i;
 unsigned int smp_cpus = machine->smp.cpus;
+uint64_t kernel_entry = 0;
+hwaddr start_fdt;
+CPUState *cs;
 
 /* Initialize SOC */
 object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
@@ -510,8 +514,7 @@ static void riscv_virt_board_init(MachineState *machine)
  memmap[VIRT_DRAM].base);
 
 if (machine->kernel_filename) {
-uint64_t kernel_entry = riscv_load_kernel(machine->kernel_filename,
-  NULL);
+kernel_entry = riscv_load_kernel(machine->kernel_filename, NULL);
 
 if (machine->initrd_filename) {
 hwaddr start;
@@ -564,10 +567,17 @@ static void riscv_virt_board_init(MachineState *machine)
 exit(1);
 }
 qemu_fdt_dumpdtb(s->fdt, fdt_totalsize(s->fdt));
+start_fdt = memmap[VIRT_MROM].base + sizeof(reset_vec);
 rom_add_blob_fixed_as("mrom.fdt", s->fdt, fdt_totalsize(s->fdt),
-  memmap[VIRT_MROM].base + sizeof(reset_vec),
+  start_fdt,
   &address_space_memory);
 
+for (cs = first_cpu; cs; cs = CPU_NEXT(cs)) {
+RISCVCPU *riscv_cpu = RISCV_CPU(cs);
+riscv_cpu->env.loader_start = kernel_entry;
+riscv_cpu->env.fdt_start = start_fdt;
+}
+
 /* create PLIC hart topology configuration string */
 plic_hart_config_len = (strlen(VIRT_PLIC_HART_CONFIG) + 1) * smp_cpus;
 plic_hart_config = g_malloc0(plic_hart_config_len);
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 4e578239d3..6a6af13ab9 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -28,6 +28,7 @@
 #include "hw/qdev-properties.h"
 #include "migration/vmstate.h"
 #include "fpu/softfloat-helpers.h"
+#include "kvm_riscv.h"
 
 /* RISC-V CPU definitions */
 
@@ -347,6 +348,9 @@ static void riscv_cpu_reset(DeviceState *dev)
 cs->exception_index = EXCP_NONE;
 env->load_res = -1;
 set_default_nan_mode(1, &env->fp_status);
+#ifdef CONFIG_KVM
+kvm_riscv_reset_vcpu(cpu);
+#endif
 }
 
 static void riscv_cpu_disas_set_info(CPUState *s, disassemble_info *info)
diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 7d21addbab..dcff112c5f 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -213,6 +213,9 @@ struct CPURISCVState {
 
 /* Fields from here on are preserved across CPU reset. */
 QEMUTimer *timer; /* Internal timer */
+
+hwaddr loader_start;
+hwaddr fdt_start;
 };
 
 #define RISCV_CPU_CLASS(klass) \
diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index 6dffda36bb..b9aec66b69 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -37,6 +37,7 @@
 #include "hw/irq.h"
 #include "qemu/log.h"
 #include "hw/loader.h"
+#include "kvm_riscv.h"
 
 static __u64 kvm_riscv_reg_id(__u64 type, __u64 idx)
 {
@@ -426,3 +427,16 @@ int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
 {
 return 0;
 }
+
+void kvm_riscv_reset_vcpu(RISCVCPU *cpu)
+{
+CPURISCVState *env = &cpu->env;
+
+if (!kvm_enabled()) {
+return;
+}
+env->pc = cpu->env.loader_start;
+env->gpr[10] = kvm_arch_vcpu_id(CPU(cpu)); /* a0 */
+env->gpr[11] = cpu->env.fdt_start; /* a1 */
+}
+
diff --git a/target/riscv/kvm_riscv.h b/target/riscv/kvm_riscv.h
new file mode 100644
index 00..f38c82bf59
--- /dev/null
+++ b/target/riscv/kvm_riscv.h
@@ -0,0 +1,24 @@
+/*
+ * QEMU KVM support -- RISC-V specific functions.
+ *
+ * Copyright (c) 2020 Huawei Technologies Co., Ltd
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2 or later, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU G

[PATCH RFC v2 8/9] target/riscv: Handler KVM_EXIT_RISCV_SBI exit

[Yifei Jiang]

Use char-fe handler console sbi call, which implement early
console io while apply 'earlycon=sbi' into kernel parameters.

The common SBI interface sbi_ecall_interface.h is introduced from
https://github.com/riscv/opensbi/blob/master/include/sbi/sbi_ecall_interface.h.

Signed-off-by: Yifei Jiang 
Signed-off-by: Yipeng Yin 
---
 target/riscv/kvm.c | 42 -
 target/riscv/sbi_ecall_interface.h | 72 ++
 2 files changed, 113 insertions(+), 1 deletion(-)
 create mode 100644 target/riscv/sbi_ecall_interface.h

diff --git a/target/riscv/kvm.c b/target/riscv/kvm.c
index 0f429fd802..ff6ea7816e 100644
--- a/target/riscv/kvm.c
+++ b/target/riscv/kvm.c
@@ -38,6 +38,8 @@
 #include "qemu/log.h"
 #include "hw/loader.h"
 #include "kvm_riscv.h"
+#include "sbi_ecall_interface.h"
+#include "chardev/char-fe.h"
 
 static __u64 kvm_riscv_reg_id(__u64 type, __u64 idx)
 {
@@ -423,9 +425,47 @@ bool kvm_arch_stop_on_emulation_error(CPUState *cs)
 return true;
 }
 
+static int kvm_riscv_handle_sbi(struct kvm_run *run)
+{
+int ret = 0;
+unsigned char ch;
+switch (run->riscv_sbi.extension_id) {
+case SBI_EXT_0_1_CONSOLE_PUTCHAR:
+ch = run->riscv_sbi.args[0];
+qemu_chr_fe_write(serial_hd(0)->be, &ch, sizeof(ch));
+break;
+case SBI_EXT_0_1_CONSOLE_GETCHAR:
+ret = qemu_chr_fe_read_all(serial_hd(0)->be, &ch, sizeof(ch));
+if (ret == sizeof(ch)) {
+run->riscv_sbi.args[0] = ch;
+} else {
+run->riscv_sbi.args[0] = -1;
+}
+break;
+default:
+qemu_log_mask(LOG_UNIMP,
+  "%s: un-handled SBI EXIT, specific reasons is %lu\n",
+  __func__, run->riscv_sbi.extension_id);
+ret = -1;
+break;
+}
+return ret;
+}
+
 int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
 {
-return 0;
+int ret = 0;
+switch (run->exit_reason) {
+case KVM_EXIT_RISCV_SBI:
+ret = kvm_riscv_handle_sbi(run);
+break;
+default:
+qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n",
+  __func__, run->exit_reason);
+ret = -1;
+break;
+}
+return ret;
 }
 
 void kvm_riscv_reset_vcpu(RISCVCPU *cpu)
diff --git a/target/riscv/sbi_ecall_interface.h 
b/target/riscv/sbi_ecall_interface.h
new file mode 100644
index 00..225dcd42b1
--- /dev/null
+++ b/target/riscv/sbi_ecall_interface.h
@@ -0,0 +1,72 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2019 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel 
+ */
+
+#ifndef __SBI_ECALL_INTERFACE_H__
+#define __SBI_ECALL_INTERFACE_H__
+
+/* clang-format off */
+
+/* SBI Extension IDs */
+#defineSBI_EXT_0_1_SET_TIMER   0x0
+#define SBI_EXT_0_1_CONSOLE_PUTCHAR0x1
+#define SBI_EXT_0_1_CONSOLE_GETCHAR0x2
+#define SBI_EXT_0_1_CLEAR_IPI  0x3
+#define SBI_EXT_0_1_SEND_IPI   0x4
+#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA  0x6
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7
+#define SBI_EXT_0_1_SHUTDOWN   0x8
+#define SBI_EXT_BASE   0x10
+#define SBI_EXT_TIME   0x54494D45
+#define SBI_EXT_IPI0x735049
+#define SBI_EXT_RFENCE 0x52464E43
+#define SBI_EXT_HSM0x48534D
+
+/* SBI function IDs for BASE extension*/
+#define SBI_EXT_BASE_GET_SPEC_VERSION  0x0
+#define SBI_EXT_BASE_GET_IMP_ID0x1
+#define SBI_EXT_BASE_GET_IMP_VERSION   0x2
+#define SBI_EXT_BASE_PROBE_EXT 0x3
+#define SBI_EXT_BASE_GET_MVENDORID 0x4
+#define SBI_EXT_BASE_GET_MARCHID   0x5
+#define SBI_EXT_BASE_GET_MIMPID0x6
+
+/* SBI function IDs for TIME extension*/
+#define SBI_EXT_TIME_SET_TIMER 0x0
+
+/* SBI function IDs for IPI extension*/
+#define SBI_EXT_IPI_SEND_IPI   0x0
+
+/* SBI function IDs for RFENCE extension*/
+#define SBI_EXT_RFENCE_REMOTE_FENCE_I  0x0
+#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA   0x1
+#define SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID  0x2
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA  0x3
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID 0x4
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA  0x5
+#define SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID 0x6
+
+/* SBI function IDs for HSM extension */
+#define SBI_EXT_HSM_HART_START 0x0
+#define SBI_EXT_HSM_HART_STOP  0x1
+#define SBI_EXT_HSM_HART_GET_STATUS0x2
+
+#define SBI_HSM_HART_STATUS_STARTED0x0
+#define SBI_HSM_HART_STATUS_STOPPED0x1
+#define SBI_HSM_HART_STATUS_START_PENDING  0x2
+#define SBI_HSM_HART_STATUS_STOP_PENDING   0x3
+
+#define SB

[PATCH RFC v2 1/9] linux-header: Update linux/kvm.h

[Yifei Jiang]

Update linux/kvm.h to commit b9a6e4cd9 on https://github.com/kvm-riscv/linux.
Only use this header file, so do not update all linux headers.

Signed-off-by: Yifei Jiang 
Signed-off-by: Yipeng Yin 
---
 linux-headers/linux/kvm.h | 8 
 1 file changed, 8 insertions(+)

diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index 265099100e..7cfc111af5 100644
--- a/linux-headers/linux/kvm.h
+++ b/linux-headers/linux/kvm.h
@@ -236,6 +236,7 @@ struct kvm_hyperv_exit {
 #define KVM_EXIT_IOAPIC_EOI   26
 #define KVM_EXIT_HYPERV   27
 #define KVM_EXIT_ARM_NISV 28
+#define KVM_EXIT_RISCV_SBI28
 
 /* For KVM_EXIT_INTERNAL_ERROR */
 /* Emulate instruction failed. */
@@ -400,6 +401,13 @@ struct kvm_run {
__u64 esr_iss;
__u64 fault_ipa;
} arm_nisv;
+   /* KVM_EXIT_RISCV_SBI */
+   struct {
+   unsigned long extension_id;
+   unsigned long function_id;
+   unsigned long args[6];
+   unsigned long ret[2];
+   } riscv_sbi;
/* Fix the size of the union. */
char padding[256];
};
-- 
2.19.1

Re: [PATCH RFC v2 0/9] Add riscv kvm accel support

[no-reply]

Patchew URL: 
https://patchew.org/QEMU/20200411041427.14828-1-jiangyi...@huawei.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Subject: [PATCH RFC v2 0/9] Add riscv kvm accel support
Message-id: 20200411041427.14828-1-jiangyi...@huawei.com
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Switched to a new branch 'test'
3705618 target/riscv: add host cpu type
efb216c target/riscv: Handler KVM_EXIT_RISCV_SBI exit
56aa404 hw/riscv: PLIC update external interrupt by KVM when kvm enabled
86280f4 target/riscv: Support start kernel directly by KVM
629e8e1 target/riscv: Implement kvm_arch_put_registers
c0a354d target/riscv: Implement kvm_arch_get_registers
689729d target/riscv: Implement function kvm_arch_init_vcpu
6e0b31c target/riscv: Add target/riscv/kvm.c to place the public kvm interface
e8f7f24 linux-header: Update linux/kvm.h

=== OUTPUT BEGIN ===
1/9 Checking commit e8f7f24b4bb3 (linux-header: Update linux/kvm.h)
2/9 Checking commit 6e0b31c6be80 (target/riscv: Add target/riscv/kvm.c to place 
the public kvm interface)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#38: 
new file mode 100644

total: 0 errors, 1 warnings, 141 lines checked

Patch 2/9 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
3/9 Checking commit 689729d06f73 (target/riscv: Implement function 
kvm_arch_init_vcpu)
4/9 Checking commit c0a354dd075c (target/riscv: Implement 
kvm_arch_get_registers)
5/9 Checking commit 629e8e18e44d (target/riscv: Implement 
kvm_arch_put_registers)
6/9 Checking commit 86280f4d8337 (target/riscv: Support start kernel directly 
by KVM)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#132: 
new file mode 100644

total: 0 errors, 1 warnings, 115 lines checked

Patch 6/9 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/9 Checking commit 56aa404c8db0 (hw/riscv: PLIC update external interrupt by 
KVM when kvm enabled)
8/9 Checking commit efb216c472d6 (target/riscv: Handler KVM_EXIT_RISCV_SBI exit)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#80: 
new file mode 100644

WARNING: architecture specific defines should be avoided
#94: FILE: target/riscv/sbi_ecall_interface.h:10:
+#ifndef __SBI_ECALL_INTERFACE_H__

ERROR: code indent should never use tabs
#100: FILE: target/riscv/sbi_ecall_interface.h:16:
+#define^ISBI_EXT_0_1_SET_TIMER^I^I^I0x0$

ERROR: code indent should never use tabs
#101: FILE: target/riscv/sbi_ecall_interface.h:17:
+#define SBI_EXT_0_1_CONSOLE_PUTCHAR^I^I0x1$

ERROR: code indent should never use tabs
#102: FILE: target/riscv/sbi_ecall_interface.h:18:
+#define SBI_EXT_0_1_CONSOLE_GETCHAR^I^I0x2$

ERROR: code indent should never use tabs
#103: FILE: target/riscv/sbi_ecall_interface.h:19:
+#define SBI_EXT_0_1_CLEAR_IPI^I^I^I0x3$

ERROR: code indent should never use tabs
#104: FILE: target/riscv/sbi_ecall_interface.h:20:
+#define SBI_EXT_0_1_SEND_IPI^I^I^I0x4$

ERROR: code indent should never use tabs
#105: FILE: target/riscv/sbi_ecall_interface.h:21:
+#define SBI_EXT_0_1_REMOTE_FENCE_I^I^I0x5$

ERROR: code indent should never use tabs
#106: FILE: target/riscv/sbi_ecall_interface.h:22:
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA^I^I0x6$

ERROR: code indent should never use tabs
#107: FILE: target/riscv/sbi_ecall_interface.h:23:
+#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID^I0x7$

ERROR: code indent should never use tabs
#108: FILE: target/riscv/sbi_ecall_interface.h:24:
+#define SBI_EXT_0_1_SHUTDOWN^I^I^I0x8$

ERROR: code indent should never use tabs
#109: FILE: target/riscv/sbi_ecall_interface.h:25:
+#define SBI_EXT_BASE^I^I^I^I0x10$

ERROR: code indent should never use tabs
#110: FILE: target/riscv/sbi_ecall_interface.h:26:
+#define SBI_EXT_TIME^I^I^I^I0x54494D45$

ERROR: code indent should never use tabs
#111: FILE: target/riscv/sbi_ecall_interface.h:27:
+#define SBI_EXT_IPI^I^I^I^I0x735049$

ERROR: code indent should never use tabs
#112: FILE: target/riscv/sbi_ecall_interface.h:28:
+#define SBI_EXT_RFENCE^I^I^I^I0x52464E43$

ERROR: code indent should never use tabs
#113: FILE: target/riscv/sbi_ecall_interface.h:29:
+#define SBI_EXT_HSM^I^I^I^I0x48534D$

ERROR: code indent should never use tabs
#116: FILE: target/riscv/sbi_ecall_interface.h:32:
+#define SBI_EXT_BASE_GET_SPEC_VERSION^I^I0x0$

ERROR: code indent should never use tabs
#117: FILE: target/riscv/sbi_ecall_interface.h:33:
+#define SBI_EXT_BASE_GET_IMP_ID^I^I^I0x1$

ERROR: code indent should never use tabs
#118: FILE: target/riscv/sbi_ecall_interface.h:34:
+#define SBI_EXT_BASE_GET_IMP_VERSION^I^I0x2$

Re: [PATCH] module: increase dirs array size by one

[Paolo Bonzini]

On 11/04/20 03:07, Bruce Rogers wrote:
> With the module upgrades code change, the statically sized dirs array
> can now overflow. Increase it's size by one, according to the new
> maximum possible usage.
> 
> Fixes: bd83c861c0 ("modules: load modules from versioned /var/run dir")
> Signed-off-by: Bruce Rogers 
> ---
>  util/module.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/util/module.c b/util/module.c
> index 5f7896870a..e48d9aacc0 100644
> --- a/util/module.c
> +++ b/util/module.c
> @@ -177,7 +177,7 @@ bool module_load_one(const char *prefix, const char 
> *lib_name)
>  char *version_dir;
>  #endif
>  const char *search_dir;
> -char *dirs[4];
> +char *dirs[5];
>  char *module_name;
>  int i = 0, n_dirs = 0;
>  int ret;
> 

Queued, thanks.

Paolo

[PATCH] virtiofsd/passthrough_ll: don't remove O_DIRECT when cache=none

[Catherine Ho]

cache=none means to bypass host cache. So we can't remove O_DIRECT flag in
unconditionally in update_open_flags();

Signed-off-by: Catherine Ho 
---
 tools/virtiofsd/passthrough_ll.c |   16 ++--
 1 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/tools/virtiofsd/passthrough_ll.c b/tools/virtiofsd/passthrough_ll.c
index 4c35c95..889e144 100644
--- a/tools/virtiofsd/passthrough_ll.c
+++ b/tools/virtiofsd/passthrough_ll.c
@@ -1677,7 +1677,8 @@ static void lo_releasedir(fuse_req_t req, fuse_ino_t ino,
 fuse_reply_err(req, 0);
 }
 
-static void update_open_flags(int writeback, struct fuse_file_info *fi)
+static void update_open_flags(int writeback, int cache_mode,
+  struct fuse_file_info *fi)
 {
 /*
  * With writeback cache, kernel may send read requests even
@@ -1702,10 +1703,13 @@ static void update_open_flags(int writeback, struct 
fuse_file_info *fi)
 
 /*
  * O_DIRECT in guest should not necessarily mean bypassing page
- * cache on host as well. If somebody needs that behavior, it
- * probably should be a configuration knob in daemon.
+ * cache on host as well. If cache=none, set the flag to O_DIRECT
  */
-fi->flags &= ~O_DIRECT;
+if (cache_mode == CACHE_NONE) {
+fi->flags |= O_DIRECT;
+} else {
+fi->flags &= ~O_DIRECT;
+}
 }
 
 static void lo_create(fuse_req_t req, fuse_ino_t parent, const char *name,
@@ -1737,7 +1741,7 @@ static void lo_create(fuse_req_t req, fuse_ino_t parent, 
const char *name,
 goto out;
 }
 
-update_open_flags(lo->writeback, fi);
+update_open_flags(lo->writeback, lo->cache, fi);
 
 fd = openat(parent_inode->fd, name, (fi->flags | O_CREAT) & ~O_NOFOLLOW,
 mode);
@@ -1947,7 +1951,7 @@ static void lo_open(fuse_req_t req, fuse_ino_t ino, 
struct fuse_file_info *fi)
 fuse_log(FUSE_LOG_DEBUG, "lo_open(ino=%" PRIu64 ", flags=%d)\n", ino,
  fi->flags);
 
-update_open_flags(lo->writeback, fi);
+update_open_flags(lo->writeback, lo->cache, fi);
 
 sprintf(buf, "%i", lo_fd(req, ino));
 fd = openat(lo->proc_self_fd, buf, fi->flags & ~O_NOFOLLOW);
-- 
1.7.1