[Qemu-devel] [PATCH v4 4/5] include/hw/acpi/acpi-defs: Add GICC Affinity Structure

[Shannon Zhao]

From: Shannon Zhao 

Signed-off-by: Shannon Zhao 
---
CC: Igor Mammedov 
---
 hw/i386/acpi-build.c|  2 +-
 include/hw/acpi/acpi-defs.h | 15 ++-
 2 files changed, 15 insertions(+), 2 deletions(-)

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 78758e2..0f0b88f 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -2300,7 +2300,7 @@ build_srat(GArray *table_data, GArray *linker, 
PcGuestInfo *guest_info)
 
 for (i = 0; i < guest_info->apic_id_limit; ++i) {
 core = acpi_data_push(table_data, sizeof *core);
-core->type = ACPI_SRAT_PROCESSOR;
+core->type = ACPI_SRAT_PROCESSOR_APIC;
 core->length = sizeof(*core);
 core->local_apic_id = i;
 curnode = guest_info->node_cpu[i];
diff --git a/include/hw/acpi/acpi-defs.h b/include/hw/acpi/acpi-defs.h
index c7a03d4..bcf5c3f 100644
--- a/include/hw/acpi/acpi-defs.h
+++ b/include/hw/acpi/acpi-defs.h
@@ -455,8 +455,10 @@ struct AcpiSystemResourceAffinityTable
 } QEMU_PACKED;
 typedef struct AcpiSystemResourceAffinityTable AcpiSystemResourceAffinityTable;
 
-#define ACPI_SRAT_PROCESSOR  0
+#define ACPI_SRAT_PROCESSOR_APIC 0
 #define ACPI_SRAT_MEMORY 1
+#define ACPI_SRAT_PROCESSOR_x2APIC   2
+#define ACPI_SRAT_PROCESSOR_GICC 3
 
 struct AcpiSratProcessorAffinity
 {
@@ -483,6 +485,17 @@ struct AcpiSratMemoryAffinity
 } QEMU_PACKED;
 typedef struct AcpiSratMemoryAffinity AcpiSratMemoryAffinity;
 
+struct AcpiSratProcessorGiccAffinity
+{
+ACPI_SUB_HEADER_DEF
+uint32_tproximity;
+uint32_tacpi_processor_uid;
+uint32_tflags;
+uint32_tclock_domain;
+} QEMU_PACKED;
+
+typedef struct AcpiSratProcessorGiccAffinity AcpiSratProcessorGiccAffinity;
+
 /* PCI fw r3.0 MCFG table. */
 /* Subtable */
 struct AcpiMcfgAllocation {
-- 
2.0.4

[Qemu-devel] [PATCH v4 5/5] hw/arm/virt-acpi-build: Generate SRAT table

[Shannon Zhao]

From: Shannon Zhao 

To support NUMA, it needs to generate SRAT ACPI table.

Signed-off-by: Shannon Zhao 
---
CC: Igor Mammedov 
---
 hw/arm/virt-acpi-build.c | 58 
 1 file changed, 58 insertions(+)

diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 87fbe7c..8438028 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -42,6 +42,7 @@
 #include "hw/acpi/aml-build.h"
 #include "hw/pci/pcie_host.h"
 #include "hw/pci/pci.h"
+#include "sysemu/numa.h"
 
 #define ARM_SPI_BASE 32
 #define ACPI_POWER_BUTTON_DEVICE "PWRB"
@@ -412,6 +413,58 @@ build_spcr(GArray *table_data, GArray *linker, 
VirtGuestInfo *guest_info)
 }
 
 static void
+build_srat(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
+{
+AcpiSystemResourceAffinityTable *srat;
+AcpiSratProcessorGiccAffinity *core;
+AcpiSratMemoryAffinity *numamem;
+int i, j, srat_start;
+uint64_t mem_len, mem_base;
+uint32_t *cpu_node = g_malloc0(guest_info->smp_cpus * sizeof *cpu_node);
+
+for (i = 0; i < guest_info->smp_cpus; i++) {
+for (j = 0; j < nb_numa_nodes; j++) {
+if (test_bit(i, numa_info[j].node_cpu)) {
+cpu_node[i] = j;
+break;
+}
+}
+}
+
+srat_start = table_data->len;
+srat = acpi_data_push(table_data, sizeof *srat);
+srat->reserved1 = cpu_to_le32(1);
+
+for (i = 0; i < guest_info->smp_cpus; ++i) {
+core = acpi_data_push(table_data, sizeof *core);
+core->type = ACPI_SRAT_PROCESSOR_GICC;
+core->length = sizeof(*core);
+core->proximity = cpu_node[i];
+core->acpi_processor_uid = i;
+core->flags = cpu_to_le32(1);
+}
+g_free(cpu_node);
+
+mem_base = guest_info->memmap[VIRT_MEM].base;
+for (i = 0; i < nb_numa_nodes; ++i) {
+mem_len = numa_info[i].node_mem;
+numamem = acpi_data_push(table_data, sizeof *numamem);
+numamem->type = ACPI_SRAT_MEMORY;
+numamem->length = sizeof(*numamem);
+memset(numamem->proximity, 0, 4);
+numamem->proximity[0] = i;
+numamem->flags = cpu_to_le32(1);
+numamem->base_addr = cpu_to_le64(mem_base);
+numamem->range_length = cpu_to_le64(mem_len);
+mem_base += mem_len;
+}
+
+build_header(linker, table_data,
+ (void *)(table_data->data + srat_start), "SRAT",
+ table_data->len - srat_start, 3, NULL);
+}
+
+static void
 build_mcfg(GArray *table_data, GArray *linker, VirtGuestInfo *guest_info)
 {
 AcpiTableMcfg *mcfg;
@@ -641,6 +694,11 @@ void virt_acpi_build(VirtGuestInfo *guest_info, 
AcpiBuildTables *tables)
 acpi_add_table(table_offsets, tables_blob);
 build_spcr(tables_blob, tables->linker, guest_info);
 
+if (nb_numa_nodes > 0) {
+acpi_add_table(table_offsets, tables_blob);
+build_srat(tables_blob, tables->linker, guest_info);
+}
+
 /* RSDT is pointed to by RSDP */
 rsdt = tables_blob->len;
 build_rsdt(tables_blob, tables->linker, table_offsets);
-- 
2.0.4

[Qemu-devel] [PATCH v4 1/5] ARM: Virt: Add /distance-map node for NUMA

[Shannon Zhao]

From: Shannon Zhao 

This /distance-map node is used to describe the accessing distance
between NUMA nodes.

Signed-off-by: Shannon Zhao 
---
 hw/arm/virt.c | 30 ++
 1 file changed, 30 insertions(+)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 15658f4..c725e29 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -39,6 +39,7 @@
 #include "sysemu/device_tree.h"
 #include "sysemu/sysemu.h"
 #include "sysemu/kvm.h"
+#include "sysemu/numa.h"
 #include "hw/boards.h"
 #include "hw/loader.h"
 #include "exec/address-spaces.h"
@@ -183,6 +184,9 @@ static VirtBoardInfo *find_machine_info(const char *cpu)
 
 static void create_fdt(VirtBoardInfo *vbi)
 {
+unsigned int i, j, number, count;
+uint64_t *matrix;
+
 void *fdt = create_device_tree(&vbi->fdt_size);
 
 if (!fdt) {
@@ -219,6 +223,32 @@ static void create_fdt(VirtBoardInfo *vbi)
 "clk24mhz");
 qemu_fdt_setprop_cell(fdt, "/apb-pclk", "phandle", vbi->clock_phandle);
 
+if (nb_numa_nodes <= 0) {
+return;
+}
+
+/* Add /distance-map node for NUMA */
+qemu_fdt_add_subnode(fdt, "/distance-map");
+qemu_fdt_setprop_string(fdt, "/distance-map", "compatible",
+"numa,distance-map-v1");
+
+number = nb_numa_nodes * nb_numa_nodes * 6;
+matrix = g_malloc0(number * sizeof(uint64_t));
+for (i = 0; i < nb_numa_nodes; i++) {
+for (j = 0; j < nb_numa_nodes; j++) {
+count = (i * nb_numa_nodes + j) * 6;
+matrix[count++] = 1;
+matrix[count++] = i;
+matrix[count++] = 1;
+matrix[count++] = j;
+matrix[count++] = 1;
+matrix[count++] = (i == j) ? 10 : 20;
+}
+}
+qemu_fdt_setprop_sized_cells_from_array(fdt, "/distance-map",
+"distance-matrix", number / 2,
+matrix);
+g_free(matrix);
 }
 
 static void fdt_add_psci_node(const VirtBoardInfo *vbi)
-- 
2.0.4

[Qemu-devel] [PATCH v4 0/5] ARM: Add NUMA support for machine virt

[Shannon Zhao]

From: Shannon Zhao 

Add NUMA support for machine virt. Tested successfully running a guest
Linux kernel with the following patch applied:

- [PATCH v9 0/6] arm64, numa: Add numa support for arm64 platforms
https://lwn.net/Articles/672329/
- [PATCH v2 0/4] ACPI based NUMA support for ARM64
http://www.spinics.net/lists/linux-acpi/msg61795.html

Changes since v3:
* based on new kernel driver and device bindings
* add ACPI part

Changes since v2:
* update to use NUMA node property arm,associativity.

Changes since v1:
Take into account Peter's comments:
* rename virt_memory_init to arm_generate_memory_dtb
* move arm_generate_memory_dtb to boot.c and make it a common func
* use a struct numa_map to generate numa dtb

Example qemu command line:
qemu-system-aarch64 \
-enable-kvm -smp 4\
-kernel Image \
-m 512 -machine virt,kernel_irqchip=on \
-initrd guestfs.cpio.gz \
-cpu host -nographic \
-numa node,mem=256M,cpus=0-1,nodeid=0 \
-numa node,mem=256M,cpus=2-3,nodeid=1 \
-append "console=ttyAMA0 root=/dev/ram"

Shannon Zhao (5):
  ARM: Virt: Add /distance-map node for NUMA
  ARM: Virt: Set numa-node-id for CPUs
  ARM: Add numa-node-id for /memory node
  include/hw/acpi/acpi-defs: Add GICC Affinity Structure
  hw/arm/virt-acpi-build: Generate SRAT table

 hw/arm/boot.c   | 29 ++-
 hw/arm/virt-acpi-build.c| 58 +
 hw/arm/virt.c   | 37 +
 hw/i386/acpi-build.c|  2 +-
 include/hw/acpi/acpi-defs.h | 15 +++-
 5 files changed, 138 insertions(+), 3 deletions(-)

-- 
2.0.4

[Qemu-devel] [PATCH v4 3/5] ARM: Add numa-node-id for /memory node

[Shannon Zhao]

From: Shannon Zhao 

When specifying NUMA for ARM machine, generate /memory node according to
NUMA topology.

Signed-off-by: Shannon Zhao 
---
 hw/arm/boot.c | 29 -
 1 file changed, 28 insertions(+), 1 deletion(-)

diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index 7742dd3..10f3615 100644
--- a/hw/arm/boot.c
+++ b/hw/arm/boot.c
@@ -13,6 +13,7 @@
 #include "hw/arm/linux-boot-if.h"
 #include "sysemu/kvm.h"
 #include "sysemu/sysemu.h"
+#include "sysemu/numa.h"
 #include "hw/boards.h"
 #include "hw/loader.h"
 #include "elf.h"
@@ -353,6 +354,9 @@ static int load_dtb(hwaddr addr, const struct arm_boot_info 
*binfo,
 void *fdt = NULL;
 int size, rc;
 uint32_t acells, scells;
+char *nodename;
+unsigned int i;
+hwaddr mem_base, mem_len;
 
 if (binfo->dtb_filename) {
 char *filename;
@@ -402,14 +406,37 @@ static int load_dtb(hwaddr addr, const struct 
arm_boot_info *binfo,
 goto fail;
 }
 
+mem_len = (nb_numa_nodes > 0) ? numa_info[0].node_mem : binfo->ram_size;
 rc = qemu_fdt_setprop_sized_cells(fdt, "/memory", "reg",
   acells, binfo->loader_start,
-  scells, binfo->ram_size);
+  scells, mem_len);
 if (rc < 0) {
 fprintf(stderr, "couldn't set /memory/reg\n");
 goto fail;
 }
 
+if (nb_numa_nodes > 0) {
+/* create /memory node and set properties for other memory numa nodes 
*/
+mem_base = binfo->loader_start + mem_len;
+for (i = 1; i < nb_numa_nodes; i++) {
+mem_len = numa_info[i].node_mem;
+nodename = g_strdup_printf("/memory@%" PRIx64, mem_base);
+qemu_fdt_add_subnode(fdt, nodename);
+qemu_fdt_setprop_string(fdt, nodename, "device_type", "memory");
+rc = qemu_fdt_setprop_sized_cells(fdt, nodename, "reg",
+  acells, mem_base,
+  scells, mem_len);
+if (rc < 0) {
+fprintf(stderr, "couldn't set /memory/reg\n");
+goto fail;
+}
+
+qemu_fdt_setprop_cell(fdt, nodename, "numa-node-id", i);
+mem_base += mem_len;
+g_free(nodename);
+}
+}
+
 if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
 rc = qemu_fdt_setprop_string(fdt, "/chosen", "bootargs",
  binfo->kernel_cmdline);
-- 
2.0.4

[Qemu-devel] [PATCH v4 2/5] ARM: Virt: Set numa-node-id for CPUs

[Shannon Zhao]

From: Shannon Zhao 

Add a numa-node-id property to specify NUMA information for CPUs.

Signed-off-by: Shannon Zhao 
---
 hw/arm/virt.c | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index c725e29..14265b1 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -335,6 +335,7 @@ static void fdt_add_cpu_nodes(const VirtBoardInfo *vbi)
 {
 int cpu;
 int addr_cells = 1;
+unsigned int i;
 
 /*
  * From Documentation/devicetree/bindings/arm/cpus.txt
@@ -384,6 +385,12 @@ static void fdt_add_cpu_nodes(const VirtBoardInfo *vbi)
   armcpu->mp_affinity);
 }
 
+for (i = 0; i < nb_numa_nodes; i++) {
+if (test_bit(cpu, numa_info[i].node_cpu)) {
+qemu_fdt_setprop_cell(vbi->fdt, nodename, "numa-node-id", i);
+}
+}
+
 g_free(nodename);
 }
 }
-- 
2.0.4

Re: [Qemu-devel] [PULL 10/11] Add Error **errp for xen_pt_config_init()

[Cao jin]

On 01/22/2016 07:21 PM, Paolo Bonzini wrote:



On 21/01/2016 18:01, Stefano Stabellini wrote:

-XEN_PT_LOG(&s->dev, "Failed to initialize %d/%ld reg 0x%x 
in grp_type=0x%x (%d/%ld), rc=%d\n",
-   j, 
ARRAY_SIZE(xen_pt_emu_reg_grps[i].emu_regs),
-   regs->offset, 
xen_pt_emu_reg_grps[i].grp_type,
-   i, ARRAY_SIZE(xen_pt_emu_reg_grps), rc);
+xen_pt_config_reg_init(s, reg_grp_entry, regs, &err);
+if (err) {
+error_append_hint(&err, "Failed to initialize %d/%zu"
+" reg 0x%x in grp_type = 0x%x (%d/%zu)",
+j, ARRAY_SIZE(xen_pt_emu_reg_grps[i].emu_regs),


Coverity noticed a preexisting problem here.  emu_regs is a pointer,
thus ARRAY_SIZE doesn't return what you expect.


Hi stefano,

Seems ARRAY_SIZE(xen_pt_emu_reg_grps[i].emu_regs) is not important err 
message to regular users, and I guess it still can help developer to 
debug even without it. So, do you think it is ok to remove it? Or any 
better idea?



Paolo




--
Yours Sincerely,

Cao jin

Re: [Qemu-devel] [PATCH] seabios: fix submodule

[Eduardo Habkost]

On Fri, Jan 22, 2016 at 12:02:30PM +, Peter Maydell wrote:
> On 22 January 2016 at 10:59, Gerd Hoffmann  wrote:
> > Commit "36f96c4 target-i386: Add support to migrate vcpu's TSC rate"
> > updates roms/seabios, appearently by mistake.  Revert this.
> >
> > Signed-off-by: Gerd Hoffmann 
> > ---
> >  roms/seabios | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/roms/seabios b/roms/seabios
> > index 33fbe13..01a84be 16
> > --- a/roms/seabios
> > +++ b/roms/seabios
> > @@ -1 +1 @@
> > -Subproject commit 33fbe13a3e2a01e0ba1087a8feed801a0451db21
> > +Subproject commit 01a84bea2d28a19d2405c1ecac4bdef17683cc0c
> > --
> > 1.8.3.1
> 
> Whoops. Unfortunately git can make it easy to accidentally include
> submodule updates in patches or pull requests, and I didn't catch
> this one on applying the pullreq either.
> 
> I've applied this patch to master to correct the error.

Oops! This was my mistake, it probably happened when I was
rebasing and solving conflicts. Sorry.

Does anybody know a way to tell git to never ever try to commit
submodule changes unless explicitly asked to?

-- 
Eduardo

Re: [Qemu-devel] [PATCH v6 04/11] cpu: Don't realize CPU from cpu_generic_init()

[Eduardo Habkost]

On Fri, Jan 08, 2016 at 12:25:12PM +0530, Bharata B Rao wrote:
> Don't do CPU realization from cpu_generic_init(). With this
> cpu_generic_init() will be used to just create CPU threads and they
> should be realized separately from realizefn call.
> 
> Convert the existing callers to do explicit realization.
> 
> Signed-off-by: Bharata B Rao 

Reviewed-by: Eduardo Habkost 

Reviewed by comparing the patch with the results of the
following Coccinelle patch:

@@
typedef CPUState;
identifier cc, cpu, err;
@@
 CPUState *cpu_generic_init(...)
 {
 ...
-if (err != NULL) {
-goto out;
-}
-
-object_property_set_bool(OBJECT(cpu), true, "realized", &err);
-out:
 if (err != NULL) {
 ...
 }
 ...
}


@@
type XXXCPU;
identifier initfunc, cpu_model, TYPE_XXX_CPU, XXX_CPU;
@@
 XXXCPU *initfunc(const char *cpu_model)
 {
-return XXX_CPU(cpu_generic_init(TYPE_XXX_CPU, cpu_model));
+CPUState *cpu = cpu_generic_init(TYPE_XXX_CPU, cpu_model);
+Error *err = NULL;
+
+if (!cpu) {
+return NULL;
+}
+
+object_property_set_bool(OBJECT(cpu), true, "realized", &err);
+if (err != NULL) {
+error_report_err(err);
+object_unref(OBJECT(cpu));
+return NULL;
+} else {
+return XXX_CPU(cpu);
+}
 }

-- 
Eduardo

Re: [Qemu-devel] [PATCH v6 01/11] machine: Don't allow CPU toplogies with partially filled cores

[Eduardo Habkost]

On Fri, Jan 08, 2016 at 12:25:09PM +0530, Bharata B Rao wrote:
> Prevent guests from booting with CPU topologies that have partially
> filled CPU cores or can result in partially filled CPU cores after
> CPU hotplug like
> 
> -smp 15,sockets=1,cores=4,threads=4,maxcpus=16 or
> -smp 15,sockets=1,cores=4,threads=4,maxcpus=17.
> 
> This is enforced by introducing MachineClass::validate_smp_config()
> that gets called from generic SMP parsing code. Machine type versions
> that don't want to enforce this can override this method.
> 
> TODO: Only sPAPR and PC changes are done in this patch, other archs
> will be touched after there is agreement on this approach.
> 
> Signed-off-by: Bharata B Rao 
> ---
>  hw/core/machine.c   | 20 
>  hw/i386/pc_piix.c   |  7 +++
>  hw/i386/pc_q35.c|  7 +++
>  hw/ppc/spapr.c  |  7 +++
>  include/hw/boards.h |  1 +
>  vl.c|  4 
>  6 files changed, 46 insertions(+)
> 
> diff --git a/hw/core/machine.c b/hw/core/machine.c
> index c46ddc7..b66c101 100644
> --- a/hw/core/machine.c
> +++ b/hw/core/machine.c
> @@ -336,6 +336,25 @@ static void machine_init_notify(Notifier *notifier, void 
> *data)
>  foreach_dynamic_sysbus_device(error_on_sysbus_device, NULL);
>  }
>  
> +static int validate_smp_config_generic(int smp_cpus, int max_cpus,
> +   int smp_threads)

Please make it use a Error** parameter to return error
information, and let the caller decide what to do with the error
message. One day the mc->validate_smp_config() call may be moved
inside a function that returns error information using Error**
and needs to propagate it to the caller.

> +{
> +if (smp_cpus % smp_threads) {
> +error_report("cpu topology: "
> + "smp_cpus (%u) should be multiple of threads (%u) ",
> + smp_cpus, smp_threads);
> +return 1;
> +}
> +
> +if (max_cpus % smp_threads) {
> +error_report("cpu topology: "
> + "max_cpus (%u) should be multiple of threads (%u) ",
> + max_cpus, smp_threads);
> +return 1;
> +}
> +return 0;
> +}
> +
[...]
> diff --git a/vl.c b/vl.c
> index 5aaea77..4b36a49 100644
> --- a/vl.c
> +++ b/vl.c
> @@ -4132,6 +4132,10 @@ int main(int argc, char **argv, char **envp)
>  
>  smp_parse(qemu_opts_find(qemu_find_opts("smp-opts"), NULL));
>  
> +if (machine_class->validate_smp_config(smp_cpus, max_cpus, smp_threads)) 
> {
> +exit(1);
> +}
> +
>  machine_class->max_cpus = machine_class->max_cpus ?: 1; /* Default to UP 
> */
>  if (max_cpus > machine_class->max_cpus) {
>  error_report("Number of SMP CPUs requested (%d) exceeds max CPUs "
> -- 
> 2.1.0
> 

-- 
Eduardo

Re: [Qemu-devel] [RFC] target-i386: Display i386 CPUID properties

[Eduardo Habkost]

On Tue, Jan 12, 2016 at 02:50:20PM +, Daniel P. Berrange wrote:
> On Tue, Jan 12, 2016 at 05:36:27PM +0300, Valentin Rakush wrote:
> > This is RFC because implementation depends on the upcoming class
> > properties  
> > http://lists.nongnu.org/archive/html/qemu-devel/2015-08/msg03115.html
> > and also because this patch does not handle all x86_64 properties.
> > 
> > This RFC is in response to concerns pointed in this review but with changed 
> > subject line as recommended. 
> > http://lists.nongnu.org/archive/html/qemu-devel/2016-01/msg00053.html
> > 
> > This RFC demonstrates the way for displaying cpu properties using -cpu
> > help option.
> 
> The point of doing this with QOM class properties, is such that we can
> create a facility to query class properties for any QOM type in a
> consistent manner.  I was expecting this would take the form of a
> QMP monitor command 'qom-type-properties' or something along those
> lines.

Also, note that qmp_device_list_properties() already does what
you want to do, without requiring class-properties.

This means you can implement the new interfaces (help output, QMP
changes) without any new QOM core code. You can also propose QOM
class-properties, if it helps making code simpler, but it's not a
requirement for returning QOM properties on QMP/help output.

-- 
Eduardo

Re: [Qemu-devel] [PATCH v3 04/11] igd: switch TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE to realize

[Eduardo Habkost]

On Tue, Jan 05, 2016 at 12:41:31PM +0100, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann 
> ---
>  hw/pci-host/igd.c | 9 -
>  1 file changed, 4 insertions(+), 5 deletions(-)
> 
> diff --git a/hw/pci-host/igd.c b/hw/pci-host/igd.c
> index ef0273b..d1eeafb 100644
> --- a/hw/pci-host/igd.c
> +++ b/hw/pci-host/igd.c
> @@ -53,7 +53,7 @@ out:
>  return ret;
>  }
>  
> -static int igd_pt_i440fx_initfn(struct PCIDevice *pci_dev)
> +static void igd_pt_i440fx_realize(PCIDevice *pci_dev, Error **errp)
>  {
>  uint32_t val = 0;
>  int rc, i, num;
> @@ -65,12 +65,11 @@ static int igd_pt_i440fx_initfn(struct PCIDevice *pci_dev)
>  len = igd_host_bridge_infos[i].len;
>  rc = host_pci_config_read(pos, len, val);
>  if (rc) {
> -return -ENODEV;
> +error_setg(errp, "failed to read host config");
> +return;
>  }
>  pci_default_write_config(pci_dev, pos, val, len);
>  }
> -
> -return 0;
>  }
>  
>  static void igd_passthrough_i440fx_class_init(ObjectClass *klass, void *data)
> @@ -78,7 +77,7 @@ static void igd_passthrough_i440fx_class_init(ObjectClass 
> *klass, void *data)
>  DeviceClass *dc = DEVICE_CLASS(klass);
>  PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
>  
> -k->init = igd_pt_i440fx_initfn;
> +k->realize = igd_pt_i440fx_realize;

I am trying to understand how this have ever worked before:

* PCIDeviceClass::init is called by pci_default_realize()
  (default value for PCIDeviceClass::realize)
* i440fx_class_init() overrides PCIDeviceClass::realize
  to i440fx_realize()

So, when exactly was igd_pt_i440fx_realize() being called, before
this series? I don't have a Xen host to be able to test it using
xenfv, and if I test "-machine pc,igd-passthrough=on" after
applying patch 01/11, I don't see igd_pt_i440fx_initfn() being
called at all.

-- 
Eduardo

Re: [Qemu-devel] [PATCH v3 05/11] igd: TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE: call parent realize

[Eduardo Habkost]

On Wed, Jan 20, 2016 at 10:10:11AM +0100, Gerd Hoffmann wrote:
>   Hi,
> 
> > > > > +i440fx_realize = k->realize;
> > > > >  k->realize = igd_pt_i440fx_realize;
> > > 
> > > ... because we are overriding it right here.
> > 
> > Many device classes have a parent_realize field so they can keep
> > a pointer to the original realize function. It's better than a
> > static variable.
> 
> How does the attached patch (incremental fix, not tested yet) look like?

Looks good.

Reviewed-by: Eduardo Habkost 

But, I have a similar question to the one I had about patch
04/11: how did this ever work before?

Does that mean i440fx_realize() was never called when
creating/initializing a TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE
before?

-- 
Eduardo

Re: [Qemu-devel] [PATCH v17 7/9] add MachineClass->default_props for setting default device properties

[Eduardo Habkost]

On Tue, Jan 19, 2016 at 02:06:27PM +0100, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov 
> ---
>  include/hw/boards.h | 1 +
>  vl.c| 4 
>  2 files changed, 5 insertions(+)
> 
> diff --git a/include/hw/boards.h b/include/hw/boards.h
> index 0f30959..d495611 100644
> --- a/include/hw/boards.h
> +++ b/include/hw/boards.h
> @@ -90,6 +90,7 @@ struct MachineClass {
>  const char *default_machine_opts;
>  const char *default_boot_order;
>  const char *default_display;
> +GlobalProperty *default_props;
>  GlobalProperty *compat_props;

Could you explain (in a comment?) the purpose of each field? They
seem to do exactly the same thing, so why couldn't they become a
single linked list, where the compat classes just append new
items to the existing default_props list?

(If we build default_props by appending instead of overwriting
the parent class list, we will be able to finally eliminate
PC_COMPAT_* macro nesting)

-- 
Eduardo

Re: [Qemu-devel] [PATCH 0/5] target-i386: kvm: Increase MSR entry array limits, check for array overrun

[Eduardo Habkost]

On Wed, Dec 16, 2015 at 10:38:25PM +0100, Paolo Bonzini wrote:
> 
> 
> On 16/12/2015 20:06, Eduardo Habkost wrote:
> > We are dangerously close to the array limits in kvm_put_msrs()
> > and kvm_get_msrs(): with the default mcg_cap configuration, we
> > can set up to 148 MSRs in kvm_put_msrs(), and if we allow mcg_cap
> > to be changed, we can write up to 236 MSRs[1].
> > 
> > This series changes the code to allocate a buffer once per VCPU,
> > increase buffer size to 4096 bytes (that can hold up to 255 MSR
> > entries), and check array limits before appending new entries.
> 
> Thanks, it's a good improvement.
> 
> Reviewed-by: Paolo Bonzini 

Thanks, applied to x86 tree.

-- 
Eduardo

Re: [Qemu-devel] [PATCH v2] target-i386/kvm: Hyper-V VMBus hypercalls blank handlers

[Eduardo Habkost]

On Thu, Jan 21, 2016 at 05:04:20PM +0300, Andrey Smetanin wrote:
> Add Hyper-V VMBus hypercalls blank handlers which
> just returns error code - HV_STATUS_INVALID_HYPERCALL_CODE.
> 
> Changes v2:
> * use KVM_EXIT_HYPERV exit type
> 

Paolo, this needs a linux-headers update. Should I let you update
the headers in your tree and apply this patch, or can I run
update-linux-headers.sh on my x86 branch?

-- 
Eduardo

[Qemu-devel] [PATCH v2 3/5] ich9: Remove enable_tco arguments from init functions

[Eduardo Habkost]

The enable_tco arguments are always true, so they are not needed
anymore.

Signed-off-by: Eduardo Habkost 
---
 hw/acpi/ich9.c | 8 +++-
 hw/i386/pc_q35.c   | 2 +-
 hw/isa/lpc_ich9.c  | 4 ++--
 include/hw/acpi/ich9.h | 1 -
 include/hw/i386/ich9.h | 2 +-
 5 files changed, 7 insertions(+), 10 deletions(-)

diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c
index 1c7fcfa..a4bd98c 100644
--- a/hw/acpi/ich9.c
+++ b/hw/acpi/ich9.c
@@ -239,7 +239,7 @@ static void pm_powerdown_req(Notifier *n, void *opaque)
 }
 
 void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
-  bool smm_enabled, bool enable_tco,
+  bool smm_enabled,
   qemu_irq sci_irq)
 {
 memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
@@ -263,10 +263,8 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
 
 pm->smm_enabled = smm_enabled;
 
-pm->enable_tco = enable_tco;
-if (pm->enable_tco) {
-acpi_pm_tco_init(&pm->tco_regs, &pm->io);
-}
+pm->enable_tco = true;
+acpi_pm_tco_init(&pm->tco_regs, &pm->io);
 
 pm->irq = sci_irq;
 qemu_register_reset(pm_reset, pm);
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 8773efb..b61f7a6 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -234,7 +234,7 @@ static void pc_q35_init(MachineState *machine)
  (pcms->vmport != ON_OFF_AUTO_ON), 0xff0104);
 
 /* connect pm stuff to lpc */
-ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms), true);
+ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms));
 
 /* ahci and SATA device, for q35 1 ahci controller is built-in */
 ahci = pci_create_simple_multifunction(host_bus,
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index ed9907d..362d187 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -368,13 +368,13 @@ static void ich9_set_sci(void *opaque, int irq_num, int 
level)
 }
 }
 
-void ich9_lpc_pm_init(PCIDevice *lpc_pci, bool smm_enabled, bool enable_tco)
+void ich9_lpc_pm_init(PCIDevice *lpc_pci, bool smm_enabled)
 {
 ICH9LPCState *lpc = ICH9_LPC_DEVICE(lpc_pci);
 qemu_irq sci_irq;
 
 sci_irq = qemu_allocate_irq(ich9_set_sci, lpc, 0);
-ich9_pm_init(lpc_pci, &lpc->pm, smm_enabled, enable_tco, sci_irq);
+ich9_pm_init(lpc_pci, &lpc->pm, smm_enabled, sci_irq);
 ich9_lpc_reset(&lpc->d.qdev);
 }
 
diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h
index 345fd8d..63fa198 100644
--- a/include/hw/acpi/ich9.h
+++ b/include/hw/acpi/ich9.h
@@ -62,7 +62,6 @@ typedef struct ICH9LPCPMRegs {
 
 void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm,
   bool smm_enabled,
-  bool enable_tco,
   qemu_irq sci_irq);
 
 void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base);
diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h
index b9d2b04..b411434 100644
--- a/include/hw/i386/ich9.h
+++ b/include/hw/i386/ich9.h
@@ -17,7 +17,7 @@
 void ich9_lpc_set_irq(void *opaque, int irq_num, int level);
 int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx);
 PCIINTxRoute ich9_route_intx_pin_to_irq(void *opaque, int pirq_pin);
-void ich9_lpc_pm_init(PCIDevice *pci_lpc, bool smm_enabled, bool enable_tco);
+void ich9_lpc_pm_init(PCIDevice *pci_lpc, bool smm_enabled);
 I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base);
 
 void ich9_generate_smi(void);
-- 
2.1.0

[Qemu-devel] [PATCH v2 1/5] q35: Remove old machine versions

[Eduardo Habkost]

Migration with q35 was not possible before commit
04329029a8c539eb5f75dcb6d8b016f0c53a031a, because q35
unconditionally creates an ich9-ahci device, that was marked as
unmigratable. So all q35 machine classes before pc-q35-2.4 were
not migratable, so there's no point in keeping compatibility code
for them.

Remove all old pc-q35 machine classes and keep only pc-q35-2.4
and newer.

Signed-off-by: Eduardo Habkost 
---
 hw/i386/pc_q35.c | 165 ---
 1 file changed, 165 deletions(-)

diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 6128b02..cc81601 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -268,62 +268,6 @@ static void pc_q35_init(MachineState *machine)
 }
 }
 
-/* Looking for a pc_compat_2_4() function? It doesn't exist.
- * pc_compat_*() functions that run on machine-init time and
- * change global QEMU state are deprecated. Please don't create
- * one, and implement any pc-*-2.4 (and newer) compat code in
- * HW_COMPAT_*, PC_COMPAT_*, or * pc_*_machine_options().
- */
-
-static void pc_compat_2_3(MachineState *machine)
-{
-PCMachineState *pcms = PC_MACHINE(machine);
-savevm_skip_section_footers();
-if (kvm_enabled()) {
-pcms->smm = ON_OFF_AUTO_OFF;
-}
-global_state_set_optional();
-savevm_skip_configuration();
-}
-
-static void pc_compat_2_2(MachineState *machine)
-{
-pc_compat_2_3(machine);
-machine->suppress_vmdesc = true;
-}
-
-static void pc_compat_2_1(MachineState *machine)
-{
-pc_compat_2_2(machine);
-x86_cpu_change_kvm_default("svm", NULL);
-}
-
-static void pc_compat_2_0(MachineState *machine)
-{
-pc_compat_2_1(machine);
-}
-
-static void pc_compat_1_7(MachineState *machine)
-{
-pc_compat_2_0(machine);
-x86_cpu_change_kvm_default("x2apic", NULL);
-}
-
-static void pc_compat_1_6(MachineState *machine)
-{
-pc_compat_1_7(machine);
-}
-
-static void pc_compat_1_5(MachineState *machine)
-{
-pc_compat_1_6(machine);
-}
-
-static void pc_compat_1_4(MachineState *machine)
-{
-pc_compat_1_5(machine);
-}
-
 #define DEFINE_Q35_MACHINE(suffix, name, compatfn, optionfn) \
 static void pc_init_##suffix(MachineState *machine) \
 { \
@@ -380,112 +324,3 @@ static void pc_q35_2_4_machine_options(MachineClass *m)
 
 DEFINE_Q35_MACHINE(v2_4, "pc-q35-2.4", NULL,
pc_q35_2_4_machine_options);
-
-
-static void pc_q35_2_3_machine_options(MachineClass *m)
-{
-pc_q35_2_4_machine_options(m);
-m->hw_version = "2.3.0";
-m->no_floppy = 0;
-m->no_tco = 1;
-SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
-}
-
-DEFINE_Q35_MACHINE(v2_3, "pc-q35-2.3", pc_compat_2_3,
-   pc_q35_2_3_machine_options);
-
-
-static void pc_q35_2_2_machine_options(MachineClass *m)
-{
-PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
-pc_q35_2_3_machine_options(m);
-m->hw_version = "2.2.0";
-SET_MACHINE_COMPAT(m, PC_COMPAT_2_2);
-pcmc->rsdp_in_ram = false;
-}
-
-DEFINE_Q35_MACHINE(v2_2, "pc-q35-2.2", pc_compat_2_2,
-   pc_q35_2_2_machine_options);
-
-
-static void pc_q35_2_1_machine_options(MachineClass *m)
-{
-PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
-pc_q35_2_2_machine_options(m);
-m->hw_version = "2.1.0";
-m->default_display = NULL;
-SET_MACHINE_COMPAT(m, PC_COMPAT_2_1);
-pcmc->smbios_uuid_encoded = false;
-pcmc->enforce_aligned_dimm = false;
-}
-
-DEFINE_Q35_MACHINE(v2_1, "pc-q35-2.1", pc_compat_2_1,
-   pc_q35_2_1_machine_options);
-
-
-static void pc_q35_2_0_machine_options(MachineClass *m)
-{
-PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
-pc_q35_2_1_machine_options(m);
-m->hw_version = "2.0.0";
-SET_MACHINE_COMPAT(m, PC_COMPAT_2_0);
-pcmc->has_reserved_memory = false;
-pcmc->smbios_legacy_mode = true;
-pcmc->acpi_data_size = 0x1;
-}
-
-DEFINE_Q35_MACHINE(v2_0, "pc-q35-2.0", pc_compat_2_0,
-   pc_q35_2_0_machine_options);
-
-
-static void pc_q35_1_7_machine_options(MachineClass *m)
-{
-PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
-pc_q35_2_0_machine_options(m);
-m->hw_version = "1.7.0";
-m->default_machine_opts = NULL;
-m->option_rom_has_mr = true;
-SET_MACHINE_COMPAT(m, PC_COMPAT_1_7);
-pcmc->smbios_defaults = false;
-pcmc->gigabyte_align = false;
-}
-
-DEFINE_Q35_MACHINE(v1_7, "pc-q35-1.7", pc_compat_1_7,
-   pc_q35_1_7_machine_options);
-
-
-static void pc_q35_1_6_machine_options(MachineClass *m)
-{
-PCMachineClass *pcmc = PC_MACHINE_CLASS(m);
-pc_q35_machine_options(m);
-m->hw_version = "1.6.0";
-m->rom_file_has_mr = false;
-SET_MACHINE_COMPAT(m, PC_COMPAT_1_6);
-pcmc->has_acpi_build = false;
-}
-
-DEFINE_Q35_MACHINE(v1_6, "pc-q35-1.6", pc_compat_1_6,
-   pc_q35_1_6_machine_options);
-
-
-static void pc_q35_1_5_machine_options(MachineClass *m)
-{
-pc_q35_1_6_machine_options(m);
-m->hw_version = "1.5.0";
-SET_MACHINE_COMPAT(m, PC_COMP

[Qemu-devel] [PATCH v2 0/5] q35: Remove old machines and unused compat code

[Eduardo Habkost]

This is another attempt to remove old q35 machine code. Now I am
also removing unused compat code to demonstrate the benefit of
throwing away the old code that nobody uses.

Eduardo Habkost (5):
  q35: Remove old machine versions
  machine: Remove no_tco field
  ich9: Remove enable_tco arguments from init functions
  q35: Remove unused q35-acpi-dsdt.aml file
  q35: No need to check gigabyte_align

 Makefile  |   2 +-
 hw/acpi/ich9.c|   8 +--
 hw/i386/pc_q35.c  | 176 +-
 hw/isa/lpc_ich9.c |   4 +-
 include/hw/acpi/ich9.h|   1 -
 include/hw/boards.h   |   1 -
 include/hw/i386/ich9.h|   2 +-
 pc-bios/q35-acpi-dsdt.aml | Bin 7344 -> 0 bytes
 8 files changed, 9 insertions(+), 185 deletions(-)
 delete mode 100644 pc-bios/q35-acpi-dsdt.aml

-- 
2.1.0

[Qemu-devel] [PATCH v2 4/5] q35: Remove unused q35-acpi-dsdt.aml file

[Eduardo Habkost]

The file was used only by older machine-types, and it is not
needed anymore.

Signed-off-by: Eduardo Habkost 
---
 Makefile  |   2 +-
 hw/i386/pc_q35.c  |   4 
 pc-bios/q35-acpi-dsdt.aml | Bin 7344 -> 0 bytes
 3 files changed, 1 insertion(+), 5 deletions(-)
 delete mode 100644 pc-bios/q35-acpi-dsdt.aml

diff --git a/Makefile b/Makefile
index d0de2d4..9357574 100644
--- a/Makefile
+++ b/Makefile
@@ -390,7 +390,7 @@ bepocz
 ifdef INSTALL_BLOBS
 BLOBS=bios.bin bios-256k.bin sgabios.bin vgabios.bin vgabios-cirrus.bin \
 vgabios-stdvga.bin vgabios-vmware.bin vgabios-qxl.bin vgabios-virtio.bin \
-acpi-dsdt.aml q35-acpi-dsdt.aml \
+acpi-dsdt.aml \
 ppc_rom.bin openbios-sparc32 openbios-sparc64 openbios-ppc QEMU,tcx.bin 
QEMU,cgthree.bin \
 pxe-e1000.rom pxe-eepro100.rom pxe-ne2k_pci.rom \
 pxe-pcnet.rom pxe-rtl8139.rom pxe-virtio.rom \
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index b61f7a6..aed4432 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -116,10 +116,6 @@ static void pc_q35_init(MachineState *machine)
 }
 
 pc_cpus_init(pcms);
-if (!pcmc->has_acpi_build) {
-/* only machine types 1.7 & older need this */
-pc_acpi_init("q35-acpi-dsdt.aml");
-}
 
 kvmclock_create();
 
diff --git a/pc-bios/q35-acpi-dsdt.aml b/pc-bios/q35-acpi-dsdt.aml
deleted file mode 100644
index 
d71b3a328ced5ce2cb16d153cfa7cda0aca966a4..
GIT binary patch
literal 0
HcmV?d1

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zbCDVbUm_=lkv@Bv^!=S02A?G-hLJvdnDl*`8V27eCx($edzke7mKp{hEGLGMzQHg-
zZJbtDi*JSTYRSRBy25yUZAT^DLeBRTepS%lR(I#gmhURwWmGo-%BucWaW;&RS+7*R
zp#-be&ocP0fFH({>u!6_|2r1^oBVIGzxY?$kMaz#>0Aqn*N4#v75-7t>b#Htw{=zW
zMRn-2ij;etubD5*qXKsu*Cmpl-{5EpSHMzbJ>7
jWOr3|Z^>>TeOu6vW%m==m1I|zT_`(zH&CsL?5gVjcvrSt

-- 
2.1.0

[Qemu-devel] [PATCH v2 2/5] machine: Remove no_tco field

[Eduardo Habkost]

The field is always set to zero, so it is not necessary anymore.

Signed-off-by: Eduardo Habkost 
---
 hw/i386/pc_q35.c| 3 +--
 include/hw/boards.h | 1 -
 2 files changed, 1 insertion(+), 3 deletions(-)

diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index cc81601..8773efb 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -234,7 +234,7 @@ static void pc_q35_init(MachineState *machine)
  (pcms->vmport != ON_OFF_AUTO_ON), 0xff0104);
 
 /* connect pm stuff to lpc */
-ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms), !mc->no_tco);
+ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pcms), true);
 
 /* ahci and SATA device, for q35 1 ahci controller is built-in */
 ahci = pci_create_simple_multifunction(host_bus,
@@ -289,7 +289,6 @@ static void pc_q35_machine_options(MachineClass *m)
 m->default_machine_opts = "firmware=bios-256k.bin";
 m->default_display = "std";
 m->no_floppy = 1;
-m->no_tco = 0;
 }
 
 static void pc_q35_2_6_machine_options(MachineClass *m)
diff --git a/include/hw/boards.h b/include/hw/boards.h
index 0f30959..de3b3bd 100644
--- a/include/hw/boards.h
+++ b/include/hw/boards.h
@@ -84,7 +84,6 @@ struct MachineClass {
 no_cdrom:1,
 no_sdcard:1,
 has_dynamic_sysbus:1,
-no_tco:1,
 pci_allow_0_address:1;
 int is_default;
 const char *default_machine_opts;
-- 
2.1.0

[Qemu-devel] [PATCH v2 5/5] q35: No need to check gigabyte_align

[Eduardo Habkost]

gigabyte_align is always true on q35, so we don't need the
!gigabyte_align compat code anymore.

Signed-off-by: Eduardo Habkost 
---
 hw/i386/pc_q35.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index aed4432..20722f2 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -81,11 +81,9 @@ static void pc_q35_init(MachineState *machine)
  * If it doesn't, we need to split it in chunks below and above 4G.
  * In any case, try to make sure that guest addresses aligned at
  * 1G boundaries get mapped to host addresses aligned at 1G boundaries.
- * For old machine types, use whatever split we used historically to avoid
- * breaking migration.
  */
 if (machine->ram_size >= 0xb000) {
-lowmem = pcmc->gigabyte_align ? 0x8000 : 0xb000;
+lowmem = 0x8000;
 } else {
 lowmem = 0xb000;
 }
-- 
2.1.0

Re: [Qemu-devel] [PATCH v2] target-i386/kvm: Hyper-V VMBus hypercalls blank handlers

[Paolo Bonzini]

- Original Message -
> From: "Eduardo Habkost" 
> To: "Andrey Smetanin" 
> Cc: qemu-devel@nongnu.org, k...@vger.kernel.org, "Marcelo Tosatti" 
> , "Roman Kagan"
> , "Denis V. Lunev" , "Paolo Bonzini" 
> , "Andreas Färber"
> , "Richard Henderson" 
> Sent: Saturday, January 23, 2016 4:20:13 PM
> Subject: Re: [Qemu-devel] [PATCH v2] target-i386/kvm: Hyper-V VMBus 
> hypercalls blank handlers
> 
> On Thu, Jan 21, 2016 at 05:04:20PM +0300, Andrey Smetanin wrote:
> > Add Hyper-V VMBus hypercalls blank handlers which
> > just returns error code - HV_STATUS_INVALID_HYPERCALL_CODE.
> > 
> > Changes v2:
> > * use KVM_EXIT_HYPERV exit type
> > 
> 
> Paolo, this needs a linux-headers update. Should I let you update
> the headers in your tree and apply this patch, or can I run
> update-linux-headers.sh on my x86 branch?

This patch's dependency is not even in any upstream KVM branch, so it
will take some time.  For now, just apply it with the linux-headers
changes, and don't "graduate" it from x86-next to x86 until the
headers are updated.

Paolo

Re: [Qemu-devel] [PATCH] cuda.c: return error for unknown commands

[Mark Cave-Ayland]

On 22/01/16 23:07, Alyssa Milburn wrote:

> This avoids MacsBug hanging at startup in the absence of ADB mouse
> input, by replying with an error (which is also what MOL does) when
> it sends an unknown command (0x1c).
> 
> Signed-off-by: Alyssa Milburn 
> ---
>  hw/misc/macio/cuda.c | 5 +
>  1 file changed, 5 insertions(+)
> 
> diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
> index 9db4c64..7e57de5 100644
> --- a/hw/misc/macio/cuda.c
> +++ b/hw/misc/macio/cuda.c
> @@ -605,6 +605,11 @@ static void cuda_receive_packet(CUDAState *s,
>  }
>  break;
>  default:
> +obuf[0] = ERROR_PACKET;
> +obuf[1] = 0x2;
> +obuf[2] = CUDA_PACKET;
> +obuf[3] = data[0];
> +cuda_send_packet_to_host(s, obuf, 4);
>  break;
>  }
>  }

I've just tested this with OS 9 locally and it fixes the issue for me,
so thanks for the patch!

Have you tried any other OS images at all just in case it causes any
regressions? I generally test booting a set of
Linux/NetBSD/FreeBSD/OpenBSD ISO images for OpenBIOS changes, and while
they don't all work it's good to double-check that any changes don't
accidentally regress other OSs.

And one minor nit I've just noticed on second reading: the commit
message is fine except that it should explicitly reference OS 9 to
explain the motivation for the change.


ATB,

Mark.

[Qemu-devel] [PATCH 02/13] cuda: reject unknown commands

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 25 -
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 69f69c2..f27dd19 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -589,15 +589,15 @@ static void cuda_receive_packet(CUDAState *s,
 }
 }
 cuda_send_packet_to_host(s, obuf, 3);
-break;
+return;
 case CUDA_GET_6805_ADDR:
 cuda_send_packet_to_host(s, obuf, 3);
-break;
+return;
 case CUDA_SET_TIME:
 ti = (((uint32_t)data[1]) << 24) + (((uint32_t)data[2]) << 16) + 
(((uint32_t)data[3]) << 8) + data[4];
 s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / 
get_ticks_per_sec());
 cuda_send_packet_to_host(s, obuf, 3);
-break;
+return;
 case CUDA_GET_TIME:
 ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / 
get_ticks_per_sec());
 obuf[3] = ti >> 24;
@@ -605,28 +605,28 @@ static void cuda_receive_packet(CUDAState *s,
 obuf[5] = ti >> 8;
 obuf[6] = ti;
 cuda_send_packet_to_host(s, obuf, 7);
-break;
+return;
 case CUDA_FILE_SERVER_FLAG:
 case CUDA_SET_DEVICE_LIST:
 case CUDA_SET_AUTO_RATE:
 case CUDA_SET_POWER_MESSAGES:
 cuda_send_packet_to_host(s, obuf, 3);
-break;
+return;
 case CUDA_POWERDOWN:
 cuda_send_packet_to_host(s, obuf, 3);
 qemu_system_shutdown_request();
-break;
+return;
 case CUDA_RESET_SYSTEM:
 cuda_send_packet_to_host(s, obuf, 3);
 qemu_system_reset_request();
-break;
+return;
 case CUDA_COMBINED_FORMAT_IIC:
 obuf[0] = ERROR_PACKET;
 obuf[1] = 0x5;
 obuf[2] = CUDA_PACKET;
 obuf[3] = data[0];
 cuda_send_packet_to_host(s, obuf, 4);
-break;
+return;
 case CUDA_GET_SET_IIC:
 if (len == 4) {
 cuda_send_packet_to_host(s, obuf, 3);
@@ -637,10 +637,17 @@ static void cuda_receive_packet(CUDAState *s,
 obuf[3] = data[0];
 cuda_send_packet_to_host(s, obuf, 4);
 }
-break;
+return;
 default:
 break;
 }
+
+qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]);
+obuf[0] = ERROR_PACKET;
+obuf[1] = 0x2; /* unknown command */
+obuf[2] = CUDA_PACKET;
+obuf[3] = data[0];
+cuda_send_packet_to_host(s, obuf, 4);
 }
 
 static void cuda_receive_packet_from_host(CUDAState *s,
-- 
2.1.4

[Qemu-devel] [PATCH 04/13] cuda: port SET_AUTO_RATE command to new framework

[Hervé Poussineau]

Take requested autopoll rate into account

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 31 +++
 hw/ppc/mac.h |  1 +
 2 files changed, 28 insertions(+), 4 deletions(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 37406fc..9ec642f 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -105,7 +105,6 @@
 #define CUDA_COMBINED_FORMAT_IIC   0x25
 
 #define CUDA_TIMER_FREQ (470 / 6)
-#define CUDA_ADB_POLL_FREQ 50
 
 /* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */
 #define RTC_OFFSET  2082844800
@@ -531,7 +530,7 @@ static void cuda_adb_poll(void *opaque)
 }
 timer_mod(s->adb_poll_timer,
qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
-   (get_ticks_per_sec() / CUDA_ADB_POLL_FREQ));
+   (get_ticks_per_sec() / (1000 / s->auto_rate_ms)));
 }
 
 /* description of commands */
@@ -559,7 +558,7 @@ static bool cuda_cmd_autopoll(CUDAState *s,
 if (autopoll) {
 timer_mod(s->adb_poll_timer,
   qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
-  (get_ticks_per_sec() / CUDA_ADB_POLL_FREQ));
+  (get_ticks_per_sec() / (1000 / s->auto_rate_ms)));
 } else {
 timer_del(s->adb_poll_timer);
 }
@@ -567,8 +566,32 @@ static bool cuda_cmd_autopoll(CUDAState *s,
 return true;
 }
 
+static bool cuda_cmd_set_autorate(CUDAState *s,
+  const uint8_t *in_data, int in_len,
+  uint8_t *out_data, int *out_len)
+{
+if (in_len != 1) {
+return false;
+}
+
+/* we don't want a period of 0 ms */
+/* FIXME: check what real hardware does */
+if (in_data[0] == 0) {
+return;
+}
+
+s->auto_rate_ms = in_data[0];
+if (s->autopoll) {
+timer_mod(s->adb_poll_timer,
+  qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
+  (get_ticks_per_sec() / (1000 / s->auto_rate_ms)));
+}
+return true;
+}
+
 static const CudaCommand handlers[] = {
 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
+{ CUDA_SET_AUTO_RATE, "SET_AUTO_RATE",  cuda_cmd_set_autorate },
 };
 
 static void cuda_receive_packet(CUDAState *s,
@@ -618,7 +641,6 @@ static void cuda_receive_packet(CUDAState *s,
 return;
 case CUDA_FILE_SERVER_FLAG:
 case CUDA_SET_DEVICE_LIST:
-case CUDA_SET_AUTO_RATE:
 case CUDA_SET_POWER_MESSAGES:
 cuda_send_packet_to_host(s, obuf, 3);
 return;
@@ -824,6 +846,7 @@ static void cuda_realizefn(DeviceState *dev, Error **errp)
 s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
 
 s->adb_poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_adb_poll, s);
+s->auto_rate_ms = 20;
 }
 
 static void cuda_initfn(Object *obj)
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index e375ed2..90fcb69 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -111,6 +111,7 @@ typedef struct CUDAState {
 int data_out_index;
 
 qemu_irq irq;
+uint8_t auto_rate_ms;
 uint8_t autopoll;
 uint8_t data_in[128];
 uint8_t data_out[16];
-- 
2.1.4

[Qemu-devel] [PATCH 03/13] cuda: port AUTOPOLL command to new framework

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 40 +---
 1 file changed, 25 insertions(+), 15 deletions(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index f27dd19..37406fc 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -543,14 +543,38 @@ typedef struct CudaCommand {
 uint8_t *out_args, int *out_len);
 } CudaCommand;
 
+static bool cuda_cmd_autopoll(CUDAState *s,
+  const uint8_t *in_data, int in_len,
+  uint8_t *out_data, int *out_len)
+{
+int autopoll;
+
+if (in_len != 1) {
+return false;
+}
+
+autopoll = (in_data[0] != 0);
+if (autopoll != s->autopoll) {
+s->autopoll = autopoll;
+if (autopoll) {
+timer_mod(s->adb_poll_timer,
+  qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
+  (get_ticks_per_sec() / CUDA_ADB_POLL_FREQ));
+} else {
+timer_del(s->adb_poll_timer);
+}
+}
+return true;
+}
+
 static const CudaCommand handlers[] = {
+{ CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
 };
 
 static void cuda_receive_packet(CUDAState *s,
 const uint8_t *data, int len)
 {
 uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] };
-int autopoll;
 int i, out_len = 0;
 uint32_t ti;
 
@@ -576,20 +600,6 @@ static void cuda_receive_packet(CUDAState *s,
 }
 
 switch(data[0]) {
-case CUDA_AUTOPOLL:
-autopoll = (data[1] != 0);
-if (autopoll != s->autopoll) {
-s->autopoll = autopoll;
-if (autopoll) {
-timer_mod(s->adb_poll_timer,
-   qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
-   (get_ticks_per_sec() / CUDA_ADB_POLL_FREQ));
-} else {
-timer_del(s->adb_poll_timer);
-}
-}
-cuda_send_packet_to_host(s, obuf, 3);
-return;
 case CUDA_GET_6805_ADDR:
 cuda_send_packet_to_host(s, obuf, 3);
 return;
-- 
2.1.4

[Qemu-devel] [PATCH 06/13] cuda: port POWERDOWN command to new framework

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 17 +
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 9af8e1d..df4797f 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -601,10 +601,23 @@ static bool cuda_cmd_set_device_list(CUDAState *s,
 return true;
 }
 
+static bool cuda_cmd_powerdown(CUDAState *s,
+   const uint8_t *in_data, int in_len,
+   uint8_t *out_data, int *out_len)
+{
+if (in_len != 0) {
+return false;
+}
+
+qemu_system_shutdown_request();
+return true;
+}
+
 static const CudaCommand handlers[] = {
 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE",  cuda_cmd_set_autorate },
 { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
+{ CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown },
 };
 
 static void cuda_receive_packet(CUDAState *s,
@@ -656,10 +669,6 @@ static void cuda_receive_packet(CUDAState *s,
 case CUDA_SET_POWER_MESSAGES:
 cuda_send_packet_to_host(s, obuf, 3);
 return;
-case CUDA_POWERDOWN:
-cuda_send_packet_to_host(s, obuf, 3);
-qemu_system_shutdown_request();
-return;
 case CUDA_RESET_SYSTEM:
 cuda_send_packet_to_host(s, obuf, 3);
 qemu_system_reset_request();
-- 
2.1.4

[Qemu-devel] [PATCH 00/13] cuda: misc fixes and cleanups

[Hervé Poussineau]

Hi,

This patchset cleans up a little bit the Apple CUDA emulation:
- correctly reject unknown commands
- correctly reject commands with wrong parameters
- support changing the frequency of auto-polling
- support changing device list probed in auto-poll
- add logs when using FILE_SERVER_FLAG/SET_POWER_MESSAGE
- remove unused commands (GET/SET_6805_ADDR)
- remove unimplemented GET_SET_IIC/COMBINED_FORMAT_IIC

GET_SET_IIC/COMBINED_FORMAT_IIC commands should be added again once
we implement the I2C bus provided by CUDA.

This also fixes MacBugs hanging at startup in the absence of
ADB mouse input.

Hervé

Hervé Poussineau (13):
  cuda: add a framework to handle commands
  cuda: reject unknown commands
  cuda: port AUTOPOLL command to new framework
  cuda: port SET_AUTO_RATE command to new framework
  cuda: port SET_DEVICE_LIST command to new framework
  cuda: port POWERDOWN command to new framework
  cuda: port RESET_SYSTEM command to new framework
  cuda: port FILE_SERVER_FLAG command to new framework
  cuda: port SET_POWER_MESSAGES command to new framework
  cuda: port GET_TIME command to new framework
  cuda: port SET_TIME command to new framework
  cuda: remove GET_6805_ADDR command
  cuda: remove CUDA_GET_SET_IIC/CUDA_COMBINED_FORMAT_IIC commands

 hw/input/adb.c |  18 ++--
 hw/misc/macio/cuda.c   | 268 -
 hw/ppc/mac.h   |   2 +
 include/hw/input/adb.h |   2 +-
 roms/SLOF  |   2 +-
 roms/openbios  |   2 +-
 6 files changed, 215 insertions(+), 79 deletions(-)

-- 
2.1.4

[Qemu-devel] [PATCH 12/13] cuda: remove GET_6805_ADDR command

[Hervé Poussineau]

It doesn't seem to be used, and operating systems should accept a 'unknown 
command' answer.

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 49a79fc..d1a7ae2 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -732,9 +732,6 @@ static void cuda_receive_packet(CUDAState *s,
 }
 
 switch(data[0]) {
-case CUDA_GET_6805_ADDR:
-cuda_send_packet_to_host(s, obuf, 3);
-return;
 case CUDA_COMBINED_FORMAT_IIC:
 obuf[0] = ERROR_PACKET;
 obuf[1] = 0x5;
-- 
2.1.4

[Qemu-devel] [PATCH 08/13] cuda: port FILE_SERVER_FLAG command to new framework

[Hervé Poussineau]

This command tells if computer should automatically wake-up after a power loss.

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 17 -
 1 file changed, 16 insertions(+), 1 deletion(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 70a5d0c..294e8fb 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -625,12 +625,28 @@ static bool cuda_cmd_reset_system(CUDAState *s,
 return true;
 }
 
+static bool cuda_cmd_set_file_server_flag(CUDAState *s,
+  const uint8_t *in_data, int in_len,
+  uint8_t *out_data, int *out_len)
+{
+if (in_len != 1) {
+return false;
+}
+
+qemu_log_mask(LOG_UNIMP,
+  "CUDA: unimplemented command FILE_SERVER_FLAG %d\n",
+  in_data[0]);
+return true;
+}
+
 static const CudaCommand handlers[] = {
 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE",  cuda_cmd_set_autorate },
 { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
 { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown },
 { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system },
+{ CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG",
+  cuda_cmd_set_file_server_flag },
 };
 
 static void cuda_receive_packet(CUDAState *s,
@@ -678,7 +694,6 @@ static void cuda_receive_packet(CUDAState *s,
 obuf[6] = ti;
 cuda_send_packet_to_host(s, obuf, 7);
 return;
-case CUDA_FILE_SERVER_FLAG:
 case CUDA_SET_POWER_MESSAGES:
 cuda_send_packet_to_host(s, obuf, 3);
 return;
-- 
2.1.4

[Qemu-devel] [PATCH 01/13] cuda: add a framework to handle commands

[Hervé Poussineau]

Next commits will port existing CUDA commands to this framework.

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 34 ++
 1 file changed, 34 insertions(+)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 9db4c64..69f69c2 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -534,13 +534,47 @@ static void cuda_adb_poll(void *opaque)
(get_ticks_per_sec() / CUDA_ADB_POLL_FREQ));
 }
 
+/* description of commands */
+typedef struct CudaCommand {
+uint8_t command;
+const char *name;
+bool (*handler)(CUDAState *s,
+const uint8_t *in_args, int in_len,
+uint8_t *out_args, int *out_len);
+} CudaCommand;
+
+static const CudaCommand handlers[] = {
+};
+
 static void cuda_receive_packet(CUDAState *s,
 const uint8_t *data, int len)
 {
 uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] };
 int autopoll;
+int i, out_len = 0;
 uint32_t ti;
 
+for (i = 0; i < ARRAY_SIZE(handlers); i++) {
+const CudaCommand *desc = &handlers[i];
+if (desc->command == data[0]) {
+CUDA_DPRINTF("handling command %s\n", desc->name);
+out_len = 0;
+if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) {
+cuda_send_packet_to_host(s, obuf, 3 + out_len);
+} else {
+qemu_log_mask(LOG_GUEST_ERROR,
+  "CUDA: %s: wrong parameters %d\n",
+  desc->name, len);
+obuf[0] = ERROR_PACKET;
+obuf[1] = 0x5; /* bad parameters */
+obuf[2] = CUDA_PACKET;
+obuf[3] = data[0];
+cuda_send_packet_to_host(s, obuf, 4);
+}
+return;
+}
+}
+
 switch(data[0]) {
 case CUDA_AUTOPOLL:
 autopoll = (data[1] != 0);
-- 
2.1.4

[Qemu-devel] [PATCH 13/13] cuda: remove CUDA_GET_SET_IIC/CUDA_COMBINED_FORMAT_IIC commands

[Hervé Poussineau]

We currently don't emulate the I2C bus provided by CUDA.

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 23 ---
 1 file changed, 23 deletions(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index d1a7ae2..80eea1b 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -731,29 +731,6 @@ static void cuda_receive_packet(CUDAState *s,
 }
 }
 
-switch(data[0]) {
-case CUDA_COMBINED_FORMAT_IIC:
-obuf[0] = ERROR_PACKET;
-obuf[1] = 0x5;
-obuf[2] = CUDA_PACKET;
-obuf[3] = data[0];
-cuda_send_packet_to_host(s, obuf, 4);
-return;
-case CUDA_GET_SET_IIC:
-if (len == 4) {
-cuda_send_packet_to_host(s, obuf, 3);
-} else {
-obuf[0] = ERROR_PACKET;
-obuf[1] = 0x2;
-obuf[2] = CUDA_PACKET;
-obuf[3] = data[0];
-cuda_send_packet_to_host(s, obuf, 4);
-}
-return;
-default:
-break;
-}
-
 qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]);
 obuf[0] = ERROR_PACKET;
 obuf[1] = 0x2; /* unknown command */
-- 
2.1.4

[Qemu-devel] [PATCH 07/13] cuda: port RESET_SYSTEM command to new framework

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 17 +
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index df4797f..70a5d0c 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -613,11 +613,24 @@ static bool cuda_cmd_powerdown(CUDAState *s,
 return true;
 }
 
+static bool cuda_cmd_reset_system(CUDAState *s,
+  const uint8_t *in_data, int in_len,
+  uint8_t *out_data, int *out_len)
+{
+if (in_len != 0) {
+return false;
+}
+
+qemu_system_reset_request();
+return true;
+}
+
 static const CudaCommand handlers[] = {
 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE",  cuda_cmd_set_autorate },
 { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
 { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown },
+{ CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system },
 };
 
 static void cuda_receive_packet(CUDAState *s,
@@ -669,10 +682,6 @@ static void cuda_receive_packet(CUDAState *s,
 case CUDA_SET_POWER_MESSAGES:
 cuda_send_packet_to_host(s, obuf, 3);
 return;
-case CUDA_RESET_SYSTEM:
-cuda_send_packet_to_host(s, obuf, 3);
-qemu_system_reset_request();
-return;
 case CUDA_COMBINED_FORMAT_IIC:
 obuf[0] = ERROR_PACKET;
 obuf[1] = 0x5;
-- 
2.1.4

[Qemu-devel] [PATCH 05/13] cuda: port SET_DEVICE_LIST command to new framework

[Hervé Poussineau]

Take device list mask into account when polling ADB devices.

Signed-off-by: Hervé Poussineau 
---
 hw/input/adb.c | 18 ++
 hw/misc/macio/cuda.c   | 17 +++--
 hw/ppc/mac.h   |  1 +
 include/hw/input/adb.h |  2 +-
 roms/SLOF  |  2 +-
 roms/openbios  |  2 +-
 6 files changed, 29 insertions(+), 13 deletions(-)

diff --git a/hw/input/adb.c b/hw/input/adb.c
index 09eead9..d05fdfd 100644
--- a/hw/input/adb.c
+++ b/hw/input/adb.c
@@ -88,7 +88,7 @@ int adb_request(ADBBusState *s, uint8_t *obuf, const uint8_t 
*buf, int len)
 }
 
 /* XXX: move that to cuda ? */
-int adb_poll(ADBBusState *s, uint8_t *obuf)
+int adb_poll(ADBBusState *s, uint8_t *obuf, uint16_t poll_mask)
 {
 ADBDevice *d;
 int olen, i;
@@ -99,13 +99,15 @@ int adb_poll(ADBBusState *s, uint8_t *obuf)
 if (s->poll_index >= s->nb_devices)
 s->poll_index = 0;
 d = s->devices[s->poll_index];
-buf[0] = ADB_READREG | (d->devaddr << 4);
-olen = adb_request(s, obuf + 1, buf, 1);
-/* if there is data, we poll again the same device */
-if (olen > 0) {
-obuf[0] = buf[0];
-olen++;
-break;
+if ((1 << d->devaddr) & poll_mask) {
+buf[0] = ADB_READREG | (d->devaddr << 4);
+olen = adb_request(s, obuf + 1, buf, 1);
+/* if there is data, we poll again the same device */
+if (olen > 0) {
+obuf[0] = buf[0];
+olen++;
+break;
+}
 }
 s->poll_index++;
 }
diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 9ec642f..9af8e1d 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -522,7 +522,7 @@ static void cuda_adb_poll(void *opaque)
 uint8_t obuf[ADB_MAX_OUT_LEN + 2];
 int olen;
 
-olen = adb_poll(&s->adb_bus, obuf + 2);
+olen = adb_poll(&s->adb_bus, obuf + 2, s->poll_mask);
 if (olen > 0) {
 obuf[0] = ADB_PACKET;
 obuf[1] = 0x40; /* polled data */
@@ -589,9 +589,22 @@ static bool cuda_cmd_set_autorate(CUDAState *s,
 return true;
 }
 
+static bool cuda_cmd_set_device_list(CUDAState *s,
+ const uint8_t *in_data, int in_len,
+ uint8_t *out_data, int *out_len)
+{
+if (in_len != 2) {
+return false;
+}
+
+s->poll_mask = (((uint16_t)in_data[0]) << 8) | in_data[1];
+return true;
+}
+
 static const CudaCommand handlers[] = {
 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE",  cuda_cmd_set_autorate },
+{ CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
 };
 
 static void cuda_receive_packet(CUDAState *s,
@@ -640,7 +653,6 @@ static void cuda_receive_packet(CUDAState *s,
 cuda_send_packet_to_host(s, obuf, 7);
 return;
 case CUDA_FILE_SERVER_FLAG:
-case CUDA_SET_DEVICE_LIST:
 case CUDA_SET_POWER_MESSAGES:
 cuda_send_packet_to_host(s, obuf, 3);
 return;
@@ -847,6 +859,7 @@ static void cuda_realizefn(DeviceState *dev, Error **errp)
 
 s->adb_poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_adb_poll, s);
 s->auto_rate_ms = 20;
+s->poll_mask = 0x;
 }
 
 static void cuda_initfn(Object *obj)
diff --git a/hw/ppc/mac.h b/hw/ppc/mac.h
index 90fcb69..506f7a8 100644
--- a/hw/ppc/mac.h
+++ b/hw/ppc/mac.h
@@ -111,6 +111,7 @@ typedef struct CUDAState {
 int data_out_index;
 
 qemu_irq irq;
+uint16_t poll_mask;
 uint8_t auto_rate_ms;
 uint8_t autopoll;
 uint8_t data_in[128];
diff --git a/include/hw/input/adb.h b/include/hw/input/adb.h
index bdfccd4..db51d03 100644
--- a/include/hw/input/adb.h
+++ b/include/hw/input/adb.h
@@ -79,7 +79,7 @@ struct ADBBusState {
 
 int adb_request(ADBBusState *s, uint8_t *buf_out,
 const uint8_t *buf, int len);
-int adb_poll(ADBBusState *s, uint8_t *buf_out);
+int adb_poll(ADBBusState *s, uint8_t *buf_out, uint16_t poll_mask);
 
 #define TYPE_ADB_KEYBOARD "adb-keyboard"
 #define TYPE_ADB_MOUSE "adb-mouse"
diff --git a/roms/SLOF b/roms/SLOF
index b4c9380..811277a 16
--- a/roms/SLOF
+++ b/roms/SLOF
@@ -1 +1 @@
-Subproject commit b4c93802a5b2c72f096649c497ec9ff5708e4456
+Subproject commit 811277ac91f674a9273e2b529791e9b75350f3e8
diff --git a/roms/openbios b/roms/openbios
index 3caee17..18f02b1 16
--- a/roms/openbios
+++ b/roms/openbios
@@ -1 +1 @@
-Subproject commit 3caee1794ac3f742315823d8447d21f33ce019e9
+Subproject commit 18f02b14de795c1aab4fe23c1810bfd0944da6aa
-- 
2.1.4

[Qemu-devel] [PATCH 10/13] cuda: port GET_TIME command to new framework

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 29 +
 1 file changed, 21 insertions(+), 8 deletions(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 64a3e79..55e9cff 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -653,6 +653,26 @@ static bool cuda_cmd_set_power_message(CUDAState *s,
 return true;
 }
 
+static bool cuda_cmd_get_time(CUDAState *s,
+  const uint8_t *in_data, int in_len,
+  uint8_t *out_data, int *out_len)
+{
+uint32_t ti;
+
+if (in_len != 0) {
+return false;
+}
+
+ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
+   / get_ticks_per_sec());
+out_data[0] = ti >> 24;
+out_data[1] = ti >> 16;
+out_data[2] = ti >> 8;
+out_data[3] = ti;
+*out_len = 4;
+return true;
+}
+
 static const CudaCommand handlers[] = {
 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE",  cuda_cmd_set_autorate },
@@ -663,6 +683,7 @@ static const CudaCommand handlers[] = {
   cuda_cmd_set_file_server_flag },
 { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES",
   cuda_cmd_set_power_message },
+{ CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time },
 };
 
 static void cuda_receive_packet(CUDAState *s,
@@ -702,14 +723,6 @@ static void cuda_receive_packet(CUDAState *s,
 s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / 
get_ticks_per_sec());
 cuda_send_packet_to_host(s, obuf, 3);
 return;
-case CUDA_GET_TIME:
-ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / 
get_ticks_per_sec());
-obuf[3] = ti >> 24;
-obuf[4] = ti >> 16;
-obuf[5] = ti >> 8;
-obuf[6] = ti;
-cuda_send_packet_to_host(s, obuf, 7);
-return;
 case CUDA_COMBINED_FORMAT_IIC:
 obuf[0] = ERROR_PACKET;
 obuf[1] = 0x5;
-- 
2.1.4

[Qemu-devel] [PATCH 09/13] cuda: port SET_POWER_MESSAGES command to new framework

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 19 ---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 294e8fb..64a3e79 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -639,6 +639,20 @@ static bool cuda_cmd_set_file_server_flag(CUDAState *s,
 return true;
 }
 
+static bool cuda_cmd_set_power_message(CUDAState *s,
+   const uint8_t *in_data, int in_len,
+   uint8_t *out_data, int *out_len)
+{
+if (in_len != 1) {
+return false;
+}
+
+qemu_log_mask(LOG_UNIMP,
+  "CUDA: unimplemented command SET_POWER_MESSAGE %d\n",
+  in_data[0]);
+return true;
+}
+
 static const CudaCommand handlers[] = {
 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE",  cuda_cmd_set_autorate },
@@ -647,6 +661,8 @@ static const CudaCommand handlers[] = {
 { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system },
 { CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG",
   cuda_cmd_set_file_server_flag },
+{ CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES",
+  cuda_cmd_set_power_message },
 };
 
 static void cuda_receive_packet(CUDAState *s,
@@ -694,9 +710,6 @@ static void cuda_receive_packet(CUDAState *s,
 obuf[6] = ti;
 cuda_send_packet_to_host(s, obuf, 7);
 return;
-case CUDA_SET_POWER_MESSAGES:
-cuda_send_packet_to_host(s, obuf, 3);
-return;
 case CUDA_COMBINED_FORMAT_IIC:
 obuf[0] = ERROR_PACKET;
 obuf[1] = 0x5;
-- 
2.1.4

[Qemu-devel] [PATCH 11/13] cuda: port SET_TIME command to new framework

[Hervé Poussineau]

Signed-off-by: Hervé Poussineau 
---
 hw/misc/macio/cuda.c | 24 ++--
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index 55e9cff..49a79fc 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -673,6 +673,23 @@ static bool cuda_cmd_get_time(CUDAState *s,
 return true;
 }
 
+static bool cuda_cmd_set_time(CUDAState *s,
+  const uint8_t *in_data, int in_len,
+  uint8_t *out_data, int *out_len)
+{
+uint32_t ti;
+
+if (in_len != 4) {
+return false;
+}
+
+ti = (((uint32_t)in_data[1]) << 24) + (((uint32_t)in_data[2]) << 16)
+ + (((uint32_t)in_data[3]) << 8) + in_data[4];
+s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
+   / get_ticks_per_sec());
+return true;
+}
+
 static const CudaCommand handlers[] = {
 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE",  cuda_cmd_set_autorate },
@@ -684,6 +701,7 @@ static const CudaCommand handlers[] = {
 { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES",
   cuda_cmd_set_power_message },
 { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time },
+{ CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time },
 };
 
 static void cuda_receive_packet(CUDAState *s,
@@ -691,7 +709,6 @@ static void cuda_receive_packet(CUDAState *s,
 {
 uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] };
 int i, out_len = 0;
-uint32_t ti;
 
 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
 const CudaCommand *desc = &handlers[i];
@@ -718,11 +735,6 @@ static void cuda_receive_packet(CUDAState *s,
 case CUDA_GET_6805_ADDR:
 cuda_send_packet_to_host(s, obuf, 3);
 return;
-case CUDA_SET_TIME:
-ti = (((uint32_t)data[1]) << 24) + (((uint32_t)data[2]) << 16) + 
(((uint32_t)data[3]) << 8) + data[4];
-s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) / 
get_ticks_per_sec());
-cuda_send_packet_to_host(s, obuf, 3);
-return;
 case CUDA_COMBINED_FORMAT_IIC:
 obuf[0] = ERROR_PACKET;
 obuf[1] = 0x5;
-- 
2.1.4

Re: [Qemu-devel] [vfio-users] [PATCH v2 1/3] input: add qemu_input_qcode_to_linux + qemu_input_linux_to_qcode

[Jonathan Scruggs]

Hi Gerd,

I am using qemu 2.5.0 source code and applied all the patches on your git
server. This one:
https://www.kraxel.org/cgit/qemu/commit/?h=work/input-dev-event&id=b52110d4f22e99953ac5195a90988a253e3e2f90
causes the build to fail with this:
error: array index in non-array initializer
It happens on all the key binding assignments. Are there changes in the
code elsewhere that this patch is for? It compiles just fine without it on
the 2.5.0 sources with the latest CVE bug patches.

Jon

On 18 January 2016 at 14:13, Gerd Hoffmann  wrote:

> On Mo, 2016-01-18 at 11:47 +, Jonathan Scruggs wrote:
> > Hi Gerd,
> >
> > Would there be a way to add repeating keys back in that doesn't cause
> > issues? Maybe slow down the repeat cycle? Or is this strictly a issue
> > with how the actual event drivers or the buffers work and would need
> > changing to that on the host side?
>
> I don't know ...
>
> > In my mind it seams fairly straightforward in just forwarding these
> > events to the VM.
>
> I assumed that as well, it was there initially and only removed after it
> turned out to cause problems.
>
> I've added a patch to the git branch bringing it back, but guarded with
> a new config option (repeat={on,off}) and turned off by default.
>
> > Would it be different if the keyboard was using the PS/2 versus the
> > USB interface on the guest? I have a USB controller added for the
> > guest but the keyboard and mouse are on PS/2 interfaces.
>
> Worth testing.  Just add "-device usb-kbd" to the qemu command line and
> see what happens ...
>
> > A second thought. What if you made the keyboard and mouse USB only,
> > then on the guest, make sure the USB controller is using Message
> > Signal-Based interrupts. On Windows, the controller was set to the old
> > style Line-Based. The slow downs could be caused by a lake in speed
> > with he interrupts and USB polling speed.
>
> In case windows is new enough to have xhci support (win8+) you can try
> using a xhci hostadapter, which supports MSI (uhci and ehci don't), then
> hook up the usb keyboard to it.
>
> "-device nec-usb-xhci,id=xhci -device usb-kbd,bus=xhci.0"
>
> cheers,
>   Gerd
>
>

Re: [Qemu-devel] Regarding Intel IGD passthru support for QEMU/KVM

[Raghavan Santhanam]

Hi All,

As I mentioned, here is the Intel IGD Passthru in action, that's fully
working without any issues, with QEMU/KVM running hardware-accelerated
Android-x86 5.1/Lollipop : https://www.youtube.com/watch?v=PBN1DmarJ7k

Thank you all once again for the wonderful work on QEMU/KVM/XEN since many
years!

Best,
Raghavan


On Wed, Jan 20, 2016 at 9:31 AM, Raghavan Santhanam 
wrote:

> Hi Gerd,
>
> Thanks for the update.
>
> Actually, I have already got Intel IGD passthru to work couple of days
> back with git commit being
> at f02ccf53693758b65843264e077f90cf295e7d98(disas/libvixl: Really suppress
> gcc 4.6.3 sign-compare warnings).
>
> As far as Qemu is concerned, I am using default machine. I just had to
> modify the creation of PCI
> devices code a little. And also the ISA bridge code. Host uses 3.*
> kernel(yes, it's quite old!). Guest is
> using 4.* kernel. Everything is working without issues. By the way, in my
> case, Intel IGD is the primary
> VGA. So, it has been challenging to accomplish this task since a very long
> period of time.
>
> And guest I am using is Android-x86(5.1/Lollipop). Updates to follow . . .
>
> Best,
> Raghavan
>
>
>
>
>
> On Wed, Jan 20, 2016 at 2:30 AM, Gerd Hoffmann  wrote:
>
>>   Hi,
>>
>> > Based on the Intel IGD passthru support that has been added to
>> > Qemu/Xen code base, is there any way to use/reuse the same logic
>> > currently to have a successful passthru of an Intel IGD with Qemu/KVM
>> > on a Linux host(Ubuntu x86_64) or will that require some more
>> > work in addition to what Xen code based already has for the IGD
>> > passthru?
>>
>> If you feel a bit adventurous you can try whenever current git master
>> (or 4.5-rc1 when Linus releases it next weekend) as guest kernel works
>> for you.
>>
>> Recent linux kernels seem to not require the host bridge tweaks any
>> more.  A patch to recognize the qemu q35 south bridge has been added in
>> the merge window.
>>
>> So using the q35 machine type + vfio passthrough without any special igd
>> tweaks has a fair chance to work.  opregion support isn't there yet, so
>> don't expect laptop panels work correctly.
>>
>> cheers,
>>   Gerd
>>
>>
>

Re: [Qemu-devel] [PATCH] target-mips: silence NaNs for cvt.s.d and cvt.d.s

[Maciej W. Rozycki]

On Sun, 6 Dec 2015, Aurelien Jarno wrote:

> cvt.s.d and cvt.d.s are FP operations and thus need to convert input
> sNaN into corresponding qNaN. Explicitely use the floatXX_maybe_silence_nan
> functions for that as the floatXX_to_floatXX functions do not do that.
> 
> Cc: Leon Alrae 
> Signed-off-by: Aurelien Jarno 
> ---
>  target-mips/op_helper.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
> index d2c98c9..20e79be 100644
> --- a/target-mips/op_helper.c
> +++ b/target-mips/op_helper.c
> @@ -2545,6 +2545,7 @@ uint64_t helper_float_cvtd_s(CPUMIPSState *env, 
> uint32_t fst0)
>  uint64_t fdt2;
>  
>  fdt2 = float32_to_float64(fst0, &env->active_fpu.fp_status);
> +fdt2 = float64_maybe_silence_nan(fdt2);
>  update_fcr31(env, GETPC());
>  return fdt2;
>  }
> @@ -2634,6 +2635,7 @@ uint32_t helper_float_cvts_d(CPUMIPSState *env, 
> uint64_t fdt0)
>  uint32_t fst2;
>  
>  fst2 = float64_to_float32(fdt0, &env->active_fpu.fp_status);
> +fst2 = float32_maybe_silence_nan(fst2);
>  update_fcr31(env, GETPC());
>  return fst2;
>  }

 FYI, I posted a more general fix to this a while ago, however the review 
regrettably went nowhere.  See the archive of discussion starting at: 
 
for details, including the justification and further design consideration.

  Maciej

Re: [Qemu-devel] [PATCH v11 6/7] hw/ptimer: Legalize running with delta = load = 0 and abort on period = 0

[Peter Crosthwaite]

On Thu, Jan 21, 2016 at 11:03 AM, Dmitry Osipenko  wrote:
> Currently ptimer would print error message and clear enable flag for an
> arming timer that has delta = load = 0. That actually could be a valid case
> for some hardware, like instant IRQ trigger for oneshot timer or continuous
> in periodic mode. Support those cases by removing the error message and
> stopping the timer when delta = 0. Abort execution when period = 0 instead
> of printing the error message, otherwise there is a chance to miss that error.
>
> In addition, don't re-load oneshot timer when delta = 0 and remove duplicated
> code from ptimer_tick(), since ptimer_reload would invoke trigger and stop
> the timer.
>
> Signed-off-by: Dmitry Osipenko 

Reviewed-by: Peter Crosthwaite 

> ---
>  hw/core/ptimer.c | 27 ---
>  1 file changed, 12 insertions(+), 15 deletions(-)
>
> diff --git a/hw/core/ptimer.c b/hw/core/ptimer.c
> index 142cc64..cec59e1 100644
> --- a/hw/core/ptimer.c
> +++ b/hw/core/ptimer.c
> @@ -39,11 +39,14 @@ static void ptimer_reload(ptimer_state *s)
>
>  if (s->delta == 0) {
>  ptimer_trigger(s);
> +}
> +
> +if (s->delta == 0 && s->enabled == 1) {
>  s->delta = s->limit;
>  }
> -if (s->delta == 0 || s->period == 0) {
> -fprintf(stderr, "Timer with period zero, disabling\n");
> -s->enabled = 0;
> +
> +if (s->delta == 0) {
> +ptimer_stop(s);
>  return;
>  }
>
> @@ -72,27 +75,22 @@ static void ptimer_reload(ptimer_state *s)
>  static void ptimer_tick(void *opaque)
>  {
>  ptimer_state *s = (ptimer_state *)opaque;
> -ptimer_trigger(s);
>  s->delta = 0;
> -if (s->enabled == 2) {
> -s->enabled = 0;
> -} else {
> -ptimer_reload(s);
> -}
> +ptimer_reload(s);
>  }
>
>  uint64_t ptimer_get_count(ptimer_state *s)
>  {
>  uint64_t counter;
>
> -if (s->enabled) {
> +if (s->enabled && s->delta != 0) {
>  int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
>  int64_t next = s->next_event;
>  bool expired = (now - next >= 0);
>  bool oneshot = (s->enabled == 2);
>
>  /* Figure out the current counter value.  */
> -if (s->period == 0 || (expired && (oneshot || use_icount))) {
> +if (expired && (oneshot || use_icount)) {
>  /* Prevent timer underflowing if it should already have
> triggered.  */
>  counter = 0;
> @@ -164,10 +162,7 @@ void ptimer_run(ptimer_state *s, int oneshot)
>  {
>  bool was_disabled = !s->enabled;
>
> -if (was_disabled && s->period == 0) {
> -fprintf(stderr, "Timer with period zero, disabling\n");
> -return;
> -}
> +g_assert(s->period != 0);
>  s->enabled = oneshot ? 2 : 1;
>  if (was_disabled) {
>  s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
> @@ -190,6 +185,7 @@ void ptimer_stop(ptimer_state *s)
>  /* Set counter increment interval in nanoseconds.  */
>  void ptimer_set_period(ptimer_state *s, int64_t period)
>  {
> +g_assert(period != 0);
>  s->delta = ptimer_get_count(s);
>  s->period = period;
>  s->period_frac = 0;
> @@ -202,6 +198,7 @@ void ptimer_set_period(ptimer_state *s, int64_t period)
>  /* Set counter frequency in Hz.  */
>  void ptimer_set_freq(ptimer_state *s, uint32_t freq)
>  {
> +g_assert(freq != 0);
>  s->delta = ptimer_get_count(s);
>  s->period = 10ll / freq;
>  s->period_frac = (10ll << 32) / freq;
> --
> 2.7.0
>

Re: [Qemu-devel] [PATCH v11 7/7] arm_mptimer: Convert to use ptimer

[Peter Crosthwaite]

On Thu, Jan 21, 2016 at 11:03 AM, Dmitry Osipenko  wrote:
> Current ARM MPTimer implementation uses QEMUTimer for the actual timer,
> this implementation isn't complete and mostly tries to duplicate of what
> generic ptimer is already doing fine.
>
> Conversion to ptimer brings the following benefits and fixes:
> - Simple timer pausing implementation
> - Fixes counter value preservation after stopping the timer
> - Correctly handles prescaler != 0 cases
> - Code simplification and reduction
>
> Bump VMSD to version 3, since VMState is changed and is not compatible
> with the previous implementation.
>
> Signed-off-by: Dmitry Osipenko 
> ---
>  hw/timer/arm_mptimer.c | 131 
> +
>  include/hw/timer/arm_mptimer.h |   5 +-
>  2 files changed, 67 insertions(+), 69 deletions(-)
>
> diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c
> index 3e59c2a..a5f46df 100644
> --- a/hw/timer/arm_mptimer.c
> +++ b/hw/timer/arm_mptimer.c
> @@ -19,8 +19,9 @@
>   * with this program; if not, see .
>   */
>
> +#include "hw/ptimer.h"
>  #include "hw/timer/arm_mptimer.h"
> -#include "qemu/timer.h"
> +#include "qemu/main-loop.h"
>  #include "qom/cpu.h"
>
>  /* This device implements the per-cpu private timer and watchdog block
> @@ -42,33 +43,34 @@ static inline void timerblock_update_irq(TimerBlock *tb)
>  }
>
>  /* Return conversion factor from mpcore timer ticks to qemu timer ticks.  */
> -static inline uint32_t timerblock_scale(TimerBlock *tb)
> +static inline uint32_t timerblock_scale(uint32_t control)
>  {
> -return (((tb->control >> 8) & 0xff) + 1) * 10;
> +return (((control >> 8) & 0xff) + 1) * 10;
>  }
>
> -static void timerblock_reload(TimerBlock *tb, int restart)
> +static inline void timerblock_set_count(struct ptimer_state *timer,
> +uint32_t control, uint64_t *count)
>  {
> -if (tb->count == 0) {
> -return;
> +/* PTimer would immediately trigger interrupt for periodic timer
> + * when counter set to 0, MPtimer under certain condition only.  */

newline before */

> +if ((control & 3) == 3 && (*count == 0) && (control & 0xff00) == 0) {
> +*count = ptimer_get_limit(timer);
>  }
> -if (restart) {
> -tb->tick = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
> +ptimer_set_count(timer, *count);
> +}
> +
> +static inline void timerblock_run(struct ptimer_state *timer, uint32_t 
> control,
> +  bool cond)

drop cond ...

> +{
> +if (cond) {

... control & 1 ...

> +ptimer_run(timer, !(control & 2));
>  }
> -tb->tick += (int64_t)tb->count * timerblock_scale(tb);
> -timer_mod(tb->timer, tb->tick);
>  }
>
>  static void timerblock_tick(void *opaque)
>  {
>  TimerBlock *tb = (TimerBlock *)opaque;
>  tb->status = 1;
> -if (tb->control & 2) {
> -tb->count = tb->load;
> -timerblock_reload(tb, 0);
> -} else {
> -tb->count = 0;
> -}
>  timerblock_update_irq(tb);
>  }
>
> @@ -76,21 +78,11 @@ static uint64_t timerblock_read(void *opaque, hwaddr addr,
>  unsigned size)
>  {
>  TimerBlock *tb = (TimerBlock *)opaque;
> -int64_t val;
>  switch (addr) {
>  case 0: /* Load */
> -return tb->load;
> +return ptimer_get_limit(tb->timer);
>  case 4: /* Counter.  */
> -if (((tb->control & 1) == 0) || (tb->count == 0)) {
> -return 0;
> -}
> -/* Slow and ugly, but hopefully won't happen too often.  */
> -val = tb->tick - qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
> -val /= timerblock_scale(tb);
> -if (val < 0) {
> -val = 0;
> -}
> -return val;
> +return ptimer_get_count(tb->timer);
>  case 8: /* Control.  */
>  return tb->control;
>  case 12: /* Interrupt status.  */
> @@ -104,39 +96,51 @@ static void timerblock_write(void *opaque, hwaddr addr,
>   uint64_t value, unsigned size)
>  {
>  TimerBlock *tb = (TimerBlock *)opaque;
> -int64_t old;
> +uint32_t control = tb->control;
>  switch (addr) {
>  case 0: /* Load */
> -tb->load = value;
> -/* Fall through.  */
> -case 4: /* Counter.  */
> -if ((tb->control & 1) && tb->count) {
> -/* Cancel the previous timer.  */
> -timer_del(tb->timer);
> +/* Setting load to 0 stops the timer if prescaler == 0.  */
> +if ((control & 1) && (value == 0) && (control & 0xff00) == 0) {
> +ptimer_stop(tb->timer);
> +control &= ~1;
>  }
> -tb->count = value;
> -if (tb->control & 1) {
> -timerblock_reload(tb, 1);
> +ptimer_set_limit(tb->timer, value, 1);
> +timerblock_run(tb->timer, control, (control & 1));
> +break;
> +case 4: /* Counter.  *

Re: [Qemu-devel] [PATCH v11 2/7] hw/ptimer: Perform counter wrap around if timer already expired

[Peter Crosthwaite]

On Thu, Jan 21, 2016 at 11:03 AM, Dmitry Osipenko  wrote:
> ptimer_get_count() might be called while QEMU timer already been expired.
> In that case ptimer would return counter = 0, which might be undesirable
> in case of polled timer. Do counter wrap around for periodic timer to keep
> it distributed. In order to achieve more accurate emulation behaviour of
> certain hardware, don't perform wrap around when in icount mode and return
> counter = 0 in that case (that doesn't affect polled counter distribution).
>
> Signed-off-by: Dmitry Osipenko 

Reviewed-by: Peter Crosthwaite 

> ---
>  hw/core/ptimer.c | 19 +--
>  1 file changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/hw/core/ptimer.c b/hw/core/ptimer.c
> index 6dc1677..cb50d30 100644
> --- a/hw/core/ptimer.c
> +++ b/hw/core/ptimer.c
> @@ -83,14 +83,16 @@ static void ptimer_tick(void *opaque)
>
>  uint64_t ptimer_get_count(ptimer_state *s)
>  {
> -int64_t now;
>  uint64_t counter;
>
>  if (s->enabled) {
> -now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
> +int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
> +int64_t next = s->next_event;
> +bool expired = (now - next >= 0);
> +bool oneshot = (s->enabled == 2);
> +
>  /* Figure out the current counter value.  */
> -if (now - s->next_event > 0
> -|| s->period == 0) {
> +if (s->period == 0 || (expired && (oneshot || use_icount))) {
>  /* Prevent timer underflowing if it should already have
> triggered.  */
>  counter = 0;
> @@ -102,7 +104,7 @@ uint64_t ptimer_get_count(ptimer_state *s)
>  uint32_t period_frac = s->period_frac;
>  uint64_t period = s->period;
>
> -if ((s->enabled == 1) && !use_icount && (s->delta * period < 
> 1)) {
> +if (!oneshot && (s->delta * period < 1) && !use_icount) {
>  period = 1 / s->delta;
>  period_frac = 0;
>  }
> @@ -117,7 +119,7 @@ uint64_t ptimer_get_count(ptimer_state *s)
> backwards.
>  */
>
> -rem = s->next_event - now;
> +rem = expired ? now - next : next - now;
>  div = period;
>
>  clz1 = clz64(rem);
> @@ -137,6 +139,11 @@ uint64_t ptimer_get_count(ptimer_state *s)
>  div += 1;
>  }
>  counter = rem / div;
> +
> +if (expired && (counter != 0)) {
> +/* Wrap around periodic counter.  */
> +counter = s->limit - counter % s->limit;
> +}
>  }
>  } else {
>  counter = s->delta;
> --
> 2.7.0
>

Re: [Qemu-devel] [PATCH 0/3] merge SSDT into DSDT

[Michael S. Tsirkin]

On Fri, Jan 22, 2016 at 03:36:05PM +0100, Igor Mammedov wrote:
> Merging both tables will allow for futher ASL
> simplification and cleanups per device/subsystem
> And it also allows to reduce number of expected
> binary blobs for ACPI tests which reduces tests
> maintenance.

What this does break, however, is adding XSDT which
we might need to do in the future.
I'd rather do the reverse and have as much as possible
in the SSDT.

> Boot tested with RHEL72, WS2003, WS2012R2 guests.
> 
> git tree for testing:
> https://github.com/imammedo/qemu.git merge_ssdt_into_dsdt_v1 
> 
> Igor Mammedov (3):
>   pc: acpi: merge SSDT into DSDT
>   tests: pc: acpi: drop not needed 'expected SSDT' blobs
>   tests: pc: acpi: add expected DSDT.bridge blobs and update DSDT blobs
> 
>  hw/i386/acpi-build.c | 246 
> ---
>  tests/acpi-test-data/pc/DSDT | Bin 3028 -> 5478 bytes
>  tests/acpi-test-data/pc/DSDT.bridge  | Bin 0 -> 7337 bytes
>  tests/acpi-test-data/pc/SSDT | Bin 2486 -> 0 bytes
>  tests/acpi-test-data/pc/SSDT.bridge  | Bin 4345 -> 0 bytes
>  tests/acpi-test-data/q35/DSDT| Bin 7666 -> 8321 bytes
>  tests/acpi-test-data/q35/DSDT.bridge | Bin 0 -> 8338 bytes
>  tests/acpi-test-data/q35/SSDT| Bin 691 -> 0 bytes
>  tests/acpi-test-data/q35/SSDT.bridge | Bin 708 -> 0 bytes
>  9 files changed, 111 insertions(+), 135 deletions(-)
>  create mode 100644 tests/acpi-test-data/pc/DSDT.bridge
>  delete mode 100644 tests/acpi-test-data/pc/SSDT
>  delete mode 100644 tests/acpi-test-data/pc/SSDT.bridge
>  create mode 100644 tests/acpi-test-data/q35/DSDT.bridge
>  delete mode 100644 tests/acpi-test-data/q35/SSDT
>  delete mode 100644 tests/acpi-test-data/q35/SSDT.bridge
> 
> -- 
> 1.8.3.1

Re: [Qemu-devel] [PATCH v2] pc: allow raising low memory via max-ram-below-4g option

[Michael S. Tsirkin]

On Fri, Jan 22, 2016 at 11:51:54AM +0100, Gerd Hoffmann wrote:
>   Hi,
> 
> > > > I wonder whether we should just bite the bullet and ask management to
> > > > maintain the physical memory map for us, instead of trying to give us
> > > > hints.
> > > 
> > > I doubt this simplified things, given the backward compatibility
> > > constrains we have.
> > > 
> > > cheers,
> > >   Gerd
> > 
> > That's exactly what would become simple.
> > For backwards compatibility we would leave things alone
> > if the new flags for the memory map aren't specified.
> 
> But we'll add a bunch of new code for the new config mode which allows
> management to maintain the physical memory map.  And we'll expect
> management know about a bunch of machine type internals.


Yes we don't want that. I was vaguely thinking some kind
of query that reports the required info so management
just has to maintain that.


>  That isn't a
> simplification.
> 
> > This would allow people to e.g. allocate phy address
> > ranges for things like nvdimm which has been
> > problematic in the past.
> 
> Didn't follow nvdimm discussions.  If you think we really need that
> anyway to solve certain issues, sure, go ahead and I happily adjust this
> patch to use the new infrastructure.
> 
> cheers,
>   Gerd


I'd like to gather some feedback from management folk first.

-- 
MST