Re: [Qemu-devel] [PATCH] memory: simple memory tree printer
On 11 September 2011 21:31, Blue Swirl wrote: > PPC > memory > system addr off size 7fff > -vga.chain4 addr 000a off size 1 > -macio addr 8088 off size 8 > --macio-nvram addr 0006 off size 2 > --pmac-ide addr 0002 off size 1000 > --(null) addr 00016000 off size 0 > --escc-bar addr 00013000 off size 40 > --dbdma addr 8000 off size 1000 > --heathrow-pic addr off size 1000 > NB: (null) does not look OK. I think the NULL is the cuda memory region -- do you have this patch applied? http://patchwork.ozlabs.org/patch/113925/ -- PMM
Re: [Qemu-devel] [PATCH 0/2] improve qemu-img conversion performance
On Sun, Sep 11, 2011 at 8:17 PM, Yehuda Sadeh Weinraub wrote: > On Sun, Sep 11, 2011 at 8:14 PM, Sage Weil wrote: >> On Fri, 9 Sep 2011, Kevin Wolf wrote: >>> Am 08.09.2011 18:36, schrieb Sage Weil: >>> > On Thu, 8 Sep 2011, Kevin Wolf wrote: >>> >> Am 08.09.2011 01:06, schrieb Yehuda Sadeh: >>> >>> The following set of patches improve the qemu-img conversion process >>> >>> performance. When using a higher latency backend, small writes have a >>> >>> severe impact on the time it takes to do image conversion. >>> >>> We switch to using async writes, and we avoid splitting writes due to >>> >>> holes when the holes are small enough. >>> >>> >>> >>> Yehuda Sadeh (2): >>> >>> qemu-img: async write to block device when converting image >>> >>> qemu-img: don't skip writing small holes >>> >>> >>> >>> qemu-img.c | 34 +++--- >>> >>> 1 files changed, 27 insertions(+), 7 deletions(-) >>> >>> >>> >> >>> >> This doesn't seem to be against git master or the block tree. Please >>> >> rebase. >>> >> >>> >> I think that commit a22f123c may obsolete your patch 2/2. >>> > >>> > With git.kernel.org down, where should I be looking for the latest >>> > upstream? >>> >>> qemu has never been on kernel.org. The interesting repositories for you are: >>> >>> * Upstream: git://git.qemu.org/qemu.git master >>> * Block development branch: git://repo.or.cz/qemu/kevin.git block >> >> Oh right. I've been working from qemu-kvm.git. >> >> I've done some (still minimal) testing, and it looks like the combination >> of a22f123c and the new writeback/flush stuff in librbd gets the same >> result as doing async io explicitly from qemu-img.c. Want to take a look, >> Yehuda? It still defaults to off, so you'll need to add >> rbd_writeback_window=800 or similar to the rbd device string. >> > > I'll take a look. I do have a rebased version for the qemu-img async > patch, and I think qemu can benefit from that anyway. > I tested latest librbd with 8k rbd_writeback_window against Kevin's block branch and it seems that the conversion performance surpasses what I had seen with my qemu-img changes. Yehuda
Re: [Qemu-devel] [PATCH] support add-cow file format
Am 10.09.2011 02:54, schrieb Dong Xu Wang:
> 于Fri 09 Sep 2011 10:27:26 PM CST,Kevin Wolf写到:
>> Am 09.09.2011 07:48, schrieb Dong Xu Wang:
>>> As raw file format does not support backing_file and copy on write feature,
>>> so
>>> I add COW to it to support backing_file option. I store dirty bitmap in an
>>> add-cow file. When executed, it looks like this:
>>> qemu-img create -f add-cow -o backing_file=ubuntu.img,image_file=test.img
>>> test.add-cow
>>> qemu -drive if=virtio,file=test.add-cow -m 1024
>>>
>>> (test.img is a raw format file; test.add-cow stores bitmap)
>>>
>>> Signed-off-by: Dong Xu Wang
>>
>> You should not make any changes to generic code, except maybe add
>> something to bdrv_get_info(). In particular you shouldn't need to touch
>> bdrv_open() or bdrv_create() at all.
>>
>> The one required change in the approach for this to work is that you
>> shouldn't view raw+add_cow as a unit, but add_cow should be treated as
>> something separate that happens to be stacked on a raw file (which is
>> created separately).
>>
>> Then you can do almost everything in block/add-cow.c.
>>
>>> ---
>>> Makefile.objs |1 +
>>> block.c | 83 ++-
>>> block.h |2 +
>>> block/add-cow.c | 456
>>> +++
>>> block_int.h |6 +
>>> qemu-img.c | 10 ++
>>> 6 files changed, 555 insertions(+), 3 deletions(-)
>>> create mode 100644 block/add-cow.c
>>>
>>> diff --git a/Makefile.objs b/Makefile.objs
>>> index 26b885b..1402f9f 100644
>>> --- a/Makefile.objs
>>> +++ b/Makefile.objs
>>> @@ -31,6 +31,7 @@ block-obj-$(CONFIG_LINUX_AIO) += linux-aio.o
>>>
>>> block-nested-y += raw.o cow.o qcow.o vdi.o vmdk.o cloop.o dmg.o bochs.o
>>> vpc.o vvfat.o
>>> block-nested-y += qcow2.o qcow2-refcount.o qcow2-cluster.o
>>> qcow2-snapshot.o qcow2-cache.o
>>> +block-nested-y += add-cow.o
>>> block-nested-y += qed.o qed-gencb.o qed-l2-cache.o qed-table.o
>>> qed-cluster.o
>>> block-nested-y += qed-check.o
>>> block-nested-y += parallels.o nbd.o blkdebug.o sheepdog.o blkverify.o
>>> diff --git a/block.c b/block.c
>>> index a8c789a..c797cfc 100644
>>> --- a/block.c
>>> +++ b/block.c
>>> @@ -369,7 +369,7 @@ static int find_image_format(const char *filename,
>>> BlockDriver **pdrv)
>>> {
>>> int ret, score, score_max;
>>> BlockDriver *drv1, *drv;
>>> -uint8_t buf[2048];
>>> +uint8_t buf[4096];
>>> BlockDriverState *bs;
>>
>> What's the reason for this change?
>>
> The size of add_cow_header in my code is larger than 2048.
Right, but the magic is in the first 8 bytes, so for probing 2048 bytes
should be more than enough.
>>> diff --git a/block/add-cow.c b/block/add-cow.c
>>> new file mode 100644
>>> index 000..f4b67e5
>>> --- /dev/null
>>> +++ b/block/add-cow.c
>>> @@ -0,0 +1,456 @@
>>> +#include "qemu-common.h"
>>> +#include "block_int.h"
>>> +#include "module.h"
>>> +
>>> +#define ADD_COW_MAGIC (((uint64_t)'A' << 56) | ((uint64_t)'D' << 48) | \
>>> +((uint64_t)'D' << 40) | ((uint64_t)'_' << 32) | \
>>> +((uint64_t)'C' << 24) | ((uint64_t)'O' << 16) | \
>>> +((uint64_t)'W' << 8) | 0xFF)
>>> +#define ADD_COW_VERSION 1
>>> +
>>> +struct add_cow_header {
>>> +uint64_t magic;
>>> +uint32_t version;
>>> +char backing_file[1024];
>>> +char image_file[1024];
>>> +uint64_t size;
>>> +uint32_t sectorsize;
>>> +} add_cow_header;
>>
>> QEMU_PACKED
> Sorry, what does QEMU_PACKED mean?
This is an on-disk structure, so you need to pack the structure.
Otherwise the compiler would be free to add padding between the fields
in order to optimise alignment.
struct add_cow_header {
...
} QEMU_PACKED add_cow_header;
Hm, actually, do you really want to declare a global variable here? Or
is a typedef missing? Also, coding style requires the struct name to be
spelled AddCowHeader.
Kevin
[Qemu-devel] Fwd: Re: ahci doesn't work with qemu emulation
Guys, could you please take a look at the following patch for qemu ahci emulation? The patch is from the FreeBSD AHCI developer/maintainer. If it looks OK, then we will submit it according to the rules. Thank you! Original Message Sender: Alexander Motin Message-ID: <4e6cc7c1.9050...@freebsd.org> Date: Sun, 11 Sep 2011 17:37:53 +0300 From: Alexander Motin To: Andriy Gapon CC: FreeBSD-Current Subject: Re: ahci doesn't work with qemu emulation References: <4e632972.7080...@freebsd.org> In-Reply-To: <4e632972.7080...@freebsd.org> Hi. On 04.09.2011 10:32, Andriy Gapon wrote: > ahcich0: Timeout on slot 0 port 0 > ahcich0: is 0005 cs ss rs 0001 tfd 50 serr > cmd 1000c017 > ahcich0: AHCI reset... > ahcich0: SATA connect time=0us status=0113 > ahcich0: AHCI reset: device found > ahcich0: AHCI reset: device ready after 0ms > (aprobe0:ahcich0:0:0:0): ATA_IDENTIFY. ACB: ec 00 00 00 00 40 00 00 00 00 00 > 00 > (aprobe0:ahcich0:0:0:0): CAM status: Command timeout > (aprobe0:ahcich0:0:0:0): SIGNATURE: > > I guess that this is a problem with the emulation - some unsupported command > or > reliance on some specific behavior of a driver (e.g. a Linux driver), but > still > would be nice to have it working for testing / experimentation purposes. > > Example of how a disk behind an AHCI controller can be specified to > qemu-devel: > qemu-system-x86_64 ... -drive id=disk,file=disk.img,if=none -device > ahci,id=ahci > -device ide-drive,drive=disk,bus=ahci.0 I've reproduced the problem. I believe the problem is in QEMU's AHCI emulation. As I see, it clears port's Interrupt Enable register each time when reset of any level happens. Is is reasonable for the global controller reset. It is probably not good, but acceptable for our driver for the port hard reset. But it is IMO wrong for the device soft reset. None of real hardware I know behaves that way. This patch to QEMU fixes the problem for me: http://people.freebsd.org/~mav/qemu.ahci.patch This patch workarounds the problem from the FreeBSD side: http://people.freebsd.org/~mav/qemu.ahci.freebsd.patch , but I would prefer to see problem solved from the QEMU side. -- Alexander Motin
Re: [Qemu-devel] [PATCH 00/15] Sparc AREG0 conversion
On 09/12/2011 07:26 AM, Paolo Bonzini wrote: > On 09/11/2011 03:29 PM, Blue Swirl wrote: >> After this patch set, only load and store op helpers remain in >> op_helper.c. I have some patches for those but they need more thought. > > Have you benchmarked it? Asking for a benchmark without full conversion is pointless. r~
Re: [Qemu-devel] [PATCH 0/2] improve qemu-img conversion performance
Am 12.09.2011 05:17, schrieb Yehuda Sadeh Weinraub: > On Sun, Sep 11, 2011 at 8:14 PM, Sage Weil wrote: >> On Fri, 9 Sep 2011, Kevin Wolf wrote: >>> Am 08.09.2011 18:36, schrieb Sage Weil: On Thu, 8 Sep 2011, Kevin Wolf wrote: > Am 08.09.2011 01:06, schrieb Yehuda Sadeh: >> The following set of patches improve the qemu-img conversion process >> performance. When using a higher latency backend, small writes have a >> severe impact on the time it takes to do image conversion. >> We switch to using async writes, and we avoid splitting writes due to >> holes when the holes are small enough. >> >> Yehuda Sadeh (2): >> qemu-img: async write to block device when converting image >> qemu-img: don't skip writing small holes >> >> qemu-img.c | 34 +++--- >> 1 files changed, 27 insertions(+), 7 deletions(-) >> > > This doesn't seem to be against git master or the block tree. Please > rebase. > > I think that commit a22f123c may obsolete your patch 2/2. With git.kernel.org down, where should I be looking for the latest upstream? >>> >>> qemu has never been on kernel.org. The interesting repositories for you are: >>> >>> * Upstream: git://git.qemu.org/qemu.git master >>> * Block development branch: git://repo.or.cz/qemu/kevin.git block >> >> Oh right. I've been working from qemu-kvm.git. >> >> I've done some (still minimal) testing, and it looks like the combination >> of a22f123c and the new writeback/flush stuff in librbd gets the same >> result as doing async io explicitly from qemu-img.c. Want to take a look, >> Yehuda? It still defaults to off, so you'll need to add >> rbd_writeback_window=800 or similar to the rbd device string. >> > > I'll take a look. I do have a rebased version for the qemu-img async > patch, and I think qemu can benefit from that anyway. Yes, I agree that the change makes sense anyway. Kevin
Re: [Qemu-devel] [PATCH 00/15] Sparc AREG0 conversion
On 09/12/2011 10:01 AM, Richard Henderson wrote: > > After this patch set, only load and store op helpers remain in > > op_helper.c. I have some patches for those but they need more thought. > > Have you benchmarked it? Asking for a benchmark without full conversion is pointless. Agreed. But I would not push these patches without having tried them out on a prototype of a full conversion (i.e. with the load/store helpers converted, for which Blue Swirl said he has patches, and with the environment not pinned to AREG0 in TCG code). So I hoped that he did have such a prototype, or alternatively that he benchmarked them and showed only minor degradations. Paolo
Re: [Qemu-devel] [PATCH] qcow2: align cluster_data to block to improve performance using O_DIRECT
Am 10.09.2011 10:59, schrieb Frediano Ziglio: > Signed-off-by: Frediano Ziglio > --- > block/qcow2.c | 14 +++--- > 1 files changed, 7 insertions(+), 7 deletions(-) Thanks, applied to the block branch. Kevin
Re: [Qemu-devel] AHCI Port Interrupt Enable register cleaning on soft reset
Alexander Graf wrote:
> Am 11.09.2011 um 16:43 schrieb Alexander Motin :
>> I've found that FreeBSD AHCI driver doesn't work with AHCI hardware
>> emulation of QEMU 0.15.0. I believe the problem is on QEMU's side. As I
>> see, it clears port's Interrupt Enable register each time when reset of
>> any level happens. Is is reasonable for the global controller reset. It
>> is probably not good, but acceptable for FreeBSD driver for the port
>> hard reset. But it is IMO wrong for the device soft reset. None of real
>> hardware I know behaves that way.
>>
>> This patch fixes the problem for me:
>> http://people.freebsd.org/~mav/qemu.ahci.patch
>
> Ah, cool! So FreeBSD works with AHCI using this patch?
Yes. I haven't done deep testing to guarantee there is no other issues,
but at least disk is properly detected now.
> Please send it again as an inline patch (if really really hard not 100%
> important) and add a signed-off-by line (very important) to the patch.
OK. Here it is:
Signed-off-by: Alexander Motin
--- hw/ide/ahci.c.prev 2011-09-11 16:39:53.0 +0300
+++ hw/ide/ahci.c 2011-09-11 16:39:48.0 +0300
@@ -505,10 +505,7 @@ static void ahci_reset_port(AHCIState *s
ide_bus_reset(&d->port);
ide_state->ncq_queues = AHCI_MAX_CMDS;
-pr->irq_stat = 0;
-pr->irq_mask = 0;
pr->scr_stat = 0;
-pr->scr_ctl = 0;
pr->scr_err = 0;
pr->scr_act = 0;
d->busy_slot = -1;
@@ -1157,12 +1154,17 @@ void ahci_uninit(AHCIState *s)
void ahci_reset(void *opaque)
{
struct AHCIPCIState *d = opaque;
+AHCIPortRegs *pr;
int i;
d->ahci.control_regs.irqstatus = 0;
d->ahci.control_regs.ghc = 0;
for (i = 0; i < d->ahci.ports; i++) {
+pr = &d->ahci.dev[i].port_regs;
+pr->irq_stat = 0;
+pr->irq_mask = 0;
+pr->scr_ctl = 0;
ahci_reset_port(&d->ahci, i);
}
}
--
Alexander Motin
Re: [Qemu-devel] [PATCH 11/15] Sparc: avoid AREG0 for CWP and PSTATE helpers
On Sun, Sep 11, 2011 at 01:31:03PM +, Blue Swirl wrote: > Make CWP and PSTATE helpers take a parameter for CPUState instead > of relying on global env. Move the functions to helper.c, remove > wrapper functions. > > Signed-off-by: Blue Swirl > --- > Makefile.target |2 +- > target-sparc/helper.h | 32 +++--- > target-sparc/translate.c | 34 > target-sparc/win_helper.c | 223 +++- > 4 files changed, 90 insertions(+), 201 deletions(-) This doesn't seem to move anything into helper.c. Looks like it might not build, either? Cheers, -- Stuart Brady
[Qemu-devel] [PATCH] hw/omap_gpmc: Don't try to map CS0 twice on reset
Remove a spurious second map of the OMAP GPMC CS0 region on reset. This fixes an assertion failure when we try to add the region to its container when it was already added. (The old code did not complain about mismatched map/unmap calls, but the new MemoryRegion implementation does.) Signed-off-by: Peter Maydell --- hw/omap_gpmc.c |1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/hw/omap_gpmc.c b/hw/omap_gpmc.c index 922d622..673 100644 --- a/hw/omap_gpmc.c +++ b/hw/omap_gpmc.c @@ -135,7 +135,6 @@ void omap_gpmc_reset(struct omap_gpmc_s *s) s->cs_file[i].config[6] & 0x1f,/* MASKADDR */ (s->cs_file[i].config[6] >> 8 & 0xf)); /* BASEADDR */ } -omap_gpmc_cs_map(s->cs_file, 0, 0xf); s->ecc_cs = 0; s->ecc_ptr = 0; s->ecc_cfg = 0x3fcff000; -- 1.7.1
Re: [Qemu-devel] [PATCH] qcow2: fix range check
Am 10.09.2011 10:23, schrieb Frediano Ziglio:
> QCowL2Meta::offset is not cluster aligned but only sector aligned
> however nb_clusters count cluster from cluster start.
> This fix range check. Note that old code have no corruption issues
> related to this check cause it only cause intersection to occur
> when shouldn't.
Are you sure? See below. (I think it doesn't corrupt the image, but for
a different reason)
>
> Signed-off-by: Frediano Ziglio
> ---
> block/qcow2-cluster.c | 14 +++---
> 1 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c
> index 428b5ad..2f76311 100644
> --- a/block/qcow2-cluster.c
> +++ b/block/qcow2-cluster.c
> @@ -776,17 +776,17 @@ again:
> */
> QLIST_FOREACH(old_alloc, &s->cluster_allocs, next_in_flight) {
>
> -uint64_t end_offset = offset + nb_clusters * s->cluster_size;
> -uint64_t old_offset = old_alloc->offset;
> -uint64_t old_end_offset = old_alloc->offset +
> -old_alloc->nb_clusters * s->cluster_size;
> +uint64_t start = offset >> s->cluster_bits;
> +uint64_t end = start + nb_clusters;
> +uint64_t old_start = old_alloc->offset >> s->cluster_bits;
> +uint64_t old_end = old_start + old_alloc->nb_clusters;
>
> -if (end_offset < old_offset || offset > old_end_offset) {
> +if (end < old_start || start > old_end) {
> /* No intersection */
Consider request A from 0x0 + 0x1000 bytes and request B from 0x2000 +
0x1000 bytes. Both touch the same cluster and therefore should be
serialised, but 0x2000 > 0x1000, so we decided here that there is no
intersection and we don't have to care.
Note that this doesn't corrupt the image, qcow2 can handle parallel
requests allocating the same cluster. In qcow2_alloc_cluster_link_l2()
we get an additional COW operation, so performance will be hurt, but
correctness is maintained.
> } else {
> -if (offset < old_offset) {
> +if (start < old_start) {
> /* Stop at the start of a running allocation */
> -nb_clusters = (old_offset - offset) >> s->cluster_bits;
> +nb_clusters = old_start - start;
> } else {
> nb_clusters = 0;
> }
Anyway, the patch looks good. Applied to the block branch.
Kevin
[Qemu-devel] [Bug 847638] [NEW] screendump broken for text mode
Public bug reported: I use Qemu 0.15.0 (via a FreeBSD qemu-devel-0.15.0 port) and observe the following problem with the screendump command. Environment: - qemu started with a standard vga adapter emulation (not sure if this important) - SDL interface is used (not sure if this important) - guest operating system uses the text mode - monitor console is activated with Ctrl+Alt+2 - screendump command is executed in the monitor console I observe the following effects in this case: - contents of the guest screen is "dumped" over the monitoring console - produced ppm file has only a single top-most line (of characters) from the guest screen It seems that the problem is caused in the vga_draw_text function in hw/vga.c. The problem is that the dpy_update function is called for each line of text and only the first of such calls produces the ppm output. Perhaps in the case when full_update is true there should only be a single dpy_update call for the whole screen. I think that this should produce a complete screen dump. Not sure if that would help with the guest screen contents being draw over the monitor console. The code seems to be unchanged in the latest git version. ** Affects: qemu Importance: Undecided Status: New -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/847638 Title: screendump broken for text mode Status in QEMU: New Bug description: I use Qemu 0.15.0 (via a FreeBSD qemu-devel-0.15.0 port) and observe the following problem with the screendump command. Environment: - qemu started with a standard vga adapter emulation (not sure if this important) - SDL interface is used (not sure if this important) - guest operating system uses the text mode - monitor console is activated with Ctrl+Alt+2 - screendump command is executed in the monitor console I observe the following effects in this case: - contents of the guest screen is "dumped" over the monitoring console - produced ppm file has only a single top-most line (of characters) from the guest screen It seems that the problem is caused in the vga_draw_text function in hw/vga.c. The problem is that the dpy_update function is called for each line of text and only the first of such calls produces the ppm output. Perhaps in the case when full_update is true there should only be a single dpy_update call for the whole screen. I think that this should produce a complete screen dump. Not sure if that would help with the guest screen contents being draw over the monitor console. The code seems to be unchanged in the latest git version. To manage notifications about this bug go to: https://bugs.launchpad.net/qemu/+bug/847638/+subscriptions
Re: [Qemu-devel] [PATCH] hw/omap_gpmc: Don't try to map CS0 twice on reset
On 12 September 2011 09:33, Peter Maydell wrote: > Remove a spurious second map of the OMAP GPMC CS0 region on reset. > This fixes an assertion failure when we try to add the region to > its container when it was already added. (The old code did not > complain about mismatched map/unmap calls, but the new MemoryRegion > implementation does.) Whoops; please ignore this, it's an old patch which I accidentally resubmitted due to a fumble-fingered moment at the shell prompt and the git-send-email command being in my shell history... -- PMM
Re: [Qemu-devel] [PATCH] memory: simple memory tree printer
On 09/11/2011 11:31 PM, Blue Swirl wrote: Add a monitor command 'info mtree' to show the memory hierarchy. Does this turn the memory hierarchy into an ABI? It shouldn't. Things like BARs are immutable but if a BAR is internally composed of several regions, well that's no one's business. I originally wanted to implement this via a gdb script. This works even when all you have is a core dump. But I can see it's useful on a live system. -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH] memory: simple memory tree printer
On 2011-09-12 10:46, Avi Kivity wrote: > On 09/11/2011 11:31 PM, Blue Swirl wrote: >> Add a monitor command 'info mtree' to show the memory hierarchy. >> > > Does this turn the memory hierarchy into an ABI? It shouldn't. Things > like BARs are immutable but if a BAR is internally composed of several > regions, well that's no one's business. "info mtree" falls into the same category as "info qtree" or "device_show": they expose useful but unstable internal structures. But they also only exist for the human monitor, so their output is not an ABI by our definition. Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux
Re: [Qemu-devel] [PATCH] Add iSCSI support for QEMU
Am 10.09.2011 06:23, schrieb Ronnie Sahlberg: > List, > > Please find a patch that adds built-in iSCSI support to QEMU when built and > linked against the multiplatform iscsi initiator library at > git://github.com/sahlberg/libiscsi.git > > All previous comments and suggestions have been addressed in this patch. > > I and others have done extensive testing and used this patch extensively over > the last ~6 months with great result. > > > In some situations, using a built-in iscsi inititator has benefits against > mounting the LUNs on the host. > > * Privacy: The iSCSI LUNs are private to the guest and are not visible either > to the host, nor to any processes running on the host. > * Ease of managment : If you have very many guests and very many, thousands > of, iSCSI LUNs. It is inconvenient to have to expose all LUNs to the > underlying host. > * No root requirement. Since the iSCSI LUNs are not mounted as devices on the > host, ordinary users can set up and use iSCSI resources without the need for > root privilege on the host to map the devices to local scsi devices. > > > Please merge this patch to master or explain how I should change the patch so > that it becomes acceptable for inclusion into QEMU. Orit, I think you could be interested in reviewing this patch? Kevin
Re: [Qemu-devel] [PATCH] hw/lan9118.c: Convert to MemoryRegion
On 09/09/2011 07:47 PM, Peter Maydell wrote: Ping? On 25 August 2011 18:59, Peter Maydell wrote: > Signed-off-by: Peter Maydell > --- > Another device I needed to convert so I could connect it to omap_gpmc > for an omap3 board (in this case overo). > Sorry - applied to memory/queue. -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH] memory: simple memory tree printer
On 2011-09-12 08:43, Richard Henderson wrote: > On 09/11/2011 09:31 PM, Blue Swirl wrote: >> Field 'offset' is always zero, maybe that is not interesting. Will it >> become one day? > > It's not always zero, but only used by certain devices. I do not see any users, neither upstream nor in Avi's tree. To my (semi-)understanding, offset should correlate to region_offset of cpu_register_physical_memory_offset: legacy device models require this to be 0 as they expect an absolute memory address passed to their handler, in contrast to a normal one that is relative to the regions base. But I do not see how the memory region offset actually helps here. Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux
Re: [Qemu-devel] [PATCH] PPC: Fix via-cuda memory registration
On 09/11/2011 02:38 PM, Alexander Graf wrote: Am 11.09.2011 um 12:41 schrieb Avi Kivity: > On 09/08/2011 07:54 PM, Alexander Graf wrote: >> PS: Please test your patches. This one could have been found with an invocation >> as simple as "qemu-system-ppc". We boot into the OpenBIOS prompt by default, >> so you wouldn't even have required a guest image or kernel. >> > > > Sorry about that. > > Note that it's pretty hard to test these patches. I often don't even know which binary as the device->target relationship is not immediately visible, The patch was explicitly to convert ppc ;). Yes, in this case. Not in the general case. > and I don't really know what to expect from the guest. The very easy check-fundamentals thing to do for ppc is to execute qemu-system-ppc without arguments. It should drop you into an OF prompt. Both memory api bugs on ppc I've seen now would have been exposed with that. I agree that we should have something slightly more sophisticated, but doing such a bare minimum test is almost for free to the tester and covers at least basic functionality :). I don't mind people introducibg subtle bugs in corner cases - these things happen. But an abort() when you execute the binary? That really shouldn't happen ever. This one is almost as bad. Yeah. > It would be best if we had a kvm-autotest testset for tcg, it would probably run in just a few minutes and increase confidence in these patches. Yeah, I am using kvm-autotest today for regression testing, but it's very hard to tell it to run multiple different binaries. The target program variable can only be set for an execution job, making it impossible to run multiple targets in one autotest run. Probably best to tell autotest about the directory, and let it pick up the binary. Still need some configuration to choose between qemu-kvm and qemu-system-x86_64. Lucas? Also, not all targets implement enough functionality for autotest. The e500 machine for example doesn't support power off - real hw doesn't either. So we always have to kill the vm exposing potential data loss. 'quit' from the monitor should cause any data loss. You can get the guest to sync by telling it via ssh (or just ignore the guest - who cares?) But that's probably gone by now with cache=unsafe fixed with your previous patches :). However that means that a simple test run takes quite a while already thanks to timeouts. Why should you have any timeouts? Sample the screen until you reach the desired state, or perhaps ssh into the guest and test things, then (qemu) quit. -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH] memory: simple memory tree printer
On 09/12/2011 12:01 PM, Jan Kiszka wrote:
On 2011-09-12 08:43, Richard Henderson wrote:
> On 09/11/2011 09:31 PM, Blue Swirl wrote:
>> Field 'offset' is always zero, maybe that is not interesting. Will it
>> become one day?
>
> It's not always zero, but only used by certain devices.
I do not see any users, neither upstream nor in Avi's tree.
There aren't.
To my (semi-)understanding, offset should correlate to region_offset of
cpu_register_physical_memory_offset: legacy device models require this
to be 0 as they expect an absolute memory address passed to their
handler, in contrast to a normal one that is relative to the regions
base. But I do not see how the memory region offset actually helps here.
mr->offset is added to the address in memory_region_{read,write}_thunk_n().
--
error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH] memory: simple memory tree printer
On 09/12/2011 11:53 AM, Jan Kiszka wrote: On 2011-09-12 10:46, Avi Kivity wrote: > On 09/11/2011 11:31 PM, Blue Swirl wrote: >> Add a monitor command 'info mtree' to show the memory hierarchy. >> > > Does this turn the memory hierarchy into an ABI? It shouldn't. Things > like BARs are immutable but if a BAR is internally composed of several > regions, well that's no one's business. "info mtree" falls into the same category as "info qtree" or "device_show": they expose useful but unstable internal structures. But they also only exist for the human monitor, so their output is not an ABI by our definition. Fair enough. -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH] This patch adds a new block driver : iSCSI
On Sat, Sep 10, 2011 at 02:23:30PM +1000, Ronnie Sahlberg wrote:
Looking good. I think this is worth merging because it does offer
benefits over host iSCSI.
> +static void
> +iscsi_abort_task_cb(struct iscsi_context *iscsi, int status, void
> *command_data,
> +void *private_data)
> +{
> +}
> +
> +static void
> +iscsi_aio_cancel(BlockDriverAIOCB *blockacb)
> +{
> +IscsiAIOCB *acb = (IscsiAIOCB *)blockacb;
> +IscsiLun *iscsilun = acb->iscsilun;
> +
> +acb->status = -ECANCELED;
> +acb->common.cb(acb->common.opaque, acb->status);
> +acb->canceled = 1;
> +
> +iscsi_task_mgmt_abort_task_async(iscsilun->iscsi, acb->task,
> + iscsi_abort_task_cb, NULL);
> +}
The asynchronous abort task call looks odd. If a caller allocates a
buffer and issues a read request, then we need to make sure that the
request is really aborted by the time .bdrv_aio_cancel() returns.
If I understand the code correctly, iscsi_aio_cancel() returns
immediately but the read request will still be in progress. That means
the caller could now free their data buffer and the read request will
overwrite that unallocated memory.
> +static void
> +iscsi_aio_write10_cb(struct iscsi_context *iscsi, int status,
> + void *command_data, void *opaque)
> +{
> +IscsiAIOCB *acb = opaque;
> +
> +trace_iscsi_aio_write10_cb(iscsi, status, acb, acb->canceled);
> +
> +if (acb->buf != NULL) {
> +free(acb->buf);
> +}
Please just use g_free(acb->buf). g_free(NULL) is defined as a nop so
the check isn't necessary. Also, this code uses free(3) when it should
use g_free(3).
> +
> +if (acb->canceled != 0) {
> +qemu_aio_release(acb);
> +scsi_free_scsi_task(acb->task);
> +acb->task = NULL;
> +return;
> +}
> +
> +acb->status = 0;
> +if (status < 0) {
> +error_report("Failed to write10 data to iSCSI lun. %s",
> + iscsi_get_error(iscsi));
> +acb->status = -EIO;
> +}
> +
> +iscsi_schedule_bh(iscsi_readv_writev_bh_cb, acb);
> +scsi_free_scsi_task(acb->task);
> +acb->task = NULL;
> +}
> +
> +static int64_t sector_qemu2lun(int64_t sector, IscsiLun *iscsilun)
> +{
> +return sector * BDRV_SECTOR_SIZE / iscsilun->block_size;
> +}
> +
> +static BlockDriverAIOCB *
> +iscsi_aio_writev(BlockDriverState *bs, int64_t sector_num,
> + QEMUIOVector *qiov, int nb_sectors,
> + BlockDriverCompletionFunc *cb,
> + void *opaque)
> +{
> +IscsiLun *iscsilun = bs->opaque;
> +struct iscsi_context *iscsi = iscsilun->iscsi;
> +IscsiAIOCB *acb;
> +size_t size;
> +int fua = 0;
> +
> +/* set FUA on writes when cache mode is write through */
> +if (!(bs->open_flags & (BDRV_O_CACHE_WB|BDRV_O_NOCACHE))) {
> +fua = 1;
> +}
FUA needs to reflect the guest semantics - does this disk have an
enabled write cache? When bs->open_flags has BDRV_O_CACHE_WB, then the
guest knows it needs to send flushes because there is a write cache:
if (!(bs->open_flags & BDRV_O_CACHE_WB)) {
fua = 1;
}
BDRV_O_NOCACHE is just for local files and sets the O_DIRECT hint. It
doesn't affect the cache semantics that the guest sees.
> +/*
> + * We support iscsi url's on the form
> + * iscsi://[%@][:]//
> + */
> +static int iscsi_open(BlockDriverState *bs, const char *filename, int flags)
> +{
> +IscsiLun *iscsilun = bs->opaque;
> +struct iscsi_context *iscsi = NULL;
> +struct iscsi_url *iscsi_url = NULL;
> +struct IscsiTask task;
> +int ret;
> +
> +if ((BDRV_SECTOR_SIZE % 512) != 0) {
> +error_report("iSCSI: Invalid BDRV_SECTOR_SIZE. "
> + "BDRV_SECTOR_SIZE(%lld) is not a multiple "
> + "of 512", BDRV_SECTOR_SIZE);
> +return -EINVAL;
> +}
Another way of saying this is:
QEMU_BUILD_BUG_ON(BDRV_SECTOR_SIZE % 512 != 0);
The advantage is that the build fails instead of waiting until iscsi is
used at runtime until the failure is detected.
What will happen if BDRV_SECTOR_SIZE is not a multiple of 512?
> +
> +memset(iscsilun, 0, sizeof(IscsiLun));
> +
> +/* Should really append the KVM name after the ':' here */
> +iscsi = iscsi_create_context("iqn.2008-11.org.linux-kvm:");
> +if (iscsi == NULL) {
> +error_report("iSCSI: Failed to create iSCSI context.");
> +ret = -ENOMEM;
> +goto failed;
> +}
> +
> +iscsi_url = iscsi_parse_full_url(iscsi, filename);
> +if (iscsi_url == NULL) {
> +error_report("Failed to parse URL : %s %s", filename,
> + iscsi_get_error(iscsi));
> +ret = -ENOMEM;
-EINVAL?
> +static BlockDriver bdrv_iscsi = {
> +.format_name = "iscsi",
> +.protocol_name = "iscsi",
> +
> +.instance_size = sizeof(IscsiLun),
> +.bdrv_file_open = iscsi_open,
> +.bdrv_close = iscsi_close,
> +
> +.bdrv_getlength
[Qemu-devel] [PATCH] block: emulate .bdrv_flush() using .bdrv_aio_flush()
Block drivers typically have two copies of the flush operation: a
synchronous .bdrv_flush() and an asynchronous .bdrv_aio_flush(). This
patch applies the same emulation that we already do for
.bdrv_read()/.bdrv_write() to .bdrv_flush(). Now block drivers only
need to provide either .bdrv_aio_flush() or, in the case of legacy
drivers, .bdrv_flush().
Signed-off-by: Stefan Hajnoczi
---
block.c | 31 +++
block/blkdebug.c |6 --
block/blkverify.c |9 -
block/qcow.c |6 --
block/qcow2.c | 19 ---
block/qed.c |6 --
block/raw-posix.c | 11 ---
7 files changed, 27 insertions(+), 61 deletions(-)
diff --git a/block.c b/block.c
index a8c789a..4992d98 100644
--- a/block.c
+++ b/block.c
@@ -59,6 +59,7 @@ static int bdrv_read_em(BlockDriverState *bs, int64_t
sector_num,
uint8_t *buf, int nb_sectors);
static int bdrv_write_em(BlockDriverState *bs, int64_t sector_num,
const uint8_t *buf, int nb_sectors);
+static int bdrv_flush_em(BlockDriverState *bs);
static BlockDriverAIOCB *bdrv_co_aio_readv_em(BlockDriverState *bs,
int64_t sector_num, QEMUIOVector *qiov, int nb_sectors,
BlockDriverCompletionFunc *cb, void *opaque);
@@ -205,8 +206,11 @@ void bdrv_register(BlockDriver *bdrv)
}
}
-if (!bdrv->bdrv_aio_flush)
+if (!bdrv->bdrv_aio_flush) {
bdrv->bdrv_aio_flush = bdrv_aio_flush_em;
+} else if (!bdrv->bdrv_flush) {
+bdrv->bdrv_flush = bdrv_flush_em;
+}
QLIST_INSERT_HEAD(&bdrv_drivers, bdrv, list);
}
@@ -2848,7 +2852,7 @@ static BlockDriverAIOCB
*bdrv_aio_noop_em(BlockDriverState *bs,
/**/
/* sync block device emulation */
-static void bdrv_rw_em_cb(void *opaque, int ret)
+static void bdrv_em_cb(void *opaque, int ret)
{
*(int *)opaque = ret;
}
@@ -2868,7 +2872,7 @@ static int bdrv_read_em(BlockDriverState *bs, int64_t
sector_num,
iov.iov_len = nb_sectors * BDRV_SECTOR_SIZE;
qemu_iovec_init_external(&qiov, &iov, 1);
acb = bdrv_aio_readv(bs, sector_num, &qiov, nb_sectors,
-bdrv_rw_em_cb, &async_ret);
+bdrv_em_cb, &async_ret);
if (acb == NULL) {
async_ret = -1;
goto fail;
@@ -2896,7 +2900,26 @@ static int bdrv_write_em(BlockDriverState *bs, int64_t
sector_num,
iov.iov_len = nb_sectors * BDRV_SECTOR_SIZE;
qemu_iovec_init_external(&qiov, &iov, 1);
acb = bdrv_aio_writev(bs, sector_num, &qiov, nb_sectors,
-bdrv_rw_em_cb, &async_ret);
+bdrv_em_cb, &async_ret);
+if (acb == NULL) {
+async_ret = -1;
+goto fail;
+}
+while (async_ret == NOT_DONE) {
+qemu_aio_wait();
+}
+
+fail:
+return async_ret;
+}
+
+static int bdrv_flush_em(BlockDriverState *bs)
+{
+int async_ret;
+BlockDriverAIOCB *acb;
+
+async_ret = NOT_DONE;
+acb = bdrv_aio_flush(bs, bdrv_em_cb, &async_ret);
if (acb == NULL) {
async_ret = -1;
goto fail;
diff --git a/block/blkdebug.c b/block/blkdebug.c
index b3c5d42..9b88535 100644
--- a/block/blkdebug.c
+++ b/block/blkdebug.c
@@ -397,11 +397,6 @@ static void blkdebug_close(BlockDriverState *bs)
}
}
-static int blkdebug_flush(BlockDriverState *bs)
-{
-return bdrv_flush(bs->file);
-}
-
static BlockDriverAIOCB *blkdebug_aio_flush(BlockDriverState *bs,
BlockDriverCompletionFunc *cb, void *opaque)
{
@@ -454,7 +449,6 @@ static BlockDriver bdrv_blkdebug = {
.bdrv_file_open = blkdebug_open,
.bdrv_close = blkdebug_close,
-.bdrv_flush = blkdebug_flush,
.bdrv_aio_readv = blkdebug_aio_readv,
.bdrv_aio_writev= blkdebug_aio_writev,
diff --git a/block/blkverify.c b/block/blkverify.c
index c7522b4..483f3b3 100644
--- a/block/blkverify.c
+++ b/block/blkverify.c
@@ -116,14 +116,6 @@ static void blkverify_close(BlockDriverState *bs)
s->test_file = NULL;
}
-static int blkverify_flush(BlockDriverState *bs)
-{
-BDRVBlkverifyState *s = bs->opaque;
-
-/* Only flush test file, the raw file is not important */
-return bdrv_flush(s->test_file);
-}
-
static int64_t blkverify_getlength(BlockDriverState *bs)
{
BDRVBlkverifyState *s = bs->opaque;
@@ -368,7 +360,6 @@ static BlockDriver bdrv_blkverify = {
.bdrv_file_open = blkverify_open,
.bdrv_close = blkverify_close,
-.bdrv_flush = blkverify_flush,
.bdrv_aio_readv = blkverify_aio_readv,
.bdrv_aio_writev= blkverify_aio_writev,
diff --git a/block/qcow.c b/block/qcow.c
index c8bfecc..9b71116 100644
--- a/block/qcow.c
+++ b/block/qcow.c
@@ -781,11 +781,6 @@ static int qcow_write_compressed(BlockDriverState *bs,
int64_t sector_num,
return 0;
}
-static int qcow_flush(BlockDriverState *bs)
-{
-return bdrv_flush(bs->file);
-}
-
static BlockDriverAIOCB *qcow_aio_flu
Re: [Qemu-devel] [PATCH 12/15] qapi: add change-vnc-listen (v2)
On Fri, Sep 02, 2011 at 05:50:05PM -0300, Luiz Capitulino wrote:
> On Fri, 2 Sep 2011 12:34:55 -0500
> Anthony Liguori wrote:
>
> > New QMP only command to change the VNC server's listening address.
> >
> > Signed-off-by: Anthony Liguori
> > ---
> > v1 -> v2
> > - Enhanced docs (Luiz)
> > ---
> > qapi-schema.json | 15 +++
> > qmp-commands.hx |8
> > qmp.c|7 +++
> > 3 files changed, 30 insertions(+), 0 deletions(-)
> >
> > diff --git a/qapi-schema.json b/qapi-schema.json
> > index 350cf1c..0c6c9b8 100644
> > --- a/qapi-schema.json
> > +++ b/qapi-schema.json
> > @@ -109,3 +109,18 @@
> > # string. Existing clients are unaffected by executing this
> > command.
> > ##
> > { 'command': 'change-vnc-password', 'data': {'password': 'str'} }
> > +
> > +##
> > +# @change-vnc-listen:
> > +#
> > +# Change the host that the VNC server listens on.
> > +#
> > +# @target: the new server specification to listen on
> > +#
> > +# Since: 1.0
> > +#
> > +# Notes: At this moment in time, the behavior of existing client
> > connections
> > +# when this command is executed is undefined. The authentication
> > +# settings may change after executing this command.
>
> It seems to completely disable authentication. At least when using
> password auth. I'd be very clear about that.
That is really bad, since even if we have another command to set the
authentication mode, this creates a designed-in race condition. To be
securely race-free, we need to be able to set the desired auth mode
first, and then change the listen address without it affecting auth.
change-vnc-auth tls
change-vnc-listen 123.2.3.5:5901
If we really want vnc-listen to have possible side-effects on auth,
then we need to be able to put the VNC server in an offline mode
while making a sequence of configuration changes eg, something like
change-vnc-status offline
change-vnc-listen 123.2.3.5:5901
change-vnc-auth tls
change-vnc-status online
No incoming client connections would be allowed while it is offline
Regards,
Daniel
--
|: http://berrange.com -o-http://www.flickr.com/photos/dberrange/ :|
|: http://libvirt.org -o- http://virt-manager.org :|
|: http://autobuild.org -o- http://search.cpan.org/~danberr/ :|
|: http://entangle-photo.org -o- http://live.gnome.org/gtk-vnc :|
Re: [Qemu-devel] [Qemu-trivial] [PATCH] qemu-doc: Remove URL which is no longer available
On Mon, Sep 12, 2011 at 12:04 AM, Andreas Färber wrote: > Am 11.09.2011 um 22:39 schrieb Alexander Graf: > >> Am 10.09.2011 um 23:09 schrieb Stefan Weil : >> >>> http://perso.magic.fr/l_indien/ was removed several years ago. >>> There is obviously no mirror or any other replacement for it. >> >> I would prefer to see the sources in a public git repo and to have >> ppc_rom.bin rebuilt from that. IIUC Andreas is already working on this. > > Yes, I set up http://repo.or.cz/w/openhackware.git today. > > We'll look into the build and the patches referenced by Blue over the next > days. > > @Stefan H.: Please disregard this patch, I intend to supply an alternative > one. If we urgently need to apply a change, we should at least keep the URL > where it was formerly accessible, so that the interested reader has a chance > to look it up in the Internet Archive. Okay, ignoring this one for now. Stefan
Re: [Qemu-devel] [PATCH] memory: simple memory tree printer
On 2011-09-12 11:11, Avi Kivity wrote:
> On 09/12/2011 12:01 PM, Jan Kiszka wrote:
>> On 2011-09-12 08:43, Richard Henderson wrote:
>>> On 09/11/2011 09:31 PM, Blue Swirl wrote:
Field 'offset' is always zero, maybe that is not interesting. Will it
become one day?
>>>
>>> It's not always zero, but only used by certain devices.
>>
>> I do not see any users, neither upstream nor in Avi's tree.
>
> There aren't.
>
>> To my (semi-)understanding, offset should correlate to region_offset of
>> cpu_register_physical_memory_offset: legacy device models require this
>> to be 0 as they expect an absolute memory address passed to their
>> handler, in contrast to a normal one that is relative to the regions
>> base. But I do not see how the memory region offset actually helps here.
>>
>
> mr->offset is added to the address in memory_region_{read,write}_thunk_n().
Ah, ok.
So the default address passed to the handler is now already relative? I
think we should keep it like this for all converted devices, ie. take
the chance, fix the remaining models, and drop the offset.
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
Re: [Qemu-devel] unable to access the serial port on the Vm
I sent before noticing that your email dropped qemu-devel@nongnu.org from the CC list again. Please use Reply-All when responding on mailing lists. That way the mailing list stays CCed and others can contribute to the discussion. On Mon, Sep 12, 2011 at 10:25 AM, Stefan Hajnoczi wrote: > On Mon, Sep 12, 2011 at 10:08 AM, bala suru wrote: >> This is what I got when I run the "ps aux | grep qemu" >> root 4748 3.1 0.6 122208 25032 ? Sl 11:52 5:13 >> /usr/bin/kvm -S -M pc-0.12 -enable-kvm -m 64 -smp 1 -name one-26 -uuid >> 16025c13-421f-143c-563b-07661fa59fe3 -nographic -chardev >> socket,id=monitor,path=/var/lib/libvirt/qemu/one-26.monitor,server,nowait >> -monitor chardev:monitor -no-acpi -boot c -drive >> file=/srv/cloud/one/var//26/images/disk.0,if=ide,index=0,boot=on,format=raw >> -net nic,macaddr=02:00:c0:a8:7a:07,vlan=0,name=nic.0 -net >> tap,fd=29,vlan=0,name=tap.0 -serial none -parallel none -usb >> oneadmin 8137 0.0 0.0 3324 788 pts/1 S+ 14:36 0:00 grep qemu >> >> Still I have not understood that "Normally the emulated serial port can be >> redirected to your current >> terminal by launching qemu with "-serial stdio" How to make this through >> qemu . > > Thanks for posting the ps output. The reason why your serial is not > working is because libvirt is starting QEMU with "-serial none". That > means your virtual machine does not have an emulated serial port. > > You can fix this from virt-manager by editing the virtual machine > Details | Add Hardware | Serial and setting Device Type to Pseudo TTY > (pty). Then it should be possible to view the serial console while > the VM is running. > > If you want to use virsh instead of virt-manager, check for the domain > XML syntax here: > http://libvirt.org/formatdomain.html#elementsConsole > > Stefan >
Re: [Qemu-devel] [PATCH 12/15] qapi: add change-vnc-listen (v2)
On Mon, Sep 12, 2011 at 10:17:21AM +0100, Daniel P. Berrange wrote:
> On Fri, Sep 02, 2011 at 05:50:05PM -0300, Luiz Capitulino wrote:
> > On Fri, 2 Sep 2011 12:34:55 -0500
> > Anthony Liguori wrote:
> >
> > > New QMP only command to change the VNC server's listening address.
> > >
> > > Signed-off-by: Anthony Liguori
> > > ---
> > > v1 -> v2
> > > - Enhanced docs (Luiz)
> > > ---
> > > qapi-schema.json | 15 +++
> > > qmp-commands.hx |8
> > > qmp.c|7 +++
> > > 3 files changed, 30 insertions(+), 0 deletions(-)
> > >
> > > diff --git a/qapi-schema.json b/qapi-schema.json
> > > index 350cf1c..0c6c9b8 100644
> > > --- a/qapi-schema.json
> > > +++ b/qapi-schema.json
> > > @@ -109,3 +109,18 @@
> > > # string. Existing clients are unaffected by executing this
> > > command.
> > > ##
> > > { 'command': 'change-vnc-password', 'data': {'password': 'str'} }
> > > +
> > > +##
> > > +# @change-vnc-listen:
> > > +#
> > > +# Change the host that the VNC server listens on.
> > > +#
> > > +# @target: the new server specification to listen on
> > > +#
> > > +# Since: 1.0
> > > +#
> > > +# Notes: At this moment in time, the behavior of existing client
> > > connections
> > > +# when this command is executed is undefined. The authentication
> > > +# settings may change after executing this command.
> >
> > It seems to completely disable authentication. At least when using
> > password auth. I'd be very clear about that.
>
> That is really bad, since even if we have another command to set the
> authentication mode, this creates a designed-in race condition. To be
> securely race-free, we need to be able to set the desired auth mode
> first, and then change the listen address without it affecting auth.
>
> change-vnc-auth tls
> change-vnc-listen 123.2.3.5:5901
On closer inspection, I see that 'change-vnc-listen' just accepts the
full string with encoded options, that is used for the '-vnc' command
line. I thought that for QMP we going to make sure we didn't use any
encoded strings, and gave each option a dedicated parameter ?
eg instead of:
{ 'command': 'change-vnc-password', 'data': {'target': 'str'} }
Wouldn't we want something like:
{ 'command': 'change-vnc-password', 'data': {
'listen': bool,/* Whether to listen, or do a reverse connection */
'address': 'str',
'port': 'int',
'password': 'string',
'sasl': bool,
'tls': bool,
'x509': bool,
'lossy': bool,
'no-lock-key-sync': bool,
...
}
}
At which point we could also make '-vnc' use qemu-config for its option
parsing ?
Or is your idea that we just do the more straightforward QMP command for
change-vnc-listen now, with the view that everything will be changed for
the future QEMU Object model rewrite ?
Daniel
--
|: http://berrange.com -o-http://www.flickr.com/photos/dberrange/ :|
|: http://libvirt.org -o- http://virt-manager.org :|
|: http://autobuild.org -o- http://search.cpan.org/~danberr/ :|
|: http://entangle-photo.org -o- http://live.gnome.org/gtk-vnc :|
[Qemu-devel] [PATCH] tcg/arm: Remove unused tcg_out_addi()
Remove the unused function tcg_out_addi() from the ARM TCG backend;
this fixes a compilation failure on ARM hosts with newer gcc.
Signed-off-by: Peter Maydell
---
A previous patch from Richard Henderson for this compile failure:
http://patchwork.ozlabs.org/patch/110400/
was rejected, so here's another go. This simply removes the unused function,
in line with the approach taken for ppc/ppc64 in commits 1a2eb162414 and
c24a9c6ef94.
If this is accepted I can do the equivalent patches for tcg/ia64 and tcg/s390
(although those don't cause compile failures because the unused function
happens to be marked 'inline'.)
tcg/arm/tcg-target.c | 15 ---
1 files changed, 0 insertions(+), 15 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index 93eb0f1..ce4760d 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -1820,21 +1820,6 @@ static inline void tcg_out_st(TCGContext *s, TCGType
type, int arg,
tcg_out_st32(s, COND_AL, arg, arg1, arg2);
}
-static void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
-{
-if (val > 0)
-if (val < 0x100)
-tcg_out_dat_imm(s, COND_AL, ARITH_ADD, reg, reg, val);
-else
-tcg_abort();
-else if (val < 0) {
-if (val > -0x100)
-tcg_out_dat_imm(s, COND_AL, ARITH_SUB, reg, reg, -val);
-else
-tcg_abort();
-}
-}
-
static inline void tcg_out_mov(TCGContext *s, TCGType type, int ret, int arg)
{
tcg_out_dat_reg(s, COND_AL, ARITH_MOV, ret, 0, arg, SHIFT_IMM_LSL(0));
--
1.7.1
Re: [Qemu-devel] [PATCH] PPC: Fix via-cuda memory registration
On 12.09.2011, at 11:07, Avi Kivity wrote: > On 09/11/2011 02:38 PM, Alexander Graf wrote: >> Am 11.09.2011 um 12:41 schrieb Avi Kivity: >> >> > On 09/08/2011 07:54 PM, Alexander Graf wrote: >> >> PS: Please test your patches. This one could have been found with an >> >> invocation >> >> as simple as "qemu-system-ppc". We boot into the OpenBIOS prompt by >> >> default, >> >> so you wouldn't even have required a guest image or kernel. >> >> >> > >> > >> > Sorry about that. >> > >> > Note that it's pretty hard to test these patches. I often don't even >> > know which binary as the device->target relationship is not immediately >> > visible, >> >> The patch was explicitly to convert ppc ;). > > Yes, in this case. Not in the general case. > >> > and I don't really know what to expect from the guest. >> >> The very easy check-fundamentals thing to do for ppc is to execute >> qemu-system-ppc without arguments. It should drop you into an OF prompt. >> Both memory api bugs on ppc I've seen now would have been exposed with that. >> >> I agree that we should have something slightly more sophisticated, but doing >> such a bare minimum test is almost for free to the tester and covers at >> least basic functionality :). I don't mind people introducibg subtle bugs in >> corner cases - these things happen. But an abort() when you execute the >> binary? That really shouldn't happen ever. This one is almost as bad. > > Yeah. > >> > It would be best if we had a kvm-autotest testset for tcg, it would >> > probably run in just a few minutes and increase confidence in these >> > patches. >> >> Yeah, I am using kvm-autotest today for regression testing, but it's very >> hard to tell it to run multiple different binaries. The target program >> variable can only be set for an execution job, making it impossible to run >> multiple targets in one autotest run. > > Probably best to tell autotest about the directory, and let it pick up the > binary. Still need some configuration to choose between qemu-kvm and > qemu-system-x86_64. > > Lucas? > >> >> Also, not all targets implement enough functionality for autotest. The e500 >> machine for example doesn't support power off - real hw doesn't either. So >> we always have to kill the vm exposing potential data loss. > > 'quit' from the monitor should cause any data loss. You can get the guest to > sync by telling it via ssh (or just ignore the guest - who cares?) At least currently we have a qcow2 check in place that fails with this method. That could just be a bug however. > >> But that's probably gone by now with cache=unsafe fixed with your previous >> patches :). However that means that a simple test run takes quite a while >> already thanks to timeouts. >> > > Why should you have any timeouts? Sample the screen until you reach the > desired state, or perhaps ssh into the guest and test things, then (qemu) > quit. As an alternative to shutting down the VM? Yes. As a replacement? No, because then we're never testing shutdown on machines that actually do support soft power off. Alex
Re: [Qemu-devel] unable to access the serial port on the Vm
Hi, Sorry for missing out the CC in the previous mail . Can I do this on the running VMs ..?, I'm using opennebula to spawn the VMs, so it would be good if edit before spawning the VMs.. regards Bala On Mon, Sep 12, 2011 at 2:56 PM, Stefan Hajnoczi wrote: > I sent before noticing that your email dropped qemu-devel@nongnu.org > from the CC list again. > > Please use Reply-All when responding on mailing lists. That way the > mailing list stays CCed and others can contribute to the discussion. > > On Mon, Sep 12, 2011 at 10:25 AM, Stefan Hajnoczi > wrote: > > On Mon, Sep 12, 2011 at 10:08 AM, bala suru wrote: > >> This is what I got when I run the "ps aux | grep qemu" > >> root 4748 3.1 0.6 122208 25032 ?Sl 11:52 5:13 > >> /usr/bin/kvm -S -M pc-0.12 -enable-kvm -m 64 -smp 1 -name one-26 -uuid > >> 16025c13-421f-143c-563b-07661fa59fe3 -nographic -chardev > >> > socket,id=monitor,path=/var/lib/libvirt/qemu/one-26.monitor,server,nowait > >> -monitor chardev:monitor -no-acpi -boot c -drive > >> > file=/srv/cloud/one/var//26/images/disk.0,if=ide,index=0,boot=on,format=raw > >> -net nic,macaddr=02:00:c0:a8:7a:07,vlan=0,name=nic.0 -net > >> tap,fd=29,vlan=0,name=tap.0 -serial none -parallel none -usb > >> oneadmin 8137 0.0 0.0 3324 788 pts/1S+ 14:36 0:00 grep > qemu > >> > >> Still I have not understood that "Normally the emulated serial port can > be > >> redirected to your current > >> terminal by launching qemu with "-serial stdio" How to make this through > >> qemu . > > > > Thanks for posting the ps output. The reason why your serial is not > > working is because libvirt is starting QEMU with "-serial none". That > > means your virtual machine does not have an emulated serial port. > > > > You can fix this from virt-manager by editing the virtual machine > > Details | Add Hardware | Serial and setting Device Type to Pseudo TTY > > (pty). Then it should be possible to view the serial console while > > the VM is running. > > > > If you want to use virsh instead of virt-manager, check for the domain > > XML syntax here: > > http://libvirt.org/formatdomain.html#elementsConsole > > > > Stefan > > >
Re: [Qemu-devel] About hotplug multifunction
On Sun, Sep 11, 2011 at 09:51:06PM +0300, Michael S. Tsirkin wrote: > On Sun, Sep 11, 2011 at 12:01:49PM -0300, Marcelo Tosatti wrote: > > On Sun, Sep 11, 2011 at 12:23:57PM +0300, Michael S. Tsirkin wrote: > > > On Fri, Sep 09, 2011 at 03:34:26PM -0300, Marcelo Tosatti wrote: > > > > > > something I noted when readin our acpi code: > > > > > > we currently pass eject request for function 0 only: > > > > > >Name (_ADR, nr##) > > > > > > We either need a device per function there (acpi 1.0), > > > > > > send eject request for them all, or use > > > > > > as function number (newer acpi, not sure which version). > > > > > > Need to see which guests (windows,linux) can handle which form. > > > > > > > > > > I'd guess we need to change that to . > > > > > > > > No need, only make sure function 0 is there and all other functions > > > > should be removed automatically by the guest on eject notification. > > > > > > Hmm, the ACPI spec explicitly says: > > > > > > High word = Device #, Low word = Function #. > > > (e.g., device 3, function 2 is 0x00030002). To refer > > > to all the functions on a device #, use a function > > > number of ). > > > > Right, but this is the _ADR of the device instance in ACPI. > > The communication between QEMU and the ACPI DSL code is all > > based in slots. > > It's easy to extend that if we like though. > > > > > ACPI PCI hotplug is based on slots, not on functions. It does not > > > > support addition/removal of individual functions. > > > > > > Interesting. Is this just based on general logic, > > > reading of the linux driver or the ACPI spec? > > > > Its based on Seabios ACPI DST implementation and its relationship with > > the QEMU implementation in acpi_piix4.c. > > > > > The ACPI spec itself seems pretty vague. All tables > > > list devices, where each device has an _ADR entry, > > > which is built up of PCI device # and function #. > > > > Yes, it is vague. Given the mandate from the PCI spec a device _must > > contain_ function 0, usage (including hotplug/unplug) of individual > > functions other than 0 as separate devices is a no-go. > > It doesn't seem to be a big issue. > We could, for example, keep a stub function 0 around. I suppose the guest will remove all functions of a device once you attempt to hot-unplug a function. What is the problem with adding more PCI buses, instead of multifunction ?
Re: [Qemu-devel] [PATCH] memory: simple memory tree printer
I/O io addr off size 1 -e1000-io addr c000 off size 40 -piix-bmdma-container addr c040 off size 10 --bmdma addr 000c off size 4 --piix-bmdma addr 0008 off size 4 --bmdma addr 0004 off size 4 --piix-bmdma addr off size 4 -pci-conf-data addr 0cfc off size 4 -pci-conf-idx addr 0cf8 off size 4 Could you put the (variable-length) name field last? That should make the whole list more readable as the addresses are aligned then. cheers, Gerd
[Qemu-devel] [PULL 03/28] mips_mipssim: convert to memory API
Signed-off-by: Avi Kivity
---
hw/mips_mipssim.c | 15 ---
1 files changed, 8 insertions(+), 7 deletions(-)
diff --git a/hw/mips_mipssim.c b/hw/mips_mipssim.c
index ac6..7407158 100644
--- a/hw/mips_mipssim.c
+++ b/hw/mips_mipssim.c
@@ -137,8 +137,9 @@ static void mipsnet_init(int base, qemu_irq irq, NICInfo
*nd)
const char *initrd_filename, const char *cpu_model)
{
char *filename;
-ram_addr_t ram_offset;
-ram_addr_t bios_offset;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion *ram = g_new(MemoryRegion, 1);
+MemoryRegion *bios = g_new(MemoryRegion, 1);
CPUState *env;
ResetData *reset_info;
int bios_size;
@@ -162,14 +163,14 @@ static void mipsnet_init(int base, qemu_irq irq, NICInfo
*nd)
qemu_register_reset(main_cpu_reset, reset_info);
/* Allocate RAM. */
-ram_offset = qemu_ram_alloc(NULL, "mips_mipssim.ram", ram_size);
-bios_offset = qemu_ram_alloc(NULL, "mips_mipssim.bios", BIOS_SIZE);
+memory_region_init_ram(ram, NULL, "mips_mipssim.ram", ram_size);
+memory_region_init_ram(bios, NULL, "mips_mipssim.bios", BIOS_SIZE);
+memory_region_set_readonly(bios, true);
-cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
+memory_region_add_subregion(address_space_mem, 0, ram);
/* Map the BIOS / boot exception handler. */
-cpu_register_physical_memory(0x1fc0LL,
- BIOS_SIZE, bios_offset | IO_MEM_ROM);
+memory_region_add_subregion(address_space_mem, 0x1fc0LL, bios);
/* Load a BIOS / boot exception handler image. */
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
--
1.7.6.1
[Qemu-devel] [PULL 26/28] serial: Use enum device_endian in serial_mm_init parameter
From: Richard Henderson
The use of DEVICE_NATIVE_ENDIAN cleans up lots of ifdefs in
many of the callers.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/mips_jazz.c | 14 --
hw/mips_malta.c |7 ++-
hw/musicpal.c| 14 ++
hw/omap_uart.c | 17 ++---
hw/pc.h |2 +-
hw/petalogix_ml605_mmu.c |2 +-
hw/ppc405_uc.c |8
hw/ppc440.c |4 ++--
hw/ppce500_mpc8544ds.c |4 ++--
hw/pxa2xx.c | 33 +
hw/serial.c |4 +---
hw/sm501.c |8 +---
hw/sun4u.c |2 +-
hw/virtex_ml507.c|3 ++-
14 files changed, 38 insertions(+), 84 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 1a9cbeb..8a2026e 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -264,18 +264,12 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Serial ports */
if (serial_hds[0]) {
-#ifdef TARGET_WORDS_BIGENDIAN
-serial_mm_init(0x80006000, 0, rc4030[8], 800/16, serial_hds[0], 1,
1);
-#else
-serial_mm_init(0x80006000, 0, rc4030[8], 800/16, serial_hds[0], 1,
0);
-#endif
+serial_mm_init(0x80006000, 0, rc4030[8], 800/16, serial_hds[0],
+ 1, DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
-#ifdef TARGET_WORDS_BIGENDIAN
-serial_mm_init(0x80007000, 0, rc4030[9], 800/16, serial_hds[1], 1,
1);
-#else
-serial_mm_init(0x80007000, 0, rc4030[9], 800/16, serial_hds[1], 1,
0);
-#endif
+serial_mm_init(0x80007000, 0, rc4030[9], 800/16, serial_hds[1],
+ 1, DEVICE_NATIVE_ENDIAN);
}
/* Parallel port */
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 172f74e..88a3c28 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -446,11 +446,8 @@ static void malta_fpga_led_init(CharDriverState *chr)
s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
-#ifdef TARGET_WORDS_BIGENDIAN
-s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, 1,
1);
-#else
-s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr, 1,
0);
-#endif
+s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr,
+ 1, DEVICE_NATIVE_ENDIAN);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index 9b1f380..e79b07e 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1486,22 +1486,12 @@ static void musicpal_init(ram_addr_t ram_size,
pic[MP_TIMER4_IRQ], NULL);
if (serial_hds[0]) {
-#ifdef TARGET_WORDS_BIGENDIAN
-serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], 1, 1);
-#else
serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], 1, 0);
-#endif
+ serial_hds[0], 1, DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
-#ifdef TARGET_WORDS_BIGENDIAN
-serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], 1, 1);
-#else
serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], 1, 0);
-#endif
+ serial_hds[1], 1, DEVICE_NATIVE_ENDIAN);
}
/* Register flash */
diff --git a/hw/omap_uart.c b/hw/omap_uart.c
index 191a0c2..66696ab 100644
--- a/hw/omap_uart.c
+++ b/hw/omap_uart.c
@@ -60,15 +60,9 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
s->base = base;
s->fclk = fclk;
s->irq = irq;
-#ifdef TARGET_WORDS_BIGENDIAN
s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
chr ?: qemu_chr_new(label, "null", NULL), 1,
- 1);
-#else
-s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
- chr ?: qemu_chr_new(label, "null", NULL), 1,
- 0);
-#endif
+ DEVICE_NATIVE_ENDIAN);
return s;
}
@@ -182,15 +176,8 @@ struct omap_uart_s *omap2_uart_init(struct
omap_target_agent_s *ta,
void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
{
/* TODO: Should reuse or destroy current s->serial */
-#ifdef TARGET_WORDS_BIGENDIAN
-s->serial = serial_mm_init(s->base, 2, s->irq,
- omap_clk_getrate(s->fclk) / 16,
- chr ?: qemu_chr_new("null", "null", NULL), 1,
- 1);
-#else
s->serial = serial_mm_init(s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
chr ?: qemu_chr_new("null", "null", NULL), 1,
-
[Qemu-devel] [PULL 05/28] musicpal: convert to memory API
Signed-off-by: Avi Kivity
---
hw/musicpal.c | 243 +++--
1 files changed, 99 insertions(+), 144 deletions(-)
diff --git a/hw/musicpal.c b/hw/musicpal.c
index ade5a91..9b1f380 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -19,6 +19,7 @@
#include "console.h"
#include "i2c.h"
#include "blockdev.h"
+#include "exec-memory.h"
#define MP_MISC_BASE0x80002000
#define MP_MISC_SIZE0x1000
@@ -142,6 +143,7 @@
typedef struct mv88w8618_eth_state {
SysBusDevice busdev;
+MemoryRegion iomem;
qemu_irq irq;
uint32_t smir;
uint32_t icr;
@@ -260,7 +262,8 @@ static void eth_send(mv88w8618_eth_state *s, int
queue_index)
} while (desc_addr != s->tx_queue[queue_index]);
}
-static uint32_t mv88w8618_eth_read(void *opaque, target_phys_addr_t offset)
+static uint64_t mv88w8618_eth_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
mv88w8618_eth_state *s = opaque;
@@ -302,7 +305,7 @@ static uint32_t mv88w8618_eth_read(void *opaque,
target_phys_addr_t offset)
}
static void mv88w8618_eth_write(void *opaque, target_phys_addr_t offset,
-uint32_t value)
+uint64_t value, unsigned size)
{
mv88w8618_eth_state *s = opaque;
@@ -353,16 +356,10 @@ static void mv88w8618_eth_write(void *opaque,
target_phys_addr_t offset,
}
}
-static CPUReadMemoryFunc * const mv88w8618_eth_readfn[] = {
-mv88w8618_eth_read,
-mv88w8618_eth_read,
-mv88w8618_eth_read
-};
-
-static CPUWriteMemoryFunc * const mv88w8618_eth_writefn[] = {
-mv88w8618_eth_write,
-mv88w8618_eth_write,
-mv88w8618_eth_write
+static const MemoryRegionOps mv88w8618_eth_ops = {
+.read = mv88w8618_eth_read,
+.write = mv88w8618_eth_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
};
static void eth_cleanup(VLANClientState *nc)
@@ -387,10 +384,9 @@ static int mv88w8618_eth_init(SysBusDevice *dev)
sysbus_init_irq(dev, &s->irq);
s->nic = qemu_new_nic(&net_mv88w8618_info, &s->conf,
dev->qdev.info->name, dev->qdev.id, s);
-s->mmio_index = cpu_register_io_memory(mv88w8618_eth_readfn,
- mv88w8618_eth_writefn, s,
- DEVICE_NATIVE_ENDIAN);
-sysbus_init_mmio(dev, MP_ETH_SIZE, s->mmio_index);
+memory_region_init_io(&s->iomem, &mv88w8618_eth_ops, s, "mv88w8618-eth",
+ MP_ETH_SIZE);
+sysbus_init_mmio_region(dev, &s->iomem);
return 0;
}
@@ -444,6 +440,7 @@ static int mv88w8618_eth_init(SysBusDevice *dev)
typedef struct musicpal_lcd_state {
SysBusDevice busdev;
+MemoryRegion iomem;
uint32_t brightness;
uint32_t mode;
uint32_t irqctrl;
@@ -528,7 +525,8 @@ static void musicpal_lcd_gpio_brigthness_in(void *opaque,
int irq, int level)
s->brightness |= level << irq;
}
-static uint32_t musicpal_lcd_read(void *opaque, target_phys_addr_t offset)
+static uint64_t musicpal_lcd_read(void *opaque, target_phys_addr_t offset,
+ unsigned size)
{
musicpal_lcd_state *s = opaque;
@@ -542,7 +540,7 @@ static uint32_t musicpal_lcd_read(void *opaque,
target_phys_addr_t offset)
}
static void musicpal_lcd_write(void *opaque, target_phys_addr_t offset,
- uint32_t value)
+ uint64_t value, unsigned size)
{
musicpal_lcd_state *s = opaque;
@@ -581,29 +579,21 @@ static void musicpal_lcd_write(void *opaque,
target_phys_addr_t offset,
}
}
-static CPUReadMemoryFunc * const musicpal_lcd_readfn[] = {
-musicpal_lcd_read,
-musicpal_lcd_read,
-musicpal_lcd_read
-};
-
-static CPUWriteMemoryFunc * const musicpal_lcd_writefn[] = {
-musicpal_lcd_write,
-musicpal_lcd_write,
-musicpal_lcd_write
+static const MemoryRegionOps musicpal_lcd_ops = {
+.read = musicpal_lcd_read,
+.write = musicpal_lcd_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
};
static int musicpal_lcd_init(SysBusDevice *dev)
{
musicpal_lcd_state *s = FROM_SYSBUS(musicpal_lcd_state, dev);
-int iomemtype;
s->brightness = 7;
-iomemtype = cpu_register_io_memory(musicpal_lcd_readfn,
- musicpal_lcd_writefn, s,
- DEVICE_NATIVE_ENDIAN);
-sysbus_init_mmio(dev, MP_LCD_SIZE, iomemtype);
+memory_region_init_io(&s->iomem, &musicpal_lcd_ops, s,
+ "musicpal-lcd", MP_LCD_SIZE);
+sysbus_init_mmio_region(dev, &s->iomem);
s->ds = graphic_console_init(lcd_refresh, lcd_invalidate,
NULL, NULL, s);
@@ -645,6 +635,7 @@ static int musicpal_lcd_init(SysBusDevice *dev)
typedef struct mv88w8618_pic_state
{
SysBusDevice busdev;
+MemoryRegion iomem;
uint32_t level;
uin
[Qemu-devel] [PULL 06/28] omap1: convert to memory API (part I)
Signed-off-by: Avi Kivity
---
hw/omap.h | 11 ++-
hw/omap1.c| 338 +++-
hw/omap_sx1.c |4 +-
hw/palm.c |4 +-
4 files changed, 203 insertions(+), 154 deletions(-)
diff --git a/hw/omap.h b/hw/omap.h
index d9ab006..eec8f04 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -826,6 +826,14 @@ struct omap_mpu_state_s {
qemu_irq wakeup;
+MemoryRegion ulpd_pm_iomem;
+MemoryRegion pin_cfg_iomem;
+MemoryRegion id_iomem;
+MemoryRegion id_iomem_e18;
+MemoryRegion id_iomem_ed4;
+MemoryRegion id_iomem_e20;
+MemoryRegion mpui_iomem;
+
struct omap_dma_port_if_s {
uint32_t (*read[3])(struct omap_mpu_state_s *s,
target_phys_addr_t offset);
@@ -947,7 +955,8 @@ struct omap_mpu_state_s {
};
/* omap1.c */
-struct omap_mpu_state_s *omap310_mpu_init(unsigned long sdram_size,
+struct omap_mpu_state_s *omap310_mpu_init(MemoryRegion *system_memory,
+unsigned long sdram_size,
const char *core);
/* omap2.c */
diff --git a/hw/omap1.c b/hw/omap1.c
index 614fd31..0f7e14f 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -84,6 +84,7 @@ void omap_badwidth_write32(void *opaque, target_phys_addr_t
addr,
/* MPU OS timers */
struct omap_mpu_timer_s {
+MemoryRegion iomem;
qemu_irq irq;
omap_clk clk;
uint32_t val;
@@ -179,10 +180,15 @@ static void omap_timer_clk_setup(struct omap_mpu_timer_s
*timer)
timer->rate = omap_clk_getrate(timer->clk);
}
-static uint32_t omap_mpu_timer_read(void *opaque, target_phys_addr_t addr)
+static uint64_t omap_mpu_timer_read(void *opaque, target_phys_addr_t addr,
+unsigned size)
{
struct omap_mpu_timer_s *s = (struct omap_mpu_timer_s *) opaque;
+if (size != 4) {
+return omap_badwidth_read32(opaque, addr);
+}
+
switch (addr) {
case 0x00: /* CNTL_TIMER */
return (s->enable << 5) | (s->ptv << 2) | (s->ar << 1) | s->st;
@@ -199,10 +205,14 @@ static uint32_t omap_mpu_timer_read(void *opaque,
target_phys_addr_t addr)
}
static void omap_mpu_timer_write(void *opaque, target_phys_addr_t addr,
-uint32_t value)
+ uint64_t value, unsigned size)
{
struct omap_mpu_timer_s *s = (struct omap_mpu_timer_s *) opaque;
+if (size != 4) {
+return omap_badwidth_write32(opaque, addr, value);
+}
+
switch (addr) {
case 0x00: /* CNTL_TIMER */
omap_timer_sync(s);
@@ -226,16 +236,10 @@ static void omap_mpu_timer_write(void *opaque,
target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const omap_mpu_timer_readfn[] = {
-omap_badwidth_read32,
-omap_badwidth_read32,
-omap_mpu_timer_read,
-};
-
-static CPUWriteMemoryFunc * const omap_mpu_timer_writefn[] = {
-omap_badwidth_write32,
-omap_badwidth_write32,
-omap_mpu_timer_write,
+static const MemoryRegionOps omap_mpu_timer_ops = {
+.read = omap_mpu_timer_read,
+.write = omap_mpu_timer_write,
+.endianness = DEVICE_LITTLE_ENDIAN,
};
static void omap_mpu_timer_reset(struct omap_mpu_timer_s *s)
@@ -250,10 +254,10 @@ static void omap_mpu_timer_reset(struct omap_mpu_timer_s
*s)
s->it_ena = 1;
}
-static struct omap_mpu_timer_s *omap_mpu_timer_init(target_phys_addr_t base,
+static struct omap_mpu_timer_s *omap_mpu_timer_init(MemoryRegion
*system_memory,
+target_phys_addr_t base,
qemu_irq irq, omap_clk clk)
{
-int iomemtype;
struct omap_mpu_timer_s *s = (struct omap_mpu_timer_s *)
g_malloc0(sizeof(struct omap_mpu_timer_s));
@@ -264,9 +268,10 @@ static void omap_mpu_timer_reset(struct omap_mpu_timer_s
*s)
omap_mpu_timer_reset(s);
omap_timer_clk_setup(s);
-iomemtype = cpu_register_io_memory(omap_mpu_timer_readfn,
-omap_mpu_timer_writefn, s, DEVICE_NATIVE_ENDIAN);
-cpu_register_physical_memory(base, 0x100, iomemtype);
+memory_region_init_io(&s->iomem, &omap_mpu_timer_ops, s,
+ "omap-mpu-timer", 0x100);
+
+memory_region_add_subregion(system_memory, base, &s->iomem);
return s;
}
@@ -274,16 +279,22 @@ static void omap_mpu_timer_reset(struct omap_mpu_timer_s
*s)
/* Watchdog timer */
struct omap_watchdog_timer_s {
struct omap_mpu_timer_s timer;
+MemoryRegion iomem;
uint8_t last_wr;
int mode;
int free;
int reset;
};
-static uint32_t omap_wd_timer_read(void *opaque, target_phys_addr_t addr)
+static uint64_t omap_wd_timer_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
struct omap_watchdog_timer_s *s = (struct omap_watchdog_timer_s *) opaque;
+if (size != 2) {
+return omap_badwidth_read16(opaque, addr);
+}
+
switch (addr) {
case 0x00: /* CNTL_TIMER */
return (s->timer.ptv << 9) | (s->timer.ar << 8) |
@@ -301,10 +312,
Re: [Qemu-devel] [PATCH] memory: simple memory tree printer
On 09/12/2011 01:37 PM, Gerd Hoffmann wrote: I/O io addr off size 1 -e1000-io addr c000 off size 40 -piix-bmdma-container addr c040 off size 10 --bmdma addr 000c off size 4 --piix-bmdma addr 0008 off size 4 --bmdma addr 0004 off size 4 --piix-bmdma addr off size 4 -pci-conf-data addr 0cfc off size 4 -pci-conf-idx addr 0cf8 off size 4 Could you put the (variable-length) name field last? That should make the whole list more readable as the addresses are aligned then. Makes sense. Can adopt other features from /proc/iomem - like using start/end instead of start/length - makes it easier to see if an address fits in a range. -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] unable to access the serial port on the Vm
On Mon, Sep 12, 2011 at 03:49:53PM +0530, bala suru wrote: > Can I do this on the running VMs ..?, > I'm using opennebula to spawn the VMs, so it would be good if edit before > spawning the VMs.. I don't think you can do this on a running VM. At the bottom of this page they show how you can add the serial port libvirt domain XML in OpenNebula: http://opennebula.org/documentation:rel2.2:kvmg Stefan
Re: [Qemu-devel] [PATCH] block: emulate .bdrv_flush() using .bdrv_aio_flush()
On 09/12/2011 11:14 AM, Stefan Hajnoczi wrote: Block drivers typically have two copies of the flush operation: a synchronous .bdrv_flush() and an asynchronous .bdrv_aio_flush(). This patch applies the same emulation that we already do for .bdrv_read()/.bdrv_write() to .bdrv_flush(). Now block drivers only need to provide either .bdrv_aio_flush() or, in the case of legacy drivers, .bdrv_flush(). I had the same bug in my nbd improvements series, so thanks. After Kevin merges this and parts 1-7 (or 1-9 even) of that series I'll resend. Paolo
[Qemu-devel] [PULL 22/28] etrax-timer: Convert to MemoryRegion
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Avi Kivity
---
hw/etraxfs_timer.c | 31 ---
1 files changed, 16 insertions(+), 15 deletions(-)
diff --git a/hw/etraxfs_timer.c b/hw/etraxfs_timer.c
index b08e574..57dc739 100644
--- a/hw/etraxfs_timer.c
+++ b/hw/etraxfs_timer.c
@@ -43,6 +43,7 @@
struct etrax_timer {
SysBusDevice busdev;
+MemoryRegion mmio;
qemu_irq irq;
qemu_irq nmi;
@@ -72,7 +73,8 @@ struct etrax_timer {
uint32_t r_masked_intr;
};
-static uint32_t timer_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t
+timer_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct etrax_timer *t = opaque;
uint32_t r = 0;
@@ -239,9 +241,11 @@ static inline void timer_watchdog_update(struct
etrax_timer *t, uint32_t value)
}
static void
-timer_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+timer_write(void *opaque, target_phys_addr_t addr,
+uint64_t val64, unsigned int size)
{
struct etrax_timer *t = opaque;
+uint32_t value = val64;
switch (addr)
{
@@ -281,14 +285,14 @@ static inline void timer_watchdog_update(struct
etrax_timer *t, uint32_t value)
}
}
-static CPUReadMemoryFunc * const timer_read[] = {
-NULL, NULL,
-&timer_readl,
-};
-
-static CPUWriteMemoryFunc * const timer_write[] = {
-NULL, NULL,
-&timer_writel,
+static const MemoryRegionOps timer_ops = {
+.read = timer_read,
+.write = timer_write,
+.endianness = DEVICE_LITTLE_ENDIAN,
+.valid = {
+.min_access_size = 4,
+.max_access_size = 4
+}
};
static void etraxfs_timer_reset(void *opaque)
@@ -307,7 +311,6 @@ static void etraxfs_timer_reset(void *opaque)
static int etraxfs_timer_init(SysBusDevice *dev)
{
struct etrax_timer *t = FROM_SYSBUS(typeof (*t), dev);
-int timer_regs;
t->bh_t0 = qemu_bh_new(timer0_hit, t);
t->bh_t1 = qemu_bh_new(timer1_hit, t);
@@ -319,10 +322,8 @@ static int etraxfs_timer_init(SysBusDevice *dev)
sysbus_init_irq(dev, &t->irq);
sysbus_init_irq(dev, &t->nmi);
-timer_regs = cpu_register_io_memory(timer_read, timer_write, t,
-DEVICE_NATIVE_ENDIAN);
-sysbus_init_mmio(dev, 0x5c, timer_regs);
-
+memory_region_init_io(&t->mmio, &timer_ops, t, "etraxfs-timer", 0x5c);
+sysbus_init_mmio_region(dev, &t->mmio);
qemu_register_reset(etraxfs_timer_reset, t);
return 0;
}
--
1.7.6.1
[Qemu-devel] [PULL 01/28] mips_jazz: convert to memory API
Signed-off-by: Avi Kivity
---
hw/mips_jazz.c | 90
1 files changed, 45 insertions(+), 45 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index f3c9f93..bde9be6 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -52,44 +52,42 @@ static void main_cpu_reset(void *opaque)
cpu_reset(env);
}
-static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr)
+static uint64_t rtc_read(void *opaque, target_phys_addr_t addr, unsigned size)
{
return cpu_inw(0x71);
}
-static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
+static void rtc_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val, unsigned size)
{
cpu_outw(0x71, val & 0xff);
}
-static CPUReadMemoryFunc * const rtc_read[3] = {
-rtc_readb,
-rtc_readb,
-rtc_readb,
+static const MemoryRegionOps rtc_ops = {
+.read = rtc_read,
+.write = rtc_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
};
-static CPUWriteMemoryFunc * const rtc_write[3] = {
-rtc_writeb,
-rtc_writeb,
-rtc_writeb,
-};
-
-static void dma_dummy_writeb(void *opaque, target_phys_addr_t addr, uint32_t
val)
+static uint64_t dma_dummy_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
/* Nothing to do. That is only to ensure that
* the current DMA acknowledge cycle is completed. */
+return 0xff;
}
-static CPUReadMemoryFunc * const dma_dummy_read[3] = {
-NULL,
-NULL,
-NULL,
-};
+static void dma_dummy_write(void *opaque, target_phys_addr_t addr,
+uint64_t val, unsigned size)
+{
+/* Nothing to do. That is only to ensure that
+ * the current DMA acknowledge cycle is completed. */
+}
-static CPUWriteMemoryFunc * const dma_dummy_write[3] = {
-dma_dummy_writeb,
-dma_dummy_writeb,
-dma_dummy_writeb,
+static const MemoryRegionOps dma_dummy_ops = {
+.read = dma_dummy_read,
+.write = dma_dummy_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
};
#define MAGNUM_BIOS_SIZE_MAX 0x7e000
@@ -105,7 +103,7 @@ static void cpu_request_exit(void *opaque, int irq, int
level)
}
static
-void mips_jazz_init (ram_addr_t ram_size,
+void mips_jazz_init (MemoryRegion *address_space, ram_addr_t ram_size,
const char *cpu_model,
enum jazz_model_e jazz_model)
{
@@ -115,7 +113,8 @@ void mips_jazz_init (ram_addr_t ram_size,
qemu_irq *rc4030, *i8259;
rc4030_dma *dmas;
void* rc4030_opaque;
-int s_rtc, s_dma_dummy;
+MemoryRegion *rtc = g_new(MemoryRegion, 1);
+MemoryRegion *dma_dummy = g_new(MemoryRegion, 1);
NICInfo *nd;
DeviceState *dev;
SysBusDevice *sysbus;
@@ -123,8 +122,9 @@ void mips_jazz_init (ram_addr_t ram_size,
DriveInfo *fds[MAX_FD];
qemu_irq esp_reset, dma_enable;
qemu_irq *cpu_exit_irq;
-ram_addr_t ram_offset;
-ram_addr_t bios_offset;
+MemoryRegion *ram = g_new(MemoryRegion, 1);
+MemoryRegion *bios = g_new(MemoryRegion, 1);
+MemoryRegion *bios2 = g_new(MemoryRegion, 1);
/* init CPUs */
if (cpu_model == NULL) {
@@ -143,14 +143,15 @@ void mips_jazz_init (ram_addr_t ram_size,
qemu_register_reset(main_cpu_reset, env);
/* allocate RAM */
-ram_offset = qemu_ram_alloc(NULL, "mips_jazz.ram", ram_size);
-cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
+memory_region_init_ram(ram, NULL, "mips_jazz.ram", ram_size);
+memory_region_add_subregion(address_space, 0, ram);
-bios_offset = qemu_ram_alloc(NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
-cpu_register_physical_memory(0x1fc0LL,
- MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
-cpu_register_physical_memory(0xfff0LL,
- MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
+memory_region_init_ram(bios, NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
+memory_region_set_readonly(bios, true);
+memory_region_init_alias(bios2, "mips_jazz.bios", bios,
+ 0, MAGNUM_BIOS_SIZE);
+memory_region_add_subregion(address_space, 0x1fc0LL, bios);
+memory_region_add_subregion(address_space, 0xfff0LL, bios);
/* load the BIOS image. */
if (bios_name == NULL)
@@ -175,9 +176,8 @@ void mips_jazz_init (ram_addr_t ram_size,
/* Chipset */
rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas);
-s_dma_dummy = cpu_register_io_memory(dma_dummy_read, dma_dummy_write, NULL,
- DEVICE_NATIVE_ENDIAN);
-cpu_register_physical_memory(0x8000d000, 0x1000, s_dma_dummy);
+memory_region_init_io(dma_dummy, &dma_dummy_ops, NULL, "dummy_dma",
0x1000);
+memory_region_add_subregion(address_space, 0x8000d000, dma_dummy);
/* ISA devices */
i8259 = i8259_init(env->irq[4]);
@@ -203,10 +203,11 @@ void mips_jazz_init (
[Qemu-devel] [PULL 23/28] etrax-dma: Convert to MemoryRegion
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Avi Kivity
---
hw/etraxfs_dma.c | 43 +++
1 files changed, 27 insertions(+), 16 deletions(-)
diff --git a/hw/etraxfs_dma.c b/hw/etraxfs_dma.c
index e8ad9e6..03a623b 100644
--- a/hw/etraxfs_dma.c
+++ b/hw/etraxfs_dma.c
@@ -24,6 +24,7 @@
#include
#include
#include "hw.h"
+#include "exec-memory.h"
#include "qemu-common.h"
#include "sysemu.h"
@@ -185,7 +186,7 @@ struct fs_dma_channel
struct fs_dma_ctrl
{
- int map;
+ MemoryRegion mmio;
int nr_channels;
struct fs_dma_channel *channels;
@@ -562,13 +563,17 @@ static uint32_t dma_rinvalid (void *opaque,
target_phys_addr_t addr)
return 0;
}
-static uint32_t
-dma_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t
+dma_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct fs_dma_ctrl *ctrl = opaque;
int c;
uint32_t r = 0;
+ if (size != 4) {
+ dma_rinvalid(opaque, addr);
+ }
+
/* Make addr relative to this channel and bounded to nr regs. */
c = fs_channel(addr);
addr &= 0xff;
@@ -608,11 +613,17 @@ static uint32_t dma_rinvalid (void *opaque,
target_phys_addr_t addr)
}
static void
-dma_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+dma_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val64, unsigned int size)
{
struct fs_dma_ctrl *ctrl = opaque;
+ uint32_t value = val64;
int c;
+ if (size != 4) {
+ dma_winvalid(opaque, addr, value);
+ }
+
/* Make addr relative to this channel and bounded to nr regs. */
c = fs_channel(addr);
addr &= 0xff;
@@ -668,16 +679,14 @@ static uint32_t dma_rinvalid (void *opaque,
target_phys_addr_t addr)
}
}
-static CPUReadMemoryFunc * const dma_read[] = {
- &dma_rinvalid,
- &dma_rinvalid,
- &dma_readl,
-};
-
-static CPUWriteMemoryFunc * const dma_write[] = {
- &dma_winvalid,
- &dma_winvalid,
- &dma_writel,
+static const MemoryRegionOps dma_ops = {
+ .read = dma_read,
+ .write = dma_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
+ .valid = {
+ .min_access_size = 1,
+ .max_access_size = 4
+ }
};
static int etraxfs_dmac_run(void *opaque)
@@ -750,7 +759,9 @@ static void DMA_run(void *opaque)
ctrl->nr_channels = nr_channels;
ctrl->channels = g_malloc0(sizeof ctrl->channels[0] * nr_channels);
- ctrl->map = cpu_register_io_memory(dma_read, dma_write, ctrl,
DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, nr_channels * 0x2000, ctrl->map);
+ memory_region_init_io(&ctrl->mmio, &dma_ops, ctrl, "etraxfs-dma",
+ nr_channels * 0x2000);
+ memory_region_add_subregion(get_system_memory(), base, &ctrl->mmio);
+
return ctrl;
}
--
1.7.6.1
Re: [Qemu-devel] [PATCH 2/2] mipsnet: use trace framework
On 09/04/2011 10:29 PM, Hervé Poussineau wrote: > +mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " > val=0x%" PRIx64 This breaks the build, though actually it is because of a bug in the parser. It should be written as mipsnet_write(uint64_t addr, uint64_t val) "write addr=0x%" PRIx64 " val=0x%" PRIx64 "" Paolo
[Qemu-devel] [PULL 25/28] serial: Convert serial_mm_init to MemoryRegion
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/serial.c | 145 +--
1 files changed, 31 insertions(+), 114 deletions(-)
diff --git a/hw/serial.c b/hw/serial.c
index 2e6d212..310bfde 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -28,6 +28,7 @@
#include "pc.h"
#include "qemu-timer.h"
#include "sysemu.h"
+#include "exec-memory.h"
//#define DEBUG_SERIAL
@@ -153,11 +154,11 @@ struct SerialState {
int poll_msl;
struct QEMUTimer *modem_status_poll;
+MemoryRegion io;
};
typedef struct ISASerialState {
ISADevice dev;
-MemoryRegion io;
uint32_t index;
uint32_t iobase;
uint32_t isairq;
@@ -786,8 +787,8 @@ static int serial_isa_initfn(ISADevice *dev)
serial_init_core(s);
qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 3);
-memory_region_init_io(&isa->io, &serial_io_ops, s, "serial", 8);
-isa_register_ioport(dev, &isa->io, isa->iobase);
+memory_region_init_io(&s->io, &serial_io_ops, s, "serial", 8);
+isa_register_ioport(dev, &s->io, isa->iobase);
return 0;
}
@@ -821,115 +822,37 @@ static int serial_isa_initfn(ISADevice *dev)
}
/* Memory mapped interface */
-static uint32_t serial_mm_readb(void *opaque, target_phys_addr_t addr)
-{
-SerialState *s = opaque;
-
-return serial_ioport_read(s, addr >> s->it_shift) & 0xFF;
-}
-
-static void serial_mm_writeb(void *opaque, target_phys_addr_t addr,
- uint32_t value)
-{
-SerialState *s = opaque;
-
-serial_ioport_write(s, addr >> s->it_shift, value & 0xFF);
-}
-
-static uint32_t serial_mm_readw_be(void *opaque, target_phys_addr_t addr)
-{
-SerialState *s = opaque;
-uint32_t val;
-
-val = serial_ioport_read(s, addr >> s->it_shift) & 0x;
-val = bswap16(val);
-return val;
-}
-
-static uint32_t serial_mm_readw_le(void *opaque, target_phys_addr_t addr)
-{
-SerialState *s = opaque;
-uint32_t val;
-
-val = serial_ioport_read(s, addr >> s->it_shift) & 0x;
-return val;
-}
-
-static void serial_mm_writew_be(void *opaque, target_phys_addr_t addr,
-uint32_t value)
-{
-SerialState *s = opaque;
-
-value = bswap16(value);
-serial_ioport_write(s, addr >> s->it_shift, value & 0x);
-}
-
-static void serial_mm_writew_le(void *opaque, target_phys_addr_t addr,
-uint32_t value)
-{
-SerialState *s = opaque;
-
-serial_ioport_write(s, addr >> s->it_shift, value & 0x);
-}
-
-static uint32_t serial_mm_readl_be(void *opaque, target_phys_addr_t addr)
-{
-SerialState *s = opaque;
-uint32_t val;
-
-val = serial_ioport_read(s, addr >> s->it_shift);
-val = bswap32(val);
-return val;
-}
-
-static uint32_t serial_mm_readl_le(void *opaque, target_phys_addr_t addr)
-{
-SerialState *s = opaque;
-uint32_t val;
-
-val = serial_ioport_read(s, addr >> s->it_shift);
-return val;
-}
-
-static void serial_mm_writel_be(void *opaque, target_phys_addr_t addr,
-uint32_t value)
+static uint64_t serial_mm_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
SerialState *s = opaque;
-
-value = bswap32(value);
-serial_ioport_write(s, addr >> s->it_shift, value);
+return serial_ioport_read(s, addr >> s->it_shift);
}
-static void serial_mm_writel_le(void *opaque, target_phys_addr_t addr,
-uint32_t value)
+static void serial_mm_write(void *opaque, target_phys_addr_t addr,
+uint64_t value, unsigned size)
{
SerialState *s = opaque;
-
+value &= ~0u >> (32 - (size * 8));
serial_ioport_write(s, addr >> s->it_shift, value);
}
-static CPUReadMemoryFunc * const serial_mm_read_be[] = {
-&serial_mm_readb,
-&serial_mm_readw_be,
-&serial_mm_readl_be,
-};
-
-static CPUWriteMemoryFunc * const serial_mm_write_be[] = {
-&serial_mm_writeb,
-&serial_mm_writew_be,
-&serial_mm_writel_be,
-};
-
-static CPUReadMemoryFunc * const serial_mm_read_le[] = {
-&serial_mm_readb,
-&serial_mm_readw_le,
-&serial_mm_readl_le,
-};
-
-static CPUWriteMemoryFunc * const serial_mm_write_le[] = {
-&serial_mm_writeb,
-&serial_mm_writew_le,
-&serial_mm_writel_le,
+static const MemoryRegionOps serial_mm_ops[3] = {
+[DEVICE_NATIVE_ENDIAN] = {
+.read = serial_mm_read,
+.write = serial_mm_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
+},
+[DEVICE_LITTLE_ENDIAN] = {
+.read = serial_mm_read,
+.write = serial_mm_write,
+.endianness = DEVICE_LITTLE_ENDIAN,
+},
+[DEVICE_BIG_ENDIAN] = {
+.read = serial_mm_read,
+.write = serial_mm_write,
+.endianness = DEVICE_BIG_ENDIAN,
+},
};
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
@@ -938,7 +861,7 @@ st
[Qemu-devel] [PULL 21/28] etrax-ser: Convert to MemoryRegion
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Avi Kivity
---
hw/etraxfs_ser.c | 33 ++---
1 files changed, 18 insertions(+), 15 deletions(-)
diff --git a/hw/etraxfs_ser.c b/hw/etraxfs_ser.c
index 0036037..298b985 100644
--- a/hw/etraxfs_ser.c
+++ b/hw/etraxfs_ser.c
@@ -47,6 +47,7 @@
struct etrax_serial
{
SysBusDevice busdev;
+MemoryRegion mmio;
CharDriverState *chr;
qemu_irq irq;
@@ -73,7 +74,8 @@ static void ser_update_irq(struct etrax_serial *s)
qemu_set_irq(s->irq, !!s->regs[R_MASKED_INTR]);
}
-static uint32_t ser_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t
+ser_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct etrax_serial *s = opaque;
D(CPUState *env = s->env);
@@ -108,10 +110,12 @@ static uint32_t ser_readl (void *opaque,
target_phys_addr_t addr)
}
static void
-ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+ser_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val64, unsigned int size)
{
struct etrax_serial *s = opaque;
-unsigned char ch = value;
+uint32_t value = val64;
+unsigned char ch = val64;
D(CPUState *env = s->env);
D(qemu_log("%s " TARGET_FMT_plx "=%x\n", __func__, addr, value));
@@ -142,14 +146,14 @@ static uint32_t ser_readl (void *opaque,
target_phys_addr_t addr)
ser_update_irq(s);
}
-static CPUReadMemoryFunc * const ser_read[] = {
-NULL, NULL,
-&ser_readl,
-};
-
-static CPUWriteMemoryFunc * const ser_write[] = {
-NULL, NULL,
-&ser_writel,
+static const MemoryRegionOps ser_ops = {
+.read = ser_read,
+.write = ser_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
+.valid = {
+.min_access_size = 4,
+.max_access_size = 4
+}
};
static void serial_receive(void *opaque, const uint8_t *buf, int size)
@@ -207,12 +211,11 @@ static void etraxfs_ser_reset(DeviceState *d)
static int etraxfs_ser_init(SysBusDevice *dev)
{
struct etrax_serial *s = FROM_SYSBUS(typeof (*s), dev);
-int ser_regs;
sysbus_init_irq(dev, &s->irq);
-ser_regs = cpu_register_io_memory(ser_read, ser_write, s,
- DEVICE_NATIVE_ENDIAN);
-sysbus_init_mmio(dev, R_MAX * 4, ser_regs);
+memory_region_init_io(&s->mmio, &ser_ops, s, "etraxfs-serial", R_MAX * 4);
+sysbus_init_mmio_region(dev, &s->mmio);
+
s->chr = qdev_init_chardev(&dev->qdev);
if (s->chr)
qemu_chr_add_handlers(s->chr,
--
1.7.6.1
Re: [Qemu-devel] [PATCH] block: emulate .bdrv_flush() using .bdrv_aio_flush()
On 09/12/2011 11:14 AM, Stefan Hajnoczi wrote:
Block drivers typically have two copies of the flush operation: a
synchronous .bdrv_flush() and an asynchronous .bdrv_aio_flush(). This
patch applies the same emulation that we already do for
.bdrv_read()/.bdrv_write() to .bdrv_flush(). Now block drivers only
need to provide either .bdrv_aio_flush() or, in the case of legacy
drivers, .bdrv_flush().
Signed-off-by: Stefan Hajnoczi
---
block.c | 31 +++
block/blkdebug.c |6 --
block/blkverify.c |9 -
block/qcow.c |6 --
block/qcow2.c | 19 ---
block/qed.c |6 --
block/raw-posix.c | 11 ---
7 files changed, 27 insertions(+), 61 deletions(-)
diff --git a/block.c b/block.c
index a8c789a..4992d98 100644
--- a/block.c
+++ b/block.c
@@ -59,6 +59,7 @@ static int bdrv_read_em(BlockDriverState *bs, int64_t
sector_num,
uint8_t *buf, int nb_sectors);
static int bdrv_write_em(BlockDriverState *bs, int64_t sector_num,
const uint8_t *buf, int nb_sectors);
+static int bdrv_flush_em(BlockDriverState *bs);
static BlockDriverAIOCB *bdrv_co_aio_readv_em(BlockDriverState *bs,
int64_t sector_num, QEMUIOVector *qiov, int nb_sectors,
BlockDriverCompletionFunc *cb, void *opaque);
@@ -205,8 +206,11 @@ void bdrv_register(BlockDriver *bdrv)
}
}
-if (!bdrv->bdrv_aio_flush)
+if (!bdrv->bdrv_aio_flush) {
bdrv->bdrv_aio_flush = bdrv_aio_flush_em;
+} else if (!bdrv->bdrv_flush) {
+bdrv->bdrv_flush = bdrv_flush_em;
+}
QLIST_INSERT_HEAD(&bdrv_drivers, bdrv, list);
}
@@ -2848,7 +2852,7 @@ static BlockDriverAIOCB
*bdrv_aio_noop_em(BlockDriverState *bs,
/**/
/* sync block device emulation */
-static void bdrv_rw_em_cb(void *opaque, int ret)
+static void bdrv_em_cb(void *opaque, int ret)
{
*(int *)opaque = ret;
}
@@ -2868,7 +2872,7 @@ static int bdrv_read_em(BlockDriverState *bs, int64_t
sector_num,
iov.iov_len = nb_sectors * BDRV_SECTOR_SIZE;
qemu_iovec_init_external(&qiov,&iov, 1);
acb = bdrv_aio_readv(bs, sector_num,&qiov, nb_sectors,
-bdrv_rw_em_cb,&async_ret);
+bdrv_em_cb,&async_ret);
if (acb == NULL) {
async_ret = -1;
goto fail;
@@ -2896,7 +2900,26 @@ static int bdrv_write_em(BlockDriverState *bs, int64_t
sector_num,
iov.iov_len = nb_sectors * BDRV_SECTOR_SIZE;
qemu_iovec_init_external(&qiov,&iov, 1);
acb = bdrv_aio_writev(bs, sector_num,&qiov, nb_sectors,
-bdrv_rw_em_cb,&async_ret);
+bdrv_em_cb,&async_ret);
+if (acb == NULL) {
+async_ret = -1;
+goto fail;
+}
+while (async_ret == NOT_DONE) {
+qemu_aio_wait();
+}
+
+fail:
+return async_ret;
+}
+
+static int bdrv_flush_em(BlockDriverState *bs)
+{
+int async_ret;
+BlockDriverAIOCB *acb;
+
+async_ret = NOT_DONE;
+acb = bdrv_aio_flush(bs, bdrv_em_cb,&async_ret);
if (acb == NULL) {
async_ret = -1;
goto fail;
diff --git a/block/blkdebug.c b/block/blkdebug.c
index b3c5d42..9b88535 100644
--- a/block/blkdebug.c
+++ b/block/blkdebug.c
@@ -397,11 +397,6 @@ static void blkdebug_close(BlockDriverState *bs)
}
}
-static int blkdebug_flush(BlockDriverState *bs)
-{
-return bdrv_flush(bs->file);
-}
-
static BlockDriverAIOCB *blkdebug_aio_flush(BlockDriverState *bs,
BlockDriverCompletionFunc *cb, void *opaque)
{
@@ -454,7 +449,6 @@ static BlockDriver bdrv_blkdebug = {
.bdrv_file_open = blkdebug_open,
.bdrv_close = blkdebug_close,
-.bdrv_flush = blkdebug_flush,
.bdrv_aio_readv = blkdebug_aio_readv,
.bdrv_aio_writev= blkdebug_aio_writev,
diff --git a/block/blkverify.c b/block/blkverify.c
index c7522b4..483f3b3 100644
--- a/block/blkverify.c
+++ b/block/blkverify.c
@@ -116,14 +116,6 @@ static void blkverify_close(BlockDriverState *bs)
s->test_file = NULL;
}
-static int blkverify_flush(BlockDriverState *bs)
-{
-BDRVBlkverifyState *s = bs->opaque;
-
-/* Only flush test file, the raw file is not important */
-return bdrv_flush(s->test_file);
-}
-
static int64_t blkverify_getlength(BlockDriverState *bs)
{
BDRVBlkverifyState *s = bs->opaque;
@@ -368,7 +360,6 @@ static BlockDriver bdrv_blkverify = {
.bdrv_file_open = blkverify_open,
.bdrv_close = blkverify_close,
-.bdrv_flush = blkverify_flush,
.bdrv_aio_readv = blkverify_aio_readv,
.bdrv_aio_writev= blkverify_aio_writev,
diff --git a/block/qcow.c b/block/qcow.c
index c8bfecc..9b71116 100644
--- a/block/qcow.c
+++ b/block/qcow.c
@@ -781,11 +781,6 @@ static int qcow_write_compressed(BlockDriverState *bs,
int64_t sector_num,
return 0;
}
-static int qcow_flush(BlockDriverState
Re: [Qemu-devel] unable to access the serial port on the Vm
Hi, Thanks for the help , Now I could do cat /dev/ttyS0 , no error . it runs well . But I need to connect a some USB device which will create a virtual serialport called /dev/ttyACM0, I cloud not see this on the Vm running .. This XML format I used RAW = [ type = "kvm", data = "" ] Have I missed out anything ..? regards Bala On Mon, Sep 12, 2011 at 4:24 PM, Stefan Hajnoczi wrote: > On Mon, Sep 12, 2011 at 03:49:53PM +0530, bala suru wrote: > > Can I do this on the running VMs ..?, > > I'm using opennebula to spawn the VMs, so it would be good if edit before > > spawning the VMs.. > > I don't think you can do this on a running VM. > > At the bottom of this page they show how you can add the serial port > libvirt domain XML in OpenNebula: > http://opennebula.org/documentation:rel2.2:kvmg > > Stefan >
[Qemu-devel] [PULL 15/28] i8259: Convert to MemoryRegion
From: Richard Henderson
The only non-obvious part is pic_poll_read which used
"addr1 >> 7" to detect whether one referred to either
the master or slave PIC. Instead, test this directly.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/i8259.c | 65 ++-
1 files changed, 46 insertions(+), 19 deletions(-)
diff --git a/hw/i8259.c b/hw/i8259.c
index c0b96ab..e5323ff 100644
--- a/hw/i8259.c
+++ b/hw/i8259.c
@@ -59,6 +59,8 @@
uint8_t elcr; /* PIIX edge/trigger selection*/
uint8_t elcr_mask;
PicState2 *pics_state;
+MemoryRegion base_io;
+MemoryRegion elcr_io;
} PicState;
struct PicState2 {
@@ -284,13 +286,15 @@ static void pic_reset(void *opaque)
/* Note: ELCR is not reset */
}
-static void pic_ioport_write(void *opaque, uint32_t addr, uint32_t val)
+static void pic_ioport_write(void *opaque, target_phys_addr_t addr64,
+ uint64_t val64, unsigned size)
{
PicState *s = opaque;
+uint32_t addr = addr64;
+uint32_t val = val64;
int priority, cmd, irq;
DPRINTF("write: addr=0x%02x val=0x%02x\n", addr, val);
-addr &= 1;
if (addr == 0) {
if (val & 0x10) {
/* init */
@@ -374,19 +378,21 @@ static void pic_ioport_write(void *opaque, uint32_t addr,
uint32_t val)
}
}
-static uint32_t pic_poll_read (PicState *s, uint32_t addr1)
+static uint32_t pic_poll_read(PicState *s)
{
int ret;
ret = pic_get_irq(s);
if (ret >= 0) {
-if (addr1 >> 7) {
+bool slave = (s == &isa_pic->pics[1]);
+
+if (slave) {
s->pics_state->pics[0].isr &= ~(1 << 2);
s->pics_state->pics[0].irr &= ~(1 << 2);
}
s->irr &= ~(1 << ret);
s->isr &= ~(1 << ret);
-if (addr1 >> 7 || ret != 2)
+if (slave || ret != 2)
pic_update_irq(s->pics_state);
} else {
ret = 0x07;
@@ -396,16 +402,15 @@ static uint32_t pic_poll_read (PicState *s, uint32_t
addr1)
return ret;
}
-static uint32_t pic_ioport_read(void *opaque, uint32_t addr1)
+static uint64_t pic_ioport_read(void *opaque, target_phys_addr_t addr1,
+unsigned size)
{
PicState *s = opaque;
-unsigned int addr;
+unsigned int addr = addr1;
int ret;
-addr = addr1;
-addr &= 1;
if (s->poll) {
-ret = pic_poll_read(s, addr1);
+ret = pic_poll_read(s);
s->poll = 0;
} else {
if (addr == 0) {
@@ -417,7 +422,7 @@ static uint32_t pic_ioport_read(void *opaque, uint32_t
addr1)
ret = s->imr;
}
}
-DPRINTF("read: addr=0x%02x val=0x%02x\n", addr1, ret);
+DPRINTF("read: addr=0x%02x val=0x%02x\n", addr, ret);
return ret;
}
@@ -427,22 +432,24 @@ uint32_t pic_intack_read(PicState2 *s)
{
int ret;
-ret = pic_poll_read(&s->pics[0], 0x00);
+ret = pic_poll_read(&s->pics[0]);
if (ret == 2)
-ret = pic_poll_read(&s->pics[1], 0x80) + 8;
+ret = pic_poll_read(&s->pics[1]) + 8;
/* Prepare for ISR read */
s->pics[0].read_reg_select = 1;
return ret;
}
-static void elcr_ioport_write(void *opaque, uint32_t addr, uint32_t val)
+static void elcr_ioport_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val, unsigned size)
{
PicState *s = opaque;
s->elcr = val & s->elcr_mask;
}
-static uint32_t elcr_ioport_read(void *opaque, uint32_t addr1)
+static uint64_t elcr_ioport_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
PicState *s = opaque;
return s->elcr;
@@ -474,15 +481,35 @@ static uint32_t elcr_ioport_read(void *opaque, uint32_t
addr1)
}
};
+static const MemoryRegionOps pic_base_ioport_ops = {
+.read = pic_ioport_read,
+.write = pic_ioport_write,
+.impl = {
+.min_access_size = 1,
+.max_access_size = 1,
+},
+};
+
+static const MemoryRegionOps pic_elcr_ioport_ops = {
+.read = elcr_ioport_read,
+.write = elcr_ioport_write,
+.impl = {
+.min_access_size = 1,
+.max_access_size = 1,
+},
+};
+
/* XXX: add generic master/slave system */
static void pic_init1(int io_addr, int elcr_addr, PicState *s)
{
-register_ioport_write(io_addr, 2, 1, pic_ioport_write, s);
-register_ioport_read(io_addr, 2, 1, pic_ioport_read, s);
+memory_region_init_io(&s->base_io, &pic_base_ioport_ops, s, "pic", 2);
+memory_region_init_io(&s->elcr_io, &pic_elcr_ioport_ops, s, "elcr", 1);
+
+isa_register_ioport(NULL, &s->base_io, io_addr);
if (elcr_addr >= 0) {
-register_ioport_write(elcr_addr, 1, 1, elcr_ioport_write, s);
-register_ioport_read(elcr_addr, 1, 1, elcr_ioport_read, s);
+isa_register_ioport(NULL, &s->elcr_io, elcr_addr);
}
+
vmstate_register(NULL, io_addr, &vmstate_pic, s);
qemu_register_reset(pic_rese
[Qemu-devel] [PULL 20/28] etrax-pic: Convert to MemoryRegion
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Avi Kivity
---
hw/etraxfs_pic.c | 30 +++---
1 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/hw/etraxfs_pic.c b/hw/etraxfs_pic.c
index 4feffda..47a56d7 100644
--- a/hw/etraxfs_pic.c
+++ b/hw/etraxfs_pic.c
@@ -39,6 +39,7 @@
struct etrax_pic
{
SysBusDevice busdev;
+MemoryRegion mmio;
void *interrupt_vector;
qemu_irq parent_irq;
qemu_irq parent_nmi;
@@ -77,7 +78,8 @@ static void pic_update(struct etrax_pic *fs)
qemu_set_irq(fs->parent_irq, !!vector);
}
-static uint32_t pic_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t
+pic_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct etrax_pic *fs = opaque;
uint32_t rval;
@@ -87,8 +89,8 @@ static uint32_t pic_readl (void *opaque, target_phys_addr_t
addr)
return rval;
}
-static void
-pic_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+static void pic_write(void *opaque, target_phys_addr_t addr,
+ uint64_t value, unsigned int size)
{
struct etrax_pic *fs = opaque;
D(printf("%s addr=%x val=%x\n", __func__, addr, value));
@@ -99,14 +101,14 @@ static uint32_t pic_readl (void *opaque,
target_phys_addr_t addr)
}
}
-static CPUReadMemoryFunc * const pic_read[] = {
-NULL, NULL,
-&pic_readl,
-};
-
-static CPUWriteMemoryFunc * const pic_write[] = {
-NULL, NULL,
-&pic_writel,
+static const MemoryRegionOps pic_ops = {
+.read = pic_read,
+.write = pic_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
+.valid = {
+.min_access_size = 4,
+.max_access_size = 4
+}
};
static void nmi_handler(void *opaque, int irq, int level)
@@ -139,15 +141,13 @@ static void irq_handler(void *opaque, int irq, int level)
static int etraxfs_pic_init(SysBusDevice *dev)
{
struct etrax_pic *s = FROM_SYSBUS(typeof (*s), dev);
-int intr_vect_regs;
qdev_init_gpio_in(&dev->qdev, irq_handler, 32);
sysbus_init_irq(dev, &s->parent_irq);
sysbus_init_irq(dev, &s->parent_nmi);
-intr_vect_regs = cpu_register_io_memory(pic_read, pic_write, s,
-DEVICE_NATIVE_ENDIAN);
-sysbus_init_mmio(dev, R_MAX * 4, intr_vect_regs);
+memory_region_init_io(&s->mmio, &pic_ops, s, "etraxfs-pic", R_MAX * 4);
+sysbus_init_mmio_region(dev, &s->mmio);
return 0;
}
--
1.7.6.1
[Qemu-devel] [PULL 11/28] pc: Re-order pc_init1 to initialize the ISA bus before ISA devices
From: Richard Henderson
In particular, the i8259 was being initialized before the ISA bus,
leading to a crash.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/pc_piix.c | 22 --
1 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index 9a8f580..322f267 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -123,17 +123,7 @@ static void pc_init1(MemoryRegion *system_memory,
pci_memory, &ram_memory);
}
-if (!xen_enabled()) {
-cpu_irq = pc_allocate_cpu_irq();
-i8259 = i8259_init(cpu_irq[0]);
-} else {
-i8259 = xen_interrupt_controller_init();
-}
isa_irq_state = g_malloc0(sizeof(*isa_irq_state));
-isa_irq_state->i8259 = i8259;
-if (pci_enabled) {
-ioapic_init(isa_irq_state);
-}
isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
if (pci_enabled) {
@@ -153,6 +143,18 @@ static void pc_init1(MemoryRegion *system_memory,
}
isa_bus_irqs(isa_irq);
+if (!xen_enabled()) {
+cpu_irq = pc_allocate_cpu_irq();
+i8259 = i8259_init(cpu_irq[0]);
+} else {
+i8259 = xen_interrupt_controller_init();
+}
+
+isa_irq_state->i8259 = i8259;
+if (pci_enabled) {
+ioapic_init(isa_irq_state);
+}
+
pc_register_ferr_irq(isa_get_irq(13));
pc_vga_init(pci_enabled? pci_bus: NULL);
--
1.7.6.1
[Qemu-devel] [PULL 28/28] serial: Add MemoryRegion parameter to serial_mm_init
From: Richard Henderson
Remove the get_system_memory() call from serial_mm_init, pushing
it back into the callers. In many cases we already have the
system memory region available.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/mips_jazz.c |8
hw/mips_malta.c |4 ++--
hw/musicpal.c|8
hw/omap_uart.c |6 --
hw/pc.h |7 ---
hw/petalogix_ml605_mmu.c |6 --
hw/ppc405_uc.c | 20
hw/ppc440.c | 11 +++
hw/ppce500_mpc8544ds.c |6 --
hw/pxa2xx.c |5 +++--
hw/serial.c | 10 +-
hw/sm501.c |4 +++-
hw/sun4u.c |5 +++--
hw/virtex_ml507.c|6 --
14 files changed, 63 insertions(+), 43 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 8a345b4..38ce229 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -264,12 +264,12 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Serial ports */
if (serial_hds[0]) {
-serial_mm_init(0x80006000, 0, rc4030[8], 800/16, serial_hds[0],
- DEVICE_NATIVE_ENDIAN);
+serial_mm_init(address_space, 0x80006000, 0, rc4030[8], 800/16,
+ serial_hds[0], DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
-serial_mm_init(0x80007000, 0, rc4030[9], 800/16, serial_hds[1],
- DEVICE_NATIVE_ENDIAN);
+serial_mm_init(address_space, 0x80007000, 0, rc4030[9], 800/16,
+ serial_hds[1], DEVICE_NATIVE_ENDIAN);
}
/* Parallel port */
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index dd34285..135c2f5 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -446,8 +446,8 @@ static void malta_fpga_led_init(CharDriverState *chr)
s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
-s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr,
- DEVICE_NATIVE_ENDIAN);
+s->uart = serial_mm_init(address_space, base + 0x900, 3, uart_irq,
+ 230400, uart_chr, DEVICE_NATIVE_ENDIAN);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index 2131db1..20553b5 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1486,12 +1486,12 @@ static void musicpal_init(ram_addr_t ram_size,
pic[MP_TIMER4_IRQ], NULL);
if (serial_hds[0]) {
-serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], DEVICE_NATIVE_ENDIAN);
+serial_mm_init(address_space_mem, MP_UART1_BASE, 2, pic[MP_UART1_IRQ],
+ 1825000, serial_hds[0], DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
-serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], DEVICE_NATIVE_ENDIAN);
+serial_mm_init(address_space_mem, MP_UART2_BASE, 2, pic[MP_UART2_IRQ],
+ 1825000, serial_hds[1], DEVICE_NATIVE_ENDIAN);
}
/* Register flash */
diff --git a/hw/omap_uart.c b/hw/omap_uart.c
index b43f04c..19f8e6e 100644
--- a/hw/omap_uart.c
+++ b/hw/omap_uart.c
@@ -22,6 +22,7 @@
#include "omap.h"
/* We use pc-style serial ports. */
#include "pc.h"
+#include "exec-memory.h"
/* UARTs */
struct omap_uart_s {
@@ -60,7 +61,8 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
s->base = base;
s->fclk = fclk;
s->irq = irq;
-s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
+s->serial = serial_mm_init(get_system_memory(), base, 2, irq,
+ omap_clk_getrate(fclk)/16,
chr ?: qemu_chr_new(label, "null", NULL),
DEVICE_NATIVE_ENDIAN);
return s;
@@ -176,7 +178,7 @@ struct omap_uart_s *omap2_uart_init(struct
omap_target_agent_s *ta,
void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr)
{
/* TODO: Should reuse or destroy current s->serial */
-s->serial = serial_mm_init(s->base, 2, s->irq,
+s->serial = serial_mm_init(get_system_memory(), s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
chr ?: qemu_chr_new("null", "null", NULL),
DEVICE_NATIVE_ENDIAN);
diff --git a/hw/pc.h b/hw/pc.h
index f81635f..ca57577 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -15,9 +15,10 @@
SerialState *serial_init(int base, qemu_irq irq, int baudbase,
CharDriverState *chr);
-SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
- qemu_irq irq, int baudbase,
- CharDriverState *chr, enum device_endian);
+SerialState *serial_mm_init(MemoryReg
[Qemu-devel] [PULL 09/28] isa: Pass i/o address space to isa_bus_new
From: Richard Henderson
Not used yet, but at least we're provided with the correct region.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/isa-bus.c |4 +++-
hw/isa.h |2 +-
hw/mips_jazz.c | 17 ++---
hw/mips_r4k.c |2 +-
hw/pc_piix.c |2 +-
hw/piix4.c |2 +-
hw/piix_pci.c |2 +-
hw/ppc_prep.c |2 +-
hw/sun4u.c |2 +-
hw/vt82c686.c |2 +-
10 files changed, 21 insertions(+), 16 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index 1cb497f..d067505 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -24,6 +24,7 @@
struct ISABus {
BusState qbus;
+MemoryRegion *address_space_io;
qemu_irq *irqs;
};
static ISABus *isabus;
@@ -39,7 +40,7 @@ struct ISABus {
.get_fw_dev_path = isabus_get_fw_dev_path,
};
-ISABus *isa_bus_new(DeviceState *dev)
+ISABus *isa_bus_new(DeviceState *dev, MemoryRegion *address_space_io)
{
if (isabus) {
fprintf(stderr, "Can't create a second ISA bus\n");
@@ -51,6 +52,7 @@ struct ISABus {
}
isabus = FROM_QBUS(ISABus, qbus_create(&isa_bus_info, dev, NULL));
+isabus->address_space_io = address_space_io;
return isabus;
}
diff --git a/hw/isa.h b/hw/isa.h
index f344699..390e2d4 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -25,7 +25,7 @@ struct ISADeviceInfo {
isa_qdev_initfn init;
};
-ISABus *isa_bus_new(DeviceState *dev);
+ISABus *isa_bus_new(DeviceState *dev, MemoryRegion *address_space_io);
void isa_bus_irqs(qemu_irq *irqs);
qemu_irq isa_get_irq(int isairq);
void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq);
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index bde9be6..bfb521a 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -102,10 +102,11 @@ static void cpu_request_exit(void *opaque, int irq, int
level)
}
}
-static
-void mips_jazz_init (MemoryRegion *address_space, ram_addr_t ram_size,
- const char *cpu_model,
- enum jazz_model_e jazz_model)
+static void mips_jazz_init(MemoryRegion *address_space,
+ MemoryRegion *address_space_io,
+ ram_addr_t ram_size,
+ const char *cpu_model,
+ enum jazz_model_e jazz_model)
{
char *filename;
int bios_size, n;
@@ -181,7 +182,7 @@ void mips_jazz_init (MemoryRegion *address_space,
ram_addr_t ram_size,
/* ISA devices */
i8259 = i8259_init(env->irq[4]);
-isa_bus_new(NULL);
+isa_bus_new(NULL, address_space_io);
isa_bus_irqs(i8259);
cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
DMA_init(0, cpu_exit_irq);
@@ -299,7 +300,8 @@ void mips_magnum_init (ram_addr_t ram_size,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
-mips_jazz_init(get_system_memory(), ram_size, cpu_model, JAZZ_MAGNUM);
+mips_jazz_init(get_system_memory(), get_system_io(),
+ ram_size, cpu_model, JAZZ_MAGNUM);
}
static
@@ -308,7 +310,8 @@ void mips_pica61_init (ram_addr_t ram_size,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
-mips_jazz_init(get_system_memory(), ram_size, cpu_model, JAZZ_PICA61);
+mips_jazz_init(get_system_memory(), get_system_io(),
+ ram_size, cpu_model, JAZZ_PICA61);
}
static QEMUMachine mips_magnum_machine = {
diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c
index 805d02a..a7dc487 100644
--- a/hw/mips_r4k.c
+++ b/hw/mips_r4k.c
@@ -257,7 +257,7 @@ void mips_r4k_init (ram_addr_t ram_size,
/* The PIC is attached to the MIPS CPU INT0 pin */
i8259 = i8259_init(env->irq[2]);
-isa_bus_new(NULL);
+isa_bus_new(NULL, get_system_io());
isa_bus_irqs(i8259);
rtc_init(2000, NULL);
diff --git a/hw/pc_piix.c b/hw/pc_piix.c
index 75d96d9..9a8f580 100644
--- a/hw/pc_piix.c
+++ b/hw/pc_piix.c
@@ -149,7 +149,7 @@ static void pc_init1(MemoryRegion *system_memory,
} else {
pci_bus = NULL;
i440fx_state = NULL;
-isa_bus_new(NULL);
+isa_bus_new(NULL, system_io);
}
isa_bus_irqs(isa_irq);
diff --git a/hw/piix4.c b/hw/piix4.c
index 9590e7b..2fd1171 100644
--- a/hw/piix4.c
+++ b/hw/piix4.c
@@ -87,7 +87,7 @@ static int piix4_initfn(PCIDevice *dev)
{
PIIX4State *d = DO_UPCAST(PIIX4State, dev, dev);
-isa_bus_new(&d->dev.qdev);
+isa_bus_new(&d->dev.qdev, pci_address_space_io(dev));
piix4_dev = &d->dev;
qemu_register_reset(piix4_reset, d);
return 0;
diff --git a/hw/piix_pci.c b/hw/piix_pci.c
index 8f6ea42..d183443 100644
--- a/hw/piix_pci.c
+++ b/hw/piix_pci.c
@@ -504,7 +504,7 @@ static int piix3_initfn(PCIDevice *dev)
{
PIIX3State *d = DO_UPCAST(PIIX3State, dev, dev);
-isa_bus_new(&d->dev.qdev);
+isa_bus_new(&d->
[Qemu-devel] [PULL 13/28] i8254: Convert to MemoryRegion
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/i8254.c | 16 +---
1 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/hw/i8254.c b/hw/i8254.c
index a9ca9f6..12571ef 100644
--- a/hw/i8254.c
+++ b/hw/i8254.c
@@ -55,6 +55,7 @@
typedef struct PITState {
ISADevice dev;
+MemoryRegion ioports;
uint32_t irq;
uint32_t iobase;
PITChannelState channels[3];
@@ -506,6 +507,16 @@ void hpet_pit_enable(void)
pit_load_count(s, 0);
}
+static const MemoryRegionPortio pit_portio[] = {
+{ 0, 4, 1, .write = pit_ioport_write },
+{ 0, 3, 1, .read = pit_ioport_read },
+PORTIO_END_OF_LIST()
+};
+
+static const MemoryRegionOps pit_ioport_ops = {
+.old_portio = pit_portio
+};
+
static int pit_initfn(ISADevice *dev)
{
PITState *pit = DO_UPCAST(PITState, dev, dev);
@@ -516,9 +527,8 @@ static int pit_initfn(ISADevice *dev)
s->irq_timer = qemu_new_timer_ns(vm_clock, pit_irq_timer, s);
s->irq = isa_get_irq(pit->irq);
-register_ioport_write(pit->iobase, 4, 1, pit_ioport_write, pit);
-register_ioport_read(pit->iobase, 3, 1, pit_ioport_read, pit);
-isa_init_ioport(dev, pit->iobase);
+memory_region_init_io(&pit->ioports, &pit_ioport_ops, pit, "pit", 4);
+isa_register_ioport(dev, &pit->ioports, pit->iobase);
qdev_set_legacy_instance_id(&dev->qdev, pit->iobase, 2);
--
1.7.6.1
[Qemu-devel] [PULL 14/28] mips_malta: move i8259 initialization after piix4 initialization
i8259 is an ISA device; and the ISA bus is supplied by piix4. Later patches make this dependency explicit. Signed-off-by: Avi Kivity --- hw/mips_malta.c |9 + 1 files changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 0110daa..172f74e 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -928,10 +928,6 @@ void mips_malta_init (ram_addr_t ram_size, cpu_mips_irq_init_cpu(env); cpu_mips_clock_init(env); -/* Interrupt controller */ -/* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */ -i8259 = i8259_init(env->irq[2]); - /* Northbridge */ pci_bus = gt64120_register(i8259); @@ -939,6 +935,11 @@ void mips_malta_init (ram_addr_t ram_size, ide_drive_get(hd, MAX_IDE_BUS); piix4_devfn = piix4_init(pci_bus, 80); + +/* Interrupt controller */ +/* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */ +i8259 = i8259_init(env->irq[2]); + isa_bus_irqs(i8259); pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1); usb_uhci_piix4_init(pci_bus, piix4_devfn + 2); -- 1.7.6.1
[Qemu-devel] [PULL 04/28] mips_r4k: convert to memory API
Signed-off-by: Avi Kivity
---
hw/mips_r4k.c | 39 +++
1 files changed, 15 insertions(+), 24 deletions(-)
diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c
index 5d002c5..805d02a 100644
--- a/hw/mips_r4k.c
+++ b/hw/mips_r4k.c
@@ -42,8 +42,8 @@
const char *initrd_filename;
} loaderparams;
-static void mips_qemu_writel (void *opaque, target_phys_addr_t addr,
- uint32_t val)
+static void mips_qemu_write (void *opaque, target_phys_addr_t addr,
+ uint64_t val, unsigned size)
{
if ((addr & 0x) == 0 && val == 42)
qemu_system_reset_request ();
@@ -51,25 +51,18 @@ static void mips_qemu_writel (void *opaque,
target_phys_addr_t addr,
qemu_system_shutdown_request ();
}
-static uint32_t mips_qemu_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t mips_qemu_read (void *opaque, target_phys_addr_t addr,
+unsigned size)
{
return 0;
}
-static CPUWriteMemoryFunc * const mips_qemu_write[] = {
-&mips_qemu_writel,
-&mips_qemu_writel,
-&mips_qemu_writel,
+static const MemoryRegionOps mips_qemu_ops = {
+.read = mips_qemu_read,
+.write = mips_qemu_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
};
-static CPUReadMemoryFunc * const mips_qemu_read[] = {
-&mips_qemu_readl,
-&mips_qemu_readl,
-&mips_qemu_readl,
-};
-
-static int mips_qemu_iomemtype = 0;
-
typedef struct ResetData {
CPUState *env;
uint64_t vector;
@@ -163,8 +156,10 @@ void mips_r4k_init (ram_addr_t ram_size,
const char *initrd_filename, const char *cpu_model)
{
char *filename;
-ram_addr_t ram_offset;
+MemoryRegion *address_space_mem = get_system_memory();
+MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios;
+MemoryRegion *iomem = g_new(MemoryRegion, 1);
int bios_size;
CPUState *env;
ResetData *reset_info;
@@ -199,16 +194,12 @@ void mips_r4k_init (ram_addr_t ram_size,
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
-ram_offset = qemu_ram_alloc(NULL, "mips_r4k.ram", ram_size);
+memory_region_init_ram(ram, NULL, "mips_r4k.ram", ram_size);
-cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
+memory_region_add_subregion(address_space_mem, 0, ram);
-if (!mips_qemu_iomemtype) {
-mips_qemu_iomemtype = cpu_register_io_memory(mips_qemu_read,
- mips_qemu_write, NULL,
- DEVICE_NATIVE_ENDIAN);
-}
-cpu_register_physical_memory(0x1fbf, 0x1, mips_qemu_iomemtype);
+memory_region_init_io(iomem, &mips_qemu_ops, NULL, "mips-qemu", 0x1);
+memory_region_add_subregion(address_space_mem, 0x1fbf, iomem);
/* Try to load a BIOS image. If this fails, we continue regardless,
but initialize the hardware ourselves. When a kernel gets
--
1.7.6.1
[Qemu-devel] [PULL 07/28] omap1: convert to memory API (part II)
Signed-off-by: Avi Kivity
---
hw/omap.h |7 ++-
hw/omap1.c | 195
2 files changed, 111 insertions(+), 91 deletions(-)
diff --git a/hw/omap.h b/hw/omap.h
index eec8f04..cb3b524 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -678,7 +678,8 @@ void omap_uart_reset(struct omap_uart_s *s);
void omap_uart_attach(struct omap_uart_s *s, CharDriverState *chr);
struct omap_mpuio_s;
-struct omap_mpuio_s *omap_mpuio_init(target_phys_addr_t base,
+struct omap_mpuio_s *omap_mpuio_init(MemoryRegion *system_memory,
+target_phys_addr_t base,
qemu_irq kbd_int, qemu_irq gpio_int, qemu_irq wakeup,
omap_clk clk);
qemu_irq *omap_mpuio_in_get(struct omap_mpuio_s *s);
@@ -833,6 +834,9 @@ struct omap_mpu_state_s {
MemoryRegion id_iomem_ed4;
MemoryRegion id_iomem_e20;
MemoryRegion mpui_iomem;
+MemoryRegion tcmi_iomem;
+MemoryRegion clkm_iomem;
+MemoryRegion clkdsp_iomem;
struct omap_dma_port_if_s {
uint32_t (*read[3])(struct omap_mpu_state_s *s,
@@ -915,6 +919,7 @@ struct omap_mpu_state_s {
uint32_t tcmi_regs[17];
struct dpll_ctl_s {
+MemoryRegion iomem;
uint16_t mode;
omap_clk dpll;
} dpll[3];
diff --git a/hw/omap1.c b/hw/omap1.c
index 0f7e14f..05e38fc 100644
--- a/hw/omap1.c
+++ b/hw/omap1.c
@@ -1236,11 +1236,16 @@ static void omap_tipb_bridge_reset(struct
omap_tipb_bridge_s *s)
}
/* Dummy Traffic Controller's Memory Interface */
-static uint32_t omap_tcmi_read(void *opaque, target_phys_addr_t addr)
+static uint64_t omap_tcmi_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
uint32_t ret;
+if (size != 4) {
+return omap_badwidth_read32(opaque, addr);
+}
+
switch (addr) {
case 0x00: /* IMIF_PRIO */
case 0x04: /* EMIFS_PRIO */
@@ -1270,10 +1275,14 @@ static uint32_t omap_tcmi_read(void *opaque,
target_phys_addr_t addr)
}
static void omap_tcmi_write(void *opaque, target_phys_addr_t addr,
-uint32_t value)
+uint64_t value, unsigned size)
{
struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+if (size != 4) {
+return omap_badwidth_write32(opaque, addr, value);
+}
+
switch (addr) {
case 0x00: /* IMIF_PRIO */
case 0x04: /* EMIFS_PRIO */
@@ -1300,16 +1309,10 @@ static void omap_tcmi_write(void *opaque,
target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const omap_tcmi_readfn[] = {
-omap_badwidth_read32,
-omap_badwidth_read32,
-omap_tcmi_read,
-};
-
-static CPUWriteMemoryFunc * const omap_tcmi_writefn[] = {
-omap_badwidth_write32,
-omap_badwidth_write32,
-omap_tcmi_write,
+static const MemoryRegionOps omap_tcmi_ops = {
+.read = omap_tcmi_read,
+.write = omap_tcmi_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
};
static void omap_tcmi_reset(struct omap_mpu_state_s *mpu)
@@ -1331,21 +1334,25 @@ static void omap_tcmi_reset(struct omap_mpu_state_s
*mpu)
mpu->tcmi_regs[0x40 >> 2] = 0x;
}
-static void omap_tcmi_init(target_phys_addr_t base,
+static void omap_tcmi_init(MemoryRegion *memory, target_phys_addr_t base,
struct omap_mpu_state_s *mpu)
{
-int iomemtype = cpu_register_io_memory(omap_tcmi_readfn,
-omap_tcmi_writefn, mpu, DEVICE_NATIVE_ENDIAN);
-
-cpu_register_physical_memory(base, 0x100, iomemtype);
+memory_region_init_io(&mpu->tcmi_iomem, &omap_tcmi_ops, mpu,
+ "omap-tcmi", 0x100);
+memory_region_add_subregion(memory, base, &mpu->tcmi_iomem);
omap_tcmi_reset(mpu);
}
/* Digital phase-locked loops control */
-static uint32_t omap_dpll_read(void *opaque, target_phys_addr_t addr)
+static uint64_t omap_dpll_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
struct dpll_ctl_s *s = (struct dpll_ctl_s *) opaque;
+if (size != 2) {
+return omap_badwidth_read16(opaque, addr);
+}
+
if (addr == 0x00) /* CTL_REG */
return s->mode;
@@ -1354,13 +1361,17 @@ static uint32_t omap_dpll_read(void *opaque,
target_phys_addr_t addr)
}
static void omap_dpll_write(void *opaque, target_phys_addr_t addr,
-uint32_t value)
+uint64_t value, unsigned size)
{
struct dpll_ctl_s *s = (struct dpll_ctl_s *) opaque;
uint16_t diff;
static const int bypass_div[4] = { 1, 2, 4, 4 };
int div, mult;
+if (size != 2) {
+return omap_badwidth_write16(opaque, addr, value);
+}
+
if (addr == 0x00) {/* CTL_REG */
/* See omap_ulpd_pm_write() too */
diff = s->mode & value;
@@ -1386,16 +1397,10 @@ static void omap_dpll_write(void *opaque,
target_phys_addr_t addr,
}
}
-static CPU
[Qemu-devel] [PULL 16/28] pckbd: Convert to MemoryRegion
From: Richard Henderson
Slightly non-obvious with mips_jazz passing in the region
structure to populate.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/mips_jazz.c |4 ++-
hw/pc.h|2 +-
hw/pckbd.c | 59 ++-
3 files changed, 40 insertions(+), 25 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index bfb521a..1a9cbeb 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -115,6 +115,7 @@ static void mips_jazz_init(MemoryRegion *address_space,
rc4030_dma *dmas;
void* rc4030_opaque;
MemoryRegion *rtc = g_new(MemoryRegion, 1);
+MemoryRegion *i8042 = g_new(MemoryRegion, 1);
MemoryRegion *dma_dummy = g_new(MemoryRegion, 1);
NICInfo *nd;
DeviceState *dev;
@@ -258,7 +259,8 @@ static void mips_jazz_init(MemoryRegion *address_space,
memory_region_add_subregion(address_space, 0x80004000, rtc);
/* Keyboard (i8042) */
-i8042_mm_init(rc4030[6], rc4030[7], 0x80005000, 0x1000, 0x1);
+i8042_mm_init(rc4030[6], rc4030[7], i8042, 0x1000, 0x1);
+memory_region_add_subregion(address_space, 0x80005000, i8042);
/* Serial ports */
if (serial_hds[0]) {
diff --git a/hw/pc.h b/hw/pc.h
index dae736e..28ed210 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -118,7 +118,7 @@ void vmmouse_set_data(const uint32_t *data);
void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
- target_phys_addr_t base, ram_addr_t size,
+ MemoryRegion *region, ram_addr_t size,
target_phys_addr_t mask);
void i8042_isa_mouse_fake_event(void *opaque);
void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
diff --git a/hw/pckbd.c b/hw/pckbd.c
index a272ccd..06b40c5 100644
--- a/hw/pckbd.c
+++ b/hw/pckbd.c
@@ -400,33 +400,27 @@ static void kbd_mm_writeb (void *opaque,
target_phys_addr_t addr, uint32_t value
kbd_write_data(s, 0, value & 0xff);
}
-static CPUReadMemoryFunc * const kbd_mm_read[] = {
-&kbd_mm_readb,
-&kbd_mm_readb,
-&kbd_mm_readb,
-};
-
-static CPUWriteMemoryFunc * const kbd_mm_write[] = {
-&kbd_mm_writeb,
-&kbd_mm_writeb,
-&kbd_mm_writeb,
+static const MemoryRegionOps i8042_mmio_ops = {
+.endianness = DEVICE_NATIVE_ENDIAN,
+.old_mmio = {
+.read = { kbd_mm_readb, kbd_mm_readb, kbd_mm_readb },
+.write = { kbd_mm_writeb, kbd_mm_writeb, kbd_mm_writeb },
+},
};
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
- target_phys_addr_t base, ram_addr_t size,
+ MemoryRegion *region, ram_addr_t size,
target_phys_addr_t mask)
{
KBDState *s = g_malloc0(sizeof(KBDState));
-int s_io_memory;
s->irq_kbd = kbd_irq;
s->irq_mouse = mouse_irq;
s->mask = mask;
vmstate_register(NULL, 0, &vmstate_kbd, s);
-s_io_memory = cpu_register_io_memory(kbd_mm_read, kbd_mm_write, s,
- DEVICE_NATIVE_ENDIAN);
-cpu_register_physical_memory(base, size, s_io_memory);
+
+memory_region_init_io(region, &i8042_mmio_ops, s, "i8042", size);
s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
@@ -435,7 +429,8 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
typedef struct ISAKBDState {
ISADevice dev;
-KBDState kbd;
+KBDState kbd;
+MemoryRegion io[2];
} ISAKBDState;
void i8042_isa_mouse_fake_event(void *opaque)
@@ -464,19 +459,37 @@ void i8042_setup_a20_line(ISADevice *dev, qemu_irq
*a20_out)
}
};
+static const MemoryRegionPortio i8042_data_portio[] = {
+{ 0, 1, 1, .read = kbd_read_data, .write = kbd_write_data },
+PORTIO_END_OF_LIST()
+};
+
+static const MemoryRegionPortio i8042_cmd_portio[] = {
+{ 0, 1, 1, .read = kbd_read_status, .write = kbd_write_command },
+PORTIO_END_OF_LIST()
+};
+
+static const MemoryRegionOps i8042_data_ops = {
+.old_portio = i8042_data_portio
+};
+
+static const MemoryRegionOps i8042_cmd_ops = {
+.old_portio = i8042_cmd_portio
+};
+
static int i8042_initfn(ISADevice *dev)
{
-KBDState *s = &(DO_UPCAST(ISAKBDState, dev, dev)->kbd);
+ISAKBDState *isa_s = DO_UPCAST(ISAKBDState, dev, dev);
+KBDState *s = &isa_s->kbd;
isa_init_irq(dev, &s->irq_kbd, 1);
isa_init_irq(dev, &s->irq_mouse, 12);
-register_ioport_read(0x60, 1, 1, kbd_read_data, s);
-register_ioport_write(0x60, 1, 1, kbd_write_data, s);
-isa_init_ioport(dev, 0x60);
-register_ioport_read(0x64, 1, 1, kbd_read_status, s);
-register_ioport_write(0x64, 1, 1, kbd_write_command, s);
-isa_init_ioport(dev, 0x64);
+memory_region_init_io(isa_s->io + 0, &i8042_data_ops, s, "i8042-data", 1);
+isa_register_ioport(dev, isa_s->io + 0, 0x60);
+
+memory_region_init_io(isa_s->io + 1, &i8042_cmd_ops, s, "i8042-cmd", 1);
+isa_registe
[Qemu-devel] [PULL 17/28] serial: Convert serial_isa_initfn to MemoryRegion
From: Richard Henderson
The serial_mm_init path is as yet unconverted.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/serial.c | 15 ---
1 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/hw/serial.c b/hw/serial.c
index ed7fd0a..2e6d212 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -157,6 +157,7 @@ struct SerialState {
typedef struct ISASerialState {
ISADevice dev;
+MemoryRegion io;
uint32_t index;
uint32_t iobase;
uint32_t isairq;
@@ -755,6 +756,15 @@ void serial_set_frequency(SerialState *s, uint32_t
frequency)
static const int isa_serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8,
0x2e8 };
static const int isa_serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
+static const MemoryRegionPortio serial_portio[] = {
+{ 0, 8, 1, .read = serial_ioport_read, .write = serial_ioport_write },
+PORTIO_END_OF_LIST()
+};
+
+static const MemoryRegionOps serial_io_ops = {
+.old_portio = serial_portio
+};
+
static int serial_isa_initfn(ISADevice *dev)
{
static int index;
@@ -776,9 +786,8 @@ static int serial_isa_initfn(ISADevice *dev)
serial_init_core(s);
qdev_set_legacy_instance_id(&dev->qdev, isa->iobase, 3);
-register_ioport_write(isa->iobase, 8, 1, serial_ioport_write, s);
-register_ioport_read(isa->iobase, 8, 1, serial_ioport_read, s);
-isa_init_ioport_range(dev, isa->iobase, 8);
+memory_region_init_io(&isa->io, &serial_io_ops, s, "serial", 8);
+isa_register_ioport(dev, &isa->io, isa->iobase);
return 0;
}
--
1.7.6.1
[Qemu-devel] [PULL 27/28] serial: Remove ioregister parameter from serial_mm_init
From: Richard Henderson
All callers passed 1.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/mips_jazz.c |4 ++--
hw/mips_malta.c |2 +-
hw/musicpal.c|4 ++--
hw/omap_uart.c |4 ++--
hw/pc.h |3 +--
hw/petalogix_ml605_mmu.c |2 +-
hw/ppc405_uc.c |8
hw/ppc440.c |4 ++--
hw/ppce500_mpc8544ds.c |4 ++--
hw/pxa2xx.c |4 ++--
hw/serial.c |8 +++-
hw/sm501.c |2 +-
hw/sun4u.c |2 +-
hw/virtex_ml507.c|2 +-
14 files changed, 25 insertions(+), 28 deletions(-)
diff --git a/hw/mips_jazz.c b/hw/mips_jazz.c
index 8a2026e..8a345b4 100644
--- a/hw/mips_jazz.c
+++ b/hw/mips_jazz.c
@@ -265,11 +265,11 @@ static void mips_jazz_init(MemoryRegion *address_space,
/* Serial ports */
if (serial_hds[0]) {
serial_mm_init(0x80006000, 0, rc4030[8], 800/16, serial_hds[0],
- 1, DEVICE_NATIVE_ENDIAN);
+ DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
serial_mm_init(0x80007000, 0, rc4030[9], 800/16, serial_hds[1],
- 1, DEVICE_NATIVE_ENDIAN);
+ DEVICE_NATIVE_ENDIAN);
}
/* Parallel port */
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 88a3c28..dd34285 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -447,7 +447,7 @@ static void malta_fpga_led_init(CharDriverState *chr)
s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
s->uart = serial_mm_init(base + 0x900, 3, uart_irq, 230400, uart_chr,
- 1, DEVICE_NATIVE_ENDIAN);
+ DEVICE_NATIVE_ENDIAN);
malta_fpga_reset(s);
qemu_register_reset(malta_fpga_reset, s);
diff --git a/hw/musicpal.c b/hw/musicpal.c
index e79b07e..2131db1 100644
--- a/hw/musicpal.c
+++ b/hw/musicpal.c
@@ -1487,11 +1487,11 @@ static void musicpal_init(ram_addr_t ram_size,
if (serial_hds[0]) {
serial_mm_init(MP_UART1_BASE, 2, pic[MP_UART1_IRQ], 1825000,
- serial_hds[0], 1, DEVICE_NATIVE_ENDIAN);
+ serial_hds[0], DEVICE_NATIVE_ENDIAN);
}
if (serial_hds[1]) {
serial_mm_init(MP_UART2_BASE, 2, pic[MP_UART2_IRQ], 1825000,
- serial_hds[1], 1, DEVICE_NATIVE_ENDIAN);
+ serial_hds[1], DEVICE_NATIVE_ENDIAN);
}
/* Register flash */
diff --git a/hw/omap_uart.c b/hw/omap_uart.c
index 66696ab..b43f04c 100644
--- a/hw/omap_uart.c
+++ b/hw/omap_uart.c
@@ -61,7 +61,7 @@ struct omap_uart_s *omap_uart_init(target_phys_addr_t base,
s->fclk = fclk;
s->irq = irq;
s->serial = serial_mm_init(base, 2, irq, omap_clk_getrate(fclk)/16,
- chr ?: qemu_chr_new(label, "null", NULL), 1,
+ chr ?: qemu_chr_new(label, "null", NULL),
DEVICE_NATIVE_ENDIAN);
return s;
}
@@ -178,6 +178,6 @@ void omap_uart_attach(struct omap_uart_s *s,
CharDriverState *chr)
/* TODO: Should reuse or destroy current s->serial */
s->serial = serial_mm_init(s->base, 2, s->irq,
omap_clk_getrate(s->fclk) / 16,
- chr ?: qemu_chr_new("null", "null", NULL), 1,
+ chr ?: qemu_chr_new("null", "null", NULL),
DEVICE_NATIVE_ENDIAN);
}
diff --git a/hw/pc.h b/hw/pc.h
index b7323fc..f81635f 100644
--- a/hw/pc.h
+++ b/hw/pc.h
@@ -17,8 +17,7 @@ SerialState *serial_init(int base, qemu_irq irq, int baudbase,
CharDriverState *chr);
SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
qemu_irq irq, int baudbase,
- CharDriverState *chr, int ioregister,
- enum device_endian);
+ CharDriverState *chr, enum device_endian);
static inline bool serial_isa_init(int index, CharDriverState *chr)
{
ISADevice *dev;
diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c
index 97ff33d..ab89341 100644
--- a/hw/petalogix_ml605_mmu.c
+++ b/hw/petalogix_ml605_mmu.c
@@ -185,7 +185,7 @@ static uint64_t translate_kernel_address(void *opaque,
uint64_t addr)
}
serial_mm_init(UART16550_BASEADDR + 0x1000, 2, irq[5], 115200,
- serial_hds[0], 1, DEVICE_LITTLE_ENDIAN);
+ serial_hds[0], DEVICE_LITTLE_ENDIAN);
/* 2 timers at irq 2 @ 100 Mhz. */
xilinx_timer_create(TIMER_BASEADDR, irq[2], 2, 100 * 100);
diff --git a/hw/ppc405_uc.c b/hw/ppc405_uc.c
index 35584df..924aada 100644
--- a/hw/ppc405_uc.c
+++ b/hw/ppc405_uc.c
@@ -2150,11 +2150,11 @@ static void ppc405cr_cpc_init (CPUState *env,
clk_setup_t clk_setup[7],
/* Serial ports */
if
Re: [Qemu-devel] About hotplug multifunction
On Mon, Sep 12, 2011 at 07:21:48AM -0300, Marcelo Tosatti wrote: > > We could, for example, keep a stub function 0 around. > > I suppose the guest will remove all functions of a device once you > attempt to hot-unplug a function. > > What is the problem with adding more PCI buses, instead of multifunction > ? The advantage is that its not only possible to use virtio devices, but any kind of PCI device.
Re: [Qemu-devel] About hotplug multifunction
On Mon, Sep 12, 2011 at 07:56:07AM -0300, Marcelo Tosatti wrote: > On Mon, Sep 12, 2011 at 07:21:48AM -0300, Marcelo Tosatti wrote: > > > We could, for example, keep a stub function 0 around. > > > > I suppose the guest will remove all functions of a device once you > > attempt to hot-unplug a function. > > > > What is the problem with adding more PCI buses, instead of multifunction > > ? > > The advantage is that its not only possible to use virtio devices, but any > kind of PCI device. Yes. But it is a new feature. Creating multifunction devs is *already* possible. Hotplug is partially broken, so getting it into a consistent non buggy state has value imho. -- MST
[Qemu-devel] [PULL 10/28] isa: add isa_register_ioport()
From: Richard Henderson
To replace isa_init_ioport and isa_init_ioport_range
as the ISA devices are converted to the memory api.
[avi: use memory_region_size()]
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/isa-bus.c | 10 ++
hw/isa.h |5 -
2 files changed, 14 insertions(+), 1 deletions(-)
diff --git a/hw/isa-bus.c b/hw/isa-bus.c
index d067505..6c15a31 100644
--- a/hw/isa-bus.c
+++ b/hw/isa-bus.c
@@ -108,6 +108,16 @@ void isa_init_ioport(ISADevice *dev, uint16_t ioport)
isa_init_ioport_range(dev, ioport, 1);
}
+void isa_register_ioport(ISADevice *dev, MemoryRegion *io, uint16_t start)
+{
+memory_region_add_subregion(isabus->address_space_io, start, io);
+if (dev != NULL) {
+assert(dev->nio < ARRAY_SIZE(dev->io));
+dev->io[dev->nio++] = io;
+isa_init_ioport_range(dev, start, memory_region_size(io));
+}
+}
+
static int isa_qdev_init(DeviceState *qdev, DeviceInfo *base)
{
ISADevice *dev = DO_UPCAST(ISADevice, qdev, qdev);
diff --git a/hw/isa.h b/hw/isa.h
index 390e2d4..432d17a 100644
--- a/hw/isa.h
+++ b/hw/isa.h
@@ -13,10 +13,12 @@ typedef struct ISADeviceInfo ISADeviceInfo;
struct ISADevice {
DeviceState qdev;
+MemoryRegion *io[32];
uint32_t isairq[2];
-int nirqs;
uint16_t ioports[32];
+int nirqs;
int nioports;
+int nio;
};
typedef int (*isa_qdev_initfn)(ISADevice *dev);
@@ -29,6 +31,7 @@ ISABus *isa_bus_new(DeviceState *dev, MemoryRegion
*address_space_io);
void isa_bus_irqs(qemu_irq *irqs);
qemu_irq isa_get_irq(int isairq);
void isa_init_irq(ISADevice *dev, qemu_irq *p, int isairq);
+void isa_register_ioport(ISADevice *dev, MemoryRegion *io, uint16_t start);
void isa_init_ioport(ISADevice *dev, uint16_t ioport);
void isa_init_ioport_range(ISADevice *dev, uint16_t start, uint16_t length);
void isa_qdev_register(ISADeviceInfo *info);
--
1.7.6.1
Re: [Qemu-devel] [PULL 00/28] Memory API conversion, batch 7
On 09/12/2011 01:50 PM, Avi Kivity wrote: git://github.com/avikivity/qemu.git memory/batch More of the same. I tested what I could using the images on the qemu wiki - note not all images boot even on upstream. Whoops - don't pull - bad patch in there. -- error compiling committee.c: too many arguments to function
[Qemu-devel] [PULL 08/28] pci: add pci_address_space_io()
From: Richard Henderson
Returns the I/O address space. Useful for implementing
PCI-ISA bridge devices.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/pci.c |5 +
hw/pci.h |1 +
2 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index af74003..d23fa74 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -2196,3 +2196,8 @@ int pci_qdev_find_device(const char *id, PCIDevice **pdev)
{
return dev->bus->address_space_mem;
}
+
+MemoryRegion *pci_address_space_io(PCIDevice *dev)
+{
+return dev->bus->address_space_io;
+}
diff --git a/hw/pci.h b/hw/pci.h
index c04b169..bd0dd8b 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -221,6 +221,7 @@ void pci_default_write_config(PCIDevice *d,
void pci_device_save(PCIDevice *s, QEMUFile *f);
int pci_device_load(PCIDevice *s, QEMUFile *f);
MemoryRegion *pci_address_space(PCIDevice *dev);
+MemoryRegion *pci_address_space_io(PCIDevice *dev);
typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level);
typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
--
1.7.6.1
[Qemu-devel] [PULL 02/28] mips_malta: convert to memory API
Signed-off-by: Avi Kivity
---
hw/mips_malta.c | 53 ++---
1 files changed, 26 insertions(+), 27 deletions(-)
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index e7cdf20..0110daa 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -57,6 +57,9 @@
#define MAX_IDE_BUS 2
typedef struct {
+MemoryRegion iomem;
+MemoryRegion iomem_lo; /* 0 - 0x900 */
+MemoryRegion iomem_hi; /* 0xa00 - 0x10 */
uint32_t leds;
uint32_t brk;
uint32_t gpout;
@@ -215,7 +218,8 @@ static void eeprom24c0x_write(int scl, int sda)
eeprom.sda = sda;
}
-static uint32_t malta_fpga_readl(void *opaque, target_phys_addr_t addr)
+static uint64_t malta_fpga_read(void *opaque, target_phys_addr_t addr,
+unsigned size)
{
MaltaFPGAState *s = opaque;
uint32_t val = 0;
@@ -302,8 +306,8 @@ static uint32_t malta_fpga_readl(void *opaque,
target_phys_addr_t addr)
return val;
}
-static void malta_fpga_writel(void *opaque, target_phys_addr_t addr,
- uint32_t val)
+static void malta_fpga_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val, unsigned size)
{
MaltaFPGAState *s = opaque;
uint32_t saddr;
@@ -328,7 +332,7 @@ static void malta_fpga_writel(void *opaque,
target_phys_addr_t addr,
/* ASCIIWORD Register */
case 0x00410:
-snprintf(s->display_text, 9, "%08X", val);
+snprintf(s->display_text, 9, "%08X", (uint32_t)val);
malta_fpga_update_display(s);
break;
@@ -388,16 +392,10 @@ static void malta_fpga_writel(void *opaque,
target_phys_addr_t addr,
}
}
-static CPUReadMemoryFunc * const malta_fpga_read[] = {
- malta_fpga_readl,
- malta_fpga_readl,
- malta_fpga_readl
-};
-
-static CPUWriteMemoryFunc * const malta_fpga_write[] = {
- malta_fpga_writel,
- malta_fpga_writel,
- malta_fpga_writel
+static const MemoryRegionOps malta_fpga_ops = {
+.read = malta_fpga_read,
+.write = malta_fpga_write,
+.endianness = DEVICE_NATIVE_ENDIAN,
};
static void malta_fpga_reset(void *opaque)
@@ -429,20 +427,22 @@ static void malta_fpga_led_init(CharDriverState *chr)
qemu_chr_fe_printf(chr, "++\r\n");
}
-static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, qemu_irq
uart_irq, CharDriverState *uart_chr)
+static MaltaFPGAState *malta_fpga_init(MemoryRegion *address_space,
+ target_phys_addr_t base, qemu_irq uart_irq, CharDriverState *uart_chr)
{
MaltaFPGAState *s;
-int malta;
s = (MaltaFPGAState *)g_malloc0(sizeof(MaltaFPGAState));
-malta = cpu_register_io_memory(malta_fpga_read,
- malta_fpga_write, s,
- DEVICE_NATIVE_ENDIAN);
+memory_region_init_io(&s->iomem, &malta_fpga_ops, s,
+ "malta-fpga", 0x10);
+memory_region_init_alias(&s->iomem_lo, "malta-fpga",
+ &s->iomem, 0, 0x900);
+memory_region_init_alias(&s->iomem_hi, "malta-fpga",
+ &s->iomem, 0xa00, 0x1-0xa00);
-cpu_register_physical_memory(base, 0x900, malta);
-/* 0xa00 is less than a page, so will still get the right offsets. */
-cpu_register_physical_memory(base + 0xa00, 0x10 - 0xa00, malta);
+memory_region_add_subregion(address_space, base, &s->iomem_lo);
+memory_region_add_subregion(address_space, base + 0xa00, &s->iomem_hi);
s->display = qemu_chr_new("fpga", "vc:320x200", malta_fpga_led_init);
@@ -771,8 +771,8 @@ void mips_malta_init (ram_addr_t ram_size,
{
char *filename;
pflash_t *fl;
-ram_addr_t ram_offset;
MemoryRegion *system_memory = get_system_memory();
+MemoryRegion *ram = g_new(MemoryRegion, 1);
MemoryRegion *bios, *bios_alias = g_new(MemoryRegion, 1);
target_long bios_size;
int64_t kernel_entry;
@@ -828,9 +828,8 @@ void mips_malta_init (ram_addr_t ram_size,
((unsigned int)ram_size / (1 << 20)));
exit(1);
}
-ram_offset = qemu_ram_alloc(NULL, "mips_malta.ram", ram_size);
-
-cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
+memory_region_init_ram(ram, NULL, "mips_malta.ram", ram_size);
+memory_region_add_subregion(system_memory, 0, ram);
#ifdef TARGET_WORDS_BIGENDIAN
be = 1;
@@ -838,7 +837,7 @@ void mips_malta_init (ram_addr_t ram_size,
be = 0;
#endif
/* FPGA */
-malta_fpga_init(0x1f00LL, env->irq[2], serial_hds[2]);
+malta_fpga_init(system_memory, 0x1f00LL, env->irq[2], serial_hds[2]);
/* Load firmware in flash / BIOS unless we boot directly into a kernel. */
if (kernel_filename) {
--
1.7.6.1
[Qemu-devel] [PULL 00/28] Memory API conversion, batch 7
git://github.com/avikivity/qemu.git memory/batch More of the same. I tested what I could using the images on the qemu wiki - note not all images boot even on upstream. Avi Kivity (9): mips_jazz: convert to memory API mips_malta: convert to memory API mips_mipssim: convert to memory API mips_r4k: convert to memory API musicpal: convert to memory API omap1: convert to memory API (part I) omap1: convert to memory API (part II) mips_malta: move i8259 initialization after piix4 initialization pci: simplify memory region registration Edgar E. Iglesias (5): etrax-pic: Convert to MemoryRegion etrax-ser: Convert to MemoryRegion etrax-timer: Convert to MemoryRegion etrax-dma: Convert to MemoryRegion etrax-eth: Convert to MemoryRegion Richard Henderson (14): pci: add pci_address_space_io() isa: Pass i/o address space to isa_bus_new isa: add isa_register_ioport() pc: Re-order pc_init1 to initialize the ISA bus before ISA devices cs4231a: Convert to MemoryRegion i8254: Convert to MemoryRegion i8259: Convert to MemoryRegion pckbd: Convert to MemoryRegion serial: Convert serial_isa_initfn to MemoryRegion fdc: Convert isabus_fdc_init1 to MemoryRegion serial: Convert serial_mm_init to MemoryRegion serial: Use enum device_endian in serial_mm_init parameter serial: Remove ioregister parameter from serial_mm_init serial: Add MemoryRegion parameter to serial_mm_init hw/cs4231a.c | 38 ++-- hw/etraxfs_dma.c | 43 +++-- hw/etraxfs_eth.c | 30 ++-- hw/etraxfs_pic.c | 30 ++-- hw/etraxfs_ser.c | 33 ++-- hw/etraxfs_timer.c | 31 ++-- hw/fdc.c | 53 +++-- hw/i8254.c | 16 ++- hw/i8259.c | 65 -- hw/isa-bus.c | 14 ++- hw/isa.h |7 +- hw/mips_jazz.c | 119 +- hw/mips_malta.c | 69 +++--- hw/mips_mipssim.c| 15 +- hw/mips_r4k.c| 41 ++--- hw/musicpal.c| 261 +-- hw/omap.h| 18 ++- hw/omap1.c | 533 +- hw/omap_sx1.c|4 +- hw/omap_uart.c | 27 +-- hw/palm.c|4 +- hw/pc.h | 10 +- hw/pc_piix.c | 24 ++- hw/pci.c | 18 +- hw/pci.h |1 + hw/pckbd.c | 59 +++-- hw/petalogix_ml605_mmu.c |6 +- hw/piix4.c |2 +- hw/piix_pci.c|2 +- hw/ppc405_uc.c | 20 +- hw/ppc440.c | 11 +- hw/ppc_prep.c|2 +- hw/ppce500_mpc8544ds.c | 10 +- hw/pxa2xx.c | 38 ++-- hw/serial.c | 162 --- hw/sm501.c | 12 +- hw/sun4u.c |7 +- hw/virtex_ml507.c|5 +- hw/vt82c686.c|2 +- 39 files changed, 927 insertions(+), 915 deletions(-) -- 1.7.6.1
[Qemu-devel] [PULL 18/28] fdc: Convert isabus_fdc_init1 to MemoryRegion
From: Richard Henderson
This requires some amount of hoop-jumping, so that we don't
inadvertently claim port 0x3f6, which is used by ISA IDE.
The sysbus initialization path is as yet unconverted.
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/fdc.c | 53 +
1 files changed, 33 insertions(+), 20 deletions(-)
diff --git a/hw/fdc.c b/hw/fdc.c
index 1d44bbd..405d63d 100644
--- a/hw/fdc.c
+++ b/hw/fdc.c
@@ -425,6 +425,7 @@ struct FDCtrl {
typedef struct FDCtrlISABus {
ISADevice busdev;
+MemoryRegion io_0, io_7;
struct FDCtrl state;
int32_t bootindexA;
int32_t bootindexB;
@@ -490,16 +491,6 @@ static void fdctrl_write (void *opaque, uint32_t reg,
uint32_t value)
}
}
-static uint32_t fdctrl_read_port (void *opaque, uint32_t reg)
-{
-return fdctrl_read(opaque, reg & 7);
-}
-
-static void fdctrl_write_port (void *opaque, uint32_t reg, uint32_t value)
-{
-fdctrl_write(opaque, reg & 7, value);
-}
-
static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg)
{
return fdctrl_read(opaque, (uint32_t)reg);
@@ -1891,6 +1882,34 @@ static int fdctrl_init_common(FDCtrl *fdctrl)
return fdctrl_connect_drives(fdctrl);
}
+static uint32_t fdctrl_read_port_7(void *opaque, uint32_t reg)
+{
+return fdctrl_read(opaque, reg + 7);
+}
+
+static void fdctrl_write_port_7(void *opaque, uint32_t reg, uint32_t value)
+{
+fdctrl_write(opaque, reg + 7, value);
+}
+
+static const MemoryRegionPortio fdc_portio_0[] = {
+{ 1, 5, 1, .read = fdctrl_read, .write = fdctrl_write },
+PORTIO_END_OF_LIST()
+};
+
+static const MemoryRegionPortio fdc_portio_7[] = {
+{ 0, 1, 1, .read = fdctrl_read_port_7, .write = fdctrl_write_port_7 },
+PORTIO_END_OF_LIST()
+};
+
+static const MemoryRegionOps fdc_ioport_0_ops = {
+.old_portio = fdc_portio_0
+};
+
+static const MemoryRegionOps fdc_ioport_7_ops = {
+.old_portio = fdc_portio_7
+};
+
static int isabus_fdc_init1(ISADevice *dev)
{
FDCtrlISABus *isa = DO_UPCAST(FDCtrlISABus, busdev, dev);
@@ -1900,16 +1919,10 @@ static int isabus_fdc_init1(ISADevice *dev)
int dma_chann = 2;
int ret;
-register_ioport_read(iobase + 0x01, 5, 1,
- &fdctrl_read_port, fdctrl);
-register_ioport_read(iobase + 0x07, 1, 1,
- &fdctrl_read_port, fdctrl);
-register_ioport_write(iobase + 0x01, 5, 1,
- &fdctrl_write_port, fdctrl);
-register_ioport_write(iobase + 0x07, 1, 1,
- &fdctrl_write_port, fdctrl);
-isa_init_ioport_range(dev, iobase, 6);
-isa_init_ioport(dev, iobase + 7);
+memory_region_init_io(&isa->io_0, &fdc_ioport_0_ops, fdctrl, "fdc", 6);
+memory_region_init_io(&isa->io_7, &fdc_ioport_7_ops, fdctrl, "fdc", 1);
+isa_register_ioport(dev, &isa->io_0, iobase);
+isa_register_ioport(dev, &isa->io_7, iobase + 7);
isa_init_irq(&isa->busdev, &fdctrl->irq, isairq);
fdctrl->dma_chann = dma_chann;
--
1.7.6.1
[Qemu-devel] [PULL 12/28] cs4231a: Convert to MemoryRegion
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Avi Kivity
---
hw/cs4231a.c | 38 +++---
1 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/hw/cs4231a.c b/hw/cs4231a.c
index 598f032..e16665e 100644
--- a/hw/cs4231a.c
+++ b/hw/cs4231a.c
@@ -59,6 +59,7 @@
typedef struct CSState {
ISADevice dev;
QEMUSoundCard card;
+MemoryRegion ioports;
qemu_irq pic;
uint32_t regs[CS_REGS];
uint8_t dregs[CS_DREGS];
@@ -74,14 +75,6 @@
int16_t *tab;
} CSState;
-#define IO_READ_PROTO(name) \
-static uint32_t name (void *opaque, uint32_t addr)
-
-#define IO_WRITE_PROTO(name)\
-static void name (void *opaque, uint32_t addr, uint32_t val)
-
-#define GET_SADDR(addr) (addr & 3)
-
#define MODE2 (1 << 6)
#define MCE (1 << 6)
#define PMCE (1 << 4)
@@ -353,12 +346,12 @@ static void cs_reset_voices (CSState *s, uint32_t val)
}
}
-IO_READ_PROTO (cs_read)
+static uint64_t cs_read(void *opaque, target_phys_addr_t addr, unsigned size)
{
CSState *s = opaque;
uint32_t saddr, iaddr, ret;
-saddr = GET_SADDR (addr);
+saddr = addr;
iaddr = ~0U;
switch (saddr) {
@@ -390,12 +383,14 @@ static void cs_reset_voices (CSState *s, uint32_t val)
return ret;
}
-IO_WRITE_PROTO (cs_write)
+static void cs_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val64, unsigned size)
{
CSState *s = opaque;
-uint32_t saddr, iaddr;
+uint32_t saddr, iaddr, val;
-saddr = GET_SADDR (addr);
+saddr = addr;
+val = val64;
switch (saddr) {
case Index_Address:
@@ -637,18 +632,23 @@ static int cs4231a_post_load (void *opaque, int
version_id)
}
};
+static const MemoryRegionOps cs_ioport_ops = {
+.read = cs_read,
+.write = cs_write,
+.impl = {
+.min_access_size = 1,
+.max_access_size = 1,
+}
+};
+
static int cs4231a_initfn (ISADevice *dev)
{
CSState *s = DO_UPCAST (CSState, dev, dev);
-int i;
isa_init_irq (dev, &s->pic, s->irq);
-for (i = 0; i < 4; i++) {
-isa_init_ioport(dev, i);
-register_ioport_write (s->port + i, 1, 1, cs_write, s);
-register_ioport_read (s->port + i, 1, 1, cs_read, s);
-}
+memory_region_init_io(&s->ioports, &cs_ioport_ops, s, "cs4231a", 4);
+isa_register_ioport(dev, &s->ioports, s->port);
DMA_register_channel (s->dma, cs_dma_read, s);
--
1.7.6.1
[Qemu-devel] [PULL 19/28] pci: simplify memory region registration
The two code paths (for ADDRESS_SPACE_IO and ADDRESS_SPACE_MEM) are
identical. Unify them.
Signed-off-by: Avi Kivity
---
hw/pci.c | 13 ++---
1 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/hw/pci.c b/hw/pci.c
index d23fa74..a4d7761 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -1048,17 +1048,8 @@ static void pci_update_mappings(PCIDevice *d)
* Teach them such cases, such that filtered_size < size and
* addr & (size - 1) != 0.
*/
-if (r->type & PCI_BASE_ADDRESS_SPACE_IO) {
-memory_region_add_subregion_overlap(r->address_space,
-r->addr,
-r->memory,
-1);
-} else {
-memory_region_add_subregion_overlap(r->address_space,
-r->addr,
-r->memory,
-1);
-}
+memory_region_add_subregion_overlap(r->address_space,
+r->addr, r->memory, 1);
}
}
}
--
1.7.6.1
[Qemu-devel] [PULL 24/28] etrax-eth: Convert to MemoryRegion
From: "Edgar E. Iglesias"
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Avi Kivity
---
hw/etraxfs_eth.c | 30 --
1 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/hw/etraxfs_eth.c b/hw/etraxfs_eth.c
index 48de6dc..246a279 100644
--- a/hw/etraxfs_eth.c
+++ b/hw/etraxfs_eth.c
@@ -320,6 +320,7 @@ static void mdio_cycle(struct qemu_mdio *bus)
struct fs_eth
{
SysBusDevice busdev;
+ MemoryRegion mmio;
NICState *nic;
NICConf conf;
int ethregs;
@@ -373,7 +374,8 @@ static void eth_validate_duplex(struct fs_eth *eth)
}
}
-static uint32_t eth_readl (void *opaque, target_phys_addr_t addr)
+static uint64_t
+eth_read(void *opaque, target_phys_addr_t addr, unsigned int size)
{
struct fs_eth *eth = opaque;
uint32_t r = 0;
@@ -417,9 +419,11 @@ static void eth_update_ma(struct fs_eth *eth, int ma)
}
static void
-eth_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
+eth_write(void *opaque, target_phys_addr_t addr,
+ uint64_t val64, unsigned int size)
{
struct fs_eth *eth = opaque;
+ uint32_t value = val64;
addr >>= 2;
switch (addr)
@@ -553,14 +557,14 @@ static void eth_set_link(VLANClientState *nc)
eth->phy.link = !nc->link_down;
}
-static CPUReadMemoryFunc * const eth_read[] = {
- NULL, NULL,
- ð_readl,
-};
-
-static CPUWriteMemoryFunc * const eth_write[] = {
- NULL, NULL,
- ð_writel,
+static const MemoryRegionOps eth_ops = {
+ .read = eth_read,
+ .write = eth_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .valid = {
+ .min_access_size = 4,
+ .max_access_size = 4
+ }
};
static void eth_cleanup(VLANClientState *nc)
@@ -589,7 +593,6 @@ static void eth_cleanup(VLANClientState *nc)
static int fs_eth_init(SysBusDevice *dev)
{
struct fs_eth *s = FROM_SYSBUS(typeof(*s), dev);
- int eth_regs;
if (!s->dma_out || !s->dma_in) {
hw_error("Unconnected ETRAX-FS Ethernet MAC.\n");
@@ -600,9 +603,8 @@ static int fs_eth_init(SysBusDevice *dev)
s->dma_in->client.opaque = s;
s->dma_in->client.pull = NULL;
- eth_regs = cpu_register_io_memory(eth_read, eth_write, s,
- DEVICE_LITTLE_ENDIAN);
- sysbus_init_mmio(dev, 0x5c, eth_regs);
+ memory_region_init_io(&s->mmio, ð_ops, s, "etraxfs-eth", 0x5c);
+ sysbus_init_mmio_region(dev, &s->mmio);
qemu_macaddr_default_if_unset(&s->conf.macaddr);
s->nic = qemu_new_nic(&net_etraxfs_info, &s->conf,
--
1.7.6.1
Re: [Qemu-devel] [PULL 15/28] i8259: Convert to MemoryRegion
On 2011-09-12 12:50, Avi Kivity wrote:
> From: Richard Henderson
>
> The only non-obvious part is pic_poll_read which used
> "addr1 >> 7" to detect whether one referred to either
> the master or slave PIC. Instead, test this directly.
I've an unfinished queue here that, among other things, took some of
the PIC mess away via
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -129,7 +129,7 @@ static inline uint32_t _PPC_intack_read(target_phys_addr_t
addr)
uint32_t retval = 0;
if ((addr & 0xf) == 0)
-retval = pic_intack_read(isa_pic);
+retval = pic_read_irq(isa_pic);
#if 0
printf("%s: 0x" TARGET_FMT_plx " <= %08" PRIx32 "\n", __func__, addr,
retval);
I've found no regression in prep due to this and was able to kill both
pic_poll_read and pic_intack_read this way.
I've no problem to (later on) rebase my PIC refactorings (properly
decouple both chips and qdev'ify them) on top of this, but maybe the
prep cleanup would already make this patch nicer. Should I break out
that patch?
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
Re: [Qemu-devel] [PULL 00/28] Memory API conversion, batch 7
On 09/12/2011 07:29 AM, Avi Kivity wrote: On 09/12/2011 01:50 PM, Avi Kivity wrote: git://github.com/avikivity/qemu.git memory/batch More of the same. I tested what I could using the images on the qemu wiki - note not all images boot even on upstream. Whoops - don't pull - bad patch in there. Could you adjust your script to only post a single [PULL] note and then have a normal patch series with [PATCH] in the tag for the posted patches? It's not terribly important, but I think it makes more sense semantically and helps for anyone doing search via PATCH. You could make do [PULL][PATCH N/M] if you wanted to indicate it's a patch that's part of a pull request. Regards, Anthony Liguori
Re: [Qemu-devel] [PULL 00/28] Memory API conversion, batch 7
On 09/12/2011 03:57 PM, Anthony Liguori wrote: On 09/12/2011 07:29 AM, Avi Kivity wrote: On 09/12/2011 01:50 PM, Avi Kivity wrote: git://github.com/avikivity/qemu.git memory/batch More of the same. I tested what I could using the images on the qemu wiki - note not all images boot even on upstream. Whoops - don't pull - bad patch in there. Could you adjust your script to only post a single [PULL] note and then have a normal patch series with [PATCH] in the tag for the posted patches? It's not terribly important, but I think it makes more sense semantically and helps for anyone doing search via PATCH. You could make do [PULL][PATCH N/M] if you wanted to indicate it's a patch that's part of a pull request. I don't think git format-patch allows it, but it's easy to adjust the cover letter manually. -- error compiling committee.c: too many arguments to function
[Qemu-devel] KVM call agenda for Septemebre 13
Hi Please send in any agenda items you are interested in covering. Thanks, Juan.
[Qemu-devel] [PATCH] mips_malta: move i8259 initialization after piix4 initialization
i8259 is an ISA device (or at least, depends on the ISA infrastructure to
register its ioport); and the ISA bus is supplied by piix4. Later patches
make this dependency explicit.
Move the i8259 initialization until after the ISA bus is created; and supply
a new qemu_irq to PCI initialization, since the i8259 isn't ready yet. Later
wire the new qemu_irq to the i8259.
Signed-off-by: Avi Kivity
---
Part of batch 7, but nasty, so sending it by itself.
Not sure this is the right approach - the i8259 is not really an ISA device.
However, disentangling it from ISA is hard.
hw/mips_malta.c | 27 ++-
1 files changed, 22 insertions(+), 5 deletions(-)
diff --git a/hw/mips_malta.c b/hw/mips_malta.c
index 0110daa..f7297e7 100644
--- a/hw/mips_malta.c
+++ b/hw/mips_malta.c
@@ -72,6 +72,10 @@
SerialState *uart;
} MaltaFPGAState;
+typedef struct MaltaISAState {
+qemu_irq *i8259;
+} MaltaISAState;
+
static ISADevice *pit;
static struct _loaderparams {
@@ -763,6 +767,15 @@ static void cpu_request_exit(void *opaque, int irq, int
level)
}
}
+static void malta_isa_irq_handler(void *opaque, int n, int level)
+{
+MaltaISAState *s = opaque;
+
+if (s->i8259) {
+qemu_set_irq(s->i8259[n], level);
+}
+}
+
static
void mips_malta_init (ram_addr_t ram_size,
const char *boot_device,
@@ -778,7 +791,8 @@ void mips_malta_init (ram_addr_t ram_size,
int64_t kernel_entry;
PCIBus *pci_bus;
CPUState *env;
-qemu_irq *i8259;
+qemu_irq *i8259, *isa_irq;
+MaltaISAState *malta_isa = g_new0(MaltaISAState, 1);
qemu_irq *cpu_exit_irq;
int piix4_devfn;
i2c_bus *smbus;
@@ -928,17 +942,20 @@ void mips_malta_init (ram_addr_t ram_size,
cpu_mips_irq_init_cpu(env);
cpu_mips_clock_init(env);
-/* Interrupt controller */
-/* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */
-i8259 = i8259_init(env->irq[2]);
+isa_irq = qemu_allocate_irqs(malta_isa_irq_handler, malta_isa, 16);
/* Northbridge */
-pci_bus = gt64120_register(i8259);
+pci_bus = gt64120_register(isa_irq);
/* Southbridge */
ide_drive_get(hd, MAX_IDE_BUS);
piix4_devfn = piix4_init(pci_bus, 80);
+
+/* Interrupt controller */
+/* The 8259 is attached to the MIPS CPU INT0 pin, ie interrupt 2 */
+malta_isa->i8259 = i8259 = i8259_init(env->irq[2]);
+
isa_bus_irqs(i8259);
pci_piix4_ide_init(pci_bus, hd, piix4_devfn + 1);
usb_uhci_piix4_init(pci_bus, piix4_devfn + 2);
--
1.7.6.1
Re: [Qemu-devel] KVM call agenda for Septemebre 13
On 09/12/2011 08:07 AM, Juan Quintela wrote: Hi Please send in any agenda items you are interested in covering. - Device state visualization Regards, Anthony Liguori Thanks, Juan.
Re: [Qemu-devel] KVM call agenda for Septemebre 13
On 2011-09-12 15:12, Anthony Liguori wrote: > On 09/12/2011 08:07 AM, Juan Quintela wrote: >> Hi >> >> Please send in any agenda items you are interested in covering. > > - Device state visualization Wow, still that controversial? Reminds me that you asked me for some visitor adaption I haven't looked into yet... Jan -- Siemens AG, Corporate Technology, CT T DE IT 1 Corporate Competence Center Embedded Linux
Re: [Qemu-devel] KVM call agenda for Septemebre 13
On 09/12/2011 08:15 AM, Jan Kiszka wrote: On 2011-09-12 15:12, Anthony Liguori wrote: On 09/12/2011 08:07 AM, Juan Quintela wrote: Hi Please send in any agenda items you are interested in covering. - Device state visualization Wow, still that controversial? No, I just wanted to chat about different methods for moving forward. Doing OTP is a bit easier than having a 30 email long thread :-) Regards, Anthony Liguori Reminds me that you asked me for some visitor adaption I haven't looked into yet... Jan
[Qemu-devel] [PATCH] pci: Remove unused mem_base from PCIBus
Obsoleted by f64e02b6cc.
Signed-off-by: Jan Kiszka
---
hw/pci_internals.h |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/hw/pci_internals.h b/hw/pci_internals.h
index c7fd23d..10b4adf 100644
--- a/hw/pci_internals.h
+++ b/hw/pci_internals.h
@@ -24,7 +24,6 @@ struct PCIBus {
void *irq_opaque;
PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
PCIDevice *parent_dev;
-target_phys_addr_t mem_base;
MemoryRegion *address_space_mem;
MemoryRegion *address_space_io;
--
1.7.3.4
Re: [Qemu-devel] Question on kvm_clock working ...
Hi Folks, Still seeking your guidance on this. Appreciate any pointers you may have. Thanks much. -a On Fri, Sep 9, 2011 at 11:28 AM, al pat wrote: > > We are doing an experiment with kvm-clock to validate its effectiveness, > particularly when running NTP on the host to make sure the host’s clock > stays properly sync. > Our observations leads us to a few unanswered questions, including the > possibility of a bug (our our misunderstanding of how kvm_clock should > work). > > Our understanding is that kvm_clock will help sync the clock between the > host and the guest. We do not observe this to happen in reality and thus > this question. > > We are using Ubuntu 11.04 on the host and the guest. > > The command we issue to launch the VM is the following: > > $ sudo kvm -m 500 -rtc clock=host guestos.img > > We also arranged for Ubuntu to show the seconds on the clock displayed in > the menu. > > Observation 1: > Upon launching the VM, we see a time difference between the 2 clock ranging > from 1 to 2 seconds. > > Observation 2: > If we change the date on the host (with a command such as “date --set > 10:00:00 AM Sep 9, 2011”), the time on the guest remains the same, > unaffected. > > Observation 3: > After running for a while without NTP on the host, we run “ntpdate” to sync > up the host, but the guest stick with whatever previous time. > > > Another test we will run is to have ntpd on the host and wait for an > extended time to see if the guest drifts away from that original 1 or 2 > second lag. In the meantime, we are asking you for some input in this > regards: > Questions > -What does the “–rtc clock” option is supposed to mean exactly? According > to the man page, the guest should get its time from the host, but neither > date nor an “ntpdate” affected the clock on the guest. > -What are the other options that we should use? > >-rtc [base=utc|localtime|date][,clock=host|vm][,driftfix=none|slew] > Specify base as "utc" or "localtime" to let the RTC start at the > current UTC or local time, respectively. "localtime" is required > for correct date in MS-DOS or Windows. To start at a specific > point > in time, provide date in the format "2006-06-17T16:01:21" or >"2006-06-17". The default base is UTC. > > By default the RTC is driven by the host system time. This allows > to use the RTC as accurate reference clock inside the guest, > specifically if the host time is smoothly following an accurate > external reference clock, e.g. via NTP. If you want to isolate > the > guest time from the host, even prevent it from progressing during > suspension, you can set clock to "vm" instead. > > Enable driftfix (i386 targets only) if you experience time drift > problems, specifically with Windows' ACPI HAL. This option will > try > to figure out how many timer interrupts were not processed by the > Windows guest and will re-inject them. > > > Can someone shed light on what we are missing? Any pointers will be > helpful. > > Thanks > -a > >
Re: [Qemu-devel] [PULL 15/28] i8259: Convert to MemoryRegion
On 2011-09-12 14:54, Jan Kiszka wrote:
> On 2011-09-12 12:50, Avi Kivity wrote:
>> From: Richard Henderson
>>
>> The only non-obvious part is pic_poll_read which used
>> "addr1 >> 7" to detect whether one referred to either
>> the master or slave PIC. Instead, test this directly.
>
> I've an unfinished queue here that, among other things, took some of
> the PIC mess away via
>
> --- a/hw/ppc_prep.c
> +++ b/hw/ppc_prep.c
> @@ -129,7 +129,7 @@ static inline uint32_t
> _PPC_intack_read(target_phys_addr_t addr)
> uint32_t retval = 0;
>
> if ((addr & 0xf) == 0)
> -retval = pic_intack_read(isa_pic);
> +retval = pic_read_irq(isa_pic);
> #if 0
> printf("%s: 0x" TARGET_FMT_plx " <= %08" PRIx32 "\n", __func__, addr,
> retval);
>
> I've found no regression in prep due to this and was able to kill both
> pic_poll_read and pic_intack_read this way.
>
> I've no problem to (later on) rebase my PIC refactorings (properly
> decouple both chips and qdev'ify them) on top of this, but maybe the
> prep cleanup would already make this patch nicer. Should I break out
> that patch?
The patch is not that easy to break out as it depends on other changes,
e.g. a fix for the broken poll command implementation in our i8259. That
probably leads too far for this conversion.
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
Re: [Qemu-devel] [PATCH] PPC: Fix via-cuda memory registration
On 09/12/2011 06:07 AM, Avi Kivity wrote: On 09/11/2011 02:38 PM, Alexander Graf wrote: Am 11.09.2011 um 12:41 schrieb Avi Kivity: > On 09/08/2011 07:54 PM, Alexander Graf wrote: >> PS: Please test your patches. This one could have been found with an invocation >> as simple as "qemu-system-ppc". We boot into the OpenBIOS prompt by default, >> so you wouldn't even have required a guest image or kernel. >> > > > Sorry about that. > > Note that it's pretty hard to test these patches. I often don't even know which binary as the device->target relationship is not immediately visible, The patch was explicitly to convert ppc ;). Yes, in this case. Not in the general case. > and I don't really know what to expect from the guest. The very easy check-fundamentals thing to do for ppc is to execute qemu-system-ppc without arguments. It should drop you into an OF prompt. Both memory api bugs on ppc I've seen now would have been exposed with that. I agree that we should have something slightly more sophisticated, but doing such a bare minimum test is almost for free to the tester and covers at least basic functionality :). I don't mind people introducibg subtle bugs in corner cases - these things happen. But an abort() when you execute the binary? That really shouldn't happen ever. This one is almost as bad. Yeah. > It would be best if we had a kvm-autotest testset for tcg, it would probably run in just a few minutes and increase confidence in these patches. Yeah, I am using kvm-autotest today for regression testing, but it's very hard to tell it to run multiple different binaries. The target program variable can only be set for an execution job, making it impossible to run multiple targets in one autotest run. Alexander, I've started to work on this, I'm clearing out my request list, last week I've implemented ticket 50, that was related to special block configuration for the tests, now I want to make it possible to support multiple binaries. Probably best to tell autotest about the directory, and let it pick up the binary. Still need some configuration to choose between qemu-kvm and qemu-system-x86_64. Lucas? Yes, that would also work, having different variants with different qemu and qemu-img paths. Those binaries would have to be already pre-built, but then we miss the ability autotest has of building the binaries and prepare the environment. It'd be like: variant1: qemu = /path/to/qemu1 qemu-img = /path/to/qemu-img1 extra_params = "--appropriate --extra --params2" variant2: qemu = /path/to/qemu2 qemu-img = /path/to/qemu-img2 extra_params = "--appropriate --extra --params2" Something like that. It's a feasible intermediate solution until I finish work on supporting multiple userspaces.
Re: [Qemu-devel] [PATCH] PPC: Fix via-cuda memory registration
On 09/12/2011 04:46 PM, Lucas Meneghel Rodrigues wrote: On 09/12/2011 06:07 AM, Avi Kivity wrote: On 09/11/2011 02:38 PM, Alexander Graf wrote: Am 11.09.2011 um 12:41 schrieb Avi Kivity: > On 09/08/2011 07:54 PM, Alexander Graf wrote: >> PS: Please test your patches. This one could have been found with an invocation >> as simple as "qemu-system-ppc". We boot into the OpenBIOS prompt by default, >> so you wouldn't even have required a guest image or kernel. >> > > > Sorry about that. > > Note that it's pretty hard to test these patches. I often don't even know which binary as the device->target relationship is not immediately visible, The patch was explicitly to convert ppc ;). Yes, in this case. Not in the general case. > and I don't really know what to expect from the guest. The very easy check-fundamentals thing to do for ppc is to execute qemu-system-ppc without arguments. It should drop you into an OF prompt. Both memory api bugs on ppc I've seen now would have been exposed with that. I agree that we should have something slightly more sophisticated, but doing such a bare minimum test is almost for free to the tester and covers at least basic functionality :). I don't mind people introducibg subtle bugs in corner cases - these things happen. But an abort() when you execute the binary? That really shouldn't happen ever. This one is almost as bad. Yeah. > It would be best if we had a kvm-autotest testset for tcg, it would probably run in just a few minutes and increase confidence in these patches. Yeah, I am using kvm-autotest today for regression testing, but it's very hard to tell it to run multiple different binaries. The target program variable can only be set for an execution job, making it impossible to run multiple targets in one autotest run. Alexander, I've started to work on this, I'm clearing out my request list, last week I've implemented ticket 50, that was related to special block configuration for the tests, now I want to make it possible to support multiple binaries. Probably best to tell autotest about the directory, and let it pick up the binary. Still need some configuration to choose between qemu-kvm and qemu-system-x86_64. Lucas? Yes, that would also work, having different variants with different qemu and qemu-img paths. Those binaries would have to be already pre-built, but then we miss the ability autotest has of building the binaries and prepare the environment. It'd be like: variant1: qemu = /path/to/qemu1 qemu-img = /path/to/qemu-img1 extra_params = "--appropriate --extra --params2" variant2: qemu = /path/to/qemu2 qemu-img = /path/to/qemu-img2 extra_params = "--appropriate --extra --params2" Something like that. It's a feasible intermediate solution until I finish work on supporting multiple userspaces. Another option is, now that the binary name 'qemu' is available for general use, make it possible to invoke everything with just one binary: qemu -system -target mips ... qemu-system -target mips ... qemu-system-mips ... are all equivalent. autotest should easily be able to pass different -target based on the test being run. -- error compiling committee.c: too many arguments to function
Re: [Qemu-devel] [PATCH 02/12] nbd: sync API definitions with upstream
Am 08.09.2011 17:24, schrieb Paolo Bonzini: > Signed-off-by: Paolo Bonzini > --- > nbd.c |2 ++ > nbd.h | 11 ++- > 2 files changed, 12 insertions(+), 1 deletions(-) Which upstream? I can't find any NBD version that defines a command/flag for TRIM. Kevin
[Qemu-devel] [PULL 00/35] Block patches
The following changes since commit 44520db10b1b92f272348ab7028e7afc68ac3edf: Gdbstub: Fix back-trace on SPARC32 (2011-09-10 18:12:35 +) are available in the git repository at: git://repo.or.cz/qemu/kevin.git for-anthony Frediano Ziglio (4): qcow2: removed unused depends_on field qcow2: initialize metadata before inserting in cluster_allocs qcow2: align cluster_data to block to improve performance using O_DIRECT qcow2: fix range check Markus Armbruster (27): ide: Fix ATA command READ to set ATAPI signature for CD-ROM ide: Use a table to declare which drive kinds accept each command ide: Reject ATA commands specific to drive kinds ide/atapi: Clean up misleading name in cmd_start_stop_unit() ide/atapi: Track tray open/close state scsi-disk: Factor out scsi_disk_emulate_start_stop() scsi-disk: Track tray open/close state block: Revert entanglement of bdrv_is_inserted() with tray status block: Drop tray status tracking, no longer used ide/atapi: Track tray locked state scsi-disk: Track tray locked state block: Leave enforcing tray lock to device models block: Drop medium lock tracking, ask device models instead block: Rename bdrv_set_locked() to bdrv_lock_medium() ide/atapi: Don't fail eject when tray is already open scsi-disk: Fix START_STOP to fail when it can't eject ide/atapi: Preserve tray state on migration block: Clean up remaining users of "removable" block: Drop BlockDriverState member removable block: Show whether the virtual tray is open in info block block: Move BlockConf & friends from block_int.h to block.h hw: Trim superfluous #include "block_int.h" block: New bdrv_set_buffer_alignment() block: Reset buffer alignment on detach nbd: Clean up use of block_int.h block: New change_media_cb() parameter load ide/atapi scsi-disk: Make monitor eject -f, then change work Sage Weil (3): rbd: allow client id to be specified in config string rbd: clean up, fix style rbd: fix leak in qemu_rbd_open failure paths Stefan Weil (1): ahci: Remove unused struct member block.c | 104 +--- block.h | 63 +-- block/nbd.c |1 + block/qcow2-cluster.c | 27 block/qcow2.c | 14 ++-- block/qcow2.h |1 - block/raw-posix.c |8 +- block/raw.c |6 +- block/rbd.c | 97 -- block_int.h | 40 + blockdev.c| 10 +-- hw/fdc.c |4 +- hw/ide/ahci.c |2 - hw/ide/ahci.h |1 - hw/ide/atapi.c| 58 -- hw/ide/cmd646.c |1 - hw/ide/core.c | 160 - hw/ide/ich.c |1 - hw/ide/internal.h |3 +- hw/ide/isa.c |1 - hw/ide/macio.c|1 - hw/ide/microdrive.c |1 - hw/ide/mmio.c |1 - hw/ide/pci.c |1 - hw/ide/via.c |1 - hw/lsi53c895a.c |1 - hw/scsi-bus.c | 10 +++ hw/scsi-disk.c| 69 ++--- hw/scsi-generic.c |1 - hw/scsi.h |5 +- hw/sd.c |2 +- hw/virtio-blk.c |3 +- hw/virtio.h |2 +- nbd.c |1 + nbd.h |2 - qmp-commands.hx |2 + trace-events |2 +- 37 files changed, 452 insertions(+), 255 deletions(-)
[Qemu-devel] [PATCH 12/35] scsi-disk: Track tray locked state
From: Markus Armbruster We already track it in BlockDriverState. Just like tray open/close state, we should track it in the device models instead, because it's device state. Signed-off-by: Markus Armbruster Signed-off-by: Kevin Wolf --- hw/scsi-disk.c |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/hw/scsi-disk.c b/hw/scsi-disk.c index f35ada4..e7358e3 100644 --- a/hw/scsi-disk.c +++ b/hw/scsi-disk.c @@ -73,6 +73,7 @@ struct SCSIDiskState char *version; char *serial; bool tray_open; +bool tray_locked; }; static int scsi_handle_rw_error(SCSIDiskReq *r, int error, int type); @@ -671,7 +672,7 @@ static int mode_sense_page(SCSIDiskState *s, int page, uint8_t **p_outbuf, p[5] = 0xff; /* CD DA, DA accurate, RW supported, RW corrected, C2 errors, ISRC, UPC, Bar code */ -p[6] = 0x2d | (bdrv_is_locked(s->bs)? 2 : 0); +p[6] = 0x2d | (s->tray_locked ? 2 : 0); /* Locking supported, jumper present, eject, tray */ p[7] = 0; /* no volume & mute control, no changer */ @@ -882,6 +883,7 @@ static int scsi_disk_emulate_command(SCSIDiskReq *r, uint8_t *outbuf) scsi_disk_emulate_start_stop(r); break; case ALLOW_MEDIUM_REMOVAL: +s->tray_locked = req->cmd.buf[4] & 1; bdrv_set_locked(s->bs, req->cmd.buf[4] & 1); break; case READ_CAPACITY_10: -- 1.7.6
[Qemu-devel] [PATCH 28/35] block: Reset buffer alignment on detach
From: Markus Armbruster BlockDriverState member buffer_alignment is initially 512. The device model may set them, with bdrv_set_buffer_alignment(). If the device model gets detached (hot unplug), the device's alignment is left behind. Only okay because device hot unplug automatically destroys the BlockDriverState. But that's a questionable feature, best not to rely on it. Signed-off-by: Markus Armbruster Signed-off-by: Kevin Wolf --- block.c |1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/block.c b/block.c index e986986..b006e58 100644 --- a/block.c +++ b/block.c @@ -788,6 +788,7 @@ void bdrv_detach_dev(BlockDriverState *bs, void *dev) bs->dev = NULL; bs->dev_ops = NULL; bs->dev_opaque = NULL; +bs->buffer_alignment = 512; } /* TODO change to return DeviceState * when all users are qdevified */ -- 1.7.6
[Qemu-devel] [PATCH 15/35] block: Rename bdrv_set_locked() to bdrv_lock_medium()
From: Markus Armbruster
While there, make the locked parameter bool.
Signed-off-by: Markus Armbruster
Signed-off-by: Kevin Wolf
---
block.c |8
block.h |2 +-
block/raw-posix.c |8
block/raw.c |6 +++---
block_int.h |2 +-
hw/ide/atapi.c|2 +-
hw/scsi-disk.c|2 +-
trace-events |2 +-
8 files changed, 16 insertions(+), 16 deletions(-)
diff --git a/block.c b/block.c
index 1e4be73..7225b15 100644
--- a/block.c
+++ b/block.c
@@ -3072,14 +3072,14 @@ void bdrv_eject(BlockDriverState *bs, int eject_flag)
* Lock or unlock the media (if it is locked, the user won't be able
* to eject it manually).
*/
-void bdrv_set_locked(BlockDriverState *bs, int locked)
+void bdrv_lock_medium(BlockDriverState *bs, bool locked)
{
BlockDriver *drv = bs->drv;
-trace_bdrv_set_locked(bs, locked);
+trace_bdrv_lock_medium(bs, locked);
-if (drv && drv->bdrv_set_locked) {
-drv->bdrv_set_locked(bs, locked);
+if (drv && drv->bdrv_lock_medium) {
+drv->bdrv_lock_medium(bs, locked);
}
}
diff --git a/block.h b/block.h
index 396ca0e..4691090 100644
--- a/block.h
+++ b/block.h
@@ -212,7 +212,7 @@ int bdrv_is_sg(BlockDriverState *bs);
int bdrv_enable_write_cache(BlockDriverState *bs);
int bdrv_is_inserted(BlockDriverState *bs);
int bdrv_media_changed(BlockDriverState *bs);
-void bdrv_set_locked(BlockDriverState *bs, int locked);
+void bdrv_lock_medium(BlockDriverState *bs, bool locked);
void bdrv_eject(BlockDriverState *bs, int eject_flag);
void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size);
BlockDriverState *bdrv_find(const char *name);
diff --git a/block/raw-posix.c b/block/raw-posix.c
index bcf50b2..a624f56 100644
--- a/block/raw-posix.c
+++ b/block/raw-posix.c
@@ -1362,7 +1362,7 @@ static void cdrom_eject(BlockDriverState *bs, int
eject_flag)
}
}
-static void cdrom_set_locked(BlockDriverState *bs, int locked)
+static void cdrom_lock_medium(BlockDriverState *bs, bool locked)
{
BDRVRawState *s = bs->opaque;
@@ -1400,7 +1400,7 @@ static BlockDriver bdrv_host_cdrom = {
/* removable device support */
.bdrv_is_inserted = cdrom_is_inserted,
.bdrv_eject = cdrom_eject,
-.bdrv_set_locked= cdrom_set_locked,
+.bdrv_lock_medium = cdrom_lock_medium,
/* generic scsi device */
.bdrv_ioctl = hdev_ioctl,
@@ -1481,7 +1481,7 @@ static void cdrom_eject(BlockDriverState *bs, int
eject_flag)
cdrom_reopen(bs);
}
-static void cdrom_set_locked(BlockDriverState *bs, int locked)
+static void cdrom_lock_medium(BlockDriverState *bs, bool locked)
{
BDRVRawState *s = bs->opaque;
@@ -1521,7 +1521,7 @@ static BlockDriver bdrv_host_cdrom = {
/* removable device support */
.bdrv_is_inserted = cdrom_is_inserted,
.bdrv_eject = cdrom_eject,
-.bdrv_set_locked= cdrom_set_locked,
+.bdrv_lock_medium = cdrom_lock_medium,
};
#endif /* __FreeBSD__ */
diff --git a/block/raw.c b/block/raw.c
index f197479..63cf2d3 100644
--- a/block/raw.c
+++ b/block/raw.c
@@ -85,9 +85,9 @@ static void raw_eject(BlockDriverState *bs, int eject_flag)
bdrv_eject(bs->file, eject_flag);
}
-static void raw_set_locked(BlockDriverState *bs, int locked)
+static void raw_lock_medium(BlockDriverState *bs, bool locked)
{
-bdrv_set_locked(bs->file, locked);
+bdrv_lock_medium(bs->file, locked);
}
static int raw_ioctl(BlockDriverState *bs, unsigned long int req, void *buf)
@@ -144,7 +144,7 @@ static BlockDriver bdrv_raw = {
.bdrv_is_inserted = raw_is_inserted,
.bdrv_media_changed = raw_media_changed,
.bdrv_eject = raw_eject,
-.bdrv_set_locked= raw_set_locked,
+.bdrv_lock_medium = raw_lock_medium,
.bdrv_ioctl = raw_ioctl,
.bdrv_aio_ioctl = raw_aio_ioctl,
diff --git a/block_int.h b/block_int.h
index 4f7ff3b..f42af2c 100644
--- a/block_int.h
+++ b/block_int.h
@@ -120,7 +120,7 @@ struct BlockDriver {
int (*bdrv_is_inserted)(BlockDriverState *bs);
int (*bdrv_media_changed)(BlockDriverState *bs);
void (*bdrv_eject)(BlockDriverState *bs, int eject_flag);
-void (*bdrv_set_locked)(BlockDriverState *bs, int locked);
+void (*bdrv_lock_medium)(BlockDriverState *bs, bool locked);
/* to control generic scsi devices */
int (*bdrv_ioctl)(BlockDriverState *bs, unsigned long int req, void *buf);
diff --git a/hw/ide/atapi.c b/hw/ide/atapi.c
index afb27c6..06778f3 100644
--- a/hw/ide/atapi.c
+++ b/hw/ide/atapi.c
@@ -833,7 +833,7 @@ static void cmd_test_unit_ready(IDEState *s, uint8_t *buf)
static void cmd_prevent_allow_medium_removal(IDEState *s, uint8_t* buf)
{
s->tray_locked = buf[4] & 1;
-bdrv_set_locked(s->bs, buf[4] & 1);
+bdrv_lock_medium(s->bs, buf[4] & 1);
ide_atapi_cmd_ok(s);
}
diff --git a/hw/scsi-disk.c b/hw/scsi-disk.c
index 42682d0..4e89bb1 100644
--- a/hw/scsi-disk.c
+++ b/hw/s
[Qemu-devel] [PATCH 20/35] scsi-disk: Fix START_STOP to fail when it can't eject
From: Markus Armbruster
Don't fail when tray is already open.
Signed-off-by: Markus Armbruster
Signed-off-by: Kevin Wolf
---
hw/scsi-bus.c | 10 ++
hw/scsi-disk.c | 15 +++
hw/scsi.h |4
3 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/hw/scsi-bus.c b/hw/scsi-bus.c
index 59d6ada..0248294 100644
--- a/hw/scsi-bus.c
+++ b/hw/scsi-bus.c
@@ -772,6 +772,11 @@ const struct SCSISense sense_code_NO_MEDIUM = {
.key = NOT_READY, .asc = 0x3a, .ascq = 0x00
};
+/* LUN not ready, medium removal prevented */
+const struct SCSISense sense_code_NOT_READY_REMOVAL_PREVENTED = {
+.key = NOT_READY, .asc = 0x53, .ascq = 0x00
+};
+
/* Hardware error, internal target failure */
const struct SCSISense sense_code_TARGET_FAILURE = {
.key = HARDWARE_ERROR, .asc = 0x44, .ascq = 0x00
@@ -807,6 +812,11 @@ const struct SCSISense sense_code_INCOMPATIBLE_MEDIUM = {
.key = ILLEGAL_REQUEST, .asc = 0x30, .ascq = 0x00
};
+/* Illegal request, medium removal prevented */
+const struct SCSISense sense_code_ILLEGAL_REQ_REMOVAL_PREVENTED = {
+.key = ILLEGAL_REQUEST, .asc = 0x53, .ascq = 0x00
+};
+
/* Command aborted, I/O process terminated */
const struct SCSISense sense_code_IO_ERROR = {
.key = ABORTED_COMMAND, .asc = 0x00, .ascq = 0x06
diff --git a/hw/scsi-disk.c b/hw/scsi-disk.c
index 4e89bb1..1a49217 100644
--- a/hw/scsi-disk.c
+++ b/hw/scsi-disk.c
@@ -822,7 +822,7 @@ static int scsi_disk_emulate_read_toc(SCSIRequest *req,
uint8_t *outbuf)
return toclen;
}
-static void scsi_disk_emulate_start_stop(SCSIDiskReq *r)
+static int scsi_disk_emulate_start_stop(SCSIDiskReq *r)
{
SCSIRequest *req = &r->req;
SCSIDiskState *s = DO_UPCAST(SCSIDiskState, qdev, req->dev);
@@ -830,12 +830,17 @@ static void scsi_disk_emulate_start_stop(SCSIDiskReq *r)
bool loej = req->cmd.buf[4] & 2; /* load on start, eject on !start */
if (s->qdev.type == TYPE_ROM && loej) {
-if (!start && s->tray_locked) {
-return;
+if (!start && !s->tray_open && s->tray_locked) {
+scsi_check_condition(r,
+ bdrv_is_inserted(s->bs)
+ ? SENSE_CODE(ILLEGAL_REQ_REMOVAL_PREVENTED)
+ : SENSE_CODE(NOT_READY_REMOVAL_PREVENTED));
+return -1;
}
bdrv_eject(s->bs, !start);
s->tray_open = !start;
}
+return 0;
}
static int scsi_disk_emulate_command(SCSIDiskReq *r, uint8_t *outbuf)
@@ -883,7 +888,9 @@ static int scsi_disk_emulate_command(SCSIDiskReq *r,
uint8_t *outbuf)
goto illegal_request;
break;
case START_STOP:
-scsi_disk_emulate_start_stop(r);
+if (scsi_disk_emulate_start_stop(r) < 0) {
+return -1;
+}
break;
case ALLOW_MEDIUM_REMOVAL:
s->tray_locked = req->cmd.buf[4] & 1;
diff --git a/hw/scsi.h b/hw/scsi.h
index 98fd689..a28cd68 100644
--- a/hw/scsi.h
+++ b/hw/scsi.h
@@ -136,6 +136,8 @@ extern const struct SCSISense sense_code_NO_SENSE;
extern const struct SCSISense sense_code_LUN_NOT_READY;
/* LUN not ready, Medium not present */
extern const struct SCSISense sense_code_NO_MEDIUM;
+/* LUN not ready, medium removal prevented */
+extern const struct SCSISense sense_code_NOT_READY_REMOVAL_PREVENTED;
/* Hardware error, internal target failure */
extern const struct SCSISense sense_code_TARGET_FAILURE;
/* Illegal request, invalid command operation code */
@@ -150,6 +152,8 @@ extern const struct SCSISense sense_code_LUN_NOT_SUPPORTED;
extern const struct SCSISense sense_code_SAVING_PARAMS_NOT_SUPPORTED;
/* Illegal request, Incompatible format */
extern const struct SCSISense sense_code_INCOMPATIBLE_FORMAT;
+/* Illegal request, medium removal prevented */
+extern const struct SCSISense sense_code_ILLEGAL_REQ_REMOVAL_PREVENTED;
/* Command aborted, I/O process terminated */
extern const struct SCSISense sense_code_IO_ERROR;
/* Command aborted, I_T Nexus loss occurred */
--
1.7.6
[Qemu-devel] [PATCH 31/35] ide/atapi scsi-disk: Make monitor eject -f, then change work
From: Markus Armbruster
change fails while the tray is locked by the guest. eject -f forces
it open and removes any media. Unfortunately, the tray closes again
instantly. Since the lock remains as it is, there is no way to insert
another medium unless the guest voluntarily unlocks.
Fix by leaving the tray open after monitor eject.
Signed-off-by: Markus Armbruster
Signed-off-by: Kevin Wolf
---
blockdev.c |3 ++-
hw/ide/core.c |1 +
hw/scsi-disk.c |1 +
3 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/blockdev.c b/blockdev.c
index 154cc84..0827bf7 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -635,7 +635,8 @@ static int eject_device(Monitor *mon, BlockDriverState *bs,
int force)
qerror_report(QERR_DEVICE_NOT_REMOVABLE, bdrv_get_device_name(bs));
return -1;
}
-if (!force && bdrv_dev_is_medium_locked(bs)) {
+if (!force && !bdrv_dev_is_tray_open(bs)
+&& bdrv_dev_is_medium_locked(bs)) {
qerror_report(QERR_DEVICE_LOCKED, bdrv_get_device_name(bs));
return -1;
}
diff --git a/hw/ide/core.c b/hw/ide/core.c
index 5def25c..9297b9e 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -789,6 +789,7 @@ static void ide_cd_change_cb(void *opaque, bool load)
IDEState *s = opaque;
uint64_t nb_sectors;
+s->tray_open = !load;
bdrv_get_geometry(s->bs, &nb_sectors);
s->nb_sectors = nb_sectors;
diff --git a/hw/scsi-disk.c b/hw/scsi-disk.c
index f5f1d82..4a60820 100644
--- a/hw/scsi-disk.c
+++ b/hw/scsi-disk.c
@@ -1175,6 +1175,7 @@ static void scsi_destroy(SCSIDevice *dev)
static void scsi_cd_change_media_cb(void *opaque, bool load)
{
+((SCSIDiskState *)opaque)->tray_open = !load;
}
static bool scsi_cd_is_tray_open(void *opaque)
--
1.7.6
[Qemu-devel] [PATCH 35/35] qcow2: fix range check
From: Frediano Ziglio
QCowL2Meta::offset is not cluster aligned but only sector aligned
however nb_clusters count cluster from cluster start.
This fix range check. Note that old code have no corruption issues
related to this check cause it only cause intersection to occur
when shouldn't.
Signed-off-by: Frediano Ziglio
Signed-off-by: Kevin Wolf
---
block/qcow2-cluster.c | 14 +++---
1 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/block/qcow2-cluster.c b/block/qcow2-cluster.c
index 428b5ad..2f76311 100644
--- a/block/qcow2-cluster.c
+++ b/block/qcow2-cluster.c
@@ -776,17 +776,17 @@ again:
*/
QLIST_FOREACH(old_alloc, &s->cluster_allocs, next_in_flight) {
-uint64_t end_offset = offset + nb_clusters * s->cluster_size;
-uint64_t old_offset = old_alloc->offset;
-uint64_t old_end_offset = old_alloc->offset +
-old_alloc->nb_clusters * s->cluster_size;
+uint64_t start = offset >> s->cluster_bits;
+uint64_t end = start + nb_clusters;
+uint64_t old_start = old_alloc->offset >> s->cluster_bits;
+uint64_t old_end = old_start + old_alloc->nb_clusters;
-if (end_offset < old_offset || offset > old_end_offset) {
+if (end < old_start || start > old_end) {
/* No intersection */
} else {
-if (offset < old_offset) {
+if (start < old_start) {
/* Stop at the start of a running allocation */
-nb_clusters = (old_offset - offset) >> s->cluster_bits;
+nb_clusters = old_start - start;
} else {
nb_clusters = 0;
}
--
1.7.6
Re: [Qemu-devel] [PATCH 1/1] qemu-img: async write to block device when converting image
Note that I assumed qemu-img runs in a single context (like qemu), and
there are no concurrency issues. If that's not the case, the callback,
error handling need to be fixed.
Yehuda
On Mon, Sep 12, 2011 at 7:26 AM, Yehuda Sadeh wrote:
> In order to improve image conversion process, instead of synchronously
> writing the destingation image, we keep a window of async writes.
>
> Signed-off-by: Yehuda Sadeh
> ---
> qemu-img.c | 47 +++
> 1 files changed, 43 insertions(+), 4 deletions(-)
>
> diff --git a/qemu-img.c b/qemu-img.c
> index 6a39731..a45f5f2 100644
> --- a/qemu-img.c
> +++ b/qemu-img.c
> @@ -646,6 +646,29 @@ static int compare_sectors(const uint8_t *buf1, const
> uint8_t *buf2, int n,
> }
>
> #define IO_BUF_SIZE (2 * 1024 * 1024)
> +#define IO_WRITE_WINDOW_THRESHOLD (32 * 1024 * 1024)
> +
> +static int write_window = 0;
> +static int write_ret = 0;
> +
> +struct write_info {
> + int64_t sector;
> + QEMUIOVector qiov;
> +};
> +
> +static void img_write_cb(void *opaque, int ret)
> +{
> + struct write_info *wr = (struct write_info *)opaque;
> + QEMUIOVector *qiov = &wr->qiov;
> + if (ret < 0) {
> + error_report("error while writing sector %" PRId64
> + ": %s", wr->sector, strerror(-ret));
> + write_ret = ret;
> + }
> + write_window -= qiov->iov->iov_len / 512;
> + qemu_iovec_destroy(qiov);
> + g_free(wr);
> +}
>
> static int img_convert(int argc, char **argv)
> {
> @@ -1019,6 +1042,9 @@ static int img_convert(int argc, char **argv)
> should add a specific call to have the info to go faster */
> buf1 = buf;
> while (n > 0) {
> + while (write_window > IO_WRITE_WINDOW_THRESHOLD / 512) {
> + qemu_aio_wait();
> + }
> /* If the output image is being created as a copy on write
> image,
> copy all sectors even the ones containing only NUL bytes,
> because they may differ from the sectors in the base image.
> @@ -1028,12 +1054,21 @@ static int img_convert(int argc, char **argv)
> already there is garbage, not 0s. */
> if (!has_zero_init || out_baseimg ||
> is_allocated_sectors_min(buf1, n, &n1, min_sparse)) {
> - ret = bdrv_write(out_bs, sector_num, buf1, n1);
> - if (ret < 0) {
> - error_report("error while writing sector %" PRId64
> - ": %s", sector_num, strerror(-ret));
> + QEMUIOVector *qiov;
> + struct write_info *wr;
> + BlockDriverAIOCB *acb;
> + wr = g_malloc0(sizeof(struct write_info));
> + qiov = &wr->qiov;
> + qemu_iovec_init(qiov, 1);
> + qemu_iovec_add(qiov, (void *)buf1, n1 * 512);
> + wr->sector = sector_num;
> + acb = bdrv_aio_writev(out_bs, sector_num, qiov, n1,
> img_write_cb, wr);
> + if (!acb) {
> + g_free(wr);
> + error_report("I/O error while writing sector %"
> PRId64, sector_num);
> goto out;
> }
> + write_window += n1;
> }
> sector_num += n1;
> n -= n1;
> @@ -1041,6 +1076,9 @@ static int img_convert(int argc, char **argv)
> }
> qemu_progress_print(local_progress, 100);
> }
> + while (write_window > 0) {
> + qemu_aio_wait();
> + }
> }
> out:
> qemu_progress_end();
> @@ -1048,6 +1086,7 @@ out:
> free_option_parameters(param);
> qemu_vfree(buf);
> if (out_bs) {
> + bdrv_flush(out_bs);
> bdrv_delete(out_bs);
> }
> if (bs) {
> --
> 1.7.5.1
>
>
[Qemu-devel] [PATCH 08/35] scsi-disk: Track tray open/close state
From: Markus Armbruster
We already track it in BlockDriverState since commit 4be9762a. As
discussed in that commit's message, we should track it in the device
device models instead, because it's device state.
Signed-off-by: Markus Armbruster
Signed-off-by: Kevin Wolf
---
hw/scsi-disk.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/hw/scsi-disk.c b/hw/scsi-disk.c
index c8ad2e7..f18ddd7 100644
--- a/hw/scsi-disk.c
+++ b/hw/scsi-disk.c
@@ -72,6 +72,7 @@ struct SCSIDiskState
QEMUBH *bh;
char *version;
char *serial;
+bool tray_open;
};
static int scsi_handle_rw_error(SCSIDiskReq *r, int error, int type);
@@ -823,6 +824,7 @@ static void scsi_disk_emulate_start_stop(SCSIDiskReq *r)
if (s->qdev.type == TYPE_ROM && loej) {
bdrv_eject(s->bs, !start);
+s->tray_open = !start;
}
}
--
1.7.6
[Qemu-devel] [PATCH v2] hw/integratorcp: Fix bugs in writes to CM_CTRL system register
Fix a number of bugs in the implementation of writes to the CM_CTRL
system register:
* write to cm_ctrl, not cm_init !
* an '&' vs '^' typo meant we would write the inverse of the bits
* handling the LED via printf() meant we spew lots of output
to stdout when Linux uses the LED as a heartbeat indicator
* we would hw_error() if a reset was requested rather than
actually resetting
Signed-off-by: Peter Maydell
---
This is just a retransmit rebased following some of Avi's MemoryRegion
patches landing, no other changes from v1.
hw/integratorcp.c | 16 +++-
1 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/hw/integratorcp.c b/hw/integratorcp.c
index 3c8982e..9a289b4 100644
--- a/hw/integratorcp.c
+++ b/hw/integratorcp.c
@@ -14,6 +14,7 @@
#include "arm-misc.h"
#include "net.h"
#include "exec-memory.h"
+#include "sysemu.h"
typedef struct {
SysBusDevice busdev;
@@ -126,15 +127,20 @@ static void integratorcm_do_remap(integratorcm_state *s,
int flash)
static void integratorcm_set_ctrl(integratorcm_state *s, uint32_t value)
{
if (value & 8) {
-hw_error("Board reset\n");
+qemu_system_reset_request();
}
-if ((s->cm_init ^ value) & 4) {
+if ((s->cm_ctrl ^ value) & 4) {
integratorcm_do_remap(s, (value & 4) == 0);
}
-if ((s->cm_init ^ value) & 1) {
-printf("Green LED %s\n", (value & 1) ? "on" : "off");
+if ((s->cm_ctrl ^ value) & 1) {
+/* (value & 1) != 0 means the green "MISC LED" is lit.
+ * We don't have any nice place to display LEDs. printf is a bad
+ * idea because Linux uses the LED as a heartbeat and the output
+ * will swamp anything else on the terminal.
+ */
}
-s->cm_init = (s->cm_init & ~ 5) | (value ^ 5);
+/* Note that the RESET bit [3] always reads as zero */
+s->cm_ctrl = (s->cm_ctrl & ~5) | (value & 5);
}
static void integratorcm_update(integratorcm_state *s)
--
1.7.1
[Qemu-devel] [PATCH 19/35] ide/atapi: Don't fail eject when tray is already open
From: Markus Armbruster
MMC-5 6.40.2.6 specifies that START STOP UNIT succeeds when the drive
already has the requested state. cmd_start_stop_unit() fails when
asked to eject while the tray is open and locked. Fix that.
Signed-off-by: Markus Armbruster
Signed-off-by: Kevin Wolf
---
hw/ide/atapi.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/ide/atapi.c b/hw/ide/atapi.c
index 06778f3..3f909c3 100644
--- a/hw/ide/atapi.c
+++ b/hw/ide/atapi.c
@@ -910,7 +910,7 @@ static void cmd_start_stop_unit(IDEState *s, uint8_t* buf)
bool loej = buf[4] & 2; /* load on start, eject on !start */
if (loej) {
-if (!start && s->tray_locked) {
+if (!start && !s->tray_open && s->tray_locked) {
sense = bdrv_is_inserted(s->bs)
? SENSE_NOT_READY : SENSE_ILLEGAL_REQUEST;
ide_atapi_cmd_error(s, sense, ASC_MEDIA_REMOVAL_PREVENTED);
--
1.7.6
[Qemu-devel] [PATCH 0/6] QED block conversion
This patch series adds support for block conversion to the qed driver. This depends on my precivious block conversion api series Devin Nakamura (6): qed: add qed_find_cluster_sync() qed: add bdrv_qed_get_conversion_options() qed: add open_conversion_target() qed: add qed_bdrv_get_mapping() qed: add bdrv_qed_map() qed: add bdrv_qed_copy_header() block/qed-cluster.c | 33 +++ block/qed.c | 161 +++ block/qed.h |4 + 3 files changed, 198 insertions(+), 0 deletions(-) -- 1.7.6.rc1
[Qemu-devel] [PATCH 1/6] qed: add qed_find_cluster_sync()
Signed-off-by: Devin Nakamura
---
block/qed-cluster.c | 33 +
block/qed.h |4
2 files changed, 37 insertions(+), 0 deletions(-)
diff --git a/block/qed-cluster.c b/block/qed-cluster.c
index f64b2af..6e68ba7 100644
--- a/block/qed-cluster.c
+++ b/block/qed-cluster.c
@@ -163,3 +163,36 @@ void qed_find_cluster(BDRVQEDState *s, QEDRequest
*request, uint64_t pos,
qed_read_l2_table(s, request, l2_offset,
qed_find_cluster_cb, find_cluster_cb);
}
+
+typedef struct {
+int ret;
+uint64_t *offset;
+size_t *len;
+} QEDFindClusterSyncCB;
+
+static void qed_find_cluster_sync_cb(void *opaque, int ret, uint64_t offset,
+ size_t len)
+{
+QEDFindClusterSyncCB *find_cluster_sync_cb = opaque;
+*find_cluster_sync_cb->offset = offset;
+*find_cluster_sync_cb->len = len;
+find_cluster_sync_cb->ret = ret;
+}
+
+int qed_find_cluster_sync(BDRVQEDState *s, QEDRequest *request, uint64_t pos,
+ size_t len, uint64_t *offset,
+ size_t *contiguous_bytes)
+{
+QEDFindClusterSyncCB find_cluster_cb;
+find_cluster_cb.ret = -EINPROGRESS;
+find_cluster_cb.offset = offset;
+find_cluster_cb.len = contiguous_bytes;
+
+qed_find_cluster(s, request, pos, len, &qed_find_cluster_sync_cb,
+ &find_cluster_cb);
+while (find_cluster_cb.ret == -EINPROGRESS) {
+qemu_aio_wait();
+}
+
+return find_cluster_cb.ret;
+}
diff --git a/block/qed.h b/block/qed.h
index 388fdb3..c899c15 100644
--- a/block/qed.h
+++ b/block/qed.h
@@ -239,6 +239,10 @@ int qed_write_l2_table_sync(BDRVQEDState *s, QEDRequest
*request,
void qed_find_cluster(BDRVQEDState *s, QEDRequest *request, uint64_t pos,
size_t len, QEDFindClusterFunc *cb, void *opaque);
+int qed_find_cluster_sync(BDRVQEDState *s, QEDRequest *request, uint64_t pos,
+ size_t len, uint64_t *offset,
+ size_t *contiguous_bytes);
+
/**
* Consistency check
*/
--
1.7.6.rc1
[Qemu-devel] [PATCH 3/6] qed: add open_conversion_target()
Signed-off-by: Devin Nakamura
---
block/qed.c | 57 +
1 files changed, 57 insertions(+), 0 deletions(-)
diff --git a/block/qed.c b/block/qed.c
index 16320f5..93827db 100644
--- a/block/qed.c
+++ b/block/qed.c
@@ -1456,6 +1456,62 @@ static int
bdrv_qed_get_conversion_options(BlockDriverState *bs,
return 0;
}
+static int bdrv_qed_open_conversion_target(BlockDriverState *bs,
+ BlockConversionOptions *drv_options,
+ QEMUOptionParameter *usr_options,
+ bool force)
+{
+BDRVQEDState *s = bs->opaque;
+s->bs = bs;
+if (drv_options->encryption_type != BLOCK_CRYPT_NONE) {
+error_report("Encryption not supported");
+return -ENOTSUP;
+}
+if(drv_options->nb_snapshots && !force) {
+error_report("Snapshots are not supported");
+return -ENOTSUP;
+}
+s->header.magic = QED_MAGIC;
+s->header.table_size = QED_DEFAULT_TABLE_SIZE;
+if(qed_is_cluster_size_valid(drv_options->cluster_size)) {
+s->header.cluster_size = drv_options->cluster_size;
+} else {
+error_report("Invalid cluster size");
+return -EINVAL;
+}
+if(qed_is_image_size_valid(drv_options->image_size, s->header.cluster_size,
+ s->header.table_size)) {
+s->header.image_size = drv_options->image_size;
+} else {
+error_report("Invalid image size");
+return -EINVAL;
+}
+s->file_size = qed_Start_of_cluster(s, bs->file->total_sectors +
+drv_options->cluster_size -1);
+s->l1_table = qed_alloc_table(s);
+s->header.l1_table_offset = qed_alloc_clusters(s, s->header.table_size);
+QSIMPLEQ_INIT(&s->allocating_write_reqs);
+
+
+if (!qed_check_table_offset(s, s->header.l1_table_offset)) {
+error_report("Invalid L1 table offset");
+return -EINVAL;
+}
+
+s->table_nelems = (s->header.cluster_size * s->header.table_size) /
+ sizeof(uint64_t);
+s->l2_shift = ffs(s->header.cluster_size) - 1;
+s->l2_mask = s->table_nelems - 1;
+s->l1_shift = s->l2_shift + ffs(s->table_nelems) - 1;
+
+qed_init_l2_cache(&s->l2_cache);
+
+s->need_check_timer = qemu_new_timer_ns(vm_clock,
+qed_need_check_timer_cb, s);
+qed_write_l1_table_sync(s, 0, s->table_nelems);
+return 0;
+}
+
static QEMUOptionParameter qed_create_options[] = {
{
.name = BLOCK_OPT_SIZE,
@@ -1503,6 +1559,7 @@ static BlockDriver bdrv_qed = {
.bdrv_change_backing_file = bdrv_qed_change_backing_file,
.bdrv_check = bdrv_qed_check,
.bdrv_get_conversion_options = bdrv_qed_get_conversion_options,
+.bdrv_open_conversion_target = bdrv_qed_open_conversion_target,
};
static void bdrv_qed_init(void)
--
1.7.6.rc1
