Re: [Qemu-devel] [PATCH 0/9] Intel Mac target support
Alexander Graf: Thank you VERY much for providing us with "intel mac" emulation. -- -Alexey Eremenko "Technologov"
Re: [Qemu-devel] Fix double backslash problem in Windows
Le jeudi 10 janvier 2008 à 19:13 +0100, Laurent Vivier a écrit :
> Le jeudi 10 janvier 2008 à 16:02 +0100, Laurent Vivier a écrit :
> > Le jeudi 10 janvier 2008 à 15:18 +0100, Jernej Simončič a écrit :
> > > On Thursday, January 10, 2008, 14:58:28, Laurent Vivier wrote:
> > >
> > > > Do you like '^' ?
> > >
> > > Bad idea - this is the escape character in Windows shell :)
> >
> > Perhaps this should work:
> >
> > - option name must end with '='
> > - option value must end with ',' or '\0' (allows '=' in filename)
> > - if option name must have ',', we double it (allows ',' in filename)
> > - ' ', '\' and '"' are not separators at this level and are managed at
> > shell level
>
> Here is the patch.
>
After a night of thought, I think it is better to merge my patch with
one from Johannes.
Here it is.
Laurent
--
- [EMAIL PROTECTED] --
"La perfection est atteinte non quand il ne reste rien à
ajouter mais quand il ne reste rien à enlever." Saint Exupéry
Signed-off-by: Johannes Schindelin <[EMAIL PROTECTED]>
Signed-off-by: Laurent Vivier <[EMAIL PROTECTED]>
---
qemu-doc.texi |3 +
vl.c | 108 +-
2 files changed, 64 insertions(+), 47 deletions(-)
Index: qemu/vl.c
===
--- qemu.orig/vl.c 2008-01-11 09:49:42.0 +0100
+++ qemu/vl.c 2008-01-11 09:51:14.0 +0100
@@ -231,7 +231,10 @@ unsigned int nb_prom_envs = 0;
const char *prom_envs[MAX_PROM_ENVS];
#endif
int nb_drives_opt;
-char drives_opt[MAX_DRIVES][1024];
+struct drive_opt {
+const char *file;
+char opt[1024];
+} drives_opt[MAX_DRIVES];
static CPUState *cur_cpu;
static CPUState *next_cpu;
@@ -4581,24 +4584,33 @@ static int net_socket_mcast_init(VLANSta
}
-static const char *get_word(char *buf, int buf_size, const char *p)
+static const char *get_opt_name(char *buf, int buf_size, const char *p)
+{
+char *q;
+
+q = buf;
+while (*p != '\0' && *p != '=') {
+if (q && (q - buf) < buf_size - 1)
+*q++ = *p;
+p++;
+}
+if (q)
+*q = '\0';
+
+return p;
+}
+
+static const char *get_opt_value(char *buf, int buf_size, const char *p)
{
char *q;
-int substring;
-substring = 0;
q = buf;
while (*p != '\0') {
-if (*p == '\\') {
-p++;
-if (*p == '\0')
+if (*p == ',') {
+if (*(p + 1) != ',')
break;
-} else if (*p == '\"') {
-substring = !substring;
p++;
-continue;
-} else if (!substring && (*p == ',' || *p == '='))
-break;
+}
if (q && (q - buf) < buf_size - 1)
*q++ = *p;
p++;
@@ -4617,15 +4629,15 @@ static int get_param_value(char *buf, in
p = str;
for(;;) {
-p = get_word(option, sizeof(option), p);
+p = get_opt_name(option, sizeof(option), p);
if (*p != '=')
break;
p++;
if (!strcmp(tag, option)) {
-(void)get_word(buf, buf_size, p);
+(void)get_opt_value(buf, buf_size, p);
return strlen(buf);
} else {
-p = get_word(NULL, 0, p);
+p = get_opt_value(NULL, 0, p);
}
if (*p != ',')
break;
@@ -4642,7 +4654,7 @@ static int check_params(char *buf, int b
p = str;
for(;;) {
-p = get_word(buf, buf_size, p);
+p = get_opt_name(buf, buf_size, p);
if (*p != '=')
return -1;
p++;
@@ -4651,7 +4663,7 @@ static int check_params(char *buf, int b
break;
if (params[i] == NULL)
return -1;
-p = get_word(NULL, 0, p);
+p = get_opt_value(NULL, 0, p);
if (*p != ',')
break;
p++;
@@ -4810,18 +4822,18 @@ void do_info_network(void)
}
}
-#define HD_ALIAS "file=\"%s\",index=%d,media=disk"
+#define HD_ALIAS "index=%d,media=disk"
#ifdef TARGET_PPC
#define CDROM_ALIAS "index=1,media=cdrom"
#else
#define CDROM_ALIAS "index=2,media=cdrom"
#endif
#define FD_ALIAS "index=%d,if=floppy"
-#define PFLASH_ALIAS "file=\"%s\",if=pflash"
-#define MTD_ALIAS "file=\"%s\",if=mtd"
+#define PFLASH_ALIAS "if=pflash"
+#define MTD_ALIAS "if=mtd"
#define SD_ALIAS "index=0,if=sd"
-static int drive_add(const char *fmt, ...)
+static int drive_add(const char *file, const char *fmt, ...)
{
va_list ap;
@@ -4830,8 +4842,10 @@ static int drive_add(const char *fmt, ..
exit(1);
}
+drives_opt[nb_drives_opt].file = file;
va_start(ap, fmt);
-vsnprintf(drives_opt[nb_drives_opt], sizeof(drives_opt[0]), fmt, ap);
+vsnprintf(drives_opt[nb_drives_opt].opt,
+ sizeof(drives_opt[0].opt), fmt, ap);
va_end(ap);
return nb_drives_opt++;
@@ -4866,7 +4880,8 @@ int drive_get_max_bus(BlockInterfaceType
return max_
Re: [Qemu-devel] [PATCH 5/9] CoreDUO CPU
On Tue, Jan 08, 2008 at 04:22:52PM +0100, Alexander Graf wrote:
> Mac OS X as is has a condition to only run on family 13 Intel CPUs, so
> this adds a definition for a CoreDuo CPU.
> Furthermore it adds the MSR Mac OS X uses to read the CPU multiplier and
> the CPUID used to read the cache information.
> Index: qemu-snapshot-2008-01-08_05/target-i386/cpu.h
> ===
> --- qemu-snapshot-2008-01-08_05.orig/target-i386/cpu.h
> +++ qemu-snapshot-2008-01-08_05/target-i386/cpu.h
> @@ -232,6 +232,8 @@
> #define MSR_MCG_STATUS 0x17a
> #define MSR_MCG_CTL 0x17b
>
> +#define MSR_IA32_PERF_STS 0x198
> +
> #define MSR_PAT 0x277
>
> #define MSR_EFER0xc080
> Index: qemu-snapshot-2008-01-08_05/target-i386/helper.c
> ===
> --- qemu-snapshot-2008-01-08_05.orig/target-i386/helper.c
> +++ qemu-snapshot-2008-01-08_05/target-i386/helper.c
> @@ -1710,6 +1710,79 @@ void helper_cpuid(void)
> ECX = 0;
> EDX = 0x2c307d;
> break;
> +case 4:
> +/* cache info: needed for Core Duo compatibility */
> +/* From the Intel documentation:
> +EAX:
> + Bits 4-0: Cache Type**
> + Bits 7-5: Cache Level (starts at 1)
> + Bits 8: Self Initializing cache level (does not need SW initialization)
> + Bits 9: Fully Associative cache Bits
> + 13-10: Reserved Bits
> + 25-14: Number of threads sharing this cache* Bits
> + 31-26: Number of processor cores on this die (Multicore)*
> +EBX:
> + Bits 11-0: L = System Coherency Line Size*
> + Bits 21-12: P = Physical Line partitions*
> + Bits 31-22: W = Ways of associativity*
> +ECX:
> + Bits 31-0: S = Number of Sets*
> +EDX: Reserved
> + * Add one to the value in the register file to get the number. For example,
> the number
> + of processor cores is EAX[31:26]+1.
> +** Cache Types fields
> + 0 = Null - No more caches
> + 1 = Data Cache
> + 2 = Instruction Cache
> + 3 = Unified Cache
> + 31-4 = Reserved
> +*/
> +
> +switch (ECX) {
> +case 0: // L1 cache info
> +/*EAX = 3// Unified Cache
> +| (1 << 5) // L1 Cache
> +| (1 << 8);// Self Initializing
> +EBX = 63 // Line size = 64 bytes
> +| (1022 << 12) // Partitions = 1024 bytes
> +| (0 << 22); // Ways = 2
> +ECX = 0x3f; // One L1 Cache
> +EDX = 0;*/
> +EAX = 0x123;
> +EBX = 0x1c0003f;
> +ECX = 0x03f;
> +EDX = 0x001;
> +break;
> +case 1: // L2 cache info
> +/*EAX = 3// Unified Cache
> +| (2 << 5) // L2 Cache
> +| (1 << 8);// Self Initializing
> +EBX = 63 // Line size = 64 bytes
> +| (1023 << 12) // Partitions = 1024 bytes
> +| (0 << 22); // Ways = 512
> +ECX = 0; // One L2 Cache
> +EDX = 0;
> +*/
> +EAX = 0x122;
> +EBX = 0x1c0003f;
> +ECX = 0x03f;
> +EDX = 0x001;
> +break;
Why do you explain one set of values, and actually use something
different? It confuses the untrained reader (me).
Dan.
[Qemu-devel] [PATCH] USB serial device
Hello,
Samuel Thibault, le Fri 11 Jan 2008 00:23:12 +, a écrit :
> I would like to implement support for braille devices, and for this I'd
> need to first implement a USB serial device (FTDI chip). Has anybody
> worked on that already?
Ok, was easier than expected, Here is a patch. The serial support is
incomplete however because qemu still lacks support for flow control and
modem lines.
You will notice in tty_serial_init that I made the baud values more
relaxed. This is because with divisor/baud conversions, things never get
exact, so we need to be laxist with the value. For instance here with
FTDI, the base divisor is 4800/2, so for 57600 bps the guest needs
to choose between divisors 416 and 417, which bring to either 57692bps
or 57553bps but not exactly 57600bps. It happens that Linux chooses
divisor 416, hence 57692bps. Of course, the higher the speed, the worse
things get. The 1.1 factor is the smallest factor I could find between
usual bps values, notably B110, B134 and B150.
Samuel
Index: Makefile
===
RCS file: /sources/qemu/qemu/Makefile,v
retrieving revision 1.140
diff -u -p -r1.140 Makefile
--- Makefile6 Jan 2008 18:27:12 - 1.140
+++ Makefile11 Jan 2008 10:59:50 -
@@ -57,7 +57,7 @@ OBJS+=i2c.o smbus.o smbus_eeprom.o max73
OBJS+=ssd0303.o ssd0323.o ads7846.o stellaris_input.o
OBJS+=scsi-disk.o cdrom.o
OBJS+=scsi-generic.o
-OBJS+=usb.o usb-hub.o usb-linux.o usb-hid.o usb-msd.o usb-wacom.o
+OBJS+=usb.o usb-hub.o usb-linux.o usb-hid.o usb-msd.o usb-wacom.o usb-serial.o
OBJS+=sd.o ssi-sd.o
ifdef CONFIG_WIN32
Index: vl.c
===
RCS file: /sources/qemu/qemu/vl.c,v
retrieving revision 1.395
diff -u -p -r1.395 vl.c
--- vl.c8 Jan 2008 19:32:16 - 1.395
+++ vl.c11 Jan 2008 10:59:52 -
@@ -2237,45 +2237,33 @@ static void tty_serial_init(int fd, int
#endif
tcgetattr (fd, &tty);
-switch(speed) {
-case 50:
+#define MARGIN 1.1
+if (speed <= 50 * MARGIN)
spd = B50;
-break;
-case 75:
+else if (speed <= 75 * MARGIN)
spd = B75;
-break;
-case 300:
+else if (speed <= 300 * MARGIN)
spd = B300;
-break;
-case 600:
+else if (speed <= 600 * MARGIN)
spd = B600;
-break;
-case 1200:
+else if (speed <= 1200 * MARGIN)
spd = B1200;
-break;
-case 2400:
+else if (speed <= 2400 * MARGIN)
spd = B2400;
-break;
-case 4800:
+else if (speed <= 4800 * MARGIN)
spd = B4800;
-break;
-case 9600:
+else if (speed <= 9600 * MARGIN)
spd = B9600;
-break;
-case 19200:
+else if (speed <= 19200 * MARGIN)
spd = B19200;
-break;
-case 38400:
+else if (speed <= 38400 * MARGIN)
spd = B38400;
-break;
-case 57600:
+else if (speed <= 57600 * MARGIN)
spd = B57600;
-break;
-default:
-case 115200:
+else if (speed <= 115200 * MARGIN)
+spd = B115200;
+else
spd = B115200;
-break;
-}
cfsetispeed(&tty, spd);
cfsetospeed(&tty, spd);
@@ -5196,6 +5184,8 @@ static int usb_device_add(const char *de
dev = usb_msd_init(p);
} else if (!strcmp(devname, "wacom-tablet")) {
dev = usb_wacom_init();
+} else if (strstart(devname, "serial:", &p)) {
+ dev = usb_serial_init(p);
} else {
return -1;
}
Index: hw/usb-serial.c
===
RCS file: hw/usb-serial.c
diff -N hw/usb-serial.c
--- /dev/null 1 Jan 1970 00:00:00 -
+++ hw/usb-serial.c 11 Jan 2008 10:59:52 -
@@ -0,0 +1,514 @@
+/*
+ * FTDI FT232BM Device emulation
+ *
+ * Copyright (c) 2006 CodeSourcery.
+ * Copyright (c) 2008 Samuel Thibault <[EMAIL PROTECTED]>
+ * Written by Paul Brook, reused for FTDI by Samuel Thibault
+ *
+ * This code is licenced under the LGPL.
+ */
+
+#include "qemu-common.h"
+#include "usb.h"
+#include "qemu-char.h"
+
+//#define DEBUG_Serial
+
+#ifdef DEBUG_Serial
+#define DPRINTF(fmt, args...) \
+do { printf("usb-serial: " fmt , ##args); } while (0)
+#else
+#define DPRINTF(fmt, args...) do {} while(0)
+#endif
+
+#define RECV_BUF 384
+#define SEND_BUF 128// Not used for now
+
+/* Commands */
+#define FTDI_RESET0
+#define FTDI_SET_MDM_CTRL1
+#define FTDI_SET_FLOW_CTRL2
+#define FTDI_SET_BAUD3
+#define FTDI_SET_DATA4
+#define FTDI_GET_MDM_ST5
+#define FTDI_SET_EVENT_CHR6
+#define FTDI_SET_ERROR_CHR7
+#define FTDI_SET_LATENCY9
+#define FTDI_GET_LATENCY10
+
+#define DeviceVendor ((USB_DIR_OUT|USB_TYPE_VENDOR|USB_RECIP_DEVICE)<<8)
+
+/* RESET */
+
+#define FTDI_RESET_SIO0
+#define FTDI_RESET_RX1
+#define FTDI_RESET_TX2
Re: [Qemu-devel] [PATCH 0/9] Intel Mac target support
On Jan 11, 2008, at 9:01 AM, Alexey Eremenko wrote: Alexander Graf: Thank you VERY much for providing us with "intel mac" emulation. I'm really having a hard time understanding if this is irony or not ;-).
Re: [Qemu-devel] [PATCH 5/9] CoreDUO CPU
On Jan 11, 2008, at 11:47 AM, Dan Kenigsberg wrote:
On Tue, Jan 08, 2008 at 04:22:52PM +0100, Alexander Graf wrote:
Mac OS X as is has a condition to only run on family 13 Intel CPUs,
so
this adds a definition for a CoreDuo CPU.
Furthermore it adds the MSR Mac OS X uses to read the CPU
multiplier and
the CPUID used to read the cache information.
Index: qemu-snapshot-2008-01-08_05/target-i386/cpu.h
===
--- qemu-snapshot-2008-01-08_05.orig/target-i386/cpu.h
+++ qemu-snapshot-2008-01-08_05/target-i386/cpu.h
@@ -232,6 +232,8 @@
#define MSR_MCG_STATUS 0x17a
#define MSR_MCG_CTL 0x17b
+#define MSR_IA32_PERF_STS 0x198
+
#define MSR_PAT 0x277
#define MSR_EFER0xc080
Index: qemu-snapshot-2008-01-08_05/target-i386/helper.c
===
--- qemu-snapshot-2008-01-08_05.orig/target-i386/helper.c
+++ qemu-snapshot-2008-01-08_05/target-i386/helper.c
@@ -1710,6 +1710,79 @@ void helper_cpuid(void)
ECX = 0;
EDX = 0x2c307d;
break;
+case 4:
+/* cache info: needed for Core Duo compatibility */
+/* From the Intel documentation:
+EAX:
+ Bits 4-0: Cache Type**
+ Bits 7-5: Cache Level (starts at 1)
+ Bits 8: Self Initializing cache level (does not need SW
initialization)
+ Bits 9: Fully Associative cache Bits
+ 13-10: Reserved Bits
+ 25-14: Number of threads sharing this cache* Bits
+ 31-26: Number of processor cores on this die (Multicore)*
+EBX:
+ Bits 11-0: L = System Coherency Line Size*
+ Bits 21-12: P = Physical Line partitions*
+ Bits 31-22: W = Ways of associativity*
+ECX:
+ Bits 31-0: S = Number of Sets*
+EDX: Reserved
+ * Add one to the value in the register file to get the number.
For example, the number
+ of processor cores is EAX[31:26]+1.
+** Cache Types fields
+ 0 = Null - No more caches
+ 1 = Data Cache
+ 2 = Instruction Cache
+ 3 = Unified Cache
+ 31-4 = Reserved
+*/
+
+switch (ECX) {
+case 0: // L1 cache info
+/*EAX = 3// Unified Cache
+| (1 << 5) // L1 Cache
+| (1 << 8);// Self Initializing
+EBX = 63 // Line size = 64 bytes
+| (1022 << 12) // Partitions = 1024 bytes
+| (0 << 22); // Ways = 2
+ECX = 0x3f; // One L1 Cache
+EDX = 0;*/
+EAX = 0x123;
+EBX = 0x1c0003f;
+ECX = 0x03f;
+EDX = 0x001;
+break;
+case 1: // L2 cache info
+/*EAX = 3// Unified Cache
+| (2 << 5) // L2 Cache
+| (1 << 8);// Self Initializing
+EBX = 63 // Line size = 64 bytes
+| (1023 << 12) // Partitions = 1024 bytes
+| (0 << 22); // Ways = 512
+ECX = 0; // One L2 Cache
+EDX = 0;
+*/
+EAX = 0x122;
+EBX = 0x1c0003f;
+ECX = 0x03f;
+EDX = 0x001;
+break;
Why do you explain one set of values, and actually use something
different? It confuses the untrained reader (me).
Dan.
Basically because I created the values dynamically at first, which
broke at some point. So I just read the real values that a real CPU
gives and put them in instead.
Yes, I should have dropped the commented-out values. Please remove
them when merging.
Alex
[Qemu-devel] qemu-gnemul tarball moved?
hi, there was a tarball at http://fabrice.bellard.free.fr/qemu/qemu-gnemul-0.5.3.tar.gz which contained several test binaries for sparc, ppc, and other archs. where this has been moved to? i find it very useful. thanks, - VMiklos
Re: [Qemu-devel] [PATCH 0/9] Intel Mac target support
Am 11.01.2008 um 13:26 schrieb Alexander Graf: On Jan 11, 2008, at 9:01 AM, Alexey Eremenko wrote: Alexander Graf: Thank you VERY much for providing us with "intel mac" emulation. I'm really having a hard time understanding if this is irony or not ;-). I don't think there's irony as qemu is the first emulator fit for Leopard[1], AFAIK. Markus [1] For non-Apple freaks: "Leopard", that's Mac OS X v10.5, the most recent Macintosh OS. - - - - - - - - - - - - - - - - - - - Dipl. Ing. Markus Hitter http://www.jump-ing.de/
[Qemu-devel] PXA27x AC97
Hello, Is anyone working on the PXA27x AC97 emulation? I don't want to dup effort. TIA Armin
Re: [Qemu-devel] PXA27x AC97
Hi, On 11/01/2008, Armin <[EMAIL PROTECTED]> wrote: > Is anyone working on the PXA27x AC97 emulation? I don't want to dup effort. Not that I know of, but Virtual Box has a PCI AC97 implementation (for PC emulator) and the hackndev qemu tree has dummy PXA27x AC97 registers (zero functionality) at http://git2.hackndev.com/gitweb?p=qemu.git;a=blob;h=817f022208fc0e7ba4a681917e3e6ef3d0c4fae6;hb=9950e2d157ca4bc73662df5069be3c51ef52a856;f=hw/palm.c Maybe it can be helpful. Regards
Re: [Qemu-devel] qemu on alpha
Thiemo wrote:
> Gabriele Gorla wrote:
> > Hello,
> > I recently downloaded qemu-0.9.0 and tried to
compile
> > it on alpha.
> > I was not able to get any target to compile.
> >
> > beside tons of warning about casting pointers to
int
> > of different sizes I get the following two fatal
> > errors:
> >
> > qemu-0.9.0/target-i386/ops_template.h:278:
warning:
> > implicit declaration of function
`GOTO_LABEL_PARAM'
> >
> > qemu-0.9.0/target-i386/translate.c:1898: error:
too
> > many arguments to function `gen_op_jnz_T0_label'
> > qemu-0.9.0/target-i386/translate.c:1900: error:
too
> > many arguments to function `gen_op_jmp_label'
> >
> > in the translate.c file the function is called
with:
> > gen_op_jmp_label(l2);
> >
> > but in gen-op.h it is defined as:
> > static inline void gen_op_jmp_label(void)
> > {
> > *gen_opc_ptr++ = INDEX_op_jmp_label;
> > }
> >
> > same for gen_op_jnz_T0_label
> >
> >
> > for GOTO_LABEL_PARAM the definition is completely
> > missing from dyngen-exec.h (it is there for all
other
> > host CPUs except m68k)
> >
> > Unfortunately my understanding of the code is not
> > sufficient to do anything useful at this point.
> > I would really appreciate if someone could give me
a
> > hint.
>
> Current CVS has probably less broken alpha host
> support. Still, it is
> unlikely to work out of the box, fixing this
requires
> some knowledge
> of alpha assembler. (E.g. for implementing a
> GOTO_LABEL_PARAM for alpha.)
Thiemo,
thanks for your reply.
I downloaded the latest CVS snapshot. It seems to be
slightly better as I do not have to patch for 64-bit
datatypes any longer.
However it still complains about gen_op_jnz_T0_label
and gen_op_jmp_label.
I am willing to spend time trying to figure out what
is wrong but I really need a little help to understand
where to look.
thanks,
GG
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[Qemu-devel] [PATCH] report revision 3 of the ACPI/SMBus PIIX4 controller
The PIIX4 ACPI controller prior to revision 0x3 contains a bug where reading of the timer port is unreliable, so the kernel reads it three times for consistency check. QEMU does not suffer from that problem :) The datasheet for PIIX4, PIIX4E, and PIIX4M is the same. I failed to find any indication that the revision increase could affect anything other than the PMTimer port read. This reduces idle guest CPU consumption from 14% to 8% on 4-way KVM guest. --- kvm-userspace.orig/qemu/hw/acpi.c +++ kvm-userspace/qemu/hw/acpi.c @@ -486,7 +486,7 @@ i2c_bus *piix4_pm_init(PCIBus *bus, int pci_conf[0x03] = 0x71; pci_conf[0x06] = 0x80; pci_conf[0x07] = 0x02; -pci_conf[0x08] = 0x00; // revision number +pci_conf[0x08] = 0x03; // revision number pci_conf[0x09] = 0x00; pci_conf[0x0a] = 0x80; // other bridge device pci_conf[0x0b] = 0x06; // bridge device
