Re: [Qemu-devel] qemu hw/ppc_oldworld.c target-ppc/cpu.h target-...
Thiemo Seufer wrote: > Paul Brook wrote: I think what you mean is that they work the way that ppc64 is defined, to remain compatible with ppc32. IMHO this is entirely irrelevant as we're emulating a ppc32. You could replace the high bits with garbage and nothing would ever be able to tell the difference. >>> PowerPC is a 64 bits architecture. PowerPC 32 on 32 bits host is >>> optimized not to compute the 32 highest bits, the same way it's allowed >>> to cut down the GPR when implementing a CPU that would not support the >>> 64 bits mode (but this is a tolerance, this is not the architecture is >>> defined). >> No. PowerPC is defined as a 64-bit archirecure. However there is a subset of >> this architecture (aka ppc32) that is a complete 32-bit architecture in its >> own right. By your own admission, we can get away with not calculating the >> high 32 bit of the register. If follows that the high bits are completely >> meaningless. > > This btw. also means that the ppc32 emulation on 32-bit hosts is needlessly > inefficient if the high bits are carried around. > >> The qemu ppc32 emulation is implemented in such a way that on 64-bit hosts >> it >> looks a lot like a ppc64 implementation. However this need not, and should >> not be exposed to the user. >> >>> OK. Those are real bugs to be fixed. I'll take a look But I'll try >>> not to break the GPR dump. In fact, GPR should always dumped as 64 bits, >>> even when runnig on 32 bits hosts. This would be more consistent with >>> the specification. >> I disagree. qemu is implementing ppc32. Showing more than 32 bits of >> register >> is completely bogus. Any differences between a 32-bit host and a 64-bit host >> are a qemu bug. If you display 64 bits, then those 64 bits had better be the >> same when run on 32-bit hosts. > > I strongly agree with Paul. I strongly agree too and I suggest to remove the type ppc_gpr_t and to replace it with target_ulong (and uint32_t for the high part of the SPE extensions). Regards, Fabrice.
[Qemu-devel] [PATCH] Handle cpu_model in copy_cpu()
copy_cpu() has been broken since cpu_model added to parameters list of
cpu_init(). This patch fix copy_cpu() by storing cpu_model string in
CPUState structure on cpu_init and use this string in copy_cpu().
---
cpu-defs.h |4 +++-
exec.c |7 +--
target-arm/helper.c |1 +
target-i386/helper2.c|1 +
target-m68k/helper.c |4 +++-
target-mips/translate.c |1 +
target-ppc/helper.c |1 +
target-sparc/translate.c |1 +
8 files changed, 12 insertions(+), 8 deletions(-)
diff --git a/cpu-defs.h b/cpu-defs.h
index 139dca2..9c96532 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -146,6 +146,8 @@ typedef struct CPUTLBEntry {
void *next_cpu; /* next CPU sharing TB cache */ \
int cpu_index; /* CPU index (informative) */\
/* user data */ \
-void *opaque;
+void *opaque; \
+\
+char cpu_model_str[32];
#endif
diff --git a/exec.c b/exec.c
index 046e967..3fe340a 100644
--- a/exec.c
+++ b/exec.c
@@ -1317,9 +1317,7 @@ void cpu_abort(CPUState *env, const char *fmt, ...)
CPUState *cpu_copy(CPUState *env)
{
-#if 0
-/* XXX: broken, must be handled by each CPU */
-CPUState *new_env = cpu_init();
+CPUState *new_env = cpu_init(env->cpu_model_str);
/* preserve chaining and index */
CPUState *next_cpu = new_env->next_cpu;
int cpu_index = new_env->cpu_index;
@@ -1327,9 +1325,6 @@ CPUState *cpu_copy(CPUState *env)
new_env->next_cpu = next_cpu;
new_env->cpu_index = cpu_index;
return new_env;
-#else
-return NULL;
-#endif
}
#if !defined(CONFIG_USER_ONLY)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 038025d..ba0c503 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -182,6 +182,7 @@ CPUARMState *cpu_arm_init(const char *cpu_model)
if (!env)
return NULL;
cpu_exec_init(env);
+strcpy(env->cpu_model_str, cpu_model);
env->cp15.c0_cpuid = id;
cpu_reset(env);
return env;
diff --git a/target-i386/helper2.c b/target-i386/helper2.c
index 67658e2..0d4a046 100644
--- a/target-i386/helper2.c
+++ b/target-i386/helper2.c
@@ -99,6 +99,7 @@ CPUX86State *cpu_x86_init(const char *cpu_model)
if (!env)
return NULL;
cpu_exec_init(env);
+strcpy(env->cpu_model_str, cpu_model);
/* init various static tables */
if (!inited) {
diff --git a/target-m68k/helper.c b/target-m68k/helper.c
index f6b0cd6..316dae5 100644
--- a/target-m68k/helper.c
+++ b/target-m68k/helper.c
@@ -126,11 +126,13 @@ CPUM68KState *cpu_m68k_init(const char *cpu_model)
return NULL;
cpu_exec_init(env);
+strcpy(env->cpu_model_str, cpu_model);
+
if (cpu_m68k_set_model(env, cpu_model) < 0) {
cpu_m68k_close(env);
return NULL;
}
-
+
cpu_reset(env);
return env;
}
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 55e6290..d8b70ff 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -6754,6 +6754,7 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model)
env->cpu_model = def;
cpu_exec_init(env);
+strcpy(env->cpu_model_str, cpu_model);
cpu_reset(env);
return env;
}
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index cb9b778..8bfd97d 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2987,6 +2987,7 @@ CPUPPCState *cpu_ppc_init (const char *cpu_model)
if (!env)
return NULL;
cpu_exec_init(env);
+strcpy(env->cpu_model_str, cpu_model);
cpu_ppc_register_internal(env, def);
cpu_ppc_reset(env);
return env;
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 1e373ce..891adf4 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -3506,6 +3506,7 @@ CPUSPARCState *cpu_sparc_init(const char *cpu_model)
if (!env)
return NULL;
cpu_exec_init(env);
+strcpy(env->cpu_model_str, cpu_model);
env->version = def->iu_version;
env->fsr = def->fpu_version;
#if !defined(TARGET_SPARC64)
--
Regards, Kirill A. Shutemov
+ Belarus, Minsk
+ Velesys LLC, http://www.velesys.com/
+ ALT Linux Team, http://www.altlinux.com/
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Description: Digital signature
Re: [Qemu-devel] [RFC] Ensure SIGALRM causes a cpu_loop_exit
On 24/11/2007, Paul Brook <[EMAIL PROTECTED]> wrote:
> > There is a chance that when using "unix" or "dynticks" clock, the
> > signal arrives when no cpu is executing.
How about this version, this one touches vl.c only:
--- a/vl.c
+++ b/vl.c
@@ -236,6 +236,10 @@ const char *prom_envs[MAX_PROM_ENVS];
struct bt_piconet_s *local_piconet;
struct modem_ops_s modem_ops;
+static CPUState *cur_cpu;
+static CPUState *next_cpu;
+static int event_pending;
+
#define TFR(expr) do { if ((expr) != -1) break; } while (errno == EINTR)
/***/
@@ -1183,16 +1187,16 @@ static void host_alarm_handler(int host_signum)
struct qemu_alarm_win32 *data = ((struct
qemu_alarm_timer*)dwUser)->priv;
SetEvent(data->host_alarm);
#endif
-CPUState *env = cpu_single_env;
-if (env) {
-/* stop the currently executing cpu because a timer occured */
-cpu_interrupt(env, CPU_INTERRUPT_EXIT);
+CPUState *env = next_cpu;
+
+/* stop the currently executing cpu because a timer occured */
+cpu_interrupt(env, CPU_INTERRUPT_EXIT);
#ifdef USE_KQEMU
-if (env->kqemu_enabled) {
-kqemu_cpu_interrupt(env);
-}
-#endif
+if (env->kqemu_enabled) {
+kqemu_cpu_interrupt(env);
}
+#endif
+event_pending = 1;
}
}
@@ -7168,8 +7172,6 @@ void main_loop_wait(int timeout)
}
-static CPUState *cur_cpu;
-
static int main_loop(void)
{
int ret, timeout;
@@ -7179,15 +7181,13 @@ static int main_loop(void)
CPUState *env;
cur_cpu = first_cpu;
+next_cpu = cur_cpu->next_cpu ?: first_cpu;
for(;;) {
if (vm_running) {
-env = cur_cpu;
for(;;) {
/* get next cpu */
-env = env->next_cpu;
-if (!env)
-env = first_cpu;
+env = next_cpu;
#ifdef CONFIG_PROFILER
ti = profile_getclock();
#endif
@@ -7195,6 +7195,12 @@ static int main_loop(void)
#ifdef CONFIG_PROFILER
qemu_time += profile_getclock() - ti;
#endif
+next_cpu = env->next_cpu ?: first_cpu;
+if (event_pending) {
+ret = EXCP_INTERRUPT;
+event_pending = 0;
+break;
+}
if (ret == EXCP_HLT) {
/* Give the next CPU a chance to run. */
cur_cpu = env;
[Qemu-devel] qemu/target-arm helper.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Paul Brook 07/11/24 23:22:12 Modified files: target-arm : helper.c Log message: Thumb semihosting fixes. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-arm/helper.c?cvsroot=qemu&r1=1.27&r2=1.28
[Qemu-devel] qemu vl.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Andrzej Zaborowski 07/11/24 23:27:16 Modified files: . : vl.c Log message: Drop an unused variable (Samuel Thibault). CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/vl.c?cvsroot=qemu&r1=1.369&r2=1.370
[Qemu-devel] qemu Makefile Makefile.target hw/omap_mmc.c hw/...
CVSROOT:/sources/qemu Module name:qemu Changes by: Paul Brook 07/11/24 23:35:08 Modified files: . : Makefile Makefile.target hw : omap_mmc.c pl061.c pl181.c primecell.h pxa2xx_mmci.c sd.c sd.h ssd0323.c stellaris.c Added files: hw : ssi-sd.c Log message: Partial SD card SPI mode support. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/Makefile?cvsroot=qemu&r1=1.135&r2=1.136 http://cvs.savannah.gnu.org/viewcvs/qemu/Makefile.target?cvsroot=qemu&r1=1.227&r2=1.228 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/omap_mmc.c?cvsroot=qemu&r1=1.5&r2=1.6 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/pl061.c?cvsroot=qemu&r1=1.3&r2=1.4 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/pl181.c?cvsroot=qemu&r1=1.10&r2=1.11 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/primecell.h?cvsroot=qemu&r1=1.1&r2=1.2 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/pxa2xx_mmci.c?cvsroot=qemu&r1=1.6&r2=1.7 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/sd.c?cvsroot=qemu&r1=1.8&r2=1.9 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/sd.h?cvsroot=qemu&r1=1.5&r2=1.6 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/ssd0323.c?cvsroot=qemu&r1=1.3&r2=1.4 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/stellaris.c?cvsroot=qemu&r1=1.8&r2=1.9 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/ssi-sd.c?cvsroot=qemu&rev=1.1
[Qemu-devel] qemu vl.c hw/boards.h hw/gumstix.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Andrzej Zaborowski 07/11/24 23:47:39 Modified files: . : vl.c hw : boards.h gumstix.c Log message: Gumstix Verdex (ARM) board support by Thorsten Zitterell. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/vl.c?cvsroot=qemu&r1=1.370&r2=1.371 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/boards.h?cvsroot=qemu&r1=1.2&r2=1.3 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/gumstix.c?cvsroot=qemu&r1=1.4&r2=1.5
[Qemu-devel] qemu/hw pxa2xx_mmci.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Paul Brook 07/11/24 23:55:53 Modified files: hw : pxa2xx_mmci.c Log message: Fix SD init arguments. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/hw/pxa2xx_mmci.c?cvsroot=qemu&r1=1.7&r2=1.8
[Qemu-devel] qemu/hw gumstix.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Andrzej Zaborowski 07/11/25 00:29:24 Modified files: hw : gumstix.c Log message: Fix board init arg list (spotted by pbrook), clean-up NOR flash parameters. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/hw/gumstix.c?cvsroot=qemu&r1=1.5&r2=1.6
[Qemu-devel] qemu qemu-char.h vl.c hw/mcf_uart.c hw/pl011.c ...
CVSROOT:/sources/qemu Module name:qemu Changes by: Andrzej Zaborowski 07/11/25 00:55:06 Modified files: . : qemu-char.h vl.c hw : mcf_uart.c pl011.c serial.c slavio_serial.c Log message: Add input buffer to mux chr (patch by Tristan Gingold). CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/qemu-char.h?cvsroot=qemu&r1=1.2&r2=1.3 http://cvs.savannah.gnu.org/viewcvs/qemu/vl.c?cvsroot=qemu&r1=1.371&r2=1.372 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/mcf_uart.c?cvsroot=qemu&r1=1.3&r2=1.4 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/pl011.c?cvsroot=qemu&r1=1.10&r2=1.11 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/serial.c?cvsroot=qemu&r1=1.21&r2=1.22 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/slavio_serial.c?cvsroot=qemu&r1=1.26&r2=1.27
[Qemu-devel] qemu Makefile.target vl.c hw/boards.h hw/mainst...
CVSROOT:/sources/qemu Module name:qemu Changes by: Andrzej Zaborowski 07/11/25 01:57:38 Modified files: . : Makefile.target vl.c hw : boards.h Added files: hw : mainstone.c Log message: Intel Mainstone II (ARM) machine by Armin Kuster. CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/Makefile.target?cvsroot=qemu&r1=1.228&r2=1.229 http://cvs.savannah.gnu.org/viewcvs/qemu/vl.c?cvsroot=qemu&r1=1.372&r2=1.373 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/boards.h?cvsroot=qemu&r1=1.3&r2=1.4 http://cvs.savannah.gnu.org/viewcvs/qemu/hw/mainstone.c?cvsroot=qemu&rev=1.1
