[Qemu-devel] [PATCH] Add mips-user signal handling
Hello,
this patch adds signal handling for mips-user (and mipsel also).
However it doesn't implement setup_rt_frame, but it seems it is not used
a lot, so the current patch should support the vast majority of
applications.
Also note that since we are not in real kernel mode, the switch to the
signal handler is not done by setting CP0_EPC and doing an "eret" but by
directly modifying PC.
Please consider it for inclusion into the mainline.
Raphaël Rigo
Index: linux-user/main.c
===
RCS file: /sources/qemu/qemu/linux-user/main.c,v
retrieving revision 1.88
diff -u -r1.88 main.c
--- linux-user/main.c 18 Jun 2006 19:12:54 - 1.88
+++ linux-user/main.c 19 Jun 2006 08:33:20 -
@@ -1327,7 +1327,8 @@
arg5,
arg6);
}
-env->PC += 4;
+ if(syscall_num != TARGET_NR_sigreturn-4000)
+ env->PC += 4;
if ((unsigned int)ret >= (unsigned int)(-1133)) {
env->gpr[7] = 1; /* error flag */
ret = -ret;
@@ -1346,6 +1347,9 @@
info.si_code = 0;
queue_signal(info.si_signo, &info);
break;
+case EXCP_INTERRUPT:
+/* just indicate that signals should be handled asap */
+break;
default:
//error:
fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
Index: linux-user/signal.c
===
RCS file: /sources/qemu/qemu/linux-user/signal.c,v
retrieving revision 1.31
diff -u -r1.31 signal.c
--- linux-user/signal.c 25 Mar 2006 19:31:22 - 1.31
+++ linux-user/signal.c 19 Jun 2006 08:33:20 -
@@ -432,13 +432,17 @@
if (oact) {
oact->_sa_handler = tswapl(k->sa._sa_handler);
oact->sa_flags = tswapl(k->sa.sa_flags);
-oact->sa_restorer = tswapl(k->sa.sa_restorer);
+ #if !defined(TARGET_MIPS)
+ oact->sa_restorer = tswapl(k->sa.sa_restorer);
+ #endif
oact->sa_mask = k->sa.sa_mask;
}
if (act) {
k->sa._sa_handler = tswapl(act->_sa_handler);
k->sa.sa_flags = tswapl(act->sa_flags);
-k->sa.sa_restorer = tswapl(act->sa_restorer);
+ #if !defined(TARGET_MIPS)
+ k->sa.sa_restorer = tswapl(act->sa_restorer);
+ #endif
k->sa.sa_mask = act->sa_mask;
/* we update the host linux signal state */
@@ -1618,6 +1622,334 @@
return -ENOSYS;
}
+#elif defined(TARGET_MIPS)
+
+struct target_sigcontext {
+uint32_t sc_regmask; /* Unused */
+uint32_t sc_status;
+uint64_t sc_pc;
+uint64_t sc_regs[32];
+uint64_t sc_fpregs[32];
+uint32_t sc_ownedfp; /* Unused */
+uint32_t sc_fpc_csr;
+uint32_t sc_fpc_eir; /* Unused */
+uint32_t sc_used_math;
+uint32_t sc_dsp; /* dsp status, was sc_ssflags */
+uint64_t sc_mdhi;
+uint64_t sc_mdlo;
+target_ulong sc_hi1; /* Was sc_cause */
+target_ulong sc_lo1; /* Was sc_badvaddr */
+target_ulong sc_hi2; /* Was sc_sigset[4] */
+target_ulong sc_lo2;
+target_ulong sc_hi3;
+target_ulong sc_lo3;
+};
+
+struct sigframe {
+uint32_t sf_ass[4];/* argument save space for o32
*/
+uint32_t sf_code[2]; /* signal trampoline */
+struct target_sigcontext sf_sc;
+target_sigset_t sf_mask;
+};
+
+/* Install trampoline to jump back from signal handler */
+static inline int install_sigtramp(unsigned int *tramp, unsigned int syscall)
+{
+int err;
+
+/*
+* Set up the return code ...
+*
+* li v0, __NR__foo_sigreturn
+* syscall
+*/
+
+err = __put_user(0x2402 + syscall, tramp + 0);
+err |= __put_user(0x000c , tramp + 1);
+/* flush_cache_sigtramp((unsigned long) tramp); */
+return err;
+}
+
+static inline int
+setup_sigcontext(CPUState *regs, struct target_sigcontext *sc)
+{
+int err = 0;
+
+err |= __put_user(regs->PC, &sc->sc_pc);
+
+#define save_gp_reg(i) do {\
+err |= __put_user(regs->gpr[i], &sc->sc_regs[i]); \
+} while(0)
+__put_user(0, &sc->sc_regs[0]); save_gp_reg(1); save_gp_reg(2);
+save_gp_reg(3); save_gp_reg(4); save_gp_reg(5); save_gp_reg(6);
+save_gp_reg(7); save_gp_reg(8); save_gp_reg(9); save_gp_reg(10);
+save_gp_reg(11); save_gp_reg(12); save_gp_reg(13); save_gp_reg(14);
+save_gp_reg(15); save_gp_reg(16); save_gp_reg(17); save_gp_reg(18);
+save_gp_reg(19); save_gp_reg(20); save_gp_reg(21); save_gp_reg(22);
+save_gp_reg(23); save_gp_reg(24); save_gp_reg(25); save_gp_reg(26);
+save_gp_reg(27); save_gp_reg(28); save_gp_reg(29); save_gp_reg(
[Qemu-devel] [PATCH] mips-user socket-related syscall support
Hello,
this patch is a revamped version of the one I posted about 2 months ago,
it is much better. It implements the syscalls related to sockets on the
MIPS platform (because it has no "socketcall" syscall). I had to create
a "socket.h" file defining the constants for the targets because MIPS
doesn't have the same as every other platform.
The calls implemented are : accept, bind, connect, getpeername,
getsockname, listen, recv, recvfrom, recvmsg, send, sendmsg, sendto,
shutdown, socket, socketpair.
Combined with the other patch I just posted (signal handling), qemu-mips
is now capable of running a webserver (which is very nice :)
Please consider it for inclusion into mainline.
Raphaël Rigo
? linux-user/sh4/socket.h
Index: linux-user/qemu.h
===
RCS file: /sources/qemu/qemu/linux-user/qemu.h,v
retrieving revision 1.28
diff -u -r1.28 qemu.h
--- linux-user/qemu.h 17 Jun 2006 18:30:42 - 1.28
+++ linux-user/qemu.h 19 Jun 2006 08:35:38 -
@@ -6,6 +6,7 @@
#include
#include
#include "syscall_defs.h"
+#include "socket.h"
#include "cpu.h"
#include "syscall.h"
Index: linux-user/syscall.c
===
RCS file: /sources/qemu/qemu/linux-user/syscall.c,v
retrieving revision 1.72
diff -u -r1.72 syscall.c
--- linux-user/syscall.c14 Jun 2006 13:36:59 - 1.72
+++ linux-user/syscall.c19 Jun 2006 08:35:39 -
@@ -446,7 +446,7 @@
cmsg->cmsg_type = tswap32(target_cmsg->cmsg_type);
cmsg->cmsg_len = CMSG_LEN(len);
-if (cmsg->cmsg_level != SOL_SOCKET || cmsg->cmsg_type != SCM_RIGHTS) {
+if (cmsg->cmsg_level != TARGET_SOL_SOCKET || cmsg->cmsg_type !=
SCM_RIGHTS) {
gemu_log("Unsupported ancillary data: %d/%d\n", cmsg->cmsg_level,
cmsg->cmsg_type);
memcpy(data, target_data, len);
} else {
@@ -490,7 +490,7 @@
target_cmsg->cmsg_type = tswap32(cmsg->cmsg_type);
target_cmsg->cmsg_len = tswapl(TARGET_CMSG_LEN(len));
-if (cmsg->cmsg_level != SOL_SOCKET || cmsg->cmsg_type != SCM_RIGHTS) {
+if (cmsg->cmsg_level != TARGET_SOL_SOCKET || cmsg->cmsg_type !=
SCM_RIGHTS) {
gemu_log("Unsupported ancillary data: %d/%d\n", cmsg->cmsg_level,
cmsg->cmsg_type);
memcpy(target_data, data, len);
} else {
@@ -552,38 +552,74 @@
goto unimplemented;
}
break;
-case SOL_SOCKET:
+case TARGET_SOL_SOCKET:
switch (optname) {
/* Options with 'int' argument. */
-case SO_DEBUG:
-case SO_REUSEADDR:
-case SO_TYPE:
-case SO_ERROR:
-case SO_DONTROUTE:
-case SO_BROADCAST:
-case SO_SNDBUF:
-case SO_RCVBUF:
-case SO_KEEPALIVE:
-case SO_OOBINLINE:
-case SO_NO_CHECK:
-case SO_PRIORITY:
+case TARGET_SO_DEBUG:
+ optname = SO_DEBUG;
+ break;
+case TARGET_SO_REUSEADDR:
+ optname = SO_REUSEADDR;
+ break;
+case TARGET_SO_TYPE:
+ optname = SO_TYPE;
+ break;
+case TARGET_SO_ERROR:
+ optname = SO_ERROR;
+ break;
+case TARGET_SO_DONTROUTE:
+ optname = SO_DONTROUTE;
+ break;
+case TARGET_SO_BROADCAST:
+ optname = SO_BROADCAST;
+ break;
+case TARGET_SO_SNDBUF:
+ optname = SO_SNDBUF;
+ break;
+case TARGET_SO_RCVBUF:
+ optname = SO_RCVBUF;
+ break;
+case TARGET_SO_KEEPALIVE:
+ optname = SO_KEEPALIVE;
+ break;
+case TARGET_SO_OOBINLINE:
+ optname = SO_OOBINLINE;
+ break;
+case TARGET_SO_NO_CHECK:
+ optname = SO_NO_CHECK;
+ break;
+case TARGET_SO_PRIORITY:
+ optname = SO_PRIORITY;
+ break;
#ifdef SO_BSDCOMPAT
-case SO_BSDCOMPAT:
+case TARGET_SO_BSDCOMPAT:
+ optname = SO_BSDCOMPAT;
+ break;
#endif
-case SO_PASSCRED:
-case SO_TIMESTAMP:
-case SO_RCVLOWAT:
-case SO_RCVTIMEO:
-case SO_SNDTIMEO:
-if (optlen < sizeof(uint32_t))
-return -EINVAL;
-
-val = tget32(optval);
-ret = get_errno(setsockopt(sockfd, level, optname, &val,
sizeof(val)));
+case TARGET_SO_PASSCRED:
+ optname = SO_PASSCRED;
+ break;
+case TARGET_SO_TIMESTAMP:
+ optname = SO_TIMESTAMP;
+ break;
+case TARGET_SO_RCVLOWAT:
+ optname = SO_RCVLOWAT;
+ break;
+case TARGET_SO_RCVTIMEO:
+ optname = SO_RCVTIMEO;
+ break;
+case TARGET_SO_SNDTIMEO:
+
[Qemu-devel] [PATCH] printf and 64bit
This patch continue my work trying to replace %lld (and similar) format strings with C99 standard (as suggested by Fabrice). Is quite long but as you can note it contains repetitive changes. Frediano Ziglio printf.diff Description: printf.diff ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] [PATCH] Bug in target-i386/helper.c:helper_fxam_ST0
I've been doing some instruction set testing on i386-softmmu,
with the aim of seeing if I can find any anomalies which might
be the cause the of Win2K SP4 installation failure.
helper_fxam_ST0 doesn't correctly distinguish infinities from
nans, and thereby causes programs that use the x86 'fxam'
instruction to occasionally produce incorrect results. That
instruction is quite often used as part of transcendentals, for
example pow, exp, log.
On a Linux guest, it for example causes the libc call pow(0.6, inf)
to produce inf when it should produce zero, and causes about 20
cases in the FP correctness suite I'm using to fail.
The test case below shows the problem. It should produce
0x4000: 0.00
0x4200: -0.00
0x0500: inf
0x0700: -inf
0x0300: nan
0x0100: nan
0x0400: 0.00
0x0600: -0.00
0x0400: 1.23
0x0600: -1.23
but instead produces (omitting the correct cases)
0x0100: inf
0x0300: -inf
What's strange is the logic in helper_fxam_ST0 looks correct.
The distinguish-nans-from-infinities part is
if (expdif == MAXEXPD) {
if (MANTD(temp) == 0)
env->fpus |= 0x500 /*Infinity*/;
else
env->fpus |= 0x100 /*NaN*/;
}
I suspect the check is correct for 52-bit mantissas (64-bit floats)
but not for 64-bit mantissas (80-bit floats), as per these notes:
/* 80 and 64-bit floating point formats:
80-bit:
S 0 0---0 zero
S 0 0X--X denormals
S 1-7FFE 1X--X normals (all normals have leading 1)
S 7FFF10--0 infinity
S 7FFF10X-X snan
S 7FFF11X-X qnan
S is the sign bit. For runs XX, at least one of the Xs must be
nonzero. Exponent is 15 bits, fractional part is 63 bits, and
there is an explicitly represented leading 1, and a sign bit,
giving 80 in total.
64-bit avoids the confusion of an explicitly represented leading 1
and so is simpler:
S 0 0--0 zero
S 0 X--X denormals
S 1-7FE anynormals
S 7FF0--0 infinity
S 7FF0X-X snan
S 7FF1X-X qnan
Exponent is 11 bits, fractional part is 52 bits, and there is a
sign bit, giving 64 in total.
*/
For 52-bit mantissas, the mantissa zero-vs-nonzero check is correct.
But for 64-bit mantissas, the check needs to be
if (MANTD(temp) == 0x8000ULL)
and indeed setting it to that makes the test program run correctly.
Patch and testcase follow.
I'm still seeing cases where x87-based computation on qemu winds
up with a NaN when it shouldn't. I think that's a separate problem.
Will investigate.
J
-
Index: target-i386/helper.c
===
RCS file: /sources/qemu/qemu/target-i386/helper.c,v
retrieving revision 1.65
diff -r1.65 helper.c
2952a2953,2955
> # ifdef USE_X86LDOUBLE
> if (MANTD(temp) == 0x8000ULL)
> # else
2953a2957
> # endif
-
#include
#include
/* FPU flag masks */
#define X86G_FC_SHIFT_C3 14
#define X86G_FC_SHIFT_C2 10
#define X86G_FC_SHIFT_C1 9
#define X86G_FC_SHIFT_C0 8
#define X86G_FC_MASK_C3(1 << X86G_FC_SHIFT_C3)
#define X86G_FC_MASK_C2(1 << X86G_FC_SHIFT_C2)
#define X86G_FC_MASK_C1(1 << X86G_FC_SHIFT_C1)
#define X86G_FC_MASK_C0(1 << X86G_FC_SHIFT_C0)
#define MASK_C3210 (X86G_FC_MASK_C3 | X86G_FC_MASK_C2 | X86G_FC_MASK_C1 |
X86G_FC_MASK_C0)
double d;
int i;
extern void do_fxam ( void );
asm(
"\n"
"do_fxam:\n"
"\txorl %eax,%eax\n"
"\tfldl d\n"
"\tfxam\n"
"\tfnstsw %ax\n"
"\tffree %st(0)\n"
"\tmovl %eax, i\n"
"\tret\n"
);
double inf ( void ) { return 1.0 / 0.0; }
double nAn ( void ) { return 0.0 / 0.0; }
double den ( void ) { return 9.1e-220 / 1e100; }
double nor ( void ) { return 1.23; }
/* Try positive and negative variants of: zero, infinity,
nAn, denorm and normal */
int main ( void )
{
d = 0.0; do_fxam(); printf("0x%04x: %f\n", i & MASK_C3210, d );
d = -0.0; do_fxam(); printf("0x%04x: %f\n", i & MASK_C3210, d );
d = inf(); do_fxam(); printf("0x%04x: %f\n", i & MASK_C3210, d );
d = -inf(); do_fxam(); printf("0x%04x: %f\n", i & MASK_C3210, d );
d = nAn(); do_fxam(); printf("0x%04x: %f\n", i & MASK_C3210, d );
d = -nAn(); do_fxam(); printf("0x%04x: %f\n", i & MASK_C3210, d );
d = den(); do_fxam(); printf("0x%04x: %f\n", i & MASK_C3210, d );
d = -den(); do_fxam(); printf("0x%04x: %f\n", i & MASK_C3210, d );
d = nor(); do_fxam(); printf("0x%04x: %f\n", i & MASK_C3210, d );
d = -nor(); do_fxam(); printf("0x%04x: %f\n", i & MASK_C3210, d );
return 0;
}
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] qemu qemu-doc.texi
Hi Paul, Thanks for the explanation. I feel like fixing the alignment issue in the qemu code is a little above my head right now. However, it turns out that the alignment issue can be solved on the arm compiler/linker side, by giving appropriate arguments to the linker (--ro-base 0x8034). The "missing command line issue" can be attributed to the fact that the corresponding ARM semihosting function was not implemented. The patch below implements the SYS_GET_CMDLINE semihosting call, by keeping a global pointer to the user space commandline arguments, and by re-building a space-separated command line in the guest side supplied buffer. This patch has two shortcomings: - I am keeping a global pointer in order to have a handle on the command line arguments inside do_arm_semihosting. Is there a better place to keep this? - The ARM (guest) side supplied buffer is only 256 bytes long; if the user supplied command line is larger, the semihosting call will fail (gracefully). A better strategy may be to build the string on the initial guest stack (similar to loader_build_argptgr()) and then hand that pointer to the guest. I am not quite sure whether the ARGS[] array should be locked before access (then again, none of the functions in do_arm_semihosting() do this). Anyhow, with the patch below (and the linker flags above), I can successfully execute ADS/RVCT compiled binaries, together with command line arguments, both little- and bigendian. All comments welcome. - Wolfgang Paul Brook <[EMAIL PROTECTED]> wrote on 12.06.2006 18:47:12: > > Where would I (start to) look for the reasons behind this? Is this > > something that needs to be "fixed" on the ARM side (i.e. fix the location > > where the ARM code looks for the environment)? > > Look at the code in load_elf_binary that uses target_mmap to map theloadable > segments into memory. The page size I'm referring to below is the target page > size (4k for qemu-arm). target_mmap is more-or-less a wrapper around normal > mmap that deals with the corner cases and differences in page size when > host != target. > > There are two issues: > - mmap requires the file offset be a multiple of the page size. This is > relatively easy to fix. If the file data is misaligned create an anonymous > mapping and pread the data. > > - The code assumes the VMA of the segments after roundind to a page boundary > do not overlap. ie. a single memory page will contain data from no more than > one segment. Fixing this is more complicated and probably involves merging > the regions used by sections with "overlapping" pages. > > Paul -- Wolfgang Schildbach, Senior Research Engineer Coding Technologies GmbH arm_semihosting_commandline.diff Description: Binary data ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] [PATCH] Bug in target-i386/helper.c:helper_fxam_ST0
> be the cause the of Win2K SP4 installation failure.
This doesn't seem to help alas.
Here's a context diff of the same patch (easier to make sense of).
J
===
RCS file: /sources/qemu/qemu/target-i386/helper.c,v
retrieving revision 1.65
diff -C5 -r1.65 helper.c
*** target-i386/helper.c3 May 2006 19:17:26 - 1.65
--- target-i386/helper.c19 Jun 2006 14:32:44 -
***
*** 2948,2958
--- 2948,2962
if (SIGND(temp))
env->fpus |= 0x200; /* C1 <-- 1 */
expdif = EXPD(temp);
if (expdif == MAXEXPD) {
+ # ifdef USE_X86LDOUBLE
+ if (MANTD(temp) == 0x8000ULL)
+ # else
if (MANTD(temp) == 0)
+ # endif
env->fpus |= 0x500 /*Infinity*/;
else
env->fpus |= 0x100 /*NaN*/;
} else if (expdif == 0) {
if (MANTD(temp) == 0)
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] [PATCH] Add mips-user signal handling
Raphaël Rigo wrote: > Hello, > this patch adds signal handling for mips-user (and mipsel also). > However it doesn't implement setup_rt_frame, but it seems it is not used > a lot, so the current patch should support the vast majority of > applications. Note that some web servers and other networking programs that you might want to use depend on setup_rt_frame. It is used by code which uses queued SIGIO signals for event queuing (it's the old "scalable I/O" method before epoll replaced it), and it's also used by code that uses dnotify to check for file changes. I think Samba may also use it in conjunction with F_SETLEASE. Since you seem to be aiming at networking support, I thought to mention this... Enjoy, -- Jamie ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] VMX Wizard
wayne tempel wrote: Hey Everybody, What's up? Wayne here, anyway I found something interesting that I thought that I would share, it's freeware, it's called VMX Wizard, for making virtual machines. You can download it at : rhysgoodwin.orcon.net.nz/vmxwizard/ Peace, Wayne _ Is your PC infected? Get a FREE online computer virus scan from McAfee® Security. http://clinic.mcafee.com/clinic/ibuy/campaign.asp?cid=3963 ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel I like the idea and concept of the VMXwizard. I am not much familiar in using .net - So, my question is why .net is a requirement for this? What language tool is it programmed in? Can you put up some screen shots on your web page for quick view? -joe ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] VMX Wizard
wayne tempel wrote: Hey Everybody, What's up? Wayne here, anyway I found something interesting that I thought that I would share, it's freeware, it's called VMX Wizard, for making virtual machines. You can download it at : rhysgoodwin.orcon.net.nz/vmxwizard/ Peace, Wayne _ Is your PC infected? Get a FREE online computer virus scan from McAfee® Security. http://clinic.mcafee.com/clinic/ibuy/campaign.asp?cid=3963 ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel I think you also posted something about EasyVMX. Is VMXwizard the same thing or similar product? -Joe ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] [PATCH] Add mips-user signal handling
Jamie Lokier wrote: Raphaël Rigo wrote: Hello, this patch adds signal handling for mips-user (and mipsel also). However it doesn't implement setup_rt_frame, but it seems it is not used a lot, so the current patch should support the vast majority of applications. Note that some web servers and other networking programs that you might want to use depend on setup_rt_frame. It is used by code which uses queued SIGIO signals for event queuing (it's the old "scalable I/O" method before epoll replaced it), and it's also used by code that uses dnotify to check for file changes. I think Samba may also use it in conjunction with F_SETLEASE. Since you seem to be aiming at networking support, I thought to mention this... Enjoy, -- Jamie The program I wrote the patch for doesn't use them. But it shouldn't be very hard to add support for setup_rt_frame, I'll try to add it in the coming weeks. But the current patch can be very useful already :) Thanks for pointing this. Regards, Raphaël ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] [PATCH] Update MIPS status register with EXL and ERL bits at exception
- Fix missing 'or' in target-mips/helper.c while update of
hflags with HFLAG_ERL
- Update status register EXL and ERL flags directly if
entering or leaving exception, not only hflags. With old
mechanism, correct status register is returned only if read
from target with mfc0 instruction. This is because value of
status register is calculated at read time using hflags.
GDB, which directly seems to read CP0_Status, doesn't get
the correct status register.
- Remove then EXL and ERL calculation based on hflags from
do_mfc0 because status register now has already the correct
value.
Signed-off-by: Dirk Behme
--- ./target-mips/op_helper.c_orig 2006-06-19 18:14:13.0 +0200
+++ ./target-mips/op_helper.c 2006-06-19 18:37:05.0 +0200
@@ -219,10 +219,6 @@ void do_mfc0 (int reg, int sel)
T0 = env->CP0_Status;
if (env->hflags & MIPS_HFLAG_UM)
T0 |= (1 << CP0St_UM);
-if (env->hflags & MIPS_HFLAG_ERL)
-T0 |= (1 << CP0St_ERL);
-if (env->hflags & MIPS_HFLAG_EXL)
-T0 |= (1 << CP0St_EXL);
rn = "Status";
break;
case 13:
--- ./target-mips/op.c_orig 2006-06-19 18:08:40.0 +0200
+++ ./target-mips/op.c 2006-06-19 18:31:40.0 +0200
@@ -1104,9 +1104,11 @@ void op_eret (void)
if (env->hflags & MIPS_HFLAG_ERL) {
env->PC = env->CP0_ErrorEPC;
env->hflags &= ~MIPS_HFLAG_ERL;
+ env->CP0_Status &= ~(1 << CP0St_ERL);
} else {
env->PC = env->CP0_EPC;
env->hflags &= ~MIPS_HFLAG_EXL;
+ env->CP0_Status &= ~(1 << CP0St_EXL);
}
env->CP0_LLAddr = 1;
}
--- ./target-mips/helper.c_orig 2006-06-19 18:09:36.0 +0200
+++ ./target-mips/helper.c 2006-06-19 18:28:23.0 +0200
@@ -332,7 +332,8 @@ void do_interrupt (CPUState *env)
} else {
env->CP0_ErrorEPC = env->PC;
}
-env->hflags = MIPS_HFLAG_ERL;
+env->hflags |= MIPS_HFLAG_ERL;
+ env->CP0_Status &= (1 << CP0St_ERL);
pc = 0xBFC0;
break;
case EXCP_MCHECK:
@@ -396,6 +397,7 @@ void do_interrupt (CPUState *env)
pc = 0x8000;
}
env->hflags |= MIPS_HFLAG_EXL;
+ env->CP0_Status |= (1 << CP0St_EXL);
pc += offset;
env->CP0_Cause = (env->CP0_Cause & ~0x7C) | (cause << 2);
if (env->hflags & MIPS_HFLAG_BMASK) {
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] [RFC] [PATCH] TSS ljmp issues
QEMU does not correctly handle jumps to TSS segments, the code in switch_tss loads new eflags, but cc_op is never set to CC_OP_EFLAGS. The problem manifests itself when trying to run DJGPP binaries compressed with UPX. It goes something like this: sub esi, 0FFFCh adc ebx, ebx loc_169:; CODE XREF: start+1B -- mailto:[EMAIL PROTECTED]Index: target-i386/helper.c === RCS file: /cvsroot/qemu/qemu/target-i386/helper.c,v retrieving revision 1.65 diff -u -r1.65 helper.c --- target-i386/helper.c3 May 2006 19:17:26 - 1.65 +++ target-i386/helper.c19 Jun 2006 18:19:12 - @@ -1674,6 +1674,7 @@ raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc); next_eip = env->eip + next_eip_addend; switch_tss(new_cs, e1, e2, SWITCH_TSS_JMP, next_eip); +CC_OP = CC_OP_EFLAGS; break; case 4: /* 286 call gate */ case 12: /* 386 call gate */ ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] [RFC] [PATCH] TSS ljmp issues (fwd)
Sorry about previous e-mail, my mail client decided to ambush me. QEMU does not correctly handle jumps to TSS segments, the code in switch_tss loads new eflags, but cc_op is never set to CC_OP_EFLAGS. The problem manifests itself when trying to run DJGPP binaries compressed with UPX. It goes something like this: sub esi, 0FFFCh adc ebx, ebx loc_169:; CODE XREF: start+1B mov al, [edi] ; <-- exception jb short loc_158 mov eax, 1 When using default DJGPPs DPMI provider (CWSDPMI) the following code takes the wrong route in `jb' due to interrupt handler exiting via jump to TSS (and QEMU not setting cc_op) properly. Attached patch cures this, however i'm not sure that it's the best way of doing that nor that it is comprehensive. Sincerely, malc -- mailto:[EMAIL PROTECTED] ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] Theory as to why qemu-system-sparc crashes on solaris/sparc but works on solaris/x86
Could it have something to do with the way mmap() is used? I remember reading somewhere that QEMU uses mmap(). Could that interfere with the kernel mmap()? Jonathan -- -- Jonathan Kalbfeld +1 323 620 6682 ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/target-i386 helper.c
CVSROOT:/sources/qemu Module name:qemu Changes by: Fabrice Bellard06/06/19 22:06:13 Modified files: target-i386: helper.c Log message: switch_tss eflags restore fix (malc) CVSWeb URLs: http://cvs.savannah.gnu.org/viewcvs/qemu/target-i386/helper.c?cvsroot=qemu&r1=1.65&r2=1.66 Patches: Index: helper.c === RCS file: /sources/qemu/qemu/target-i386/helper.c,v retrieving revision 1.65 retrieving revision 1.66 diff -u -b -r1.65 -r1.66 --- helper.c3 May 2006 19:17:26 - 1.65 +++ helper.c19 Jun 2006 22:06:13 - 1.66 @@ -1674,6 +1674,7 @@ raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc); next_eip = env->eip + next_eip_addend; switch_tss(new_cs, e1, e2, SWITCH_TSS_JMP, next_eip); +CC_OP = CC_OP_EFLAGS; break; case 4: /* 286 call gate */ case 12: /* 386 call gate */ @@ -1834,6 +1835,7 @@ if (dpl < cpl || dpl < rpl) raise_exception_err(EXCP0D_GPF, new_cs & 0xfffc); switch_tss(new_cs, e1, e2, SWITCH_TSS_CALL, next_eip); +CC_OP = CC_OP_EFLAGS; return; case 4: /* 286 call gate */ case 12: /* 386 call gate */ ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] [PATCH] Increase default qcow cluster size to 4KB
Regards,
Anthony Liguori
# HG changeset patch
# User Anthony Liguori <[EMAIL PROTECTED]>
# Node ID 76bb5704c9afe3fb930e81e13fd6de57b452ff5c
# Parent 4fcb5f2d8d8646e56ddb2f6bac4d457b66fdb8ab
Change default cluster size for qcow disks to 4KB. This size makes it much
easier for implementing high-performance qcow backends (for things like Xen)
as the kernel tends to like to deal with reads/writes in at least 4K chunks.
diff -r 4fcb5f2d8d86 -r 76bb5704c9af block-qcow.c
--- a/block-qcow.c Mon Jun 19 00:41:28 2006 +
+++ b/block-qcow.c Mon Jun 19 17:14:52 2006 -0500
@@ -574,13 +574,10 @@ static int qcow_create(const char *filen
} else
backing_file = NULL;
header.mtime = cpu_to_be32(st.st_mtime);
-header.cluster_bits = 9; /* 512 byte cluster to avoid copying
-unmodifyed sectors */
-header.l2_bits = 12; /* 32 KB L2 tables */
-} else {
-header.cluster_bits = 12; /* 4 KB clusters */
-header.l2_bits = 9; /* 4 KB L2 tables */
-}
+}
+header.cluster_bits = 12; /* 4 KB clusters */
+header.l2_bits = 9; /* 4 KB L2 tables */
+
header_size = (header_size + 7) & ~7;
shift = header.cluster_bits + header.l2_bits;
l1_size = ((total_size * 512) + (1LL << shift) - 1) >> shift;
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] [PATCH] mips-user socket-related syscall support
Hi, Is it really needed to duplicate socket.h ? What are the differences for mips ? Regards, Fabrice. Raphaël Rigo wrote: Hello, this patch is a revamped version of the one I posted about 2 months ago, it is much better. It implements the syscalls related to sockets on the MIPS platform (because it has no "socketcall" syscall). I had to create a "socket.h" file defining the constants for the targets because MIPS doesn't have the same as every other platform. The calls implemented are : accept, bind, connect, getpeername, getsockname, listen, recv, recvfrom, recvmsg, send, sendmsg, sendto, shutdown, socket, socketpair. Combined with the other patch I just posted (signal handling), qemu-mips is now capable of running a webserver (which is very nice :) Please consider it for inclusion into mainline. Raphaël Rigo ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/tests test-i386.c
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Fabrice Bellard06/06/19 22:42:57
Modified files:
tests : test-i386.c
Log message:
fxam test
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/tests/test-i386.c?cvsroot=qemu&r1=1.49&r2=1.50
Patches:
Index: test-i386.c
===
RCS file: /sources/qemu/qemu/tests/test-i386.c,v
retrieving revision 1.49
retrieving revision 1.50
diff -u -b -r1.49 -r1.50
--- test-i386.c 23 Apr 2005 17:54:59 - 1.49
+++ test-i386.c 19 Jun 2006 22:42:57 - 1.50
@@ -789,6 +789,12 @@
a, b, fpus & FPUS_EMASK, eflags & (CC_Z | CC_P | CC_C));
}
fpu_clear_exceptions();
+asm volatile("fxam\n"
+ "fstsw %%ax\n"
+ : "=a" (fpus)
+ : "t" (a));
+printf("fxam(%f)=%04lx\n", a, fpus & 0x4700);
+fpu_clear_exceptions();
}
void test_fcvt(double a)
@@ -958,12 +964,17 @@
test_fcmp(2, 3);
test_fcmp(2, q_nan.d);
test_fcmp(q_nan.d, -1);
+test_fcmp(-1.0/0.0, -1);
+test_fcmp(1.0/0.0, -1);
test_fcvt(0.5);
test_fcvt(-0.5);
test_fcvt(1.0/7.0);
test_fcvt(-1.0/9.0);
test_fcvt(32768);
test_fcvt(-1e20);
+test_fcvt(-1.0/0.0);
+test_fcvt(1.0/0.0);
+test_fcvt(q_nan.d);
test_fconst();
test_fbcd(1234567890123456);
test_fbcd(-123451234567890);
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
[Qemu-devel] qemu/target-i386 helper.c
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Fabrice Bellard06/06/19 22:43:38
Modified files:
target-i386: helper.c
Log message:
fxam fix (Julian Seward)
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-i386/helper.c?cvsroot=qemu&r1=1.66&r2=1.67
Patches:
Index: helper.c
===
RCS file: /sources/qemu/qemu/target-i386/helper.c,v
retrieving revision 1.66
retrieving revision 1.67
diff -u -b -r1.66 -r1.67
--- helper.c19 Jun 2006 22:06:13 - 1.66
+++ helper.c19 Jun 2006 22:43:38 - 1.67
@@ -2950,9 +2950,14 @@
if (SIGND(temp))
env->fpus |= 0x200; /* C1 <-- 1 */
+/* XXX: test fptags too */
expdif = EXPD(temp);
if (expdif == MAXEXPD) {
+#ifdef USE_X86LDOUBLE
+if (MANTD(temp) == 0x8000ULL)
+#else
if (MANTD(temp) == 0)
+#endif
env->fpus |= 0x500 /*Infinity*/;
else
env->fpus |= 0x100 /*NaN*/;
___
Qemu-devel mailing list
Qemu-devel@nongnu.org
http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] SystemC hw simulation in qemu
Alessandro Corradi wrote: Hi all, I've tried to create my simple hw and it's ok. Now my teacher tells me that i must use a hw description written in SystemC and plug in Qemu. Have you got any idea to do it? Can somebody link me to documents where I can find info? Hi, If you do that I am interested to see the results. Use a simple device such as the serial port (hw/serial.c) as an example. Regards, Fabrice. ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] [PATCH] mips-user socket-related syscall support
Another point is that doing: +target_long args[6]; + +tputl(args, arg1); +tputl(args+1, arg2); +tputl(args+2, arg3); +tputl(args+3, arg4); +tputl(args+4, arg5); +tputl(args+5, arg6); at the start of every syscall is not acceptable. You should add a specific socket call wrapper which takes arg1... arg6 as arguments. Regards, Fabrice. Raphaël Rigo wrote: Hello, this patch is a revamped version of the one I posted about 2 months ago, it is much better. It implements the syscalls related to sockets on the MIPS platform (because it has no "socketcall" syscall). I had to create a "socket.h" file defining the constants for the targets because MIPS doesn't have the same as every other platform. The calls implemented are : accept, bind, connect, getpeername, getsockname, listen, recv, recvfrom, recvmsg, send, sendmsg, sendto, shutdown, socket, socketpair. Combined with the other patch I just posted (signal handling), qemu-mips is now capable of running a webserver (which is very nice :) Please consider it for inclusion into mainline. Raphaël Rigo ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
Re: [Qemu-devel] [PATCH] mips-user socket-related syscall support
Fabrice Bellard wrote: > Hi, > > Is it really needed to duplicate socket.h ? What are the differences for > mips ? > > Regards, > > Fabrice. > Hi, almost all socket related constants are different on MIPS. I thought it would be cleaner to define all constants for each target, so that if we add support for another platform with different constants, it will be easy. Raphaël ___ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
