Re: [Qemu-block] [Qemu-devel] [PATCH v2 1/3] qemu-iotests: Modern shellscripting(use $() instead of ``)

2018-10-18 Thread maozy

Hi, Eric

On 10/18/18 11:28 AM, Eric Blake wrote:

On 10/17/18 10:17 PM, Mao Zhongyi wrote:

Various shell files contain a mix between obsolete ``
and modern $(); It would be nice to convert to using $()
everywhere.

`pwd` and `basename $0` are in 231 files under directory
tests/qemu-iotests, so replaced it with the following:

sed -i 's/`pwd`/$(pwd)/g' $(git grep -l "\`pwd\`")


No. Instead, I'd rather a separate patch that does:

s/`pwd`/$PWD/
s/\$(pwd)/$PWD/

since POSIX requires $PWD to be sane, and thus save us a wasted forked 
process.


I got you, thank you very much.


sed -i 's/`basename $0`/$(basename $0)/g' $(git grep -l "basename \$0")

A small amount of the rest is manually modified.

Cc: kw...@redhat.com
Cc: mre...@redhat.com
Cc: qemu-block@nongnu.org

Signed-off-by: Mao Zhongyi 
---



+++ b/tests/qemu-iotests/001
@@ -21,10 +21,10 @@
  # creator
  owner=h...@lst.de
-seq=`basename $0`
+seq=$(basename $0)
  echo "QA output created by $seq"
-here=`pwd`
+here=$(pwd)
  status=1    # failure is the default!


At one point, someone (Jeff?) proposed a cleanup patch that got rid of a 
lot of cruft in iotests, including the fact that scripts that don't use 
$seq don't need to assign seq=$(basename $0).  We should probably revive 
that rather than just making pointless churn on stuff that is garbage 
anyways.  But I don't have time to look up a URL to that older series at 
the moment.





I think I might have found this patchset, but it was a long time ago.

https://lists.gnu.org/archive/html/qemu-devel/2017-10/msg04056.html

I will remove this patch from this series and resend a separate patch
to replace `pwd` and "$(pwd)" with $PWD. Am I right?

Thanks,
Mao






[Qemu-block] [PATCH 2/2] iotest: Test x-blockdev-change on a Quorum

2018-10-18 Thread Alberto Garcia
This patch tests that you can add and remove drives from a Quorum
using the x-blockdev-change command.

Signed-off-by: Alberto Garcia 
---
 tests/qemu-iotests/081 | 86 ++
 tests/qemu-iotests/081.out | 54 +
 2 files changed, 140 insertions(+)

diff --git a/tests/qemu-iotests/081 b/tests/qemu-iotests/081
index 0ea010afbf..7a441f9300 100755
--- a/tests/qemu-iotests/081
+++ b/tests/qemu-iotests/081
@@ -198,6 +198,92 @@ quorum="$quorum,file.children.2.driver=raw"
 
 $QEMU_IO -c "open -o $quorum" | _filter_qemu_io
 
+echo
+echo "== dinamically adding a child to a quorum =="
+
+for verify in false true; do
+run_qemu <

[Qemu-block] [PATCH 1/2] quorum: Forbid adding children in blkverify mode

2018-10-18 Thread Alberto Garcia
The blkverify mode of Quorum only works when the number of children is
exactly two, so any attempt to add a new one must return an error.

quorum_del_child() on the other hand doesn't need any additional check
because decreasing the number of children would make it go under the
vote threshold.

Signed-off-by: Alberto Garcia 
Reported-by: Kevin Wolf 
---
 block/quorum.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/block/quorum.c b/block/quorum.c
index 6188ff..16b3c8067c 100644
--- a/block/quorum.c
+++ b/block/quorum.c
@@ -992,6 +992,11 @@ static void quorum_add_child(BlockDriverState *bs, 
BlockDriverState *child_bs,
 char indexstr[32];
 int ret;
 
+if (s->is_blkverify) {
+error_setg(errp, "Cannot add a child to a quorum in blkverify mode");
+return;
+}
+
 assert(s->num_children <= INT_MAX / sizeof(BdrvChild *));
 if (s->num_children == INT_MAX / sizeof(BdrvChild *) ||
 s->next_child_index == UINT_MAX) {
@@ -1046,6 +1051,9 @@ static void quorum_del_child(BlockDriverState *bs, 
BdrvChild *child,
 return;
 }
 
+/* We know now that num_children > threshold, so blkverify must be false */
+assert(!s->is_blkverify);
+
 bdrv_drained_begin(bs);
 
 /* We can safely remove this child now */
-- 
2.11.0




[Qemu-block] [PATCH 0/2] Forbid adding children to a Quorum in blkverify mode

2018-10-18 Thread Alberto Garcia
Hi,

as pointed out by Kevin, the Quorum driver should not allow adding new
children when running in blkverify mode.

This series fixes that and also adds a couple of basic iotests for the
x-blockdev-change QMP command.

Berto

Alberto Garcia (2):
  quorum: Forbid adding children in blkverify mode
  iotest: Test x-blockdev-change on a Quorum

 block/quorum.c |  8 +
 tests/qemu-iotests/081 | 86 ++
 tests/qemu-iotests/081.out | 54 +
 3 files changed, 148 insertions(+)

-- 
2.11.0




Re: [Qemu-block] [PATCH v2 2/4] Introduce attributes to qemu timer subsystem

2018-10-18 Thread Stefan Hajnoczi
On Wed, Oct 17, 2018 at 01:24:28PM +0200, Paolo Bonzini wrote:
> On 17/10/2018 12:57, Artem Pisarenko wrote:
> >> Further down in this patch the notation is QEMU_TIMER_ATTR_, which I
> >> think is clearer because QEMU_TIMER_ATTR(id) looks like a (non-existent)
> >> macro.  Please use the QEMU_TIMER_ATTR_ notation consistently.
> > 
> > Yes, I've just forgot to update comments after previous patch version,
> > where it actually was macro.
> > 
> >> What is the purpose of this bit?  I guess it's just here as a
> >> placeholder because no real bits have been defined yet.  Hopefully the
> >> next patch removes it (/* This placeholder is removed in the next patch
> >> */ would be a nice way to document this for reviewers).
> > 
> > It's just to prevent compilation errors, as required by
> > https://wiki.qemu.org/Contribute/SubmitAPatch#Split_up_long_patches
> > 
> >> The enum isn't needed and makes debugging harder since the bit number is
> >> implicit in the enum ordering.  This alternative is clearer and more
> >> concise:
> >> 
> >>   #define QEMU_TIMER_ATTR_foo BIT(n)
> > 
> > Agree.
> 
> Like this?

Yes, something like that is good.


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[Qemu-block] [PATCH v3 2/4] Introduce attributes to qemu timer subsystem

2018-10-18 Thread Artem Pisarenko
Attributes are simple flags, associated with individual timers for their whole 
lifetime.
They intended to be used to mark individual timers for special handling by 
various qemu features which have integration into qemu-timer.
New/init functions family in timer interface updated and refactored (new 
'attribute' argument added, timer_list replaced with timer_list_group+type 
combinations, comments improved to avoid info duplication).
Also existing aio interface extended with attribute-enabled variants of 
functions, which create/initialize timers.

Signed-off-by: Artem Pisarenko 
---

Notes:
v3:
- attributes has been properly incapsulated to qemu-timer (as suggested by 
Stefan Hajnoczi)
- attributes definition and docs refactored to avoid extra enum and use 
simple macros with explicit bit positions (as suggested by Stefan Hajnoczi and 
Paolo Bonzini)
- fixed old "QEMU_TIMER_ATTR(id)" notation (in comments) left from initial 
patch version

v2:
- timer creation/initialize functions reworked and and their unnecessary 
variants removed (as Paolo Bonzini suggested)
- also their comments improved to avoid info duplication

 include/block/aio.h   |  59 ++---
 include/qemu/timer.h  | 110 +++---
 tests/ptimer-test-stubs.c |  13 --
 util/qemu-timer.c |  13 --
 4 files changed, 125 insertions(+), 70 deletions(-)

diff --git a/include/block/aio.h b/include/block/aio.h
index f08630c..0ca25df 100644
--- a/include/block/aio.h
+++ b/include/block/aio.h
@@ -388,6 +388,32 @@ struct LinuxAioState *aio_setup_linux_aio(AioContext *ctx, 
Error **errp);
 struct LinuxAioState *aio_get_linux_aio(AioContext *ctx);
 
 /**
+ * aio_timer_new_with_attrs:
+ * @ctx: the aio context
+ * @type: the clock type
+ * @scale: the scale
+ * @attributes: 0, or one to multiple OR'ed QEMU_TIMER_ATTR_ values
+ *  to assign
+ * @cb: the callback to call on timer expiry
+ * @opaque: the opaque pointer to pass to the callback
+ *
+ * Allocate a new timer (with attributes) attached to the context @ctx.
+ * The function is responsible for memory allocation.
+ *
+ * The preferred interface is aio_timer_init or aio_timer_init_with_attrs.
+ * Use that unless you really need dynamic memory allocation.
+ *
+ * Returns: a pointer to the new timer
+ */
+static inline QEMUTimer *aio_timer_new_with_attrs(AioContext *ctx,
+  QEMUClockType type,
+  int scale, int attributes,
+  QEMUTimerCB *cb, void 
*opaque)
+{
+return timer_new_full(&ctx->tlg, type, scale, attributes, cb, opaque);
+}
+
+/**
  * aio_timer_new:
  * @ctx: the aio context
  * @type: the clock type
@@ -396,10 +422,7 @@ struct LinuxAioState *aio_get_linux_aio(AioContext *ctx);
  * @opaque: the opaque pointer to pass to the callback
  *
  * Allocate a new timer attached to the context @ctx.
- * The function is responsible for memory allocation.
- *
- * The preferred interface is aio_timer_init. Use that
- * unless you really need dynamic memory allocation.
+ * See aio_timer_new_with_attrs for details.
  *
  * Returns: a pointer to the new timer
  */
@@ -407,7 +430,29 @@ static inline QEMUTimer *aio_timer_new(AioContext *ctx, 
QEMUClockType type,
int scale,
QEMUTimerCB *cb, void *opaque)
 {
-return timer_new_tl(ctx->tlg.tl[type], scale, cb, opaque);
+return timer_new_full(&ctx->tlg, type, scale, 0, cb, opaque);
+}
+
+/**
+ * aio_timer_init_with_attrs:
+ * @ctx: the aio context
+ * @ts: the timer
+ * @type: the clock type
+ * @scale: the scale
+ * @attributes: 0, or one to multiple OR'ed QEMU_TIMER_ATTR_ values
+ *  to assign
+ * @cb: the callback to call on timer expiry
+ * @opaque: the opaque pointer to pass to the callback
+ *
+ * Initialise a new timer (with attributes) attached to the context @ctx.
+ * The caller is responsible for memory allocation.
+ */
+static inline void aio_timer_init_with_attrs(AioContext *ctx,
+ QEMUTimer *ts, QEMUClockType type,
+ int scale, int attributes,
+ QEMUTimerCB *cb, void *opaque)
+{
+timer_init_full(ts, &ctx->tlg, type, scale, attributes, cb, opaque);
 }
 
 /**
@@ -420,14 +465,14 @@ static inline QEMUTimer *aio_timer_new(AioContext *ctx, 
QEMUClockType type,
  * @opaque: the opaque pointer to pass to the callback
  *
  * Initialise a new timer attached to the context @ctx.
- * The caller is responsible for memory allocation.
+ * See aio_timer_init_with_attrs for details.
  */
 static inline void aio_timer_init(AioContext *ctx,
   QEMUTimer *ts, QEMUClockType type,
   int scale,
 

qemu-block@nongnu.org

2018-10-18 Thread Fernando Casas Schössow
Hi Stefan,

I hope this email finds you well and I apologize in advance for resurrecting 
this thread.
I'm currently running on qemu 2.12.1 and I'm still having this issue every few 
days but now I managed to get a core dump generated (without including the 
guest memory).
Would you take a look at the dump? Please let me know how do you prefer me to 
share it. The file is around 290MB as is but I can try to compress it.

Looking forward your reply.
Thanks
Kind regards,

Fernando

From: Stefan Hajnoczi 
Sent: Monday, January 29, 2018 5:01 PM
To: Fernando Casas Schössow
Cc: qemu-devel; qemu-block@nongnu.org; Jeff Cody
Subject: Re: [Qemu-devel] qemu process crash: Assertion failed: 
QLIST_EMPTY(&bs->tracked_requests)

On Wed, Dec 13, 2017 at 03:33:01PM +, Fernando Casas Schössow wrote:
> Maybe I’m missing something here but, if I recall correctly, the qemu process 
> for the guest is terminated when this problem happens. So how a debugger will 
> be attached to a process that is gone?

Sorry, this got lost in my inbox.

assert(false) sends SIGABRT to the process.  The default behavior is to
dump a core file that can be analyzed later with GDB.

Your system must have core dumps enabled (i.e. ulimit -c unlimited).
Also, various pieces of software like systemd's coredumpctl can
influence where and how core dumps are stored.

But in short, an assertion failure produces a core dump.

Stefan


qemu-block@nongnu.org

2018-10-18 Thread Kevin Wolf
Hi Fernando,

Am 18.10.2018 um 14:25 hat Fernando Casas Schössow geschrieben:
> I hope this email finds you well and I apologize in advance for resurrecting 
> this thread.
> I'm currently running on qemu 2.12.1 and I'm still having this issue every 
> few days but now I managed to get a core dump generated (without including 
> the guest memory).
> Would you take a look at the dump? Please let me know how do you prefer me to 
> share it. The file is around 290MB as is but I can try to compress it.

would it be possible for you to test whether the bug still exists in
QEMU 3.0? There were a few fixes related to request draining in that
release, so maybe it's already solved now.

Kevin



Re: [Qemu-block] [Qemu-devel] [PATCH v2 1/3] qemu-iotests: Modern shellscripting(use $() instead of ``)

2018-10-18 Thread Eric Blake

[adding Jeff]

On 10/18/18 2:14 AM, maozy wrote:

Hi, Eric

On 10/18/18 11:28 AM, Eric Blake wrote:

On 10/17/18 10:17 PM, Mao Zhongyi wrote:

Various shell files contain a mix between obsolete ``
and modern $(); It would be nice to convert to using $()
everywhere.

`pwd` and `basename $0` are in 231 files under directory
tests/qemu-iotests, so replaced it with the following:

sed -i 's/`pwd`/$(pwd)/g' $(git grep -l "\`pwd\`")


No. Instead, I'd rather a separate patch that does:

s/`pwd`/$PWD/
s/\$(pwd)/$PWD/

since POSIX requires $PWD to be sane, and thus save us a wasted forked 
process.


I got you, thank you very much.



At one point, someone (Jeff?) proposed a cleanup patch that got rid of 
a lot of cruft in iotests, including the fact that scripts that don't 
use $seq don't need to assign seq=$(basename $0).  We should probably 
revive that rather than just making pointless churn on stuff that is 
garbage anyways.  But I don't have time to look up a URL to that older 
series at the moment.





I think I might have found this patchset, but it was a long time ago.

https://lists.gnu.org/archive/html/qemu-devel/2017-10/msg04056.html


Yes, you found it.



I will remove this patch from this series and resend a separate patch
to replace `pwd` and "$(pwd)" with $PWD. Am I right?


That whole series from Jeff should be revived and rebased to master.  I 
don't know if Jeff has time to commit to it any more, so anyone is 
welcome to pick it up at this point.  But your plan in the meantime 
sounds reasonable.


--
Eric Blake, Principal Software Engineer
Red Hat, Inc.   +1-919-301-3266
Virtualization:  qemu.org | libvirt.org



Re: [Qemu-block] [PATCH 2/2] iotest: Test x-blockdev-change on a Quorum

2018-10-18 Thread Kevin Wolf
Am 18.10.2018 um 10:59 hat Alberto Garcia geschrieben:
> This patch tests that you can add and remove drives from a Quorum
> using the x-blockdev-change command.
> 
> Signed-off-by: Alberto Garcia 

> --- a/tests/qemu-iotests/081
> +++ b/tests/qemu-iotests/081
> @@ -198,6 +198,92 @@ quorum="$quorum,file.children.2.driver=raw"
>  
>  $QEMU_IO -c "open -o $quorum" | _filter_qemu_io
>  
> +echo
> +echo "== dinamically adding a child to a quorum =="

s/dinamically/dynamically/ (and in three more instances)

Thanks, fixed the typo and applied the series to the block branch.

Kevin



Re: [Qemu-block] [PATCH v3 3/9] block: Require auto-read-only for existing fallbacks

2018-10-18 Thread Kevin Wolf
Am 17.10.2018 um 20:53 hat Eric Blake geschrieben:
> On 10/17/18 11:41 AM, Kevin Wolf wrote:
> > Some block drivers have traditionally changed their node to read-only
> > mode without asking the user. This behaviour has been marked deprecated
> > since 2.11, expecting users to provide an explicit read-only=on option.
> > 
> > Now that we have auto-read-only=on, enable these drivers to make use of
> > the option.
> > 
> > This is the only use of bdrv_set_read_only(), so we can make it a bit
> > more specific and turn it into a bdrv_apply_auto_read_only() that is
> > more convenient for drivers to use.
> > 
> > Signed-off-by: Kevin Wolf 

> > +++ b/block/rbd.c
> > @@ -780,16 +780,10 @@ static int qemu_rbd_open(BlockDriverState *bs, QDict 
> > *options, int flags,
> >   /* If we are using an rbd snapshot, we must be r/o, otherwise
> >* leave as-is */
> >   if (s->snap != NULL) {
> > -if (!bdrv_is_read_only(bs)) {
> > -error_report("Opening rbd snapshots without an explicit "
> > - "read-only=on option is deprecated. Future 
> > versions "
> > - "will refuse to open the image instead of "
> > - "automatically marking the image read-only.");
> > -r = bdrv_set_read_only(bs, true, &local_err);
> > -if (r < 0) {
> > -error_propagate(errp, local_err);
> > -goto failed_open;
> > -}
> > +r = bdrv_apply_auto_read_only(bs, "rbd snapshots are read-only", 
> > errp);
> > +if (r < 0) {
> > +rbd_close(s->image);
> > +goto failed_open;
> 
> That rbd_close() is an independent bugfix.  Should probably be split to a
> separate commit, or at a minimum called out in the commit message as
> intentional.

Okay, I'll split it.

> Actually, is it really needed to prevent a leak, or does the existing
> rados_shutdown() in failed_open already implicitly cover the actions of
> rbd_close()?

I don't know if rados_shutdown() would implicitly do that as well, but
the normal .bdrv_close implementation calls both, too, so I suppose the
safe option is to let the error path do the same.

Kevin



qemu-block@nongnu.org

2018-10-18 Thread Fernando Casas Schössow
Hi Kevin,

Not at the moment. This is a production system and pretty much up to date but 
can't upgrade to 3.0 yet.
If the dump can be of any use, I can upload it somewhere for analysis.

BR,

Fernando

On jue, oct 18, 2018 at 2:38 PM, Kevin Wolf  wrote:
Hi Fernando, Am 18.10.2018 um 14:25 hat Fernando Casas Schössow geschrieben:
I hope this email finds you well and I apologize in advance for resurrecting 
this thread. I'm currently running on qemu 2.12.1 and I'm still having this 
issue every few days but now I managed to get a core dump generated (without 
including the guest memory). Would you take a look at the dump? Please let me 
know how do you prefer me to share it. The file is around 290MB as is but I can 
try to compress it.
would it be possible for you to test whether the bug still exists in QEMU 3.0? 
There were a few fixes related to request draining in that release, so maybe 
it's already solved now. Kevin




[Qemu-block] [PATCH] blockdev: report error on block latency histogram set error

2018-10-18 Thread zhenwei pi

Function block_latency_histogram_set may return error, but qapi ignore this.
This can be reproduced easily by qmp command:
virsh qemu-monitor-command INSTANCE '{"execute":"x-block-latency-histogram-set",
"arguments":{"device":"drive-virtio-disk1","boundaries":[10,200,40]}}'
In fact this command does not work, but we still get success result.

qmp_x_block_latency_histogram_set is a batch setting API, report error ASAP.

Signed-off-by: zhenwei pi 
---
 blockdev.c | 19 ---
 1 file changed, 16 insertions(+), 3 deletions(-)

diff --git a/blockdev.c b/blockdev.c
index a8755bd..03b1aa3 100644
--- a/blockdev.c
+++ b/blockdev.c
@@ -4377,6 +4377,7 @@ void qmp_x_block_latency_histogram_set(
 {
 BlockBackend *blk = blk_by_name(device);
 BlockAcctStats *stats;
+int ret;
 
 if (!blk) {

 error_setg(errp, "Device '%s' not found", device);
@@ -4392,21 +4393,33 @@ void qmp_x_block_latency_histogram_set(
 }
 
 if (has_boundaries || has_boundaries_read) {

-block_latency_histogram_set(
+ret = block_latency_histogram_set(
 stats, BLOCK_ACCT_READ,
 has_boundaries_read ? boundaries_read : boundaries);
+if (ret) {
+error_setg(errp, "Device '%s' set read boundaries fail", device);
+return;
+}
 }
 
 if (has_boundaries || has_boundaries_write) {

-block_latency_histogram_set(
+ret = block_latency_histogram_set(
 stats, BLOCK_ACCT_WRITE,
 has_boundaries_write ? boundaries_write : boundaries);
+if (ret) {
+error_setg(errp, "Device '%s' set write boundaries fail", device);
+return;
+}
 }
 
 if (has_boundaries || has_boundaries_flush) {

-block_latency_histogram_set(
+ret = block_latency_histogram_set(
 stats, BLOCK_ACCT_FLUSH,
 has_boundaries_flush ? boundaries_flush : boundaries);
+if (ret) {
+error_setg(errp, "Device '%s' set flush boundaries fail", device);
+return;
+}
 }
 }
 
--

2.7.4




Re: [Qemu-block] [PATCH v3 2/4] Introduce attributes to qemu timer subsystem

2018-10-18 Thread Stefan Hajnoczi
On Thu, Oct 18, 2018 at 05:04:29PM +0600, Artem Pisarenko wrote:
> Attributes are simple flags, associated with individual timers for their 
> whole lifetime.
> They intended to be used to mark individual timers for special handling by 
> various qemu features which have integration into qemu-timer.
> New/init functions family in timer interface updated and refactored (new 
> 'attribute' argument added, timer_list replaced with timer_list_group+type 
> combinations, comments improved to avoid info duplication).
> Also existing aio interface extended with attribute-enabled variants of 
> functions, which create/initialize timers.
> 
> Signed-off-by: Artem Pisarenko 
> ---
> 
> Notes:
> v3:
> - attributes has been properly incapsulated to qemu-timer (as suggested 
> by Stefan Hajnoczi)
> - attributes definition and docs refactored to avoid extra enum and use 
> simple macros with explicit bit positions (as suggested by Stefan Hajnoczi 
> and Paolo Bonzini)
> - fixed old "QEMU_TIMER_ATTR(id)" notation (in comments) left from 
> initial patch version
> 
> v2:
> - timer creation/initialize functions reworked and and their unnecessary 
> variants removed (as Paolo Bonzini suggested)
> - also their comments improved to avoid info duplication
> 
>  include/block/aio.h   |  59 ++---
>  include/qemu/timer.h  | 110 
> +++---
>  tests/ptimer-test-stubs.c |  13 --
>  util/qemu-timer.c |  13 --
>  4 files changed, 125 insertions(+), 70 deletions(-)

Reviewed-by: Stefan Hajnoczi 


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[Qemu-block] [PATCH v4 01/11] hw/m68k: add via support

2018-10-18 Thread Mark Cave-Ayland
From: Laurent Vivier 

Co-developed-by: Mark Cave-Ayland 
Signed-off-by: Mark Cave-Ayland 
Signed-off-by: Laurent Vivier 
---
 hw/misc/Makefile.objs |   1 +
 hw/misc/mac_via.c | 668 ++
 include/hw/misc/mac_via.h | 106 
 3 files changed, 775 insertions(+)
 create mode 100644 hw/misc/mac_via.c
 create mode 100644 include/hw/misc/mac_via.h

diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 6d50b03cfd..122ec40f65 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -74,4 +74,5 @@ obj-$(CONFIG_PVPANIC) += pvpanic.o
 obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o
 obj-$(CONFIG_AUX) += auxbus.o
 obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o
+obj-$(CONFIG_MAC_VIA) += mac_via.o
 obj-$(CONFIG_MSF2) += msf2-sysreg.o
diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c
new file mode 100644
index 00..084974a24d
--- /dev/null
+++ b/hw/misc/mac_via.c
@@ -0,0 +1,668 @@
+/*
+ * QEMU m68k Macintosh VIA device support
+ *
+ * Copyright (c) 2011-2018 Laurent Vivier
+ *
+ * Some parts from hw/cuda.c
+ *
+ * Copyright (c) 2004-2007 Fabrice Bellard
+ * Copyright (c) 2007 Jocelyn Mayer
+ *
+ * some parts from linux-2.6.29, arch/m68k/include/asm/mac_via.h
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "qemu/timer.h"
+#include "hw/misc/mac_via.h"
+#include "hw/misc/mos6522.h"
+#include "hw/input/adb.h"
+#include "sysemu/sysemu.h"
+#include "qapi/error.h"
+#include "qemu/cutils.h"
+
+
+/*
+ * VIAs: There are two in every machine,
+ */
+
+#define VIA_SIZE (0x2000)
+
+/*
+ * Not all of these are true post MacII I think.
+ * CSA: probably the ones CHRP marks as 'unused' change purposes
+ * when the IWM becomes the SWIM.
+ * http://www.rs6000.ibm.com/resource/technology/chrpio/via5.mak.html
+ * ftp://ftp.austin.ibm.com/pub/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
+ *
+ * also, http://developer.apple.com/technotes/hw/hw_09.html claims the
+ * following changes for IIfx:
+ * VIA1A_vSccWrReq not available and that VIA1A_vSync has moved to an IOP.
+ * Also, "All of the functionality of VIA2 has been moved to other chips".
+ */
+
+#define VIA1A_vSccWrReq 0x80   /* SCC write. (input)
+* [CHRP] SCC WREQ: Reflects the state of the
+* Wait/Request pins from the SCC.
+* [Macintosh Family Hardware]
+* as CHRP on SE/30,II,IIx,IIcx,IIci.
+* on IIfx, "0 means an active request"
+*/
+#define VIA1A_vRev8 0x40   /* Revision 8 board ???
+* [CHRP] En WaitReqB: Lets the WaitReq_L
+* signal from port B of the SCC appear on
+* the PA7 input pin. Output.
+* [Macintosh Family] On the SE/30, this
+* is the bit to flip screen buffers.
+* 0=alternate, 1=main.
+* on II,IIx,IIcx,IIci,IIfx this is a bit
+* for Rev ID. 0=II,IIx, 1=IIcx,IIci,IIfx
+*/
+#define VIA1A_vHeadSel  0x20   /* Head select for IWM.
+* [CHRP] unused.
+* [Macintosh Family] "Floppy disk
+* state-control line SEL" on all but IIfx
+*/
+#define VIA1A_vOverlay  0x10   /* [Macintosh Family] On SE/30,II,IIx,IIcx
+* this bit enables the "Overlay" address
+* map in the address decoders as it is on
+* reset for mapping the ROM over the reset
+* vector. 1=use overlay map.
+* On the IIci,IIfx it is another bit of the
+* CPU ID: 0=normal IIci, 1=IIci with parity
+* feature or IIfx.
+* [CHRP] En WaitReqA: Lets the WaitReq_L
+* signal from port A of the SCC appear
+* on the PA7 input pin (CHRP). Output.
+* [MkLinux] "Drive Select"
+*  (with 0x20 being 'disk head select')
+*/
+#define VIA1A_vSync 0x08   /* [CHRP] Sync Modem: modem clock select:
+* 1: select the external serial clock to
+*drive the SCC's /RTxCA pin.
+* 0: Select the 3.6864MHz clock to drive
+*the SCC cell.
+  

[Qemu-block] [PATCH v4 03/11] escc: introduce a selector for the register bit

2018-10-18 Thread Mark Cave-Ayland
From: Laurent Vivier 

On Sparc and PowerMac, the bit 0 of the address
selects the register type (control or data) and
bit 1 selects the channel (B or A).

On m68k Macintosh, the bit 0 selects the channel and
bit 1 the register type.

This patch introduces a new parameter (bit_swap) to
the device interface to indicate bits usage must
be swapped between registers and channels.

For the moment all the machines use the bit 0,
but this change will be needed to emulate Quadra 800.

Signed-off-by: Laurent Vivier 
---
 hw/char/escc.c | 30 --
 include/hw/char/escc.h |  1 +
 2 files changed, 25 insertions(+), 6 deletions(-)

diff --git a/hw/char/escc.c b/hw/char/escc.c
index 628f5f81f7..cec75b06f9 100644
--- a/hw/char/escc.c
+++ b/hw/char/escc.c
@@ -42,14 +42,21 @@
  * mouse and keyboard ports don't implement all functions and they are
  * only asynchronous. There is no DMA.
  *
- * Z85C30 is also used on PowerMacs. There are some small differences
- * between Sparc version (sunzilog) and PowerMac (pmac):
+ * Z85C30 is also used on PowerMacs and m68k Macs.
+ *
+ * There are some small differences between Sparc version (sunzilog)
+ * and PowerMac (pmac):
  *  Offset between control and data registers
  *  There is some kind of lockup bug, but we can ignore it
  *  CTS is inverted
  *  DMA on pmac using DBDMA chip
  *  pmac can do IRDA and faster rates, sunzilog can only do 38400
  *  pmac baud rate generator clock is 3.6864 MHz, sunzilog 4.9152 MHz
+ *
+ * Linux driver for m68k Macs is the same as for PowerMac (pmac_zilog),
+ * but registers are grouped by type and not by channel:
+ * channel is selected by bit 0 of the address (instead of bit 1)
+ * and register is selected by bit 1 of the address (instead of bit 0).
  */
 
 /*
@@ -169,6 +176,16 @@ static void handle_kbd_command(ESCCChannelState *s, int 
val);
 static int serial_can_receive(void *opaque);
 static void serial_receive_byte(ESCCChannelState *s, int ch);
 
+static int reg_shift(ESCCState *s)
+{
+return s->bit_swap ? s->it_shift + 1 : s->it_shift;
+}
+
+static int chn_shift(ESCCState *s)
+{
+return s->bit_swap ? s->it_shift : s->it_shift + 1;
+}
+
 static void clear_queue(void *opaque)
 {
 ESCCChannelState *s = opaque;
@@ -433,8 +450,8 @@ static void escc_mem_write(void *opaque, hwaddr addr,
 int newreg, channel;
 
 val &= 0xff;
-saddr = (addr >> serial->it_shift) & 1;
-channel = (addr >> (serial->it_shift + 1)) & 1;
+saddr = (addr >> reg_shift(serial)) & 1;
+channel = (addr >> chn_shift(serial)) & 1;
 s = &serial->chn[channel];
 switch (saddr) {
 case SERIAL_CTRL:
@@ -537,8 +554,8 @@ static uint64_t escc_mem_read(void *opaque, hwaddr addr,
 uint32_t ret;
 int channel;
 
-saddr = (addr >> serial->it_shift) & 1;
-channel = (addr >> (serial->it_shift + 1)) & 1;
+saddr = (addr >> reg_shift(serial)) & 1;
+channel = (addr >> chn_shift(serial)) & 1;
 s = &serial->chn[channel];
 switch (saddr) {
 case SERIAL_CTRL:
@@ -822,6 +839,7 @@ static void escc_realize(DeviceState *dev, Error **errp)
 static Property escc_properties[] = {
 DEFINE_PROP_UINT32("frequency", ESCCState, frequency,   0),
 DEFINE_PROP_UINT32("it_shift",  ESCCState, it_shift,0),
+DEFINE_PROP_BOOL("bit_swap",ESCCState, bit_swap,false),
 DEFINE_PROP_UINT32("disabled",  ESCCState, disabled,0),
 DEFINE_PROP_UINT32("chnBtype",  ESCCState, chn[0].type, 0),
 DEFINE_PROP_UINT32("chnAtype",  ESCCState, chn[1].type, 0),
diff --git a/include/hw/char/escc.h b/include/hw/char/escc.h
index 42aca83611..8762f61c14 100644
--- a/include/hw/char/escc.h
+++ b/include/hw/char/escc.h
@@ -50,6 +50,7 @@ typedef struct ESCCState {
 
 struct ESCCChannelState chn[2];
 uint32_t it_shift;
+bool bit_swap;
 MemoryRegion mmio;
 uint32_t disabled;
 uint32_t frequency;
-- 
2.11.0




[Qemu-block] [PATCH v4 02/11] hw/m68k: implement ADB bus support for via

2018-10-18 Thread Mark Cave-Ayland
From: Laurent Vivier 

Co-developed-by: Mark Cave-Ayland 
Signed-off-by: Mark Cave-Ayland 
Signed-off-by: Laurent Vivier 
---
 hw/input/adb.c|   2 +
 hw/misc/mac_via.c | 166 ++
 include/hw/misc/mac_via.h |   7 ++
 3 files changed, 175 insertions(+)

diff --git a/hw/input/adb.c b/hw/input/adb.c
index bbb40aeef1..d69ca74364 100644
--- a/hw/input/adb.c
+++ b/hw/input/adb.c
@@ -25,6 +25,8 @@
 #include "hw/input/adb.h"
 #include "adb-internal.h"
 
+#define ADB_POLL_FREQ 50
+
 /* error codes */
 #define ADB_RET_NOTPRESENT (-2)
 
diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c
index 084974a24d..1ec563a707 100644
--- a/hw/misc/mac_via.c
+++ b/hw/misc/mac_via.c
@@ -237,6 +237,11 @@
  * Table 19-10 ADB transaction states
  */
 
+#define ADB_STATE_NEW   0
+#define ADB_STATE_EVEN  1
+#define ADB_STATE_ODD   2
+#define ADB_STATE_IDLE  3
+
 #define VIA1B_vADB_StateMask(VIA1B_vADBS1 | VIA1B_vADBS2)
 #define VIA1B_vADB_StateShift   4
 
@@ -424,6 +429,158 @@ static void via1_rtc_update(MacVIAState *m)
 }
 }
 
+static int adb_via_poll(MacVIAState *s, int state, uint8_t *data)
+{
+if (state != ADB_STATE_IDLE) {
+return 0;
+}
+if (s->adb_data_in_size < s->adb_data_in_index) {
+return 0;
+}
+if (s->adb_data_out_index != 0) {
+return 0;
+}
+s->adb_data_in_index = 0;
+s->adb_data_out_index = 0;
+s->adb_data_in_size = adb_poll(&s->adb_bus, s->adb_data_in, 0x);
+if (s->adb_data_in_size) {
+*data = s->adb_data_in[s->adb_data_in_index++];
+qemu_irq_raise(s->adb_data_ready);
+}
+return s->adb_data_in_size;
+}
+
+static int adb_via_send(MacVIAState *s, int state, uint8_t data)
+{
+switch (state) {
+case ADB_STATE_NEW:
+s->adb_data_out_index = 0;
+break;
+case ADB_STATE_EVEN:
+if ((s->adb_data_out_index & 1) == 0) {
+return 0;
+}
+break;
+case ADB_STATE_ODD:
+if (s->adb_data_out_index & 1) {
+return 0;
+}
+break;
+case ADB_STATE_IDLE:
+return 0;
+}
+s->adb_data_out[s->adb_data_out_index++] = data;
+qemu_irq_raise(s->adb_data_ready);
+return 1;
+}
+
+static int adb_via_receive(MacVIAState *s, int state, uint8_t *data)
+{
+switch (state) {
+case ADB_STATE_NEW:
+return 0;
+case ADB_STATE_EVEN:
+if (s->adb_data_in_size <= 0) {
+qemu_irq_raise(s->adb_data_ready);
+return 0;
+}
+if (s->adb_data_in_index >= s->adb_data_in_size) {
+*data = 0;
+qemu_irq_raise(s->adb_data_ready);
+return 1;
+}
+if ((s->adb_data_in_index & 1) == 0) {
+return 0;
+}
+break;
+case ADB_STATE_ODD:
+if (s->adb_data_in_size <= 0) {
+qemu_irq_raise(s->adb_data_ready);
+return 0;
+}
+if (s->adb_data_in_index >= s->adb_data_in_size) {
+*data = 0;
+qemu_irq_raise(s->adb_data_ready);
+return 1;
+}
+if (s->adb_data_in_index & 1) {
+return 0;
+}
+break;
+case ADB_STATE_IDLE:
+if (s->adb_data_out_index == 0) {
+return 0;
+}
+s->adb_data_in_size = adb_request(&s->adb_bus, s->adb_data_in,
+  s->adb_data_out,
+  s->adb_data_out_index);
+s->adb_data_out_index = 0;
+s->adb_data_in_index = 0;
+if (s->adb_data_in_size < 0) {
+*data = 0xff;
+qemu_irq_raise(s->adb_data_ready);
+return -1;
+}
+if (s->adb_data_in_size == 0) {
+return 0;
+}
+break;
+}
+*data = s->adb_data_in[s->adb_data_in_index++];
+qemu_irq_raise(s->adb_data_ready);
+if (*data == 0xff || *data == 0) {
+return 0;
+}
+return 1;
+}
+
+static void via1_adb_update(MacVIAState *m)
+{
+MOS6522Q800VIA1State *v1s = MOS6522_Q800_VIA1(&m->mos6522_via1);
+MOS6522State *s = MOS6522(v1s);
+int state;
+int ret;
+
+state = (s->b & VIA1B_vADB_StateMask) >> VIA1B_vADB_StateShift;
+
+if (s->acr & VIA1ACR_vShiftOut) {
+/* output mode */
+ret = adb_via_send(m, state, s->sr);
+if (ret > 0) {
+s->b &= ~VIA1B_vADBInt;
+} else {
+s->b |= VIA1B_vADBInt;
+}
+} else {
+/* input mode */
+ret = adb_via_receive(m, state, &s->sr);
+if (ret > 0 && s->sr != 0xff) {
+s->b &= ~VIA1B_vADBInt;
+} else {
+s->b |= VIA1B_vADBInt;
+}
+}
+}
+
+static void via_adb_poll(void *opaque)
+{
+MacVIAState *m = opaque;
+MOS6522Q800VIA1State *v1s = MOS6522_Q800_VIA1(&m->mos6522_via1);
+MOS6522State *s = MOS6522(v1s);
+int state;
+
+if (s->b & VIA1B_vADBInt) {
+ 

[Qemu-block] [PATCH v4 06/11] ESP: add pseudo-DMA as used by Macintosh

2018-10-18 Thread Mark Cave-Ayland
From: Laurent Vivier 

Co-developed-by: Mark Cave-Ayland 
Signed-off-by: Mark Cave-Ayland 
Signed-off-by: Laurent Vivier 
---
 hw/scsi/esp.c | 292 +-
 include/hw/scsi/esp.h |   7 ++
 2 files changed, 270 insertions(+), 29 deletions(-)

diff --git a/hw/scsi/esp.c b/hw/scsi/esp.c
index 630d923623..57589cd69d 100644
--- a/hw/scsi/esp.c
+++ b/hw/scsi/esp.c
@@ -35,6 +35,8 @@
  * 
http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt
  * and
  * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
+ *
+ * On Macintosh Quadra it is a NCR53C96.
  */
 
 static void esp_raise_irq(ESPState *s)
@@ -55,6 +57,16 @@ static void esp_lower_irq(ESPState *s)
 }
 }
 
+static void esp_raise_drq(ESPState *s)
+{
+qemu_irq_raise(s->irq_data);
+}
+
+static void esp_lower_drq(ESPState *s)
+{
+qemu_irq_lower(s->irq_data);
+}
+
 void esp_dma_enable(ESPState *s, int irq, int level)
 {
 if (level) {
@@ -81,29 +93,11 @@ void esp_request_cancelled(SCSIRequest *req)
 }
 }
 
-static uint32_t get_cmd(ESPState *s, uint8_t *buf, uint8_t buflen)
+static int get_cmd_cb(ESPState *s)
 {
-uint32_t dmalen;
 int target;
 
 target = s->wregs[ESP_WBUSID] & BUSID_DID;
-if (s->dma) {
-dmalen = s->rregs[ESP_TCLO];
-dmalen |= s->rregs[ESP_TCMID] << 8;
-dmalen |= s->rregs[ESP_TCHI] << 16;
-if (dmalen > buflen) {
-return 0;
-}
-s->dma_memory_read(s->dma_opaque, buf, dmalen);
-} else {
-dmalen = s->ti_size;
-if (dmalen > TI_BUFSZ) {
-return 0;
-}
-memcpy(buf, s->ti_buf, dmalen);
-buf[0] = buf[2] >> 5;
-}
-trace_esp_get_cmd(dmalen, target);
 
 s->ti_size = 0;
 s->ti_rptr = 0;
@@ -122,8 +116,48 @@ static uint32_t get_cmd(ESPState *s, uint8_t *buf, uint8_t 
buflen)
 s->rregs[ESP_RINTR] = INTR_DC;
 s->rregs[ESP_RSEQ] = SEQ_0;
 esp_raise_irq(s);
+return -1;
+}
+return 0;
+}
+
+static uint32_t get_cmd(ESPState *s, uint8_t *buf, uint8_t buflen)
+{
+int target;
+uint32_t dmalen;
+
+target = s->wregs[ESP_WBUSID] & BUSID_DID;
+if (s->dma) {
+dmalen = s->rregs[ESP_TCLO];
+dmalen |= s->rregs[ESP_TCMID] << 8;
+dmalen |= s->rregs[ESP_TCHI] << 16;
+if (dmalen > buflen) {
+return 0;
+}
+if (s->dma_memory_read) {
+s->dma_memory_read(s->dma_opaque, buf, dmalen);
+} else {
+memcpy(s->pdma_buf, buf, dmalen);
+s->pdma_len = dmalen;
+s->pdma_start = s->pdma_buf;
+s->pdma_cur = s->pdma_buf;
+esp_raise_drq(s);
+return 0;
+}
+} else {
+dmalen = s->ti_size;
+if (dmalen > TI_BUFSZ) {
+return 0;
+}
+memcpy(buf, s->ti_buf, dmalen);
+buf[0] = buf[2] >> 5;
+}
+trace_esp_get_cmd(dmalen, target);
+
+if (get_cmd_cb(s) < 0) {
 return 0;
 }
+
 return dmalen;
 }
 
@@ -162,6 +196,15 @@ static void do_cmd(ESPState *s, uint8_t *buf)
 do_busid_cmd(s, &buf[1], busid);
 }
 
+static void satn_pdma_cb(ESPState *s)
+{
+if (get_cmd_cb(s) < 0) {
+return;
+}
+if (s->pdma_cur != s->pdma_start)
+do_cmd(s, s->pdma_start);
+}
+
 static void handle_satn(ESPState *s)
 {
 uint8_t buf[32];
@@ -171,11 +214,21 @@ static void handle_satn(ESPState *s)
 s->dma_cb = handle_satn;
 return;
 }
+s->pdma_cb = satn_pdma_cb;
 len = get_cmd(s, buf, sizeof(buf));
 if (len)
 do_cmd(s, buf);
 }
 
+static void s_without_satn_pdma_cb(ESPState *s)
+{
+if (get_cmd_cb(s) < 0) {
+return;
+}
+if (s->pdma_cur != s->pdma_start)
+do_busid_cmd(s, s->pdma_start, 0);
+}
+
 static void handle_s_without_atn(ESPState *s)
 {
 uint8_t buf[32];
@@ -185,18 +238,36 @@ static void handle_s_without_atn(ESPState *s)
 s->dma_cb = handle_s_without_atn;
 return;
 }
+s->pdma_cb = s_without_satn_pdma_cb;
 len = get_cmd(s, buf, sizeof(buf));
 if (len) {
 do_busid_cmd(s, buf, 0);
 }
 }
 
+static void satn_stop_pdma_cb(ESPState *s)
+{
+if (get_cmd_cb(s) < 0) {
+return;
+}
+s->cmdlen = s->pdma_cur - s->pdma_start;
+if (s->cmdlen) {
+trace_esp_handle_satn_stop(s->cmdlen);
+s->do_cmd = 1;
+s->rregs[ESP_RSTAT] = STAT_TC | STAT_CD;
+s->rregs[ESP_RINTR] = INTR_BS | INTR_FC;
+s->rregs[ESP_RSEQ] = SEQ_CD;
+esp_raise_irq(s);
+}
+}
+
 static void handle_satn_stop(ESPState *s)
 {
 if (s->dma && !s->dma_enabled) {
 s->dma_cb = handle_satn_stop;
 return;
 }
+s->pdma_cb = satn_stop_pdma_cb;;
 s->cmdlen = get_cmd(s, s->cmdbuf, sizeof(s->cmdbuf));
 if (s->cmdlen) {
 trace_esp_handle_satn_stop(s->cmdlen);
@@ -208,16 +279,33 @@ static void handle_satn_

[Qemu-block] [PATCH v4 07/11] hw/m68k: add Nubus support

2018-10-18 Thread Mark Cave-Ayland
From: Laurent Vivier 

Co-developed-by: Mark Cave-Ayland 
Signed-off-by: Mark Cave-Ayland 
Signed-off-by: Laurent Vivier 
---
 hw/Makefile.objs|   1 +
 hw/nubus/Makefile.objs  |   4 +
 hw/nubus/mac-nubus-bridge.c |  45 
 hw/nubus/nubus-bridge.c |  34 ++
 hw/nubus/nubus-bus.c| 111 +++
 hw/nubus/nubus-device.c | 209 
 include/hw/display/macfb.h  |  21 
 include/hw/nubus/mac-nubus-bridge.h |  24 +
 include/hw/nubus/nubus.h|  69 
 9 files changed, 518 insertions(+)
 create mode 100644 hw/nubus/Makefile.objs
 create mode 100644 hw/nubus/mac-nubus-bridge.c
 create mode 100644 hw/nubus/nubus-bridge.c
 create mode 100644 hw/nubus/nubus-bus.c
 create mode 100644 hw/nubus/nubus-device.c
 create mode 100644 include/hw/nubus/mac-nubus-bridge.h
 create mode 100644 include/hw/nubus/nubus.h

diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index a19c1417ed..8c97b4b97b 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -35,6 +35,7 @@ devices-dirs-$(CONFIG_SOFTMMU) += watchdog/
 devices-dirs-$(CONFIG_SOFTMMU) += xen/
 devices-dirs-$(CONFIG_MEM_HOTPLUG) += mem/
 devices-dirs-$(CONFIG_SOFTMMU) += smbios/
+devices-dirs-$(CONFIG_NUBUS) += nubus/
 devices-dirs-y += core/
 common-obj-y += $(devices-dirs-y)
 obj-y += $(devices-dirs-y)
diff --git a/hw/nubus/Makefile.objs b/hw/nubus/Makefile.objs
new file mode 100644
index 00..ebb050a4ad
--- /dev/null
+++ b/hw/nubus/Makefile.objs
@@ -0,0 +1,4 @@
+common-obj-y += nubus-device.o
+common-obj-y += nubus-bus.o
+common-obj-y += nubus-bridge.o
+common-obj-$(CONFIG_MAC) += mac-nubus-bridge.o
diff --git a/hw/nubus/mac-nubus-bridge.c b/hw/nubus/mac-nubus-bridge.c
new file mode 100644
index 00..7c329300b8
--- /dev/null
+++ b/hw/nubus/mac-nubus-bridge.c
@@ -0,0 +1,45 @@
+/*
+ *  Copyright (c) 2013-2018 Laurent Vivier 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "hw/nubus/mac-nubus-bridge.h"
+
+
+static void mac_nubus_bridge_init(Object *obj)
+{
+MacNubusState *s = MAC_NUBUS_BRIDGE(obj);
+SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+s->bus = NUBUS_BUS(qbus_create(TYPE_NUBUS_BUS, DEVICE(s), NULL));
+
+sysbus_init_mmio(sbd, &s->bus->super_slot_io);
+sysbus_init_mmio(sbd, &s->bus->slot_io);
+}
+
+static void mac_nubus_bridge_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+dc->desc = "Nubus bridge";
+}
+
+static const TypeInfo mac_nubus_bridge_info = {
+.name  = TYPE_MAC_NUBUS_BRIDGE,
+.parent= TYPE_NUBUS_BRIDGE,
+.instance_init = mac_nubus_bridge_init,
+.instance_size = sizeof(MacNubusState),
+.class_init= mac_nubus_bridge_class_init,
+};
+
+static void mac_nubus_bridge_register_types(void)
+{
+type_register_static(&mac_nubus_bridge_info);
+}
+
+type_init(mac_nubus_bridge_register_types)
diff --git a/hw/nubus/nubus-bridge.c b/hw/nubus/nubus-bridge.c
new file mode 100644
index 00..cd8c6a91eb
--- /dev/null
+++ b/hw/nubus/nubus-bridge.c
@@ -0,0 +1,34 @@
+/*
+ * QEMU Macintosh Nubus
+ *
+ * Copyright (c) 2013-2018 Laurent Vivier 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "hw/nubus/nubus.h"
+
+static void nubus_bridge_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+
+dc->fw_name = "nubus";
+}
+
+static const TypeInfo nubus_bridge_info = {
+.name  = TYPE_NUBUS_BRIDGE,
+.parent= TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(SysBusDevice),
+.class_init= nubus_bridge_class_init,
+};
+
+static void nubus_register_types(void)
+{
+type_register_static(&nubus_bridge_info);
+}
+
+type_init(nubus_register_types)
diff --git a/hw/nubus/nubus-bus.c b/hw/nubus/nubus-bus.c
new file mode 100644
index 00..448fa95600
--- /dev/null
+++ b/hw/nubus/nubus-bus.c
@@ -0,0 +1,111 @@
+/*
+ * QEMU Macintosh Nubus
+ *
+ * Copyright (c) 2013-2018 Laurent Vivier 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "hw/nubus/nubus.h"
+#include "hw/sysbus.h"
+#include "qapi/error.h"
+
+
+static NubusBus *nubus_find(void)
+{
+/* Returns NULL unless there is exactly one nubus device */
+return NUBUS_BUS(object_resolve_path_type("", TYPE_NUBUS_BUS, NULL));
+}
+
+static void nubus_slot_write(void *opaque, hwaddr addr, uint64_t val,
+ unsigned int size)
+{
+return;
+}
+
+
+static uint64_t nubus_slot_read(void *opaque, hwaddr addr,
+

[Qemu-block] [PATCH v4 00/11] hw/m68k: add Apple Machintosh Quadra 800 machine

2018-10-18 Thread Mark Cave-Ayland
(MCA: I've reposting this on behalf of Laurent as I've been working on the
feedback from v3 over the past months and therefore am better placed to
update the changelog. If all goes well, it would be good to get this merged
in time for 3.1 soft freeze)

I'm rebasing some of these patches for seven years now,
too many years...

if you want to test the machine, I'm sorry, it doesn't boot
a MacROM, but you can boot a linux kernel from the command line.

You can install your own disk using debian-installer, with:

...
-M q800 \
-serial none -serial mon:stdio \
-m 1000M -drive file=m68k.qcow2,format=qcow2 \
-net nic,model=dp83932,addr=09:00:07:12:34:57 \
-append "console=ttyS0 vga=off" \
-kernel vmlinux-4.15.0-2-m68k \
-initrd initrd.gz \
-drive file=debian-9.0-m68k-NETINST-1.iso \
-drive file=m68k.qcow2,format=qcow2 \
-nographic

If you use a graphic adapter instead of "-nographic", you can use "-g" to set 
the
size of the display (I use "-g 1600x800x24").

You can get the ISO from:

https://cdimage.debian.org/mirror/cdimage/ports/9.0/m68k/iso-cd/debian-9.0-m68k-NETINST-1.iso

and extract the kernel and initrd.gz:

guestfish --add debian-9.0-m68k-NETINST-1.iso --ro \
  --mount /dev/sda:/ <<_EOF_
copy-out /install/cdrom/initrd.gz .
copy-out /install/kernels/vmlinux-4.15.0-2-m68k .
_EOF_

The mirror to use is: http://ftp.ports.debian.org/debian-ports/
when it fails, continue without boot loader.

In the same way, you can extract the kernel and the initramfs from the qcow2
image to use it with "-kernel" and "-initrd":

guestfish --add m68k.qcow2 --mount /dev/sda2:/ <<_EOF_
copy-out /boot/vmlinux-4.15.0-2-m68k .
copy-out /boot/initrd.img-4.15.0-2-m68k .
_EOF_

and boot with:

   ...
   -append "root=/dev/sda2 rw console=ttyS0 console=tty \
   -kernel vmlinux-4.15.0-2-m68k \
   -initrd initrd.img-4.15.0-2-m68k

v4: Drop RFC from subject prefix as this is getting close to final
Rebased onto master (fixing ESP, rom_ptr() conflicts)
Reworked q800.c based upon Thomas' comments about cpu_init() and
  qemu_check_nic_model()
Address Thomas' comments on using error_report() instead of hw_error()
Change the NuBus memory regions from DEVICE_NATIVE_ENDIAN to
  DEVICE_BIG_ENDIAN
Split macfb Nubus support into separate commit
Change VMSTATE_BUFFER_UNSAFE() to VMSTATE_UINT8_ARRAY() in macfb.c as
  suggested by David
Remove dummy Apple Sound Chip migration state as pointed out by David
Keep VIA ADB state and buffers in the mac_via device rather than adding
  to existing ADBState (this matches the pattern used in the PPC CUDA/PMU
  VIAs)
Remove blacklisting for q800 machine from "make check" as requested by
  Thomas with the following fixes:
- Fix incorrect MemoryRegion owner in ASC device
- Add qtest_enabled() check in q800_init() to allow testing when no
  kernel is specified
- Move some Mac VIA initialisation from init to realize
Remove legacy drive properties from SWIM floppy controller and instead
  expose separate floppy bus and drive devices as requested by Kevin

v3: fix subject prefix "C" -> "RFC"

v2: remove the dp8393x fixes, because one of the patch breaks something
Update "dp8393x: manage big endian bus" with idea from Thomas
Mark has reworked most of the patches:
- use mos6522
- some code move, renamings and cleanup

Laurent Vivier (10):
  hw/m68k: add via support
  hw/m68k: implement ADB bus support for via
  escc: introduce a selector for the register bit
  hw/m68k: add macfb video card
  hw/m68k: Apple Sound Chip (ASC) emulation
  ESP: add pseudo-DMA as used by Macintosh
  hw/m68k: add Nubus support
  hw/m68k: add a dummy SWIM floppy controller
  dp8393x: manage big endian bus
  hw/m68k: define Macintosh Quadra 800

Mark Cave-Ayland (1):
  hw/m68k: add Nubus support for macfb video card

 MAINTAINERS |  19 +
 arch_init.c |   4 +
 default-configs/m68k-softmmu.mak|  14 +
 hw/Makefile.objs|   1 +
 hw/audio/Makefile.objs  |   1 +
 hw/audio/asc.c  | 446 +++
 hw/block/Makefile.objs  |   1 +
 hw/block/swim.c | 415 ++
 hw/char/escc.c  |  30 +-
 hw/display/Makefile.objs|   1 +
 hw/display/macfb-template.h | 158 +++
 hw/display/macfb.c  | 308 +
 hw/input/adb.c  |   2 +
 hw/intc/Makefile.objs   |   1 +
 hw/intc/q800_irq.c  |  73 
 hw/m68k/Makefile.objs   |   6 +-
 hw/m68k/bootinfo.h  | 100 +
 hw/m68k/q800.c  | 367 
 hw/misc/Makefile.objs   |   1 +
 hw/misc/mac_via.c   | 834 
 hw/net/dp8393x.c|  88 ++--
 hw/nubus/Makef

[Qemu-block] [PATCH v4 04/11] hw/m68k: add macfb video card

2018-10-18 Thread Mark Cave-Ayland
From: Laurent Vivier 

Co-developed-by: Mark Cave-Ayland 
Signed-off-by: Mark Cave-Ayland 
Signed-off-by: Laurent Vivier 
---
 arch_init.c |   4 +
 hw/display/Makefile.objs|   1 +
 hw/display/macfb-template.h | 158 +++
 hw/display/macfb.c  | 252 
 include/hw/display/macfb.h  |  42 
 qemu-options.hx |   2 +-
 vl.c|   3 +-
 7 files changed, 460 insertions(+), 2 deletions(-)
 create mode 100644 hw/display/macfb-template.h
 create mode 100644 hw/display/macfb.c
 create mode 100644 include/hw/display/macfb.h

diff --git a/arch_init.c b/arch_init.c
index f4f3f610c8..5a71b48dc5 100644
--- a/arch_init.c
+++ b/arch_init.c
@@ -39,6 +39,10 @@
 int graphic_width = 1024;
 int graphic_height = 768;
 int graphic_depth = 8;
+#elif defined(TARGET_M68K)
+int graphic_width = 800;
+int graphic_height = 600;
+int graphic_depth = 8;
 #else
 int graphic_width = 800;
 int graphic_height = 600;
diff --git a/hw/display/Makefile.objs b/hw/display/Makefile.objs
index 97acd5b6cb..1685492ea0 100644
--- a/hw/display/Makefile.objs
+++ b/hw/display/Makefile.objs
@@ -27,6 +27,7 @@ common-obj-$(CONFIG_EXYNOS4) += exynos4210_fimd.o
 common-obj-$(CONFIG_FRAMEBUFFER) += framebuffer.o
 common-obj-$(CONFIG_MILKYMIST) += milkymist-vgafb.o
 common-obj-$(CONFIG_ZAURUS) += tc6393xb.o
+common-obj-$(CONFIG_MACFB) += macfb.o
 
 common-obj-$(CONFIG_MILKYMIST_TMU2) += milkymist-tmu2.o
 milkymist-tmu2.o-cflags := $(X11_CFLAGS)
diff --git a/hw/display/macfb-template.h b/hw/display/macfb-template.h
new file mode 100644
index 00..b6ae5d728f
--- /dev/null
+++ b/hw/display/macfb-template.h
@@ -0,0 +1,158 @@
+#if defined(READ_BITS)
+#define PALETTE(i, r, g, b)\
+do {   \
+r =  s->color_palette[i * 3];  \
+g =  s->color_palette[i * 3 + 1];  \
+b =  s->color_palette[i * 3 + 2];  \
+} while (0)
+
+#if READ_BITS == 1
+#define READ_PIXEL(from, x, r, g, b)   \
+do {   \
+int bit = x & 7;   \
+int idx = (*from >> (7 - bit)) & 1;\
+r = g = b  = ((1 - idx) << 7); \
+from += (bit == 7);\
+} while (0)
+#elif READ_BITS == 2
+#define READ_PIXEL(from, x, r, g, b)   \
+do {   \
+int bit = (x & 3); \
+int idx = (*from >> ((3 - bit) << 1)) & 3; \
+PALETTE(idx, r, g, b); \
+from += (bit == 3);\
+} while (0)
+#elif READ_BITS == 4
+#define READ_PIXEL(from, x, r, g, b)   \
+do {   \
+int bit = x & 1;   \
+int idx = (*from >> ((1 - bit) << 2)) & 15; \
+PALETTE(idx, r, g, b); \
+from += (bit == 1);\
+} while (0)
+#elif READ_BITS == 8
+#define READ_PIXEL(from, x, r, g, b)   \
+do {   \
+PALETTE(*from, r, g, b);   \
+from++;\
+} while (0)
+#elif READ_BITS == 16
+#define READ_PIXEL(from, x, r, g, b)   \
+do {   \
+uint16_t pixel;\
+pixel = (from[0] << 8) | from[1];  \
+r = ((pixel >> 10) & 0x1f) << 3;   \
+g = ((pixel >> 5) & 0x1f) << 3;\
+b = (pixel & 0x1f) << 3;   \
+from += 2; \
+} while (0)
+#elif READ_BITS == 24
+#define READ_PIXEL(from, x, r, g, b)   \
+do {   \
+r = *from++;   \
+g = *from++;   \
+b = *from++;   \
+} while (0)
+#else
+#error unknown bit depth
+#endif
+
+#if WRITE_BITS == 8
+#define WRITE_PIXEL(to, r, g, b)   \
+do {   \
+*to = rgb_to_pixel8(r, g, b);  \
+to += 1;   \
+} while (0)
+#elif WRITE_BITS == 15
+#define WRITE_PIXEL(to, r, g, b)   \
+do {   \
+*(uint16_t *)to = rgb_to_pixel15(r, g, b); \
+to += 2;   \
+} while (0)
+#elif WRITE_BITS == 16
+#define WRITE_PIXEL(to, r, g, b)   \
+do {   \
+*(uint16_t *)to = rgb_to_pixel16(r, g, b); \
+to += 2;   \
+} while (0)
+#elif WRITE_BITS == 2

[Qemu-block] [PATCH v4 08/11] hw/m68k: add Nubus support for macfb video card

2018-10-18 Thread Mark Cave-Ayland
Co-developed-by: Mark Cave-Ayland 
Signed-off-by: Mark Cave-Ayland 
Signed-off-by: Laurent Vivier 
---
 hw/display/macfb.c | 56 ++
 1 file changed, 56 insertions(+)

diff --git a/hw/display/macfb.c b/hw/display/macfb.c
index 54472c1cbb..7bbcac102c 100644
--- a/hw/display/macfb.c
+++ b/hw/display/macfb.c
@@ -14,6 +14,7 @@
 #include "hw/sysbus.h"
 #include "ui/console.h"
 #include "ui/pixel_ops.h"
+#include "hw/nubus/nubus.h"
 #include "hw/display/macfb.h"
 
 #define VIDEO_BASE 0x1000
@@ -213,12 +214,38 @@ static void macfb_sysbus_realize(DeviceState *dev, Error 
**errp)
 sysbus_init_mmio(SYS_BUS_DEVICE(s), &ms->mem_vram);
 }
 
+const uint8_t macfb_rom[] = {
+255, 0, 0, 0,
+};
+
+static void macfb_nubus_realize(DeviceState *dev, Error **errp)
+{
+NubusDevice *nd = NUBUS_DEVICE(dev);
+MacfbNubusState *s = NUBUS_MACFB(dev);
+MacfbNubusDeviceClass *ndc = MACFB_NUBUS_GET_CLASS(dev);
+MacfbState *ms = &s->macfb;
+
+ndc->parent_realize(dev, errp);
+
+macfb_common_realize(dev, ms);
+memory_region_add_subregion(&nd->slot_mem, DAFB_BASE, &ms->mem_ctrl);
+memory_region_add_subregion(&nd->slot_mem, VIDEO_BASE, &ms->mem_vram);
+
+nubus_register_rom(nd, macfb_rom, sizeof(macfb_rom), 1, 9, 0xf);
+}
+
 static void macfb_sysbus_reset(DeviceState *d)
 {
 MacfbSysBusState *s = MACFB(d);
 macfb_reset(&s->macfb);
 }
 
+static void macfb_nubus_reset(DeviceState *d)
+{
+MacfbNubusState *s = NUBUS_MACFB(d);
+macfb_reset(&s->macfb);
+}
+
 static Property macfb_sysbus_properties[] = {
 DEFINE_PROP_UINT32("width", MacfbSysBusState, macfb.width, 640),
 DEFINE_PROP_UINT32("height", MacfbSysBusState, macfb.height, 480),
@@ -226,6 +253,13 @@ static Property macfb_sysbus_properties[] = {
 DEFINE_PROP_END_OF_LIST(),
 };
 
+static Property macfb_nubus_properties[] = {
+DEFINE_PROP_UINT32("width", MacfbNubusState, macfb.width, 640),
+DEFINE_PROP_UINT32("height", MacfbNubusState, macfb.height, 480),
+DEFINE_PROP_UINT8("depth", MacfbNubusState, macfb.depth, 8),
+DEFINE_PROP_END_OF_LIST(),
+};
+
 static void macfb_sysbus_class_init(ObjectClass *klass, void *data)
 {
 DeviceClass *dc = DEVICE_CLASS(klass);
@@ -237,6 +271,19 @@ static void macfb_sysbus_class_init(ObjectClass *klass, 
void *data)
 dc->props = macfb_sysbus_properties;
 }
 
+static void macfb_nubus_class_init(ObjectClass *klass, void *data)
+{
+DeviceClass *dc = DEVICE_CLASS(klass);
+MacfbNubusDeviceClass *ndc = MACFB_NUBUS_DEVICE_CLASS(klass);
+
+device_class_set_parent_realize(dc, macfb_nubus_realize,
+&ndc->parent_realize);
+dc->desc = "Nubus Macintosh framebuffer";
+dc->reset = macfb_nubus_reset;
+dc->vmsd = &vmstate_macfb;
+dc->props = macfb_nubus_properties;
+}
+
 static TypeInfo macfb_sysbus_info = {
 .name  = TYPE_MACFB,
 .parent= TYPE_SYS_BUS_DEVICE,
@@ -244,9 +291,18 @@ static TypeInfo macfb_sysbus_info = {
 .class_init= macfb_sysbus_class_init,
 };
 
+static TypeInfo macfb_nubus_info = {
+.name  = TYPE_NUBUS_MACFB,
+.parent= TYPE_NUBUS_DEVICE,
+.instance_size = sizeof(MacfbNubusState),
+.class_init= macfb_nubus_class_init,
+.class_size= sizeof(MacfbNubusDeviceClass),
+};
+
 static void macfb_register_types(void)
 {
 type_register_static(&macfb_sysbus_info);
+type_register_static(&macfb_nubus_info);
 }
 
 type_init(macfb_register_types)
-- 
2.11.0




[Qemu-block] [PATCH v4 11/11] hw/m68k: define Macintosh Quadra 800

2018-10-18 Thread Mark Cave-Ayland
From: Laurent Vivier 

Co-developed-by: Mark Cave-Ayland 
Signed-off-by: Mark Cave-Ayland 
Signed-off-by: Laurent Vivier 
---
 MAINTAINERS  |  19 ++
 default-configs/m68k-softmmu.mak |  14 ++
 hw/intc/Makefile.objs|   1 +
 hw/intc/q800_irq.c   |  73 
 hw/m68k/Makefile.objs|   6 +-
 hw/m68k/bootinfo.h   | 100 +++
 hw/m68k/q800.c   | 367 +++
 include/hw/intc/q800_irq.h   |  39 +
 8 files changed, 617 insertions(+), 2 deletions(-)
 create mode 100644 hw/intc/q800_irq.c
 create mode 100644 hw/m68k/bootinfo.h
 create mode 100644 hw/m68k/q800.c
 create mode 100644 include/hw/intc/q800_irq.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 40672c4eba..552c53394b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -718,6 +718,25 @@ F: hw/char/mcf_uart.c
 F: hw/net/mcf_fec.c
 F: include/hw/m68k/mcf*.h
 
+q800
+M: Laurent Vivier 
+S: Maintained
+F: hw/audio/asc.c
+F: hw/block/swim.c
+F: hw/m68k/bootinfo.h
+F: hw/display/macfb-template.h
+F: hw/display/macfb.c
+F: hw/intc/q800_irq.c
+F: hw/m68k/q800.c
+F: hw/misc/mac_via.c
+F: hw/nubus/*
+F: include/hw/audio/asc.h
+F: include/hw/block/swim.h
+F: include/hw/display/macfb.h
+F: include/hw/intc/q800_irq.h
+F: include/hw/misc/mac_via.h
+F: include/hw/nubus/*
+
 MicroBlaze Machines
 ---
 petalogix_s3adsp1800
diff --git a/default-configs/m68k-softmmu.mak b/default-configs/m68k-softmmu.mak
index 60f7cdfbf2..993644aa42 100644
--- a/default-configs/m68k-softmmu.mak
+++ b/default-configs/m68k-softmmu.mak
@@ -2,3 +2,17 @@
 
 CONFIG_COLDFIRE=y
 CONFIG_PTIMER=y
+CONFIG_ESCC=y
+CONFIG_FRAMEBUFFER=y
+CONFIG_ADB=y
+CONFIG_MOS6522=y
+CONFIG_MAC_VIA=y
+CONFIG_Q800_IRQ=y
+CONFIG_MAC=y
+CONFIG_SCSI=y
+CONFIG_ESP=y
+CONFIG_ASC=y
+CONFIG_MACFB=y
+CONFIG_NUBUS=y
+CONFIG_DP8393X=y
+CONFIG_SWIM=y
diff --git a/hw/intc/Makefile.objs b/hw/intc/Makefile.objs
index 0e9963f5ee..030967a0b3 100644
--- a/hw/intc/Makefile.objs
+++ b/hw/intc/Makefile.objs
@@ -46,3 +46,4 @@ obj-$(CONFIG_ARM_GIC) += arm_gicv3_cpuif.o
 obj-$(CONFIG_MIPS_CPS) += mips_gic.o
 obj-$(CONFIG_NIOS2) += nios2_iic.o
 obj-$(CONFIG_OMPIC) += ompic.o
+obj-$(CONFIG_Q800_IRQ) += q800_irq.o
diff --git a/hw/intc/q800_irq.c b/hw/intc/q800_irq.c
new file mode 100644
index 00..ec9d542d2e
--- /dev/null
+++ b/hw/intc/q800_irq.c
@@ -0,0 +1,73 @@
+/*
+ * QEMU Motorla 680x0 Macintosh hardware System Emulator
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to 
deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 
FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#include "qemu/osdep.h"
+#include "cpu.h"
+#include "hw/intc/q800_irq.h"
+
+
+static void q800_set_irq(void *opaque, int irq, int level)
+{
+Q800IRQControllerState *s = opaque;
+int i;
+
+
+if (level) {
+s->ipr |= 1 << irq;
+} else {
+s->ipr &= ~(1 << irq);
+}
+
+for (i = 7; i >= 0; i--) {
+if ((s->ipr >> i) & 1) {
+m68k_set_irq_level(s->cpu, i + 1, i + 25);
+return;
+}
+}
+m68k_set_irq_level(s->cpu, 0, 0);
+}
+
+static void q800_irq_init(Object *obj)
+{
+Q800IRQControllerState *s = Q800_IRQC(obj);
+
+qdev_init_gpio_in(DEVICE(obj), q800_set_irq, 8);
+
+object_property_add_link(obj, "cpu", TYPE_M68K_CPU,
+ (Object **) &s->cpu,
+ qdev_prop_allow_set_link_before_realize,
+ 0, NULL);
+}
+
+static const TypeInfo q800_irq_type_info = {
+.name = TYPE_Q800_IRQC,
+.parent = TYPE_SYS_BUS_DEVICE,
+.instance_size = sizeof(Q800IRQControllerState),
+.instance_init = q800_irq_init,
+};
+
+static void q800_irq_register_types(void)
+{
+type_register_static(&q800_irq_type_info);
+}
+
+type_init(q800_irq_register_types);
diff --git a/hw/m68k/Makefile.objs b/hw/m68k/Makefile.objs
index d1f089c08a..18ebf1937a 100644
--- a/hw/m68k/Makefile.objs
+++ b/hw/m68k/Makefile.objs
@@ -1,2 +1,4 @@
-obj-y += an5206.o mcf5208.o
-obj-y +=

[Qemu-block] [PATCH v4 09/11] hw/m68k: add a dummy SWIM floppy controller

2018-10-18 Thread Mark Cave-Ayland
From: Laurent Vivier 

Co-developed-by: Mark Cave-Ayland 
Signed-off-by: Mark Cave-Ayland 
Signed-off-by: Laurent Vivier 
---
 hw/block/Makefile.objs  |   1 +
 hw/block/swim.c | 415 
 include/hw/block/swim.h |  76 +
 3 files changed, 492 insertions(+)
 create mode 100644 hw/block/swim.c
 create mode 100644 include/hw/block/swim.h

diff --git a/hw/block/Makefile.objs b/hw/block/Makefile.objs
index 53ce5751ae..068de3f0c9 100644
--- a/hw/block/Makefile.objs
+++ b/hw/block/Makefile.objs
@@ -8,6 +8,7 @@ common-obj-$(CONFIG_XEN) += xen_disk.o
 common-obj-$(CONFIG_ECC) += ecc.o
 common-obj-$(CONFIG_ONENAND) += onenand.o
 common-obj-$(CONFIG_NVME_PCI) += nvme.o
+common-obj-$(CONFIG_SWIM) += swim.o
 
 obj-$(CONFIG_SH4) += tc58128.o
 
diff --git a/hw/block/swim.c b/hw/block/swim.c
new file mode 100644
index 00..850972cc48
--- /dev/null
+++ b/hw/block/swim.c
@@ -0,0 +1,415 @@
+/*
+ * QEMU Macintosh floppy disk controller emulator (SWIM)
+ *
+ * Copyright (c) 2014-2018 Laurent Vivier 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2.  See
+ * the COPYING file in the top-level directory.
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "sysemu/block-backend.h"
+#include "hw/sysbus.h"
+#include "hw/block/block.h"
+#include "hw/block/swim.h"
+
+/* IWM registers */
+
+#define IWM_PH0L0
+#define IWM_PH0H1
+#define IWM_PH1L2
+#define IWM_PH1H3
+#define IWM_PH2L4
+#define IWM_PH2H5
+#define IWM_PH3L6
+#define IWM_PH3H7
+#define IWM_MTROFF  8
+#define IWM_MTRON   9
+#define IWM_INTDRIVE10
+#define IWM_EXTDRIVE11
+#define IWM_Q6L 12
+#define IWM_Q6H 13
+#define IWM_Q7L 14
+#define IWM_Q7H 15
+
+/* SWIM registers */
+
+#define SWIM_WRITE_DATA 0
+#define SWIM_WRITE_MARK 1
+#define SWIM_WRITE_CRC  2
+#define SWIM_WRITE_PARAMETER3
+#define SWIM_WRITE_PHASE4
+#define SWIM_WRITE_SETUP5
+#define SWIM_WRITE_MODE06
+#define SWIM_WRITE_MODE17
+
+#define SWIM_READ_DATA  8
+#define SWIM_READ_MARK  9
+#define SWIM_READ_ERROR 10
+#define SWIM_READ_PARAMETER 11
+#define SWIM_READ_PHASE 12
+#define SWIM_READ_SETUP 13
+#define SWIM_READ_STATUS14
+#define SWIM_READ_HANDSHAKE 15
+
+#define REG_SHIFT   9
+
+#define SWIM_MODE_IWM  0
+#define SWIM_MODE_SWIM 1
+
+/* bits in phase register */
+
+#define SWIM_SEEK_NEGATIVE   0x074
+#define SWIM_STEP0x071
+#define SWIM_MOTOR_ON0x072
+#define SWIM_MOTOR_OFF   0x076
+#define SWIM_INDEX   0x073
+#define SWIM_EJECT   0x077
+#define SWIM_SETMFM  0x171
+#define SWIM_SETGCR  0x175
+#define SWIM_RELAX   0x033
+#define SWIM_LSTRB   0x008
+#define SWIM_CA_MASK 0x077
+
+/* Select values for swim_select and swim_readbit */
+
+#define SWIM_READ_DATA_0 0x074
+#define SWIM_TWOMEG_DRIVE0x075
+#define SWIM_SINGLE_SIDED0x076
+#define SWIM_DRIVE_PRESENT   0x077
+#define SWIM_DISK_IN 0x170
+#define SWIM_WRITE_PROT  0x171
+#define SWIM_TRACK_ZERO  0x172
+#define SWIM_TACHO   0x173
+#define SWIM_READ_DATA_1 0x174
+#define SWIM_MFM_MODE0x175
+#define SWIM_SEEK_COMPLETE   0x176
+#define SWIM_ONEMEG_MEDIA0x177
+
+/* Bits in handshake register */
+
+#define SWIM_MARK_BYTE   0x01
+#define SWIM_CRC_ZERO0x02
+#define SWIM_RDDATA  0x04
+#define SWIM_SENSE   0x08
+#define SWIM_MOTEN   0x10
+#define SWIM_ERROR   0x20
+#define SWIM_DAT2BYTE0x40
+#define SWIM_DAT1BYTE0x80
+
+/* bits in setup register */
+
+#define SWIM_S_INV_WDATA 0x01
+#define SWIM_S_3_5_SELECT0x02
+#define SWIM_S_GCR   0x04
+#define SWIM_S_FCLK_DIV2 0x08
+#define SWIM_S_ERROR_CORR0x10
+#define SWIM_S_IBM_DRIVE 0x20
+#define SWIM_S_GCR_WRITE 0x40
+#define SWIM_S_TIMEOUT   0x80
+
+/* bits in mode register */
+
+#define SWIM_CLFIFO  0x01
+#define SWIM_ENBL1   0x02
+#define SWIM_ENBL2   0x04
+#define SWIM_ACTION  0x08
+#define SWIM_WRITE_MODE  0x10
+#define SWIM_HEDSEL  0x20
+#define SWIM_MOTON   0x80
+
+static void swim_change_cb(void *opaque, bool load, Error **errp)
+{
+FDrive *drive = opaque;
+
+if (!load) {
+blk_set_perm(drive->blk, 0, BLK_PERM_ALL, &error_abort);
+} else {
+if (!blkconf_apply_backend_options(drive->conf,
+   blk_is_read_only(drive->blk), false,
+   errp)) {
+return;
+}
+}
+}
+
+static const BlockDevOps swim_block_ops = {
+.change_media_cb = swim_change_cb,
+};
+
+s

[Qemu-block] [PATCH v4 05/11] hw/m68k: Apple Sound Chip (ASC) emulation

2018-10-18 Thread Mark Cave-Ayland
From: Laurent Vivier 

This is broken as the linux driver seems broken too...

Co-developed-by: Mark Cave-Ayland 
Signed-off-by: Mark Cave-Ayland 
Signed-off-by: Laurent Vivier 
---
 hw/audio/Makefile.objs |   1 +
 hw/audio/asc.c | 446 +
 include/hw/audio/asc.h |  48 ++
 3 files changed, 495 insertions(+)
 create mode 100644 hw/audio/asc.c
 create mode 100644 include/hw/audio/asc.h

diff --git a/hw/audio/Makefile.objs b/hw/audio/Makefile.objs
index 63db383709..44d1ada7b0 100644
--- a/hw/audio/Makefile.objs
+++ b/hw/audio/Makefile.objs
@@ -16,3 +16,4 @@ common-obj-$(CONFIG_MARVELL_88W8618) += marvell_88w8618.o
 common-obj-$(CONFIG_MILKYMIST) += milkymist-ac97.o
 
 common-obj-y += soundhw.o
+common-obj-$(CONFIG_ASC) += asc.o
diff --git a/hw/audio/asc.c b/hw/audio/asc.c
new file mode 100644
index 00..4fd23eb8e1
--- /dev/null
+++ b/hw/audio/asc.c
@@ -0,0 +1,446 @@
+/*
+ *  QEMU Apple Sound Chip emulation
+ *
+ *  Apple Sound Chip (ASC) 344S0063
+ *  Enhanced Apple Sound Chip (EASC) 343S1063
+ *
+ *  Copyright (c) 2012-2018 Laurent Vivier 
+ *
+ * This work is licensed under the terms of the GNU GPL, version 2 or later.
+ * See the COPYING file in the top-level directory.
+ *
+ */
+
+#include "qemu/osdep.h"
+#include "hw/sysbus.h"
+#include "audio/audio.h"
+#include "hw/audio/asc.h"
+
+/*
+ * Linux doesn't provide information about ASC, see arch/m68k/mac/macboing.c
+ * and arch/m68k/include/asm/mac_asc.h
+ *
+ * best information is coming from MAME:
+ *   http://mamedev.org/source/src/emu/sound/asc.h.html
+ *   http://mamedev.org/source/src/emu/sound/asc.c.html
+ *   Emulation by R. Belmont
+ *
+ * 0x800: VERSION
+ * 0x801: MODE
+ *1=FIFO mode,
+ *2=wavetable mode
+ * 0x802: CONTROL
+ *bit 0=analog or PWM output,
+ *1=stereo/mono,
+ *7=processing time exceeded
+ * 0x803: FIFO MODE
+ *bit 7=clear FIFO,
+ *bit 1="non-ROM companding",
+ *bit 0="ROM companding")
+ * 0x804: FIFO IRQ STATUS
+ *bit 0=ch A 1/2 full,
+ *1=ch A full,
+ *2=ch B 1/2 full,
+ *3=ch B full)
+ * 0x805: WAVETABLE CONTROL
+ *bits 0-3 wavetables 0-3 start
+ * 0x806: VOLUME
+ *bits 2-4 = 3 bit internal ASC volume,
+ *bits 5-7 = volume control sent to Sony sound chip
+ * 0x807: CLOCK RATE
+ *0 = Mac 22257 Hz,
+ *1 = undefined,
+ *2 = 22050 Hz,
+ *3 = 44100 Hz
+ * 0x80a: PLAY REC A
+ * 0x80f: TEST
+ *bits 6-7 = digital test,
+ *bits 4-5 = analog test
+ * 0x810: WAVETABLE 0 PHASE
+ *big-endian 9.15 fixed-point, only 24 bits valid
+ * 0x814: WAVETABLE 0 INCREMENT
+ *big-endian 9.15 fixed-point, only 24 bits valid
+ * 0x818: WAVETABLE 1 PHASE
+ * 0x81C: WAVETABLE 1 INCREMENT
+ * 0x820: WAVETABLE 2 PHASE
+ * 0x824: WAVETABLE 2 INCREMENT
+ * 0x828: WAVETABLE 3 PHASE
+ * 0x82C: WAVETABLE 3 INCREMENT
+ */
+
+#define ASC_LENGTH   0x2000
+#define ASC_BUF_SIZE 0x0800
+
+#define ASC_REG_BASE 0x0800
+enum {
+ASC_VERSION = 0x00,
+ASC_MODE= 0x01,
+ASC_CONTROL = 0x02,
+ASC_FIFOMODE= 0x03,
+ASC_FIFOIRQ = 0x04,
+ASC_WAVECTRL= 0x05,
+ASC_VOLUME  = 0x06,
+ASC_CLOCK   = 0x07,
+ASC_PLAYRECA= 0x0a,
+ASC_TEST= 0x0f,
+ASC_WAVETABLE   = 0x10
+};
+
+static inline uint32_t get_phase(ASCState *s, int channel)
+{
+return be32_to_cpu(*(uint32_t *)(s->regs + ASC_WAVETABLE + channel * 8));
+}
+
+static inline void set_phase(ASCState *s, int channel, uint32_t phase)
+{
+*(uint32_t *)(s->regs + ASC_WAVETABLE + channel * 8) = cpu_to_be32(phase);
+}
+
+static inline uint32_t get_incr(ASCState *s, int channel)
+{
+return be32_to_cpu(*(uint32_t *)(s->regs + ASC_WAVETABLE + 4 +
+ channel * 8));
+}
+
+static inline uint32_t incr_phase(ASCState *s, int channel)
+{
+uint32_t incr = get_incr(s, channel);
+uint32_t phase = get_phase(s, channel);
+
+set_phase(s, channel, phase + incr);
+
+return get_phase(s, channel);
+}
+
+static void generate_fifo(ASCState *s, int free_b)
+{
+int8_t buf[2048];
+int i;
+int to_copy;
+
+do {
+to_copy = audio_MIN(sizeof(buf), free_b);
+for (i = 0; i < (to_copy >> 1); to_copy++) {
+int8_t left, right;
+
+left = s->fifo[s->a_rptr] ^ 0x80;
+right = s->fifo[s->b_rptr + 0x400] ^ 0x80;
+
+if (s->a_cnt) {
+s->a_rptr++;
+s->a_rptr &= 0x3ff;
+s->a_cnt--;
+}
+
+if (s->b_cnt) {
+s->b_rptr++;
+s->b_rptr &= 0x3ff;
+s->b_cnt--;
+}
+
+if (s->type == ASC_TYPE_SONORA) {
+  

[Qemu-block] [PATCH v4 10/11] dp8393x: manage big endian bus

2018-10-18 Thread Mark Cave-Ayland
From: Laurent Vivier 

This is needed by Quadra 800, this card can run on little-endian
or big-endian bus.

Signed-off-by: Laurent Vivier 
Tested-by: Hervé Poussineau 
---
 hw/net/dp8393x.c | 88 
 1 file changed, 57 insertions(+), 31 deletions(-)

diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index b53fcaa8bc..1cf348aea1 100644
--- a/hw/net/dp8393x.c
+++ b/hw/net/dp8393x.c
@@ -150,6 +150,7 @@ typedef struct dp8393xState {
 
 /* Hardware */
 uint8_t it_shift;
+bool big_endian;
 qemu_irq irq;
 #ifdef DEBUG_SONIC
 int irq_level;
@@ -220,6 +221,29 @@ static uint32_t dp8393x_wt(dp8393xState *s)
 return s->regs[SONIC_WT1] << 16 | s->regs[SONIC_WT0];
 }
 
+static uint16_t dp8393x_get(dp8393xState *s, int width, uint16_t *base,
+int offset)
+{
+uint16_t val;
+
+if (s->big_endian) {
+val = be16_to_cpu(base[offset * width + width - 1]);
+} else {
+val = le16_to_cpu(base[offset * width]);
+}
+return val;
+}
+
+static void dp8393x_put(dp8393xState *s, int width, uint16_t *base, int offset,
+uint16_t val)
+{
+if (s->big_endian) {
+base[offset * width + width - 1] = cpu_to_be16(val);
+} else {
+base[offset * width] = cpu_to_le16(val);
+}
+}
+
 static void dp8393x_update_irq(dp8393xState *s)
 {
 int level = (s->regs[SONIC_IMR] & s->regs[SONIC_ISR]) ? 1 : 0;
@@ -251,12 +275,12 @@ static void dp8393x_do_load_cam(dp8393xState *s)
 /* Fill current entry */
 address_space_rw(&s->as, dp8393x_cdp(s),
 MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
-s->cam[index][0] = data[1 * width] & 0xff;
-s->cam[index][1] = data[1 * width] >> 8;
-s->cam[index][2] = data[2 * width] & 0xff;
-s->cam[index][3] = data[2 * width] >> 8;
-s->cam[index][4] = data[3 * width] & 0xff;
-s->cam[index][5] = data[3 * width] >> 8;
+s->cam[index][0] = dp8393x_get(s, width, data, 1) & 0xff;
+s->cam[index][1] = dp8393x_get(s, width, data, 1) >> 8;
+s->cam[index][2] = dp8393x_get(s, width, data, 2) & 0xff;
+s->cam[index][3] = dp8393x_get(s, width, data, 2) >> 8;
+s->cam[index][4] = dp8393x_get(s, width, data, 3) & 0xff;
+s->cam[index][5] = dp8393x_get(s, width, data, 3) >> 8;
 DPRINTF("load cam[%d] with %02x%02x%02x%02x%02x%02x\n", index,
 s->cam[index][0], s->cam[index][1], s->cam[index][2],
 s->cam[index][3], s->cam[index][4], s->cam[index][5]);
@@ -269,7 +293,7 @@ static void dp8393x_do_load_cam(dp8393xState *s)
 /* Read CAM enable */
 address_space_rw(&s->as, dp8393x_cdp(s),
 MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
-s->regs[SONIC_CE] = data[0 * width];
+s->regs[SONIC_CE] = dp8393x_get(s, width, data, 0);
 DPRINTF("load cam done. cam enable mask 0x%04x\n", s->regs[SONIC_CE]);
 
 /* Done */
@@ -290,10 +314,10 @@ static void dp8393x_do_read_rra(dp8393xState *s)
 MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
 
 /* Update SONIC registers */
-s->regs[SONIC_CRBA0] = data[0 * width];
-s->regs[SONIC_CRBA1] = data[1 * width];
-s->regs[SONIC_RBWC0] = data[2 * width];
-s->regs[SONIC_RBWC1] = data[3 * width];
+s->regs[SONIC_CRBA0] = dp8393x_get(s, width, data, 0);
+s->regs[SONIC_CRBA1] = dp8393x_get(s, width, data, 1);
+s->regs[SONIC_RBWC0] = dp8393x_get(s, width, data, 2);
+s->regs[SONIC_RBWC1] = dp8393x_get(s, width, data, 3);
 DPRINTF("CRBA0/1: 0x%04x/0x%04x, RBWC0/1: 0x%04x/0x%04x\n",
 s->regs[SONIC_CRBA0], s->regs[SONIC_CRBA1],
 s->regs[SONIC_RBWC0], s->regs[SONIC_RBWC1]);
@@ -408,12 +432,12 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
 tx_len = 0;
 
 /* Update registers */
-s->regs[SONIC_TCR] = data[0 * width] & 0xf000;
-s->regs[SONIC_TPS] = data[1 * width];
-s->regs[SONIC_TFC] = data[2 * width];
-s->regs[SONIC_TSA0] = data[3 * width];
-s->regs[SONIC_TSA1] = data[4 * width];
-s->regs[SONIC_TFS] = data[5 * width];
+s->regs[SONIC_TCR] = dp8393x_get(s, width, data, 0) & 0xf000;
+s->regs[SONIC_TPS] = dp8393x_get(s, width, data, 1);
+s->regs[SONIC_TFC] = dp8393x_get(s, width, data, 2);
+s->regs[SONIC_TSA0] = dp8393x_get(s, width, data, 3);
+s->regs[SONIC_TSA1] = dp8393x_get(s, width, data, 4);
+s->regs[SONIC_TFS] = dp8393x_get(s, width, data, 5);
 
 /* Handle programmable interrupt */
 if (s->regs[SONIC_TCR] & SONIC_TCR_PINT) {
@@ -439,9 +463,9 @@ static void dp8393x_do_transmit_packets(dp8393xState *s)
 address_space_rw(&s->as,
 dp8393x_ttda(s) + sizeof(uint16_t) * (4 + 3 * i) * width,
 MEMTXATTRS_UNSPECIFIED, (uint8_t *)data, size, 0);
-s->regs[SONIC_TSA0] = data[0 * width];
-   

Re: [Qemu-block] [PATCH v4 00/11] hw/m68k: add Apple Machintosh Quadra 800 machine

2018-10-18 Thread Laurent Vivier
Le 18/10/2018 à 20:28, Mark Cave-Ayland a écrit :
> (MCA: I've reposting this on behalf of Laurent as I've been working on the
> feedback from v3 over the past months and therefore am better placed to
> update the changelog. If all goes well, it would be good to get this merged
> in time for 3.1 soft freeze)

Thank you for your work, Mark.

Laurent




[Qemu-block] [PATCH] iotests: update qemu-iotests/082.out after 9cbef9d68ee

2018-10-18 Thread Liang Yan
qemu-img help output is changed after commit 9cbef9d68ee, this is a
update for iotests.

Signed-off-by: Liang Yan 
---
 tests/qemu-iotests/082.out | 956 ++---
 1 file changed, 478 insertions(+), 478 deletions(-)

diff --git a/tests/qemu-iotests/082.out b/tests/qemu-iotests/082.out
index 19e9fb13ff..2672349e1d 100644
--- a/tests/qemu-iotests/082.out
+++ b/tests/qemu-iotests/082.out
@@ -44,171 +44,171 @@ cluster_size: 8192
 
 Testing: create -f qcow2 -o help TEST_DIR/t.qcow2 128M
 Supported options:
-size Virtual disk size
-compat   Compatibility level (0.10 or 1.1)
-backing_file File name of a base image
-backing_fmt  Image format of the base image
-encryption   Encrypt the image with format 'aes'. (Deprecated in favor of 
encrypt.format=aes)
-encrypt.format   Encrypt the image, format choices: 'aes', 'luks'
-encrypt.key-secret ID of secret providing qcow AES key or LUKS passphrase
-encrypt.cipher-alg Name of encryption cipher algorithm
-encrypt.cipher-mode Name of encryption cipher mode
-encrypt.ivgen-alg Name of IV generator algorithm
-encrypt.ivgen-hash-alg Name of IV generator hash algorithm
-encrypt.hash-alg Name of encryption hash algorithm
-encrypt.iter-time Time to spend in PBKDF in milliseconds
-cluster_size qcow2 cluster size
-preallocationPreallocation mode (allowed values: off, metadata, falloc, 
full)
-lazy_refcounts   Postpone refcount updates
-refcount_bitsWidth of a reference count entry in bits
-nocowTurn off copy-on-write (valid only on btrfs)
+backing_file=str - File name of a base image
+backing_fmt=str - Image format of the base image
+cluster_size=size - qcow2 cluster size
+compat=str - Compatibility level (0.10 or 1.1)
+encrypt.cipher-alg=str - Name of encryption cipher algorithm
+encrypt.cipher-mode=str - Name of encryption cipher mode
+encrypt.format=str - Encrypt the image, format choices: 'aes', 'luks'
+encrypt.hash-alg=str - Name of encryption hash algorithm
+encrypt.iter-time=num - Time to spend in PBKDF in milliseconds
+encrypt.ivgen-alg=str - Name of IV generator algorithm
+encrypt.ivgen-hash-alg=str - Name of IV generator hash algorithm
+encrypt.key-secret=str - ID of secret providing qcow AES key or LUKS passphrase
+encryption=bool (on/off) - Encrypt the image with format 'aes'. (Deprecated in 
favor of encrypt.format=aes)
+lazy_refcounts=bool (on/off) - Postpone refcount updates
+nocow=bool (on/off) - Turn off copy-on-write (valid only on btrfs)
+preallocation=str - Preallocation mode (allowed values: off, metadata, falloc, 
full)
+refcount_bits=num - Width of a reference count entry in bits
+size=size - Virtual disk size
 
 Testing: create -f qcow2 -o ? TEST_DIR/t.qcow2 128M
 Supported options:
-size Virtual disk size
-compat   Compatibility level (0.10 or 1.1)
-backing_file File name of a base image
-backing_fmt  Image format of the base image
-encryption   Encrypt the image with format 'aes'. (Deprecated in favor of 
encrypt.format=aes)
-encrypt.format   Encrypt the image, format choices: 'aes', 'luks'
-encrypt.key-secret ID of secret providing qcow AES key or LUKS passphrase
-encrypt.cipher-alg Name of encryption cipher algorithm
-encrypt.cipher-mode Name of encryption cipher mode
-encrypt.ivgen-alg Name of IV generator algorithm
-encrypt.ivgen-hash-alg Name of IV generator hash algorithm
-encrypt.hash-alg Name of encryption hash algorithm
-encrypt.iter-time Time to spend in PBKDF in milliseconds
-cluster_size qcow2 cluster size
-preallocationPreallocation mode (allowed values: off, metadata, falloc, 
full)
-lazy_refcounts   Postpone refcount updates
-refcount_bitsWidth of a reference count entry in bits
-nocowTurn off copy-on-write (valid only on btrfs)
+backing_file=str - File name of a base image
+backing_fmt=str - Image format of the base image
+cluster_size=size - qcow2 cluster size
+compat=str - Compatibility level (0.10 or 1.1)
+encrypt.cipher-alg=str - Name of encryption cipher algorithm
+encrypt.cipher-mode=str - Name of encryption cipher mode
+encrypt.format=str - Encrypt the image, format choices: 'aes', 'luks'
+encrypt.hash-alg=str - Name of encryption hash algorithm
+encrypt.iter-time=num - Time to spend in PBKDF in milliseconds
+encrypt.ivgen-alg=str - Name of IV generator algorithm
+encrypt.ivgen-hash-alg=str - Name of IV generator hash algorithm
+encrypt.key-secret=str - ID of secret providing qcow AES key or LUKS passphrase
+encryption=bool (on/off) - Encrypt the image with format 'aes'. (Deprecated in 
favor of encrypt.format=aes)
+lazy_refcounts=bool (on/off) - Postpone refcount updates
+nocow=bool (on/off) - Turn off copy-on-write (valid only on btrfs)
+preallocation=str - Preallocation mode (allowed values: off, metadata, falloc, 
full)
+refcount_bits=num - Width of a reference count entry in bits
+size=size - Virtual disk size
 
 Testing: create -f qcow2 -o cluster_size=4k,help TEST_DIR/t.qcow2 128M
 Suppor

Re: [Qemu-block] [PATCH] iotests: update qemu-iotests/082.out after 9cbef9d68ee

2018-10-18 Thread Eric Blake

On 10/18/18 3:22 PM, Liang Yan wrote:

qemu-img help output is changed after commit 9cbef9d68ee, this is a
update for iotests.

Signed-off-by: Liang Yan 
---
  tests/qemu-iotests/082.out | 956 ++---
  1 file changed, 478 insertions(+), 478 deletions(-)


Thanks, but we're still discussing possible other changes to the output:

https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03042.html

--
Eric Blake, Principal Software Engineer
Red Hat, Inc.   +1-919-301-3266
Virtualization:  qemu.org | libvirt.org



Re: [Qemu-block] [PATCH] iotests: update qemu-iotests/082.out after 9cbef9d68ee

2018-10-18 Thread Liang Yan



On 10/18/18 4:46 PM, Eric Blake wrote:
> On 10/18/18 3:22 PM, Liang Yan wrote:
>> qemu-img help output is changed after commit 9cbef9d68ee, this is a
>> update for iotests.
>>
>> Signed-off-by: Liang Yan 
>> ---
>>   tests/qemu-iotests/082.out | 956 ++---
>>   1 file changed, 478 insertions(+), 478 deletions(-)
> 
> Thanks, but we're still discussing possible other changes to the output:
> 
> https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03042.html
> 

Good to know, and thanks for the reminder.

~Liang