[Mesa-dev] [PATCH v2 1/3] aubinator: Simplify print_dword_val() method

2016-09-13 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Remove the float/dword union and use the iter->p[f->start / 32]
directly as printf formatter %08x expects uint32_t (Ken)

v2: Make the cleanup much more crispier (Ken)

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/aubinator.c | 12 
 1 file changed, 4 insertions(+), 8 deletions(-)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 9d29b68..89d29f2 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -91,18 +91,14 @@ print_dword_val(struct gen_field_iterator *iter, uint64_t 
offset,
 int *dword_num)
 {
struct gen_field *f;
-   union {
-  uint32_t dw;
-  float f;
-   } v;
 
f = iter->group->fields[iter->i - 1];
-   v.dw = iter->p[f->start / 32];
+   const int dword = f->start / 32;
 
-   if (*dword_num != (f->start / 32)) {
+   if (*dword_num != dword) {
   printf("0x%08lx:  0x%08x : Dword %d\n",
- offset + 4 * (f->start / 32), v.dw, f->start / 32);
-  *dword_num = (f->start / 32);
+ offset + 4 * dword,  iter->p[dword], dword);
+  *dword_num = dword;
}
 }
 
-- 
2.7.4

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[Mesa-dev] [PATCH v2 2/3] aubinator: Make gen_disasm_disassemble handle split sends

2016-09-13 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Skylake adds new SENDS and SENDSC opcodes, which should be
handled in the send-with-EOT check. Make an is_send() helper
that checks if the opcode is SEND/SENDC/SENDS/SENDSC (Ken)

v2: Make is_send() much more crispier, Mix declaration and
code to make the code compact (Ken)

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/disasm.c | 19 ---
 1 file changed, 12 insertions(+), 7 deletions(-)

diff --git a/src/intel/tools/disasm.c b/src/intel/tools/disasm.c
index 7e5a7cb..89c711b 100644
--- a/src/intel/tools/disasm.c
+++ b/src/intel/tools/disasm.c
@@ -35,6 +35,15 @@ struct gen_disasm {
 struct gen_device_info devinfo;
 };
 
+static bool
+is_send(uint32_t opcode)
+{
+   return (opcode == BRW_OPCODE_SEND  ||
+   opcode == BRW_OPCODE_SENDC ||
+   opcode == BRW_OPCODE_SENDS ||
+   opcode == BRW_OPCODE_SENDSC );
+}
+
 void
 gen_disasm_disassemble(struct gen_disasm *disasm, void *assembly, int start,
int end, FILE *out)
@@ -74,14 +83,10 @@ gen_disasm_disassemble(struct gen_disasm *disasm, void 
*assembly, int start,
   brw_disassemble_inst(out, devinfo, insn, compacted);
 
   /* Simplistic, but efficient way to terminate disasm */
-  if (brw_inst_opcode(devinfo, insn) == BRW_OPCODE_SEND ||
-  brw_inst_opcode(devinfo, insn) == BRW_OPCODE_SENDC) {
- if (brw_inst_eot(devinfo, insn))
-break;
-  }
-
-  if (brw_inst_opcode(devinfo, insn) == 0)
+  uint32_t opcode = brw_inst_opcode(devinfo, insn);
+  if (opcode == 0 || (is_send(opcode) && brw_inst_eot(devinfo, insn))) {
  break;
+  }
}
 }
 
-- 
2.7.4

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[Mesa-dev] [PATCH v2 3/3] aubinator: Remove bogus "end" parameter in gen_disasm_disassemble()

2016-09-13 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Earlier, the loop pretends to loop over instructions from "start" to "end",
but the callers always pass 8192 for end, which is some huge bogus
value. The real loop termination condition is send-with-EOT or 0. (Ken)

v2: no change

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/aubinator.c  | 12 ++--
 src/intel/tools/disasm.c |  8 +---
 src/intel/tools/gen_disasm.h |  2 +-
 3 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 89d29f2..fad8aaa 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -303,7 +303,7 @@ handle_media_interface_descriptor_load(struct gen_spec 
*spec, uint32_t *p)
   }
 
   insns = (struct brw_instruction *) (gtt + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
 
   dump_samplers(spec, descriptors[3] & ~0x1f);
   dump_binding_table(spec, descriptors[4] & ~0x1f);
@@ -401,7 +401,7 @@ handle_3dstate_vs(struct gen_spec *spec, uint32_t *p)
  instruction_base, start);
 
   insns = (struct brw_instruction *) (gtt + instruction_base + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
}
 }
 
@@ -425,7 +425,7 @@ handle_3dstate_hs(struct gen_spec *spec, uint32_t *p)
  instruction_base, start);
 
   insns = (struct brw_instruction *) (gtt + instruction_base + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
}
 }
 
@@ -519,21 +519,21 @@ handle_3dstate_ps(struct gen_spec *spec, uint32_t *p)
printf("  Kernel[0] %s\n", k0);
if (k0 != unused) {
   insns = (struct brw_instruction *) (gtt + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
}
 
start = instruction_base + (p[k1_offset] & mask);
printf("  Kernel[1] %s\n", k1);
if (k1 != unused) {
   insns = (struct brw_instruction *) (gtt + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
}
 
start = instruction_base + (p[k2_offset] & mask);
printf("  Kernel[2] %s\n", k2);
if (k2 != unused) {
   insns = (struct brw_instruction *) (gtt + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
}
 }
 
diff --git a/src/intel/tools/disasm.c b/src/intel/tools/disasm.c
index 89c711b..2b51424 100644
--- a/src/intel/tools/disasm.c
+++ b/src/intel/tools/disasm.c
@@ -45,13 +45,15 @@ is_send(uint32_t opcode)
 }
 
 void
-gen_disasm_disassemble(struct gen_disasm *disasm, void *assembly, int start,
-   int end, FILE *out)
+gen_disasm_disassemble(struct gen_disasm *disasm, void *assembly,
+   int start, FILE *out)
 {
struct gen_device_info *devinfo = &disasm->devinfo;
bool dump_hex = false;
+   int offset = start;
 
-   for (int offset = start; offset < end;) {
+   /* This loop exits when send-with-EOT or when opcode is 0 */
+   while (true) {
   brw_inst *insn = assembly + offset;
   brw_inst uncompacted;
   bool compacted = brw_inst_cmpt_control(devinfo, insn);
diff --git a/src/intel/tools/gen_disasm.h b/src/intel/tools/gen_disasm.h
index af6654f..24b56c9 100644
--- a/src/intel/tools/gen_disasm.h
+++ b/src/intel/tools/gen_disasm.h
@@ -28,7 +28,7 @@ struct gen_disasm;
 
 struct gen_disasm *gen_disasm_create(int pciid);
 void gen_disasm_disassemble(struct gen_disasm *disasm,
-void *assembly, int start, int end, FILE *out);
+void *assembly, int start, FILE *out);
 
 void gen_disasm_destroy(struct gen_disasm *disasm);
 
-- 
2.7.4

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[Mesa-dev] [PATCH v2 0/3] *** Aubinator code simplification ***

2016-09-13 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

This patch set simplifies parts of code in the aubinator tool
as per review comments from Ken (Wed Aug 24 04:51:47 UTC 2016)

v2 of the earlier patches simplifying code further as per Ken's comments

Sirisha Gandikota (3):
  aubinator: Simplify print_dword_val() method
  aubinator: Make gen_disasm_disassemble handle split sends
  aubinator: Remove bogus "end" parameter in gen_disasm_disassemble()

 src/intel/tools/aubinator.c  | 24 ++--
 src/intel/tools/disasm.c | 27 +--
 src/intel/tools/gen_disasm.h |  2 +-
 3 files changed, 28 insertions(+), 25 deletions(-)

-- 
2.7.4

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[Mesa-dev] [PATCH] aubinator: Fix the decoding of values that span two Dwords

2016-09-20 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Fixed the way the values that span two Dwords are decoded.
Based on the start and end indices of the field, the Dwords
are fetched and decoded accordingly.

Earlier, 64-bit fields (such as most pointers on Gen8+)
weren't decoded correctly.  gen_field_iterator_next seemed
to walk one DWord at a time, sets v.dw, and then passes it
to field(). So, even though field() takes a uint64_t, we're
passing it a uint32_t (which gets promoted, so the top 32
bits will always be zero). This seems pretty bogus... (Ken)

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/decoder.c | 40 
 1 file changed, 32 insertions(+), 8 deletions(-)

diff --git a/src/intel/tools/decoder.c b/src/intel/tools/decoder.c
index b5f557c..bea9f22 100644
--- a/src/intel/tools/decoder.c
+++ b/src/intel/tools/decoder.c
@@ -191,6 +191,26 @@ get_register_offset(const char **atts, uint32_t *offset)
return;
 }
 
+static void
+get_start_end_pos(int *start, int *end)
+{
+   /* start value has to be mod with 32 as we need the relative
+* start position in the first DWord. For the end position, add
+* the length of the field to the start position to get the
+* relative postion in the 64 bit address.
+*/
+   if (*end - *start > 32) {
+  int len = *end - *start;
+  *start = *start % 32;
+  *end = *start + len;
+   } else {
+  *start = *start % 32;
+  *end = *end % 32;
+   }
+
+   return;
+}
+
 static inline uint64_t
 mask(int start, int end)
 {
@@ -204,18 +224,16 @@ mask(int start, int end)
 static inline uint64_t
 field(uint64_t value, int start, int end)
 {
-   /* The field values are obtained from the DWord,
-* Hence, get the relative start and end positions
-* by doing a %32 on the start and end positions
-*/
-   return (value & mask(start % 32, end % 32)) >> (start % 32);
+   get_start_end_pos(&start, &end);
+   return (value & mask(start, end)) >> (start);
 }
 
 static inline uint64_t
 field_address(uint64_t value, int start, int end)
 {
/* no need to right shift for address/offset */
-   return (value & mask(start % 32, end % 32));
+   get_start_end_pos(&start, &end);
+   return (value & mask(start, end));
 }
 
 static struct gen_type
@@ -491,7 +509,7 @@ gen_field_iterator_next(struct gen_field_iterator *iter)
 {
struct gen_field *f;
union {
-  uint32_t dw;
+  uint64_t dw;
   float f;
} v;
 
@@ -500,7 +518,13 @@ gen_field_iterator_next(struct gen_field_iterator *iter)
 
f = iter->group->fields[iter->i++];
iter->name = f->name;
-   v.dw = iter->p[f->start / 32];
+   int index = f->start / 32;
+
+   if ((f->end - f->start) > 32)
+  v.dw = ((uint64_t) iter->p[index+1] << 32 ) | iter->p[index];
+   else
+  v.dw = iter->p[index];
+
switch (f->type.kind) {
case GEN_TYPE_UNKNOWN:
case GEN_TYPE_INT:
-- 
2.7.4

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[Mesa-dev] [PATCH] *** Decode fields spanning to two DWords correctly ***

2016-09-20 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

The first version of aubinator did not take into account the fields
spanning to 2 DWords. Hence fields like 64bit address/offset and int
were not decoded correctly. This patch should fix that issue.

Sirisha Gandikota (1):
  aubinator: Fix the decoding of values that span two Dwords

 src/intel/tools/decoder.c | 40 
 1 file changed, 32 insertions(+), 8 deletions(-)

-- 
2.7.4

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[Mesa-dev] [PATCH v2] aubinator: Fix the decoding of values that span two Dwords

2016-09-20 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Fixed the way the values that span two Dwords are decoded.
Based on the start and end indices of the field, the Dwords
are fetched and decoded accordingly.

v2: rename dw to qw in gen_field_iterator_next()
and remove extra white space in the same method (Anuj)

Earlier, 64-bit fields (such as most pointers on Gen8+)
weren't decoded correctly.  gen_field_iterator_next seemed
to walk one DWord at a time, sets v.dw, and then passes it
to field(). So, even though field() takes a uint64_t, we're
passing it a uint32_t (which gets promoted, so the top 32
bits will always be zero). This seems pretty bogus... (Ken)

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/decoder.c | 40 
 1 file changed, 32 insertions(+), 8 deletions(-)

diff --git a/src/intel/tools/decoder.c b/src/intel/tools/decoder.c
index b5f557c..1610457 100644
--- a/src/intel/tools/decoder.c
+++ b/src/intel/tools/decoder.c
@@ -191,6 +191,26 @@ get_register_offset(const char **atts, uint32_t *offset)
return;
 }
 
+static void
+get_start_end_pos(int *start, int *end)
+{
+   /* start value has to be mod with 32 as we need the relative
+* start position in the first DWord. For the end position, add
+* the length of the field to the start position to get the
+* relative postion in the 64 bit address.
+*/
+   if (*end - *start > 32) {
+  int len = *end - *start;
+  *start = *start % 32;
+  *end = *start + len;
+   } else {
+  *start = *start % 32;
+  *end = *end % 32;
+   }
+
+   return;
+}
+
 static inline uint64_t
 mask(int start, int end)
 {
@@ -204,18 +224,16 @@ mask(int start, int end)
 static inline uint64_t
 field(uint64_t value, int start, int end)
 {
-   /* The field values are obtained from the DWord,
-* Hence, get the relative start and end positions
-* by doing a %32 on the start and end positions
-*/
-   return (value & mask(start % 32, end % 32)) >> (start % 32);
+   get_start_end_pos(&start, &end);
+   return (value & mask(start, end)) >> (start);
 }
 
 static inline uint64_t
 field_address(uint64_t value, int start, int end)
 {
/* no need to right shift for address/offset */
-   return (value & mask(start % 32, end % 32));
+   get_start_end_pos(&start, &end);
+   return (value & mask(start, end));
 }
 
 static struct gen_type
@@ -491,7 +509,7 @@ gen_field_iterator_next(struct gen_field_iterator *iter)
 {
struct gen_field *f;
union {
-  uint32_t dw;
+  uint64_t qw;
   float f;
} v;
 
@@ -500,7 +518,13 @@ gen_field_iterator_next(struct gen_field_iterator *iter)
 
f = iter->group->fields[iter->i++];
iter->name = f->name;
-   v.dw = iter->p[f->start / 32];
+   int index = f->start / 32;
+
+   if ((f->end - f->start) > 32)
+  v.dw = ((uint64_t) iter->p[index+1] << 32) | iter->p[index];
+   else
+  v.dw = iter->p[index];
+
switch (f->type.kind) {
case GEN_TYPE_UNKNOWN:
case GEN_TYPE_INT:
-- 
2.7.4

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[Mesa-dev] [PATCH v2] *** Decode fields spanning to two DWords correctly ***

2016-09-20 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

The first version of aubinator did not take into account the fields
spanning to 2 DWords. Hence fields like 64bit address/offset and
int were not decoded correctly. This patch should fix that issue.

v2: Aptly renamed dw to qw in the method gen_field_iterator_next()
and removed extra white space in the same method

Sirisha Gandikota (1):
  aubinator: Fix the decoding of values that span two Dwords

 src/intel/tools/decoder.c | 40 
 1 file changed, 32 insertions(+), 8 deletions(-)

-- 
2.7.4

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[Mesa-dev] [PATCH v3] *** Decode fields spanning across two DWords correctly ***

2016-09-20 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

The first version of aubinator did not take into account the fields
spanning across 2 DWords. Hence fields like 64bit address/offset and
int were not decoded correctly. This patch should fix that issue.

v2: Aptly renamed dw to qw in the method gen_field_iterator_next()
and removed extra white space in the same method (Anuj)

v3: Change all instances of dw to qw (Anuj)

Tested on HSW, BDW, SKL aub files


Sirisha Gandikota (1):
  aubinator: Fix the decoding of values that span two Dwords

 src/intel/tools/decoder.c | 50 +++
 1 file changed, 37 insertions(+), 13 deletions(-)

-- 
2.7.4

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[Mesa-dev] [PATCH v3] aubinator: Fix the decoding of values that span two Dwords

2016-09-20 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Fixed the way the values that span two Dwords are decoded.
Based on the start and end indices of the field, the Dwords
are fetched and decoded accordingly.

v2: rename dw to qw in gen_field_iterator_next
and remove extra white space (Anuj)

v3: change all instances of dw to qw (Anuj)

Earlier, 64-bit fields (such as most pointers on Gen8+)
weren't decoded correctly.  gen_field_iterator_next seemed
to walk one DWord at a time, sets v.dw, and then passes it
to field(). So, even though field() takes a uint64_t, we're
passing it a uint32_t (which gets promoted, so the top 32
bits will always be zero). This seems pretty bogus... (Ken)

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/decoder.c | 50 +++
 1 file changed, 37 insertions(+), 13 deletions(-)

diff --git a/src/intel/tools/decoder.c b/src/intel/tools/decoder.c
index b5f557c..be3558b 100644
--- a/src/intel/tools/decoder.c
+++ b/src/intel/tools/decoder.c
@@ -191,6 +191,26 @@ get_register_offset(const char **atts, uint32_t *offset)
return;
 }
 
+static void
+get_start_end_pos(int *start, int *end)
+{
+   /* start value has to be mod with 32 as we need the relative
+* start position in the first DWord. For the end position, add
+* the length of the field to the start position to get the
+* relative postion in the 64 bit address.
+*/
+   if (*end - *start > 32) {
+  int len = *end - *start;
+  *start = *start % 32;
+  *end = *start + len;
+   } else {
+  *start = *start % 32;
+  *end = *end % 32;
+   }
+
+   return;
+}
+
 static inline uint64_t
 mask(int start, int end)
 {
@@ -204,18 +224,16 @@ mask(int start, int end)
 static inline uint64_t
 field(uint64_t value, int start, int end)
 {
-   /* The field values are obtained from the DWord,
-* Hence, get the relative start and end positions
-* by doing a %32 on the start and end positions
-*/
-   return (value & mask(start % 32, end % 32)) >> (start % 32);
+   get_start_end_pos(&start, &end);
+   return (value & mask(start, end)) >> (start);
 }
 
 static inline uint64_t
 field_address(uint64_t value, int start, int end)
 {
/* no need to right shift for address/offset */
-   return (value & mask(start % 32, end % 32));
+   get_start_end_pos(&start, &end);
+   return (value & mask(start, end));
 }
 
 static struct gen_type
@@ -491,7 +509,7 @@ gen_field_iterator_next(struct gen_field_iterator *iter)
 {
struct gen_field *f;
union {
-  uint32_t dw;
+  uint64_t qw;
   float f;
} v;
 
@@ -500,20 +518,26 @@ gen_field_iterator_next(struct gen_field_iterator *iter)
 
f = iter->group->fields[iter->i++];
iter->name = f->name;
-   v.dw = iter->p[f->start / 32];
+   int index = f->start / 32;
+
+   if ((f->end - f->start) > 32)
+  v.qw = ((uint64_t) iter->p[index+1] << 32) | iter->p[index];
+   else
+  v.qw = iter->p[index];
+
switch (f->type.kind) {
case GEN_TYPE_UNKNOWN:
case GEN_TYPE_INT:
   snprintf(iter->value, sizeof(iter->value),
-   "%ld", field(v.dw, f->start, f->end));
+   "%ld", field(v.qw, f->start, f->end));
   break;
case GEN_TYPE_UINT:
   snprintf(iter->value, sizeof(iter->value),
-   "%lu", field(v.dw, f->start, f->end));
+   "%lu", field(v.qw, f->start, f->end));
   break;
case GEN_TYPE_BOOL:
   snprintf(iter->value, sizeof(iter->value),
-   "%s", field(v.dw, f->start, f->end) ? "true" : "false");
+   "%s", field(v.qw, f->start, f->end) ? "true" : "false");
   break;
case GEN_TYPE_FLOAT:
   snprintf(iter->value, sizeof(iter->value), "%f", v.f);
@@ -521,7 +545,7 @@ gen_field_iterator_next(struct gen_field_iterator *iter)
case GEN_TYPE_ADDRESS:
case GEN_TYPE_OFFSET:
   snprintf(iter->value, sizeof(iter->value),
-   "0x%08lx", field_address(v.dw, f->start, f->end));
+   "0x%08lx", field_address(v.qw, f->start, f->end));
   break;
case GEN_TYPE_STRUCT:
   snprintf(iter->value, sizeof(iter->value),
@@ -529,7 +553,7 @@ gen_field_iterator_next(struct gen_field_iterator *iter)
   break;
case GEN_TYPE_UFIXED:
   snprintf(iter->value, sizeof(iter->value),
-   "%f", (float) field(v.dw, f->start, f->end) / (1 << f->type.f));
+   "%f", (float) field(v.qw, f->start, f->end) / (1 << f->type.f));
   break;
case GEN_TYPE_SFIXED:
   /* FIXME: Sign extend extracted field. */
-- 
2.7.4

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[Mesa-dev] [PATCH 1/2] aubinator: Add a new tool called Aubinator to the src/intel/tools folder.

2016-08-09 Thread Sirisha Gandikota 
From: Kristian Høgsberg Kristensen 

The Aubinator tool is designed to help the driver developers in debugging
the driver functionality by decoding the data in the .aub files.
Primary Authors of this tool are Damien Lespiau 
and Kristian Høgsberg Kristensen .

Signed-off-by: Sirisha Gandikota 
---
 configure.ac |1 +
 src/Makefile.am  |4 +
 src/intel/tools/Makefile.am  |   65 +++
 src/intel/tools/aubinator.c  | 1039 ++
 src/intel/tools/decoder.c|  520 +
 src/intel/tools/decoder.h|   57 +++
 src/intel/tools/disasm.c |  109 +
 src/intel/tools/gen_disasm.h |   35 ++
 src/intel/tools/intel_aub.h  |  154 +++
 9 files changed, 1984 insertions(+)
 create mode 100644 src/intel/tools/Makefile.am
 create mode 100644 src/intel/tools/aubinator.c
 create mode 100644 src/intel/tools/decoder.c
 create mode 100644 src/intel/tools/decoder.h
 create mode 100644 src/intel/tools/disasm.c
 create mode 100644 src/intel/tools/gen_disasm.h
 create mode 100644 src/intel/tools/intel_aub.h

diff --git a/configure.ac b/configure.ac
index aea5890..acc8356 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2742,6 +2742,7 @@ AC_CONFIG_FILES([Makefile
src/intel/genxml/Makefile
src/intel/isl/Makefile
src/intel/vulkan/Makefile
+   src/intel/tools/Makefile
src/loader/Makefile
src/mapi/Makefile
src/mapi/es1api/glesv1_cm.pc
diff --git a/src/Makefile.am b/src/Makefile.am
index d4e34b4..190ad08 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -88,6 +88,10 @@ if HAVE_INTEL_VULKAN
 SUBDIRS += intel/vulkan
 endif
 
+if HAVE_INTEL_DRIVERS
+SUBDIRS += intel/tools
+endif
+
 if HAVE_GALLIUM
 SUBDIRS += gallium
 endif
diff --git a/src/intel/tools/Makefile.am b/src/intel/tools/Makefile.am
new file mode 100644
index 000..cf5477f
--- /dev/null
+++ b/src/intel/tools/Makefile.am
@@ -0,0 +1,65 @@
+# Copyright © 2016 Intel Corporation
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice (including the next
+# paragraph) shall be included in all copies or substantial portions of the
+# Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+# IN THE SOFTWARE.
+
+CLEANFILES = \
+   aubinator-aubinator.o \
+   aubinator-decoder.o \
+   disasm.lo \
+   libdisasm.la
+
+noinst_LTLIBRARIES = libdisasm.la
+
+AM_CPPFLAGS = \
+   $(INTEL_CFLAGS) \
+   $(VALGRIND_CFLAGS) \
+   $(DEFINES) \
+   -I$(top_srcdir)/include \
+   -I$(top_builddir)/src \
+   -I$(top_srcdir)/src \
+   -I$(top_builddir)/src/compiler \
+   -I$(top_srcdir)/src/compiler \
+   -I$(top_builddir)/src/compiler/nir \
+   -I$(top_srcdir)/src/mapi \
+   -I$(top_srcdir)/src/mesa \
+   -I$(top_srcdir)/src/mesa/drivers/dri/common \
+   -I$(top_srcdir)/src/mesa/drivers/dri/i965 \
+   -I$(top_srcdir)/src/gallium/auxiliary \
+   -I$(top_srcdir)/src/gallium/include \
+   -I$(top_builddir)/src/intel \
+   -I$(top_srcdir)/src/intel
+
+libdisasm_la_SOURCES = \
+   gen_disasm.h \
+   disasm.c
+libdisasm_la_LIBADD = 
$(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \
+   $(top_builddir)/src/mesa/libmesa.la \
+   $(PER_GEN_LIBS) \
+   $(PTHREAD_LIBS) \
+   $(DLOPEN_LIBS) \
+   -lm
+
+
+bin_PROGRAMS = aubinator
+
+aubinator_SOURCES = intel_aub.h decoder.c decoder.h aubinator.c
+aubinator_CFLAGS =  $(EXPAT_CFLAGS) $(AM_CFLAGS) -I$(top_srcdir)/src 
-I$(top_srcdir)/include
+
+aubinator_LDADD = $(EXPAT_LIBS) libdisasm.la
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
new file mode 100644
index 000..99d67a1
--- /dev/null
+++ b/src/intel/tools/aubinator.c
@@ -0,0 +1,1039 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without

[Mesa-dev] [PATCH 2/2] aubinator: Fix the tool to correctly decode the DWords

2016-08-09 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Several fixes have been added as part of this as listed below:

1) Fix the mask and add disassembler handling for STATE_DS, STATE_HS
as the mask returned wrong values of the fields.

2) Fix the GEN_TYPE_ADDRESS/GEN_TYPE_OFFSET decoding - the address/
offset were handled the same way as the other fields and that gives
the wrong values for the address/offset.

3) Decode nested/recurssive structures - Many packets contain nested
structures, ex: 3DSATE_SO_BUFFER, STATE_BASE_ADDRESS, etc contain MOC
structures. Previously, the aubinator printed 1 if there was a MOC
structure. Now we decode the entire structure and print out its fields.

4) Print out the DWord address along with its hex value - For a better
clarity of information, it is helpful to print both the address and
hex value of the DWord along with the DWord count. Since the DWord0
contains the instruction code and the instruction length, it is
unnecessary to print the decoded values for DWord0. This information
is already available from the DWord hex value.

5) Decode the  and the corresponding fields in the group- The
 tag can have fields of several types including structures. A
group can contain one or more number of fields and this has be correctly
decoded. Previously, aubinator did not decode the groups or the
fields/structures inside them. Now we decode the  in the
instructions and structures where the fields in it repeat for any number
of times specified.

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/aubinator.c | 115 +---
 src/intel/tools/decoder.c   |  95 +---
 src/intel/tools/decoder.h   |  39 +++
 3 files changed, 192 insertions(+), 57 deletions(-)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 99d67a1..d2f9d13 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -84,17 +84,80 @@ valid_offset(uint32_t offset)
 }
 
 static void
+print_dword_val(struct gen_field_iterator *iter, uint64_t offset, int 
*dword_num)
+{
+   struct gen_field *f;
+   union {
+  uint32_t dw;
+  float f;
+   } v;
+
+   f = iter->group->fields[iter->i-1];
+   v.dw = iter->p[f->start / 32];
+
+   if (*dword_num != (f->start/32)) {
+  printf("0x%08lx:  0x%08x : Dword %d\n",(offset+4*(f->start/32)), v.dw, 
f->start/32);
+  *dword_num = (f->start/32);
+   }
+}
+
+static char *
+print_iterator_values(struct gen_field_iterator *iter, int *idx)
+{
+char *token = NULL;
+if (strstr(iter->value,"struct") == NULL) {
+printf("%s: %s\n", iter->name, iter->value);
+} else {
+token = strtok(iter->value, " ");
+if (token != NULL) {
+token = strtok(NULL, " ");
+*idx = atoi(strtok(NULL, ">"));
+} else {
+token = NULL;
+}
+printf("%s:\n", iter->name, token);
+}
+return token;
+
+}
+
+static void
 decode_structure(struct gen_spec *spec, struct gen_group *strct, const 
uint32_t *p)
 {
struct gen_field_iterator iter;
+   char *token = NULL;
+   int idx = 0, dword_num = 0;
+   uint64_t offset = 0;
+
+   if (option_print_offsets)
+  offset = (void *) p - gtt;
+   else
+  offset = 0;
 
gen_field_iterator_init(&iter, strct, p);
while (gen_field_iterator_next(&iter)) {
-  printf("%s: %s\n", iter.name, iter.value);
+  idx = 0;
+  print_dword_val(&iter, offset, &dword_num);
+  token = print_iterator_values(&iter, &idx);
+  if (token != NULL) {
+ struct gen_group *struct_val = gen_spec_find_struct(spec, token);
+ decode_structure(spec, struct_val, &p[idx]);
+ token = NULL;
+  }
}
 }
 
 static void
+handle_struct_decode(struct gen_spec *spec, char *struct_name, uint32_t *p)
+{
+if (struct_name == NULL)
+return;
+struct gen_group *struct_val = gen_spec_find_struct(spec, struct_name);
+decode_structure(spec, struct_val, p);
+
+}
+
+static void
 dump_binding_table(struct gen_spec *spec, uint32_t offset)
 {
uint32_t *pointers, i;
@@ -248,7 +311,8 @@ handle_media_interface_descriptor_load(struct gen_spec 
*spec, uint32_t *p)
 }
 
 /* Heuristic to determine whether a uint32_t is probably actually a float
- * (http://stackoverflow.com/a/2953466) */
+ * (http://stackoverflow.com/a/2953466) 
+ */
 
 static bool
 probably_float(uint32_t bits)
@@ -256,15 +320,15 @@ probably_float(uint32_t bits)
int exp = ((bits & 0x7f80U) >> 23) - 127;
uint32_t mant = bits & 0x007f;
 
-   // +- 0.0
+   /* +- 0.0 */
if (exp == -127 && mant == 0)
   return true;
 
-   // +- 1 billionth to 1 billion
+   /* +- 1 billionth to 1 billion */
if (-30 <= exp && exp <= 30)
   return true;
 
-   // some value with only a few bi

[Mesa-dev] [PATCH 0/2] *** Aubinator tool for Intel Gen platforms ***

2016-08-09 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

This is a patch series for adding the aubinator tool to the codebase.

The aubinator tool is designed to help the driver developers to debug
the driver functionality by decoding the data in the .aub files. This
tool is for Intel Gen platforms and has been tested for Gen7.5, Gen8 
and Gen9 platforms.

Kristian Høgsberg Kristensen (1):
  aubinator: Add a new tool called Aubinator to the src/intel/tools
folder.

Sirisha Gandikota (1):
  aubinator: Fix the tool to correctly decode the DWords

 configure.ac |1 +
 src/Makefile.am  |4 +
 src/intel/tools/Makefile.am  |   65 +++
 src/intel/tools/aubinator.c  | 1140 ++
 src/intel/tools/decoder.c|  515 +++
 src/intel/tools/decoder.h|   96 
 src/intel/tools/disasm.c |  109 
 src/intel/tools/gen_disasm.h |   35 ++
 src/intel/tools/intel_aub.h  |  154 ++
 9 files changed, 2119 insertions(+)
 create mode 100644 src/intel/tools/Makefile.am
 create mode 100644 src/intel/tools/aubinator.c
 create mode 100644 src/intel/tools/decoder.c
 create mode 100644 src/intel/tools/decoder.h
 create mode 100644 src/intel/tools/disasm.c
 create mode 100644 src/intel/tools/gen_disasm.h
 create mode 100644 src/intel/tools/intel_aub.h

-- 
2.7.4

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[Mesa-dev] [PATCH v2 1/2] aubinator: Add a new tool called Aubinator to the src/intel/tools folder.

2016-08-19 Thread Sirisha Gandikota 
From: Kristian Høgsberg Kristensen 

The Aubinator tool is designed to help the driver developers in debugging
the driver functionality by decoding the data in the .aub files.
Primary Authors of this tool are Damien Lespiau 
and Kristian Høgsberg Kristensen .

v2: Review comments are incorporated by Sirisha Gandikota as below:
1) Make Makefile.am more crisp, reuse intel_aub.h from libdrm (per Emil)
2) Aubinator will use platform name instead of GEN number (per Matt)
3) Disassmebler gets created based on pciid rather then GEN number (per Matt)
4) Other formatting comments (per Ken, Matt and Emil)

Signed-off-by: Sirisha Gandikota 
---
 configure.ac |1 +
 src/Makefile.am  |4 +
 src/intel/tools/Makefile.am  |   64 +++
 src/intel/tools/aubinator.c  | 1066 ++
 src/intel/tools/decoder.c|  518 
 src/intel/tools/decoder.h|   57 +++
 src/intel/tools/disasm.c |  111 +
 src/intel/tools/gen_disasm.h |   35 ++
 8 files changed, 1856 insertions(+)
 create mode 100644 src/intel/tools/Makefile.am
 create mode 100644 src/intel/tools/aubinator.c
 create mode 100644 src/intel/tools/decoder.c
 create mode 100644 src/intel/tools/decoder.h
 create mode 100644 src/intel/tools/disasm.c
 create mode 100644 src/intel/tools/gen_disasm.h

diff --git a/configure.ac b/configure.ac
index aea5890..3aa15c7 100644
--- a/configure.ac
+++ b/configure.ac
@@ -2741,6 +2741,7 @@ AC_CONFIG_FILES([Makefile
src/intel/Makefile
src/intel/genxml/Makefile
src/intel/isl/Makefile
+   src/intel/tools/Makefile
src/intel/vulkan/Makefile
src/loader/Makefile
src/mapi/Makefile
diff --git a/src/Makefile.am b/src/Makefile.am
index d4e34b4..cffb9e8 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -83,6 +83,10 @@ if HAVE_EGL
 SUBDIRS += egl
 endif
 
+if HAVE_INTEL_DRIVERS
+SUBDIRS += intel/tools
+endif
+
 ## Requires the i965 compiler (part of mesa) and wayland-drm
 if HAVE_INTEL_VULKAN
 SUBDIRS += intel/vulkan
diff --git a/src/intel/tools/Makefile.am b/src/intel/tools/Makefile.am
new file mode 100644
index 000..9f9bb86
--- /dev/null
+++ b/src/intel/tools/Makefile.am
@@ -0,0 +1,64 @@
+# Copyright © 2016 Intel Corporation
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice (including the next
+# paragraph) shall be included in all copies or substantial portions of the
+# Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+# IN THE SOFTWARE.
+
+# The gallium includes are for the util/u_math.h include from main/macros.h
+AM_CPPFLAGS = \
+   $(INTEL_CFLAGS) \
+   $(VALGRIND_CFLAGS) \
+   $(DEFINES) \
+   -I$(top_srcdir)/include \
+   -I$(top_builddir)/src \
+   -I$(top_srcdir)/src \
+   -I$(top_srcdir)/src/mapi \
+   -I$(top_srcdir)/src/mesa \
+   -I$(top_srcdir)/src/mesa/drivers/dri/common \
+   -I$(top_srcdir)/src/mesa/drivers/dri/i965 \
+   -I$(top_srcdir)/src/gallium/auxiliary \
+   -I$(top_srcdir)/src/gallium/include \
+   -I$(top_builddir)/src/intel \
+   -I$(top_srcdir)/src/intel
+
+aubinator_DEPS = \
+   $(top_builddir)/src/mesa/drivers/dri/i965/libi965_compiler.la \
+   $(top_builddir)/src/util/libmesautil.la \
+   $(PER_GEN_LIBS) \
+   $(PTHREAD_LIBS) \
+   $(DLOPEN_LIBS) \
+   -lm
+
+noinst_PROGRAMS = aubinator
+
+aubinator_SOURCES = \
+   aubinator.c \
+   decoder.c \
+   decoder.h \
+   disasm.c \
+   gen_disasm.h
+
+aubinator_LDADD = \
+   $(aubinator_DEPS) \
+   $(EXPAT_LIBS)
+
+aubinator_CFLAGS = \
+   $(AM_CFLAGS) \
+   $(EXPAT_CFLAGS) \
+   -I$(top_srcdir)/include \
+   -I$(top_srcdir)/src
diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
new file mode 100644
index 000..250a2e1
--- /dev/null
+++ b/src/intel/tools/aubinator.c
@@ -0,0 +1,1066 @@
+/*
+ * Copyright © 2016 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this sof

[Mesa-dev] [PATCH v2 0/2] *** Aubinator tool for Intel Gen platforms ***

2016-08-19 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

This is a patch series for adding the aubinator tool to the codebase.

The aubinator tool is designed to help the driver developers to debug
the driver functionality by decoding the data in the .aub files. This
tool is for Intel Gen platforms and has been tested for Gen7.5, Gen8 
and Gen9 platforms.

v2: Resending the patches after incorporating all the review comments.

Kristian Høgsberg Kristensen (1):
  aubinator: Add a new tool called Aubinator to the src/intel/tools
folder.

Sirisha Gandikota (1):
  aubinator: Fix the tool to correctly decode the DWords

 configure.ac |1 +
 src/Makefile.am  |4 +
 src/intel/tools/Makefile.am  |   64 +++
 src/intel/tools/aubinator.c  | 1164 ++
 src/intel/tools/decoder.c|  516 +++
 src/intel/tools/decoder.h|   97 
 src/intel/tools/disasm.c |  111 
 src/intel/tools/gen_disasm.h |   35 ++
 8 files changed, 1992 insertions(+)
 create mode 100644 src/intel/tools/Makefile.am
 create mode 100644 src/intel/tools/aubinator.c
 create mode 100644 src/intel/tools/decoder.c
 create mode 100644 src/intel/tools/decoder.h
 create mode 100644 src/intel/tools/disasm.c
 create mode 100644 src/intel/tools/gen_disasm.h

-- 
2.7.4

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[Mesa-dev] [PATCH v2 2/2] aubinator: Fix the tool to correctly decode the DWords

2016-08-19 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Several fixes have been added as part of this as listed below:

1) Fix the mask and add disassembler handling for STATE_DS, STATE_HS
as the mask returned wrong values of the fields.

2) Fix the GEN_TYPE_ADDRESS/GEN_TYPE_OFFSET decoding - the address/
offset were handled the same way as the other fields and that gives
the wrong values for the address/offset.

3) Decode nested/recurssive structures - Many packets contain nested
structures, ex: 3DSATE_SO_BUFFER, STATE_BASE_ADDRESS, etc contain MOC
structures. Previously, the aubinator printed 1 if there was a MOC
structure. Now we decode the entire structure and print out its fields.

4) Print out the DWord address along with its hex value - For a better
clarity of information, it is helpful to print both the address and
hex value of the DWord along with the DWord count. Since the DWord0
contains the instruction code and the instruction length, it is
unnecessary to print the decoded values for DWord0. This information
is already available from the DWord hex value.

5) Decode the  and the corresponding fields in the group- The
 tag can have fields of several types including structures. A
group can contain one or more number of fields and this has be correctly
decoded. Previously, aubinator did not decode the groups or the
fields/structures inside them. Now we decode the  in the
instructions and structures where the fields in it repeat for any number
of times specified.

v2: Fix the formatting (per Matt)
Make the start and end pos calculation to extract fields from a DWord
more appropriate by moving %32 away from mask() method

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/aubinator.c | 104 ++--
 src/intel/tools/decoder.c   |  98 -
 src/intel/tools/decoder.h   |  40 +
 3 files changed, 189 insertions(+), 53 deletions(-)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 250a2e1..11e1b9d 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -88,17 +88,78 @@ valid_offset(uint32_t offset)
 }
 
 static void
+print_dword_val(struct gen_field_iterator *iter, uint64_t offset, int 
*dword_num)
+{
+   struct gen_field *f;
+   union {
+  uint32_t dw;
+  float f;
+   } v;
+
+   f = iter->group->fields[iter->i - 1];
+   v.dw = iter->p[f->start / 32];
+
+   if (*dword_num != (f->start / 32)) {
+  printf("0x%08lx:  0x%08x : Dword %d\n",(offset + 4 * (f->start / 32)), 
v.dw, f->start / 32);
+  *dword_num = (f->start / 32);
+   }
+}
+
+static char*
+print_iterator_values(struct gen_field_iterator *iter, int *idx)
+{
+char *token = NULL;
+if (strstr(iter->value,"struct") == NULL) {
+printf("%s: %s\n", iter->name, iter->value);
+} else {
+token = strtok(iter->value, " ");
+if (token != NULL) {
+token = strtok(NULL, " ");
+*idx = atoi(strtok(NULL, ">"));
+} else {
+token = NULL;
+}
+printf("%s:\n", iter->name, token);
+}
+return token;
+}
+
+static void
 decode_structure(struct gen_spec *spec, struct gen_group *strct, const 
uint32_t *p)
 {
struct gen_field_iterator iter;
+   char *token = NULL;
+   int idx = 0, dword_num = 0;
+   uint64_t offset = 0;
+
+   if (option_print_offsets)
+  offset = (void *) p - gtt;
+   else
+  offset = 0;
 
gen_field_iterator_init(&iter, strct, p);
while (gen_field_iterator_next(&iter)) {
-  printf("%s: %s\n", iter.name, iter.value);
+  idx = 0;
+  print_dword_val(&iter, offset, &dword_num);
+  token = print_iterator_values(&iter, &idx);
+  if (token != NULL) {
+ struct gen_group *struct_val = gen_spec_find_struct(spec, token);
+ decode_structure(spec, struct_val, &p[idx]);
+ token = NULL;
+  }
}
 }
 
 static void
+handle_struct_decode(struct gen_spec *spec, char *struct_name, uint32_t *p)
+{
+if (struct_name == NULL)
+return;
+struct gen_group *struct_val = gen_spec_find_struct(spec, struct_name);
+decode_structure(spec, struct_val, p);
+}
+
+static void
 dump_binding_table(struct gen_spec *spec, uint32_t offset)
 {
uint32_t *pointers, i;
@@ -347,6 +408,30 @@ handle_3dstate_vs(struct gen_spec *spec, uint32_t *p)
 }
 
 static void
+handle_3dstate_hs(struct gen_spec *spec, uint32_t *p)
+{
+   uint64_t start;
+   struct brw_instruction *insns;
+   int hs_enable;
+
+   if (gen_spec_get_gen(spec) >= gen_make_gen(8, 0)) {
+  start = get_qword(&p[4]);
+   } else {
+  start = p[4];
+   }
+
+   hs_enable = p[2] & 0x8000;
+
+   if (hs_enable) {
+  printf("instruction_base %08lx, start %08lx\n",
+ instruction_base, start);
+
+  insns = (struct brw_in

[Mesa-dev] [PATCH 5/5] aubinator: Remove bogus "end" parameter in gen_disasm_disassemble()

2016-09-08 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Earlier, the loop pretends to loop over instructions from "start" to "end",
but the callers always pass 8192 for end, which is some huge bogus
value. The real loop termination condition is send-with-EOT or 0. (Ken)

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/aubinator.c  | 12 ++--
 src/intel/tools/disasm.c |  8 +---
 src/intel/tools/gen_disasm.h |  2 +-
 3 files changed, 12 insertions(+), 10 deletions(-)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index d147225..fffb1b6 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -304,7 +304,7 @@ handle_media_interface_descriptor_load(struct gen_spec 
*spec, uint32_t *p)
   }
 
   insns = (struct brw_instruction *) (gtt + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
 
   dump_samplers(spec, descriptors[3] & ~0x1f);
   dump_binding_table(spec, descriptors[4] & ~0x1f);
@@ -402,7 +402,7 @@ handle_3dstate_vs(struct gen_spec *spec, uint32_t *p)
  instruction_base, start);
 
   insns = (struct brw_instruction *) (gtt + instruction_base + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
}
 }
 
@@ -426,7 +426,7 @@ handle_3dstate_hs(struct gen_spec *spec, uint32_t *p)
  instruction_base, start);
 
   insns = (struct brw_instruction *) (gtt + instruction_base + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
}
 }
 
@@ -520,21 +520,21 @@ handle_3dstate_ps(struct gen_spec *spec, uint32_t *p)
printf("  Kernel[0] %s\n", k0);
if (k0 != unused) {
   insns = (struct brw_instruction *) (gtt + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
}
 
start = instruction_base + (p[k1_offset] & mask);
printf("  Kernel[1] %s\n", k1);
if (k1 != unused) {
   insns = (struct brw_instruction *) (gtt + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
}
 
start = instruction_base + (p[k2_offset] & mask);
printf("  Kernel[2] %s\n", k2);
if (k2 != unused) {
   insns = (struct brw_instruction *) (gtt + start);
-  gen_disasm_disassemble(disasm, insns, 0, 8192, stdout);
+  gen_disasm_disassemble(disasm, insns, 0, stdout);
}
 }
 
diff --git a/src/intel/tools/disasm.c b/src/intel/tools/disasm.c
index 13e4ce2..7b8bf69 100644
--- a/src/intel/tools/disasm.c
+++ b/src/intel/tools/disasm.c
@@ -48,14 +48,16 @@ is_send(uint32_t opcode)
 }
 
 void
-gen_disasm_disassemble(struct gen_disasm *disasm, void *assembly, int start,
-   int end, FILE *out)
+gen_disasm_disassemble(struct gen_disasm *disasm, void *assembly,
+   int start, FILE *out)
 {
struct gen_device_info *devinfo = &disasm->devinfo;
bool dump_hex = false;
uint32_t opcode = 0;
+   int offset = start;
 
-   for (int offset = start; offset < end;) {
+   /* This loop exits when send-with-EOT or when opcode is 0 */
+   while (true) {
   brw_inst *insn = assembly + offset;
   brw_inst uncompacted;
   bool compacted = brw_inst_cmpt_control(devinfo, insn);
diff --git a/src/intel/tools/gen_disasm.h b/src/intel/tools/gen_disasm.h
index af6654f..24b56c9 100644
--- a/src/intel/tools/gen_disasm.h
+++ b/src/intel/tools/gen_disasm.h
@@ -28,7 +28,7 @@ struct gen_disasm;
 
 struct gen_disasm *gen_disasm_create(int pciid);
 void gen_disasm_disassemble(struct gen_disasm *disasm,
-void *assembly, int start, int end, FILE *out);
+void *assembly, int start, FILE *out);
 
 void gen_disasm_destroy(struct gen_disasm *disasm);
 
-- 
2.7.4

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[Mesa-dev] [PATCH 1/5] aubinator: Fix compiler warning

2016-09-08 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Add 'const' qualifier to gen_field_iterator::p pointer (Ken)

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/decoder.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/intel/tools/decoder.h b/src/intel/tools/decoder.h
index b46e451..4ab0765 100644
--- a/src/intel/tools/decoder.h
+++ b/src/intel/tools/decoder.h
@@ -47,7 +47,7 @@ struct gen_field_iterator {
struct gen_group *group;
const char *name;
char value[128];
-   uint32_t *p;
+   const uint32_t *p;
int i;
 };
 
-- 
2.7.4

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[Mesa-dev] [PATCH 3/5] aubinator: Simplify print_dword_val() method

2016-09-08 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Remove the float/dword union and use the iter->p[f->start / 32]
directly as printf formatter %08x expects uint32_t (Ken)

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/aubinator.c | 8 ++--
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/src/intel/tools/aubinator.c b/src/intel/tools/aubinator.c
index 811f707..d147225 100644
--- a/src/intel/tools/aubinator.c
+++ b/src/intel/tools/aubinator.c
@@ -92,17 +92,13 @@ print_dword_val(struct gen_field_iterator *iter, uint64_t 
offset,
 int *dword_num)
 {
struct gen_field *f;
-   union {
-  uint32_t dw;
-  float f;
-   } v;
 
f = iter->group->fields[iter->i - 1];
-   v.dw = iter->p[f->start / 32];
 
if (*dword_num != (f->start / 32)) {
   printf("0x%08lx:  0x%08x : Dword %d\n",
- offset + 4 * (f->start / 32), v.dw, f->start / 32);
+ offset + 4 * (f->start / 32), iter->p[f->start / 32], f->start / 
+32);
   *dword_num = (f->start / 32);
}
 }
-- 
2.7.4

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[Mesa-dev] [PATCH 2/5] aubinator: Simplify gen_disasm_create()'s devinfo handling

2016-09-08 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Copy the whole devinfo structure instead of just few fields (Ken)

Earlier, copied only couple of fields which added more code. So,
simplify code by copying the whole structure.

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/disasm.c | 8 +---
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/src/intel/tools/disasm.c b/src/intel/tools/disasm.c
index ddbfa9f..7e5a7cb 100644
--- a/src/intel/tools/disasm.c
+++ b/src/intel/tools/disasm.c
@@ -89,18 +89,12 @@ struct gen_disasm *
 gen_disasm_create(int pciid)
 {
struct gen_disasm *gd;
-   const struct gen_device_info *dev_info = NULL;
 
gd = malloc(sizeof *gd);
if (gd == NULL)
   return NULL;
 
-   dev_info = gen_get_device_info(pciid);
-
-   gd->devinfo.gen = dev_info->gen;
-   gd->devinfo.is_cherryview = dev_info->is_cherryview;
-   gd->devinfo.is_g4x = dev_info->is_g4x;
-
+   gd->devinfo = *gen_get_device_info(pciid);
brw_init_compaction_tables(&gd->devinfo);
 
return gd;
-- 
2.7.4

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[Mesa-dev] [PATCH 4/5] aubinator: Make gen_disasm_disassemble handle split sends

2016-09-08 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

Skylake adds new SENDS and SENDSC opcodes, which should be
handled in the send-with-EOT check. Make an is_send() helper
that checks if the opcode is SEND/SENDC/SENDS/SENDSC (Ken)

Signed-off-by: Sirisha Gandikota 
---
 src/intel/tools/disasm.c | 22 --
 1 file changed, 16 insertions(+), 6 deletions(-)

diff --git a/src/intel/tools/disasm.c b/src/intel/tools/disasm.c
index 7e5a7cb..13e4ce2 100644
--- a/src/intel/tools/disasm.c
+++ b/src/intel/tools/disasm.c
@@ -35,12 +35,25 @@ struct gen_disasm {
 struct gen_device_info devinfo;
 };
 
+
+static bool
+is_send(uint32_t opcode)
+{
+   if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC ||
+   opcode == BRW_OPCODE_SENDS || opcode == BRW_OPCODE_SENDSC ) {
+  return true;
+   } else {
+  return false;
+   }
+}
+
 void
 gen_disasm_disassemble(struct gen_disasm *disasm, void *assembly, int start,
int end, FILE *out)
 {
struct gen_device_info *devinfo = &disasm->devinfo;
bool dump_hex = false;
+   uint32_t opcode = 0;
 
for (int offset = start; offset < end;) {
   brw_inst *insn = assembly + offset;
@@ -74,14 +87,11 @@ gen_disasm_disassemble(struct gen_disasm *disasm, void 
*assembly, int start,
   brw_disassemble_inst(out, devinfo, insn, compacted);
 
   /* Simplistic, but efficient way to terminate disasm */
-  if (brw_inst_opcode(devinfo, insn) == BRW_OPCODE_SEND ||
-  brw_inst_opcode(devinfo, insn) == BRW_OPCODE_SENDC) {
- if (brw_inst_eot(devinfo, insn))
-break;
+  opcode = brw_inst_opcode(devinfo, insn);
+  if (opcode == 0 || (is_send(opcode) && brw_inst_eot(devinfo, insn))) {
+ break;
   }
 
-  if (brw_inst_opcode(devinfo, insn) == 0)
- break;
}
 }
 
-- 
2.7.4

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[Mesa-dev] [PATCH 0/5] *** Aubinator code simplification ***

2016-09-08 Thread Sirisha Gandikota 
From: Sirisha Gandikota 

This patch set simplifies parts of code in the aubinator tool
as per review comments from Ken (Wed Aug 24 04:51:47 UTC 2016)

Sirisha Gandikota (5):
  aubinator: Fix compiler warning
  aubinator: Simplify gen_disasm_create()'s devinfo handling
  aubinator: Simplify print_dword_val() method
  aubinator: Make gen_disasm_disassemble handle split sends
  aubinator: Remove bogus "end" parameter in gen_disasm_disassemble()

 src/intel/tools/aubinator.c  | 20 
 src/intel/tools/decoder.h|  2 +-
 src/intel/tools/disasm.c | 38 ++
 src/intel/tools/gen_disasm.h |  2 +-
 4 files changed, 32 insertions(+), 30 deletions(-)

-- 
2.7.4

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