[Mesa-dev] [Bug 35268] initial-exec TLS model breaks dlopen'ed libGL

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=35268

--- Comment #23 from Sora Lee  ---
(In reply to Rich Felker from comment #22)
> Ping.
> 
> Looking at this again, I see the original proposed patch introduced a lot of
> extra asm to save/restore registers that might be clobbered by
> __tls_get_addr. That could all go away if tlsdesc support is assumed and
> used.
> 
> The patch also adds some dubious prefix bytes to instructions in
> _x86_64_get_dispatch. Is there any reason for that?

I believe the operand size override prefixes are necessary to use @TLSGD on the
x86-64 architecture.

I've remade the original patches for compatibility with mesa 18.2.2 and
implemented TLSDESC as you suggested using
https://www.fsfla.org/~lxoliva/writeups/TLS/RFC-TLSDESC-x86.txt as a guide,
however I still seem to be getting issues with the _glapi_tls_Dispatch symbol.
In particular, my test code (dlopen_test.c) throws:

dlopen failed with message 'Error relocating /usr/lib/libglapi.so:
_glapi_tls_Dispatch: initial-exec TLS resolves to dynamic definition in
/usr/lib/libglapi.so'

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[Mesa-dev] [Bug 35268] initial-exec TLS model breaks dlopen'ed libGL

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=35268

Sora Lee  changed:

   What|Removed |Added

  Attachment #44777|0   |1
is obsolete||

--- Comment #24 from Sora Lee  ---
Created attachment 142010
  --> https://bugs.freedesktop.org/attachment.cgi?id=142010&action=edit
Patches for musl compatability

The first two patches in this archive are necessary for compatibility with musl
but are not directly related to this issue; I've included them here for
completeness.

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[Mesa-dev] [Bug 35268] initial-exec TLS model breaks dlopen'ed libGL

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=35268

--- Comment #25 from Sora Lee  ---
Created attachment 142011
  --> https://bugs.freedesktop.org/attachment.cgi?id=142011&action=edit
dlopen_test.c

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[Mesa-dev] [Bug 35268] initial-exec TLS model breaks dlopen'ed libGL

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=35268

Sora Lee  changed:

   What|Removed |Added

 Attachment #142010|0   |1
is obsolete||

--- Comment #26 from Sora Lee  ---
Created attachment 142012
  --> https://bugs.freedesktop.org/attachment.cgi?id=142012&action=edit
Patches for musl compatibility

(In reply to Sora Lee from comment #24)
> Created attachment 142010 [details] [review]
> Patches for musl compatibility
> 
> The first two patches in this archive are necessary for compatibility with
> musl but are not directly related to this issue; I've included them here for
> completeness.

Apologies; I seem to have misconfigured my previous attachment.

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[Mesa-dev] [PATCH 01/15] vulkan: Update the XML and headers to 1.1.88

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 include/vulkan/vulkan_core.h | 244 -
 src/vulkan/registry/vk.xml   | 253 ++-
 2 files changed, 462 insertions(+), 35 deletions(-)

diff --git a/include/vulkan/vulkan_core.h b/include/vulkan/vulkan_core.h
index 39f4dc6f05..a7780a0f76 100644
--- a/include/vulkan/vulkan_core.h
+++ b/include/vulkan/vulkan_core.h
@@ -43,7 +43,7 @@ extern "C" {
 #define VK_VERSION_MINOR(version) (((uint32_t)(version) >> 12) & 0x3ff)
 #define VK_VERSION_PATCH(version) ((uint32_t)(version) & 0xfff)
 // Version of this file
-#define VK_HEADER_VERSION 86
+#define VK_HEADER_VERSION 88
 
 
 #define VK_NULL_HANDLE 0
@@ -147,6 +147,7 @@ typedef enum VkResult {
 VK_ERROR_INCOMPATIBLE_DISPLAY_KHR = -103001,
 VK_ERROR_VALIDATION_FAILED_EXT = -111001,
 VK_ERROR_INVALID_SHADER_NV = -112000,
+VK_ERROR_INVALID_DRM_FORMAT_MODIFIER_PLANE_LAYOUT_EXT = -1000158000,
 VK_ERROR_FRAGMENTATION_EXT = -1000161000,
 VK_ERROR_NOT_PERMITTED_EXT = -1000174001,
 VK_ERROR_OUT_OF_POOL_MEMORY_KHR = VK_ERROR_OUT_OF_POOL_MEMORY,
@@ -297,6 +298,9 @@ typedef enum VkStructureType {
 VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_IMAGE_CREATE_INFO_NV = 126000,
 VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_BUFFER_CREATE_INFO_NV = 126001,
 VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_MEMORY_ALLOCATE_INFO_NV = 
126002,
+VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_FEATURES_EXT = 
128000,
+VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_PROPERTIES_EXT = 
128001,
+VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_STREAM_CREATE_INFO_EXT = 
128002,
 VK_STRUCTURE_TYPE_TEXTURE_LOD_GATHER_FORMAT_PROPERTIES_AMD = 141000,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CORNER_SAMPLED_IMAGE_FEATURES_NV = 
15,
 VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_IMAGE_CREATE_INFO_NV = 156000,
@@ -398,6 +402,12 @@ typedef enum VkStructureType {
 VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_ADVANCED_STATE_CREATE_INFO_EXT = 
1000148002,
 VK_STRUCTURE_TYPE_PIPELINE_COVERAGE_TO_COLOR_STATE_CREATE_INFO_NV = 
1000149000,
 VK_STRUCTURE_TYPE_PIPELINE_COVERAGE_MODULATION_STATE_CREATE_INFO_NV = 
1000152000,
+VK_STRUCTURE_TYPE_DRM_FORMAT_MODIFIER_PROPERTIES_LIST_EXT = 1000158000,
+VK_STRUCTURE_TYPE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT = 1000158001,
+VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGE_DRM_FORMAT_MODIFIER_INFO_EXT = 
1000158002,
+VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT = 
1000158003,
+VK_STRUCTURE_TYPE_IMAGE_EXCPLICIT_DRM_FORMAT_MODIFIER_CREATE_INFO_EXT = 
1000158004,
+VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT = 1000158005,
 VK_STRUCTURE_TYPE_VALIDATION_CACHE_CREATE_INFO_EXT = 100016,
 VK_STRUCTURE_TYPE_SHADER_MODULE_VALIDATION_CACHE_CREATE_INFO_EXT = 
1000160001,
 VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_BINDING_FLAGS_CREATE_INFO_EXT = 
1000161000,
@@ -428,6 +438,7 @@ typedef enum VkStructureType {
 VK_STRUCTURE_TYPE_MEMORY_HOST_POINTER_PROPERTIES_EXT = 1000178001,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_MEMORY_HOST_PROPERTIES_EXT = 
1000178002,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_ATOMIC_INT64_FEATURES_KHR = 
100018,
+VK_STRUCTURE_TYPE_CALIBRATED_TIMESTAMP_INFO_EXT = 1000184000,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_CORE_PROPERTIES_AMD = 1000185000,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_PROPERTIES_EXT 
= 100019,
 VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_DIVISOR_STATE_CREATE_INFO_EXT = 
1000190001,
@@ -443,6 +454,8 @@ typedef enum VkStructureType {
 VK_STRUCTURE_TYPE_CHECKPOINT_DATA_NV = 1000206000,
 VK_STRUCTURE_TYPE_QUEUE_FAMILY_CHECKPOINT_PROPERTIES_NV = 1000206001,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_MEMORY_MODEL_FEATURES_KHR = 
1000211000,
+VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PCI_BUS_INFO_PROPERTIES_EXT = 1000212000,
+VK_STRUCTURE_TYPE_IMAGEPIPE_SURFACE_CREATE_INFO_FUCHSIA = 1000214000,
 VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT = 
VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT,
 VK_STRUCTURE_TYPE_RENDER_PASS_MULTIVIEW_CREATE_INFO_KHR = 
VK_STRUCTURE_TYPE_RENDER_PASS_MULTIVIEW_CREATE_INFO,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES_KHR = 
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES,
@@ -811,6 +824,7 @@ typedef enum VkImageType {
 typedef enum VkImageTiling {
 VK_IMAGE_TILING_OPTIMAL = 0,
 VK_IMAGE_TILING_LINEAR = 1,
+VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT = 1000158000,
 VK_IMAGE_TILING_BEGIN_RANGE = VK_IMAGE_TILING_OPTIMAL,
 VK_IMAGE_TILING_END_RANGE = VK_IMAGE_TILING_LINEAR,
 VK_IMAGE_TILING_RANGE_SIZE = (VK_IMAGE_TILING_LINEAR - 
VK_IMAGE_TILING_OPTIMAL + 1),
@@ -833,6 +847,7 @@ typedef enum VkQueryType {
 VK_QUERY_TYPE_OCCLUSION = 0,
 VK_QUERY_TYPE_PIPELINE_STATISTICS = 1,
 VK_QUERY_TYPE_TIMESTAMP = 2,
+VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT =

[Mesa-dev] [PATCH 00/15] radv: add support for VK_EXT_transform_feedback

[Samuel Pitoiset]

Hi,

This series implements VK_EXT_transform_feedback for RADV. We tested it
quite a lot with DXVK and also with RenderDoc, it should be stable enough.

Please review, thanks!

Jason Ekstrand (1):
  nir: Add a pass for gathering transform feedback info

Samuel Pitoiset (14):
  vulkan: Update the XML and headers to 1.1.88
  nir: fix compacting varyings when XFB outputs are present
  radv: gather the number of streams used by geometry shaders
  radv: gather the number of output components per stream
  radv: gather which GS stream is used for every outputs
  radv: adjust the GSVS ring sizes based on the number of components
  radv: adjust the number of output components per stream
  radv: allow to use up to 4 GSVS ring buffers
  radv: allow to emit a vertex to a specified stream
  radv: gather stream output info
  radv: declare streamout SGPRs
  radv: emit stream outputs for vertex and tessellation stages
  radv: add multiple streams support for the GS copy shader
  radv: implement VK_EXT_transform_feedback

 include/vulkan/vulkan_core.h   | 244 +++-
 src/amd/common/sid.h   |   1 +
 src/amd/vulkan/radv_cmd_buffer.c   | 385 +++-
 src/amd/vulkan/radv_device.c   |  22 ++
 src/amd/vulkan/radv_extensions.py  |   1 +
 src/amd/vulkan/radv_nir_to_llvm.c  | 388 +
 src/amd/vulkan/radv_pipeline.c |  53 +++-
 src/amd/vulkan/radv_private.h  |  33 +++
 src/amd/vulkan/radv_query.c| 111 ++-
 src/amd/vulkan/radv_shader.c   |   9 +-
 src/amd/vulkan/radv_shader.h   |  24 +-
 src/amd/vulkan/radv_shader_info.c  |  57 
 src/amd/vulkan/si_cmd_buffer.c |   6 +
 src/compiler/Makefile.sources  |   4 +-
 src/compiler/nir/meson.build   |   2 +
 src/compiler/nir/nir_gather_xfb_info.c | 150 ++
 src/compiler/nir/nir_linking_helpers.c |   9 +
 src/compiler/nir/nir_xfb_info.h|  59 
 src/vulkan/registry/vk.xml | 253 ++--
 19 files changed, 1694 insertions(+), 117 deletions(-)
 create mode 100644 src/compiler/nir/nir_gather_xfb_info.c
 create mode 100644 src/compiler/nir/nir_xfb_info.h

-- 
2.19.1

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[Mesa-dev] [PATCH 02/15] nir: fix compacting varyings when XFB outputs are present

[Samuel Pitoiset]

We shouldn't try to compact any varyings known as always
active IO, especially XFB outputs. For example, if one
component of an xfb output is also used as input varying
in the next stage, it shouldn't be compacted.

Because we look at the input varyings from the consumer
stage, we don't know if one of them is an XFB output. One
solution is to mark all components as used when
always_active_io is true to avoid wrong remapping.

Signed-off-by: Samuel Pitoiset 
---
 src/compiler/nir/nir_linking_helpers.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/src/compiler/nir/nir_linking_helpers.c 
b/src/compiler/nir/nir_linking_helpers.c
index 85712a7cb1..88014e9a1d 100644
--- a/src/compiler/nir/nir_linking_helpers.c
+++ b/src/compiler/nir/nir_linking_helpers.c
@@ -236,6 +236,15 @@ get_slot_component_masks_and_interp_types(struct exec_list 
*var_list,
get_interp_type(var, default_to_smooth_interp);
 interp_loc[location + i] = get_interp_loc(var);
 
+if (var->data.always_active_io) {
+   /* Mark all components as used to avoid repacting xfb varyings
+* wrongly. For instance, if one component of an xfb output is
+* also used as input varying in the next stage.
+*/
+   comps[location + i] |= 0xf;
+   continue;
+}
+
 if (dual_slot) {
if (i & 1) {
   comps[location + i] |= ((1 << comps_slot2) - 1);
-- 
2.19.1

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[Mesa-dev] [PATCH 06/15] radv: gather which GS stream is used for every outputs

[Samuel Pitoiset]

To only emit outputs for the given stream.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_shader.h  | 1 +
 src/amd/vulkan/radv_shader_info.c | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index cf7bb580b5..dc6c48d306 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -160,6 +160,7 @@ struct radv_shader_info {
struct {
uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];
uint8_t num_stream_output_components[4];
+   uint8_t output_streams[VARYING_SLOT_VAR31 + 1];
uint8_t max_stream;
} gs;
struct {
diff --git a/src/amd/vulkan/radv_shader_info.c 
b/src/amd/vulkan/radv_shader_info.c
index 126785120d..29f5f68a32 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -440,11 +440,13 @@ gather_info_output_decl_gs(const nir_shader *nir, const 
nir_variable *var,
 {
unsigned num_components = glsl_get_component_slots(var->type);
unsigned stream = var->data.stream;
+   unsigned idx = var->data.location;
 
assert(stream < 4);
 
info->gs.max_stream = MAX2(info->gs.max_stream, stream);
info->gs.num_stream_output_components[stream] += num_components;
+   info->gs.output_streams[idx] = stream;
 }
 
 static void
-- 
2.19.1

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[Mesa-dev] [PATCH 09/15] radv: allow to use up to 4 GSVS ring buffers

[Samuel Pitoiset]

For all streams. We basically just need to update the
base address and compute a stride for every stream.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 78 ++-
 1 file changed, 57 insertions(+), 21 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index a7e37958c1..c8b8670f9c 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -78,7 +78,7 @@ struct radv_shader_context {
LLVMValueRef gs_vtx_offset[6];
 
LLVMValueRef esgs_ring;
-   LLVMValueRef gsvs_ring;
+   LLVMValueRef gsvs_ring[4];
LLVMValueRef hs_ring_tess_offchip;
LLVMValueRef hs_ring_tess_factor;
 
@@ -1747,7 +1747,8 @@ visit_emit_vertex(struct ac_shader_abi *abi, unsigned 
stream, LLVMValueRef *addr
out_val = ac_to_integer(&ctx->ac, out_val);
out_val = LLVMBuildZExtOrBitCast(ctx->ac.builder, 
out_val, ctx->ac.i32, "");
 
-   ac_build_buffer_store_dword(&ctx->ac, ctx->gsvs_ring,
+   ac_build_buffer_store_dword(&ctx->ac,
+   ctx->gsvs_ring[stream],
out_val, 1,
voffset, ctx->gs2vs_offset, 
0,
1, 1, true, true);
@@ -3134,42 +3135,76 @@ ac_setup_rings(struct radv_shader_context *ctx)
}
 
if (ctx->is_gs_copy_shader) {
-   ctx->gsvs_ring =
+   ctx->gsvs_ring[0] =
ac_build_load_to_sgpr(&ctx->ac, ctx->ring_offsets,
  LLVMConstInt(ctx->ac.i32,
   RING_GSVS_VS, 
false));
}
 
if (ctx->stage == MESA_SHADER_GEOMETRY) {
+   /* The conceptual layout of the GSVS ring is
+*   v0c0 .. vLv0 v0c1 .. vLc1 ..
+* but the real memory layout is swizzled across
+* threads:
+*   t0v0c0 .. t15v0c0 t0v1c0 .. t15v1c0 ... t15vLcL
+*   t16v0c0 ..
+* Override the buffer descriptor accordingly.
+*/
+   LLVMTypeRef v2i64 = LLVMVectorType(ctx->ac.i64, 2);
+   uint64_t stream_offset = 0;
unsigned num_records = 64;
LLVMValueRef base_ring;
-   LLVMValueRef ring, tmp;
-   unsigned stride;
 
base_ring =
ac_build_load_to_sgpr(&ctx->ac, ctx->ring_offsets,
  LLVMConstInt(ctx->ac.i32,
   RING_GSVS_GS, 
false));
 
-   stride = ctx->max_gsvs_emit_size;
+   for (unsigned stream = 0; stream < 4; stream++) {
+   unsigned num_components, stride;
+   LLVMValueRef ring, tmp;
 
-   ring = LLVMBuildBitCast(ctx->ac.builder, base_ring,
-   ctx->ac.v4i32, "");
+   num_components =
+   
ctx->shader_info->info.gs.num_stream_output_components[stream];
 
-   tmp = LLVMBuildExtractElement(ctx->ac.builder, ring,
- ctx->ac.i32_1, "");
-   tmp = LLVMBuildOr(ctx->ac.builder, tmp,
- LLVMConstInt(ctx->ac.i32,
-  S_008F04_STRIDE(stride), false), 
"");
-   ring = LLVMBuildInsertElement(ctx->ac.builder, ring, tmp,
- ctx->ac.i32_1, "");
+   if (!num_components)
+   continue;
 
-   ring = LLVMBuildInsertElement(ctx->ac.builder, ring,
- LLVMConstInt(ctx->ac.i32,
-  num_records, false),
- LLVMConstInt(ctx->ac.i32, 2, 
false), "");
+   stride = 4 * num_components * ctx->gs_max_out_vertices;
+
+   /* Limit on the stride field for <= CIK. */
+   assert(stride < (1 << 14));
+
+   ring = LLVMBuildBitCast(ctx->ac.builder,
+   base_ring, v2i64, "");
+   tmp = LLVMBuildExtractElement(ctx->ac.builder,
+ ring, ctx->ac.i32_0, "");
+   tmp = LLVMBuildAdd(ctx->ac.builder, tmp,
+  LLVMConstInt(ctx->ac.i64,
+   stream_offset, 0), "");
+   ring = LLVMBuildInsertElement(ctx->ac.builder,
+  

[Mesa-dev] [PATCH 12/15] radv: declare streamout SGPRs

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 55 ++-
 src/amd/vulkan/radv_shader.h  |  3 +-
 2 files changed, 56 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index 07dc6a2301..0ebd3bbd34 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -85,6 +85,12 @@ struct radv_shader_context {
LLVMValueRef persp_sample, persp_center, persp_centroid;
LLVMValueRef linear_sample, linear_center, linear_centroid;
 
+   /* Streamout */
+   LLVMValueRef streamout_buffers;
+   LLVMValueRef streamout_write_idx;
+   LLVMValueRef streamout_config;
+   LLVMValueRef streamout_offset[4];
+
gl_shader_stage stage;
 
LLVMValueRef inputs[RADEON_LLVM_MAX_INPUTS * 4];
@@ -733,6 +739,12 @@ declare_global_input_sgprs(struct radv_shader_context *ctx,
/* 1 for push constants and dynamic descriptors */
add_array_arg(args, type, &ctx->abi.push_constants);
}
+
+   if (ctx->shader_info->info.so.num_outputs) {
+   add_arg(args, ARG_SGPR,
+   ac_array_in_const32_addr_space(ctx->ac.v4i32),
+   &ctx->streamout_buffers);
+   }
 }
 
 static void
@@ -774,6 +786,36 @@ declare_vs_input_vgprs(struct radv_shader_context *ctx, 
struct arg_info *args)
}
 }
 
+static void
+declare_streamout_sgprs(struct radv_shader_context *ctx, gl_shader_stage stage,
+   struct arg_info *args)
+{
+   int i;
+
+   /* Streamout SGPRs. */
+   if (ctx->shader_info->info.so.num_outputs) {
+   assert(stage == MESA_SHADER_VERTEX ||
+  stage == MESA_SHADER_TESS_EVAL);
+
+   if (stage != MESA_SHADER_TESS_EVAL) {
+   add_arg(args, ARG_SGPR, ctx->ac.i32, 
&ctx->streamout_config);
+   } else {
+   args->assign[args->count - 1] = &ctx->streamout_config;
+   args->types[args->count - 1] = ctx->ac.i32;
+   }
+
+   add_arg(args, ARG_SGPR, ctx->ac.i32, &ctx->streamout_write_idx);
+   }
+
+   /* A streamout buffer offset is loaded if the stride is non-zero. */
+   for (i = 0; i < 4; i++) {
+   if (!ctx->shader_info->info.so.strides[i])
+   continue;
+
+   add_arg(args, ARG_SGPR, ctx->ac.i32, &ctx->streamout_offset[i]);
+   }
+}
+
 static void
 declare_tes_input_vgprs(struct radv_shader_context *ctx, struct arg_info *args)
 {
@@ -825,6 +867,11 @@ set_global_input_locs(struct radv_shader_context *ctx, 
gl_shader_stage stage,
if (ctx->shader_info->info.loads_push_constants) {
set_loc_shader_ptr(ctx, AC_UD_PUSH_CONSTANTS, user_sgpr_idx);
}
+
+   if (ctx->streamout_buffers) {
+   set_loc_shader_ptr(ctx, AC_UD_STREAMOUT_BUFFERS,
+  user_sgpr_idx);
+   }
 }
 
 static void
@@ -931,9 +978,14 @@ static void create_function(struct radv_shader_context 
*ctx,
if (needs_view_index)
add_arg(&args, ARG_SGPR, ctx->ac.i32,
&ctx->abi.view_index);
-   if (ctx->options->key.vs.as_es)
+   if (ctx->options->key.vs.as_es) {
add_arg(&args, ARG_SGPR, ctx->ac.i32,
&ctx->es2gs_offset);
+   } else if (ctx->options->key.vs.as_ls) {
+   /* no extra parameters */
+   } else {
+   declare_streamout_sgprs(ctx, stage, &args);
+   }
 
declare_vs_input_vgprs(ctx, &args);
break;
@@ -1005,6 +1057,7 @@ static void create_function(struct radv_shader_context 
*ctx,
&ctx->es2gs_offset);
} else {
add_arg(&args, ARG_SGPR, ctx->ac.i32, NULL);
+   declare_streamout_sgprs(ctx, stage, &args);
add_arg(&args, ARG_SGPR, ctx->ac.i32, &ctx->oc_lds);
}
declare_tes_input_vgprs(ctx, &args);
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index 870e4af0b1..11625c7dbd 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -131,7 +131,8 @@ enum radv_ud_index {
AC_UD_PUSH_CONSTANTS = 1,
AC_UD_INDIRECT_DESCRIPTOR_SETS = 2,
AC_UD_VIEW_INDEX = 3,
-   AC_UD_SHADER_START = 4,
+   AC_UD_STREAMOUT_BUFFERS = 4,
+   AC_UD_SHADER_START = 5,
AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START,
AC_UD_VS_BASE_VERTEX_START_INSTANCE,
AC_UD_VS_MAX_UD,
-- 
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[Mesa-dev] [PATCH 04/15] radv: gather the number of streams used by geometry shaders

[Samuel Pitoiset]

This will be used for splitting the GS->VS ring buffer. The
stream ID is always 0 for now.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_shader.h  |  1 +
 src/amd/vulkan/radv_shader_info.c | 14 ++
 2 files changed, 15 insertions(+)

diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index c490b69f52..f02ca1cf8d 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -159,6 +159,7 @@ struct radv_shader_info {
} vs;
struct {
uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];
+   uint8_t max_stream;
} gs;
struct {
uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];
diff --git a/src/amd/vulkan/radv_shader_info.c 
b/src/amd/vulkan/radv_shader_info.c
index 6262acb1a6..00bc2ca5db 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -434,6 +434,17 @@ gather_info_output_decl_ps(const nir_shader *nir, const 
nir_variable *var,
}
 }
 
+static void
+gather_info_output_decl_gs(const nir_shader *nir, const nir_variable *var,
+  struct radv_shader_info *info)
+{
+   unsigned stream = var->data.stream;
+
+   assert(stream < 4);
+
+   info->gs.max_stream = MAX2(info->gs.max_stream, stream);
+}
+
 static void
 gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
struct radv_shader_info *info,
@@ -447,6 +458,9 @@ gather_info_output_decl(const nir_shader *nir, const 
nir_variable *var,
if (options->key.vs.as_ls)
gather_info_output_decl_ls(nir, var, info);
break;
+   case MESA_SHADER_GEOMETRY:
+   gather_info_output_decl_gs(nir, var, info);
+   break;
default:
break;
}
-- 
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[Mesa-dev] [PATCH 05/15] radv: gather the number of output components per stream

[Samuel Pitoiset]

This will be also used for splitting the GS->VS ring buffer.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_shader.h  | 1 +
 src/amd/vulkan/radv_shader_info.c | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index f02ca1cf8d..cf7bb580b5 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -159,6 +159,7 @@ struct radv_shader_info {
} vs;
struct {
uint8_t output_usage_mask[VARYING_SLOT_VAR31 + 1];
+   uint8_t num_stream_output_components[4];
uint8_t max_stream;
} gs;
struct {
diff --git a/src/amd/vulkan/radv_shader_info.c 
b/src/amd/vulkan/radv_shader_info.c
index 00bc2ca5db..126785120d 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -438,11 +438,13 @@ static void
 gather_info_output_decl_gs(const nir_shader *nir, const nir_variable *var,
   struct radv_shader_info *info)
 {
+   unsigned num_components = glsl_get_component_slots(var->type);
unsigned stream = var->data.stream;
 
assert(stream < 4);
 
info->gs.max_stream = MAX2(info->gs.max_stream, stream);
+   info->gs.num_stream_output_components[stream] += num_components;
 }
 
 static void
-- 
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[Mesa-dev] [PATCH 11/15] radv: gather stream output info

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_private.h |  3 +++
 src/amd/vulkan/radv_shader.h  | 18 ++
 src/amd/vulkan/radv_shader_info.c | 39 +++
 3 files changed, 60 insertions(+)

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 33ba8a7354..de54e63074 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -99,6 +99,9 @@ typedef uint32_t xcb_window_t;
 #define NUM_META_FS_KEYS 12
 #define RADV_MAX_DRM_DEVICES 8
 #define MAX_VIEWS8
+#define MAX_SO_STREAMS 4
+#define MAX_SO_BUFFERS 4
+#define MAX_SO_OUTPUTS 64
 
 #define NUM_DEPTH_CLEAR_PIPELINES 3
 
diff --git a/src/amd/vulkan/radv_shader.h b/src/amd/vulkan/radv_shader.h
index dc6c48d306..870e4af0b1 100644
--- a/src/amd/vulkan/radv_shader.h
+++ b/src/amd/vulkan/radv_shader.h
@@ -143,6 +143,22 @@ enum radv_ud_index {
AC_UD_TES_MAX_UD,
AC_UD_MAX_UD = AC_UD_TCS_MAX_UD,
 };
+
+struct radv_stream_output {
+   uint8_t location;
+   uint8_t buffer;
+   uint16_t offset;
+   uint8_t component_mask;
+   uint8_t stream;
+};
+
+struct radv_streamout_info {
+   uint16_t num_outputs;
+   struct radv_stream_output outputs[MAX_SO_OUTPUTS];
+   uint16_t strides[MAX_SO_BUFFERS];
+   uint32_t enabled_stream_buffers_mask;
+};
+
 struct radv_shader_info {
bool loads_push_constants;
uint32_t desc_set_used_mask;
@@ -189,6 +205,8 @@ struct radv_shader_info {
uint64_t outputs_written;
uint64_t patch_outputs_written;
} tcs;
+
+   struct radv_streamout_info so;
 };
 
 struct radv_userdata_info {
diff --git a/src/amd/vulkan/radv_shader_info.c 
b/src/amd/vulkan/radv_shader_info.c
index 29f5f68a32..f7888ec6a6 100644
--- a/src/amd/vulkan/radv_shader_info.c
+++ b/src/amd/vulkan/radv_shader_info.c
@@ -24,6 +24,7 @@
 #include "radv_shader.h"
 #include "nir/nir.h"
 #include "nir/nir_deref.h"
+#include "nir/nir_xfb_info.h"
 
 static void mark_sampler_desc(const nir_variable *var,
  struct radv_shader_info *info)
@@ -470,6 +471,39 @@ gather_info_output_decl(const nir_shader *nir, const 
nir_variable *var,
}
 }
 
+static void
+gather_xfb_info(const nir_shader *nir, struct radv_shader_info *info)
+{
+   nir_xfb_info *xfb = nir_gather_xfb_info(nir, NULL);
+   struct radv_streamout_info *so = &info->so;
+
+   if (!xfb)
+   return;
+
+   assert(xfb->output_count < MAX_SO_OUTPUTS);
+   so->num_outputs = xfb->output_count;
+
+   for (unsigned i = 0; i < xfb->output_count; i++) {
+   struct radv_stream_output *output = &so->outputs[i];
+
+   output->buffer = xfb->outputs[i].buffer;
+   output->stream = xfb->buffer_to_stream[xfb->outputs[i].buffer];
+   output->offset = xfb->outputs[i].offset;
+   output->location = xfb->outputs[i].location;
+   output->component_mask = xfb->outputs[i].component_mask;
+
+   so->enabled_stream_buffers_mask |=
+   (1 << output->buffer) << (output->stream * 4);
+
+   }
+
+   for (unsigned i = 0; i < NIR_MAX_XFB_BUFFERS; i++) {
+   so->strides[i] = xfb->strides[i] / 4;
+   }
+
+   ralloc_free(xfb);
+}
+
 void
 radv_nir_shader_info_pass(const struct nir_shader *nir,
  const struct radv_nir_compiler_options *options,
@@ -490,4 +524,9 @@ radv_nir_shader_info_pass(const struct nir_shader *nir,
 
nir_foreach_variable(variable, &nir->outputs)
gather_info_output_decl(nir, variable, info, options);
+
+   if (nir->info.stage == MESA_SHADER_VERTEX ||
+   nir->info.stage == MESA_SHADER_TESS_EVAL ||
+   nir->info.stage == MESA_SHADER_GEOMETRY)
+   gather_xfb_info(nir, info);
 }
-- 
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[Mesa-dev] [PATCH 03/15] nir: Add a pass for gathering transform feedback info

[Samuel Pitoiset]

From: Jason Ekstrand 

This is different from the GL_ARB_spirv pass because it generates a much
simpler data structure that isn't tied to OpenGL and mtypes.h.
---
 src/compiler/Makefile.sources  |   4 +-
 src/compiler/nir/meson.build   |   2 +
 src/compiler/nir/nir_gather_xfb_info.c | 150 +
 src/compiler/nir/nir_xfb_info.h|  59 ++
 4 files changed, 214 insertions(+), 1 deletion(-)
 create mode 100644 src/compiler/nir/nir_gather_xfb_info.c
 create mode 100644 src/compiler/nir/nir_xfb_info.h

diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources
index d3b0656483..46ed5e47b4 100644
--- a/src/compiler/Makefile.sources
+++ b/src/compiler/Makefile.sources
@@ -216,6 +216,7 @@ NIR_FILES = \
nir/nir_format_convert.h \
nir/nir_from_ssa.c \
nir/nir_gather_info.c \
+   nir/nir_gather_xfb_info.c \
nir/nir_gs_count_vertices.c \
nir/nir_inline_functions.c \
nir/nir_instr_set.c \
@@ -307,7 +308,8 @@ NIR_FILES = \
nir/nir_validate.c \
nir/nir_vla.h \
nir/nir_worklist.c \
-   nir/nir_worklist.h
+   nir/nir_worklist.h \
+   nir/nir_xfb_info.h
 
 SPIRV_GENERATED_FILES = \
spirv/spirv_info.c \
diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build
index 090aa7a628..b416e561eb 100644
--- a/src/compiler/nir/meson.build
+++ b/src/compiler/nir/meson.build
@@ -100,6 +100,7 @@ files_libnir = files(
   'nir_format_convert.h',
   'nir_from_ssa.c',
   'nir_gather_info.c',
+  'nir_gather_xfb_info.c',
   'nir_gs_count_vertices.c',
   'nir_inline_functions.c',
   'nir_instr_set.c',
@@ -192,6 +193,7 @@ files_libnir = files(
   'nir_vla.h',
   'nir_worklist.c',
   'nir_worklist.h',
+  'nir_xfb_info.h',
   '../spirv/GLSL.ext.AMD.h',
   '../spirv/GLSL.std.450.h',
   '../spirv/gl_spirv.c',
diff --git a/src/compiler/nir/nir_gather_xfb_info.c 
b/src/compiler/nir/nir_gather_xfb_info.c
new file mode 100644
index 00..a53703bb9b
--- /dev/null
+++ b/src/compiler/nir/nir_gather_xfb_info.c
@@ -0,0 +1,150 @@
+/*
+ * Copyright © 2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "nir_xfb_info.h"
+
+#include 
+
+static void
+add_var_xfb_outputs(nir_xfb_info *xfb,
+nir_variable *var,
+unsigned *location,
+unsigned *offset,
+const struct glsl_type *type)
+{
+   if (glsl_type_is_array(type) || glsl_type_is_matrix(type)) {
+  unsigned length = glsl_get_length(type);
+  const struct glsl_type *child_type = glsl_get_array_element(type);
+  for (unsigned i = 0; i < length; i++)
+ add_var_xfb_outputs(xfb, var, location, offset, child_type);
+   } else if (glsl_type_is_struct(type)) {
+  unsigned length = glsl_get_length(type);
+  for (unsigned i = 0; i < length; i++) {
+ const struct glsl_type *child_type = glsl_get_struct_field(type, i);
+ add_var_xfb_outputs(xfb, var, location, offset, child_type);
+  }
+   } else {
+  assert(var->data.xfb_buffer < NIR_MAX_XFB_BUFFERS);
+  if (xfb->buffers_written & (1 << var->data.xfb_buffer)) {
+ assert(xfb->strides[var->data.xfb_buffer] == var->data.xfb_stride);
+ assert(xfb->buffer_to_stream[var->data.xfb_buffer] == 
var->data.stream);
+  } else {
+ xfb->buffers_written |= (1 << var->data.xfb_buffer);
+ xfb->strides[var->data.xfb_buffer] = var->data.xfb_stride;
+ xfb->buffer_to_stream[var->data.xfb_buffer] = var->data.stream;
+  }
+
+  assert(var->data.stream < NIR_MAX_XFB_STREAMS);
+  xfb->streams_written |= (1 << var->data.stream);
+
+  unsigned comp_slots = glsl_get_component_slots(type);
+  unsigned attrib_slots = DIV_ROUND_UP(comp_slots, 4);
+  assert(attrib_slots == glsl_count_attribute_slots(type, false));
+
+  /* Ensure 

[Mesa-dev] [PATCH 10/15] radv: allow to emit a vertex to a specified stream

[Samuel Pitoiset]

This is required for GS multiple streams support.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 22 ++
 1 file changed, 14 insertions(+), 8 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index c8b8670f9c..07dc6a2301 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -93,7 +93,7 @@ struct radv_shader_context {
uint64_t output_mask;
 
bool is_gs_copy_shader;
-   LLVMValueRef gs_next_vertex;
+   LLVMValueRef gs_next_vertex[4];
unsigned gs_max_out_vertices;
 
unsigned tes_primitive_mode;
@@ -1704,11 +1704,9 @@ visit_emit_vertex(struct ac_shader_abi *abi, unsigned 
stream, LLVMValueRef *addr
unsigned offset = 0;
struct radv_shader_context *ctx = radv_shader_context_from_abi(abi);
 
-   assert(stream == 0);
-
/* Write vertex attribute values to GSVS ring */
gs_next_vertex = LLVMBuildLoad(ctx->ac.builder,
-  ctx->gs_next_vertex,
+  ctx->gs_next_vertex[stream],
   "");
 
/* If this thread has already emitted the declared maximum number of
@@ -1723,10 +1721,13 @@ visit_emit_vertex(struct ac_shader_abi *abi, unsigned 
stream, LLVMValueRef *addr
for (unsigned i = 0; i < AC_LLVM_MAX_OUTPUTS; ++i) {
unsigned output_usage_mask =
ctx->shader_info->info.gs.output_usage_mask[i];
+   uint8_t output_stream =
+   ctx->shader_info->info.gs.output_streams[i];
LLVMValueRef *out_ptr = &addrs[i * 4];
int length = util_last_bit(output_usage_mask);
 
-   if (!(ctx->output_mask & (1ull << i)))
+   if (!(ctx->output_mask & (1ull << i)) ||
+   output_stream != stream)
continue;
 
for (unsigned j = 0; j < length; j++) {
@@ -1757,9 +1758,11 @@ visit_emit_vertex(struct ac_shader_abi *abi, unsigned 
stream, LLVMValueRef *addr
 
gs_next_vertex = LLVMBuildAdd(ctx->ac.builder, gs_next_vertex,
  ctx->ac.i32_1, "");
-   LLVMBuildStore(ctx->ac.builder, gs_next_vertex, ctx->gs_next_vertex);
+   LLVMBuildStore(ctx->ac.builder, gs_next_vertex, 
ctx->gs_next_vertex[stream]);
 
-   ac_build_sendmsg(&ctx->ac, AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS | (0 
<< 8), ctx->gs_wave_id);
+   ac_build_sendmsg(&ctx->ac,
+AC_SENDMSG_GS_OP_EMIT | AC_SENDMSG_GS | (stream << 8),
+ctx->gs_wave_id);
 }
 
 static void
@@ -3321,7 +3324,10 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct 
ac_llvm_compiler *ac_llvm,
ctx.output_mask = 0;
 
if (shaders[i]->info.stage == MESA_SHADER_GEOMETRY) {
-   ctx.gs_next_vertex = ac_build_alloca(&ctx.ac, 
ctx.ac.i32, "gs_next_vertex");
+   for (int i = 0; i < 4; i++) {
+   ctx.gs_next_vertex[i] =
+   ac_build_alloca(&ctx.ac, ctx.ac.i32, 
"");
+   }
ctx.gs_max_out_vertices = 
shaders[i]->info.gs.vertices_out;
ctx.abi.load_inputs = load_gs_input;
ctx.abi.emit_primitive = visit_end_primitive;
-- 
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[Mesa-dev] [PATCH 07/15] radv: adjust the GSVS ring sizes based on the number of components

[Samuel Pitoiset]

For multiple streams support we have to set the different ring
buffer sizes correctly. This relies on the number of output
components per stream.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_pipeline.c | 25 +++--
 1 file changed, 19 insertions(+), 6 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 426b417e17..338d58f9d5 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2992,20 +2992,33 @@ radv_pipeline_generate_geometry_shader(struct 
radeon_cmdbuf *cs,
   const struct radv_gs_state *gs_state)
 {
struct radv_shader_variant *gs;
+   unsigned gs_max_out_vertices;
+   uint8_t *num_components;
+   uint8_t max_stream;
+   unsigned offset;
uint64_t va;
 
gs = pipeline->shaders[MESA_SHADER_GEOMETRY];
if (!gs)
return;
 
-   uint32_t gsvs_itemsize = gs->info.gs.max_gsvs_emit_size >> 2;
+   gs_max_out_vertices = gs->info.gs.vertices_out;
+   max_stream = gs->info.info.gs.max_stream;
+   num_components = gs->info.info.gs.num_stream_output_components;
 
-   radeon_set_context_reg_seq(cs, R_028A60_VGT_GSVS_RING_OFFSET_1, 3);
-   radeon_emit(cs, gsvs_itemsize);
-   radeon_emit(cs, gsvs_itemsize);
-   radeon_emit(cs, gsvs_itemsize);
+   offset = num_components[0] * gs_max_out_vertices;
 
-   radeon_set_context_reg(cs, R_028AB0_VGT_GSVS_RING_ITEMSIZE, 
gsvs_itemsize);
+   radeon_set_context_reg_seq(cs, R_028A60_VGT_GSVS_RING_OFFSET_1, 3);
+   radeon_emit(cs, offset);
+   if (max_stream >= 1)
+   offset += num_components[1] * gs_max_out_vertices;
+   radeon_emit(cs, offset);
+   if (max_stream >= 2)
+   offset += num_components[2] * gs_max_out_vertices;
+   radeon_emit(cs, offset);
+   if (max_stream >= 3)
+   offset += num_components[3] * gs_max_out_vertices;
+   radeon_set_context_reg(cs, R_028AB0_VGT_GSVS_RING_ITEMSIZE, offset);
 
radeon_set_context_reg(cs, R_028B38_VGT_GS_MAX_VERT_OUT, 
gs->info.gs.vertices_out);
 
-- 
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[Mesa-dev] [PATCH 08/15] radv: adjust the number of output components per stream

[Samuel Pitoiset]

Same as the previous patch, except that is only the number of
components.

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_pipeline.c | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 338d58f9d5..29ffa027e4 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3022,12 +3022,11 @@ radv_pipeline_generate_geometry_shader(struct 
radeon_cmdbuf *cs,
 
radeon_set_context_reg(cs, R_028B38_VGT_GS_MAX_VERT_OUT, 
gs->info.gs.vertices_out);
 
-   uint32_t gs_vert_itemsize = gs->info.gs.gsvs_vertex_size;
radeon_set_context_reg_seq(cs, R_028B5C_VGT_GS_VERT_ITEMSIZE, 4);
-   radeon_emit(cs, gs_vert_itemsize >> 2);
-   radeon_emit(cs, 0);
-   radeon_emit(cs, 0);
-   radeon_emit(cs, 0);
+   radeon_emit(cs, num_components[0]);
+   radeon_emit(cs, (max_stream >= 1) ? num_components[1] : 0);
+   radeon_emit(cs, (max_stream >= 2) ? num_components[2] : 0);
+   radeon_emit(cs, (max_stream >= 3) ? num_components[3] : 0);
 
uint32_t gs_num_invocations = gs->info.gs.invocations;
radeon_set_context_reg(cs, R_028B90_VGT_GS_INSTANCE_CNT,
-- 
2.19.1

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[Mesa-dev] [PATCH 14/15] radv: add multiple streams support for the GS copy shader

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 102 ++
 1 file changed, 76 insertions(+), 26 deletions(-)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index 46c96dfac0..5ea1755b2a 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -2723,8 +2723,11 @@ handle_vs_outputs_post(struct radv_shader_context *ctx,
viewport_index_value = radv_load_output(ctx, 
VARYING_SLOT_VIEWPORT, 0);
}
 
-   if (ctx->shader_info->info.so.num_outputs)
+   if (ctx->shader_info->info.so.num_outputs &&
+   !ctx->is_gs_copy_shader) {
+   /* The GS copy shader emission already emits streamout. */
radv_emit_streamout(ctx, 0);
+   }
 
if (outinfo->writes_pointsize ||
outinfo->writes_layer ||
@@ -3829,45 +3832,92 @@ ac_gs_copy_shader_emit(struct radv_shader_context *ctx)
LLVMValueRef vtx_offset =
LLVMBuildMul(ctx->ac.builder, ctx->abi.vertex_id,
 LLVMConstInt(ctx->ac.i32, 4, false), "");
-   unsigned offset = 0;
+   LLVMValueRef stream_id;
 
-   for (unsigned i = 0; i < AC_LLVM_MAX_OUTPUTS; ++i) {
-   unsigned output_usage_mask =
-   ctx->shader_info->info.gs.output_usage_mask[i];
-   int length = util_last_bit(output_usage_mask);
+   /* Fetch the vertex stream ID. */
+   if (ctx->shader_info->info.so.num_outputs) {
+   stream_id =
+   ac_unpack_param(&ctx->ac, ctx->streamout_config, 24, 2);
+   } else {
+   stream_id = ctx->ac.i32_0;
+   }
 
-   if (!(ctx->output_mask & (1ull << i)))
+   LLVMBasicBlockRef end_bb;
+   LLVMValueRef switch_inst;
+
+   end_bb = LLVMAppendBasicBlockInContext(ctx->ac.context,
+  ctx->main_function, "end");
+   switch_inst = LLVMBuildSwitch(ctx->ac.builder, stream_id, end_bb, 4);
+
+   for (unsigned stream = 0; stream < 4; stream++) {
+   unsigned num_components =
+   
ctx->shader_info->info.gs.num_stream_output_components[stream];
+   LLVMBasicBlockRef bb;
+   unsigned offset;
+
+   if (!num_components)
continue;
 
-   for (unsigned j = 0; j < length; j++) {
-   LLVMValueRef value, soffset;
+   if (stream > 0 && !ctx->shader_info->info.so.num_outputs)
+   continue;
 
-   if (!(output_usage_mask & (1 << j)))
+   bb = LLVMInsertBasicBlockInContext(ctx->ac.context, end_bb, 
"out");
+   LLVMAddCase(switch_inst, LLVMConstInt(ctx->ac.i32, stream, 0), 
bb);
+   LLVMPositionBuilderAtEnd(ctx->ac.builder, bb);
+
+   offset = 0;
+   for (unsigned i = 0; i < AC_LLVM_MAX_OUTPUTS; ++i) {
+   unsigned output_usage_mask =
+   ctx->shader_info->info.gs.output_usage_mask[i];
+   unsigned output_stream =
+   ctx->shader_info->info.gs.output_streams[i];
+   int length = util_last_bit(output_usage_mask);
+
+   if (!(ctx->output_mask & (1ull << i)) ||
+   output_stream != stream)
continue;
 
-   soffset = LLVMConstInt(ctx->ac.i32,
-  offset *
-  ctx->gs_max_out_vertices * 16 * 
4, false);
+   for (unsigned j = 0; j < length; j++) {
+   LLVMValueRef value, soffset;
 
-   offset++;
+   if (!(output_usage_mask & (1 << j)))
+   continue;
+
+   soffset = LLVMConstInt(ctx->ac.i32,
+  offset *
+  ctx->gs_max_out_vertices 
* 16 * 4, false);
+
+   offset++;
 
-   value = ac_build_buffer_load(&ctx->ac,
-ctx->gsvs_ring[0],
-1, ctx->ac.i32_0,
-vtx_offset, soffset,
-0, 1, 1, true, false);
+   value = ac_build_buffer_load(&ctx->ac,
+ctx->gsvs_ring[0],
+1, ctx->ac.i32_0,
+vtx_offset, 
soffset,
+  

[Mesa-dev] [PATCH 13/15] radv: emit stream outputs for vertex and tessellation stages

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/amd/vulkan/radv_nir_to_llvm.c | 137 ++
 1 file changed, 137 insertions(+)

diff --git a/src/amd/vulkan/radv_nir_to_llvm.c 
b/src/amd/vulkan/radv_nir_to_llvm.c
index 0ebd3bbd34..46c96dfac0 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -2492,6 +2492,140 @@ radv_load_output(struct radv_shader_context *ctx, 
unsigned index, unsigned chan)
return LLVMBuildLoad(ctx->ac.builder, output, "");
 }
 
+static void
+radv_emit_stream_output(struct radv_shader_context *ctx,
+LLVMValueRef const *so_buffers,
+LLVMValueRef const *so_write_offsets,
+const struct radv_stream_output *output)
+{
+   unsigned num_comps = util_bitcount(output->component_mask);
+   unsigned loc = output->location;
+   unsigned buf = output->buffer;
+   unsigned offset = output->offset;
+   unsigned start;
+   LLVMValueRef out[4];
+
+   assert(num_comps && num_comps <= 4);
+   if (!num_comps || num_comps > 4)
+   return;
+
+   /* Get the first component. */
+   start = ffs(output->component_mask) - 1;
+
+   /* Adjust the destination offset. */
+   offset += start * 4;
+
+   /* Load the output as int. */
+   for (int i = 0; i < num_comps; i++) {
+   out[i] = ac_to_integer(&ctx->ac,
+  radv_load_output(ctx, loc, start + i));
+   }
+
+   /* Pack the output. */
+   LLVMValueRef vdata = NULL;
+
+   switch (num_comps) {
+   case 1: /* as i32 */
+   vdata = out[0];
+   break;
+   case 2: /* as v2i32 */
+   case 3: /* as v4i32 (aligned to 4) */
+   out[3] = LLVMGetUndef(ctx->ac.i32);
+   /* fall through */
+   case 4: /* as v4i32 */
+   vdata = ac_build_gather_values(&ctx->ac, out,
+  
util_next_power_of_two(num_comps));
+   break;
+   }
+
+   ac_build_buffer_store_dword(&ctx->ac, so_buffers[buf],
+   vdata, num_comps, so_write_offsets[buf],
+   ctx->ac.i32_0, offset,
+   1, 1, true, false);
+}
+
+static void
+radv_emit_streamout(struct radv_shader_context *ctx, unsigned stream)
+{
+   struct ac_build_if_state if_ctx;
+   int i;
+
+   /* Get bits [22:16], i.e. (so_param >> 16) & 127; */
+   assert(ctx->streamout_config);
+   LLVMValueRef so_vtx_count =
+   ac_build_bfe(&ctx->ac, ctx->streamout_config,
+LLVMConstInt(ctx->ac.i32, 16, false),
+LLVMConstInt(ctx->ac.i32, 7, false), false);
+
+   LLVMValueRef tid = ac_get_thread_id(&ctx->ac);
+
+   /* can_emit = tid < so_vtx_count; */
+   LLVMValueRef can_emit = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
+ tid, so_vtx_count, "");
+
+   /* Emit the streamout code conditionally. This actually avoids
+* out-of-bounds buffer access. The hw tells us via the SGPR
+* (so_vtx_count) which threads are allowed to emit streamout data.
+*/
+   ac_nir_build_if(&if_ctx, ctx, can_emit);
+   {
+   /* The buffer offset is computed as follows:
+*   ByteOffset = streamout_offset[buffer_id]*4 +
+*(streamout_write_index + 
thread_id)*stride[buffer_id] +
+*attrib_offset
+*/
+   LLVMValueRef so_write_index = ctx->streamout_write_idx;
+
+   /* Compute (streamout_write_index + thread_id). */
+   so_write_index =
+   LLVMBuildAdd(ctx->ac.builder, so_write_index, tid, "");
+
+   /* Load the descriptor and compute the write offset for each
+* enabled buffer.
+*/
+   LLVMValueRef so_write_offset[4] = {};
+   LLVMValueRef so_buffers[4] = {};
+   LLVMValueRef buf_ptr = ctx->streamout_buffers;
+
+   for (i = 0; i < 4; i++) {
+   uint16_t stride = ctx->shader_info->info.so.strides[i];
+
+   if (!stride)
+   continue;
+
+   LLVMValueRef offset =
+   LLVMConstInt(ctx->ac.i32, i, false);
+
+   so_buffers[i] = ac_build_load_to_sgpr(&ctx->ac,
+ buf_ptr, offset);
+
+   LLVMValueRef so_offset = ctx->streamout_offset[i];
+
+   so_offset = LLVMBuildMul(ctx->ac.builder, so_offset,
+LLVMConstInt(ctx->ac.i32, 4, 
false), "");
+
+   so_write_offset[i] =
+   

[Mesa-dev] [PATCH 15/15] radv: implement VK_EXT_transform_feedback

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset 
---
 src/amd/common/sid.h  |   1 +
 src/amd/vulkan/radv_cmd_buffer.c  | 385 +-
 src/amd/vulkan/radv_device.c  |  22 ++
 src/amd/vulkan/radv_extensions.py |   1 +
 src/amd/vulkan/radv_pipeline.c|  19 ++
 src/amd/vulkan/radv_private.h |  30 +++
 src/amd/vulkan/radv_query.c   | 111 -
 src/amd/vulkan/radv_shader.c  |   9 +-
 src/amd/vulkan/si_cmd_buffer.c|   6 +
 9 files changed, 568 insertions(+), 16 deletions(-)

diff --git a/src/amd/common/sid.h b/src/amd/common/sid.h
index b3321ea3a7..181fb7a52c 100644
--- a/src/amd/common/sid.h
+++ b/src/amd/common/sid.h
@@ -119,6 +119,7 @@
 #defineSTRMOUT_OFFSET_FROM_VGT_FILLED_SIZE 1
 #defineSTRMOUT_OFFSET_FROM_MEM 2
 #defineSTRMOUT_OFFSET_NONE 3
+#defineSTRMOUT_DATA_TYPE(x)(((unsigned)(x) & 0x1) 
<< 7)
 #defineSTRMOUT_SELECT_BUFFER(x)(((unsigned)(x) & 0x3) 
<< 8)
 #define PKT3_DRAW_INDEX_OFFSET_2   0x35
 #define PKT3_WRITE_DATA0x37
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index 339704990e..fa4f90af60 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -196,6 +196,23 @@ radv_bind_dynamic_state(struct radv_cmd_buffer *cmd_buffer,
cmd_buffer->state.dirty |= dest_mask;
 }
 
+static void
+radv_bind_streamout_state(struct radv_cmd_buffer *cmd_buffer,
+ struct radv_pipeline *pipeline)
+{
+   struct radv_streamout_state *so = &cmd_buffer->state.streamout;
+   struct radv_shader_info *info;
+
+   if (!pipeline->streamout_shader)
+   return;
+
+   info = &pipeline->streamout_shader->info.info;
+   for (int i = 0; i < MAX_SO_BUFFERS; i++)
+   so->stride_in_dw[i] = info->so.strides[i];
+
+   so->enabled_stream_buffers_mask = info->so.enabled_stream_buffers_mask;
+}
+
 bool radv_cmd_buffer_uses_mec(struct radv_cmd_buffer *cmd_buffer)
 {
return cmd_buffer->queue_family_index == RADV_QUEUE_COMPUTE &&
@@ -1875,10 +1892,94 @@ radv_flush_vertex_descriptors(struct radv_cmd_buffer 
*cmd_buffer,
cmd_buffer->state.dirty &= ~RADV_CMD_DIRTY_VERTEX_BUFFER;
 }
 
+static void
+radv_emit_streamout_buffers(struct radv_cmd_buffer *cmd_buffer, uint64_t va)
+{
+   struct radv_pipeline *pipeline = cmd_buffer->state.pipeline;
+   struct radv_userdata_info *loc;
+   uint32_t base_reg;
+
+   for (unsigned stage = 0; stage < MESA_SHADER_STAGES; ++stage) {
+   if (!radv_get_shader(pipeline, stage))
+   continue;
+
+   loc = radv_lookup_user_sgpr(pipeline, stage,
+   AC_UD_STREAMOUT_BUFFERS);
+   if (loc->sgpr_idx == -1)
+   continue;
+
+   base_reg = pipeline->user_data_0[stage];
+
+   radv_emit_shader_pointer(cmd_buffer->device, cmd_buffer->cs,
+base_reg + loc->sgpr_idx * 4, va, 
false);
+   }
+
+   if (pipeline->gs_copy_shader) {
+   loc = 
&pipeline->gs_copy_shader->info.user_sgprs_locs.shader_data[AC_UD_STREAMOUT_BUFFERS];
+   if (loc->sgpr_idx != -1) {
+   base_reg = R_00B130_SPI_SHADER_USER_DATA_VS_0;
+
+   radv_emit_shader_pointer(cmd_buffer->device, 
cmd_buffer->cs,
+base_reg + loc->sgpr_idx * 4, 
va, false);
+   }
+   }
+}
+
+static void
+radv_flush_streamout_descriptors(struct radv_cmd_buffer *cmd_buffer)
+{
+   if (cmd_buffer->state.dirty & RADV_CMD_DIRTY_STREAMOUT_BUFFER) {
+   struct radv_streamout_binding *sb = 
cmd_buffer->streamout_bindings;
+   struct radv_streamout_state *so = &cmd_buffer->state.streamout;
+   unsigned so_offset;
+   void *so_ptr;
+   uint64_t va;
+
+   /* Allocate some descriptor state for streamout buffers. */
+   if (!radv_cmd_buffer_upload_alloc(cmd_buffer,
+ MAX_SO_BUFFERS * 16, 256,
+ &so_offset, &so_ptr))
+   return;
+
+   for (uint32_t i = 0; i < MAX_SO_BUFFERS; i++) {
+   struct radv_buffer *buffer = sb[i].buffer;
+   uint32_t *desc = &((uint32_t *)so_ptr)[i * 4];
+
+   if (!(so->enabled_mask & (1 << i)))
+   continue;
+
+   va = radv_buffer_get_va(buffer->bo) + buffer->offset;
+
+   /* Set the descriptor.
+*
+* On VI, the format must be non-INVALID, otherwise
+*

[Mesa-dev] [PATCH 06/13] nir: Add a pass for gathering transform feedback info

[Jason Ekstrand]

This is different from the GL_ARB_spirv pass because it generates a much
simpler data structure that isn't tied to OpenGL and mtypes.h.
---
 src/compiler/Makefile.sources  |   4 +-
 src/compiler/nir/meson.build   |   2 +
 src/compiler/nir/nir_gather_xfb_info.c | 150 +
 src/compiler/nir/nir_xfb_info.h|  59 ++
 4 files changed, 214 insertions(+), 1 deletion(-)
 create mode 100644 src/compiler/nir/nir_gather_xfb_info.c
 create mode 100644 src/compiler/nir/nir_xfb_info.h

diff --git a/src/compiler/Makefile.sources b/src/compiler/Makefile.sources
index d3b06564832..46ed5e47b46 100644
--- a/src/compiler/Makefile.sources
+++ b/src/compiler/Makefile.sources
@@ -216,6 +216,7 @@ NIR_FILES = \
nir/nir_format_convert.h \
nir/nir_from_ssa.c \
nir/nir_gather_info.c \
+   nir/nir_gather_xfb_info.c \
nir/nir_gs_count_vertices.c \
nir/nir_inline_functions.c \
nir/nir_instr_set.c \
@@ -307,7 +308,8 @@ NIR_FILES = \
nir/nir_validate.c \
nir/nir_vla.h \
nir/nir_worklist.c \
-   nir/nir_worklist.h
+   nir/nir_worklist.h \
+   nir/nir_xfb_info.h
 
 SPIRV_GENERATED_FILES = \
spirv/spirv_info.c \
diff --git a/src/compiler/nir/meson.build b/src/compiler/nir/meson.build
index 090aa7a628f..b416e561eb0 100644
--- a/src/compiler/nir/meson.build
+++ b/src/compiler/nir/meson.build
@@ -100,6 +100,7 @@ files_libnir = files(
   'nir_format_convert.h',
   'nir_from_ssa.c',
   'nir_gather_info.c',
+  'nir_gather_xfb_info.c',
   'nir_gs_count_vertices.c',
   'nir_inline_functions.c',
   'nir_instr_set.c',
@@ -192,6 +193,7 @@ files_libnir = files(
   'nir_vla.h',
   'nir_worklist.c',
   'nir_worklist.h',
+  'nir_xfb_info.h',
   '../spirv/GLSL.ext.AMD.h',
   '../spirv/GLSL.std.450.h',
   '../spirv/gl_spirv.c',
diff --git a/src/compiler/nir/nir_gather_xfb_info.c 
b/src/compiler/nir/nir_gather_xfb_info.c
new file mode 100644
index 000..a53703bb9bf
--- /dev/null
+++ b/src/compiler/nir/nir_gather_xfb_info.c
@@ -0,0 +1,150 @@
+/*
+ * Copyright © 2018 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "nir_xfb_info.h"
+
+#include 
+
+static void
+add_var_xfb_outputs(nir_xfb_info *xfb,
+nir_variable *var,
+unsigned *location,
+unsigned *offset,
+const struct glsl_type *type)
+{
+   if (glsl_type_is_array(type) || glsl_type_is_matrix(type)) {
+  unsigned length = glsl_get_length(type);
+  const struct glsl_type *child_type = glsl_get_array_element(type);
+  for (unsigned i = 0; i < length; i++)
+ add_var_xfb_outputs(xfb, var, location, offset, child_type);
+   } else if (glsl_type_is_struct(type)) {
+  unsigned length = glsl_get_length(type);
+  for (unsigned i = 0; i < length; i++) {
+ const struct glsl_type *child_type = glsl_get_struct_field(type, i);
+ add_var_xfb_outputs(xfb, var, location, offset, child_type);
+  }
+   } else {
+  assert(var->data.xfb_buffer < NIR_MAX_XFB_BUFFERS);
+  if (xfb->buffers_written & (1 << var->data.xfb_buffer)) {
+ assert(xfb->strides[var->data.xfb_buffer] == var->data.xfb_stride);
+ assert(xfb->buffer_to_stream[var->data.xfb_buffer] == 
var->data.stream);
+  } else {
+ xfb->buffers_written |= (1 << var->data.xfb_buffer);
+ xfb->strides[var->data.xfb_buffer] = var->data.xfb_stride;
+ xfb->buffer_to_stream[var->data.xfb_buffer] = var->data.stream;
+  }
+
+  assert(var->data.stream < NIR_MAX_XFB_STREAMS);
+  xfb->streams_written |= (1 << var->data.stream);
+
+  unsigned comp_slots = glsl_get_component_slots(type);
+  unsigned attrib_slots = DIV_ROUND_UP(comp_slots, 4);
+  assert(attrib_slots == glsl_count_attribute_slots(type, false));
+
+  /* Ensure that we don't hav

[Mesa-dev] [PATCH 04/13] nir: fix lowering arrays to elements for TFB outputs

[Jason Ekstrand]

From: Samuel Pitoiset 

If we have a transform feedback output like:

float[2] x2_out (VARYING_SLOT_VAR1.x, 0, 0)

which is lowered by nir_lower_io_arrays_to_elements to,

float x2_out (VARYING_SLOT_VAR1.x, 0, 0)
float x2_out@5 (VARYING_SLOT_VAR2.x, 0, 0)

We have to update the destination offset to avoid overwriting
the same value.

Signed-off-by: Samuel Pitoiset 
---
 src/compiler/nir/nir_lower_io_arrays_to_elements.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/compiler/nir/nir_lower_io_arrays_to_elements.c 
b/src/compiler/nir/nir_lower_io_arrays_to_elements.c
index af33d153ea5..0482f82ca9c 100644
--- a/src/compiler/nir/nir_lower_io_arrays_to_elements.c
+++ b/src/compiler/nir/nir_lower_io_arrays_to_elements.c
@@ -125,6 +125,9 @@ lower_array(nir_builder *b, nir_intrinsic_instr *intr, 
nir_variable *var,
  element = nir_variable_clone(var, b->shader);
  element->data.location =  var->data.location + io_offset;
 
+ if (var->data.explicit_offset)
+element->data.offset = var->data.offset + elements_index * 4;
+
  const struct glsl_type *type = glsl_without_array(element->type);
 
  /* This pass also splits matrices so we need give them a new type. */
-- 
2.19.1

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[Mesa-dev] [PATCH 03/13] nir: do not remove varyings used for transform feedback

[Jason Ekstrand]

From: Samuel Pitoiset 

When a xfb buffer is explicitely declared on a varying
variable, we shouldn't remove it at link time.

Signed-off-by: Samuel Pitoiset 
---
 src/compiler/nir/nir_linking_helpers.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/compiler/nir/nir_linking_helpers.c 
b/src/compiler/nir/nir_linking_helpers.c
index 85712a7cb1c..a710ba3da25 100644
--- a/src/compiler/nir/nir_linking_helpers.c
+++ b/src/compiler/nir/nir_linking_helpers.c
@@ -112,6 +112,9 @@ remove_unused_io_vars(nir_shader *shader, struct exec_list 
*var_list,
   if (var->data.always_active_io)
  continue;
 
+  if (var->data.explicit_xfb_buffer)
+ continue;
+
   uint64_t other_stage = used[var->data.location_frac];
 
   if (!(other_stage & get_variable_io_mask(var, shader->info.stage))) {
-- 
2.19.1

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[Mesa-dev] [PATCH 02/13] anv: Add but do not enable VK_EXT_transform_feedback

[Jason Ekstrand]

---
 src/intel/vulkan/anv_extensions.py | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/intel/vulkan/anv_extensions.py 
b/src/intel/vulkan/anv_extensions.py
index d4915c95013..4d089adfaa2 100644
--- a/src/intel/vulkan/anv_extensions.py
+++ b/src/intel/vulkan/anv_extensions.py
@@ -123,6 +123,7 @@ EXTENSIONS = [
   'device->has_context_priority'),
 Extension('VK_EXT_shader_viewport_index_layer',   1, True),
 Extension('VK_EXT_shader_stencil_export', 1, 'device->info.gen 
>= 9'),
+Extension('VK_EXT_transform_feedback',1, False),
 Extension('VK_EXT_vertex_attribute_divisor',  3, True),
 Extension('VK_EXT_post_depth_coverage',   1, 'device->info.gen 
>= 9'),
 Extension('VK_EXT_sampler_filter_minmax', 1, 'device->info.gen 
>= 9'),
-- 
2.19.1

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[Mesa-dev] [PATCH 00/13] anv: Add support for VK_EXT_transform_feedback

[Jason Ekstrand]

This series adds support for the new VK_EXT_transform_feedback extension.
As far as I know, everything works but it's still all a bit experimental as
we don't have very good tests yet.  CTS tests are in-progress and we hope
to have decent testing soon.  We likely won't be landing them in master
until we get better testing as the testing is currently really sketchy.
However, the basics do work and Nvidia HairWorks now works in Witcher 3
with DXVK.

You may be asking question, "What took you so long?" or, "Why are you doing
transform feedback?  I thought that was legacy stuff."  For those who are
interested in the history or the rational behind the lack of transform
feedback in Vulkan and it's sudden appearance, I've written a blog post
explaining it:

http://jason-blog.jlekstrand.net/2018/10/transform-feedback-is-terrible-so-why.html

For those wishing to try out the patches, or who prefer to review with a
branch, the series can be found on my personal gitlab:

https://gitlab.freedesktop.org/jekstrand/mesa/commits/wip/VK_EXT_transform_feedback

Happy reviewing and/or testing!

--Jason Ekstrand


Jason Ekstrand (11):
  vulkan: Update Vulkan XML and headers to 1.1.88
  anv: Add but do not enable VK_EXT_transform_feedback
  nir: Preserve offsets in lower_io_to_scalar_early
  nir: Add a pass for gathering transform feedback info
  anv: Add pipeline cache support for xfb_info
  anv: Implement the basic form of VK_EXT_transform_feedback
  anv: Implement vkCmdDrawIndirectByteCountEXT
  anv: Implement CmdBegin/EndQueryIndexed
  genxml: Add SO_PRIM_STORAGE_NEEDED and SO_NUM_PRIMS_WRITTEN
  anv: Implement transform feedback queries
  anv: Improve the asserts in anv_buffer_get_range

Samuel Pitoiset (2):
  nir: do not remove varyings used for transform feedback
  nir: fix lowering arrays to elements for TFB outputs

 include/vulkan/vulkan.h   |   4 +
 include/vulkan/vulkan_core.h  | 244 +++-
 include/vulkan/vulkan_fuchsia.h   |  58 
 src/compiler/Makefile.sources |   4 +-
 src/compiler/nir/meson.build  |   2 +
 src/compiler/nir/nir_gather_xfb_info.c| 150 ++
 src/compiler/nir/nir_linking_helpers.c|   3 +
 .../nir/nir_lower_io_arrays_to_elements.c |   3 +
 src/compiler/nir/nir_lower_io_to_scalar.c |   8 +
 src/compiler/nir/nir_xfb_info.h   |  59 
 src/intel/genxml/gen10.xml|  32 ++
 src/intel/genxml/gen11.xml|  32 ++
 src/intel/genxml/gen7.xml |  32 ++
 src/intel/genxml/gen75.xml|  32 ++
 src/intel/genxml/gen8.xml |  32 ++
 src/intel/genxml/gen9.xml |  32 ++
 src/intel/vulkan/anv_blorp.c  |   3 +-
 src/intel/vulkan/anv_cmd_buffer.c |  29 ++
 src/intel/vulkan/anv_device.c |  24 ++
 src/intel/vulkan/anv_extensions.py|   1 +
 src/intel/vulkan/anv_pipeline.c   |  12 +-
 src/intel/vulkan/anv_pipeline_cache.c |  48 ++-
 src/intel/vulkan/anv_private.h|  22 +-
 src/intel/vulkan/genX_cmd_buffer.c| 275 ++
 src/intel/vulkan/genX_pipeline.c  | 123 
 src/intel/vulkan/genX_query.c |  93 +-
 src/vulkan/registry/vk.xml| 253 ++--
 27 files changed, 1562 insertions(+), 48 deletions(-)
 create mode 100644 include/vulkan/vulkan_fuchsia.h
 create mode 100644 src/compiler/nir/nir_gather_xfb_info.c
 create mode 100644 src/compiler/nir/nir_xfb_info.h

-- 
2.19.1

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[Mesa-dev] [PATCH 05/13] nir: Preserve offsets in lower_io_to_scalar_early

[Jason Ekstrand]

---
 src/compiler/nir/nir_lower_io_to_scalar.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/src/compiler/nir/nir_lower_io_to_scalar.c 
b/src/compiler/nir/nir_lower_io_to_scalar.c
index f0c2a6a95d6..a7373d0e791 100644
--- a/src/compiler/nir/nir_lower_io_to_scalar.c
+++ b/src/compiler/nir/nir_lower_io_to_scalar.c
@@ -192,6 +192,10 @@ lower_load_to_scalar_early(nir_builder *b, 
nir_intrinsic_instr *intr,
  chan_var = nir_variable_clone(var, b->shader);
  chan_var->data.location_frac =  var->data.location_frac + i;
  chan_var->type = glsl_channel_type(chan_var->type);
+ if (var->data.explicit_offset) {
+unsigned comp_size = glsl_get_bit_size(chan_var->type) / 8;
+chan_var->data.offset = var->data.offset + i * comp_size;
+ }
 
  chan_vars[var->data.location_frac + i] = chan_var;
 
@@ -246,6 +250,10 @@ lower_store_output_to_scalar_early(nir_builder *b, 
nir_intrinsic_instr *intr,
  chan_var = nir_variable_clone(var, b->shader);
  chan_var->data.location_frac =  var->data.location_frac + i;
  chan_var->type = glsl_channel_type(chan_var->type);
+ if (var->data.explicit_offset) {
+unsigned comp_size = glsl_get_bit_size(chan_var->type) / 8;
+chan_var->data.offset = var->data.offset + i * comp_size;
+ }
 
  chan_vars[var->data.location_frac + i] = chan_var;
 
-- 
2.19.1

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[Mesa-dev] [PATCH 09/13] anv: Implement vkCmdDrawIndirectByteCountEXT

[Jason Ekstrand]

Annoyingly, this requires that we implement integer division on the
command streamer.  Fortunately, we're only ever dividing by constants so
we can use the mulh+add+shift trick and it's not as bad as it sounds.
---
 src/intel/vulkan/anv_device.c  |   2 +-
 src/intel/vulkan/genX_cmd_buffer.c | 150 +
 2 files changed, 151 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 6395656dfd0..acca97b53d1 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -1226,7 +1226,7 @@ void anv_GetPhysicalDeviceProperties2(
  props->transformFeedbackQueries = VK_FALSE;
  props->transformFeedbackStreamsLinesTriangles = VK_FALSE;
  props->transformFeedbackRasterizationStreamSelect = VK_TRUE;
- props->transformFeedbackDraw = VK_FALSE;
+ props->transformFeedbackDraw = VK_TRUE;
  break;
   }
 
diff --git a/src/intel/vulkan/genX_cmd_buffer.c 
b/src/intel/vulkan/genX_cmd_buffer.c
index 90469abbf21..1fbcfaf4264 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -27,6 +27,7 @@
 #include "anv_private.h"
 #include "vk_format_info.h"
 #include "vk_util.h"
+#include "util/fast_idiv_by_const.h"
 
 #include "common/gen_l3_config.h"
 #include "genxml/gen_macros.h"
@@ -2880,7 +2881,156 @@ emit_mul_gpr0(struct anv_batch *batch, uint32_t N)
build_alu_multiply_gpr0(dw + 1, &num_dwords, N);
 }
 
+static void
+emit_alu_add(struct anv_batch *batch, unsigned dst_reg,
+ unsigned reg_a, unsigned reg_b)
+{
+   uint32_t *dw = anv_batch_emitn(batch, 1 + 4, GENX(MI_MATH));
+   dw[1] = mi_alu(MI_ALU_LOAD, MI_ALU_SRCA, reg_a);
+   dw[2] = mi_alu(MI_ALU_LOAD, MI_ALU_SRCB, reg_b);
+   dw[3] = mi_alu(MI_ALU_ADD, 0, 0);
+   dw[4] = mi_alu(MI_ALU_STORE, dst_reg, MI_ALU_ACCU);
+}
+
+static void
+emit_add32_gpr0(struct anv_batch *batch, uint32_t N)
+{
+   emit_lri(batch, CS_GPR(1), N);
+   emit_alu_add(batch, MI_ALU_REG0, MI_ALU_REG0, MI_ALU_REG1);
+}
+
+static void
+emit_alu_shl(struct anv_batch *batch, unsigned dst_reg,
+ unsigned src_reg, unsigned shift)
+{
+   assert(shift > 0);
+
+   uint32_t *dw = anv_batch_emitn(batch, 1 + 4 * shift, GENX(MI_MATH));
+   for (unsigned i = 0; i < shift; i++) {
+  unsigned add_src = (i == 0) ? src_reg : dst_reg;
+  dw[1 + (i * 4) + 0] = mi_alu(MI_ALU_LOAD, MI_ALU_SRCA, add_src);
+  dw[1 + (i * 4) + 1] = mi_alu(MI_ALU_LOAD, MI_ALU_SRCB, add_src);
+  dw[1 + (i * 4) + 2] = mi_alu(MI_ALU_ADD, 0, 0);
+  dw[1 + (i * 4) + 3] = mi_alu(MI_ALU_STORE, dst_reg, MI_ALU_ACCU);
+   }
+}
+
+static void
+emit_div32_gpr0(struct anv_batch *batch, uint32_t D)
+{
+   /* Zero out the top of GPR0 */
+   emit_lri(batch, CS_GPR(0) + 4, 0);
+
+   if (D == 0) {
+  /* This invalid, but we should do something so we set GPR0 to 0. */
+  emit_lri(batch, CS_GPR(0), 0);
+   } else if (util_is_power_of_two_or_zero(D)) {
+  unsigned log2_D = util_logbase2(D);
+  assert(log2_D < 32);
+  /* We right-shift by log2(D) by left-shifting by 32 - log2(D) and taking
+   * the top 32 bits of the result.
+   */
+  emit_alu_shl(batch, MI_ALU_REG0, MI_ALU_REG0, 32 - log2_D);
+  emit_lrr(batch, CS_GPR(0) + 0, CS_GPR(0) + 4);
+  emit_lri(batch, CS_GPR(0) + 4, 0);
+   } else {
+  struct util_fast_udiv_info m = util_compute_fast_udiv_info(D, 32, 32);
+  assert(m.multiplier <= UINT32_MAX);
+
+  if (m.pre_shift) {
+ /* We right-shift by L by left-shifting by 32 - l and taking the top
+  * 32 bits of the result.
+  */
+ if (m.pre_shift < 32)
+emit_alu_shl(batch, MI_ALU_REG0, MI_ALU_REG0, 32 - m.pre_shift);
+ emit_lrr(batch, CS_GPR(0) + 0, CS_GPR(0) + 4);
+ emit_lri(batch, CS_GPR(0) + 4, 0);
+  }
+
+  /* Do the 32x32 multiply  into gpr0 */
+  emit_mul_gpr0(batch, m.multiplier);
+
+  if (m.increment) {
+ /* If we need to increment, save off a copy of GPR0 */
+ emit_lri(batch, CS_GPR(1) + 0, m.multiplier);
+ emit_lri(batch, CS_GPR(1) + 4, 0);
+ emit_alu_add(batch, MI_ALU_REG0, MI_ALU_REG0, MI_ALU_REG1);
+  }
+
+  /* Shift by 32 */
+  emit_lrr(batch, CS_GPR(0) + 0, CS_GPR(0) + 4);
+  emit_lri(batch, CS_GPR(0) + 4, 0);
+
+  if (m.post_shift) {
+ /* We right-shift by L by left-shifting by 32 - l and taking the top
+  * 32 bits of the result.
+  */
+ if (m.post_shift < 32)
+emit_alu_shl(batch, MI_ALU_REG0, MI_ALU_REG0, 32 - m.post_shift);
+ emit_lrr(batch, CS_GPR(0) + 0, CS_GPR(0) + 4);
+ emit_lri(batch, CS_GPR(0) + 4, 0);
+  }
+   }
+}
+
+#endif /* GEN_IS_HASWELL || GEN_GEN >= 8 */
+
+void genX(CmdDrawIndirectByteCountEXT)(
+VkCommandBuffer commandBuffer,
+uint32_tinstanceCount,
+uint32_t 

[Mesa-dev] [PATCH 08/13] anv: Implement the basic form of VK_EXT_transform_feedback

[Jason Ekstrand]

---
 src/intel/vulkan/anv_cmd_buffer.c  |  29 +++
 src/intel/vulkan/anv_device.c  |  24 ++
 src/intel/vulkan/anv_extensions.py |   2 +-
 src/intel/vulkan/anv_pipeline.c|  10 ++-
 src/intel/vulkan/anv_private.h |  13 +++
 src/intel/vulkan/genX_cmd_buffer.c | 125 +
 src/intel/vulkan/genX_pipeline.c   | 122 
 7 files changed, 323 insertions(+), 2 deletions(-)

diff --git a/src/intel/vulkan/anv_cmd_buffer.c 
b/src/intel/vulkan/anv_cmd_buffer.c
index 8ef71b0ed9c..b56c8d5b7cf 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -645,6 +645,35 @@ void anv_CmdBindVertexBuffers(
}
 }
 
+void anv_CmdBindTransformFeedbackBuffersEXT(
+VkCommandBuffer commandBuffer,
+uint32_tfirstBinding,
+uint32_tbindingCount,
+const VkBuffer* pBuffers,
+const VkDeviceSize* pOffsets,
+const VkDeviceSize* pSizes)
+{
+   ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
+   struct anv_xfb_binding *xfb = cmd_buffer->state.xfb_bindings;
+
+   /* We have to defer setting up vertex buffer since we need the buffer
+* stride from the pipeline. */
+
+   assert(firstBinding + bindingCount <= MAX_XFB_BUFFERS);
+   for (uint32_t i = 0; i < bindingCount; i++) {
+  if (pBuffers[i] == VK_NULL_HANDLE) {
+ xfb[firstBinding + i].buffer = NULL;
+  } else {
+ ANV_FROM_HANDLE(anv_buffer, buffer, pBuffers[i]);
+ xfb[firstBinding + i].buffer = buffer;
+ xfb[firstBinding + i].offset = pOffsets[i];
+ xfb[firstBinding + i].size =
+anv_buffer_get_range(buffer, pOffsets[i],
+ pSizes ? pSizes[i] : VK_WHOLE_SIZE);
+  }
+   }
+}
+
 enum isl_format
 anv_isl_format_for_descriptor_type(VkDescriptorType type)
 {
diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 6a24d1086d8..6395656dfd0 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -935,6 +935,13 @@ void anv_GetPhysicalDeviceFeatures2(
  break;
   }
 
+  case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_FEATURES_EXT: {
+ VkPhysicalDeviceTransformFeedbackFeaturesEXT *features =
+(VkPhysicalDeviceTransformFeedbackFeaturesEXT *)ext;
+ features->transformFeedback = VK_TRUE;
+ break;
+  }
+
   case 
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_FEATURES_EXT: {
  VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT *features =
 (VkPhysicalDeviceVertexAttributeDivisorFeaturesEXT *)ext;
@@ -1206,6 +1213,23 @@ void anv_GetPhysicalDeviceProperties2(
  break;
   }
 
+  case 
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_PROPERTIES_EXT: {
+ VkPhysicalDeviceTransformFeedbackPropertiesEXT *props =
+(VkPhysicalDeviceTransformFeedbackPropertiesEXT *)ext;
+
+ props->maxTransformFeedbackStreams = MAX_XFB_STREAMS;
+ props->maxTransformFeedbackBuffers = MAX_XFB_BUFFERS;
+ props->maxTransformFeedbackBufferSize = (1ull << 32);
+ props->maxTransformFeedbackStreamDataSize = 128 * 4;
+ props->maxTransformFeedbackBufferDataSize = 128 * 4;
+ props->maxTransformFeedbackBufferDataStride = 2048;
+ props->transformFeedbackQueries = VK_FALSE;
+ props->transformFeedbackStreamsLinesTriangles = VK_FALSE;
+ props->transformFeedbackRasterizationStreamSelect = VK_TRUE;
+ props->transformFeedbackDraw = VK_FALSE;
+ break;
+  }
+
   case 
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_PROPERTIES_EXT: {
  VkPhysicalDeviceVertexAttributeDivisorPropertiesEXT *props =
 (VkPhysicalDeviceVertexAttributeDivisorPropertiesEXT *)ext;
diff --git a/src/intel/vulkan/anv_extensions.py 
b/src/intel/vulkan/anv_extensions.py
index 4d089adfaa2..dac65b3126c 100644
--- a/src/intel/vulkan/anv_extensions.py
+++ b/src/intel/vulkan/anv_extensions.py
@@ -123,7 +123,7 @@ EXTENSIONS = [
   'device->has_context_priority'),
 Extension('VK_EXT_shader_viewport_index_layer',   1, True),
 Extension('VK_EXT_shader_stencil_export', 1, 'device->info.gen 
>= 9'),
-Extension('VK_EXT_transform_feedback',1, False),
+Extension('VK_EXT_transform_feedback',1, True),
 Extension('VK_EXT_vertex_attribute_divisor',  3, True),
 Extension('VK_EXT_post_depth_coverage',   1, 'device->info.gen 
>= 9'),
 Extension('VK_EXT_sampler_filter_minmax', 1, 'device->info.gen 
>= 9'),
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 570c9469b8f..402d61c8ed4 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vul

[Mesa-dev] [PATCH 11/13] genxml: Add SO_PRIM_STORAGE_NEEDED and SO_NUM_PRIMS_WRITTEN

[Jason Ekstrand]

---
 src/intel/genxml/gen10.xml | 32 
 src/intel/genxml/gen11.xml | 32 
 src/intel/genxml/gen7.xml  | 32 
 src/intel/genxml/gen75.xml | 32 
 src/intel/genxml/gen8.xml  | 32 
 src/intel/genxml/gen9.xml  | 32 
 6 files changed, 192 insertions(+)

diff --git a/src/intel/genxml/gen10.xml b/src/intel/genxml/gen10.xml
index abd5da297d6..0bb38a76a78 100644
--- a/src/intel/genxml/gen10.xml
+++ b/src/intel/genxml/gen10.xml
@@ -3553,6 +3553,38 @@
 
   
 
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
   
 
   
diff --git a/src/intel/genxml/gen11.xml b/src/intel/genxml/gen11.xml
index c69d7dc89c2..ecc9174e2a5 100644
--- a/src/intel/genxml/gen11.xml
+++ b/src/intel/genxml/gen11.xml
@@ -3551,6 +3551,38 @@
 
   
 
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
   
 
   
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 6dde7973e69..7600a27bcb0 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -2489,6 +2489,38 @@
 
   
 
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
   
 
   
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index dfc3d891498..103723168bd 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -2972,6 +2972,38 @@
 
   
 
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
   
 
   
diff --git a/src/intel/genxml/gen8.xml b/src/intel/genxml/gen8.xml
index d42c63aabd8..364cecf5d67 100644
--- a/src/intel/genxml/gen8.xml
+++ b/src/intel/genxml/gen8.xml
@@ -3206,6 +3206,38 @@
 
   
 
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
   
 
   
diff --git a/src/intel/genxml/gen9.xml b/src/intel/genxml/gen9.xml
index ca268254503..4a26ae98fb9 100644
--- a/src/intel/genxml/gen9.xml
+++ b/src/intel/genxml/gen9.xml
@@ -3491,6 +3491,38 @@
 
   
 
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
+  
+
   
 
   
-- 
2.19.1

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[Mesa-dev] [PATCH 12/13] anv: Implement transform feedback queries

[Jason Ekstrand]

---
 src/intel/vulkan/anv_device.c|  2 +-
 src/intel/vulkan/genX_pipeline.c |  1 +
 src/intel/vulkan/genX_query.c| 72 +++-
 3 files changed, 73 insertions(+), 2 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index acca97b53d1..1f560f17b65 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -1223,7 +1223,7 @@ void anv_GetPhysicalDeviceProperties2(
  props->maxTransformFeedbackStreamDataSize = 128 * 4;
  props->maxTransformFeedbackBufferDataSize = 128 * 4;
  props->maxTransformFeedbackBufferDataStride = 2048;
- props->transformFeedbackQueries = VK_FALSE;
+ props->transformFeedbackQueries = VK_TRUE;
  props->transformFeedbackStreamsLinesTriangles = VK_FALSE;
  props->transformFeedbackRasterizationStreamSelect = VK_TRUE;
  props->transformFeedbackDraw = VK_TRUE;
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 5dd78a18fb5..4309756de44 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -1120,6 +1120,7 @@ emit_3dstate_streamout(struct anv_pipeline *pipeline,
 #if GEN_GEN >= 8
   if (xfb_info) {
  so.SOFunctionEnable = true;
+ so.SOStatisticsEnable = true;
 
  const VkPipelineRasterizationStateStreamCreateInfoEXT *stream_info =
 vk_find_struct_const(rs_info, 
PIPELINE_RASTERIZATION_STATE_STREAM_CREATE_INFO_EXT);
diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c
index 4fffa6e7221..712e50a04fe 100644
--- a/src/intel/vulkan/genX_query.c
+++ b/src/intel/vulkan/genX_query.c
@@ -72,6 +72,12 @@ VkResult genX(CreateQueryPool)(
   /* Statistics queries have a min and max for every statistic */
   uint64s_per_slot += 2 * util_bitcount(pipeline_statistics);
   break;
+   case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT:
+  /* Transform feedback queries are 4 values, begin/end for
+   * written/available.
+   */
+  uint64s_per_slot += 4;
+  break;
default:
   assert(!"Invalid query type");
}
@@ -222,7 +228,8 @@ VkResult genX(GetQueryPoolResults)(
 
assert(pool->type == VK_QUERY_TYPE_OCCLUSION ||
   pool->type == VK_QUERY_TYPE_PIPELINE_STATISTICS ||
-  pool->type == VK_QUERY_TYPE_TIMESTAMP);
+  pool->type == VK_QUERY_TYPE_TIMESTAMP ||
+  pool->type == VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT);
 
if (unlikely(device->lost))
   return VK_ERROR_DEVICE_LOST;
@@ -286,6 +293,15 @@ VkResult genX(GetQueryPoolResults)(
  break;
   }
 
+  case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT:
+ if (write_results)
+cpu_write_query_result(pData, flags, idx, slot[2] - slot[1]);
+ idx++;
+ if (write_results)
+cpu_write_query_result(pData, flags, idx, slot[4] - slot[3]);
+ idx++;
+ break;
+
   case VK_QUERY_TYPE_TIMESTAMP:
  if (write_results)
 cpu_write_query_result(pData, flags, idx, slot[1]);
@@ -413,6 +429,31 @@ emit_pipeline_stat(struct anv_cmd_buffer *cmd_buffer, 
uint32_t stat,
emit_srm64(&cmd_buffer->batch, addr, vk_pipeline_stat_to_reg[stat]);
 }
 
+static void
+emit_xfb_query(struct anv_cmd_buffer *cmd_buffer, uint32_t stream,
+   struct anv_address addr)
+{
+   assert(stream < MAX_XFB_STREAMS);
+
+   anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), lrm) {
+  lrm.RegisterAddress  = GENX(SO_NUM_PRIMS_WRITTEN0_num) + 0 + stream * 8;
+  lrm.MemoryAddress= anv_address_add(addr, 0);
+   }
+   anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), lrm) {
+  lrm.RegisterAddress  = GENX(SO_NUM_PRIMS_WRITTEN0_num) + 4 + stream * 8;
+  lrm.MemoryAddress= anv_address_add(addr, 4);
+   }
+
+   anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), lrm) {
+  lrm.RegisterAddress  = GENX(SO_PRIM_STORAGE_NEEDED0_num) + 0 + stream * 
8;
+  lrm.MemoryAddress= anv_address_add(addr, 16);
+   }
+   anv_batch_emit(&cmd_buffer->batch, GENX(MI_STORE_REGISTER_MEM), lrm) {
+  lrm.RegisterAddress  = GENX(SO_PRIM_STORAGE_NEEDED0_num) + 4 + stream * 
8;
+  lrm.MemoryAddress= anv_address_add(addr, 20);
+   }
+}
+
 void genX(CmdBeginQuery)(
 VkCommandBuffer commandBuffer,
 VkQueryPool queryPool,
@@ -456,6 +497,14 @@ void genX(CmdBeginQueryIndexedEXT)(
   break;
}
 
+   case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT:
+  anv_batch_emit(&cmd_buffer->batch, GENX(PIPE_CONTROL), pc) {
+ pc.CommandStreamerStallEnable = true;
+ pc.StallAtPixelScoreboard = true;
+  }
+  emit_xfb_query(cmd_buffer, index, anv_address_add(query_addr, 8));
+  break;
+
default:
   unreachable("");
}
@@ -505,6 +554,16 @@ void genX(CmdEndQueryIndexedEXT)(
   break;
}
 
+   case 

[Mesa-dev] [PATCH 01/13] vulkan: Update Vulkan XML and headers to 1.1.88

[Jason Ekstrand]

---
 include/vulkan/vulkan.h |   4 +
 include/vulkan/vulkan_core.h| 244 +-
 include/vulkan/vulkan_fuchsia.h |  58 
 src/vulkan/registry/vk.xml  | 253 
 4 files changed, 524 insertions(+), 35 deletions(-)
 create mode 100644 include/vulkan/vulkan_fuchsia.h

diff --git a/include/vulkan/vulkan.h b/include/vulkan/vulkan.h
index d05c8490a5b..cf9d85ae597 100644
--- a/include/vulkan/vulkan.h
+++ b/include/vulkan/vulkan.h
@@ -24,6 +24,10 @@
 #include "vulkan_android.h"
 #endif
 
+#ifdef VK_USE_PLATFORM_FUCHSIA
+#include 
+#include "vulkan_fuchsia.h"
+#endif
 
 #ifdef VK_USE_PLATFORM_IOS_MVK
 #include "vulkan_ios.h"
diff --git a/include/vulkan/vulkan_core.h b/include/vulkan/vulkan_core.h
index 39f4dc6f05d..a7780a0f76b 100644
--- a/include/vulkan/vulkan_core.h
+++ b/include/vulkan/vulkan_core.h
@@ -43,7 +43,7 @@ extern "C" {
 #define VK_VERSION_MINOR(version) (((uint32_t)(version) >> 12) & 0x3ff)
 #define VK_VERSION_PATCH(version) ((uint32_t)(version) & 0xfff)
 // Version of this file
-#define VK_HEADER_VERSION 86
+#define VK_HEADER_VERSION 88
 
 
 #define VK_NULL_HANDLE 0
@@ -147,6 +147,7 @@ typedef enum VkResult {
 VK_ERROR_INCOMPATIBLE_DISPLAY_KHR = -103001,
 VK_ERROR_VALIDATION_FAILED_EXT = -111001,
 VK_ERROR_INVALID_SHADER_NV = -112000,
+VK_ERROR_INVALID_DRM_FORMAT_MODIFIER_PLANE_LAYOUT_EXT = -1000158000,
 VK_ERROR_FRAGMENTATION_EXT = -1000161000,
 VK_ERROR_NOT_PERMITTED_EXT = -1000174001,
 VK_ERROR_OUT_OF_POOL_MEMORY_KHR = VK_ERROR_OUT_OF_POOL_MEMORY,
@@ -297,6 +298,9 @@ typedef enum VkStructureType {
 VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_IMAGE_CREATE_INFO_NV = 126000,
 VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_BUFFER_CREATE_INFO_NV = 126001,
 VK_STRUCTURE_TYPE_DEDICATED_ALLOCATION_MEMORY_ALLOCATE_INFO_NV = 
126002,
+VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_FEATURES_EXT = 
128000,
+VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_TRANSFORM_FEEDBACK_PROPERTIES_EXT = 
128001,
+VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_STREAM_CREATE_INFO_EXT = 
128002,
 VK_STRUCTURE_TYPE_TEXTURE_LOD_GATHER_FORMAT_PROPERTIES_AMD = 141000,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_CORNER_SAMPLED_IMAGE_FEATURES_NV = 
15,
 VK_STRUCTURE_TYPE_EXTERNAL_MEMORY_IMAGE_CREATE_INFO_NV = 156000,
@@ -398,6 +402,12 @@ typedef enum VkStructureType {
 VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_ADVANCED_STATE_CREATE_INFO_EXT = 
1000148002,
 VK_STRUCTURE_TYPE_PIPELINE_COVERAGE_TO_COLOR_STATE_CREATE_INFO_NV = 
1000149000,
 VK_STRUCTURE_TYPE_PIPELINE_COVERAGE_MODULATION_STATE_CREATE_INFO_NV = 
1000152000,
+VK_STRUCTURE_TYPE_DRM_FORMAT_MODIFIER_PROPERTIES_LIST_EXT = 1000158000,
+VK_STRUCTURE_TYPE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT = 1000158001,
+VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_IMAGE_DRM_FORMAT_MODIFIER_INFO_EXT = 
1000158002,
+VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT = 
1000158003,
+VK_STRUCTURE_TYPE_IMAGE_EXCPLICIT_DRM_FORMAT_MODIFIER_CREATE_INFO_EXT = 
1000158004,
+VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT = 1000158005,
 VK_STRUCTURE_TYPE_VALIDATION_CACHE_CREATE_INFO_EXT = 100016,
 VK_STRUCTURE_TYPE_SHADER_MODULE_VALIDATION_CACHE_CREATE_INFO_EXT = 
1000160001,
 VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_BINDING_FLAGS_CREATE_INFO_EXT = 
1000161000,
@@ -428,6 +438,7 @@ typedef enum VkStructureType {
 VK_STRUCTURE_TYPE_MEMORY_HOST_POINTER_PROPERTIES_EXT = 1000178001,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_EXTERNAL_MEMORY_HOST_PROPERTIES_EXT = 
1000178002,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_ATOMIC_INT64_FEATURES_KHR = 
100018,
+VK_STRUCTURE_TYPE_CALIBRATED_TIMESTAMP_INFO_EXT = 1000184000,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_SHADER_CORE_PROPERTIES_AMD = 1000185000,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VERTEX_ATTRIBUTE_DIVISOR_PROPERTIES_EXT 
= 100019,
 VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_DIVISOR_STATE_CREATE_INFO_EXT = 
1000190001,
@@ -443,6 +454,8 @@ typedef enum VkStructureType {
 VK_STRUCTURE_TYPE_CHECKPOINT_DATA_NV = 1000206000,
 VK_STRUCTURE_TYPE_QUEUE_FAMILY_CHECKPOINT_PROPERTIES_NV = 1000206001,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_VULKAN_MEMORY_MODEL_FEATURES_KHR = 
1000211000,
+VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PCI_BUS_INFO_PROPERTIES_EXT = 1000212000,
+VK_STRUCTURE_TYPE_IMAGEPIPE_SURFACE_CREATE_INFO_FUCHSIA = 1000214000,
 VK_STRUCTURE_TYPE_DEBUG_REPORT_CREATE_INFO_EXT = 
VK_STRUCTURE_TYPE_DEBUG_REPORT_CALLBACK_CREATE_INFO_EXT,
 VK_STRUCTURE_TYPE_RENDER_PASS_MULTIVIEW_CREATE_INFO_KHR = 
VK_STRUCTURE_TYPE_RENDER_PASS_MULTIVIEW_CREATE_INFO,
 VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES_KHR = 
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_MULTIVIEW_FEATURES,
@@ -811,6 +824,7 @@ typedef enum VkImageType {
 typedef enum VkImageTiling {
 VK_IMAGE_TILING_OPTIMAL = 0,
 VK_IMAGE_TILING_LINEAR = 1,
+VK

[Mesa-dev] [PATCH 10/13] anv: Implement CmdBegin/EndQueryIndexed

[Jason Ekstrand]

---
 src/intel/vulkan/genX_query.c | 21 -
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/genX_query.c b/src/intel/vulkan/genX_query.c
index 7533ec05095..4fffa6e7221 100644
--- a/src/intel/vulkan/genX_query.c
+++ b/src/intel/vulkan/genX_query.c
@@ -418,6 +418,16 @@ void genX(CmdBeginQuery)(
 VkQueryPool queryPool,
 uint32_tquery,
 VkQueryControlFlags flags)
+{
+   genX(CmdBeginQueryIndexedEXT)(commandBuffer, queryPool, query, flags, 0);
+}
+
+void genX(CmdBeginQueryIndexedEXT)(
+VkCommandBuffer commandBuffer,
+VkQueryPool queryPool,
+uint32_tquery,
+VkQueryControlFlags flags,
+uint32_tindex)
 {
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_query_pool, pool, queryPool);
@@ -454,7 +464,16 @@ void genX(CmdBeginQuery)(
 void genX(CmdEndQuery)(
 VkCommandBuffer commandBuffer,
 VkQueryPool queryPool,
-uint32_tquery)
+VkQueryControlFlags flags)
+{
+   genX(CmdEndQueryIndexedEXT)(commandBuffer, queryPool, flags, 0);
+}
+
+void genX(CmdEndQueryIndexedEXT)(
+VkCommandBuffer commandBuffer,
+VkQueryPool queryPool,
+uint32_tquery,
+uint32_tindex)
 {
ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
ANV_FROM_HANDLE(anv_query_pool, pool, queryPool);
-- 
2.19.1

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[Mesa-dev] [PATCH 13/13] anv: Improve the asserts in anv_buffer_get_range

[Jason Ekstrand]

---
 src/intel/vulkan/anv_private.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index b897d679533..f30ffb36179 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1681,7 +1681,8 @@ anv_buffer_get_range(struct anv_buffer *buffer, uint64_t 
offset, uint64_t range)
if (range == VK_WHOLE_SIZE) {
   return buffer->size - offset;
} else {
-  assert(range <= buffer->size);
+  assert(range + offset >= range);
+  assert(range + offset <= buffer->size);
   return range;
}
 }
-- 
2.19.1

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[Mesa-dev] [PATCH 07/13] anv: Add pipeline cache support for xfb_info

[Jason Ekstrand]

---
 src/compiler/nir/nir_xfb_info.h   |  2 +-
 src/intel/vulkan/anv_blorp.c  |  3 +-
 src/intel/vulkan/anv_pipeline.c   |  4 +--
 src/intel/vulkan/anv_pipeline_cache.c | 48 +++
 src/intel/vulkan/anv_private.h|  6 
 5 files changed, 53 insertions(+), 10 deletions(-)

diff --git a/src/compiler/nir/nir_xfb_info.h b/src/compiler/nir/nir_xfb_info.h
index 9b543df5f47..6b16ce2a60a 100644
--- a/src/compiler/nir/nir_xfb_info.h
+++ b/src/compiler/nir/nir_xfb_info.h
@@ -36,7 +36,7 @@ typedef struct {
uint8_t component_mask;
 } nir_xfb_output_info;
 
-typedef struct {
+typedef struct nir_xfb_info {
uint8_t buffers_written;
uint8_t streams_written;
 
diff --git a/src/intel/vulkan/anv_blorp.c b/src/intel/vulkan/anv_blorp.c
index 478b8e7a3db..29ed6b2ee35 100644
--- a/src/intel/vulkan/anv_blorp.c
+++ b/src/intel/vulkan/anv_blorp.c
@@ -71,7 +71,8 @@ upload_blorp_shader(struct blorp_context *blorp,
   anv_pipeline_cache_upload_kernel(&device->default_pipeline_cache,
key, key_size, kernel, kernel_size,
NULL, 0,
-   prog_data, prog_data_size, &bind_map);
+   prog_data, prog_data_size,
+   NULL, &bind_map);
 
if (!bin)
   return false;
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index be05c11f45d..570c9469b8f 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -1057,7 +1057,7 @@ anv_pipeline_compile_graphics(struct anv_pipeline 
*pipeline,
   stages[s].nir->constant_data_size,
   &stages[s].prog_data.base,
   brw_prog_data_size(s),
-  &stages[s].bind_map);
+  NULL, &stages[s].bind_map);
   if (!bin) {
  ralloc_free(stage_ctx);
  result = vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
@@ -1170,7 +1170,7 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
  stage.nir->constant_data_size,
  &stage.prog_data.base,
  sizeof(stage.prog_data.cs),
- &stage.bind_map);
+ NULL, &stage.bind_map);
   if (!bin) {
  ralloc_free(mem_ctx);
  return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
diff --git a/src/intel/vulkan/anv_pipeline_cache.c 
b/src/intel/vulkan/anv_pipeline_cache.c
index 3efa427279d..added776519 100644
--- a/src/intel/vulkan/anv_pipeline_cache.c
+++ b/src/intel/vulkan/anv_pipeline_cache.c
@@ -27,6 +27,7 @@
 #include "util/disk_cache.h"
 #include "util/mesa-sha1.h"
 #include "anv_private.h"
+#include "nir/nir_xfb_info.h"
 
 struct anv_shader_bin *
 anv_shader_bin_create(struct anv_device *device,
@@ -35,12 +36,14 @@ anv_shader_bin_create(struct anv_device *device,
   const void *constant_data, uint32_t constant_data_size,
   const struct brw_stage_prog_data *prog_data_in,
   uint32_t prog_data_size, const void *prog_data_param_in,
+  const nir_xfb_info *xfb_info_in,
   const struct anv_pipeline_bind_map *bind_map)
 {
struct anv_shader_bin *shader;
struct anv_shader_bin_key *key;
struct brw_stage_prog_data *prog_data;
uint32_t *prog_data_param;
+   nir_xfb_info *xfb_info;
struct anv_pipeline_binding *surface_to_descriptor, *sampler_to_descriptor;
 
ANV_MULTIALLOC(ma);
@@ -48,6 +51,10 @@ anv_shader_bin_create(struct anv_device *device,
anv_multialloc_add_size(&ma, &key, sizeof(*key) + key_size);
anv_multialloc_add_size(&ma, &prog_data, prog_data_size);
anv_multialloc_add(&ma, &prog_data_param, prog_data_in->nr_params);
+   if (xfb_info_in) {
+  uint32_t xfb_info_size = nir_xfb_info_size(xfb_info_in->output_count);
+  anv_multialloc_add_size(&ma, &xfb_info, xfb_info_size);
+   }
anv_multialloc_add(&ma, &surface_to_descriptor,
bind_map->surface_count);
anv_multialloc_add(&ma, &sampler_to_descriptor,
@@ -85,6 +92,15 @@ anv_shader_bin_create(struct anv_device *device,
shader->prog_data = prog_data;
shader->prog_data_size = prog_data_size;
 
+   if (xfb_info_in) {
+  *xfb_info = *xfb_info_in;
+  typed_memcpy(xfb_info->outputs, xfb_info_in->outputs,
+   xfb_info_in->output_count);
+  shader->xfb_info = xfb_info;
+   } else {
+  shader->xfb_info = NULL;
+   }
+
shader->bind_map = *bind_map;
typed_memcpy(surface_to_descriptor, bind_map->surface_to_descriptor,
 bind_map->surface_count);
@@ -128,6 +144,15 @@ anv_shader_bin_write_to_blob(const struct anv_shader_bin 
*shader,
s

[Mesa-dev] [PATCH] anv: Implement VK_EXT_pci_bus_info

[Jason Ekstrand]

This is trivial for us to implement because Intel integrated GPUs have
always been at :00:02.0.  One of these days, when we actually ship a
discrete GPU, we'll have to implement it for real but right now we can
just hard code it.
---
 src/intel/vulkan/anv_device.c  | 11 +++
 src/intel/vulkan/anv_extensions.py |  1 +
 2 files changed, 12 insertions(+)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 6a24d1086d8..92644778982 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -1166,6 +1166,17 @@ void anv_GetPhysicalDeviceProperties2(
  break;
   }
 
+  case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PCI_BUS_INFO_PROPERTIES_EXT: {
+ VkPhysicalDevicePCIBusInfoPropertiesEXT *properties =
+(VkPhysicalDevicePCIBusInfoPropertiesEXT *)ext;
+ /* Intel integrated GPUs have always been at :00:02.0 */
+ properties->pciDomain = 0;
+ properties->pciBus = 0;
+ properties->pciDevice = 2;
+ properties->pciFunction = 0;
+ break;
+  }
+
   case VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_POINT_CLIPPING_PROPERTIES: {
  VkPhysicalDevicePointClippingProperties *properties =
 (VkPhysicalDevicePointClippingProperties *) ext;
diff --git a/src/intel/vulkan/anv_extensions.py 
b/src/intel/vulkan/anv_extensions.py
index d4915c95013..1329ef74026 100644
--- a/src/intel/vulkan/anv_extensions.py
+++ b/src/intel/vulkan/anv_extensions.py
@@ -121,6 +121,7 @@ EXTENSIONS = [
 Extension('VK_EXT_external_memory_dma_buf',   1, True),
 Extension('VK_EXT_global_priority',   1,
   'device->has_context_priority'),
+Extension('VK_EXT_pci_bus_info',  1, True),
 Extension('VK_EXT_shader_viewport_index_layer',   1, True),
 Extension('VK_EXT_shader_stencil_export', 1, 'device->info.gen 
>= 9'),
 Extension('VK_EXT_vertex_attribute_divisor',  3, True),
-- 
2.19.1

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[Mesa-dev] [PATCH 2/4] spirv: Add support for SPV_GOOGLE_decorate_string

[Jason Ekstrand]

---
 src/compiler/spirv/spirv_to_nir.c | 8 
 1 file changed, 8 insertions(+)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 2ad83196e46..7c501f3e71d 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -495,15 +495,19 @@ vtn_handle_decoration(struct vtn_builder *b, SpvOp opcode,
 
case SpvOpDecorate:
case SpvOpMemberDecorate:
+   case SpvOpDecorateStringGOOGLE:
+   case SpvOpMemberDecorateStringGOOGLE:
case SpvOpExecutionMode: {
   struct vtn_value *val = vtn_untyped_value(b, target);
 
   struct vtn_decoration *dec = rzalloc(b, struct vtn_decoration);
   switch (opcode) {
   case SpvOpDecorate:
+  case SpvOpDecorateStringGOOGLE:
  dec->scope = VTN_DEC_DECORATION;
  break;
   case SpvOpMemberDecorate:
+  case SpvOpMemberDecorateStringGOOGLE:
  dec->scope = VTN_DEC_STRUCT_MEMBER0 + *(w++);
  vtn_fail_if(dec->scope < VTN_DEC_STRUCT_MEMBER0, /* overflow */
  "Member argument of OpMemberDecorate too large");
@@ -3540,6 +3544,8 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, 
SpvOp opcode,
case SpvOpMemberDecorate:
case SpvOpGroupDecorate:
case SpvOpGroupMemberDecorate:
+   case SpvOpDecorateStringGOOGLE:
+   case SpvOpMemberDecorateStringGOOGLE:
   vtn_handle_decoration(b, opcode, w, count);
   break;
 
@@ -3718,6 +3724,8 @@ vtn_handle_variable_or_type_instruction(struct 
vtn_builder *b, SpvOp opcode,
case SpvOpMemberDecorate:
case SpvOpGroupDecorate:
case SpvOpGroupMemberDecorate:
+   case SpvOpDecorateStringGOOGLE:
+   case SpvOpMemberDecorateStringGOOGLE:
   vtn_fail("Invalid opcode types and variables section");
   break;
 
-- 
2.19.1

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[Mesa-dev] [PATCH 3/4] spirv: Add no-op support for VK_GOOGLE_hlsl_functionality1

[Jason Ekstrand]

This extension adds two new decorations which carry meaning only for
HLSL shaders.  They are expected to be handled by higher level layers
and can be ignored by implementations.  However, it does save the client
a bit of work if the implementation safely ignores them instead of the
client having to strip them out of the SPIR-V in order for it to be
valid.
---
 src/compiler/spirv/spirv_to_nir.c  | 5 +
 src/compiler/spirv/vtn_variables.c | 7 +++
 2 files changed, 12 insertions(+)

diff --git a/src/compiler/spirv/spirv_to_nir.c 
b/src/compiler/spirv/spirv_to_nir.c
index 7c501f3e71d..5f777d16e01 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -769,6 +769,10 @@ struct_member_decoration_cb(struct vtn_builder *b,
spirv_decoration_to_string(dec->decoration));
   break;
 
+   case SpvDecorationHlslSemanticGOOGLE:
+  /* HLSL semantic decorations can safely be ignored by the driver. */
+  break;
+
default:
   vtn_fail("Unhandled decoration");
}
@@ -856,6 +860,7 @@ type_decoration_cb(struct vtn_builder *b,
case SpvDecorationOffset:
case SpvDecorationXfbBuffer:
case SpvDecorationXfbStride:
+   case SpvDecorationHlslSemanticGOOGLE:
   vtn_warn("Decoration only allowed for struct members: %s",
spirv_decoration_to_string(dec->decoration));
   break;
diff --git a/src/compiler/spirv/vtn_variables.c 
b/src/compiler/spirv/vtn_variables.c
index 636fdb8689a..c1e3c0ba5bb 100644
--- a/src/compiler/spirv/vtn_variables.c
+++ b/src/compiler/spirv/vtn_variables.c
@@ -1351,6 +1351,10 @@ apply_var_decoration(struct vtn_builder *b,
spirv_decoration_to_string(dec->decoration));
   break;
 
+   case SpvDecorationHlslSemanticGOOGLE:
+  /* HLSL semantic decorations can safely be ignored by the driver. */
+  break;
+
default:
   vtn_fail("Unhandled decoration");
}
@@ -1389,6 +1393,9 @@ var_decoration_cb(struct vtn_builder *b, struct vtn_value 
*val, int member,
case SpvDecorationOffset:
   vtn_var->offset = dec->literals[0];
   break;
+   case SpvDecorationHlslCounterBufferGOOGLE:
+  /* HLSL semantic decorations can safely be ignored by the driver. */
+  break;
default:
   break;
}
-- 
2.19.1

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[Mesa-dev] [PATCH 4/4] anv, radv: Trivially expose two new VK_GOOGLE extensions

[Jason Ekstrand]

This patch exposes support for the following two extensions:

 * VK_GOOGLE_decorate_string
 * VK_GOOGLE_hlsl_functionality1

There's nothing for the driver to do; it's all handled in spirv_to_nir.
---
 src/amd/vulkan/radv_extensions.py  | 2 ++
 src/intel/vulkan/anv_extensions.py | 2 ++
 2 files changed, 4 insertions(+)

diff --git a/src/amd/vulkan/radv_extensions.py 
b/src/amd/vulkan/radv_extensions.py
index 584926df390..ab9fa0bf3f5 100644
--- a/src/amd/vulkan/radv_extensions.py
+++ b/src/amd/vulkan/radv_extensions.py
@@ -113,6 +113,8 @@ EXTENSIONS = [
 Extension('VK_AMD_shader_core_properties',1, True),
 Extension('VK_AMD_shader_info',   1, True),
 Extension('VK_AMD_shader_trinary_minmax', 1, True),
+Extension('VK_GOOGLE_decorate_string',1, True),
+Extension('VK_GOOGLE_hlsl_functionality1',1, True),
 ]
 
 class VkVersion:
diff --git a/src/intel/vulkan/anv_extensions.py 
b/src/intel/vulkan/anv_extensions.py
index 1329ef74026..65b5b51fc19 100644
--- a/src/intel/vulkan/anv_extensions.py
+++ b/src/intel/vulkan/anv_extensions.py
@@ -127,6 +127,8 @@ EXTENSIONS = [
 Extension('VK_EXT_vertex_attribute_divisor',  3, True),
 Extension('VK_EXT_post_depth_coverage',   1, 'device->info.gen 
>= 9'),
 Extension('VK_EXT_sampler_filter_minmax', 1, 'device->info.gen 
>= 9'),
+Extension('VK_GOOGLE_decorate_string',1, True),
+Extension('VK_GOOGLE_hlsl_functionality1',1, True),
 ]
 
 class VkVersion:
-- 
2.19.1

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[Mesa-dev] [PATCH 1/4] spirv: Update SPIR-V json and headers to Khronos master

[Jason Ekstrand]

This corresponds to commit 801cca8104245c07e8cc532 on GitHub.
---
 src/compiler/spirv/spirv.core.grammar.json | 533 -
 src/compiler/spirv/spirv.h |  84 
 2 files changed, 604 insertions(+), 13 deletions(-)

diff --git a/src/compiler/spirv/spirv.core.grammar.json 
b/src/compiler/spirv/spirv.core.grammar.json
index cb641420d07..034e3ab4446 100644
--- a/src/compiler/spirv/spirv.core.grammar.json
+++ b/src/compiler/spirv/spirv.core.grammar.json
@@ -3813,6 +3813,72 @@
   "extensions" : [ "SPV_AMD_shader_fragment_mask" ],
   "version" : "None"
 },
+{
+  "opname" : "OpWritePackedPrimitiveIndices4x8NV",
+  "opcode" : 5299,
+  "operands" : [
+{ "kind" : "IdRef", "name" : "'Index Offset'" },
+{ "kind" : "IdRef", "name" : "'Packed Indices'" }
+  ],
+  "capabilities" : [ "MeshShadingNV" ],
+  "extensions" : [ "SPV_NV_mesh_shader" ],
+  "version" : "None"
+},
+{
+  "opname" : "OpReportIntersectionNVX",
+  "opcode" : 5334,
+  "operands" : [
+{ "kind" : "IdResultType" },
+{ "kind" : "IdResult" },
+{ "kind" : "IdRef", "name" : "'Hit'" },
+{ "kind" : "IdRef", "name" : "'HitKind'" }
+  ],
+  "capabilities" : [ "RaytracingNVX" ],
+  "extensions" : [ "SPV_NVX_raytracing" ]
+},
+{
+  "opname" : "OpIgnoreIntersectionNVX",
+  "opcode" : 5335,
+
+  "capabilities" : [ "RaytracingNVX" ],
+  "extensions" : [ "SPV_NVX_raytracing" ]
+},
+{
+  "opname" : "OpTerminateRayNVX",
+  "opcode" : 5336,
+
+  "capabilities" : [ "RaytracingNVX" ],
+  "extensions" : [ "SPV_NVX_raytracing" ]
+},
+{
+  "opname" : "OpTraceNVX",
+  "opcode" : 5337,
+  "operands" : [
+
+{ "kind" : "IdRef", "name" : "'Accel'" },
+{ "kind" : "IdRef", "name" : "'Ray Flags'" },
+{ "kind" : "IdRef", "name" : "'Cull Mask'" },
+{ "kind" : "IdRef", "name" : "'SBT Offset'" },
+{ "kind" : "IdRef", "name" : "'SBT Stride'" },
+{ "kind" : "IdRef", "name" : "'Miss Index'" },
+{ "kind" : "IdRef", "name" : "'Ray Origin'" },
+{ "kind" : "IdRef", "name" : "'Ray Tmin'" },
+{ "kind" : "IdRef", "name" : "'Ray Direction'" },
+{ "kind" : "IdRef", "name" : "'Ray Tmax'" },
+{ "kind" : "IdRef", "name" : "'PayloadId'" }
+  ],
+  "capabilities" : [ "RaytracingNVX" ],
+  "extensions" : [ "SPV_NVX_raytracing" ]
+},
+{
+  "opname" : "OpTypeAccelerationStructureNVX",
+  "opcode" : 5341,
+  "operands" : [
+{ "kind" : "IdResult" }
+  ],
+  "capabilities" : [ "RaytracingNVX" ],
+  "extensions" : [ "SPV_NVX_raytracing" ]
+},
 {
   "opname" : "OpSubgroupShuffleINTEL",
   "opcode" : 5571,
@@ -3939,6 +4005,22 @@
   "capabilities" : [ "GroupNonUniformPartitionedNV" ],
   "extensions" : [ "SPV_NV_shader_subgroup_partitioned" ],
   "version" : "None"
+},
+   {
+  "opname" : "OpImageSampleFootprintNV",
+  "opcode" : 5283,
+  "operands" : [
+{ "kind" : "IdResultType" },
+{ "kind" : "IdResult" },
+{ "kind" : "IdRef", "name" : "'Sampled Image'" },
+{ "kind" : "IdRef", "name" : "'Coordinate'" },
+{ "kind" : "IdRef", "name" : "'Granularity'" },
+{ "kind" : "IdRef", "name" : "'Coarse'" },
+{ "kind" : "ImageOperands", "quantifier" : "?" }
+  ],
+  "capabilities" : [ "ImageFootprintNV" ],
+  "extensions" : [ "SPV_NV_shader_image_footprint" ],
+  "version" : "None"
 }
   ],
   "operand_kinds" : [
@@ -4010,6 +4092,32 @@
   "parameters" : [
 { "kind" : "IdRef" }
   ]
+},
+{
+  "enumerant" : "MakeTexelAvailableKHR",
+  "value" : "0x0100",
+  "capabilities" : [ "VulkanMemoryModelKHR" ],
+  "parameters" : [
+{ "kind" : "IdScope" }
+  ]
+},
+{
+  "enumerant" : "MakeTexelVisibleKHR",
+  "value" : "0x0200",
+  "capabilities" : [ "VulkanMemoryModelKHR" ],
+  "parameters" : [
+{ "kind" : "IdScope" }
+  ]
+},
+{
+  "enumerant" : "NonPrivateTexelKHR",
+  "value" : "0x0400",
+  "capabilities" : [ "VulkanMemoryModelKHR" ]
+},
+{
+  "enumerant" : "VolatileTexelKHR",
+  "value" : "0x0800",
+  "capabilities" : [ "VulkanMemoryModelKHR" ]
 }
   ]
 },
@@ -4176,6 +4284,21 @@
 {
   "enumerant" : "ImageMemory",
   "value" : "0x0800"
+},
+{
+  "enumerant" : "OutputMemoryKHR",
+  "value" : "0x1000",
+  "capabilities" : [ "VulkanMemoryModelKHR" ]
+},
+{
+  "enumerant" : "MakeAvailableKHR",
+  "value" : "0x2000",
+  "capabilities" : [ "VulkanMemoryModelKHR" ]
+},
+{
+  "enumerant

[Mesa-dev] [Bug 107971] SPV_GOOGLE_hlsl_functionality1 / SPV_GOOGLE_decorate_string

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=107971

--- Comment #3 from Jason Ekstrand  ---
Patches are on the list.  Mind giving them a try?

https://patchwork.freedesktop.org/series/50971/

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Re: [Mesa-dev] [PATCH 1/4] spirv: Update SPIR-V json and headers to Khronos master

[Bas Nieuwenhuizen]

I don't think we actually need this? The SPV extensions are a bit older already.

Then again,

Acked-by: Bas Nieuwenhuizen 
On Sat, Oct 13, 2018 at 3:49 PM Jason Ekstrand  wrote:
>
> This corresponds to commit 801cca8104245c07e8cc532 on GitHub.
> ---
>  src/compiler/spirv/spirv.core.grammar.json | 533 -
>  src/compiler/spirv/spirv.h |  84 
>  2 files changed, 604 insertions(+), 13 deletions(-)
>
> diff --git a/src/compiler/spirv/spirv.core.grammar.json 
> b/src/compiler/spirv/spirv.core.grammar.json
> index cb641420d07..034e3ab4446 100644
> --- a/src/compiler/spirv/spirv.core.grammar.json
> +++ b/src/compiler/spirv/spirv.core.grammar.json
> @@ -3813,6 +3813,72 @@
>"extensions" : [ "SPV_AMD_shader_fragment_mask" ],
>"version" : "None"
>  },
> +{
> +  "opname" : "OpWritePackedPrimitiveIndices4x8NV",
> +  "opcode" : 5299,
> +  "operands" : [
> +{ "kind" : "IdRef", "name" : "'Index Offset'" },
> +{ "kind" : "IdRef", "name" : "'Packed Indices'" }
> +  ],
> +  "capabilities" : [ "MeshShadingNV" ],
> +  "extensions" : [ "SPV_NV_mesh_shader" ],
> +  "version" : "None"
> +},
> +{
> +  "opname" : "OpReportIntersectionNVX",
> +  "opcode" : 5334,
> +  "operands" : [
> +{ "kind" : "IdResultType" },
> +{ "kind" : "IdResult" },
> +{ "kind" : "IdRef", "name" : "'Hit'" },
> +{ "kind" : "IdRef", "name" : "'HitKind'" }
> +  ],
> +  "capabilities" : [ "RaytracingNVX" ],
> +  "extensions" : [ "SPV_NVX_raytracing" ]
> +},
> +{
> +  "opname" : "OpIgnoreIntersectionNVX",
> +  "opcode" : 5335,
> +
> +  "capabilities" : [ "RaytracingNVX" ],
> +  "extensions" : [ "SPV_NVX_raytracing" ]
> +},
> +{
> +  "opname" : "OpTerminateRayNVX",
> +  "opcode" : 5336,
> +
> +  "capabilities" : [ "RaytracingNVX" ],
> +  "extensions" : [ "SPV_NVX_raytracing" ]
> +},
> +{
> +  "opname" : "OpTraceNVX",
> +  "opcode" : 5337,
> +  "operands" : [
> +
> +{ "kind" : "IdRef", "name" : "'Accel'" },
> +{ "kind" : "IdRef", "name" : "'Ray Flags'" },
> +{ "kind" : "IdRef", "name" : "'Cull Mask'" },
> +{ "kind" : "IdRef", "name" : "'SBT Offset'" },
> +{ "kind" : "IdRef", "name" : "'SBT Stride'" },
> +{ "kind" : "IdRef", "name" : "'Miss Index'" },
> +{ "kind" : "IdRef", "name" : "'Ray Origin'" },
> +{ "kind" : "IdRef", "name" : "'Ray Tmin'" },
> +{ "kind" : "IdRef", "name" : "'Ray Direction'" },
> +{ "kind" : "IdRef", "name" : "'Ray Tmax'" },
> +{ "kind" : "IdRef", "name" : "'PayloadId'" }
> +  ],
> +  "capabilities" : [ "RaytracingNVX" ],
> +  "extensions" : [ "SPV_NVX_raytracing" ]
> +},
> +{
> +  "opname" : "OpTypeAccelerationStructureNVX",
> +  "opcode" : 5341,
> +  "operands" : [
> +{ "kind" : "IdResult" }
> +  ],
> +  "capabilities" : [ "RaytracingNVX" ],
> +  "extensions" : [ "SPV_NVX_raytracing" ]
> +},
>  {
>"opname" : "OpSubgroupShuffleINTEL",
>"opcode" : 5571,
> @@ -3939,6 +4005,22 @@
>"capabilities" : [ "GroupNonUniformPartitionedNV" ],
>"extensions" : [ "SPV_NV_shader_subgroup_partitioned" ],
>"version" : "None"
> +},
> +   {
> +  "opname" : "OpImageSampleFootprintNV",
> +  "opcode" : 5283,
> +  "operands" : [
> +{ "kind" : "IdResultType" },
> +{ "kind" : "IdResult" },
> +{ "kind" : "IdRef", "name" : "'Sampled Image'" },
> +{ "kind" : "IdRef", "name" : "'Coordinate'" },
> +{ "kind" : "IdRef", "name" : "'Granularity'" },
> +{ "kind" : "IdRef", "name" : "'Coarse'" },
> +{ "kind" : "ImageOperands", "quantifier" : "?" }
> +  ],
> +  "capabilities" : [ "ImageFootprintNV" ],
> +  "extensions" : [ "SPV_NV_shader_image_footprint" ],
> +  "version" : "None"
>  }
>],
>"operand_kinds" : [
> @@ -4010,6 +4092,32 @@
>"parameters" : [
>  { "kind" : "IdRef" }
>]
> +},
> +{
> +  "enumerant" : "MakeTexelAvailableKHR",
> +  "value" : "0x0100",
> +  "capabilities" : [ "VulkanMemoryModelKHR" ],
> +  "parameters" : [
> +{ "kind" : "IdScope" }
> +  ]
> +},
> +{
> +  "enumerant" : "MakeTexelVisibleKHR",
> +  "value" : "0x0200",
> +  "capabilities" : [ "VulkanMemoryModelKHR" ],
> +  "parameters" : [
> +{ "kind" : "IdScope" }
> +  ]
> +},
> +{
> +  "enumerant" : "NonPrivateTexelKHR",
> +  "value" : "0x0400",
> +  "capabilities" : [ "VulkanMemoryModelKHR" ]
> +},
> +{
> +  "enumerant" : "VolatileTexelKHR",
> +  "value" : "0x0800",
> +  "capabilities" : [ "VulkanMemoryModelKHR" ]
>  }
>]
>

Re: [Mesa-dev] [PATCH 4/4] anv, radv: Trivially expose two new VK_GOOGLE extensions

[Bas Nieuwenhuizen]

Well, you beat me to it.

Reviewed-by: Bas Nieuwenhuizen 

for patch 2-4 (1 is acked with comments).

On Sat, Oct 13, 2018 at 3:49 PM Jason Ekstrand  wrote:
>
> This patch exposes support for the following two extensions:
>
>  * VK_GOOGLE_decorate_string
>  * VK_GOOGLE_hlsl_functionality1
>
> There's nothing for the driver to do; it's all handled in spirv_to_nir.
> ---
>  src/amd/vulkan/radv_extensions.py  | 2 ++
>  src/intel/vulkan/anv_extensions.py | 2 ++
>  2 files changed, 4 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_extensions.py 
> b/src/amd/vulkan/radv_extensions.py
> index 584926df390..ab9fa0bf3f5 100644
> --- a/src/amd/vulkan/radv_extensions.py
> +++ b/src/amd/vulkan/radv_extensions.py
> @@ -113,6 +113,8 @@ EXTENSIONS = [
>  Extension('VK_AMD_shader_core_properties',1, True),
>  Extension('VK_AMD_shader_info',   1, True),
>  Extension('VK_AMD_shader_trinary_minmax', 1, True),
> +Extension('VK_GOOGLE_decorate_string',1, True),
> +Extension('VK_GOOGLE_hlsl_functionality1',1, True),
>  ]
>
>  class VkVersion:
> diff --git a/src/intel/vulkan/anv_extensions.py 
> b/src/intel/vulkan/anv_extensions.py
> index 1329ef74026..65b5b51fc19 100644
> --- a/src/intel/vulkan/anv_extensions.py
> +++ b/src/intel/vulkan/anv_extensions.py
> @@ -127,6 +127,8 @@ EXTENSIONS = [
>  Extension('VK_EXT_vertex_attribute_divisor',  3, True),
>  Extension('VK_EXT_post_depth_coverage',   1, 
> 'device->info.gen >= 9'),
>  Extension('VK_EXT_sampler_filter_minmax', 1, 
> 'device->info.gen >= 9'),
> +Extension('VK_GOOGLE_decorate_string',1, True),
> +Extension('VK_GOOGLE_hlsl_functionality1',1, True),
>  ]
>
>  class VkVersion:
> --
> 2.19.1
>
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[Mesa-dev] [PATCH] vulkan: Add the fuchsia headers

[Jason Ekstrand]

These were missing in the last couple of spec updates.
---
 include/vulkan/vulkan.h |  4 +++
 include/vulkan/vulkan_fuchsia.h | 58 +
 2 files changed, 62 insertions(+)
 create mode 100644 include/vulkan/vulkan_fuchsia.h

diff --git a/include/vulkan/vulkan.h b/include/vulkan/vulkan.h
index d05c8490a5b..cf9d85ae597 100644
--- a/include/vulkan/vulkan.h
+++ b/include/vulkan/vulkan.h
@@ -24,6 +24,10 @@
 #include "vulkan_android.h"
 #endif
 
+#ifdef VK_USE_PLATFORM_FUCHSIA
+#include 
+#include "vulkan_fuchsia.h"
+#endif
 
 #ifdef VK_USE_PLATFORM_IOS_MVK
 #include "vulkan_ios.h"
diff --git a/include/vulkan/vulkan_fuchsia.h b/include/vulkan/vulkan_fuchsia.h
new file mode 100644
index 000..e0ed5455adc
--- /dev/null
+++ b/include/vulkan/vulkan_fuchsia.h
@@ -0,0 +1,58 @@
+#ifndef VULKAN_FUCHSIA_H_
+#define VULKAN_FUCHSIA_H_ 1
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+** Copyright (c) 2015-2018 The Khronos Group Inc.
+**
+** Licensed under the Apache License, Version 2.0 (the "License");
+** you may not use this file except in compliance with the License.
+** You may obtain a copy of the License at
+**
+** http://www.apache.org/licenses/LICENSE-2.0
+**
+** Unless required by applicable law or agreed to in writing, software
+** distributed under the License is distributed on an "AS IS" BASIS,
+** WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+** See the License for the specific language governing permissions and
+** limitations under the License.
+*/
+
+/*
+** This header is generated from the Khronos Vulkan XML API Registry.
+**
+*/
+
+
+#define VK_FUCHSIA_imagepipe_surface 1
+#define VK_FUCHSIA_IMAGEPIPE_SURFACE_SPEC_VERSION 1
+#define VK_FUCHSIA_IMAGEPIPE_SURFACE_EXTENSION_NAME 
"VK_FUCHSIA_imagepipe_surface"
+
+typedef VkFlags VkImagePipeSurfaceCreateFlagsFUCHSIA;
+
+typedef struct VkImagePipeSurfaceCreateInfoFUCHSIA {
+VkStructureType sType;
+const void* pNext;
+VkImagePipeSurfaceCreateFlagsFUCHSIAflags;
+zx_handle_t imagePipeHandle;
+} VkImagePipeSurfaceCreateInfoFUCHSIA;
+
+
+typedef VkResult (VKAPI_PTR *PFN_vkCreateImagePipeSurfaceFUCHSIA)(VkInstance 
instance, const VkImagePipeSurfaceCreateInfoFUCHSIA* pCreateInfo, const 
VkAllocationCallbacks* pAllocator, VkSurfaceKHR* pSurface);
+
+#ifndef VK_NO_PROTOTYPES
+VKAPI_ATTR VkResult VKAPI_CALL vkCreateImagePipeSurfaceFUCHSIA(
+VkInstance  instance,
+const VkImagePipeSurfaceCreateInfoFUCHSIA*  pCreateInfo,
+const VkAllocationCallbacks*pAllocator,
+VkSurfaceKHR*   pSurface);
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
-- 
2.19.1

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[Mesa-dev] [Bug 108353] Request: Control Center for AMD GPU

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=108353

Bug ID: 108353
   Summary: Request: Control Center for AMD GPU
   Product: Mesa
   Version: unspecified
  Hardware: x86-64 (AMD64)
OS: Linux (All)
Status: NEW
  Severity: normal
  Priority: medium
 Component: Other
  Assignee: mesa-dev@lists.freedesktop.org
  Reporter: ahmed@aol.com
QA Contact: mesa-dev@lists.freedesktop.org

Could you please add a control center for AMD GPUs so we can control settings
like in AMD Proprietary driver? or any thing like Nvidia-Prime to be able to
switch automatically between Intel and AMD?

I added my request here because I always use Mesa because AMD didn't release
any driver for my AMD card since 2015! Also because Mesa works fine with me.

I use HD 8750M.

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[Mesa-dev] [Bug 108353] Request: Control Center for AMD GPU

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=108353

--- Comment #1 from Axel Davy  ---
You can use the drirc configuration file to force applications to automatically
use the AMD card.

udevadm info /dev/dri/card0 | grep ID_PATH_TAG
udevadm info /dev/dri/card1 | grep ID_PATH_TAG

This will give you the ID_PATH_TAG of your Intel and your AMD card.

Then in $HOME/drirc you can set the device_id parameter for a given application
to the value of the ID_PATH_TAG to use this card automatically.

You can find an example here:
https://www.phoronix.com/forums/forum/linux-graphics-x-org-drivers/opengl-vulkan-mesa-gallium3d/920292-nvidia-developer-posts-auto-prime-detection-mesa-usb-loader-support

Also this (uncomplete) app has a section to configure your drirc automatically
for prime. It detects running apps using the gpu (thus you don't need to guess
the app exe name) and you can set the card to use for them:
https://github.com/axeldavy/driCenter

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Re: [Mesa-dev] [PATCH] radv: Allow physical device interfaces to be included in device extensions

[Bas Nieuwenhuizen]

On Fri, Oct 12, 2018 at 10:38 PM Keith Packard  wrote:
>
> According to the Vulkan spec:
>
> "Vulkan 1.0 initially required all new physical-device-level extension
>  functionality to be structured within an instance extension. In order
>  to avoid using an instance extension, which often requires loader
>  support, physical-device-level extension functionality may be
>  implemented within device extensions"
>
> The code that checks for enabled extension APIs currently only passes
> functions with VkDevice or VkCommandBuffer as their first
> argument. This patch extends that to also allow functions with
> VkPhysicalDevice parameters, in support of the above quote from the
> Vulkan spec.
>

Also "To obtain a function pointer for a physical-device-level command
from a device extension, an application can use vkGetInstanceProcAddr.
"

As far as I can tell the device_command member is only to make sure we
return NULL from vkGetDeviceProcAddr, and per the spec (3.1 table 2)
we still have to return NULL there for functions which take
VkPhysicalDevice? So the old behavior seems correct to me.

> Signed-off-by: Keith Packard 
> ---
>  src/amd/vulkan/radv_entrypoints_gen.py | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/radv_entrypoints_gen.py 
> b/src/amd/vulkan/radv_entrypoints_gen.py
> index 377b544c2aa..69e6fc3e0eb 100644
> --- a/src/amd/vulkan/radv_entrypoints_gen.py
> +++ b/src/amd/vulkan/radv_entrypoints_gen.py
> @@ -352,7 +352,7 @@ class Entrypoint(EntrypointBase):
>  self.return_type = return_type
>  self.params = params
>  self.guard = guard
> -self.device_command = len(params) > 0 and (params[0].type == 
> 'VkDevice' or params[0].type == 'VkQueue' or params[0].type == 
> 'VkCommandBuffer')
> +self.device_command = len(params) > 0 and (params[0].type == 
> 'VkPhysicalDevice' or params[0].type == 'VkDevice' or params[0].type == 
> 'VkQueue' or params[0].type == 'VkCommandBuffer')
>
>  def prefixed_name(self, prefix):
>  assert self.name.startswith('vk')
> --
> 2.19.1
>
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Re: [Mesa-dev] [PATCH] radv: Allow physical device interfaces to be included in device extensions

[Jason Ekstrand]

On Sat, Oct 13, 2018 at 10:58 AM Bas Nieuwenhuizen 
wrote:

> On Fri, Oct 12, 2018 at 10:38 PM Keith Packard  wrote:
> >
> > According to the Vulkan spec:
> >
> > "Vulkan 1.0 initially required all new physical-device-level extension
> >  functionality to be structured within an instance extension. In order
> >  to avoid using an instance extension, which often requires loader
> >  support, physical-device-level extension functionality may be
> >  implemented within device extensions"
> >
> > The code that checks for enabled extension APIs currently only passes
> > functions with VkDevice or VkCommandBuffer as their first
> > argument. This patch extends that to also allow functions with
> > VkPhysicalDevice parameters, in support of the above quote from the
> > Vulkan spec.
> >
>
> Also "To obtain a function pointer for a physical-device-level command
> from a device extension, an application can use vkGetInstanceProcAddr.
> "
>
> As far as I can tell the device_command member is only to make sure we
> return NULL from vkGetDeviceProcAddr, and per the spec (3.1 table 2)
> we still have to return NULL there for functions which take
> VkPhysicalDevice? So the old behavior seems correct to me.
>

I think anv is ignoring that line in the table which is why it works for
us.  If only someone wrote tests for these things...

I think the correct interpretation would be that any physical device
functions that are part of a core version or instance extension should
yield NULL but any physical device functions from a device extension should
return a valid function pointer.  Sadly, that behavior is kind-of a pain to
implement. :-(


> > Signed-off-by: Keith Packard 
> > ---
> >  src/amd/vulkan/radv_entrypoints_gen.py | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/src/amd/vulkan/radv_entrypoints_gen.py
> b/src/amd/vulkan/radv_entrypoints_gen.py
> > index 377b544c2aa..69e6fc3e0eb 100644
> > --- a/src/amd/vulkan/radv_entrypoints_gen.py
> > +++ b/src/amd/vulkan/radv_entrypoints_gen.py
> > @@ -352,7 +352,7 @@ class Entrypoint(EntrypointBase):
> >  self.return_type = return_type
> >  self.params = params
> >  self.guard = guard
> > -self.device_command = len(params) > 0 and (params[0].type ==
> 'VkDevice' or params[0].type == 'VkQueue' or params[0].type ==
> 'VkCommandBuffer')
> > +self.device_command = len(params) > 0 and (params[0].type ==
> 'VkPhysicalDevice' or params[0].type == 'VkDevice' or params[0].type ==
> 'VkQueue' or params[0].type == 'VkCommandBuffer')
> >
> >  def prefixed_name(self, prefix):
> >  assert self.name.startswith('vk')
> > --
> > 2.19.1
> >
> > ___
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Re: [Mesa-dev] [PATCH] radv: Allow physical device interfaces to be included in device extensions

[Bas Nieuwenhuizen]

On Sat, Oct 13, 2018 at 6:12 PM Jason Ekstrand  wrote:
>
> On Sat, Oct 13, 2018 at 10:58 AM Bas Nieuwenhuizen  
> wrote:
>>
>> On Fri, Oct 12, 2018 at 10:38 PM Keith Packard  wrote:
>> >
>> > According to the Vulkan spec:
>> >
>> > "Vulkan 1.0 initially required all new physical-device-level extension
>> >  functionality to be structured within an instance extension. In order
>> >  to avoid using an instance extension, which often requires loader
>> >  support, physical-device-level extension functionality may be
>> >  implemented within device extensions"
>> >
>> > The code that checks for enabled extension APIs currently only passes
>> > functions with VkDevice or VkCommandBuffer as their first
>> > argument. This patch extends that to also allow functions with
>> > VkPhysicalDevice parameters, in support of the above quote from the
>> > Vulkan spec.
>> >
>>
>> Also "To obtain a function pointer for a physical-device-level command
>> from a device extension, an application can use vkGetInstanceProcAddr.
>> "
>>
>> As far as I can tell the device_command member is only to make sure we
>> return NULL from vkGetDeviceProcAddr, and per the spec (3.1 table 2)
>> we still have to return NULL there for functions which take
>> VkPhysicalDevice? So the old behavior seems correct to me.
>
>
> I think anv is ignoring that line in the table which is why it works for us.  
> If only someone wrote tests for these things...
>
> I think the correct interpretation would be that any physical device 
> functions that are part of a core version or instance extension should yield 
> NULL but any physical device functions from a device extension should return 
> a valid function pointer.  Sadly, that behavior is kind-of a pain to 
> implement. :-(

How would you read that into the spec? As quoted above it explicitly
tells you to use vkGetInstanceProcAddr for VkPhysicalDevice functions,
even if they are based on a device extension. (And you cannot really
use vkGetDeviceProcAddr anyway as the typical usecase is before you've
created a device).
>
>>
>> > Signed-off-by: Keith Packard 
>> > ---
>> >  src/amd/vulkan/radv_entrypoints_gen.py | 2 +-
>> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >
>> > diff --git a/src/amd/vulkan/radv_entrypoints_gen.py 
>> > b/src/amd/vulkan/radv_entrypoints_gen.py
>> > index 377b544c2aa..69e6fc3e0eb 100644
>> > --- a/src/amd/vulkan/radv_entrypoints_gen.py
>> > +++ b/src/amd/vulkan/radv_entrypoints_gen.py
>> > @@ -352,7 +352,7 @@ class Entrypoint(EntrypointBase):
>> >  self.return_type = return_type
>> >  self.params = params
>> >  self.guard = guard
>> > -self.device_command = len(params) > 0 and (params[0].type == 
>> > 'VkDevice' or params[0].type == 'VkQueue' or params[0].type == 
>> > 'VkCommandBuffer')
>> > +self.device_command = len(params) > 0 and (params[0].type == 
>> > 'VkPhysicalDevice' or params[0].type == 'VkDevice' or params[0].type == 
>> > 'VkQueue' or params[0].type == 'VkCommandBuffer')
>> >
>> >  def prefixed_name(self, prefix):
>> >  assert self.name.startswith('vk')
>> > --
>> > 2.19.1
>> >
>> > ___
>> > mesa-dev mailing list
>> > mesa-dev@lists.freedesktop.org
>> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
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Re: [Mesa-dev] [PATCH] radv: Allow physical device interfaces to be included in device extensions

[Jason Ekstrand]

On Sat, Oct 13, 2018 at 11:24 AM Bas Nieuwenhuizen 
wrote:

> On Sat, Oct 13, 2018 at 6:12 PM Jason Ekstrand 
> wrote:
> >
> > On Sat, Oct 13, 2018 at 10:58 AM Bas Nieuwenhuizen <
> b...@basnieuwenhuizen.nl> wrote:
> >>
> >> On Fri, Oct 12, 2018 at 10:38 PM Keith Packard 
> wrote:
> >> >
> >> > According to the Vulkan spec:
> >> >
> >> > "Vulkan 1.0 initially required all new physical-device-level extension
> >> >  functionality to be structured within an instance extension. In order
> >> >  to avoid using an instance extension, which often requires loader
> >> >  support, physical-device-level extension functionality may be
> >> >  implemented within device extensions"
> >> >
> >> > The code that checks for enabled extension APIs currently only passes
> >> > functions with VkDevice or VkCommandBuffer as their first
> >> > argument. This patch extends that to also allow functions with
> >> > VkPhysicalDevice parameters, in support of the above quote from the
> >> > Vulkan spec.
> >> >
> >>
> >> Also "To obtain a function pointer for a physical-device-level command
> >> from a device extension, an application can use vkGetInstanceProcAddr.
> >> "
> >>
> >> As far as I can tell the device_command member is only to make sure we
> >> return NULL from vkGetDeviceProcAddr, and per the spec (3.1 table 2)
> >> we still have to return NULL there for functions which take
> >> VkPhysicalDevice? So the old behavior seems correct to me.
> >
> >
> > I think anv is ignoring that line in the table which is why it works for
> us.  If only someone wrote tests for these things...
> >
> > I think the correct interpretation would be that any physical device
> functions that are part of a core version or instance extension should
> yield NULL but any physical device functions from a device extension should
> return a valid function pointer.  Sadly, that behavior is kind-of a pain to
> implement. :-(
>
> How would you read that into the spec? As quoted above it explicitly
> tells you to use vkGetInstanceProcAddr for VkPhysicalDevice functions,
> even if they are based on a device extension. (And you cannot really
> use vkGetDeviceProcAddr anyway as the typical usecase is before you've
> created a device).
>

Because I was reading the wrong chunk of spec. :-(  You are correct and
radv is like doing the right thing and anv is doing the wrong thing.

--Jason


> >
> >>
> >> > Signed-off-by: Keith Packard 
> >> > ---
> >> >  src/amd/vulkan/radv_entrypoints_gen.py | 2 +-
> >> >  1 file changed, 1 insertion(+), 1 deletion(-)
> >> >
> >> > diff --git a/src/amd/vulkan/radv_entrypoints_gen.py
> b/src/amd/vulkan/radv_entrypoints_gen.py
> >> > index 377b544c2aa..69e6fc3e0eb 100644
> >> > --- a/src/amd/vulkan/radv_entrypoints_gen.py
> >> > +++ b/src/amd/vulkan/radv_entrypoints_gen.py
> >> > @@ -352,7 +352,7 @@ class Entrypoint(EntrypointBase):
> >> >  self.return_type = return_type
> >> >  self.params = params
> >> >  self.guard = guard
> >> > -self.device_command = len(params) > 0 and (params[0].type ==
> 'VkDevice' or params[0].type == 'VkQueue' or params[0].type ==
> 'VkCommandBuffer')
> >> > +self.device_command = len(params) > 0 and (params[0].type ==
> 'VkPhysicalDevice' or params[0].type == 'VkDevice' or params[0].type ==
> 'VkQueue' or params[0].type == 'VkCommandBuffer')
> >> >
> >> >  def prefixed_name(self, prefix):
> >> >  assert self.name.startswith('vk')
> >> > --
> >> > 2.19.1
> >> >
> >> > ___
> >> > mesa-dev mailing list
> >> > mesa-dev@lists.freedesktop.org
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[Mesa-dev] [PATCH] radv: Implement VK_EXT_pci_bus_info.

[Bas Nieuwenhuizen]

---
 src/amd/vulkan/radv_device.c  | 10 ++
 src/amd/vulkan/radv_extensions.py |  1 +
 src/amd/vulkan/radv_private.h |  2 ++
 3 files changed, 13 insertions(+)

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 88786c999de..c418176978e 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -389,6 +389,7 @@ radv_physical_device_init(struct radv_physical_device 
*device,
if ((device->instance->debug_flags & RADV_DEBUG_INFO))
ac_print_gpu_info(&device->rad_info);
 
+   device->bus_info = *drm_device->businfo.pci;
return VK_SUCCESS;
 
 fail:
@@ -1190,6 +1191,15 @@ void radv_GetPhysicalDeviceProperties2(
properties->conservativeRasterizationPostDepthCoverage 
= VK_FALSE;
break;
}
+   case 
VK_STRUCTURE_TYPE_PHYSICAL_DEVICE_PCI_BUS_INFO_PROPERTIES_EXT: {
+   VkPhysicalDevicePCIBusInfoPropertiesEXT *properties =
+   (VkPhysicalDevicePCIBusInfoPropertiesEXT *)ext;
+   properties->pciDomain = pdevice->bus_info.domain;
+   properties->pciBus = pdevice->bus_info.bus;
+   properties->pciDevice = pdevice->bus_info.dev;
+   properties->pciFunction = pdevice->bus_info.func;
+   break;
+   }
default:
break;
}
diff --git a/src/amd/vulkan/radv_extensions.py 
b/src/amd/vulkan/radv_extensions.py
index 584926df390..5dcedae1c63 100644
--- a/src/amd/vulkan/radv_extensions.py
+++ b/src/amd/vulkan/radv_extensions.py
@@ -103,6 +103,7 @@ EXTENSIONS = [
 Extension('VK_EXT_external_memory_dma_buf',   1, True),
 Extension('VK_EXT_external_memory_host',  1, 
'device->rad_info.has_userptr'),
 Extension('VK_EXT_global_priority',   1, 
'device->rad_info.has_ctx_priority'),
+Extension('VK_EXT_pci_bus_info',  1, True),
 Extension('VK_EXT_sampler_filter_minmax', 1, 
'device->rad_info.chip_class >= CIK'),
 Extension('VK_EXT_shader_viewport_index_layer',   1, True),
 Extension('VK_EXT_shader_stencil_export', 1, True),
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 33ba8a7354b..b35aa8d818f 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -312,6 +312,8 @@ struct radv_physical_device {
VkPhysicalDeviceMemoryProperties memory_properties;
enum radv_mem_type mem_type_indices[RADV_MEM_TYPE_COUNT];
 
+   drmPciBusInfo bus_info;
+
struct radv_device_extension_table supported_extensions;
 };
 
-- 
2.19.1

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Re: [Mesa-dev] [PATCH] radv: Allow physical device interfaces to be included in device extensions

[Jason Ekstrand]

On Sat, Oct 13, 2018 at 11:27 AM Jason Ekstrand 
wrote:

> On Sat, Oct 13, 2018 at 11:24 AM Bas Nieuwenhuizen <
> b...@basnieuwenhuizen.nl> wrote:
>
>> On Sat, Oct 13, 2018 at 6:12 PM Jason Ekstrand 
>> wrote:
>> >
>> > On Sat, Oct 13, 2018 at 10:58 AM Bas Nieuwenhuizen <
>> b...@basnieuwenhuizen.nl> wrote:
>> >>
>> >> On Fri, Oct 12, 2018 at 10:38 PM Keith Packard 
>> wrote:
>> >> >
>> >> > According to the Vulkan spec:
>> >> >
>> >> > "Vulkan 1.0 initially required all new physical-device-level
>> extension
>> >> >  functionality to be structured within an instance extension. In
>> order
>> >> >  to avoid using an instance extension, which often requires loader
>> >> >  support, physical-device-level extension functionality may be
>> >> >  implemented within device extensions"
>> >> >
>> >> > The code that checks for enabled extension APIs currently only passes
>> >> > functions with VkDevice or VkCommandBuffer as their first
>> >> > argument. This patch extends that to also allow functions with
>> >> > VkPhysicalDevice parameters, in support of the above quote from the
>> >> > Vulkan spec.
>> >> >
>> >>
>> >> Also "To obtain a function pointer for a physical-device-level command
>> >> from a device extension, an application can use vkGetInstanceProcAddr.
>> >> "
>> >>
>> >> As far as I can tell the device_command member is only to make sure we
>> >> return NULL from vkGetDeviceProcAddr, and per the spec (3.1 table 2)
>> >> we still have to return NULL there for functions which take
>> >> VkPhysicalDevice? So the old behavior seems correct to me.
>> >
>> >
>> > I think anv is ignoring that line in the table which is why it works
>> for us.  If only someone wrote tests for these things...
>> >
>> > I think the correct interpretation would be that any physical device
>> functions that are part of a core version or instance extension should
>> yield NULL but any physical device functions from a device extension should
>> return a valid function pointer.  Sadly, that behavior is kind-of a pain to
>> implement. :-(
>>
>> How would you read that into the spec? As quoted above it explicitly
>> tells you to use vkGetInstanceProcAddr for VkPhysicalDevice functions,
>> even if they are based on a device extension. (And you cannot really
>> use vkGetDeviceProcAddr anyway as the typical usecase is before you've
>> created a device).
>>
>
> Because I was reading the wrong chunk of spec. :-(  You are correct and
> radv is like doing the right thing and anv is doing the wrong thing.
>

Actually, I think anv is doing the right thing too.  Now I have no idea why
Keith was having problems.

--Jason



>
>
>> >
>> >>
>> >> > Signed-off-by: Keith Packard 
>> >> > ---
>> >> >  src/amd/vulkan/radv_entrypoints_gen.py | 2 +-
>> >> >  1 file changed, 1 insertion(+), 1 deletion(-)
>> >> >
>> >> > diff --git a/src/amd/vulkan/radv_entrypoints_gen.py
>> b/src/amd/vulkan/radv_entrypoints_gen.py
>> >> > index 377b544c2aa..69e6fc3e0eb 100644
>> >> > --- a/src/amd/vulkan/radv_entrypoints_gen.py
>> >> > +++ b/src/amd/vulkan/radv_entrypoints_gen.py
>> >> > @@ -352,7 +352,7 @@ class Entrypoint(EntrypointBase):
>> >> >  self.return_type = return_type
>> >> >  self.params = params
>> >> >  self.guard = guard
>> >> > -self.device_command = len(params) > 0 and (params[0].type
>> == 'VkDevice' or params[0].type == 'VkQueue' or params[0].type ==
>> 'VkCommandBuffer')
>> >> > +self.device_command = len(params) > 0 and (params[0].type
>> == 'VkPhysicalDevice' or params[0].type == 'VkDevice' or params[0].type ==
>> 'VkQueue' or params[0].type == 'VkCommandBuffer')
>> >> >
>> >> >  def prefixed_name(self, prefix):
>> >> >  assert self.name.startswith('vk')
>> >> > --
>> >> > 2.19.1
>> >> >
>> >> > ___
>> >> > mesa-dev mailing list
>> >> > mesa-dev@lists.freedesktop.org
>> >> > https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>> >> ___
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>> >> mesa-dev@lists.freedesktop.org
>> >> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>>
>
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Re: [Mesa-dev] [PATCH 0/5] anv: Add a NIR cache

[Jason Ekstrand]

I ran the Vulkan CTS both with and without this patch in the hopes that the
massive pile of redundant shaders in the CTS would be helped.  It shaved 6
minutes of a 4.5 hour run.  Quite possibly in the noise.

--Jason

On Fri, Oct 12, 2018 at 7:08 PM Jason Ekstrand  wrote:

> This patch series adds a simple NIR shader cache that sits right after
> spirv_to_nir and brw_preprocess_nir and before linking.  This should help
> alleviate some of the added overhead of link-time optimization since most
> of the NIR-level optimization is now cached prior to linking.
>
> I have no numbers to back this series up; just intuition.
>
> Jason Ekstrand (5):
>   anv/pipeline: Move wpos and input attachment lowering to lower_nir
>   anv/pipeline: Hash shader modules and spec constants separately
>   compiler/types: Serialize/deserialize subpass input types correctly
>   anv/pipeline_cache: Add support for caching NIR
>   anv/pipeline: Cache the pre-lowered NIR
>
>  src/compiler/glsl_types.cpp   |   4 +-
>  src/intel/vulkan/anv_pipeline.c   | 118 ++
>  src/intel/vulkan/anv_pipeline_cache.c | 100 ++
>  src/intel/vulkan/anv_private.h|  18 
>  4 files changed, 204 insertions(+), 36 deletions(-)
>
> --
> 2.19.1
>
>
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[Mesa-dev] [PATCH] anv: Split dispatch tables into device and instance

[Jason Ekstrand]

There's no reason why we need generate trampoline functions for instance
functions or carry N copies of the instance dispatch table around for
every hardware generation.  Splitting the tables and being more
conservative shaves about 34K off .text and about 4K off .data when
built with clang.

Before splitting dispatch tables:

   textdata bss dec hex filename
3224305  2862168960 3519481  35b3f9 _install/lib64/libvulkan_intel.so

After splitting dispatch tables:

   textdata bss dec hex filename
3190325  2822328960 3481517  351fad _install/lib64/libvulkan_intel.so
---
 src/intel/vulkan/anv_device.c   |  61 --
 src/intel/vulkan/anv_entrypoints_gen.py | 242 +---
 src/intel/vulkan/anv_private.h  |  18 +-
 3 files changed, 230 insertions(+), 91 deletions(-)

diff --git a/src/intel/vulkan/anv_device.c b/src/intel/vulkan/anv_device.c
index 6a24d1086d8..a2551452eb1 100644
--- a/src/intel/vulkan/anv_device.c
+++ b/src/intel/vulkan/anv_device.c
@@ -637,14 +637,28 @@ VkResult anv_CreateInstance(
   /* Vulkan requires that entrypoints for extensions which have not been
* enabled must not be advertised.
*/
-  if (!anv_entrypoint_is_enabled(i, instance->app_info.api_version,
- &instance->enabled_extensions, NULL)) {
+  if (!anv_instance_entrypoint_is_enabled(i, 
instance->app_info.api_version,
+  &instance->enabled_extensions)) {
  instance->dispatch.entrypoints[i] = NULL;
-  } else if (anv_dispatch_table.entrypoints[i] != NULL) {
- instance->dispatch.entrypoints[i] = anv_dispatch_table.entrypoints[i];
   } else {
  instance->dispatch.entrypoints[i] =
-anv_tramp_dispatch_table.entrypoints[i];
+anv_instance_dispatch_table.entrypoints[i];
+  }
+   }
+
+   for (unsigned i = 0; i < ARRAY_SIZE(instance->device_dispatch.entrypoints); 
i++) {
+  /* Vulkan requires that entrypoints for extensions which have not been
+   * enabled must not be advertised.
+   */
+  if (!anv_device_entrypoint_is_enabled(i, instance->app_info.api_version,
+&instance->enabled_extensions, 
NULL)) {
+ instance->device_dispatch.entrypoints[i] = NULL;
+  } else if (anv_device_dispatch_table.entrypoints[i] != NULL) {
+ instance->device_dispatch.entrypoints[i] =
+anv_device_dispatch_table.entrypoints[i];
+  } else {
+ instance->device_dispatch.entrypoints[i] =
+anv_tramp_device_dispatch_table.entrypoints[i];
   }
}
 
@@ -1349,11 +1363,15 @@ PFN_vkVoidFunction anv_GetInstanceProcAddr(
if (instance == NULL)
   return NULL;
 
-   int idx = anv_get_entrypoint_index(pName);
-   if (idx < 0)
-  return NULL;
+   int idx = anv_get_instance_entrypoint_index(pName);
+   if (idx >= 0)
+  return instance->dispatch.entrypoints[idx];
+
+   idx = anv_get_device_entrypoint_index(pName);
+   if (idx >= 0)
+  return instance->device_dispatch.entrypoints[idx];
 
-   return instance->dispatch.entrypoints[idx];
+   return NULL;
 }
 
 /* With version 1+ of the loader interface the ICD should expose
@@ -1381,7 +1399,7 @@ PFN_vkVoidFunction anv_GetDeviceProcAddr(
if (!device || !pName)
   return NULL;
 
-   int idx = anv_get_entrypoint_index(pName);
+   int idx = anv_get_device_entrypoint_index(pName);
if (idx < 0)
   return NULL;
 
@@ -1531,25 +1549,25 @@ VkResult anv_EnumerateDeviceExtensionProperties(
 static void
 anv_device_init_dispatch(struct anv_device *device)
 {
-   const struct anv_dispatch_table *genX_table;
+   const struct anv_device_dispatch_table *genX_table;
switch (device->info.gen) {
case 11:
-  genX_table = &gen11_dispatch_table;
+  genX_table = &gen11_device_dispatch_table;
   break;
case 10:
-  genX_table = &gen10_dispatch_table;
+  genX_table = &gen10_device_dispatch_table;
   break;
case 9:
-  genX_table = &gen9_dispatch_table;
+  genX_table = &gen9_device_dispatch_table;
   break;
case 8:
-  genX_table = &gen8_dispatch_table;
+  genX_table = &gen8_device_dispatch_table;
   break;
case 7:
   if (device->info.is_haswell)
- genX_table = &gen75_dispatch_table;
+ genX_table = &gen75_device_dispatch_table;
   else
- genX_table = &gen7_dispatch_table;
+ genX_table = &gen7_device_dispatch_table;
   break;
default:
   unreachable("unsupported gen\n");
@@ -1559,14 +1577,15 @@ anv_device_init_dispatch(struct anv_device *device)
   /* Vulkan requires that entrypoints for extensions which have not been
* enabled must not be advertised.
*/
-  if (!anv_entrypoint_is_enabled(i, device->instance->app_info.api_version,
- &device->instance->enabled_extensions,
-   

[Mesa-dev] [Bug 108263] glGetTexImage with PBO is not accelerated on Gallium

[bugzilla-daemon]

https://bugs.freedesktop.org/show_bug.cgi?id=108263

Hi-Angel  changed:

   What|Removed |Added

 CC||hi-an...@yandex.ru

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Re: [Mesa-dev] [PATCH] radv: Allow physical device interfaces to be included in device extensions

[Keith Packard]

Jason Ekstrand  writes:

> Actually, I think anv is doing the right thing too.  Now I have no idea why
> Keith was having problems.

anv is happily returning a valid pointer and radv is not?

In any case, I've switched to using vkGetInstanceProcAddr for the
VkPhysicalDevice function and it works fine with both drivers.

-- 
-keith


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Re: [Mesa-dev] [PATCH] radv: Allow physical device interfaces to be included in device extensions

[Jason Ekstrand]

On October 13, 2018 19:50:00 "Keith Packard"  wrote:


Jason Ekstrand  writes:


Actually, I think anv is doing the right thing too.  Now I have no idea why
Keith was having problems.


anv is happily returning a valid pointer and radv is not?

In any case, I've switched to using vkGetInstanceProcAddr for the
VkPhysicalDevice function and it works fine with both drivers.


Using vkGetInstanceProcAddr is the right thing to do. The fact that anv 
allows you to is a bug which should be investigated and fixed.  I looked at 
it a bit today and I'm still not sure how it's happening.


--Jason



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